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Categories: aosp clang clang.exp clang_fast libcxx libunwind lld lldb llvm openmp polly rev_iter sanitizer toolchain
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aosp clang clang.exp clang_fast libcxx libunwind lld lldb llvm openmp polly rev_iter sanitizer toolchain
1e3cc06d986d...
Simon Pilgrim
Fix "not all control paths return a value" warning. NFCI.
b68191e729e0...
Simon Pilgrim
[X86][SSE] Add test for extractelement with multiple uses
Mentioned in D70267
9df9dec926e2...
Simon Pilgrim
Fix signed/unsigned comparison warning. NFCI.
eedb9648229f...
Simon Cook
[RISCV] Add assembly mnemonic spell checking
Summary:
This allows the assembler to suggest alternative assembly mnemonics when
an invalid one has been provided.

Reviewers: asb, lenary, lewis-revill

Reviewed By: asb

Subscribers: hiraditya, rbar, johnrusso, apazos, sabuasal, niosHD, kito-cheng, shiva0217, jrtc27, MaskRay, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, psnobl, benna, Jim, s.egerton, pzheng, sameer.abuasal, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69894
  • fuchsia-x86_64-linux: check failed -  stdio
c00e5cf29d49...
Simon Cook
[RISCV] Set triple based on -march flag
For RISC-V the value provided to -march should determine whether to
compile for 32- or 64-bit RISC-V irrespective of the target provided to
the Clang driver. This adds a test for this flag for RISC-V and sets the
Target architecture correctly in these cases.

Differential Revision: https://reviews.llvm.org/D54214
03e7fb2e075e...
QingShan Zhang
[NFC][Test] Add the vavg test for PowerPC
f4f77aa53e5b...
Simon Tatham
[ARM,MVE] Add InstCombine rules for pred_i2v / pred_v2i.
If you're writing C code using the ACLE MVE intrinsics that passes the
result of a vcmp as input to a predicated intrinsic, e.g.

  mve_pred16_t pred = vcmpeqq(v1, v2);
  v_out = vaddq_m(v_inactive, v3, v4, pred);

then clang's codegen for the compare intrinsic will create calls to
`@llvm.arm.mve.pred.v2i` to convert the output of `icmp` into an
`mve_pred16_t` integer representation, and then the next intrinsic
will call `@llvm.arm.mve.pred.i2v` to convert it straight back again.
This will be visible in the generated code as a `vmrs`/`vmsr` pair
that move the predicate value pointlessly out of `p0` and back into it again.

To prevent that, I've added InstCombine rules to remove round trips of
the form `v2i(i2v(x))` and `i2v(v2i(x))`. Also I've taught InstCombine
about the known and demanded bits of those intrinsics. As a result,
you now get just the generated code you wanted:

  vpt.u16 eq, q1, q2
  vaddt.u16 q0, q3, q4

Reviewers: ostannard, MarkMurrayARM, dmgreen

Reviewed By: dmgreen

Subscribers: kristof.beyls, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D70313
4a4dd85e5ab5...
Simon Tatham
[ARM,MVE] Add intrinsics for vector comparisons.
This adds the `vcmp` family of ACLE MVE intrinsics: vector/vector,
vector/scalar, and the predicated forms of both. All are represented
using standard existing IR: vector/scalar comparisons are represented
by making a vector out of the scalar first, and predicated forms are
represented by taking the bitwise AND of the input predicate and the
output of the comparison. Existing LLVM-side tests demonstrate that
ISel will pattern-match all of that back down to single MVE VCMPs.

The idiom of handling a vector/scalar operation by generating IR to
expand the scalar into a second vector is going to be needed for a lot
of MVE intrinsics, so to make that easy, I've provided a helper
function that automatically works out the element count.

The comparison intrinsics are the first ones that have to //return// a
predicate, in the user-facing `mve_pred16_t` format. This means we
have to use the `arm_mve_pred_v2i` low-level intrinsic to convert it
back from the logical `<n x i1>` form used in IR. I've done that
explicitly in the code gen specification for the builtins, because it
happens much more rarely in the ACLE API than passing a Predicate as
input, so it didn't seem worth automating in MveEmitter.

Reviewers: ostannard, MarkMurrayARM, dmgreen

Reviewed By: dmgreen

Subscribers: kristof.beyls, hiraditya, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D70297
23a766dcad47...
Michał Górny
[lldb] [Process/NetBSD] Implement thread name getting
Implement thread name getting sysctl() on NetBSD.  Also fix
the incorrect type in pthread_setname_np() in the relevant test.

Differential Revision: https://reviews.llvm.org/D70363
e8924d6403eb...
Michał Górny
[lldb] [test] Enable lldb-server tests on NetBSD, and set XFAILs
Differential Revision: https://reviews.llvm.org/D70335
a433e7141fb3...
Sam McCall
[AST] Attach comment in `/** doc */ typedef struct A {} B` to B as well as A.
Summary:
Semantically they're the same thing, and it's important when the underlying
struct is anonymous.

There doesn't seem to be a problem attaching the same comment to multiple things
as it already happens with `/** doc */ int a, b;`

This affects an Index test but the results look better (name present, USR points
to the typedef).

Fixes https://github.com/clangd/clangd/issues/189

Reviewers: kadircet, lh123

Subscribers: ilya-biryukov, jkorous, arphaman, usaxena95, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D70203
  • llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast: Test just built components for check-all failed -  stdio
2d739f98d8a5...
Anna Welker
[ARM] Allocatable Global Register Variables for ARM
      Provides support for using r6-r11 as globally scoped
      register variables. This requires a -ffixed-rN flag
      in order to reserve rN against general allocation.

      If for a given GRV declaration the corresponding flag
      is not found, or the the register in question is the
      target's FP, we fail with a diagnostic.

      Differential Revision: https://reviews.llvm.org/D68862
  • llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast: Test just built components for check-all failed -  stdio
c0f6ad7d1f3c...
Pavel Labath
DWARF location lists: Add section index dumping
Summary:
As discussed in D70081, this adds the ability to dump section
names/indices to the location list dumper. It does this by moving the
range specific logic from DWARFDie.cpp:dumpRanges into the
DWARFAddressRange class.

The trickiest part of this patch is the backflip in the meanings of the
two dump flags for the location list sections.

The dumping of "raw" location list data is now controlled by
"DisplayRawContents" flag. This frees up the "Verbose" flag to be used
to control whether we print the section index. Additionally, the
DisplayRawContents flag is set for section-based dumps whenever the
--verbose option is passed, but this is not done for the "inline" dumps.

Also note that the index dumping currently does not work for the DWARF
v5 location lists, as the parser does not fill out the appropriate
fields. This will be done in a separate patch.

Reviewers: dblaikie, probinson, JDevlieghere, SouraVX

Subscribers: sdardis, hiraditya, jrtc27, atanasyan, arphaman, aprantl, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D70227
816ff985f51e...
James Clarke
[Sparc] Fix "Cannot select" error for AtomicFence on 32-bit V9
Summary:
This also adds testing of 32-bit V9 atomic lowering, splitting the
64-bit-only tests out into their own file.

Reviewers: venkatra, jyknight

Reviewed By: jyknight

Subscribers: hiraditya, fedor.sergeev, jfb, llvm-commits, glaubitz

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69352
bfbbf0aba81a...
Craig Topper
[LegalizeTypes] Remove SoftenFloat handling from ExpandIntRes_LLROUND_LLRINT and remove assert from the strict fp path.
These were both recently added. While the call to GetSoftenedFloat
is a little more optimal, we don't do it in the expand for
FP_TO_SINT/UINT so there's no real reason to do it here. This
avoids a FIXME for strict fp.
5a56d2aa33c6...
Craig Topper
[LegalizeTypes] Remove unnecessary conversion from EVT to MVT to MVT::SimpleValueType just to assign back to EVT. NFC
909d7bf9a7c5...
Rui Ueyama
Fix Windows buildbots
`stdout` and `stderr` might be defined as macros, so we needed to
avoid using them as variable names.
f82dba019253...
Eric Fiselier
Rename __is_foo_iterator traits to reflect their Cpp17 nature.
With the upcoming introduction of iterator concepts in ranges,
the meaning of "__is_contiguous_iterator" changes drastically.

Currently we intend it to mean "does it have this iterator category",
but it could now also mean "does it meet the requirements of this
concept", and these can be different.
783cb86b616d...
Duncan P. N. Exon Smith
llvm/ObjCARC: Split OptimizeIndividualCallImpl out of OptimizeIndividualCalls, NFC
Split out a helper function for the individual call optimizations and
skip useless calls to it (where the instruction is not an ARC
intrinsic).  Besides reducing indentation (and possibly speeding up
compile time in some small way), an upcoming patch will add additional
calls and expand out the `switch`.
af435286e53d...
Craig Topper
[LegalizeTypes][X86] Add support for expanding the result type of STRICT_LLROUND and STRICT_LLRINT.
This doesn't handle softening the input type, but we don't handle
softening any of the strict nodes yet. Skipping that made it easy
to reuse an existing function for creating a libcall from a node
with a chain.
a0337d269b7c...
czhengsz
[PowerPC] extend PPCPreIncPrep Pass for ds/dq form
Now, PPCPreIncPrep pass changes a loop to update form and update all load/store
with same base accordingly. We can do more for load/store with same base, for
example, convert load/store with same base to ds/dq form.

Reviewed by: jsji

Differential Revision: https://reviews.llvm.org/D67088
  • fuchsia-x86_64-linux: check failed -  stdio
5864cb38da70...
Brian Gesiak
[docs] Fix broken links in Kaleidoscope chapter 3
Several links in this document referred to `LangImpl4.html` or
`LangImpl7.html`. However, now these pages use two digits, so for these
links to function they need to be modified to `LangImpl04.html`, and so
on -- note the extra `0`.
  • fuchsia-x86_64-linux: check failed -  stdio
a937a588dd29...
Duncan P. N. Exon Smith
llvm/ObjCARC: Use continue to reduce some nesting, NFC