/Users/buildslave/jenkins/sharedspace/clang-stage2-coverage-R@2/clang-build/lib/Target/XCore/XCoreGenInstrInfo.inc
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1 | | /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |
2 | | |* *| |
3 | | |* Target Instruction Enum Values and Descriptors *| |
4 | | |* *| |
5 | | |* Automatically generated file, do not edit! *| |
6 | | |* *| |
7 | | \*===----------------------------------------------------------------------===*/ |
8 | | |
9 | | #ifdef GET_INSTRINFO_ENUM |
10 | | #undef GET_INSTRINFO_ENUM |
11 | | namespace llvm { |
12 | | |
13 | | namespace XCore { |
14 | | enum { |
15 | | PHI = 0, |
16 | | INLINEASM = 1, |
17 | | CFI_INSTRUCTION = 2, |
18 | | EH_LABEL = 3, |
19 | | GC_LABEL = 4, |
20 | | ANNOTATION_LABEL = 5, |
21 | | KILL = 6, |
22 | | EXTRACT_SUBREG = 7, |
23 | | INSERT_SUBREG = 8, |
24 | | IMPLICIT_DEF = 9, |
25 | | SUBREG_TO_REG = 10, |
26 | | COPY_TO_REGCLASS = 11, |
27 | | DBG_VALUE = 12, |
28 | | REG_SEQUENCE = 13, |
29 | | COPY = 14, |
30 | | BUNDLE = 15, |
31 | | LIFETIME_START = 16, |
32 | | LIFETIME_END = 17, |
33 | | STACKMAP = 18, |
34 | | FENTRY_CALL = 19, |
35 | | PATCHPOINT = 20, |
36 | | LOAD_STACK_GUARD = 21, |
37 | | STATEPOINT = 22, |
38 | | LOCAL_ESCAPE = 23, |
39 | | FAULTING_OP = 24, |
40 | | PATCHABLE_OP = 25, |
41 | | PATCHABLE_FUNCTION_ENTER = 26, |
42 | | PATCHABLE_RET = 27, |
43 | | PATCHABLE_FUNCTION_EXIT = 28, |
44 | | PATCHABLE_TAIL_CALL = 29, |
45 | | PATCHABLE_EVENT_CALL = 30, |
46 | | G_ADD = 31, |
47 | | G_SUB = 32, |
48 | | G_MUL = 33, |
49 | | G_SDIV = 34, |
50 | | G_UDIV = 35, |
51 | | G_SREM = 36, |
52 | | G_UREM = 37, |
53 | | G_AND = 38, |
54 | | G_OR = 39, |
55 | | G_XOR = 40, |
56 | | G_IMPLICIT_DEF = 41, |
57 | | G_PHI = 42, |
58 | | G_FRAME_INDEX = 43, |
59 | | G_GLOBAL_VALUE = 44, |
60 | | G_EXTRACT = 45, |
61 | | G_UNMERGE_VALUES = 46, |
62 | | G_INSERT = 47, |
63 | | G_MERGE_VALUES = 48, |
64 | | G_PTRTOINT = 49, |
65 | | G_INTTOPTR = 50, |
66 | | G_BITCAST = 51, |
67 | | G_LOAD = 52, |
68 | | G_STORE = 53, |
69 | | G_BRCOND = 54, |
70 | | G_BRINDIRECT = 55, |
71 | | G_INTRINSIC = 56, |
72 | | G_INTRINSIC_W_SIDE_EFFECTS = 57, |
73 | | G_ANYEXT = 58, |
74 | | G_TRUNC = 59, |
75 | | G_CONSTANT = 60, |
76 | | G_FCONSTANT = 61, |
77 | | G_VASTART = 62, |
78 | | G_VAARG = 63, |
79 | | G_SEXT = 64, |
80 | | G_ZEXT = 65, |
81 | | G_SHL = 66, |
82 | | G_LSHR = 67, |
83 | | G_ASHR = 68, |
84 | | G_ICMP = 69, |
85 | | G_FCMP = 70, |
86 | | G_SELECT = 71, |
87 | | G_UADDE = 72, |
88 | | G_USUBE = 73, |
89 | | G_SADDO = 74, |
90 | | G_SSUBO = 75, |
91 | | G_UMULO = 76, |
92 | | G_SMULO = 77, |
93 | | G_UMULH = 78, |
94 | | G_SMULH = 79, |
95 | | G_FADD = 80, |
96 | | G_FSUB = 81, |
97 | | G_FMUL = 82, |
98 | | G_FMA = 83, |
99 | | G_FDIV = 84, |
100 | | G_FREM = 85, |
101 | | G_FPOW = 86, |
102 | | G_FEXP = 87, |
103 | | G_FEXP2 = 88, |
104 | | G_FLOG = 89, |
105 | | G_FLOG2 = 90, |
106 | | G_FNEG = 91, |
107 | | G_FPEXT = 92, |
108 | | G_FPTRUNC = 93, |
109 | | G_FPTOSI = 94, |
110 | | G_FPTOUI = 95, |
111 | | G_SITOFP = 96, |
112 | | G_UITOFP = 97, |
113 | | G_GEP = 98, |
114 | | G_PTR_MASK = 99, |
115 | | G_BR = 100, |
116 | | G_INSERT_VECTOR_ELT = 101, |
117 | | G_EXTRACT_VECTOR_ELT = 102, |
118 | | G_SHUFFLE_VECTOR = 103, |
119 | | G_BSWAP = 104, |
120 | | ADD_2rus = 105, |
121 | | ADD_3r = 106, |
122 | | ADJCALLSTACKDOWN = 107, |
123 | | ADJCALLSTACKUP = 108, |
124 | | ANDNOT_2r = 109, |
125 | | AND_3r = 110, |
126 | | ASHR_l2rus = 111, |
127 | | ASHR_l3r = 112, |
128 | | BAU_1r = 113, |
129 | | BITREV_l2r = 114, |
130 | | BLACP_lu10 = 115, |
131 | | BLACP_u10 = 116, |
132 | | BLAT_lu6 = 117, |
133 | | BLAT_u6 = 118, |
134 | | BLA_1r = 119, |
135 | | BLRB_lu10 = 120, |
136 | | BLRB_u10 = 121, |
137 | | BLRF_lu10 = 122, |
138 | | BLRF_u10 = 123, |
139 | | BRBF_lru6 = 124, |
140 | | BRBF_ru6 = 125, |
141 | | BRBT_lru6 = 126, |
142 | | BRBT_ru6 = 127, |
143 | | BRBU_lu6 = 128, |
144 | | BRBU_u6 = 129, |
145 | | BRFF_lru6 = 130, |
146 | | BRFF_ru6 = 131, |
147 | | BRFT_lru6 = 132, |
148 | | BRFT_ru6 = 133, |
149 | | BRFU_lu6 = 134, |
150 | | BRFU_u6 = 135, |
151 | | BRU_1r = 136, |
152 | | BR_JT = 137, |
153 | | BR_JT32 = 138, |
154 | | BYTEREV_l2r = 139, |
155 | | CHKCT_2r = 140, |
156 | | CHKCT_rus = 141, |
157 | | CLRE_0R = 142, |
158 | | CLRPT_1R = 143, |
159 | | CLRSR_branch_lu6 = 144, |
160 | | CLRSR_branch_u6 = 145, |
161 | | CLRSR_lu6 = 146, |
162 | | CLRSR_u6 = 147, |
163 | | CLZ_l2r = 148, |
164 | | CRC8_l4r = 149, |
165 | | CRC_l3r = 150, |
166 | | DCALL_0R = 151, |
167 | | DENTSP_0R = 152, |
168 | | DGETREG_1r = 153, |
169 | | DIVS_l3r = 154, |
170 | | DIVU_l3r = 155, |
171 | | DRESTSP_0R = 156, |
172 | | DRET_0R = 157, |
173 | | ECALLF_1r = 158, |
174 | | ECALLT_1r = 159, |
175 | | EDU_1r = 160, |
176 | | EEF_2r = 161, |
177 | | EET_2r = 162, |
178 | | EEU_1r = 163, |
179 | | EH_RETURN = 164, |
180 | | ENDIN_2r = 165, |
181 | | ENTSP_lu6 = 166, |
182 | | ENTSP_u6 = 167, |
183 | | EQ_2rus = 168, |
184 | | EQ_3r = 169, |
185 | | EXTDP_lu6 = 170, |
186 | | EXTDP_u6 = 171, |
187 | | EXTSP_lu6 = 172, |
188 | | EXTSP_u6 = 173, |
189 | | FRAME_TO_ARGS_OFFSET = 174, |
190 | | FREER_1r = 175, |
191 | | FREET_0R = 176, |
192 | | GETD_l2r = 177, |
193 | | GETED_0R = 178, |
194 | | GETET_0R = 179, |
195 | | GETID_0R = 180, |
196 | | GETKEP_0R = 181, |
197 | | GETKSP_0R = 182, |
198 | | GETN_l2r = 183, |
199 | | GETPS_l2r = 184, |
200 | | GETR_rus = 185, |
201 | | GETSR_lu6 = 186, |
202 | | GETSR_u6 = 187, |
203 | | GETST_2r = 188, |
204 | | GETTS_2r = 189, |
205 | | INCT_2r = 190, |
206 | | INITCP_2r = 191, |
207 | | INITDP_2r = 192, |
208 | | INITLR_l2r = 193, |
209 | | INITPC_2r = 194, |
210 | | INITSP_2r = 195, |
211 | | INPW_l2rus = 196, |
212 | | INSHR_2r = 197, |
213 | | INT_2r = 198, |
214 | | IN_2r = 199, |
215 | | Int_MemBarrier = 200, |
216 | | KCALL_1r = 201, |
217 | | KCALL_lu6 = 202, |
218 | | KCALL_u6 = 203, |
219 | | KENTSP_lu6 = 204, |
220 | | KENTSP_u6 = 205, |
221 | | KRESTSP_lu6 = 206, |
222 | | KRESTSP_u6 = 207, |
223 | | KRET_0R = 208, |
224 | | LADD_l5r = 209, |
225 | | LD16S_3r = 210, |
226 | | LD8U_3r = 211, |
227 | | LDA16B_l3r = 212, |
228 | | LDA16F_l3r = 213, |
229 | | LDAPB_lu10 = 214, |
230 | | LDAPB_u10 = 215, |
231 | | LDAPF_lu10 = 216, |
232 | | LDAPF_lu10_ba = 217, |
233 | | LDAPF_u10 = 218, |
234 | | LDAWB_l2rus = 219, |
235 | | LDAWB_l3r = 220, |
236 | | LDAWCP_lu6 = 221, |
237 | | LDAWCP_u6 = 222, |
238 | | LDAWDP_lru6 = 223, |
239 | | LDAWDP_ru6 = 224, |
240 | | LDAWFI = 225, |
241 | | LDAWF_l2rus = 226, |
242 | | LDAWF_l3r = 227, |
243 | | LDAWSP_lru6 = 228, |
244 | | LDAWSP_ru6 = 229, |
245 | | LDC_lru6 = 230, |
246 | | LDC_ru6 = 231, |
247 | | LDET_0R = 232, |
248 | | LDIVU_l5r = 233, |
249 | | LDSED_0R = 234, |
250 | | LDSPC_0R = 235, |
251 | | LDSSR_0R = 236, |
252 | | LDWCP_lru6 = 237, |
253 | | LDWCP_lu10 = 238, |
254 | | LDWCP_ru6 = 239, |
255 | | LDWCP_u10 = 240, |
256 | | LDWDP_lru6 = 241, |
257 | | LDWDP_ru6 = 242, |
258 | | LDWFI = 243, |
259 | | LDWSP_lru6 = 244, |
260 | | LDWSP_ru6 = 245, |
261 | | LDW_2rus = 246, |
262 | | LDW_3r = 247, |
263 | | LMUL_l6r = 248, |
264 | | LSS_3r = 249, |
265 | | LSUB_l5r = 250, |
266 | | LSU_3r = 251, |
267 | | MACCS_l4r = 252, |
268 | | MACCU_l4r = 253, |
269 | | MJOIN_1r = 254, |
270 | | MKMSK_2r = 255, |
271 | | MKMSK_rus = 256, |
272 | | MSYNC_1r = 257, |
273 | | MUL_l3r = 258, |
274 | | NEG = 259, |
275 | | NOT = 260, |
276 | | OR_3r = 261, |
277 | | OUTCT_2r = 262, |
278 | | OUTCT_rus = 263, |
279 | | OUTPW_l2rus = 264, |
280 | | OUTSHR_2r = 265, |
281 | | OUTT_2r = 266, |
282 | | OUT_2r = 267, |
283 | | PEEK_2r = 268, |
284 | | REMS_l3r = 269, |
285 | | REMU_l3r = 270, |
286 | | RETSP_lu6 = 271, |
287 | | RETSP_u6 = 272, |
288 | | SELECT_CC = 273, |
289 | | SETCLK_l2r = 274, |
290 | | SETCP_1r = 275, |
291 | | SETC_l2r = 276, |
292 | | SETC_lru6 = 277, |
293 | | SETC_ru6 = 278, |
294 | | SETDP_1r = 279, |
295 | | SETD_2r = 280, |
296 | | SETEV_1r = 281, |
297 | | SETKEP_0R = 282, |
298 | | SETN_l2r = 283, |
299 | | SETPSC_2r = 284, |
300 | | SETPS_l2r = 285, |
301 | | SETPT_2r = 286, |
302 | | SETRDY_l2r = 287, |
303 | | SETSP_1r = 288, |
304 | | SETSR_branch_lu6 = 289, |
305 | | SETSR_branch_u6 = 290, |
306 | | SETSR_lu6 = 291, |
307 | | SETSR_u6 = 292, |
308 | | SETTW_l2r = 293, |
309 | | SETV_1r = 294, |
310 | | SEXT_2r = 295, |
311 | | SEXT_rus = 296, |
312 | | SHL_2rus = 297, |
313 | | SHL_3r = 298, |
314 | | SHR_2rus = 299, |
315 | | SHR_3r = 300, |
316 | | SSYNC_0r = 301, |
317 | | ST16_l3r = 302, |
318 | | ST8_l3r = 303, |
319 | | STET_0R = 304, |
320 | | STSED_0R = 305, |
321 | | STSPC_0R = 306, |
322 | | STSSR_0R = 307, |
323 | | STWDP_lru6 = 308, |
324 | | STWDP_ru6 = 309, |
325 | | STWFI = 310, |
326 | | STWSP_lru6 = 311, |
327 | | STWSP_ru6 = 312, |
328 | | STW_2rus = 313, |
329 | | STW_l3r = 314, |
330 | | SUB_2rus = 315, |
331 | | SUB_3r = 316, |
332 | | SYNCR_1r = 317, |
333 | | TESTCT_2r = 318, |
334 | | TESTLCL_l2r = 319, |
335 | | TESTWCT_2r = 320, |
336 | | TSETMR_2r = 321, |
337 | | TSETR_3r = 322, |
338 | | TSTART_1R = 323, |
339 | | WAITEF_1R = 324, |
340 | | WAITET_1R = 325, |
341 | | WAITEU_0R = 326, |
342 | | XOR_l3r = 327, |
343 | | ZEXT_2r = 328, |
344 | | ZEXT_rus = 329, |
345 | | INSTRUCTION_LIST_END = 330 |
346 | | }; |
347 | | |
348 | | namespace Sched { |
349 | | enum { |
350 | | NoInstrModel = 0, |
351 | | SCHED_LIST_END = 1 |
352 | | }; |
353 | | } // end Sched namespace |
354 | | } // end XCore namespace |
355 | | } // end llvm namespace |
356 | | #endif // GET_INSTRINFO_ENUM |
357 | | |
358 | | #ifdef GET_INSTRINFO_MC_DESC |
359 | | #undef GET_INSTRINFO_MC_DESC |
360 | | namespace llvm { |
361 | | |
362 | | static const MCPhysReg ImplicitList1[] = { XCore::SP, 0 }; |
363 | | static const MCPhysReg ImplicitList2[] = { XCore::R0, XCore::R1, XCore::R2, XCore::R3, XCore::R11, XCore::LR, 0 }; |
364 | | static const MCPhysReg ImplicitList3[] = { XCore::R11, 0 }; |
365 | | |
366 | | static const MCOperandInfo OperandInfo2[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, }; |
367 | | static const MCOperandInfo OperandInfo3[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, }; |
368 | | static const MCOperandInfo OperandInfo4[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, }; |
369 | | static const MCOperandInfo OperandInfo5[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, }; |
370 | | static const MCOperandInfo OperandInfo6[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, }; |
371 | | static const MCOperandInfo OperandInfo7[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, }; |
372 | | static const MCOperandInfo OperandInfo8[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, }; |
373 | | static const MCOperandInfo OperandInfo9[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, }; |
374 | | static const MCOperandInfo OperandInfo10[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, }; |
375 | | static const MCOperandInfo OperandInfo11[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, }; |
376 | | static const MCOperandInfo OperandInfo12[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, }; |
377 | | static const MCOperandInfo OperandInfo13[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, }; |
378 | | static const MCOperandInfo OperandInfo14[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, }; |
379 | | static const MCOperandInfo OperandInfo15[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, }; |
380 | | static const MCOperandInfo OperandInfo16[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, }; |
381 | | static const MCOperandInfo OperandInfo17[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, }; |
382 | | static const MCOperandInfo OperandInfo18[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, }; |
383 | | static const MCOperandInfo OperandInfo19[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, }; |
384 | | static const MCOperandInfo OperandInfo20[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, }; |
385 | | static const MCOperandInfo OperandInfo21[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, }; |
386 | | static const MCOperandInfo OperandInfo22[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, }; |
387 | | static const MCOperandInfo OperandInfo23[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, }; |
388 | | static const MCOperandInfo OperandInfo24[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, }; |
389 | | static const MCOperandInfo OperandInfo25[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, }; |
390 | | static const MCOperandInfo OperandInfo26[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, }; |
391 | | static const MCOperandInfo OperandInfo27[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, }; |
392 | | static const MCOperandInfo OperandInfo28[] = { { XCore::GRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { XCore::GRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, }; |
393 | | static const MCOperandInfo OperandInfo29[] = { { XCore::GRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { XCore::GRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { XCore::GRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, }; |
394 | | static const MCOperandInfo OperandInfo30[] = { { XCore::GRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { XCore::GRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { XCore::GRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, }; |
395 | | static const MCOperandInfo OperandInfo31[] = { { XCore::GRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, }; |
396 | | static const MCOperandInfo OperandInfo32[] = { { XCore::GRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { XCore::GRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, }; |
397 | | static const MCOperandInfo OperandInfo33[] = { { XCore::GRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, }; |
398 | | static const MCOperandInfo OperandInfo34[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { XCore::GRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, }; |
399 | | static const MCOperandInfo OperandInfo35[] = { { XCore::GRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, }; |
400 | | static const MCOperandInfo OperandInfo36[] = { { XCore::GRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { XCore::GRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { XCore::GRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, { XCore::GRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { XCore::GRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, }; |
401 | | static const MCOperandInfo OperandInfo37[] = { { XCore::GRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { XCore::GRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { XCore::GRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { XCore::GRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, }; |
402 | | static const MCOperandInfo OperandInfo38[] = { { XCore::GRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { XCore::GRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { XCore::GRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { XCore::GRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { XCore::GRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, }; |
403 | | static const MCOperandInfo OperandInfo39[] = { { XCore::RRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, }; |
404 | | static const MCOperandInfo OperandInfo40[] = { { XCore::GRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, }; |
405 | | static const MCOperandInfo OperandInfo41[] = { { XCore::GRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { XCore::GRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { XCore::GRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { XCore::GRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { XCore::GRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { XCore::GRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, }; |
406 | | static const MCOperandInfo OperandInfo42[] = { { XCore::GRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { XCore::GRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { XCore::GRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { XCore::GRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, { XCore::GRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { XCore::GRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, }; |
407 | | static const MCOperandInfo OperandInfo43[] = { { XCore::GRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { XCore::GRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { XCore::GRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { XCore::GRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, }; |
408 | | static const MCOperandInfo OperandInfo44[] = { { XCore::GRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { XCore::GRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, }; |
409 | | static const MCOperandInfo OperandInfo45[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { XCore::GRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, }; |
410 | | static const MCOperandInfo OperandInfo46[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { XCore::GRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { XCore::GRRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, }; |
411 | | |
412 | | extern const MCInstrDesc XCoreInsts[] = { |
413 | | { 0, 1, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #0 = PHI |
414 | | { 1, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #1 = INLINEASM |
415 | | { 2, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr }, // Inst #2 = CFI_INSTRUCTION |
416 | | { 3, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr }, // Inst #3 = EH_LABEL |
417 | | { 4, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr }, // Inst #4 = GC_LABEL |
418 | | { 5, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr }, // Inst #5 = ANNOTATION_LABEL |
419 | | { 6, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #6 = KILL |
420 | | { 7, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo4, -1 ,nullptr }, // Inst #7 = EXTRACT_SUBREG |
421 | | { 8, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo5, -1 ,nullptr }, // Inst #8 = INSERT_SUBREG |
422 | | { 9, 1, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #9 = IMPLICIT_DEF |
423 | | { 10, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo6, -1 ,nullptr }, // Inst #10 = SUBREG_TO_REG |
424 | | { 11, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo4, -1 ,nullptr }, // Inst #11 = COPY_TO_REGCLASS |
425 | | { 12, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #12 = DBG_VALUE |
426 | | { 13, 2, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo7, -1 ,nullptr }, // Inst #13 = REG_SEQUENCE |
427 | | { 14, 2, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo7, -1 ,nullptr }, // Inst #14 = COPY |
428 | | { 15, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #15 = BUNDLE |
429 | | { 16, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr }, // Inst #16 = LIFETIME_START |
430 | | { 17, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr }, // Inst #17 = LIFETIME_END |
431 | | { 18, 2, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo8, -1 ,nullptr }, // Inst #18 = STACKMAP |
432 | | { 19, 1, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #19 = FENTRY_CALL |
433 | | { 20, 6, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo9, -1 ,nullptr }, // Inst #20 = PATCHPOINT |
434 | | { 21, 1, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x0ULL, nullptr, nullptr, OperandInfo10, -1 ,nullptr }, // Inst #21 = LOAD_STACK_GUARD |
435 | | { 22, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #22 = STATEPOINT |
436 | | { 23, 2, 0, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo11, -1 ,nullptr }, // Inst #23 = LOCAL_ESCAPE |
437 | | { 24, 1, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #24 = FAULTING_OP |
438 | | { 25, 1, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #25 = PATCHABLE_OP |
439 | | { 26, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #26 = PATCHABLE_FUNCTION_ENTER |
440 | | { 27, 1, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #27 = PATCHABLE_RET |
441 | | { 28, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #28 = PATCHABLE_FUNCTION_EXIT |
442 | | { 29, 1, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #29 = PATCHABLE_TAIL_CALL |
443 | | { 30, 2, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo11, -1 ,nullptr }, // Inst #30 = PATCHABLE_EVENT_CALL |
444 | | { 31, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr }, // Inst #31 = G_ADD |
445 | | { 32, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr }, // Inst #32 = G_SUB |
446 | | { 33, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr }, // Inst #33 = G_MUL |
447 | | { 34, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr }, // Inst #34 = G_SDIV |
448 | | { 35, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr }, // Inst #35 = G_UDIV |
449 | | { 36, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr }, // Inst #36 = G_SREM |
450 | | { 37, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr }, // Inst #37 = G_UREM |
451 | | { 38, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr }, // Inst #38 = G_AND |
452 | | { 39, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr }, // Inst #39 = G_OR |
453 | | { 40, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr }, // Inst #40 = G_XOR |
454 | | { 41, 1, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr }, // Inst #41 = G_IMPLICIT_DEF |
455 | | { 42, 1, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr }, // Inst #42 = G_PHI |
456 | | { 43, 2, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo14, -1 ,nullptr }, // Inst #43 = G_FRAME_INDEX |
457 | | { 44, 2, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo14, -1 ,nullptr }, // Inst #44 = G_GLOBAL_VALUE |
458 | | { 45, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo15, -1 ,nullptr }, // Inst #45 = G_EXTRACT |
459 | | { 46, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #46 = G_UNMERGE_VALUES |
460 | | { 47, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo16, -1 ,nullptr }, // Inst #47 = G_INSERT |
461 | | { 48, 1, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr }, // Inst #48 = G_MERGE_VALUES |
462 | | { 49, 2, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, // Inst #49 = G_PTRTOINT |
463 | | { 50, 2, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, // Inst #50 = G_INTTOPTR |
464 | | { 51, 2, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, // Inst #51 = G_BITCAST |
465 | | { 52, 2, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, // Inst #52 = G_LOAD |
466 | | { 53, 2, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, // Inst #53 = G_STORE |
467 | | { 54, 2, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo14, -1 ,nullptr }, // Inst #54 = G_BRCOND |
468 | | { 55, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr }, // Inst #55 = G_BRINDIRECT |
469 | | { 56, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #56 = G_INTRINSIC |
470 | | { 57, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #57 = G_INTRINSIC_W_SIDE_EFFECTS |
471 | | { 58, 2, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, // Inst #58 = G_ANYEXT |
472 | | { 59, 2, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, // Inst #59 = G_TRUNC |
473 | | { 60, 2, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo14, -1 ,nullptr }, // Inst #60 = G_CONSTANT |
474 | | { 61, 2, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo14, -1 ,nullptr }, // Inst #61 = G_FCONSTANT |
475 | | { 62, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr }, // Inst #62 = G_VASTART |
476 | | { 63, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo15, -1 ,nullptr }, // Inst #63 = G_VAARG |
477 | | { 64, 2, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, // Inst #64 = G_SEXT |
478 | | { 65, 2, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, // Inst #65 = G_ZEXT |
479 | | { 66, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr }, // Inst #66 = G_SHL |
480 | | { 67, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr }, // Inst #67 = G_LSHR |
481 | | { 68, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr }, // Inst #68 = G_ASHR |
482 | | { 69, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr }, // Inst #69 = G_ICMP |
483 | | { 70, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr }, // Inst #70 = G_FCMP |
484 | | { 71, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr }, // Inst #71 = G_SELECT |
485 | | { 72, 5, 2, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo20, -1 ,nullptr }, // Inst #72 = G_UADDE |
486 | | { 73, 5, 2, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo20, -1 ,nullptr }, // Inst #73 = G_USUBE |
487 | | { 74, 4, 2, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr }, // Inst #74 = G_SADDO |
488 | | { 75, 4, 2, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr }, // Inst #75 = G_SSUBO |
489 | | { 76, 4, 2, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr }, // Inst #76 = G_UMULO |
490 | | { 77, 4, 2, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr }, // Inst #77 = G_SMULO |
491 | | { 78, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr }, // Inst #78 = G_UMULH |
492 | | { 79, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr }, // Inst #79 = G_SMULH |
493 | | { 80, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr }, // Inst #80 = G_FADD |
494 | | { 81, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr }, // Inst #81 = G_FSUB |
495 | | { 82, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr }, // Inst #82 = G_FMUL |
496 | | { 83, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo21, -1 ,nullptr }, // Inst #83 = G_FMA |
497 | | { 84, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr }, // Inst #84 = G_FDIV |
498 | | { 85, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr }, // Inst #85 = G_FREM |
499 | | { 86, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr }, // Inst #86 = G_FPOW |
500 | | { 87, 2, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo22, -1 ,nullptr }, // Inst #87 = G_FEXP |
501 | | { 88, 2, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo22, -1 ,nullptr }, // Inst #88 = G_FEXP2 |
502 | | { 89, 2, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo22, -1 ,nullptr }, // Inst #89 = G_FLOG |
503 | | { 90, 2, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo22, -1 ,nullptr }, // Inst #90 = G_FLOG2 |
504 | | { 91, 2, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo22, -1 ,nullptr }, // Inst #91 = G_FNEG |
505 | | { 92, 2, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, // Inst #92 = G_FPEXT |
506 | | { 93, 2, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, // Inst #93 = G_FPTRUNC |
507 | | { 94, 2, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, // Inst #94 = G_FPTOSI |
508 | | { 95, 2, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, // Inst #95 = G_FPTOUI |
509 | | { 96, 2, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, // Inst #96 = G_SITOFP |
510 | | { 97, 2, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, // Inst #97 = G_UITOFP |
511 | | { 98, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo23, -1 ,nullptr }, // Inst #98 = G_GEP |
512 | | { 99, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo24, -1 ,nullptr }, // Inst #99 = G_PTR_MASK |
513 | | { 100, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #100 = G_BR |
514 | | { 101, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo25, -1 ,nullptr }, // Inst #101 = G_INSERT_VECTOR_ELT |
515 | | { 102, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo26, -1 ,nullptr }, // Inst #102 = G_EXTRACT_VECTOR_ELT |
516 | | { 103, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo27, -1 ,nullptr }, // Inst #103 = G_SHUFFLE_VECTOR |
517 | | { 104, 2, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo22, -1 ,nullptr }, // Inst #104 = G_BSWAP |
518 | | { 105, 3, 1, 2, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo28, -1 ,nullptr }, // Inst #105 = ADD_2rus |
519 | | { 106, 3, 1, 2, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo29, -1 ,nullptr }, // Inst #106 = ADD_3r |
520 | | { 107, 2, 0, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, ImplicitList1, ImplicitList1, OperandInfo8, -1 ,nullptr }, // Inst #107 = ADJCALLSTACKDOWN |
521 | | { 108, 2, 0, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, ImplicitList1, ImplicitList1, OperandInfo8, -1 ,nullptr }, // Inst #108 = ADJCALLSTACKUP |
522 | | { 109, 3, 1, 2, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo30, -1 ,nullptr }, // Inst #109 = ANDNOT_2r |
523 | | { 110, 3, 1, 2, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo29, -1 ,nullptr }, // Inst #110 = AND_3r |
524 | | { 111, 3, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo28, -1 ,nullptr }, // Inst #111 = ASHR_l2rus |
525 | | { 112, 3, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo29, -1 ,nullptr }, // Inst #112 = ASHR_l3r |
526 | | { 113, 1, 0, 2, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo31, -1 ,nullptr }, // Inst #113 = BAU_1r |
527 | | { 114, 2, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr }, // Inst #114 = BITREV_l2r |
528 | | { 115, 1, 0, 4, 0, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, ImplicitList2, OperandInfo3, -1 ,nullptr }, // Inst #115 = BLACP_lu10 |
529 | | { 116, 1, 0, 2, 0, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, ImplicitList2, OperandInfo3, -1 ,nullptr }, // Inst #116 = BLACP_u10 |
530 | | { 117, 1, 0, 4, 0, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList3, nullptr, OperandInfo3, -1 ,nullptr }, // Inst #117 = BLAT_lu6 |
531 | | { 118, 1, 0, 2, 0, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList3, nullptr, OperandInfo3, -1 ,nullptr }, // Inst #118 = BLAT_u6 |
532 | | { 119, 1, 0, 2, 0, 0|(1ULL<<MCID::Call), 0x0ULL, ImplicitList1, ImplicitList2, OperandInfo31, -1 ,nullptr }, // Inst #119 = BLA_1r |
533 | | { 120, 1, 0, 4, 0, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, ImplicitList2, OperandInfo2, -1 ,nullptr }, // Inst #120 = BLRB_lu10 |
534 | | { 121, 1, 0, 2, 0, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, ImplicitList2, OperandInfo2, -1 ,nullptr }, // Inst #121 = BLRB_u10 |
535 | | { 122, 1, 0, 4, 0, 0|(1ULL<<MCID::Call), 0x0ULL, ImplicitList1, ImplicitList2, OperandInfo2, -1 ,nullptr }, // Inst #122 = BLRF_lu10 |
536 | | { 123, 1, 0, 2, 0, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, ImplicitList2, OperandInfo2, -1 ,nullptr }, // Inst #123 = BLRF_u10 |
537 | | { 124, 2, 0, 4, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo33, -1 ,nullptr }, // Inst #124 = BRBF_lru6 |
538 | | { 125, 2, 0, 2, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo33, -1 ,nullptr }, // Inst #125 = BRBF_ru6 |
539 | | { 126, 2, 0, 4, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo33, -1 ,nullptr }, // Inst #126 = BRBT_lru6 |
540 | | { 127, 2, 0, 2, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo33, -1 ,nullptr }, // Inst #127 = BRBT_ru6 |
541 | | { 128, 1, 0, 4, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #128 = BRBU_lu6 |
542 | | { 129, 1, 0, 2, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #129 = BRBU_u6 |
543 | | { 130, 2, 0, 4, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo33, -1 ,nullptr }, // Inst #130 = BRFF_lru6 |
544 | | { 131, 2, 0, 2, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo33, -1 ,nullptr }, // Inst #131 = BRFF_ru6 |
545 | | { 132, 2, 0, 4, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo33, -1 ,nullptr }, // Inst #132 = BRFT_lru6 |
546 | | { 133, 2, 0, 2, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo33, -1 ,nullptr }, // Inst #133 = BRFT_ru6 |
547 | | { 134, 1, 0, 4, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #134 = BRFU_lu6 |
548 | | { 135, 1, 0, 2, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #135 = BRFU_u6 |
549 | | { 136, 1, 0, 2, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo31, -1 ,nullptr }, // Inst #136 = BRU_1r |
550 | | { 137, 2, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo34, -1 ,nullptr }, // Inst #137 = BR_JT |
551 | | { 138, 2, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo34, -1 ,nullptr }, // Inst #138 = BR_JT32 |
552 | | { 139, 2, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr }, // Inst #139 = BYTEREV_l2r |
553 | | { 140, 2, 0, 2, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr }, // Inst #140 = CHKCT_2r |
554 | | { 141, 2, 0, 2, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo35, -1 ,nullptr }, // Inst #141 = CHKCT_rus |
555 | | { 142, 0, 0, 2, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #142 = CLRE_0R |
556 | | { 143, 1, 0, 2, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo31, -1 ,nullptr }, // Inst #143 = CLRPT_1R |
557 | | { 144, 1, 0, 4, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr }, // Inst #144 = CLRSR_branch_lu6 |
558 | | { 145, 1, 0, 2, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr }, // Inst #145 = CLRSR_branch_u6 |
559 | | { 146, 1, 0, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr }, // Inst #146 = CLRSR_lu6 |
560 | | { 147, 1, 0, 2, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr }, // Inst #147 = CLRSR_u6 |
561 | | { 148, 2, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr }, // Inst #148 = CLZ_l2r |
562 | | { 149, 5, 2, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #149 = CRC8_l4r |
563 | | { 150, 4, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #150 = CRC_l3r |
564 | | { 151, 0, 0, 2, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #151 = DCALL_0R |
565 | | { 152, 0, 0, 2, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, ImplicitList1, nullptr, -1 ,nullptr }, // Inst #152 = DENTSP_0R |
566 | | { 153, 1, 1, 2, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo31, -1 ,nullptr }, // Inst #153 = DGETREG_1r |
567 | | { 154, 3, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo29, -1 ,nullptr }, // Inst #154 = DIVS_l3r |
568 | | { 155, 3, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo29, -1 ,nullptr }, // Inst #155 = DIVU_l3r |
569 | | { 156, 0, 0, 2, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, nullptr, -1 ,nullptr }, // Inst #156 = DRESTSP_0R |
570 | | { 157, 0, 0, 2, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #157 = DRET_0R |
571 | | { 158, 1, 0, 2, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo31, -1 ,nullptr }, // Inst #158 = ECALLF_1r |
572 | | { 159, 1, 0, 2, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo31, -1 ,nullptr }, // Inst #159 = ECALLT_1r |
573 | | { 160, 1, 0, 2, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo31, -1 ,nullptr }, // Inst #160 = EDU_1r |
574 | | { 161, 2, 0, 2, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr }, // Inst #161 = EEF_2r |
575 | | { 162, 2, 0, 2, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr }, // Inst #162 = EET_2r |
576 | | { 163, 1, 0, 2, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo31, -1 ,nullptr }, // Inst #163 = EEU_1r |
577 | | { 164, 2, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr }, // Inst #164 = EH_RETURN |
578 | | { 165, 2, 1, 2, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr }, // Inst #165 = ENDIN_2r |
579 | | { 166, 1, 0, 4, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, ImplicitList1, OperandInfo3, -1 ,nullptr }, // Inst #166 = ENTSP_lu6 |
580 | | { 167, 1, 0, 2, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, ImplicitList1, OperandInfo3, -1 ,nullptr }, // Inst #167 = ENTSP_u6 |
581 | | { 168, 3, 1, 2, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo28, -1 ,nullptr }, // Inst #168 = EQ_2rus |
582 | | { 169, 3, 1, 2, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo29, -1 ,nullptr }, // Inst #169 = EQ_3r |
583 | | { 170, 1, 0, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr }, // Inst #170 = EXTDP_lu6 |
584 | | { 171, 1, 0, 2, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr }, // Inst #171 = EXTDP_u6 |
585 | | { 172, 1, 0, 4, 0, 0, 0x0ULL, ImplicitList1, ImplicitList1, OperandInfo3, -1 ,nullptr }, // Inst #172 = EXTSP_lu6 |
586 | | { 173, 1, 0, 2, 0, 0, 0x0ULL, ImplicitList1, ImplicitList1, OperandInfo3, -1 ,nullptr }, // Inst #173 = EXTSP_u6 |
587 | | { 174, 1, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable), 0x0ULL, nullptr, nullptr, OperandInfo31, -1 ,nullptr }, // Inst #174 = FRAME_TO_ARGS_OFFSET |
588 | | { 175, 1, 0, 2, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo31, -1 ,nullptr }, // Inst #175 = FREER_1r |
589 | | { 176, 0, 0, 2, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #176 = FREET_0R |
590 | | { 177, 2, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr }, // Inst #177 = GETD_l2r |
591 | | { 178, 0, 0, 2, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList3, nullptr, -1 ,nullptr }, // Inst #178 = GETED_0R |
592 | | { 179, 0, 0, 2, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList3, nullptr, -1 ,nullptr }, // Inst #179 = GETET_0R |
593 | | { 180, 0, 0, 2, 0, 0, 0x0ULL, nullptr, ImplicitList3, nullptr, -1 ,nullptr }, // Inst #180 = GETID_0R |
594 | | { 181, 0, 0, 2, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList3, nullptr, -1 ,nullptr }, // Inst #181 = GETKEP_0R |
595 | | { 182, 0, 0, 2, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList3, nullptr, -1 ,nullptr }, // Inst #182 = GETKSP_0R |
596 | | { 183, 2, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr }, // Inst #183 = GETN_l2r |
597 | | { 184, 2, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr }, // Inst #184 = GETPS_l2r |
598 | | { 185, 2, 1, 2, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo35, -1 ,nullptr }, // Inst #185 = GETR_rus |
599 | | { 186, 1, 0, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList3, OperandInfo3, -1 ,nullptr }, // Inst #186 = GETSR_lu6 |
600 | | { 187, 1, 0, 2, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList3, OperandInfo3, -1 ,nullptr }, // Inst #187 = GETSR_u6 |
601 | | { 188, 2, 1, 2, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr }, // Inst #188 = GETST_2r |
602 | | { 189, 2, 1, 2, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr }, // Inst #189 = GETTS_2r |
603 | | { 190, 2, 1, 2, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr }, // Inst #190 = INCT_2r |
604 | | { 191, 2, 0, 2, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr }, // Inst #191 = INITCP_2r |
605 | | { 192, 2, 0, 2, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr }, // Inst #192 = INITDP_2r |
606 | | { 193, 2, 0, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr }, // Inst #193 = INITLR_l2r |
607 | | { 194, 2, 0, 2, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr }, // Inst #194 = INITPC_2r |
608 | | { 195, 2, 0, 2, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr }, // Inst #195 = INITSP_2r |
609 | | { 196, 3, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo28, -1 ,nullptr }, // Inst #196 = INPW_l2rus |
610 | | { 197, 3, 1, 2, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo30, -1 ,nullptr }, // Inst #197 = INSHR_2r |
611 | | { 198, 2, 1, 2, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr }, // Inst #198 = INT_2r |
612 | | { 199, 2, 1, 2, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr }, // Inst #199 = IN_2r |
613 | | { 200, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #200 = Int_MemBarrier |
614 | | { 201, 1, 0, 2, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo31, -1 ,nullptr }, // Inst #201 = KCALL_1r |
615 | | { 202, 1, 0, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr }, // Inst #202 = KCALL_lu6 |
616 | | { 203, 1, 0, 2, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr }, // Inst #203 = KCALL_u6 |
617 | | { 204, 1, 0, 4, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, ImplicitList1, OperandInfo3, -1 ,nullptr }, // Inst #204 = KENTSP_lu6 |
618 | | { 205, 1, 0, 2, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, ImplicitList1, OperandInfo3, -1 ,nullptr }, // Inst #205 = KENTSP_u6 |
619 | | { 206, 1, 0, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, ImplicitList1, OperandInfo3, -1 ,nullptr }, // Inst #206 = KRESTSP_lu6 |
620 | | { 207, 1, 0, 2, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, ImplicitList1, OperandInfo3, -1 ,nullptr }, // Inst #207 = KRESTSP_u6 |
621 | | { 208, 0, 0, 2, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, nullptr, -1 ,nullptr }, // Inst #208 = KRET_0R |
622 | | { 209, 5, 2, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #209 = LADD_l5r |
623 | | { 210, 3, 1, 2, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo29, -1 ,nullptr }, // Inst #210 = LD16S_3r |
624 | | { 211, 3, 1, 2, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo29, -1 ,nullptr }, // Inst #211 = LD8U_3r |
625 | | { 212, 3, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo29, -1 ,nullptr }, // Inst #212 = LDA16B_l3r |
626 | | { 213, 3, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo29, -1 ,nullptr }, // Inst #213 = LDA16F_l3r |
627 | | { 214, 1, 0, 4, 0, 0|(1ULL<<MCID::Rematerializable), 0x0ULL, nullptr, ImplicitList3, OperandInfo2, -1 ,nullptr }, // Inst #214 = LDAPB_lu10 |
628 | | { 215, 1, 0, 2, 0, 0|(1ULL<<MCID::Rematerializable), 0x0ULL, nullptr, ImplicitList3, OperandInfo2, -1 ,nullptr }, // Inst #215 = LDAPB_u10 |
629 | | { 216, 1, 0, 4, 0, 0|(1ULL<<MCID::Rematerializable), 0x0ULL, nullptr, ImplicitList3, OperandInfo2, -1 ,nullptr }, // Inst #216 = LDAPF_lu10 |
630 | | { 217, 1, 0, 4, 0, 0|(1ULL<<MCID::Rematerializable), 0x0ULL, nullptr, ImplicitList3, OperandInfo2, -1 ,nullptr }, // Inst #217 = LDAPF_lu10_ba |
631 | | { 218, 1, 0, 2, 0, 0|(1ULL<<MCID::Rematerializable), 0x0ULL, nullptr, ImplicitList3, OperandInfo2, -1 ,nullptr }, // Inst #218 = LDAPF_u10 |
632 | | { 219, 3, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo28, -1 ,nullptr }, // Inst #219 = LDAWB_l2rus |
633 | | { 220, 3, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo29, -1 ,nullptr }, // Inst #220 = LDAWB_l3r |
634 | | { 221, 1, 0, 4, 0, 0|(1ULL<<MCID::Rematerializable), 0x0ULL, nullptr, ImplicitList3, OperandInfo3, -1 ,nullptr }, // Inst #221 = LDAWCP_lu6 |
635 | | { 222, 1, 0, 2, 0, 0|(1ULL<<MCID::Rematerializable), 0x0ULL, nullptr, ImplicitList3, OperandInfo3, -1 ,nullptr }, // Inst #222 = LDAWCP_u6 |
636 | | { 223, 2, 1, 4, 0, 0|(1ULL<<MCID::Rematerializable), 0x0ULL, nullptr, nullptr, OperandInfo39, -1 ,nullptr }, // Inst #223 = LDAWDP_lru6 |
637 | | { 224, 2, 1, 2, 0, 0|(1ULL<<MCID::Rematerializable), 0x0ULL, nullptr, nullptr, OperandInfo39, -1 ,nullptr }, // Inst #224 = LDAWDP_ru6 |
638 | | { 225, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #225 = LDAWFI |
639 | | { 226, 3, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo28, -1 ,nullptr }, // Inst #226 = LDAWF_l2rus |
640 | | { 227, 3, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo29, -1 ,nullptr }, // Inst #227 = LDAWF_l3r |
641 | | { 228, 2, 1, 4, 0, 0, 0x0ULL, ImplicitList1, nullptr, OperandInfo39, -1 ,nullptr }, // Inst #228 = LDAWSP_lru6 |
642 | | { 229, 2, 1, 2, 0, 0, 0x0ULL, ImplicitList1, nullptr, OperandInfo39, -1 ,nullptr }, // Inst #229 = LDAWSP_ru6 |
643 | | { 230, 2, 1, 4, 0, 0|(1ULL<<MCID::Rematerializable), 0x0ULL, nullptr, nullptr, OperandInfo39, -1 ,nullptr }, // Inst #230 = LDC_lru6 |
644 | | { 231, 2, 1, 2, 0, 0|(1ULL<<MCID::Rematerializable), 0x0ULL, nullptr, nullptr, OperandInfo39, -1 ,nullptr }, // Inst #231 = LDC_ru6 |
645 | | { 232, 0, 0, 2, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, nullptr, nullptr, -1 ,nullptr }, // Inst #232 = LDET_0R |
646 | | { 233, 5, 2, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #233 = LDIVU_l5r |
647 | | { 234, 0, 0, 2, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, nullptr, nullptr, -1 ,nullptr }, // Inst #234 = LDSED_0R |
648 | | { 235, 0, 0, 2, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, nullptr, nullptr, -1 ,nullptr }, // Inst #235 = LDSPC_0R |
649 | | { 236, 0, 0, 2, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, nullptr, nullptr, -1 ,nullptr }, // Inst #236 = LDSSR_0R |
650 | | { 237, 2, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x0ULL, nullptr, nullptr, OperandInfo39, -1 ,nullptr }, // Inst #237 = LDWCP_lru6 |
651 | | { 238, 1, 0, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x0ULL, nullptr, ImplicitList3, OperandInfo3, -1 ,nullptr }, // Inst #238 = LDWCP_lu10 |
652 | | { 239, 2, 1, 2, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x0ULL, nullptr, nullptr, OperandInfo39, -1 ,nullptr }, // Inst #239 = LDWCP_ru6 |
653 | | { 240, 1, 0, 2, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x0ULL, nullptr, ImplicitList3, OperandInfo3, -1 ,nullptr }, // Inst #240 = LDWCP_u10 |
654 | | { 241, 2, 1, 4, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo39, -1 ,nullptr }, // Inst #241 = LDWDP_lru6 |
655 | | { 242, 2, 1, 2, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo39, -1 ,nullptr }, // Inst #242 = LDWDP_ru6 |
656 | | { 243, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #243 = LDWFI |
657 | | { 244, 2, 1, 4, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL, ImplicitList1, nullptr, OperandInfo39, -1 ,nullptr }, // Inst #244 = LDWSP_lru6 |
658 | | { 245, 2, 1, 2, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL, ImplicitList1, nullptr, OperandInfo39, -1 ,nullptr }, // Inst #245 = LDWSP_ru6 |
659 | | { 246, 3, 1, 2, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo28, -1 ,nullptr }, // Inst #246 = LDW_2rus |
660 | | { 247, 3, 1, 2, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo29, -1 ,nullptr }, // Inst #247 = LDW_3r |
661 | | { 248, 6, 2, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo41, -1 ,nullptr }, // Inst #248 = LMUL_l6r |
662 | | { 249, 3, 1, 2, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo29, -1 ,nullptr }, // Inst #249 = LSS_3r |
663 | | { 250, 5, 2, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #250 = LSUB_l5r |
664 | | { 251, 3, 1, 2, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo29, -1 ,nullptr }, // Inst #251 = LSU_3r |
665 | | { 252, 6, 2, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo42, -1 ,nullptr }, // Inst #252 = MACCS_l4r |
666 | | { 253, 6, 2, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo42, -1 ,nullptr }, // Inst #253 = MACCU_l4r |
667 | | { 254, 1, 0, 2, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo31, -1 ,nullptr }, // Inst #254 = MJOIN_1r |
668 | | { 255, 2, 1, 2, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr }, // Inst #255 = MKMSK_2r |
669 | | { 256, 2, 1, 2, 0, 0|(1ULL<<MCID::Rematerializable), 0x0ULL, nullptr, nullptr, OperandInfo35, -1 ,nullptr }, // Inst #256 = MKMSK_rus |
670 | | { 257, 1, 0, 2, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo31, -1 ,nullptr }, // Inst #257 = MSYNC_1r |
671 | | { 258, 3, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo29, -1 ,nullptr }, // Inst #258 = MUL_l3r |
672 | | { 259, 2, 1, 2, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr }, // Inst #259 = NEG |
673 | | { 260, 2, 1, 2, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr }, // Inst #260 = NOT |
674 | | { 261, 3, 1, 2, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo29, -1 ,nullptr }, // Inst #261 = OR_3r |
675 | | { 262, 2, 0, 2, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr }, // Inst #262 = OUTCT_2r |
676 | | { 263, 2, 0, 2, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo35, -1 ,nullptr }, // Inst #263 = OUTCT_rus |
677 | | { 264, 3, 0, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo28, -1 ,nullptr }, // Inst #264 = OUTPW_l2rus |
678 | | { 265, 3, 1, 2, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo30, -1 ,nullptr }, // Inst #265 = OUTSHR_2r |
679 | | { 266, 2, 0, 2, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr }, // Inst #266 = OUTT_2r |
680 | | { 267, 2, 0, 2, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr }, // Inst #267 = OUT_2r |
681 | | { 268, 2, 1, 2, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr }, // Inst #268 = PEEK_2r |
682 | | { 269, 3, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo29, -1 ,nullptr }, // Inst #269 = REMS_l3r |
683 | | { 270, 3, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo29, -1 ,nullptr }, // Inst #270 = REMU_l3r |
684 | | { 271, 1, 0, 4, 0, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, ImplicitList1, OperandInfo3, -1 ,nullptr }, // Inst #271 = RETSP_lu6 |
685 | | { 272, 1, 0, 2, 0, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, ImplicitList1, OperandInfo3, -1 ,nullptr }, // Inst #272 = RETSP_u6 |
686 | | { 273, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #273 = SELECT_CC |
687 | | { 274, 2, 0, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr }, // Inst #274 = SETCLK_l2r |
688 | | { 275, 1, 0, 2, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo31, -1 ,nullptr }, // Inst #275 = SETCP_1r |
689 | | { 276, 2, 0, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr }, // Inst #276 = SETC_l2r |
690 | | { 277, 2, 0, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo35, -1 ,nullptr }, // Inst #277 = SETC_lru6 |
691 | | { 278, 2, 0, 2, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo35, -1 ,nullptr }, // Inst #278 = SETC_ru6 |
692 | | { 279, 1, 0, 2, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo31, -1 ,nullptr }, // Inst #279 = SETDP_1r |
693 | | { 280, 2, 0, 2, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr }, // Inst #280 = SETD_2r |
694 | | { 281, 1, 0, 2, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList3, nullptr, OperandInfo31, -1 ,nullptr }, // Inst #281 = SETEV_1r |
695 | | { 282, 0, 0, 2, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList3, nullptr, nullptr, -1 ,nullptr }, // Inst #282 = SETKEP_0R |
696 | | { 283, 2, 0, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr }, // Inst #283 = SETN_l2r |
697 | | { 284, 2, 0, 2, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr }, // Inst #284 = SETPSC_2r |
698 | | { 285, 2, 0, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr }, // Inst #285 = SETPS_l2r |
699 | | { 286, 2, 0, 2, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr }, // Inst #286 = SETPT_2r |
700 | | { 287, 2, 0, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr }, // Inst #287 = SETRDY_l2r |
701 | | { 288, 1, 0, 2, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo31, -1 ,nullptr }, // Inst #288 = SETSP_1r |
702 | | { 289, 1, 0, 4, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr }, // Inst #289 = SETSR_branch_lu6 |
703 | | { 290, 1, 0, 2, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr }, // Inst #290 = SETSR_branch_u6 |
704 | | { 291, 1, 0, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr }, // Inst #291 = SETSR_lu6 |
705 | | { 292, 1, 0, 2, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr }, // Inst #292 = SETSR_u6 |
706 | | { 293, 2, 0, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr }, // Inst #293 = SETTW_l2r |
707 | | { 294, 1, 0, 2, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList3, nullptr, OperandInfo31, -1 ,nullptr }, // Inst #294 = SETV_1r |
708 | | { 295, 3, 1, 2, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo30, -1 ,nullptr }, // Inst #295 = SEXT_2r |
709 | | { 296, 3, 1, 2, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr }, // Inst #296 = SEXT_rus |
710 | | { 297, 3, 1, 2, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo28, -1 ,nullptr }, // Inst #297 = SHL_2rus |
711 | | { 298, 3, 1, 2, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo29, -1 ,nullptr }, // Inst #298 = SHL_3r |
712 | | { 299, 3, 1, 2, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo28, -1 ,nullptr }, // Inst #299 = SHR_2rus |
713 | | { 300, 3, 1, 2, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo29, -1 ,nullptr }, // Inst #300 = SHR_3r |
714 | | { 301, 0, 0, 2, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #301 = SSYNC_0r |
715 | | { 302, 3, 0, 4, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo29, -1 ,nullptr }, // Inst #302 = ST16_l3r |
716 | | { 303, 3, 0, 4, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo29, -1 ,nullptr }, // Inst #303 = ST8_l3r |
717 | | { 304, 0, 0, 2, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, nullptr, nullptr, -1 ,nullptr }, // Inst #304 = STET_0R |
718 | | { 305, 0, 0, 2, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, nullptr, nullptr, -1 ,nullptr }, // Inst #305 = STSED_0R |
719 | | { 306, 0, 0, 2, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, nullptr, nullptr, -1 ,nullptr }, // Inst #306 = STSPC_0R |
720 | | { 307, 0, 0, 2, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, nullptr, nullptr, -1 ,nullptr }, // Inst #307 = STSSR_0R |
721 | | { 308, 2, 0, 4, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo39, -1 ,nullptr }, // Inst #308 = STWDP_lru6 |
722 | | { 309, 2, 0, 2, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo39, -1 ,nullptr }, // Inst #309 = STWDP_ru6 |
723 | | { 310, 3, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #310 = STWFI |
724 | | { 311, 2, 0, 4, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList1, nullptr, OperandInfo39, -1 ,nullptr }, // Inst #311 = STWSP_lru6 |
725 | | { 312, 2, 0, 2, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList1, nullptr, OperandInfo39, -1 ,nullptr }, // Inst #312 = STWSP_ru6 |
726 | | { 313, 3, 0, 2, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo28, -1 ,nullptr }, // Inst #313 = STW_2rus |
727 | | { 314, 3, 0, 4, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo29, -1 ,nullptr }, // Inst #314 = STW_l3r |
728 | | { 315, 3, 1, 2, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo28, -1 ,nullptr }, // Inst #315 = SUB_2rus |
729 | | { 316, 3, 1, 2, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo29, -1 ,nullptr }, // Inst #316 = SUB_3r |
730 | | { 317, 1, 0, 2, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo31, -1 ,nullptr }, // Inst #317 = SYNCR_1r |
731 | | { 318, 2, 1, 2, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr }, // Inst #318 = TESTCT_2r |
732 | | { 319, 2, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr }, // Inst #319 = TESTLCL_l2r |
733 | | { 320, 2, 1, 2, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr }, // Inst #320 = TESTWCT_2r |
734 | | { 321, 2, 0, 2, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo45, -1 ,nullptr }, // Inst #321 = TSETMR_2r |
735 | | { 322, 3, 0, 2, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr }, // Inst #322 = TSETR_3r |
736 | | { 323, 1, 0, 2, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo31, -1 ,nullptr }, // Inst #323 = TSTART_1R |
737 | | { 324, 1, 0, 2, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo31, -1 ,nullptr }, // Inst #324 = WAITEF_1R |
738 | | { 325, 1, 0, 2, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo31, -1 ,nullptr }, // Inst #325 = WAITET_1R |
739 | | { 326, 0, 0, 2, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #326 = WAITEU_0R |
740 | | { 327, 3, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo29, -1 ,nullptr }, // Inst #327 = XOR_l3r |
741 | | { 328, 3, 1, 2, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo30, -1 ,nullptr }, // Inst #328 = ZEXT_2r |
742 | | { 329, 3, 1, 2, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr }, // Inst #329 = ZEXT_rus |
743 | | }; |
744 | | |
745 | | extern const char XCoreInstrNameData[] = { |
746 | | /* 0 */ 'L', 'D', 'A', 'P', 'B', '_', 'u', '1', '0', 0, |
747 | | /* 10 */ 'B', 'L', 'R', 'B', '_', 'u', '1', '0', 0, |
748 | | /* 19 */ 'L', 'D', 'A', 'P', 'F', '_', 'u', '1', '0', 0, |
749 | | /* 29 */ 'B', 'L', 'R', 'F', '_', 'u', '1', '0', 0, |
750 | | /* 38 */ 'B', 'L', 'A', 'C', 'P', '_', 'u', '1', '0', 0, |
751 | | /* 48 */ 'L', 'D', 'W', 'C', 'P', '_', 'u', '1', '0', 0, |
752 | | /* 58 */ 'L', 'D', 'A', 'P', 'B', '_', 'l', 'u', '1', '0', 0, |
753 | | /* 69 */ 'B', 'L', 'R', 'B', '_', 'l', 'u', '1', '0', 0, |
754 | | /* 79 */ 'L', 'D', 'A', 'P', 'F', '_', 'l', 'u', '1', '0', 0, |
755 | | /* 90 */ 'B', 'L', 'R', 'F', '_', 'l', 'u', '1', '0', 0, |
756 | | /* 100 */ 'B', 'L', 'A', 'C', 'P', '_', 'l', 'u', '1', '0', 0, |
757 | | /* 111 */ 'L', 'D', 'W', 'C', 'P', '_', 'l', 'u', '1', '0', 0, |
758 | | /* 122 */ 'B', 'R', '_', 'J', 'T', '3', '2', 0, |
759 | | /* 130 */ 'G', '_', 'F', 'L', 'O', 'G', '2', 0, |
760 | | /* 138 */ 'G', '_', 'F', 'E', 'X', 'P', '2', 0, |
761 | | /* 146 */ 'K', 'C', 'A', 'L', 'L', '_', 'u', '6', 0, |
762 | | /* 155 */ 'L', 'D', 'A', 'W', 'C', 'P', '_', 'u', '6', 0, |
763 | | /* 165 */ 'E', 'X', 'T', 'D', 'P', '_', 'u', '6', 0, |
764 | | /* 174 */ 'R', 'E', 'T', 'S', 'P', '_', 'u', '6', 0, |
765 | | /* 183 */ 'K', 'E', 'N', 'T', 'S', 'P', '_', 'u', '6', 0, |
766 | | /* 193 */ 'K', 'R', 'E', 'S', 'T', 'S', 'P', '_', 'u', '6', 0, |
767 | | /* 204 */ 'E', 'X', 'T', 'S', 'P', '_', 'u', '6', 0, |
768 | | /* 213 */ 'C', 'L', 'R', 'S', 'R', '_', 'u', '6', 0, |
769 | | /* 222 */ 'G', 'E', 'T', 'S', 'R', '_', 'u', '6', 0, |
770 | | /* 231 */ 'S', 'E', 'T', 'S', 'R', '_', 'u', '6', 0, |
771 | | /* 240 */ 'B', 'L', 'A', 'T', '_', 'u', '6', 0, |
772 | | /* 248 */ 'B', 'R', 'B', 'U', '_', 'u', '6', 0, |
773 | | /* 256 */ 'B', 'R', 'F', 'U', '_', 'u', '6', 0, |
774 | | /* 264 */ 'C', 'L', 'R', 'S', 'R', '_', 'b', 'r', 'a', 'n', 'c', 'h', '_', 'u', '6', 0, |
775 | | /* 280 */ 'S', 'E', 'T', 'S', 'R', '_', 'b', 'r', 'a', 'n', 'c', 'h', '_', 'u', '6', 0, |
776 | | /* 296 */ 'K', 'C', 'A', 'L', 'L', '_', 'l', 'u', '6', 0, |
777 | | /* 306 */ 'L', 'D', 'A', 'W', 'C', 'P', '_', 'l', 'u', '6', 0, |
778 | | /* 317 */ 'E', 'X', 'T', 'D', 'P', '_', 'l', 'u', '6', 0, |
779 | | /* 327 */ 'R', 'E', 'T', 'S', 'P', '_', 'l', 'u', '6', 0, |
780 | | /* 337 */ 'K', 'E', 'N', 'T', 'S', 'P', '_', 'l', 'u', '6', 0, |
781 | | /* 348 */ 'K', 'R', 'E', 'S', 'T', 'S', 'P', '_', 'l', 'u', '6', 0, |
782 | | /* 360 */ 'E', 'X', 'T', 'S', 'P', '_', 'l', 'u', '6', 0, |
783 | | /* 370 */ 'C', 'L', 'R', 'S', 'R', '_', 'l', 'u', '6', 0, |
784 | | /* 380 */ 'G', 'E', 'T', 'S', 'R', '_', 'l', 'u', '6', 0, |
785 | | /* 390 */ 'S', 'E', 'T', 'S', 'R', '_', 'l', 'u', '6', 0, |
786 | | /* 400 */ 'B', 'L', 'A', 'T', '_', 'l', 'u', '6', 0, |
787 | | /* 409 */ 'B', 'R', 'B', 'U', '_', 'l', 'u', '6', 0, |
788 | | /* 418 */ 'B', 'R', 'F', 'U', '_', 'l', 'u', '6', 0, |
789 | | /* 427 */ 'C', 'L', 'R', 'S', 'R', '_', 'b', 'r', 'a', 'n', 'c', 'h', '_', 'l', 'u', '6', 0, |
790 | | /* 444 */ 'S', 'E', 'T', 'S', 'R', '_', 'b', 'r', 'a', 'n', 'c', 'h', '_', 'l', 'u', '6', 0, |
791 | | /* 461 */ 'L', 'D', 'C', '_', 'r', 'u', '6', 0, |
792 | | /* 469 */ 'S', 'E', 'T', 'C', '_', 'r', 'u', '6', 0, |
793 | | /* 478 */ 'B', 'R', 'B', 'F', '_', 'r', 'u', '6', 0, |
794 | | /* 487 */ 'B', 'R', 'F', 'F', '_', 'r', 'u', '6', 0, |
795 | | /* 496 */ 'L', 'D', 'W', 'C', 'P', '_', 'r', 'u', '6', 0, |
796 | | /* 506 */ 'L', 'D', 'A', 'W', 'D', 'P', '_', 'r', 'u', '6', 0, |
797 | | /* 517 */ 'L', 'D', 'W', 'D', 'P', '_', 'r', 'u', '6', 0, |
798 | | /* 527 */ 'S', 'T', 'W', 'D', 'P', '_', 'r', 'u', '6', 0, |
799 | | /* 537 */ 'L', 'D', 'A', 'W', 'S', 'P', '_', 'r', 'u', '6', 0, |
800 | | /* 548 */ 'L', 'D', 'W', 'S', 'P', '_', 'r', 'u', '6', 0, |
801 | | /* 558 */ 'S', 'T', 'W', 'S', 'P', '_', 'r', 'u', '6', 0, |
802 | | /* 568 */ 'B', 'R', 'B', 'T', '_', 'r', 'u', '6', 0, |
803 | | /* 577 */ 'B', 'R', 'F', 'T', '_', 'r', 'u', '6', 0, |
804 | | /* 586 */ 'L', 'D', 'C', '_', 'l', 'r', 'u', '6', 0, |
805 | | /* 595 */ 'S', 'E', 'T', 'C', '_', 'l', 'r', 'u', '6', 0, |
806 | | /* 605 */ 'B', 'R', 'B', 'F', '_', 'l', 'r', 'u', '6', 0, |
807 | | /* 615 */ 'B', 'R', 'F', 'F', '_', 'l', 'r', 'u', '6', 0, |
808 | | /* 625 */ 'L', 'D', 'W', 'C', 'P', '_', 'l', 'r', 'u', '6', 0, |
809 | | /* 636 */ 'L', 'D', 'A', 'W', 'D', 'P', '_', 'l', 'r', 'u', '6', 0, |
810 | | /* 648 */ 'L', 'D', 'W', 'D', 'P', '_', 'l', 'r', 'u', '6', 0, |
811 | | /* 659 */ 'S', 'T', 'W', 'D', 'P', '_', 'l', 'r', 'u', '6', 0, |
812 | | /* 670 */ 'L', 'D', 'A', 'W', 'S', 'P', '_', 'l', 'r', 'u', '6', 0, |
813 | | /* 682 */ 'L', 'D', 'W', 'S', 'P', '_', 'l', 'r', 'u', '6', 0, |
814 | | /* 693 */ 'S', 'T', 'W', 'S', 'P', '_', 'l', 'r', 'u', '6', 0, |
815 | | /* 704 */ 'B', 'R', 'B', 'T', '_', 'l', 'r', 'u', '6', 0, |
816 | | /* 714 */ 'B', 'R', 'F', 'T', '_', 'l', 'r', 'u', '6', 0, |
817 | | /* 724 */ 'G', '_', 'F', 'M', 'A', 0, |
818 | | /* 730 */ 'G', '_', 'F', 'S', 'U', 'B', 0, |
819 | | /* 737 */ 'G', '_', 'S', 'U', 'B', 0, |
820 | | /* 743 */ 'S', 'E', 'L', 'E', 'C', 'T', '_', 'C', 'C', 0, |
821 | | /* 753 */ 'G', '_', 'I', 'N', 'T', 'R', 'I', 'N', 'S', 'I', 'C', 0, |
822 | | /* 765 */ 'G', '_', 'F', 'P', 'T', 'R', 'U', 'N', 'C', 0, |
823 | | /* 775 */ 'G', '_', 'T', 'R', 'U', 'N', 'C', 0, |
824 | | /* 783 */ 'G', '_', 'L', 'O', 'A', 'D', 0, |
825 | | /* 790 */ 'G', '_', 'F', 'A', 'D', 'D', 0, |
826 | | /* 797 */ 'G', '_', 'A', 'D', 'D', 0, |
827 | | /* 803 */ 'G', '_', 'A', 'N', 'D', 0, |
828 | | /* 809 */ 'L', 'I', 'F', 'E', 'T', 'I', 'M', 'E', '_', 'E', 'N', 'D', 0, |
829 | | /* 822 */ 'G', '_', 'B', 'R', 'C', 'O', 'N', 'D', 0, |
830 | | /* 831 */ 'L', 'O', 'A', 'D', '_', 'S', 'T', 'A', 'C', 'K', '_', 'G', 'U', 'A', 'R', 'D', 0, |
831 | | /* 848 */ 'G', '_', 'U', 'S', 'U', 'B', 'E', 0, |
832 | | /* 856 */ 'R', 'E', 'G', '_', 'S', 'E', 'Q', 'U', 'E', 'N', 'C', 'E', 0, |
833 | | /* 869 */ 'G', '_', 'U', 'A', 'D', 'D', 'E', 0, |
834 | | /* 877 */ 'B', 'U', 'N', 'D', 'L', 'E', 0, |
835 | | /* 884 */ 'L', 'O', 'C', 'A', 'L', '_', 'E', 'S', 'C', 'A', 'P', 'E', 0, |
836 | | /* 897 */ 'G', '_', 'S', 'T', 'O', 'R', 'E', 0, |
837 | | /* 905 */ 'D', 'B', 'G', '_', 'V', 'A', 'L', 'U', 'E', 0, |
838 | | /* 915 */ 'G', '_', 'G', 'L', 'O', 'B', 'A', 'L', '_', 'V', 'A', 'L', 'U', 'E', 0, |
839 | | /* 930 */ 'G', '_', 'I', 'M', 'P', 'L', 'I', 'C', 'I', 'T', '_', 'D', 'E', 'F', 0, |
840 | | /* 945 */ 'G', '_', 'F', 'N', 'E', 'G', 0, |
841 | | /* 952 */ 'E', 'X', 'T', 'R', 'A', 'C', 'T', '_', 'S', 'U', 'B', 'R', 'E', 'G', 0, |
842 | | /* 967 */ 'I', 'N', 'S', 'E', 'R', 'T', '_', 'S', 'U', 'B', 'R', 'E', 'G', 0, |
843 | | /* 981 */ 'S', 'U', 'B', 'R', 'E', 'G', '_', 'T', 'O', '_', 'R', 'E', 'G', 0, |
844 | | /* 995 */ 'G', '_', 'F', 'L', 'O', 'G', 0, |
845 | | /* 1002 */ 'G', '_', 'V', 'A', 'A', 'R', 'G', 0, |
846 | | /* 1010 */ 'G', '_', 'S', 'M', 'U', 'L', 'H', 0, |
847 | | /* 1018 */ 'G', '_', 'U', 'M', 'U', 'L', 'H', 0, |
848 | | /* 1026 */ 'L', 'D', 'A', 'W', 'F', 'I', 0, |
849 | | /* 1033 */ 'L', 'D', 'W', 'F', 'I', 0, |
850 | | /* 1039 */ 'S', 'T', 'W', 'F', 'I', 0, |
851 | | /* 1045 */ 'G', '_', 'P', 'H', 'I', 0, |
852 | | /* 1051 */ 'G', '_', 'F', 'P', 'T', 'O', 'S', 'I', 0, |
853 | | /* 1060 */ 'G', '_', 'F', 'P', 'T', 'O', 'U', 'I', 0, |
854 | | /* 1069 */ 'G', '_', 'P', 'T', 'R', '_', 'M', 'A', 'S', 'K', 0, |
855 | | /* 1080 */ 'G', 'C', '_', 'L', 'A', 'B', 'E', 'L', 0, |
856 | | /* 1089 */ 'E', 'H', '_', 'L', 'A', 'B', 'E', 'L', 0, |
857 | | /* 1098 */ 'A', 'N', 'N', 'O', 'T', 'A', 'T', 'I', 'O', 'N', '_', 'L', 'A', 'B', 'E', 'L', 0, |
858 | | /* 1115 */ 'G', '_', 'S', 'H', 'L', 0, |
859 | | /* 1121 */ 'P', 'A', 'T', 'C', 'H', 'A', 'B', 'L', 'E', '_', 'T', 'A', 'I', 'L', '_', 'C', 'A', 'L', 'L', 0, |
860 | | /* 1141 */ 'P', 'A', 'T', 'C', 'H', 'A', 'B', 'L', 'E', '_', 'E', 'V', 'E', 'N', 'T', '_', 'C', 'A', 'L', 'L', 0, |
861 | | /* 1162 */ 'F', 'E', 'N', 'T', 'R', 'Y', '_', 'C', 'A', 'L', 'L', 0, |
862 | | /* 1174 */ 'K', 'I', 'L', 'L', 0, |
863 | | /* 1179 */ 'G', '_', 'F', 'M', 'U', 'L', 0, |
864 | | /* 1186 */ 'G', '_', 'M', 'U', 'L', 0, |
865 | | /* 1192 */ 'G', '_', 'F', 'R', 'E', 'M', 0, |
866 | | /* 1199 */ 'G', '_', 'S', 'R', 'E', 'M', 0, |
867 | | /* 1206 */ 'G', '_', 'U', 'R', 'E', 'M', 0, |
868 | | /* 1213 */ 'I', 'N', 'L', 'I', 'N', 'E', 'A', 'S', 'M', 0, |
869 | | /* 1223 */ 'C', 'F', 'I', '_', 'I', 'N', 'S', 'T', 'R', 'U', 'C', 'T', 'I', 'O', 'N', 0, |
870 | | /* 1239 */ 'E', 'H', '_', 'R', 'E', 'T', 'U', 'R', 'N', 0, |
871 | | /* 1249 */ 'A', 'D', 'J', 'C', 'A', 'L', 'L', 'S', 'T', 'A', 'C', 'K', 'D', 'O', 'W', 'N', 0, |
872 | | /* 1266 */ 'G', '_', 'S', 'S', 'U', 'B', 'O', 0, |
873 | | /* 1274 */ 'G', '_', 'S', 'A', 'D', 'D', 'O', 0, |
874 | | /* 1282 */ 'G', '_', 'S', 'M', 'U', 'L', 'O', 0, |
875 | | /* 1290 */ 'G', '_', 'U', 'M', 'U', 'L', 'O', 0, |
876 | | /* 1298 */ 'S', 'T', 'A', 'C', 'K', 'M', 'A', 'P', 0, |
877 | | /* 1307 */ 'G', '_', 'B', 'S', 'W', 'A', 'P', 0, |
878 | | /* 1315 */ 'G', '_', 'G', 'E', 'P', 0, |
879 | | /* 1321 */ 'G', '_', 'S', 'I', 'T', 'O', 'F', 'P', 0, |
880 | | /* 1330 */ 'G', '_', 'U', 'I', 'T', 'O', 'F', 'P', 0, |
881 | | /* 1339 */ 'G', '_', 'F', 'C', 'M', 'P', 0, |
882 | | /* 1346 */ 'G', '_', 'I', 'C', 'M', 'P', 0, |
883 | | /* 1353 */ 'P', 'A', 'T', 'C', 'H', 'A', 'B', 'L', 'E', '_', 'O', 'P', 0, |
884 | | /* 1366 */ 'F', 'A', 'U', 'L', 'T', 'I', 'N', 'G', '_', 'O', 'P', 0, |
885 | | /* 1378 */ 'A', 'D', 'J', 'C', 'A', 'L', 'L', 'S', 'T', 'A', 'C', 'K', 'U', 'P', 0, |
886 | | /* 1393 */ 'G', '_', 'F', 'E', 'X', 'P', 0, |
887 | | /* 1400 */ 'L', 'D', 'S', 'P', 'C', '_', '0', 'R', 0, |
888 | | /* 1409 */ 'S', 'T', 'S', 'P', 'C', '_', '0', 'R', 0, |
889 | | /* 1418 */ 'L', 'D', 'S', 'E', 'D', '_', '0', 'R', 0, |
890 | | /* 1427 */ 'S', 'T', 'S', 'E', 'D', '_', '0', 'R', 0, |
891 | | /* 1436 */ 'G', 'E', 'T', 'E', 'D', '_', '0', 'R', 0, |
892 | | /* 1445 */ 'G', 'E', 'T', 'I', 'D', '_', '0', 'R', 0, |
893 | | /* 1454 */ 'C', 'L', 'R', 'E', '_', '0', 'R', 0, |
894 | | /* 1462 */ 'D', 'C', 'A', 'L', 'L', '_', '0', 'R', 0, |
895 | | /* 1471 */ 'G', 'E', 'T', 'K', 'E', 'P', '_', '0', 'R', 0, |
896 | | /* 1481 */ 'S', 'E', 'T', 'K', 'E', 'P', '_', '0', 'R', 0, |
897 | | /* 1491 */ 'G', 'E', 'T', 'K', 'S', 'P', '_', '0', 'R', 0, |
898 | | /* 1501 */ 'D', 'E', 'N', 'T', 'S', 'P', '_', '0', 'R', 0, |
899 | | /* 1511 */ 'D', 'R', 'E', 'S', 'T', 'S', 'P', '_', '0', 'R', 0, |
900 | | /* 1522 */ 'L', 'D', 'S', 'S', 'R', '_', '0', 'R', 0, |
901 | | /* 1531 */ 'S', 'T', 'S', 'S', 'R', '_', '0', 'R', 0, |
902 | | /* 1540 */ 'L', 'D', 'E', 'T', '_', '0', 'R', 0, |
903 | | /* 1548 */ 'F', 'R', 'E', 'E', 'T', '_', '0', 'R', 0, |
904 | | /* 1557 */ 'D', 'R', 'E', 'T', '_', '0', 'R', 0, |
905 | | /* 1565 */ 'K', 'R', 'E', 'T', '_', '0', 'R', 0, |
906 | | /* 1573 */ 'G', 'E', 'T', 'E', 'T', '_', '0', 'R', 0, |
907 | | /* 1582 */ 'S', 'T', 'E', 'T', '_', '0', 'R', 0, |
908 | | /* 1590 */ 'W', 'A', 'I', 'T', 'E', 'U', '_', '0', 'R', 0, |
909 | | /* 1600 */ 'W', 'A', 'I', 'T', 'E', 'F', '_', '1', 'R', 0, |
910 | | /* 1610 */ 'W', 'A', 'I', 'T', 'E', 'T', '_', '1', 'R', 0, |
911 | | /* 1620 */ 'C', 'L', 'R', 'P', 'T', '_', '1', 'R', 0, |
912 | | /* 1629 */ 'T', 'S', 'T', 'A', 'R', 'T', '_', '1', 'R', 0, |
913 | | /* 1639 */ 'G', '_', 'B', 'R', 0, |
914 | | /* 1644 */ 'P', 'A', 'T', 'C', 'H', 'A', 'B', 'L', 'E', '_', 'F', 'U', 'N', 'C', 'T', 'I', 'O', 'N', '_', 'E', 'N', 'T', 'E', 'R', 0, |
915 | | /* 1669 */ 'G', '_', 'A', 'S', 'H', 'R', 0, |
916 | | /* 1676 */ 'G', '_', 'L', 'S', 'H', 'R', 0, |
917 | | /* 1683 */ 'G', '_', 'S', 'H', 'U', 'F', 'F', 'L', 'E', '_', 'V', 'E', 'C', 'T', 'O', 'R', 0, |
918 | | /* 1700 */ 'G', '_', 'X', 'O', 'R', 0, |
919 | | /* 1706 */ 'G', '_', 'O', 'R', 0, |
920 | | /* 1711 */ 'G', '_', 'I', 'N', 'T', 'T', 'O', 'P', 'T', 'R', 0, |
921 | | /* 1722 */ 'G', '_', 'U', 'N', 'M', 'E', 'R', 'G', 'E', '_', 'V', 'A', 'L', 'U', 'E', 'S', 0, |
922 | | /* 1739 */ 'G', '_', 'M', 'E', 'R', 'G', 'E', '_', 'V', 'A', 'L', 'U', 'E', 'S', 0, |
923 | | /* 1754 */ 'C', 'O', 'P', 'Y', '_', 'T', 'O', '_', 'R', 'E', 'G', 'C', 'L', 'A', 'S', 'S', 0, |
924 | | /* 1771 */ 'G', '_', 'I', 'N', 'T', 'R', 'I', 'N', 'S', 'I', 'C', '_', 'W', '_', 'S', 'I', 'D', 'E', '_', 'E', 'F', 'F', 'E', 'C', 'T', 'S', 0, |
925 | | /* 1798 */ 'G', '_', 'E', 'X', 'T', 'R', 'A', 'C', 'T', 0, |
926 | | /* 1808 */ 'G', '_', 'S', 'E', 'L', 'E', 'C', 'T', 0, |
927 | | /* 1817 */ 'G', '_', 'B', 'R', 'I', 'N', 'D', 'I', 'R', 'E', 'C', 'T', 0, |
928 | | /* 1830 */ 'P', 'A', 'T', 'C', 'H', 'A', 'B', 'L', 'E', '_', 'R', 'E', 'T', 0, |
929 | | /* 1844 */ 'F', 'R', 'A', 'M', 'E', '_', 'T', 'O', '_', 'A', 'R', 'G', 'S', '_', 'O', 'F', 'F', 'S', 'E', 'T', 0, |
930 | | /* 1865 */ 'P', 'A', 'T', 'C', 'H', 'A', 'B', 'L', 'E', '_', 'F', 'U', 'N', 'C', 'T', 'I', 'O', 'N', '_', 'E', 'X', 'I', 'T', 0, |
931 | | /* 1889 */ 'B', 'R', '_', 'J', 'T', 0, |
932 | | /* 1895 */ 'G', '_', 'E', 'X', 'T', 'R', 'A', 'C', 'T', '_', 'V', 'E', 'C', 'T', 'O', 'R', '_', 'E', 'L', 'T', 0, |
933 | | /* 1916 */ 'G', '_', 'I', 'N', 'S', 'E', 'R', 'T', '_', 'V', 'E', 'C', 'T', 'O', 'R', '_', 'E', 'L', 'T', 0, |
934 | | /* 1936 */ 'G', '_', 'F', 'C', 'O', 'N', 'S', 'T', 'A', 'N', 'T', 0, |
935 | | /* 1948 */ 'G', '_', 'C', 'O', 'N', 'S', 'T', 'A', 'N', 'T', 0, |
936 | | /* 1959 */ 'S', 'T', 'A', 'T', 'E', 'P', 'O', 'I', 'N', 'T', 0, |
937 | | /* 1970 */ 'P', 'A', 'T', 'C', 'H', 'P', 'O', 'I', 'N', 'T', 0, |
938 | | /* 1981 */ 'G', '_', 'P', 'T', 'R', 'T', 'O', 'I', 'N', 'T', 0, |
939 | | /* 1992 */ 'N', 'O', 'T', 0, |
940 | | /* 1996 */ 'G', '_', 'V', 'A', 'S', 'T', 'A', 'R', 'T', 0, |
941 | | /* 2006 */ 'L', 'I', 'F', 'E', 'T', 'I', 'M', 'E', '_', 'S', 'T', 'A', 'R', 'T', 0, |
942 | | /* 2021 */ 'G', '_', 'I', 'N', 'S', 'E', 'R', 'T', 0, |
943 | | /* 2030 */ 'G', '_', 'B', 'I', 'T', 'C', 'A', 'S', 'T', 0, |
944 | | /* 2040 */ 'G', '_', 'F', 'P', 'E', 'X', 'T', 0, |
945 | | /* 2048 */ 'G', '_', 'S', 'E', 'X', 'T', 0, |
946 | | /* 2055 */ 'G', '_', 'A', 'N', 'Y', 'E', 'X', 'T', 0, |
947 | | /* 2064 */ 'G', '_', 'Z', 'E', 'X', 'T', 0, |
948 | | /* 2071 */ 'G', '_', 'F', 'D', 'I', 'V', 0, |
949 | | /* 2078 */ 'G', '_', 'S', 'D', 'I', 'V', 0, |
950 | | /* 2085 */ 'G', '_', 'U', 'D', 'I', 'V', 0, |
951 | | /* 2092 */ 'G', '_', 'F', 'P', 'O', 'W', 0, |
952 | | /* 2099 */ 'G', '_', 'F', 'R', 'A', 'M', 'E', '_', 'I', 'N', 'D', 'E', 'X', 0, |
953 | | /* 2113 */ 'C', 'O', 'P', 'Y', 0, |
954 | | /* 2118 */ 'L', 'D', 'A', 'P', 'F', '_', 'l', 'u', '1', '0', '_', 'b', 'a', 0, |
955 | | /* 2132 */ 'S', 'S', 'Y', 'N', 'C', '_', '0', 'r', 0, |
956 | | /* 2141 */ 'B', 'L', 'A', '_', '1', 'r', 0, |
957 | | /* 2148 */ 'M', 'S', 'Y', 'N', 'C', '_', '1', 'r', 0, |
958 | | /* 2157 */ 'E', 'C', 'A', 'L', 'L', 'F', '_', '1', 'r', 0, |
959 | | /* 2167 */ 'D', 'G', 'E', 'T', 'R', 'E', 'G', '_', '1', 'r', 0, |
960 | | /* 2178 */ 'K', 'C', 'A', 'L', 'L', '_', '1', 'r', 0, |
961 | | /* 2187 */ 'M', 'J', 'O', 'I', 'N', '_', '1', 'r', 0, |
962 | | /* 2196 */ 'S', 'E', 'T', 'C', 'P', '_', '1', 'r', 0, |
963 | | /* 2205 */ 'S', 'E', 'T', 'D', 'P', '_', '1', 'r', 0, |
964 | | /* 2214 */ 'S', 'E', 'T', 'S', 'P', '_', '1', 'r', 0, |
965 | | /* 2223 */ 'S', 'Y', 'N', 'C', 'R', '_', '1', 'r', 0, |
966 | | /* 2232 */ 'F', 'R', 'E', 'E', 'R', '_', '1', 'r', 0, |
967 | | /* 2241 */ 'E', 'C', 'A', 'L', 'L', 'T', '_', '1', 'r', 0, |
968 | | /* 2251 */ 'B', 'A', 'U', '_', '1', 'r', 0, |
969 | | /* 2258 */ 'E', 'D', 'U', '_', '1', 'r', 0, |
970 | | /* 2265 */ 'E', 'E', 'U', '_', '1', 'r', 0, |
971 | | /* 2272 */ 'B', 'R', 'U', '_', '1', 'r', 0, |
972 | | /* 2279 */ 'S', 'E', 'T', 'E', 'V', '_', '1', 'r', 0, |
973 | | /* 2288 */ 'S', 'E', 'T', 'V', '_', '1', 'r', 0, |
974 | | /* 2296 */ 'I', 'N', 'I', 'T', 'P', 'C', '_', '2', 'r', 0, |
975 | | /* 2306 */ 'S', 'E', 'T', 'P', 'S', 'C', '_', '2', 'r', 0, |
976 | | /* 2316 */ 'S', 'E', 'T', 'D', '_', '2', 'r', 0, |
977 | | /* 2324 */ 'E', 'E', 'F', '_', '2', 'r', 0, |
978 | | /* 2331 */ 'P', 'E', 'E', 'K', '_', '2', 'r', 0, |
979 | | /* 2339 */ 'M', 'K', 'M', 'S', 'K', '_', '2', 'r', 0, |
980 | | /* 2348 */ 'E', 'N', 'D', 'I', 'N', '_', '2', 'r', 0, |
981 | | /* 2357 */ 'I', 'N', 'I', 'T', 'C', 'P', '_', '2', 'r', 0, |
982 | | /* 2367 */ 'I', 'N', 'I', 'T', 'D', 'P', '_', '2', 'r', 0, |
983 | | /* 2377 */ 'I', 'N', 'I', 'T', 'S', 'P', '_', '2', 'r', 0, |
984 | | /* 2387 */ 'I', 'N', 'S', 'H', 'R', '_', '2', 'r', 0, |
985 | | /* 2396 */ 'O', 'U', 'T', 'S', 'H', 'R', '_', '2', 'r', 0, |
986 | | /* 2406 */ 'T', 'S', 'E', 'T', 'M', 'R', '_', '2', 'r', 0, |
987 | | /* 2416 */ 'G', 'E', 'T', 'T', 'S', '_', '2', 'r', 0, |
988 | | /* 2425 */ 'C', 'H', 'K', 'C', 'T', '_', '2', 'r', 0, |
989 | | /* 2434 */ 'I', 'N', 'C', 'T', '_', '2', 'r', 0, |
990 | | /* 2442 */ 'T', 'E', 'S', 'T', 'C', 'T', '_', '2', 'r', 0, |
991 | | /* 2452 */ 'O', 'U', 'T', 'C', 'T', '_', '2', 'r', 0, |
992 | | /* 2461 */ 'T', 'E', 'S', 'T', 'W', 'C', 'T', '_', '2', 'r', 0, |
993 | | /* 2472 */ 'E', 'E', 'T', '_', '2', 'r', 0, |
994 | | /* 2479 */ 'I', 'N', 'T', '_', '2', 'r', 0, |
995 | | /* 2486 */ 'A', 'N', 'D', 'N', 'O', 'T', '_', '2', 'r', 0, |
996 | | /* 2496 */ 'S', 'E', 'T', 'P', 'T', '_', '2', 'r', 0, |
997 | | /* 2505 */ 'G', 'E', 'T', 'S', 'T', '_', '2', 'r', 0, |
998 | | /* 2514 */ 'O', 'U', 'T', 'T', '_', '2', 'r', 0, |
999 | | /* 2522 */ 'O', 'U', 'T', '_', '2', 'r', 0, |
1000 | | /* 2529 */ 'S', 'E', 'X', 'T', '_', '2', 'r', 0, |
1001 | | /* 2537 */ 'Z', 'E', 'X', 'T', '_', '2', 'r', 0, |
1002 | | /* 2545 */ 'S', 'E', 'T', 'C', '_', 'l', '2', 'r', 0, |
1003 | | /* 2554 */ 'G', 'E', 'T', 'D', '_', 'l', '2', 'r', 0, |
1004 | | /* 2563 */ 'S', 'E', 'T', 'C', 'L', 'K', '_', 'l', '2', 'r', 0, |
1005 | | /* 2574 */ 'T', 'E', 'S', 'T', 'L', 'C', 'L', '_', 'l', '2', 'r', 0, |
1006 | | /* 2586 */ 'G', 'E', 'T', 'N', '_', 'l', '2', 'r', 0, |
1007 | | /* 2595 */ 'S', 'E', 'T', 'N', '_', 'l', '2', 'r', 0, |
1008 | | /* 2604 */ 'I', 'N', 'I', 'T', 'L', 'R', '_', 'l', '2', 'r', 0, |
1009 | | /* 2615 */ 'G', 'E', 'T', 'P', 'S', '_', 'l', '2', 'r', 0, |
1010 | | /* 2625 */ 'S', 'E', 'T', 'P', 'S', '_', 'l', '2', 'r', 0, |
1011 | | /* 2635 */ 'B', 'Y', 'T', 'E', 'R', 'E', 'V', '_', 'l', '2', 'r', 0, |
1012 | | /* 2647 */ 'B', 'I', 'T', 'R', 'E', 'V', '_', 'l', '2', 'r', 0, |
1013 | | /* 2658 */ 'S', 'E', 'T', 'T', 'W', '_', 'l', '2', 'r', 0, |
1014 | | /* 2668 */ 'S', 'E', 'T', 'R', 'D', 'Y', '_', 'l', '2', 'r', 0, |
1015 | | /* 2679 */ 'C', 'L', 'Z', '_', 'l', '2', 'r', 0, |
1016 | | /* 2687 */ 'S', 'U', 'B', '_', '3', 'r', 0, |
1017 | | /* 2694 */ 'A', 'D', 'D', '_', '3', 'r', 0, |
1018 | | /* 2701 */ 'A', 'N', 'D', '_', '3', 'r', 0, |
1019 | | /* 2708 */ 'S', 'H', 'L', '_', '3', 'r', 0, |
1020 | | /* 2715 */ 'E', 'Q', '_', '3', 'r', 0, |
1021 | | /* 2721 */ 'S', 'H', 'R', '_', '3', 'r', 0, |
1022 | | /* 2728 */ 'O', 'R', '_', '3', 'r', 0, |
1023 | | /* 2734 */ 'T', 'S', 'E', 'T', 'R', '_', '3', 'r', 0, |
1024 | | /* 2743 */ 'L', 'D', '1', '6', 'S', '_', '3', 'r', 0, |
1025 | | /* 2752 */ 'L', 'S', 'S', '_', '3', 'r', 0, |
1026 | | /* 2759 */ 'L', 'D', '8', 'U', '_', '3', 'r', 0, |
1027 | | /* 2767 */ 'L', 'S', 'U', '_', '3', 'r', 0, |
1028 | | /* 2774 */ 'L', 'D', 'W', '_', '3', 'r', 0, |
1029 | | /* 2781 */ 'S', 'T', '1', '6', '_', 'l', '3', 'r', 0, |
1030 | | /* 2790 */ 'S', 'T', '8', '_', 'l', '3', 'r', 0, |
1031 | | /* 2798 */ 'L', 'D', 'A', '1', '6', 'B', '_', 'l', '3', 'r', 0, |
1032 | | /* 2809 */ 'L', 'D', 'A', 'W', 'B', '_', 'l', '3', 'r', 0, |
1033 | | /* 2819 */ 'C', 'R', 'C', '_', 'l', '3', 'r', 0, |
1034 | | /* 2827 */ 'L', 'D', 'A', '1', '6', 'F', '_', 'l', '3', 'r', 0, |
1035 | | /* 2838 */ 'L', 'D', 'A', 'W', 'F', '_', 'l', '3', 'r', 0, |
1036 | | /* 2848 */ 'M', 'U', 'L', '_', 'l', '3', 'r', 0, |
1037 | | /* 2856 */ 'A', 'S', 'H', 'R', '_', 'l', '3', 'r', 0, |
1038 | | /* 2865 */ 'X', 'O', 'R', '_', 'l', '3', 'r', 0, |
1039 | | /* 2873 */ 'R', 'E', 'M', 'S', '_', 'l', '3', 'r', 0, |
1040 | | /* 2882 */ 'D', 'I', 'V', 'S', '_', 'l', '3', 'r', 0, |
1041 | | /* 2891 */ 'R', 'E', 'M', 'U', '_', 'l', '3', 'r', 0, |
1042 | | /* 2900 */ 'D', 'I', 'V', 'U', '_', 'l', '3', 'r', 0, |
1043 | | /* 2909 */ 'S', 'T', 'W', '_', 'l', '3', 'r', 0, |
1044 | | /* 2917 */ 'C', 'R', 'C', '8', '_', 'l', '4', 'r', 0, |
1045 | | /* 2926 */ 'M', 'A', 'C', 'C', 'S', '_', 'l', '4', 'r', 0, |
1046 | | /* 2936 */ 'M', 'A', 'C', 'C', 'U', '_', 'l', '4', 'r', 0, |
1047 | | /* 2946 */ 'L', 'S', 'U', 'B', '_', 'l', '5', 'r', 0, |
1048 | | /* 2955 */ 'L', 'A', 'D', 'D', '_', 'l', '5', 'r', 0, |
1049 | | /* 2964 */ 'L', 'D', 'I', 'V', 'U', '_', 'l', '5', 'r', 0, |
1050 | | /* 2974 */ 'L', 'M', 'U', 'L', '_', 'l', '6', 'r', 0, |
1051 | | /* 2983 */ 'I', 'n', 't', '_', 'M', 'e', 'm', 'B', 'a', 'r', 'r', 'i', 'e', 'r', 0, |
1052 | | /* 2998 */ 'S', 'U', 'B', '_', '2', 'r', 'u', 's', 0, |
1053 | | /* 3007 */ 'A', 'D', 'D', '_', '2', 'r', 'u', 's', 0, |
1054 | | /* 3016 */ 'S', 'H', 'L', '_', '2', 'r', 'u', 's', 0, |
1055 | | /* 3025 */ 'E', 'Q', '_', '2', 'r', 'u', 's', 0, |
1056 | | /* 3033 */ 'S', 'H', 'R', '_', '2', 'r', 'u', 's', 0, |
1057 | | /* 3042 */ 'L', 'D', 'W', '_', '2', 'r', 'u', 's', 0, |
1058 | | /* 3051 */ 'S', 'T', 'W', '_', '2', 'r', 'u', 's', 0, |
1059 | | /* 3060 */ 'L', 'D', 'A', 'W', 'B', '_', 'l', '2', 'r', 'u', 's', 0, |
1060 | | /* 3072 */ 'L', 'D', 'A', 'W', 'F', '_', 'l', '2', 'r', 'u', 's', 0, |
1061 | | /* 3084 */ 'A', 'S', 'H', 'R', '_', 'l', '2', 'r', 'u', 's', 0, |
1062 | | /* 3095 */ 'I', 'N', 'P', 'W', '_', 'l', '2', 'r', 'u', 's', 0, |
1063 | | /* 3106 */ 'O', 'U', 'T', 'P', 'W', '_', 'l', '2', 'r', 'u', 's', 0, |
1064 | | /* 3118 */ 'M', 'K', 'M', 'S', 'K', '_', 'r', 'u', 's', 0, |
1065 | | /* 3128 */ 'G', 'E', 'T', 'R', '_', 'r', 'u', 's', 0, |
1066 | | /* 3137 */ 'C', 'H', 'K', 'C', 'T', '_', 'r', 'u', 's', 0, |
1067 | | /* 3147 */ 'O', 'U', 'T', 'C', 'T', '_', 'r', 'u', 's', 0, |
1068 | | /* 3157 */ 'S', 'E', 'X', 'T', '_', 'r', 'u', 's', 0, |
1069 | | /* 3166 */ 'Z', 'E', 'X', 'T', '_', 'r', 'u', 's', 0, |
1070 | | }; |
1071 | | |
1072 | | extern const unsigned XCoreInstrNameIndices[] = { |
1073 | | 1047U, 1213U, 1223U, 1089U, 1080U, 1098U, 1174U, 952U, |
1074 | | 967U, 932U, 981U, 1754U, 905U, 856U, 2113U, 877U, |
1075 | | 2006U, 809U, 1298U, 1162U, 1970U, 831U, 1959U, 884U, |
1076 | | 1366U, 1353U, 1644U, 1830U, 1865U, 1121U, 1141U, 797U, |
1077 | | 737U, 1186U, 2078U, 2085U, 1199U, 1206U, 803U, 1706U, |
1078 | | 1700U, 930U, 1045U, 2099U, 915U, 1798U, 1722U, 2021U, |
1079 | | 1739U, 1981U, 1711U, 2030U, 783U, 897U, 822U, 1817U, |
1080 | | 753U, 1771U, 2055U, 775U, 1948U, 1936U, 1996U, 1002U, |
1081 | | 2048U, 2064U, 1115U, 1676U, 1669U, 1346U, 1339U, 1808U, |
1082 | | 869U, 848U, 1274U, 1266U, 1290U, 1282U, 1018U, 1010U, |
1083 | | 790U, 730U, 1179U, 724U, 2071U, 1192U, 2092U, 1393U, |
1084 | | 138U, 995U, 130U, 945U, 2040U, 765U, 1051U, 1060U, |
1085 | | 1321U, 1330U, 1315U, 1069U, 1639U, 1916U, 1895U, 1683U, |
1086 | | 1307U, 3007U, 2694U, 1249U, 1378U, 2486U, 2701U, 3084U, |
1087 | | 2856U, 2251U, 2647U, 100U, 38U, 400U, 240U, 2141U, |
1088 | | 69U, 10U, 90U, 29U, 605U, 478U, 704U, 568U, |
1089 | | 409U, 248U, 615U, 487U, 714U, 577U, 418U, 256U, |
1090 | | 2272U, 1889U, 122U, 2635U, 2425U, 3137U, 1454U, 1620U, |
1091 | | 427U, 264U, 370U, 213U, 2679U, 2917U, 2819U, 1462U, |
1092 | | 1501U, 2167U, 2882U, 2900U, 1511U, 1557U, 2157U, 2241U, |
1093 | | 2258U, 2324U, 2472U, 2265U, 1239U, 2348U, 338U, 184U, |
1094 | | 3025U, 2715U, 317U, 165U, 360U, 204U, 1844U, 2232U, |
1095 | | 1548U, 2554U, 1436U, 1573U, 1445U, 1471U, 1491U, 2586U, |
1096 | | 2615U, 3128U, 380U, 222U, 2505U, 2416U, 2434U, 2357U, |
1097 | | 2367U, 2604U, 2296U, 2377U, 3095U, 2387U, 2479U, 2351U, |
1098 | | 2983U, 2178U, 296U, 146U, 337U, 183U, 348U, 193U, |
1099 | | 1565U, 2955U, 2743U, 2759U, 2798U, 2827U, 58U, 0U, |
1100 | | 79U, 2118U, 19U, 3060U, 2809U, 306U, 155U, 636U, |
1101 | | 506U, 1026U, 3072U, 2838U, 670U, 537U, 586U, 461U, |
1102 | | 1540U, 2964U, 1418U, 1400U, 1522U, 625U, 111U, 496U, |
1103 | | 48U, 648U, 517U, 1033U, 682U, 548U, 3042U, 2774U, |
1104 | | 2974U, 2752U, 2946U, 2767U, 2926U, 2936U, 2187U, 2339U, |
1105 | | 3118U, 2148U, 2848U, 948U, 1992U, 2728U, 2452U, 3147U, |
1106 | | 3106U, 2396U, 2514U, 2522U, 2331U, 2873U, 2891U, 327U, |
1107 | | 174U, 743U, 2563U, 2196U, 2545U, 595U, 469U, 2205U, |
1108 | | 2316U, 2279U, 1481U, 2595U, 2306U, 2625U, 2496U, 2668U, |
1109 | | 2214U, 444U, 280U, 390U, 231U, 2658U, 2288U, 2529U, |
1110 | | 3157U, 3016U, 2708U, 3033U, 2721U, 2132U, 2781U, 2790U, |
1111 | | 1582U, 1427U, 1409U, 1531U, 659U, 527U, 1039U, 693U, |
1112 | | 558U, 3051U, 2909U, 2998U, 2687U, 2223U, 2442U, 2574U, |
1113 | | 2461U, 2406U, 2734U, 1629U, 1600U, 1610U, 1590U, 2865U, |
1114 | | 2537U, 3166U, |
1115 | | }; |
1116 | | |
1117 | 81 | static inline void InitXCoreMCInstrInfo(MCInstrInfo *II) { |
1118 | 81 | II->InitMCInstrInfo(XCoreInsts, XCoreInstrNameIndices, XCoreInstrNameData, 330); |
1119 | 81 | } |
1120 | | |
1121 | | } // end llvm namespace |
1122 | | #endif // GET_INSTRINFO_MC_DESC |
1123 | | |
1124 | | #ifdef GET_INSTRINFO_HEADER |
1125 | | #undef GET_INSTRINFO_HEADER |
1126 | | namespace llvm { |
1127 | | struct XCoreGenInstrInfo : public TargetInstrInfo { |
1128 | | explicit XCoreGenInstrInfo(int CFSetupOpcode = -1, int CFDestroyOpcode = -1, int CatchRetOpcode = -1, int ReturnOpcode = -1); |
1129 | 78 | ~XCoreGenInstrInfo() override = default; |
1130 | | }; |
1131 | | } // end llvm namespace |
1132 | | #endif // GET_INSTRINFO_HEADER |
1133 | | |
1134 | | #ifdef GET_INSTRINFO_CTOR_DTOR |
1135 | | #undef GET_INSTRINFO_CTOR_DTOR |
1136 | | namespace llvm { |
1137 | | extern const MCInstrDesc XCoreInsts[]; |
1138 | | extern const unsigned XCoreInstrNameIndices[]; |
1139 | | extern const char XCoreInstrNameData[]; |
1140 | | XCoreGenInstrInfo::XCoreGenInstrInfo(int CFSetupOpcode, int CFDestroyOpcode, int CatchRetOpcode, int ReturnOpcode) |
1141 | 80 | : TargetInstrInfo(CFSetupOpcode, CFDestroyOpcode, CatchRetOpcode, ReturnOpcode) { |
1142 | 80 | InitMCInstrInfo(XCoreInsts, XCoreInstrNameIndices, XCoreInstrNameData, 330); |
1143 | 80 | } |
1144 | | } // end llvm namespace |
1145 | | #endif // GET_INSTRINFO_CTOR_DTOR |
1146 | | |
1147 | | #ifdef GET_INSTRINFO_OPERAND_ENUM |
1148 | | #undef GET_INSTRINFO_OPERAND_ENUM |
1149 | | namespace llvm { |
1150 | | namespace XCore { |
1151 | | namespace OpName { |
1152 | | enum { |
1153 | | OPERAND_LAST |
1154 | | }; |
1155 | | } // end namespace OpName |
1156 | | } // end namespace XCore |
1157 | | } // end namespace llvm |
1158 | | #endif //GET_INSTRINFO_OPERAND_ENUM |
1159 | | |
1160 | | #ifdef GET_INSTRINFO_NAMED_OPS |
1161 | | #undef GET_INSTRINFO_NAMED_OPS |
1162 | | namespace llvm { |
1163 | | namespace XCore { |
1164 | | LLVM_READONLY |
1165 | | int16_t getNamedOperandIdx(uint16_t Opcode, uint16_t NamedIdx) { |
1166 | | return -1; |
1167 | | } |
1168 | | } // end namespace XCore |
1169 | | } // end namespace llvm |
1170 | | #endif //GET_INSTRINFO_NAMED_OPS |
1171 | | |
1172 | | #ifdef GET_INSTRINFO_OPERAND_TYPES_ENUM |
1173 | | #undef GET_INSTRINFO_OPERAND_TYPES_ENUM |
1174 | | namespace llvm { |
1175 | | namespace XCore { |
1176 | | namespace OpTypes { |
1177 | | enum OperandType { |
1178 | | InlineJT = 0, |
1179 | | InlineJT32 = 1, |
1180 | | MEMii = 2, |
1181 | | brtarget = 3, |
1182 | | brtarget_neg = 4, |
1183 | | f32imm = 5, |
1184 | | f64imm = 6, |
1185 | | i16imm = 7, |
1186 | | i1imm = 8, |
1187 | | i32imm = 9, |
1188 | | i64imm = 10, |
1189 | | i8imm = 11, |
1190 | | pcrel_imm = 12, |
1191 | | pcrel_imm_neg = 13, |
1192 | | type0 = 14, |
1193 | | type1 = 15, |
1194 | | type2 = 16, |
1195 | | type3 = 17, |
1196 | | type4 = 18, |
1197 | | type5 = 19, |
1198 | | OPERAND_TYPE_LIST_END |
1199 | | }; |
1200 | | } // end namespace OpTypes |
1201 | | } // end namespace XCore |
1202 | | } // end namespace llvm |
1203 | | #endif // GET_INSTRINFO_OPERAND_TYPES_ENUM |
1204 | | |