/Users/buildslave/jenkins/sharedspace/clang-stage2-coverage-R@2/llvm/lib/Target/ARM/Thumb1InstrInfo.h
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1 | | //===-- Thumb1InstrInfo.h - Thumb-1 Instruction Information -----*- C++ -*-===// |
2 | | // |
3 | | // The LLVM Compiler Infrastructure |
4 | | // |
5 | | // This file is distributed under the University of Illinois Open Source |
6 | | // License. See LICENSE.TXT for details. |
7 | | // |
8 | | //===----------------------------------------------------------------------===// |
9 | | // |
10 | | // This file contains the Thumb-1 implementation of the TargetInstrInfo class. |
11 | | // |
12 | | //===----------------------------------------------------------------------===// |
13 | | |
14 | | #ifndef LLVM_LIB_TARGET_ARM_THUMB1INSTRINFO_H |
15 | | #define LLVM_LIB_TARGET_ARM_THUMB1INSTRINFO_H |
16 | | |
17 | | #include "ARMBaseInstrInfo.h" |
18 | | #include "ThumbRegisterInfo.h" |
19 | | |
20 | | namespace llvm { |
21 | | class ARMSubtarget; |
22 | | |
23 | | class Thumb1InstrInfo : public ARMBaseInstrInfo { |
24 | | ThumbRegisterInfo RI; |
25 | | public: |
26 | | explicit Thumb1InstrInfo(const ARMSubtarget &STI); |
27 | | |
28 | | /// Return the noop instruction to use for a noop. |
29 | | void getNoop(MCInst &NopInst) const override; |
30 | | |
31 | | // Return the non-pre/post incrementing version of 'Opc'. Return 0 |
32 | | // if there is not such an opcode. |
33 | | unsigned getUnindexedOpcode(unsigned Opc) const override; |
34 | | |
35 | | /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As |
36 | | /// such, whenever a client has an instance of instruction info, it should |
37 | | /// always be able to get register info as well (through this method). |
38 | | /// |
39 | 287k | const ThumbRegisterInfo &getRegisterInfo() const override { return RI; } |
40 | | |
41 | | void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, |
42 | | const DebugLoc &DL, unsigned DestReg, unsigned SrcReg, |
43 | | bool KillSrc) const override; |
44 | | void storeRegToStackSlot(MachineBasicBlock &MBB, |
45 | | MachineBasicBlock::iterator MBBI, |
46 | | unsigned SrcReg, bool isKill, int FrameIndex, |
47 | | const TargetRegisterClass *RC, |
48 | | const TargetRegisterInfo *TRI) const override; |
49 | | |
50 | | void loadRegFromStackSlot(MachineBasicBlock &MBB, |
51 | | MachineBasicBlock::iterator MBBI, |
52 | | unsigned DestReg, int FrameIndex, |
53 | | const TargetRegisterClass *RC, |
54 | | const TargetRegisterInfo *TRI) const override; |
55 | | |
56 | | private: |
57 | | void expandLoadStackGuard(MachineBasicBlock::iterator MI) const override; |
58 | | }; |
59 | | } |
60 | | |
61 | | #endif |