Coverage Report

Created: 2017-10-03 07:32

/Users/buildslave/jenkins/sharedspace/clang-stage2-coverage-R@2/llvm/lib/Target/PowerPC/PPCSubtarget.h
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//===-- PPCSubtarget.h - Define Subtarget for the PPC ----------*- C++ -*--===//
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//
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//                     The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares the PowerPC specific subclass of TargetSubtargetInfo.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_POWERPC_PPCSUBTARGET_H
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#define LLVM_LIB_TARGET_POWERPC_PPCSUBTARGET_H
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#include "PPCFrameLowering.h"
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#include "PPCISelLowering.h"
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#include "PPCInstrInfo.h"
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#include "llvm/ADT/Triple.h"
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#include "llvm/CodeGen/SelectionDAGTargetInfo.h"
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#include "llvm/IR/DataLayout.h"
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#include "llvm/MC/MCInstrItineraries.h"
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#include "llvm/Target/TargetSubtargetInfo.h"
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#include <string>
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#define GET_SUBTARGETINFO_HEADER
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#include "PPCGenSubtargetInfo.inc"
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// GCC #defines PPC on Linux but we use it as our namespace name
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#undef PPC
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namespace llvm {
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class StringRef;
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namespace PPC {
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  // -m directive values.
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  enum {
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    DIR_NONE,
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    DIR_32,
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    DIR_440,
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    DIR_601,
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    DIR_602,
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    DIR_603,
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    DIR_7400,
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    DIR_750,
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    DIR_970,
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    DIR_A2,
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    DIR_E500mc,
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    DIR_E5500,
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    DIR_PWR3,
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    DIR_PWR4,
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    DIR_PWR5,
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    DIR_PWR5X,
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    DIR_PWR6,
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    DIR_PWR6X,
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    DIR_PWR7,
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    DIR_PWR8,
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    DIR_PWR9,
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    DIR_64
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  };
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}
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class GlobalValue;
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class TargetMachine;
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class PPCSubtarget : public PPCGenSubtargetInfo {
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public:
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  enum POPCNTDKind {
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    POPCNTD_Unavailable,
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    POPCNTD_Slow,
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    POPCNTD_Fast
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  };
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protected:
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  /// TargetTriple - What processor and OS we're targeting.
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  Triple TargetTriple;
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  /// stackAlignment - The minimum alignment known to hold of the stack frame on
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  /// entry to the function and which must be maintained by every function.
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  unsigned StackAlignment;
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  /// Selected instruction itineraries (one entry per itinerary class.)
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  InstrItineraryData InstrItins;
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  /// Which cpu directive was used.
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  unsigned DarwinDirective;
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  /// Used by the ISel to turn in optimizations for POWER4-derived architectures
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  bool HasMFOCRF;
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  bool Has64BitSupport;
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  bool Use64BitRegs;
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  bool UseCRBits;
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  bool HasHardFloat;
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  bool IsPPC64;
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  bool HasAltivec;
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  bool HasSPE;
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  bool HasQPX;
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  bool HasVSX;
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  bool HasP8Vector;
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  bool HasP8Altivec;
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  bool HasP8Crypto;
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  bool HasP9Vector;
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  bool HasP9Altivec;
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  bool HasFCPSGN;
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  bool HasFSQRT;
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  bool HasFRE, HasFRES, HasFRSQRTE, HasFRSQRTES;
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  bool HasRecipPrec;
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  bool HasSTFIWX;
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  bool HasLFIWAX;
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  bool HasFPRND;
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  bool HasFPCVT;
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  bool HasISEL;
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  bool HasBPERMD;
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  bool HasExtDiv;
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  bool HasCMPB;
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  bool HasLDBRX;
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  bool IsBookE;
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  bool HasOnlyMSYNC;
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  bool IsE500;
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  bool IsPPC4xx;
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  bool IsPPC6xx;
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  bool FeatureMFTB;
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  bool DeprecatedDST;
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  bool HasLazyResolverStubs;
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  bool IsLittleEndian;
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  bool HasICBT;
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  bool HasInvariantFunctionDescriptors;
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  bool HasPartwordAtomics;
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  bool HasDirectMove;
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  bool HasHTM;
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  bool HasFusion;
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  bool HasFloat128;
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  bool IsISA3_0;
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  bool UseLongCalls;
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  POPCNTDKind HasPOPCNTD;
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  /// When targeting QPX running a stock PPC64 Linux kernel where the stack
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  /// alignment has not been changed, we need to keep the 16-byte alignment
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  /// of the stack.
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  bool IsQPXStackUnaligned;
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  const PPCTargetMachine &TM;
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  PPCFrameLowering FrameLowering;
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  PPCInstrInfo InstrInfo;
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  PPCTargetLowering TLInfo;
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  SelectionDAGTargetInfo TSInfo;
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public:
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  /// This constructor initializes the data members to match that
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  /// of the specified triple.
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  ///
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  PPCSubtarget(const Triple &TT, const std::string &CPU, const std::string &FS,
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               const PPCTargetMachine &TM);
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  /// ParseSubtargetFeatures - Parses features string setting specified
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  /// subtarget options.  Definition of function is auto generated by tblgen.
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  void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
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  /// getStackAlignment - Returns the minimum alignment known to hold of the
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  /// stack frame on entry to the function and which must be maintained by every
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  /// function for this subtarget.
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0
  unsigned getStackAlignment() const { return StackAlignment; }
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  /// getDarwinDirective - Returns the -m directive specified for the cpu.
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  ///
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18.1k
  unsigned getDarwinDirective() const { return DarwinDirective; }
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  /// getInstrItins - Return the instruction itineraries based on subtarget
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  /// selection.
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24.2k
  const InstrItineraryData *getInstrItineraryData() const override {
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24.2k
    return &InstrItins;
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24.2k
  }
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425k
  const PPCFrameLowering *getFrameLowering() const override {
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    return &FrameLowering;
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  }
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3.81M
  const PPCInstrInfo *getInstrInfo() const override { return &InstrInfo; }
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276k
  const PPCTargetLowering *getTargetLowering() const override {
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276k
    return &TLInfo;
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276k
  }
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8.03k
  const SelectionDAGTargetInfo *getSelectionDAGInfo() const override {
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8.03k
    return &TSInfo;
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8.03k
  }
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3.06M
  const PPCRegisterInfo *getRegisterInfo() const override {
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3.06M
    return &getInstrInfo()->getRegisterInfo();
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3.06M
  }
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83.4k
  const PPCTargetMachine &getTargetMachine() const { return TM; }
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  /// initializeSubtargetDependencies - Initializes using a CPU and feature string
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  /// so that we can use initializer lists for subtarget initialization.
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  PPCSubtarget &initializeSubtargetDependencies(StringRef CPU, StringRef FS);
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private:
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  void initializeEnvironment();
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  void initSubtargetFeatures(StringRef CPU, StringRef FS);
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public:
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  /// isPPC64 - Return true if we are generating code for 64-bit pointer mode.
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  ///
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  bool isPPC64() const;
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  /// has64BitSupport - Return true if the selected CPU supports 64-bit
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  /// instructions, regardless of whether we are in 32-bit or 64-bit mode.
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4.95k
  bool has64BitSupport() const { return Has64BitSupport; }
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  // useSoftFloat - Return true if soft-float option is turned on.
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15.1k
  bool useSoftFloat() const { return !HasHardFloat; }
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  /// use64BitRegs - Return true if in 64-bit mode or if we should use 64-bit
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  /// registers in 32-bit mode when possible.  This can only true if
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  /// has64BitSupport() returns true.
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  bool use64BitRegs() const { return Use64BitRegs; }
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  /// useCRBits - Return true if we should store and manipulate i1 values in
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  /// the individual condition register bits.
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142k
  bool useCRBits() const { return UseCRBits; }
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  /// hasLazyResolverStub - Return true if accesses to the specified global have
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  /// to go through a dyld lazy resolution stub.  This means that an extra load
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  /// is required to get the address of the global.
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  bool hasLazyResolverStub(const GlobalValue *GV) const;
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  // isLittleEndian - True if generating little-endian code
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32.9k
  bool isLittleEndian() const { return IsLittleEndian; }
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  // Specific obvious features.
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1.40k
  bool hasFCPSGN() const { return HasFCPSGN; }
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2.81k
  bool hasFSQRT() const { return HasFSQRT; }
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  bool hasFRE() const { return HasFRE; }
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8
  bool hasFRES() const { return HasFRES; }
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  bool hasFRSQRTE() const { return HasFRSQRTE; }
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  bool hasFRSQRTES() const { return HasFRSQRTES; }
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  bool hasRecipPrec() const { return HasRecipPrec; }
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14.7k
  bool hasSTFIWX() const { return HasSTFIWX; }
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1.23k
  bool hasLFIWAX() const { return HasLFIWAX; }
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1.40k
  bool hasFPRND() const { return HasFPRND; }
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4.16k
  bool hasFPCVT() const { return HasFPCVT; }
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203k
  bool hasAltivec() const { return HasAltivec; }
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0
  bool hasSPE() const { return HasSPE; }
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33.3k
  bool hasQPX() const { return HasQPX; }
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129k
  bool hasVSX() const { return HasVSX; }
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9.67k
  bool hasP8Vector() const { return HasP8Vector; }
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79.9k
  bool hasP8Altivec() const { return HasP8Altivec; }
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28
  bool hasP8Crypto() const { return HasP8Crypto; }
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44.1k
  bool hasP9Vector() const { return HasP9Vector; }
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79.7k
  bool hasP9Altivec() const { return HasP9Altivec; }
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565
  bool hasMFOCRF() const { return HasMFOCRF; }
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7.36k
  bool hasISEL() const { return HasISEL; }
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0
  bool hasBPERMD() const { return HasBPERMD; }
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16
  bool hasExtDiv() const { return HasExtDiv; }
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723
  bool hasCMPB() const { return HasCMPB; }
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  bool hasLDBRX() const { return HasLDBRX; }
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0
  bool isBookE() const { return IsBookE; }
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740
  bool hasOnlyMSYNC() const { return HasOnlyMSYNC; }
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0
  bool isPPC4xx() const { return IsPPC4xx; }
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0
  bool isPPC6xx() const { return IsPPC6xx; }
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0
  bool isE500() const { return IsE500; }
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0
  bool isFeatureMFTB() const { return FeatureMFTB; }
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0
  bool isDeprecatedDST() const { return DeprecatedDST; }
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3
  bool hasICBT() const { return HasICBT; }
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  bool hasInvariantFunctionDescriptors() const {
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    return HasInvariantFunctionDescriptors;
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  }
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  bool hasPartwordAtomics() const { return HasPartwordAtomics; }
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6.22k
  bool hasDirectMove() const { return HasDirectMove; }
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122
  bool isQPXStackUnaligned() const { return IsQPXStackUnaligned; }
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2.81k
  unsigned getPlatformStackAlignment() const {
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2.81k
    if (
(hasQPX() || 2.81k
isBGQ()2.73k
) &&
!isQPXStackUnaligned()122
)
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122
      return 32;
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2.81k
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2.69k
    return 16;
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2.81k
  }
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  // DarwinABI has a 224-byte red zone. PPC32 SVR4ABI(Non-DarwinABI) has no
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  // red zone and PPC64 SVR4ABI has a 288-byte red zone.
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25.4k
  unsigned  getRedZoneSize() const {
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25.4k
    return isDarwinABI() ? 
2241.22k
:
(isPPC64() ? 24.2k
28821.3k
:
02.91k
);
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25.4k
  }
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18
  bool hasHTM() const { return HasHTM; }
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0
  bool hasFusion() const { return HasFusion; }
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0
  bool hasFloat128() const { return HasFloat128; }
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2.93k
  bool isISA3_0() const { return IsISA3_0; }
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1.75k
  bool useLongCalls() const { return UseLongCalls; }
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34.1k
  bool needsSwapsForVSXMemOps() const {
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34.1k
    return hasVSX() && 
isLittleEndian()17.3k
&&
!hasP9Vector()8.83k
;
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34.1k
  }
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1.40k
  POPCNTDKind hasPOPCNTD() const { return HasPOPCNTD; }
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293
0
  const Triple &getTargetTriple() const { return TargetTriple; }
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  /// isDarwin - True if this is any darwin platform.
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365k
  bool isDarwin() const { return TargetTriple.isMacOSX(); }
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  /// isBGQ - True if this is a BG/Q platform.
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2.73k
  bool isBGQ() const { return TargetTriple.getVendor() == Triple::BGQ; }
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300
1.42k
  bool isTargetELF() const { return TargetTriple.isOSBinFormatELF(); }
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360k
  bool isTargetMachO() const { return TargetTriple.isOSBinFormatMachO(); }
302
16
  bool isTargetLinux() const { return TargetTriple.isOSLinux(); }
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304
360k
  bool isDarwinABI() const 
{ return isTargetMachO() || 360k
isDarwin()346k
; }
305
127k
  bool isSVR4ABI() const { return !isDarwinABI(); }
306
  bool isELFv2ABI() const;
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308
  /// Originally, this function return hasISEL(). Now we always enable it,
309
  /// but may expand the ISEL instruction later.
310
6.86k
  bool enableEarlyIfConversion() const override { return true; }
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312
  // Scheduling customization.
313
  bool enableMachineScheduler() const override;
314
  // This overrides the PostRAScheduler bit in the SchedModel for each CPU.
315
  bool enablePostRAScheduler() const override;
316
  AntiDepBreakMode getAntiDepBreakMode() const override;
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  void getCriticalPathRCs(RegClassVector &CriticalPathRCs) const override;
318
319
  void overrideSchedPolicy(MachineSchedPolicy &Policy,
320
                           unsigned NumRegionInstrs) const override;
321
  bool useAA() const override;
322
323
  bool enableSubRegLiveness() const override;
324
325
  /// classifyGlobalReference - Classify a global variable reference for the
326
  /// current subtarget accourding to how we should reference it.
327
  unsigned char classifyGlobalReference(const GlobalValue *GV) const;
328
329
8
  bool isXRaySupported() const override 
{ return IsPPC64 && 8
IsLittleEndian8
; }
330
};
331
} // End llvm namespace
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333
#endif