Coverage Report

Created: 2017-10-03 07:32

/Users/buildslave/jenkins/sharedspace/clang-stage2-coverage-R@2/llvm/lib/Target/Sparc/SparcFrameLowering.cpp
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Count
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//===-- SparcFrameLowering.cpp - Sparc Frame Information ------------------===//
2
//
3
//                     The LLVM Compiler Infrastructure
4
//
5
// This file is distributed under the University of Illinois Open Source
6
// License. See LICENSE.TXT for details.
7
//
8
//===----------------------------------------------------------------------===//
9
//
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// This file contains the Sparc implementation of TargetFrameLowering class.
11
//
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//===----------------------------------------------------------------------===//
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14
#include "SparcFrameLowering.h"
15
#include "SparcInstrInfo.h"
16
#include "SparcMachineFunctionInfo.h"
17
#include "SparcSubtarget.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineFunction.h"
20
#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineModuleInfo.h"
22
#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/IR/DataLayout.h"
24
#include "llvm/IR/Function.h"
25
#include "llvm/Support/CommandLine.h"
26
#include "llvm/Target/TargetOptions.h"
27
28
using namespace llvm;
29
30
static cl::opt<bool>
31
DisableLeafProc("disable-sparc-leaf-proc",
32
                cl::init(false),
33
                cl::desc("Disable Sparc leaf procedure optimization."),
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                cl::Hidden);
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36
SparcFrameLowering::SparcFrameLowering(const SparcSubtarget &ST)
37
    : TargetFrameLowering(TargetFrameLowering::StackGrowsDown,
38
376
                          ST.is64Bit() ? 16 : 8, 0, ST.is64Bit() ? 16 : 8) {}
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40
void SparcFrameLowering::emitSPAdjustment(MachineFunction &MF,
41
                                          MachineBasicBlock &MBB,
42
                                          MachineBasicBlock::iterator MBBI,
43
                                          int NumBytes,
44
                                          unsigned ADDrr,
45
593
                                          unsigned ADDri) const {
46
593
47
593
  DebugLoc dl;
48
593
  const SparcInstrInfo &TII =
49
593
      *static_cast<const SparcInstrInfo *>(MF.getSubtarget().getInstrInfo());
50
593
51
593
  if (
NumBytes >= -4096 && 593
NumBytes < 4096591
) {
52
591
    BuildMI(MBB, MBBI, dl, TII.get(ADDri), SP::O6)
53
591
      .addReg(SP::O6).addImm(NumBytes);
54
591
    return;
55
591
  }
56
2
57
2
  // Emit this the hard way.  This clobbers G1 which we always know is
58
2
  // available here.
59
2
  
if (2
NumBytes >= 02
) {
60
0
    // Emit nonnegative numbers with sethi + or.
61
0
    // sethi %hi(NumBytes), %g1
62
0
    // or %g1, %lo(NumBytes), %g1
63
0
    // add %sp, %g1, %sp
64
0
    BuildMI(MBB, MBBI, dl, TII.get(SP::SETHIi), SP::G1)
65
0
      .addImm(HI22(NumBytes));
66
0
    BuildMI(MBB, MBBI, dl, TII.get(SP::ORri), SP::G1)
67
0
      .addReg(SP::G1).addImm(LO10(NumBytes));
68
0
    BuildMI(MBB, MBBI, dl, TII.get(ADDrr), SP::O6)
69
0
      .addReg(SP::O6).addReg(SP::G1);
70
0
    return ;
71
0
  }
72
2
73
2
  // Emit negative numbers with sethi + xor.
74
2
  // sethi %hix(NumBytes), %g1
75
2
  // xor %g1, %lox(NumBytes), %g1
76
2
  // add %sp, %g1, %sp
77
2
  BuildMI(MBB, MBBI, dl, TII.get(SP::SETHIi), SP::G1)
78
2
    .addImm(HIX22(NumBytes));
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2
  BuildMI(MBB, MBBI, dl, TII.get(SP::XORri), SP::G1)
80
2
    .addReg(SP::G1).addImm(LOX10(NumBytes));
81
2
  BuildMI(MBB, MBBI, dl, TII.get(ADDrr), SP::O6)
82
2
    .addReg(SP::O6).addReg(SP::G1);
83
2
}
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85
void SparcFrameLowering::emitPrologue(MachineFunction &MF,
86
644
                                      MachineBasicBlock &MBB) const {
87
644
  SparcMachineFunctionInfo *FuncInfo = MF.getInfo<SparcMachineFunctionInfo>();
88
644
89
644
  assert(&MF.front() == &MBB && "Shrink-wrapping not yet supported");
90
644
  MachineFrameInfo &MFI = MF.getFrameInfo();
91
644
  const SparcInstrInfo &TII =
92
644
      *static_cast<const SparcInstrInfo *>(MF.getSubtarget().getInstrInfo());
93
644
  const SparcRegisterInfo &RegInfo =
94
644
      *static_cast<const SparcRegisterInfo *>(MF.getSubtarget().getRegisterInfo());
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644
  MachineBasicBlock::iterator MBBI = MBB.begin();
96
644
  // Debug location must be unknown since the first debug location is used
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644
  // to determine the end of the prologue.
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644
  DebugLoc dl;
99
644
  bool NeedsStackRealignment = RegInfo.needsStackRealignment(MF);
100
644
101
644
  // FIXME: unfortunately, returning false from canRealignStack
102
644
  // actually just causes needsStackRealignment to return false,
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644
  // rather than reporting an error, as would be sensible. This is
104
644
  // poor, but fixing that bogosity is going to be a large project.
105
644
  // For now, just see if it's lied, and report an error here.
106
644
  if (
!NeedsStackRealignment && 644
MFI.getMaxAlignment() > getStackAlignment()635
)
107
2
    report_fatal_error("Function \"" + Twine(MF.getName()) + "\" required "
108
2
                       "stack re-alignment, but LLVM couldn't handle it "
109
2
                       "(probably because it has a dynamic alloca).");
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642
111
642
  // Get the number of bytes to allocate from the FrameInfo
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642
  int NumBytes = (int) MFI.getStackSize();
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642
114
642
  unsigned SAVEri = SP::SAVEri;
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642
  unsigned SAVErr = SP::SAVErr;
116
642
  if (
FuncInfo->isLeafProc()642
) {
117
273
    if (NumBytes == 0)
118
165
      return;
119
108
    SAVEri = SP::ADDri;
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108
    SAVErr = SP::ADDrr;
121
108
  }
122
642
123
642
  // The SPARC ABI is a bit odd in that it requires a reserved 92-byte
124
642
  // (128 in v9) area in the user's stack, starting at %sp. Thus, the
125
642
  // first part of the stack that can actually be used is located at
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642
  // %sp + 92.
127
642
  //
128
642
  // We therefore need to add that offset to the total stack size
129
642
  // after all the stack objects are placed by
130
642
  // PrologEpilogInserter calculateFrameObjectOffsets. However, since the stack needs to be
131
642
  // aligned *after* the extra size is added, we need to disable
132
642
  // calculateFrameObjectOffsets's built-in stack alignment, by having
133
642
  // targetHandlesStackFrameRounding return true.
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642
135
642
136
642
  // Add the extra call frame stack size, if needed. (This is the same
137
642
  // code as in PrologEpilogInserter, but also gets disabled by
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  // targetHandlesStackFrameRounding)
139
477
  
if (477
MFI.adjustsStack() && 477
hasReservedCallFrame(MF)238
)
140
236
    NumBytes += MFI.getMaxCallFrameSize();
141
477
142
477
  // Adds the SPARC subtarget-specific spill area to the stack
143
477
  // size. Also ensures target-required alignment.
144
477
  NumBytes = MF.getSubtarget<SparcSubtarget>().getAdjustedFrameSize(NumBytes);
145
477
146
477
  // Finally, ensure that the size is sufficiently aligned for the
147
477
  // data on the stack.
148
477
  if (
MFI.getMaxAlignment() > 0477
) {
149
410
    NumBytes = alignTo(NumBytes, MFI.getMaxAlignment());
150
410
  }
151
477
152
477
  // Update stack size with corrected value.
153
477
  MFI.setStackSize(NumBytes);
154
477
155
477
  emitSPAdjustment(MF, MBB, MBBI, -NumBytes, SAVErr, SAVEri);
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477
157
477
  unsigned regFP = RegInfo.getDwarfRegNum(SP::I6, true);
158
477
159
477
  // Emit ".cfi_def_cfa_register 30".
160
477
  unsigned CFIIndex =
161
477
      MF.addFrameInst(MCCFIInstruction::createDefCfaRegister(nullptr, regFP));
162
477
  BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
163
477
      .addCFIIndex(CFIIndex);
164
477
165
477
  // Emit ".cfi_window_save".
166
477
  CFIIndex = MF.addFrameInst(MCCFIInstruction::createWindowSave(nullptr));
167
477
  BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
168
477
      .addCFIIndex(CFIIndex);
169
477
170
477
  unsigned regInRA = RegInfo.getDwarfRegNum(SP::I7, true);
171
477
  unsigned regOutRA = RegInfo.getDwarfRegNum(SP::O7, true);
172
477
  // Emit ".cfi_register 15, 31".
173
477
  CFIIndex = MF.addFrameInst(
174
477
      MCCFIInstruction::createRegister(nullptr, regOutRA, regInRA));
175
477
  BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
176
477
      .addCFIIndex(CFIIndex);
177
477
178
477
  if (
NeedsStackRealignment477
) {
179
9
    // andn %o6, MaxAlign-1, %o6
180
9
    int MaxAlign = MFI.getMaxAlignment();
181
9
    BuildMI(MBB, MBBI, dl, TII.get(SP::ANDNri), SP::O6).addReg(SP::O6).addImm(MaxAlign - 1);
182
9
  }
183
644
}
184
185
MachineBasicBlock::iterator SparcFrameLowering::
186
eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
187
714
                              MachineBasicBlock::iterator I) const {
188
714
  if (
!hasReservedCallFrame(MF)714
) {
189
8
    MachineInstr &MI = *I;
190
8
    int Size = MI.getOperand(0).getImm();
191
8
    if (MI.getOpcode() == SP::ADJCALLSTACKDOWN)
192
4
      Size = -Size;
193
8
194
8
    if (Size)
195
6
      emitSPAdjustment(MF, MBB, I, Size, SP::ADDrr, SP::ADDri);
196
8
  }
197
714
  return MBB.erase(I);
198
714
}
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200
201
void SparcFrameLowering::emitEpilogue(MachineFunction &MF,
202
651
                                  MachineBasicBlock &MBB) const {
203
651
  SparcMachineFunctionInfo *FuncInfo = MF.getInfo<SparcMachineFunctionInfo>();
204
651
  MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
205
651
  const SparcInstrInfo &TII =
206
651
      *static_cast<const SparcInstrInfo *>(MF.getSubtarget().getInstrInfo());
207
651
  DebugLoc dl = MBBI->getDebugLoc();
208
651
  assert(MBBI->getOpcode() == SP::RETL &&
209
651
         "Can only put epilog before 'retl' instruction!");
210
651
  if (
!FuncInfo->isLeafProc()651
) {
211
374
    BuildMI(MBB, MBBI, dl, TII.get(SP::RESTORErr), SP::G0).addReg(SP::G0)
212
374
      .addReg(SP::G0);
213
374
    return;
214
374
  }
215
277
  MachineFrameInfo &MFI = MF.getFrameInfo();
216
277
217
277
  int NumBytes = (int) MFI.getStackSize();
218
277
  if (NumBytes == 0)
219
167
    return;
220
110
221
110
  emitSPAdjustment(MF, MBB, MBBI, NumBytes, SP::ADDrr, SP::ADDri);
222
110
}
223
224
1.81k
bool SparcFrameLowering::hasReservedCallFrame(const MachineFunction &MF) const {
225
1.81k
  // Reserve call frame if there are no variable sized objects on the stack.
226
1.81k
  return !MF.getFrameInfo().hasVarSizedObjects();
227
1.81k
}
228
229
// hasFP - Return true if the specified function should have a dedicated frame
230
// pointer register.  This is true if the function has variable sized allocas or
231
// if frame pointer elimination is disabled.
232
948
bool SparcFrameLowering::hasFP(const MachineFunction &MF) const {
233
948
  const TargetRegisterInfo *RegInfo = MF.getSubtarget().getRegisterInfo();
234
948
235
948
  const MachineFrameInfo &MFI = MF.getFrameInfo();
236
948
  return MF.getTarget().Options.DisableFramePointerElim(MF) ||
237
933
      RegInfo->needsStackRealignment(MF) ||
238
920
      MFI.hasVarSizedObjects() ||
239
908
      MFI.isFrameAddressTaken();
240
948
}
241
242
243
int SparcFrameLowering::getFrameIndexReference(const MachineFunction &MF, int FI,
244
1.47k
                                               unsigned &FrameReg) const {
245
1.47k
  const SparcSubtarget &Subtarget = MF.getSubtarget<SparcSubtarget>();
246
1.47k
  const MachineFrameInfo &MFI = MF.getFrameInfo();
247
1.47k
  const SparcRegisterInfo *RegInfo = Subtarget.getRegisterInfo();
248
1.47k
  const SparcMachineFunctionInfo *FuncInfo = MF.getInfo<SparcMachineFunctionInfo>();
249
1.47k
  bool isFixed = MFI.isFixedObjectIndex(FI);
250
1.47k
251
1.47k
  // Addressable stack objects are accessed using neg. offsets from
252
1.47k
  // %fp, or positive offsets from %sp.
253
1.47k
  bool UseFP;
254
1.47k
255
1.47k
  // Sparc uses FP-based references in general, even when "hasFP" is
256
1.47k
  // false. That function is rather a misnomer, because %fp is
257
1.47k
  // actually always available, unless isLeafProc.
258
1.47k
  if (
FuncInfo->isLeafProc()1.47k
) {
259
485
    // If there's a leaf proc, all offsets need to be %sp-based,
260
485
    // because we haven't caused %fp to actually point to our frame.
261
485
    UseFP = false;
262
1.47k
  } else 
if (989
isFixed989
) {
263
92
    // Otherwise, argument access should always use %fp.
264
92
    UseFP = true;
265
989
  } else 
if (897
RegInfo->needsStackRealignment(MF)897
) {
266
109
    // If there is dynamic stack realignment, all local object
267
109
    // references need to be via %sp, to take account of the
268
109
    // re-alignment.
269
109
    UseFP = false;
270
897
  } else {
271
788
    // Finally, default to using %fp.
272
788
    UseFP = true;
273
788
  }
274
1.47k
275
1.47k
  int64_t FrameOffset = MF.getFrameInfo().getObjectOffset(FI) +
276
1.47k
      Subtarget.getStackPointerBias();
277
1.47k
278
1.47k
  if (
UseFP1.47k
) {
279
880
    FrameReg = RegInfo->getFrameRegister(MF);
280
880
    return FrameOffset;
281
0
  } else {
282
594
    FrameReg = SP::O6; // %sp
283
594
    return FrameOffset + MF.getFrameInfo().getStackSize();
284
594
  }
285
0
}
286
287
static bool LLVM_ATTRIBUTE_UNUSED verifyLeafProcRegUse(MachineRegisterInfo *MRI)
288
0
{
289
0
290
0
  for (unsigned reg = SP::I0; reg <= SP::I7; ++reg)
291
0
    if (MRI->isPhysRegUsed(reg))
292
0
      return false;
293
0
294
0
  for (unsigned reg = SP::L0; reg <= SP::L7; ++reg)
295
0
    if (MRI->isPhysRegUsed(reg))
296
0
      return false;
297
0
298
0
  return true;
299
0
}
300
301
bool SparcFrameLowering::isLeafProc(MachineFunction &MF) const
302
528
{
303
528
304
528
  MachineRegisterInfo &MRI = MF.getRegInfo();
305
528
  MachineFrameInfo    &MFI = MF.getFrameInfo();
306
528
307
528
  return !(MFI.hasCalls()                  // has calls
308
319
           || MRI.isPhysRegUsed(SP::L0)    // Too many registers needed
309
300
           || MRI.isPhysRegUsed(SP::O6)    // %SP is used
310
296
           || hasFP(MF));                  // need %FP
311
528
}
312
313
273
void SparcFrameLowering::remapRegsForLeafProc(MachineFunction &MF) const {
314
273
  MachineRegisterInfo &MRI = MF.getRegInfo();
315
273
  // Remap %i[0-7] to %o[0-7].
316
2.45k
  for (unsigned reg = SP::I0; 
reg <= SP::I72.45k
;
++reg2.18k
) {
317
2.18k
    if (!MRI.isPhysRegUsed(reg))
318
1.49k
      continue;
319
687
320
687
    unsigned mapped_reg = reg - SP::I0 + SP::O0;
321
687
322
687
    // Replace I register with O register.
323
687
    MRI.replaceRegWith(reg, mapped_reg);
324
687
325
687
    // Also replace register pair super-registers.
326
687
    if (
(reg - SP::I0) % 2 == 0687
) {
327
410
      unsigned preg = (reg - SP::I0) / 2 + SP::I0_I1;
328
410
      unsigned mapped_preg = preg - SP::I0_I1 + SP::O0_O1;
329
410
      MRI.replaceRegWith(preg, mapped_preg);
330
410
    }
331
2.18k
  }
332
273
333
273
  // Rewrite MBB's Live-ins.
334
273
  for (MachineFunction::iterator MBB = MF.begin(), E = MF.end();
335
669
       
MBB != E669
;
++MBB396
) {
336
1.98k
    for (unsigned reg = SP::I0_I1; 
reg <= SP::I6_I71.98k
;
++reg1.58k
) {
337
1.58k
      if (!MBB->isLiveIn(reg))
338
1.58k
        continue;
339
0
      MBB->removeLiveIn(reg);
340
0
      MBB->addLiveIn(reg - SP::I0_I1 + SP::O0_O1);
341
0
    }
342
3.56k
    for (unsigned reg = SP::I0; 
reg <= SP::I73.56k
;
++reg3.16k
) {
343
3.16k
      if (!MBB->isLiveIn(reg))
344
2.58k
        continue;
345
588
      MBB->removeLiveIn(reg);
346
588
      MBB->addLiveIn(reg - SP::I0 + SP::O0);
347
588
    }
348
396
  }
349
273
350
273
  assert(verifyLeafProcRegUse(&MRI));
351
#ifdef EXPENSIVE_CHECKS
352
  MF.verify(0, "After LeafProc Remapping");
353
#endif
354
}
355
356
void SparcFrameLowering::determineCalleeSaves(MachineFunction &MF,
357
                                              BitVector &SavedRegs,
358
644
                                              RegScavenger *RS) const {
359
644
  TargetFrameLowering::determineCalleeSaves(MF, SavedRegs, RS);
360
644
  if (
!DisableLeafProc && 644
isLeafProc(MF)528
) {
361
273
    SparcMachineFunctionInfo *MFI = MF.getInfo<SparcMachineFunctionInfo>();
362
273
    MFI->setLeafProc(true);
363
273
364
273
    remapRegsForLeafProc(MF);
365
273
  }
366
644
367
644
}