Coverage Report

Created: 2018-07-12 09:57

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/clang-build/lib/Target/AArch64/AArch64GenFastISel.inc
Line
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Source (jump to first uncovered line)
1
/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2
|*                                                                            *|
3
|* "Fast" Instruction Selector for the AArch64 target                         *|
4
|*                                                                            *|
5
|* Automatically generated file, do not edit!                                 *|
6
|*                                                                            *|
7
\*===----------------------------------------------------------------------===*/
8
9
10
// FastEmit Immediate Predicate functions.
11
0
static bool Predicate_imm0_31(int64_t Imm) {
12
0
13
0
  return ((uint64_t)Imm) < 32;
14
0
15
0
}
16
0
static bool Predicate_imm0_63(int64_t Imm) {
17
0
18
0
  return ((uint64_t)Imm) < 64;
19
0
20
0
}
21
0
static bool Predicate_imm32_0_31(int64_t Imm) {
22
0
23
0
  return ((uint64_t)Imm) < 32;
24
0
25
0
}
26
0
static bool Predicate_tbz_imm0_31_diag(int64_t Imm) {
27
0
28
0
  return (((uint32_t)Imm) < 32);
29
0
30
0
}
31
0
static bool Predicate_tbz_imm32_63(int64_t Imm) {
32
0
33
0
  return (((uint32_t)Imm) > 31) && (((uint32_t)Imm) < 64);
34
0
35
0
}
36
0
static bool Predicate_VectorIndexD(int64_t Imm) {
37
0
 return ((uint64_t)Imm) < 2; 
38
0
}
39
0
static bool Predicate_VectorIndexS(int64_t Imm) {
40
0
 return ((uint64_t)Imm) < 4; 
41
0
}
42
0
static bool Predicate_VectorIndexH(int64_t Imm) {
43
0
 return ((uint64_t)Imm) < 8; 
44
0
}
45
0
static bool Predicate_VectorIndexB(int64_t Imm) {
46
0
 return ((uint64_t)Imm) < 16; 
47
0
}
48
180
static bool Predicate_imm0_255(int64_t Imm) {
49
180
50
180
  return ((uint32_t)Imm) < 256;
51
180
52
180
}
53
0
static bool Predicate_vecshiftL64(int64_t Imm) {
54
0
55
0
  return (((uint32_t)Imm) < 64);
56
0
57
0
}
58
0
static bool Predicate_vecshiftL32(int64_t Imm) {
59
0
60
0
  return (((uint32_t)Imm) < 32);
61
0
62
0
}
63
0
static bool Predicate_vecshiftR64(int64_t Imm) {
64
0
65
0
  return (((uint32_t)Imm) > 0) && (((uint32_t)Imm) < 65);
66
0
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0
}
68
0
static bool Predicate_vecshiftL8(int64_t Imm) {
69
0
70
0
  return (((uint32_t)Imm) < 8);
71
0
72
0
}
73
0
static bool Predicate_vecshiftL16(int64_t Imm) {
74
0
75
0
  return (((uint32_t)Imm) < 16);
76
0
77
0
}
78
0
static bool Predicate_vecshiftR8(int64_t Imm) {
79
0
80
0
  return (((uint32_t)Imm) > 0) && (((uint32_t)Imm) < 9);
81
0
82
0
}
83
0
static bool Predicate_vecshiftR16(int64_t Imm) {
84
0
85
0
  return (((uint32_t)Imm) > 0) && (((uint32_t)Imm) < 17);
86
0
87
0
}
88
0
static bool Predicate_vecshiftR32(int64_t Imm) {
89
0
90
0
  return (((uint32_t)Imm) > 0) && (((uint32_t)Imm) < 33);
91
0
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0
}
93
94
95
// FastEmit functions for AArch64ISD::THREAD_POINTER.
96
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0
unsigned fastEmit_AArch64ISD_THREAD_POINTER_MVT_i64_(MVT RetVT) {
98
0
  if (RetVT.SimpleTy != MVT::i64)
99
0
    return 0;
100
0
  return fastEmitInst_(AArch64::MOVbaseTLS, &AArch64::GPR64RegClass);
101
0
}
102
103
unsigned fastEmit_AArch64ISD_THREAD_POINTER_(MVT VT, MVT RetVT) {
104
  switch (VT.SimpleTy) {
105
  case MVT::i64: return fastEmit_AArch64ISD_THREAD_POINTER_MVT_i64_(RetVT);
106
  default: return 0;
107
  }
108
}
109
110
// Top-level FastEmit function.
111
112
9
unsigned fastEmit_(MVT VT, MVT RetVT, unsigned Opcode) override {
113
9
  switch (Opcode) {
114
9
  
case AArch64ISD::THREAD_POINTER: return fastEmit_AArch64ISD_THREAD_POINTER_(VT, RetVT)0
;
115
9
  default: return 0;
116
9
  }
117
9
}
118
119
// FastEmit functions for AArch64ISD::CALL.
120
121
0
unsigned fastEmit_AArch64ISD_CALL_MVT_i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
122
0
  if (RetVT.SimpleTy != MVT::isVoid)
123
0
    return 0;
124
0
  return fastEmitInst_r(AArch64::BLR, &AArch64::GPR64RegClass, Op0, Op0IsKill);
125
0
}
126
127
unsigned fastEmit_AArch64ISD_CALL_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
128
  switch (VT.SimpleTy) {
129
  case MVT::i64: return fastEmit_AArch64ISD_CALL_MVT_i64_r(RetVT, Op0, Op0IsKill);
130
  default: return 0;
131
  }
132
}
133
134
// FastEmit functions for AArch64ISD::CMEQz.
135
136
0
unsigned fastEmit_AArch64ISD_CMEQz_MVT_v8i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
137
0
  if (RetVT.SimpleTy != MVT::v8i8)
138
0
    return 0;
139
0
  if ((Subtarget->hasNEON())) {
140
0
    return fastEmitInst_r(AArch64::CMEQv8i8rz, &AArch64::FPR64RegClass, Op0, Op0IsKill);
141
0
  }
142
0
  return 0;
143
0
}
144
145
0
unsigned fastEmit_AArch64ISD_CMEQz_MVT_v16i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
146
0
  if (RetVT.SimpleTy != MVT::v16i8)
147
0
    return 0;
148
0
  if ((Subtarget->hasNEON())) {
149
0
    return fastEmitInst_r(AArch64::CMEQv16i8rz, &AArch64::FPR128RegClass, Op0, Op0IsKill);
150
0
  }
151
0
  return 0;
152
0
}
153
154
0
unsigned fastEmit_AArch64ISD_CMEQz_MVT_v4i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
155
0
  if (RetVT.SimpleTy != MVT::v4i16)
156
0
    return 0;
157
0
  if ((Subtarget->hasNEON())) {
158
0
    return fastEmitInst_r(AArch64::CMEQv4i16rz, &AArch64::FPR64RegClass, Op0, Op0IsKill);
159
0
  }
160
0
  return 0;
161
0
}
162
163
0
unsigned fastEmit_AArch64ISD_CMEQz_MVT_v8i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
164
0
  if (RetVT.SimpleTy != MVT::v8i16)
165
0
    return 0;
166
0
  if ((Subtarget->hasNEON())) {
167
0
    return fastEmitInst_r(AArch64::CMEQv8i16rz, &AArch64::FPR128RegClass, Op0, Op0IsKill);
168
0
  }
169
0
  return 0;
170
0
}
171
172
0
unsigned fastEmit_AArch64ISD_CMEQz_MVT_v2i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
173
0
  if (RetVT.SimpleTy != MVT::v2i32)
174
0
    return 0;
175
0
  if ((Subtarget->hasNEON())) {
176
0
    return fastEmitInst_r(AArch64::CMEQv2i32rz, &AArch64::FPR64RegClass, Op0, Op0IsKill);
177
0
  }
178
0
  return 0;
179
0
}
180
181
0
unsigned fastEmit_AArch64ISD_CMEQz_MVT_v4i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
182
0
  if (RetVT.SimpleTy != MVT::v4i32)
183
0
    return 0;
184
0
  if ((Subtarget->hasNEON())) {
185
0
    return fastEmitInst_r(AArch64::CMEQv4i32rz, &AArch64::FPR128RegClass, Op0, Op0IsKill);
186
0
  }
187
0
  return 0;
188
0
}
189
190
0
unsigned fastEmit_AArch64ISD_CMEQz_MVT_v1i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
191
0
  if (RetVT.SimpleTy != MVT::v1i64)
192
0
    return 0;
193
0
  if ((Subtarget->hasNEON())) {
194
0
    return fastEmitInst_r(AArch64::CMEQv1i64rz, &AArch64::FPR64RegClass, Op0, Op0IsKill);
195
0
  }
196
0
  return 0;
197
0
}
198
199
0
unsigned fastEmit_AArch64ISD_CMEQz_MVT_v2i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
200
0
  if (RetVT.SimpleTy != MVT::v2i64)
201
0
    return 0;
202
0
  if ((Subtarget->hasNEON())) {
203
0
    return fastEmitInst_r(AArch64::CMEQv2i64rz, &AArch64::FPR128RegClass, Op0, Op0IsKill);
204
0
  }
205
0
  return 0;
206
0
}
207
208
unsigned fastEmit_AArch64ISD_CMEQz_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
209
  switch (VT.SimpleTy) {
210
  case MVT::v8i8: return fastEmit_AArch64ISD_CMEQz_MVT_v8i8_r(RetVT, Op0, Op0IsKill);
211
  case MVT::v16i8: return fastEmit_AArch64ISD_CMEQz_MVT_v16i8_r(RetVT, Op0, Op0IsKill);
212
  case MVT::v4i16: return fastEmit_AArch64ISD_CMEQz_MVT_v4i16_r(RetVT, Op0, Op0IsKill);
213
  case MVT::v8i16: return fastEmit_AArch64ISD_CMEQz_MVT_v8i16_r(RetVT, Op0, Op0IsKill);
214
  case MVT::v2i32: return fastEmit_AArch64ISD_CMEQz_MVT_v2i32_r(RetVT, Op0, Op0IsKill);
215
  case MVT::v4i32: return fastEmit_AArch64ISD_CMEQz_MVT_v4i32_r(RetVT, Op0, Op0IsKill);
216
  case MVT::v1i64: return fastEmit_AArch64ISD_CMEQz_MVT_v1i64_r(RetVT, Op0, Op0IsKill);
217
  case MVT::v2i64: return fastEmit_AArch64ISD_CMEQz_MVT_v2i64_r(RetVT, Op0, Op0IsKill);
218
  default: return 0;
219
  }
220
}
221
222
// FastEmit functions for AArch64ISD::CMGEz.
223
224
0
unsigned fastEmit_AArch64ISD_CMGEz_MVT_v8i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
225
0
  if (RetVT.SimpleTy != MVT::v8i8)
226
0
    return 0;
227
0
  if ((Subtarget->hasNEON())) {
228
0
    return fastEmitInst_r(AArch64::CMGEv8i8rz, &AArch64::FPR64RegClass, Op0, Op0IsKill);
229
0
  }
230
0
  return 0;
231
0
}
232
233
0
unsigned fastEmit_AArch64ISD_CMGEz_MVT_v16i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
234
0
  if (RetVT.SimpleTy != MVT::v16i8)
235
0
    return 0;
236
0
  if ((Subtarget->hasNEON())) {
237
0
    return fastEmitInst_r(AArch64::CMGEv16i8rz, &AArch64::FPR128RegClass, Op0, Op0IsKill);
238
0
  }
239
0
  return 0;
240
0
}
241
242
0
unsigned fastEmit_AArch64ISD_CMGEz_MVT_v4i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
243
0
  if (RetVT.SimpleTy != MVT::v4i16)
244
0
    return 0;
245
0
  if ((Subtarget->hasNEON())) {
246
0
    return fastEmitInst_r(AArch64::CMGEv4i16rz, &AArch64::FPR64RegClass, Op0, Op0IsKill);
247
0
  }
248
0
  return 0;
249
0
}
250
251
0
unsigned fastEmit_AArch64ISD_CMGEz_MVT_v8i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
252
0
  if (RetVT.SimpleTy != MVT::v8i16)
253
0
    return 0;
254
0
  if ((Subtarget->hasNEON())) {
255
0
    return fastEmitInst_r(AArch64::CMGEv8i16rz, &AArch64::FPR128RegClass, Op0, Op0IsKill);
256
0
  }
257
0
  return 0;
258
0
}
259
260
0
unsigned fastEmit_AArch64ISD_CMGEz_MVT_v2i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
261
0
  if (RetVT.SimpleTy != MVT::v2i32)
262
0
    return 0;
263
0
  if ((Subtarget->hasNEON())) {
264
0
    return fastEmitInst_r(AArch64::CMGEv2i32rz, &AArch64::FPR64RegClass, Op0, Op0IsKill);
265
0
  }
266
0
  return 0;
267
0
}
268
269
0
unsigned fastEmit_AArch64ISD_CMGEz_MVT_v4i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
270
0
  if (RetVT.SimpleTy != MVT::v4i32)
271
0
    return 0;
272
0
  if ((Subtarget->hasNEON())) {
273
0
    return fastEmitInst_r(AArch64::CMGEv4i32rz, &AArch64::FPR128RegClass, Op0, Op0IsKill);
274
0
  }
275
0
  return 0;
276
0
}
277
278
0
unsigned fastEmit_AArch64ISD_CMGEz_MVT_v1i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
279
0
  if (RetVT.SimpleTy != MVT::v1i64)
280
0
    return 0;
281
0
  if ((Subtarget->hasNEON())) {
282
0
    return fastEmitInst_r(AArch64::CMGEv1i64rz, &AArch64::FPR64RegClass, Op0, Op0IsKill);
283
0
  }
284
0
  return 0;
285
0
}
286
287
0
unsigned fastEmit_AArch64ISD_CMGEz_MVT_v2i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
288
0
  if (RetVT.SimpleTy != MVT::v2i64)
289
0
    return 0;
290
0
  if ((Subtarget->hasNEON())) {
291
0
    return fastEmitInst_r(AArch64::CMGEv2i64rz, &AArch64::FPR128RegClass, Op0, Op0IsKill);
292
0
  }
293
0
  return 0;
294
0
}
295
296
unsigned fastEmit_AArch64ISD_CMGEz_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
297
  switch (VT.SimpleTy) {
298
  case MVT::v8i8: return fastEmit_AArch64ISD_CMGEz_MVT_v8i8_r(RetVT, Op0, Op0IsKill);
299
  case MVT::v16i8: return fastEmit_AArch64ISD_CMGEz_MVT_v16i8_r(RetVT, Op0, Op0IsKill);
300
  case MVT::v4i16: return fastEmit_AArch64ISD_CMGEz_MVT_v4i16_r(RetVT, Op0, Op0IsKill);
301
  case MVT::v8i16: return fastEmit_AArch64ISD_CMGEz_MVT_v8i16_r(RetVT, Op0, Op0IsKill);
302
  case MVT::v2i32: return fastEmit_AArch64ISD_CMGEz_MVT_v2i32_r(RetVT, Op0, Op0IsKill);
303
  case MVT::v4i32: return fastEmit_AArch64ISD_CMGEz_MVT_v4i32_r(RetVT, Op0, Op0IsKill);
304
  case MVT::v1i64: return fastEmit_AArch64ISD_CMGEz_MVT_v1i64_r(RetVT, Op0, Op0IsKill);
305
  case MVT::v2i64: return fastEmit_AArch64ISD_CMGEz_MVT_v2i64_r(RetVT, Op0, Op0IsKill);
306
  default: return 0;
307
  }
308
}
309
310
// FastEmit functions for AArch64ISD::CMGTz.
311
312
0
unsigned fastEmit_AArch64ISD_CMGTz_MVT_v8i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
313
0
  if (RetVT.SimpleTy != MVT::v8i8)
314
0
    return 0;
315
0
  if ((Subtarget->hasNEON())) {
316
0
    return fastEmitInst_r(AArch64::CMGTv8i8rz, &AArch64::FPR64RegClass, Op0, Op0IsKill);
317
0
  }
318
0
  return 0;
319
0
}
320
321
0
unsigned fastEmit_AArch64ISD_CMGTz_MVT_v16i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
322
0
  if (RetVT.SimpleTy != MVT::v16i8)
323
0
    return 0;
324
0
  if ((Subtarget->hasNEON())) {
325
0
    return fastEmitInst_r(AArch64::CMGTv16i8rz, &AArch64::FPR128RegClass, Op0, Op0IsKill);
326
0
  }
327
0
  return 0;
328
0
}
329
330
0
unsigned fastEmit_AArch64ISD_CMGTz_MVT_v4i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
331
0
  if (RetVT.SimpleTy != MVT::v4i16)
332
0
    return 0;
333
0
  if ((Subtarget->hasNEON())) {
334
0
    return fastEmitInst_r(AArch64::CMGTv4i16rz, &AArch64::FPR64RegClass, Op0, Op0IsKill);
335
0
  }
336
0
  return 0;
337
0
}
338
339
0
unsigned fastEmit_AArch64ISD_CMGTz_MVT_v8i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
340
0
  if (RetVT.SimpleTy != MVT::v8i16)
341
0
    return 0;
342
0
  if ((Subtarget->hasNEON())) {
343
0
    return fastEmitInst_r(AArch64::CMGTv8i16rz, &AArch64::FPR128RegClass, Op0, Op0IsKill);
344
0
  }
345
0
  return 0;
346
0
}
347
348
0
unsigned fastEmit_AArch64ISD_CMGTz_MVT_v2i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
349
0
  if (RetVT.SimpleTy != MVT::v2i32)
350
0
    return 0;
351
0
  if ((Subtarget->hasNEON())) {
352
0
    return fastEmitInst_r(AArch64::CMGTv2i32rz, &AArch64::FPR64RegClass, Op0, Op0IsKill);
353
0
  }
354
0
  return 0;
355
0
}
356
357
0
unsigned fastEmit_AArch64ISD_CMGTz_MVT_v4i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
358
0
  if (RetVT.SimpleTy != MVT::v4i32)
359
0
    return 0;
360
0
  if ((Subtarget->hasNEON())) {
361
0
    return fastEmitInst_r(AArch64::CMGTv4i32rz, &AArch64::FPR128RegClass, Op0, Op0IsKill);
362
0
  }
363
0
  return 0;
364
0
}
365
366
0
unsigned fastEmit_AArch64ISD_CMGTz_MVT_v1i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
367
0
  if (RetVT.SimpleTy != MVT::v1i64)
368
0
    return 0;
369
0
  if ((Subtarget->hasNEON())) {
370
0
    return fastEmitInst_r(AArch64::CMGTv1i64rz, &AArch64::FPR64RegClass, Op0, Op0IsKill);
371
0
  }
372
0
  return 0;
373
0
}
374
375
0
unsigned fastEmit_AArch64ISD_CMGTz_MVT_v2i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
376
0
  if (RetVT.SimpleTy != MVT::v2i64)
377
0
    return 0;
378
0
  if ((Subtarget->hasNEON())) {
379
0
    return fastEmitInst_r(AArch64::CMGTv2i64rz, &AArch64::FPR128RegClass, Op0, Op0IsKill);
380
0
  }
381
0
  return 0;
382
0
}
383
384
unsigned fastEmit_AArch64ISD_CMGTz_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
385
  switch (VT.SimpleTy) {
386
  case MVT::v8i8: return fastEmit_AArch64ISD_CMGTz_MVT_v8i8_r(RetVT, Op0, Op0IsKill);
387
  case MVT::v16i8: return fastEmit_AArch64ISD_CMGTz_MVT_v16i8_r(RetVT, Op0, Op0IsKill);
388
  case MVT::v4i16: return fastEmit_AArch64ISD_CMGTz_MVT_v4i16_r(RetVT, Op0, Op0IsKill);
389
  case MVT::v8i16: return fastEmit_AArch64ISD_CMGTz_MVT_v8i16_r(RetVT, Op0, Op0IsKill);
390
  case MVT::v2i32: return fastEmit_AArch64ISD_CMGTz_MVT_v2i32_r(RetVT, Op0, Op0IsKill);
391
  case MVT::v4i32: return fastEmit_AArch64ISD_CMGTz_MVT_v4i32_r(RetVT, Op0, Op0IsKill);
392
  case MVT::v1i64: return fastEmit_AArch64ISD_CMGTz_MVT_v1i64_r(RetVT, Op0, Op0IsKill);
393
  case MVT::v2i64: return fastEmit_AArch64ISD_CMGTz_MVT_v2i64_r(RetVT, Op0, Op0IsKill);
394
  default: return 0;
395
  }
396
}
397
398
// FastEmit functions for AArch64ISD::CMLEz.
399
400
0
unsigned fastEmit_AArch64ISD_CMLEz_MVT_v8i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
401
0
  if (RetVT.SimpleTy != MVT::v8i8)
402
0
    return 0;
403
0
  if ((Subtarget->hasNEON())) {
404
0
    return fastEmitInst_r(AArch64::CMLEv8i8rz, &AArch64::FPR64RegClass, Op0, Op0IsKill);
405
0
  }
406
0
  return 0;
407
0
}
408
409
0
unsigned fastEmit_AArch64ISD_CMLEz_MVT_v16i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
410
0
  if (RetVT.SimpleTy != MVT::v16i8)
411
0
    return 0;
412
0
  if ((Subtarget->hasNEON())) {
413
0
    return fastEmitInst_r(AArch64::CMLEv16i8rz, &AArch64::FPR128RegClass, Op0, Op0IsKill);
414
0
  }
415
0
  return 0;
416
0
}
417
418
0
unsigned fastEmit_AArch64ISD_CMLEz_MVT_v4i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
419
0
  if (RetVT.SimpleTy != MVT::v4i16)
420
0
    return 0;
421
0
  if ((Subtarget->hasNEON())) {
422
0
    return fastEmitInst_r(AArch64::CMLEv4i16rz, &AArch64::FPR64RegClass, Op0, Op0IsKill);
423
0
  }
424
0
  return 0;
425
0
}
426
427
0
unsigned fastEmit_AArch64ISD_CMLEz_MVT_v8i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
428
0
  if (RetVT.SimpleTy != MVT::v8i16)
429
0
    return 0;
430
0
  if ((Subtarget->hasNEON())) {
431
0
    return fastEmitInst_r(AArch64::CMLEv8i16rz, &AArch64::FPR128RegClass, Op0, Op0IsKill);
432
0
  }
433
0
  return 0;
434
0
}
435
436
0
unsigned fastEmit_AArch64ISD_CMLEz_MVT_v2i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
437
0
  if (RetVT.SimpleTy != MVT::v2i32)
438
0
    return 0;
439
0
  if ((Subtarget->hasNEON())) {
440
0
    return fastEmitInst_r(AArch64::CMLEv2i32rz, &AArch64::FPR64RegClass, Op0, Op0IsKill);
441
0
  }
442
0
  return 0;
443
0
}
444
445
0
unsigned fastEmit_AArch64ISD_CMLEz_MVT_v4i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
446
0
  if (RetVT.SimpleTy != MVT::v4i32)
447
0
    return 0;
448
0
  if ((Subtarget->hasNEON())) {
449
0
    return fastEmitInst_r(AArch64::CMLEv4i32rz, &AArch64::FPR128RegClass, Op0, Op0IsKill);
450
0
  }
451
0
  return 0;
452
0
}
453
454
0
unsigned fastEmit_AArch64ISD_CMLEz_MVT_v1i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
455
0
  if (RetVT.SimpleTy != MVT::v1i64)
456
0
    return 0;
457
0
  if ((Subtarget->hasNEON())) {
458
0
    return fastEmitInst_r(AArch64::CMLEv1i64rz, &AArch64::FPR64RegClass, Op0, Op0IsKill);
459
0
  }
460
0
  return 0;
461
0
}
462
463
0
unsigned fastEmit_AArch64ISD_CMLEz_MVT_v2i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
464
0
  if (RetVT.SimpleTy != MVT::v2i64)
465
0
    return 0;
466
0
  if ((Subtarget->hasNEON())) {
467
0
    return fastEmitInst_r(AArch64::CMLEv2i64rz, &AArch64::FPR128RegClass, Op0, Op0IsKill);
468
0
  }
469
0
  return 0;
470
0
}
471
472
unsigned fastEmit_AArch64ISD_CMLEz_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
473
  switch (VT.SimpleTy) {
474
  case MVT::v8i8: return fastEmit_AArch64ISD_CMLEz_MVT_v8i8_r(RetVT, Op0, Op0IsKill);
475
  case MVT::v16i8: return fastEmit_AArch64ISD_CMLEz_MVT_v16i8_r(RetVT, Op0, Op0IsKill);
476
  case MVT::v4i16: return fastEmit_AArch64ISD_CMLEz_MVT_v4i16_r(RetVT, Op0, Op0IsKill);
477
  case MVT::v8i16: return fastEmit_AArch64ISD_CMLEz_MVT_v8i16_r(RetVT, Op0, Op0IsKill);
478
  case MVT::v2i32: return fastEmit_AArch64ISD_CMLEz_MVT_v2i32_r(RetVT, Op0, Op0IsKill);
479
  case MVT::v4i32: return fastEmit_AArch64ISD_CMLEz_MVT_v4i32_r(RetVT, Op0, Op0IsKill);
480
  case MVT::v1i64: return fastEmit_AArch64ISD_CMLEz_MVT_v1i64_r(RetVT, Op0, Op0IsKill);
481
  case MVT::v2i64: return fastEmit_AArch64ISD_CMLEz_MVT_v2i64_r(RetVT, Op0, Op0IsKill);
482
  default: return 0;
483
  }
484
}
485
486
// FastEmit functions for AArch64ISD::CMLTz.
487
488
0
unsigned fastEmit_AArch64ISD_CMLTz_MVT_v8i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
489
0
  if (RetVT.SimpleTy != MVT::v8i8)
490
0
    return 0;
491
0
  if ((Subtarget->hasNEON())) {
492
0
    return fastEmitInst_r(AArch64::CMLTv8i8rz, &AArch64::FPR64RegClass, Op0, Op0IsKill);
493
0
  }
494
0
  return 0;
495
0
}
496
497
0
unsigned fastEmit_AArch64ISD_CMLTz_MVT_v16i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
498
0
  if (RetVT.SimpleTy != MVT::v16i8)
499
0
    return 0;
500
0
  if ((Subtarget->hasNEON())) {
501
0
    return fastEmitInst_r(AArch64::CMLTv16i8rz, &AArch64::FPR128RegClass, Op0, Op0IsKill);
502
0
  }
503
0
  return 0;
504
0
}
505
506
0
unsigned fastEmit_AArch64ISD_CMLTz_MVT_v4i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
507
0
  if (RetVT.SimpleTy != MVT::v4i16)
508
0
    return 0;
509
0
  if ((Subtarget->hasNEON())) {
510
0
    return fastEmitInst_r(AArch64::CMLTv4i16rz, &AArch64::FPR64RegClass, Op0, Op0IsKill);
511
0
  }
512
0
  return 0;
513
0
}
514
515
0
unsigned fastEmit_AArch64ISD_CMLTz_MVT_v8i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
516
0
  if (RetVT.SimpleTy != MVT::v8i16)
517
0
    return 0;
518
0
  if ((Subtarget->hasNEON())) {
519
0
    return fastEmitInst_r(AArch64::CMLTv8i16rz, &AArch64::FPR128RegClass, Op0, Op0IsKill);
520
0
  }
521
0
  return 0;
522
0
}
523
524
0
unsigned fastEmit_AArch64ISD_CMLTz_MVT_v2i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
525
0
  if (RetVT.SimpleTy != MVT::v2i32)
526
0
    return 0;
527
0
  if ((Subtarget->hasNEON())) {
528
0
    return fastEmitInst_r(AArch64::CMLTv2i32rz, &AArch64::FPR64RegClass, Op0, Op0IsKill);
529
0
  }
530
0
  return 0;
531
0
}
532
533
0
unsigned fastEmit_AArch64ISD_CMLTz_MVT_v4i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
534
0
  if (RetVT.SimpleTy != MVT::v4i32)
535
0
    return 0;
536
0
  if ((Subtarget->hasNEON())) {
537
0
    return fastEmitInst_r(AArch64::CMLTv4i32rz, &AArch64::FPR128RegClass, Op0, Op0IsKill);
538
0
  }
539
0
  return 0;
540
0
}
541
542
0
unsigned fastEmit_AArch64ISD_CMLTz_MVT_v1i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
543
0
  if (RetVT.SimpleTy != MVT::v1i64)
544
0
    return 0;
545
0
  if ((Subtarget->hasNEON())) {
546
0
    return fastEmitInst_r(AArch64::CMLTv1i64rz, &AArch64::FPR64RegClass, Op0, Op0IsKill);
547
0
  }
548
0
  return 0;
549
0
}
550
551
0
unsigned fastEmit_AArch64ISD_CMLTz_MVT_v2i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
552
0
  if (RetVT.SimpleTy != MVT::v2i64)
553
0
    return 0;
554
0
  if ((Subtarget->hasNEON())) {
555
0
    return fastEmitInst_r(AArch64::CMLTv2i64rz, &AArch64::FPR128RegClass, Op0, Op0IsKill);
556
0
  }
557
0
  return 0;
558
0
}
559
560
unsigned fastEmit_AArch64ISD_CMLTz_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
561
  switch (VT.SimpleTy) {
562
  case MVT::v8i8: return fastEmit_AArch64ISD_CMLTz_MVT_v8i8_r(RetVT, Op0, Op0IsKill);
563
  case MVT::v16i8: return fastEmit_AArch64ISD_CMLTz_MVT_v16i8_r(RetVT, Op0, Op0IsKill);
564
  case MVT::v4i16: return fastEmit_AArch64ISD_CMLTz_MVT_v4i16_r(RetVT, Op0, Op0IsKill);
565
  case MVT::v8i16: return fastEmit_AArch64ISD_CMLTz_MVT_v8i16_r(RetVT, Op0, Op0IsKill);
566
  case MVT::v2i32: return fastEmit_AArch64ISD_CMLTz_MVT_v2i32_r(RetVT, Op0, Op0IsKill);
567
  case MVT::v4i32: return fastEmit_AArch64ISD_CMLTz_MVT_v4i32_r(RetVT, Op0, Op0IsKill);
568
  case MVT::v1i64: return fastEmit_AArch64ISD_CMLTz_MVT_v1i64_r(RetVT, Op0, Op0IsKill);
569
  case MVT::v2i64: return fastEmit_AArch64ISD_CMLTz_MVT_v2i64_r(RetVT, Op0, Op0IsKill);
570
  default: return 0;
571
  }
572
}
573
574
// FastEmit functions for AArch64ISD::DUP.
575
576
0
unsigned fastEmit_AArch64ISD_DUP_MVT_i32_MVT_v8i8_r(unsigned Op0, bool Op0IsKill) {
577
0
  if ((Subtarget->hasNEON())) {
578
0
    return fastEmitInst_r(AArch64::DUPv8i8gpr, &AArch64::FPR64RegClass, Op0, Op0IsKill);
579
0
  }
580
0
  return 0;
581
0
}
582
583
0
unsigned fastEmit_AArch64ISD_DUP_MVT_i32_MVT_v16i8_r(unsigned Op0, bool Op0IsKill) {
584
0
  if ((Subtarget->hasNEON())) {
585
0
    return fastEmitInst_r(AArch64::DUPv16i8gpr, &AArch64::FPR128RegClass, Op0, Op0IsKill);
586
0
  }
587
0
  return 0;
588
0
}
589
590
0
unsigned fastEmit_AArch64ISD_DUP_MVT_i32_MVT_v4i16_r(unsigned Op0, bool Op0IsKill) {
591
0
  if ((Subtarget->hasNEON())) {
592
0
    return fastEmitInst_r(AArch64::DUPv4i16gpr, &AArch64::FPR64RegClass, Op0, Op0IsKill);
593
0
  }
594
0
  return 0;
595
0
}
596
597
0
unsigned fastEmit_AArch64ISD_DUP_MVT_i32_MVT_v8i16_r(unsigned Op0, bool Op0IsKill) {
598
0
  if ((Subtarget->hasNEON())) {
599
0
    return fastEmitInst_r(AArch64::DUPv8i16gpr, &AArch64::FPR128RegClass, Op0, Op0IsKill);
600
0
  }
601
0
  return 0;
602
0
}
603
604
0
unsigned fastEmit_AArch64ISD_DUP_MVT_i32_MVT_v2i32_r(unsigned Op0, bool Op0IsKill) {
605
0
  if ((Subtarget->hasNEON())) {
606
0
    return fastEmitInst_r(AArch64::DUPv2i32gpr, &AArch64::FPR64RegClass, Op0, Op0IsKill);
607
0
  }
608
0
  return 0;
609
0
}
610
611
0
unsigned fastEmit_AArch64ISD_DUP_MVT_i32_MVT_v4i32_r(unsigned Op0, bool Op0IsKill) {
612
0
  if ((Subtarget->hasNEON())) {
613
0
    return fastEmitInst_r(AArch64::DUPv4i32gpr, &AArch64::FPR128RegClass, Op0, Op0IsKill);
614
0
  }
615
0
  return 0;
616
0
}
617
618
unsigned fastEmit_AArch64ISD_DUP_MVT_i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
619
switch (RetVT.SimpleTy) {
620
  case MVT::v8i8: return fastEmit_AArch64ISD_DUP_MVT_i32_MVT_v8i8_r(Op0, Op0IsKill);
621
  case MVT::v16i8: return fastEmit_AArch64ISD_DUP_MVT_i32_MVT_v16i8_r(Op0, Op0IsKill);
622
  case MVT::v4i16: return fastEmit_AArch64ISD_DUP_MVT_i32_MVT_v4i16_r(Op0, Op0IsKill);
623
  case MVT::v8i16: return fastEmit_AArch64ISD_DUP_MVT_i32_MVT_v8i16_r(Op0, Op0IsKill);
624
  case MVT::v2i32: return fastEmit_AArch64ISD_DUP_MVT_i32_MVT_v2i32_r(Op0, Op0IsKill);
625
  case MVT::v4i32: return fastEmit_AArch64ISD_DUP_MVT_i32_MVT_v4i32_r(Op0, Op0IsKill);
626
  default: return 0;
627
}
628
}
629
630
0
unsigned fastEmit_AArch64ISD_DUP_MVT_i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
631
0
  if (RetVT.SimpleTy != MVT::v2i64)
632
0
    return 0;
633
0
  if ((Subtarget->hasNEON())) {
634
0
    return fastEmitInst_r(AArch64::DUPv2i64gpr, &AArch64::FPR128RegClass, Op0, Op0IsKill);
635
0
  }
636
0
  return 0;
637
0
}
638
639
unsigned fastEmit_AArch64ISD_DUP_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
640
  switch (VT.SimpleTy) {
641
  case MVT::i32: return fastEmit_AArch64ISD_DUP_MVT_i32_r(RetVT, Op0, Op0IsKill);
642
  case MVT::i64: return fastEmit_AArch64ISD_DUP_MVT_i64_r(RetVT, Op0, Op0IsKill);
643
  default: return 0;
644
  }
645
}
646
647
// FastEmit functions for AArch64ISD::FCMEQz.
648
649
0
unsigned fastEmit_AArch64ISD_FCMEQz_MVT_v4f16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
650
0
  if (RetVT.SimpleTy != MVT::v4i16)
651
0
    return 0;
652
0
  if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) {
653
0
    return fastEmitInst_r(AArch64::FCMEQv4i16rz, &AArch64::FPR64RegClass, Op0, Op0IsKill);
654
0
  }
655
0
  return 0;
656
0
}
657
658
0
unsigned fastEmit_AArch64ISD_FCMEQz_MVT_v8f16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
659
0
  if (RetVT.SimpleTy != MVT::v8i16)
660
0
    return 0;
661
0
  if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) {
662
0
    return fastEmitInst_r(AArch64::FCMEQv8i16rz, &AArch64::FPR128RegClass, Op0, Op0IsKill);
663
0
  }
664
0
  return 0;
665
0
}
666
667
0
unsigned fastEmit_AArch64ISD_FCMEQz_MVT_v2f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
668
0
  if (RetVT.SimpleTy != MVT::v2i32)
669
0
    return 0;
670
0
  if ((Subtarget->hasNEON())) {
671
0
    return fastEmitInst_r(AArch64::FCMEQv2i32rz, &AArch64::FPR64RegClass, Op0, Op0IsKill);
672
0
  }
673
0
  return 0;
674
0
}
675
676
0
unsigned fastEmit_AArch64ISD_FCMEQz_MVT_v4f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
677
0
  if (RetVT.SimpleTy != MVT::v4i32)
678
0
    return 0;
679
0
  if ((Subtarget->hasNEON())) {
680
0
    return fastEmitInst_r(AArch64::FCMEQv4i32rz, &AArch64::FPR128RegClass, Op0, Op0IsKill);
681
0
  }
682
0
  return 0;
683
0
}
684
685
0
unsigned fastEmit_AArch64ISD_FCMEQz_MVT_v1f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
686
0
  if (RetVT.SimpleTy != MVT::v1i64)
687
0
    return 0;
688
0
  if ((Subtarget->hasNEON())) {
689
0
    return fastEmitInst_r(AArch64::FCMEQv1i64rz, &AArch64::FPR64RegClass, Op0, Op0IsKill);
690
0
  }
691
0
  return 0;
692
0
}
693
694
0
unsigned fastEmit_AArch64ISD_FCMEQz_MVT_v2f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
695
0
  if (RetVT.SimpleTy != MVT::v2i64)
696
0
    return 0;
697
0
  if ((Subtarget->hasNEON())) {
698
0
    return fastEmitInst_r(AArch64::FCMEQv2i64rz, &AArch64::FPR128RegClass, Op0, Op0IsKill);
699
0
  }
700
0
  return 0;
701
0
}
702
703
unsigned fastEmit_AArch64ISD_FCMEQz_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
704
  switch (VT.SimpleTy) {
705
  case MVT::v4f16: return fastEmit_AArch64ISD_FCMEQz_MVT_v4f16_r(RetVT, Op0, Op0IsKill);
706
  case MVT::v8f16: return fastEmit_AArch64ISD_FCMEQz_MVT_v8f16_r(RetVT, Op0, Op0IsKill);
707
  case MVT::v2f32: return fastEmit_AArch64ISD_FCMEQz_MVT_v2f32_r(RetVT, Op0, Op0IsKill);
708
  case MVT::v4f32: return fastEmit_AArch64ISD_FCMEQz_MVT_v4f32_r(RetVT, Op0, Op0IsKill);
709
  case MVT::v1f64: return fastEmit_AArch64ISD_FCMEQz_MVT_v1f64_r(RetVT, Op0, Op0IsKill);
710
  case MVT::v2f64: return fastEmit_AArch64ISD_FCMEQz_MVT_v2f64_r(RetVT, Op0, Op0IsKill);
711
  default: return 0;
712
  }
713
}
714
715
// FastEmit functions for AArch64ISD::FCMGEz.
716
717
0
unsigned fastEmit_AArch64ISD_FCMGEz_MVT_v4f16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
718
0
  if (RetVT.SimpleTy != MVT::v4i16)
719
0
    return 0;
720
0
  if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) {
721
0
    return fastEmitInst_r(AArch64::FCMGEv4i16rz, &AArch64::FPR64RegClass, Op0, Op0IsKill);
722
0
  }
723
0
  return 0;
724
0
}
725
726
0
unsigned fastEmit_AArch64ISD_FCMGEz_MVT_v8f16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
727
0
  if (RetVT.SimpleTy != MVT::v8i16)
728
0
    return 0;
729
0
  if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) {
730
0
    return fastEmitInst_r(AArch64::FCMGEv8i16rz, &AArch64::FPR128RegClass, Op0, Op0IsKill);
731
0
  }
732
0
  return 0;
733
0
}
734
735
0
unsigned fastEmit_AArch64ISD_FCMGEz_MVT_v2f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
736
0
  if (RetVT.SimpleTy != MVT::v2i32)
737
0
    return 0;
738
0
  if ((Subtarget->hasNEON())) {
739
0
    return fastEmitInst_r(AArch64::FCMGEv2i32rz, &AArch64::FPR64RegClass, Op0, Op0IsKill);
740
0
  }
741
0
  return 0;
742
0
}
743
744
0
unsigned fastEmit_AArch64ISD_FCMGEz_MVT_v4f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
745
0
  if (RetVT.SimpleTy != MVT::v4i32)
746
0
    return 0;
747
0
  if ((Subtarget->hasNEON())) {
748
0
    return fastEmitInst_r(AArch64::FCMGEv4i32rz, &AArch64::FPR128RegClass, Op0, Op0IsKill);
749
0
  }
750
0
  return 0;
751
0
}
752
753
0
unsigned fastEmit_AArch64ISD_FCMGEz_MVT_v1f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
754
0
  if (RetVT.SimpleTy != MVT::v1i64)
755
0
    return 0;
756
0
  if ((Subtarget->hasNEON())) {
757
0
    return fastEmitInst_r(AArch64::FCMGEv1i64rz, &AArch64::FPR64RegClass, Op0, Op0IsKill);
758
0
  }
759
0
  return 0;
760
0
}
761
762
0
unsigned fastEmit_AArch64ISD_FCMGEz_MVT_v2f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
763
0
  if (RetVT.SimpleTy != MVT::v2i64)
764
0
    return 0;
765
0
  if ((Subtarget->hasNEON())) {
766
0
    return fastEmitInst_r(AArch64::FCMGEv2i64rz, &AArch64::FPR128RegClass, Op0, Op0IsKill);
767
0
  }
768
0
  return 0;
769
0
}
770
771
unsigned fastEmit_AArch64ISD_FCMGEz_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
772
  switch (VT.SimpleTy) {
773
  case MVT::v4f16: return fastEmit_AArch64ISD_FCMGEz_MVT_v4f16_r(RetVT, Op0, Op0IsKill);
774
  case MVT::v8f16: return fastEmit_AArch64ISD_FCMGEz_MVT_v8f16_r(RetVT, Op0, Op0IsKill);
775
  case MVT::v2f32: return fastEmit_AArch64ISD_FCMGEz_MVT_v2f32_r(RetVT, Op0, Op0IsKill);
776
  case MVT::v4f32: return fastEmit_AArch64ISD_FCMGEz_MVT_v4f32_r(RetVT, Op0, Op0IsKill);
777
  case MVT::v1f64: return fastEmit_AArch64ISD_FCMGEz_MVT_v1f64_r(RetVT, Op0, Op0IsKill);
778
  case MVT::v2f64: return fastEmit_AArch64ISD_FCMGEz_MVT_v2f64_r(RetVT, Op0, Op0IsKill);
779
  default: return 0;
780
  }
781
}
782
783
// FastEmit functions for AArch64ISD::FCMGTz.
784
785
0
unsigned fastEmit_AArch64ISD_FCMGTz_MVT_v4f16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
786
0
  if (RetVT.SimpleTy != MVT::v4i16)
787
0
    return 0;
788
0
  if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) {
789
0
    return fastEmitInst_r(AArch64::FCMGTv4i16rz, &AArch64::FPR64RegClass, Op0, Op0IsKill);
790
0
  }
791
0
  return 0;
792
0
}
793
794
0
unsigned fastEmit_AArch64ISD_FCMGTz_MVT_v8f16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
795
0
  if (RetVT.SimpleTy != MVT::v8i16)
796
0
    return 0;
797
0
  if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) {
798
0
    return fastEmitInst_r(AArch64::FCMGTv8i16rz, &AArch64::FPR128RegClass, Op0, Op0IsKill);
799
0
  }
800
0
  return 0;
801
0
}
802
803
0
unsigned fastEmit_AArch64ISD_FCMGTz_MVT_v2f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
804
0
  if (RetVT.SimpleTy != MVT::v2i32)
805
0
    return 0;
806
0
  if ((Subtarget->hasNEON())) {
807
0
    return fastEmitInst_r(AArch64::FCMGTv2i32rz, &AArch64::FPR64RegClass, Op0, Op0IsKill);
808
0
  }
809
0
  return 0;
810
0
}
811
812
0
unsigned fastEmit_AArch64ISD_FCMGTz_MVT_v4f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
813
0
  if (RetVT.SimpleTy != MVT::v4i32)
814
0
    return 0;
815
0
  if ((Subtarget->hasNEON())) {
816
0
    return fastEmitInst_r(AArch64::FCMGTv4i32rz, &AArch64::FPR128RegClass, Op0, Op0IsKill);
817
0
  }
818
0
  return 0;
819
0
}
820
821
0
unsigned fastEmit_AArch64ISD_FCMGTz_MVT_v1f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
822
0
  if (RetVT.SimpleTy != MVT::v1i64)
823
0
    return 0;
824
0
  if ((Subtarget->hasNEON())) {
825
0
    return fastEmitInst_r(AArch64::FCMGTv1i64rz, &AArch64::FPR64RegClass, Op0, Op0IsKill);
826
0
  }
827
0
  return 0;
828
0
}
829
830
0
unsigned fastEmit_AArch64ISD_FCMGTz_MVT_v2f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
831
0
  if (RetVT.SimpleTy != MVT::v2i64)
832
0
    return 0;
833
0
  if ((Subtarget->hasNEON())) {
834
0
    return fastEmitInst_r(AArch64::FCMGTv2i64rz, &AArch64::FPR128RegClass, Op0, Op0IsKill);
835
0
  }
836
0
  return 0;
837
0
}
838
839
unsigned fastEmit_AArch64ISD_FCMGTz_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
840
  switch (VT.SimpleTy) {
841
  case MVT::v4f16: return fastEmit_AArch64ISD_FCMGTz_MVT_v4f16_r(RetVT, Op0, Op0IsKill);
842
  case MVT::v8f16: return fastEmit_AArch64ISD_FCMGTz_MVT_v8f16_r(RetVT, Op0, Op0IsKill);
843
  case MVT::v2f32: return fastEmit_AArch64ISD_FCMGTz_MVT_v2f32_r(RetVT, Op0, Op0IsKill);
844
  case MVT::v4f32: return fastEmit_AArch64ISD_FCMGTz_MVT_v4f32_r(RetVT, Op0, Op0IsKill);
845
  case MVT::v1f64: return fastEmit_AArch64ISD_FCMGTz_MVT_v1f64_r(RetVT, Op0, Op0IsKill);
846
  case MVT::v2f64: return fastEmit_AArch64ISD_FCMGTz_MVT_v2f64_r(RetVT, Op0, Op0IsKill);
847
  default: return 0;
848
  }
849
}
850
851
// FastEmit functions for AArch64ISD::FCMLEz.
852
853
0
unsigned fastEmit_AArch64ISD_FCMLEz_MVT_v4f16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
854
0
  if (RetVT.SimpleTy != MVT::v4i16)
855
0
    return 0;
856
0
  if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) {
857
0
    return fastEmitInst_r(AArch64::FCMLEv4i16rz, &AArch64::FPR64RegClass, Op0, Op0IsKill);
858
0
  }
859
0
  return 0;
860
0
}
861
862
0
unsigned fastEmit_AArch64ISD_FCMLEz_MVT_v8f16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
863
0
  if (RetVT.SimpleTy != MVT::v8i16)
864
0
    return 0;
865
0
  if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) {
866
0
    return fastEmitInst_r(AArch64::FCMLEv8i16rz, &AArch64::FPR128RegClass, Op0, Op0IsKill);
867
0
  }
868
0
  return 0;
869
0
}
870
871
0
unsigned fastEmit_AArch64ISD_FCMLEz_MVT_v2f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
872
0
  if (RetVT.SimpleTy != MVT::v2i32)
873
0
    return 0;
874
0
  if ((Subtarget->hasNEON())) {
875
0
    return fastEmitInst_r(AArch64::FCMLEv2i32rz, &AArch64::FPR64RegClass, Op0, Op0IsKill);
876
0
  }
877
0
  return 0;
878
0
}
879
880
0
unsigned fastEmit_AArch64ISD_FCMLEz_MVT_v4f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
881
0
  if (RetVT.SimpleTy != MVT::v4i32)
882
0
    return 0;
883
0
  if ((Subtarget->hasNEON())) {
884
0
    return fastEmitInst_r(AArch64::FCMLEv4i32rz, &AArch64::FPR128RegClass, Op0, Op0IsKill);
885
0
  }
886
0
  return 0;
887
0
}
888
889
0
unsigned fastEmit_AArch64ISD_FCMLEz_MVT_v1f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
890
0
  if (RetVT.SimpleTy != MVT::v1i64)
891
0
    return 0;
892
0
  if ((Subtarget->hasNEON())) {
893
0
    return fastEmitInst_r(AArch64::FCMLEv1i64rz, &AArch64::FPR64RegClass, Op0, Op0IsKill);
894
0
  }
895
0
  return 0;
896
0
}
897
898
0
unsigned fastEmit_AArch64ISD_FCMLEz_MVT_v2f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
899
0
  if (RetVT.SimpleTy != MVT::v2i64)
900
0
    return 0;
901
0
  if ((Subtarget->hasNEON())) {
902
0
    return fastEmitInst_r(AArch64::FCMLEv2i64rz, &AArch64::FPR128RegClass, Op0, Op0IsKill);
903
0
  }
904
0
  return 0;
905
0
}
906
907
unsigned fastEmit_AArch64ISD_FCMLEz_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
908
  switch (VT.SimpleTy) {
909
  case MVT::v4f16: return fastEmit_AArch64ISD_FCMLEz_MVT_v4f16_r(RetVT, Op0, Op0IsKill);
910
  case MVT::v8f16: return fastEmit_AArch64ISD_FCMLEz_MVT_v8f16_r(RetVT, Op0, Op0IsKill);
911
  case MVT::v2f32: return fastEmit_AArch64ISD_FCMLEz_MVT_v2f32_r(RetVT, Op0, Op0IsKill);
912
  case MVT::v4f32: return fastEmit_AArch64ISD_FCMLEz_MVT_v4f32_r(RetVT, Op0, Op0IsKill);
913
  case MVT::v1f64: return fastEmit_AArch64ISD_FCMLEz_MVT_v1f64_r(RetVT, Op0, Op0IsKill);
914
  case MVT::v2f64: return fastEmit_AArch64ISD_FCMLEz_MVT_v2f64_r(RetVT, Op0, Op0IsKill);
915
  default: return 0;
916
  }
917
}
918
919
// FastEmit functions for AArch64ISD::FCMLTz.
920
921
0
unsigned fastEmit_AArch64ISD_FCMLTz_MVT_v4f16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
922
0
  if (RetVT.SimpleTy != MVT::v4i16)
923
0
    return 0;
924
0
  if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) {
925
0
    return fastEmitInst_r(AArch64::FCMLTv4i16rz, &AArch64::FPR64RegClass, Op0, Op0IsKill);
926
0
  }
927
0
  return 0;
928
0
}
929
930
0
unsigned fastEmit_AArch64ISD_FCMLTz_MVT_v8f16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
931
0
  if (RetVT.SimpleTy != MVT::v8i16)
932
0
    return 0;
933
0
  if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) {
934
0
    return fastEmitInst_r(AArch64::FCMLTv8i16rz, &AArch64::FPR128RegClass, Op0, Op0IsKill);
935
0
  }
936
0
  return 0;
937
0
}
938
939
0
unsigned fastEmit_AArch64ISD_FCMLTz_MVT_v2f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
940
0
  if (RetVT.SimpleTy != MVT::v2i32)
941
0
    return 0;
942
0
  if ((Subtarget->hasNEON())) {
943
0
    return fastEmitInst_r(AArch64::FCMLTv2i32rz, &AArch64::FPR64RegClass, Op0, Op0IsKill);
944
0
  }
945
0
  return 0;
946
0
}
947
948
0
unsigned fastEmit_AArch64ISD_FCMLTz_MVT_v4f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
949
0
  if (RetVT.SimpleTy != MVT::v4i32)
950
0
    return 0;
951
0
  if ((Subtarget->hasNEON())) {
952
0
    return fastEmitInst_r(AArch64::FCMLTv4i32rz, &AArch64::FPR128RegClass, Op0, Op0IsKill);
953
0
  }
954
0
  return 0;
955
0
}
956
957
0
unsigned fastEmit_AArch64ISD_FCMLTz_MVT_v1f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
958
0
  if (RetVT.SimpleTy != MVT::v1i64)
959
0
    return 0;
960
0
  if ((Subtarget->hasNEON())) {
961
0
    return fastEmitInst_r(AArch64::FCMLTv1i64rz, &AArch64::FPR64RegClass, Op0, Op0IsKill);
962
0
  }
963
0
  return 0;
964
0
}
965
966
0
unsigned fastEmit_AArch64ISD_FCMLTz_MVT_v2f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
967
0
  if (RetVT.SimpleTy != MVT::v2i64)
968
0
    return 0;
969
0
  if ((Subtarget->hasNEON())) {
970
0
    return fastEmitInst_r(AArch64::FCMLTv2i64rz, &AArch64::FPR128RegClass, Op0, Op0IsKill);
971
0
  }
972
0
  return 0;
973
0
}
974
975
unsigned fastEmit_AArch64ISD_FCMLTz_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
976
  switch (VT.SimpleTy) {
977
  case MVT::v4f16: return fastEmit_AArch64ISD_FCMLTz_MVT_v4f16_r(RetVT, Op0, Op0IsKill);
978
  case MVT::v8f16: return fastEmit_AArch64ISD_FCMLTz_MVT_v8f16_r(RetVT, Op0, Op0IsKill);
979
  case MVT::v2f32: return fastEmit_AArch64ISD_FCMLTz_MVT_v2f32_r(RetVT, Op0, Op0IsKill);
980
  case MVT::v4f32: return fastEmit_AArch64ISD_FCMLTz_MVT_v4f32_r(RetVT, Op0, Op0IsKill);
981
  case MVT::v1f64: return fastEmit_AArch64ISD_FCMLTz_MVT_v1f64_r(RetVT, Op0, Op0IsKill);
982
  case MVT::v2f64: return fastEmit_AArch64ISD_FCMLTz_MVT_v2f64_r(RetVT, Op0, Op0IsKill);
983
  default: return 0;
984
  }
985
}
986
987
// FastEmit functions for AArch64ISD::FRECPE.
988
989
0
unsigned fastEmit_AArch64ISD_FRECPE_MVT_f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
990
0
  if (RetVT.SimpleTy != MVT::f32)
991
0
    return 0;
992
0
  return fastEmitInst_r(AArch64::FRECPEv1i32, &AArch64::FPR32RegClass, Op0, Op0IsKill);
993
0
}
994
995
0
unsigned fastEmit_AArch64ISD_FRECPE_MVT_f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
996
0
  if (RetVT.SimpleTy != MVT::f64)
997
0
    return 0;
998
0
  return fastEmitInst_r(AArch64::FRECPEv1i64, &AArch64::FPR64RegClass, Op0, Op0IsKill);
999
0
}
1000
1001
0
unsigned fastEmit_AArch64ISD_FRECPE_MVT_v2f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1002
0
  if (RetVT.SimpleTy != MVT::v2f32)
1003
0
    return 0;
1004
0
  return fastEmitInst_r(AArch64::FRECPEv2f32, &AArch64::FPR64RegClass, Op0, Op0IsKill);
1005
0
}
1006
1007
0
unsigned fastEmit_AArch64ISD_FRECPE_MVT_v4f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1008
0
  if (RetVT.SimpleTy != MVT::v4f32)
1009
0
    return 0;
1010
0
  return fastEmitInst_r(AArch64::FRECPEv4f32, &AArch64::FPR128RegClass, Op0, Op0IsKill);
1011
0
}
1012
1013
0
unsigned fastEmit_AArch64ISD_FRECPE_MVT_v1f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1014
0
  if (RetVT.SimpleTy != MVT::v1f64)
1015
0
    return 0;
1016
0
  return fastEmitInst_r(AArch64::FRECPEv1i64, &AArch64::FPR64RegClass, Op0, Op0IsKill);
1017
0
}
1018
1019
0
unsigned fastEmit_AArch64ISD_FRECPE_MVT_v2f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1020
0
  if (RetVT.SimpleTy != MVT::v2f64)
1021
0
    return 0;
1022
0
  return fastEmitInst_r(AArch64::FRECPEv2f64, &AArch64::FPR128RegClass, Op0, Op0IsKill);
1023
0
}
1024
1025
unsigned fastEmit_AArch64ISD_FRECPE_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
1026
  switch (VT.SimpleTy) {
1027
  case MVT::f32: return fastEmit_AArch64ISD_FRECPE_MVT_f32_r(RetVT, Op0, Op0IsKill);
1028
  case MVT::f64: return fastEmit_AArch64ISD_FRECPE_MVT_f64_r(RetVT, Op0, Op0IsKill);
1029
  case MVT::v2f32: return fastEmit_AArch64ISD_FRECPE_MVT_v2f32_r(RetVT, Op0, Op0IsKill);
1030
  case MVT::v4f32: return fastEmit_AArch64ISD_FRECPE_MVT_v4f32_r(RetVT, Op0, Op0IsKill);
1031
  case MVT::v1f64: return fastEmit_AArch64ISD_FRECPE_MVT_v1f64_r(RetVT, Op0, Op0IsKill);
1032
  case MVT::v2f64: return fastEmit_AArch64ISD_FRECPE_MVT_v2f64_r(RetVT, Op0, Op0IsKill);
1033
  default: return 0;
1034
  }
1035
}
1036
1037
// FastEmit functions for AArch64ISD::FRSQRTE.
1038
1039
0
unsigned fastEmit_AArch64ISD_FRSQRTE_MVT_f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1040
0
  if (RetVT.SimpleTy != MVT::f32)
1041
0
    return 0;
1042
0
  return fastEmitInst_r(AArch64::FRSQRTEv1i32, &AArch64::FPR32RegClass, Op0, Op0IsKill);
1043
0
}
1044
1045
0
unsigned fastEmit_AArch64ISD_FRSQRTE_MVT_f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1046
0
  if (RetVT.SimpleTy != MVT::f64)
1047
0
    return 0;
1048
0
  return fastEmitInst_r(AArch64::FRSQRTEv1i64, &AArch64::FPR64RegClass, Op0, Op0IsKill);
1049
0
}
1050
1051
0
unsigned fastEmit_AArch64ISD_FRSQRTE_MVT_v2f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1052
0
  if (RetVT.SimpleTy != MVT::v2f32)
1053
0
    return 0;
1054
0
  return fastEmitInst_r(AArch64::FRSQRTEv2f32, &AArch64::FPR64RegClass, Op0, Op0IsKill);
1055
0
}
1056
1057
0
unsigned fastEmit_AArch64ISD_FRSQRTE_MVT_v4f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1058
0
  if (RetVT.SimpleTy != MVT::v4f32)
1059
0
    return 0;
1060
0
  return fastEmitInst_r(AArch64::FRSQRTEv4f32, &AArch64::FPR128RegClass, Op0, Op0IsKill);
1061
0
}
1062
1063
0
unsigned fastEmit_AArch64ISD_FRSQRTE_MVT_v1f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1064
0
  if (RetVT.SimpleTy != MVT::v1f64)
1065
0
    return 0;
1066
0
  return fastEmitInst_r(AArch64::FRSQRTEv1i64, &AArch64::FPR64RegClass, Op0, Op0IsKill);
1067
0
}
1068
1069
0
unsigned fastEmit_AArch64ISD_FRSQRTE_MVT_v2f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1070
0
  if (RetVT.SimpleTy != MVT::v2f64)
1071
0
    return 0;
1072
0
  return fastEmitInst_r(AArch64::FRSQRTEv2f64, &AArch64::FPR128RegClass, Op0, Op0IsKill);
1073
0
}
1074
1075
unsigned fastEmit_AArch64ISD_FRSQRTE_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
1076
  switch (VT.SimpleTy) {
1077
  case MVT::f32: return fastEmit_AArch64ISD_FRSQRTE_MVT_f32_r(RetVT, Op0, Op0IsKill);
1078
  case MVT::f64: return fastEmit_AArch64ISD_FRSQRTE_MVT_f64_r(RetVT, Op0, Op0IsKill);
1079
  case MVT::v2f32: return fastEmit_AArch64ISD_FRSQRTE_MVT_v2f32_r(RetVT, Op0, Op0IsKill);
1080
  case MVT::v4f32: return fastEmit_AArch64ISD_FRSQRTE_MVT_v4f32_r(RetVT, Op0, Op0IsKill);
1081
  case MVT::v1f64: return fastEmit_AArch64ISD_FRSQRTE_MVT_v1f64_r(RetVT, Op0, Op0IsKill);
1082
  case MVT::v2f64: return fastEmit_AArch64ISD_FRSQRTE_MVT_v2f64_r(RetVT, Op0, Op0IsKill);
1083
  default: return 0;
1084
  }
1085
}
1086
1087
// FastEmit functions for AArch64ISD::NEG.
1088
1089
0
unsigned fastEmit_AArch64ISD_NEG_MVT_v8i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1090
0
  if (RetVT.SimpleTy != MVT::v8i8)
1091
0
    return 0;
1092
0
  return fastEmitInst_r(AArch64::NEGv8i8, &AArch64::FPR64RegClass, Op0, Op0IsKill);
1093
0
}
1094
1095
0
unsigned fastEmit_AArch64ISD_NEG_MVT_v16i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1096
0
  if (RetVT.SimpleTy != MVT::v16i8)
1097
0
    return 0;
1098
0
  return fastEmitInst_r(AArch64::NEGv16i8, &AArch64::FPR128RegClass, Op0, Op0IsKill);
1099
0
}
1100
1101
0
unsigned fastEmit_AArch64ISD_NEG_MVT_v4i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1102
0
  if (RetVT.SimpleTy != MVT::v4i16)
1103
0
    return 0;
1104
0
  return fastEmitInst_r(AArch64::NEGv4i16, &AArch64::FPR64RegClass, Op0, Op0IsKill);
1105
0
}
1106
1107
0
unsigned fastEmit_AArch64ISD_NEG_MVT_v8i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1108
0
  if (RetVT.SimpleTy != MVT::v8i16)
1109
0
    return 0;
1110
0
  return fastEmitInst_r(AArch64::NEGv8i16, &AArch64::FPR128RegClass, Op0, Op0IsKill);
1111
0
}
1112
1113
0
unsigned fastEmit_AArch64ISD_NEG_MVT_v2i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1114
0
  if (RetVT.SimpleTy != MVT::v2i32)
1115
0
    return 0;
1116
0
  return fastEmitInst_r(AArch64::NEGv2i32, &AArch64::FPR64RegClass, Op0, Op0IsKill);
1117
0
}
1118
1119
0
unsigned fastEmit_AArch64ISD_NEG_MVT_v4i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1120
0
  if (RetVT.SimpleTy != MVT::v4i32)
1121
0
    return 0;
1122
0
  return fastEmitInst_r(AArch64::NEGv4i32, &AArch64::FPR128RegClass, Op0, Op0IsKill);
1123
0
}
1124
1125
0
unsigned fastEmit_AArch64ISD_NEG_MVT_v1i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1126
0
  if (RetVT.SimpleTy != MVT::v1i64)
1127
0
    return 0;
1128
0
  return fastEmitInst_r(AArch64::NEGv1i64, &AArch64::FPR64RegClass, Op0, Op0IsKill);
1129
0
}
1130
1131
0
unsigned fastEmit_AArch64ISD_NEG_MVT_v2i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1132
0
  if (RetVT.SimpleTy != MVT::v2i64)
1133
0
    return 0;
1134
0
  return fastEmitInst_r(AArch64::NEGv2i64, &AArch64::FPR128RegClass, Op0, Op0IsKill);
1135
0
}
1136
1137
unsigned fastEmit_AArch64ISD_NEG_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
1138
  switch (VT.SimpleTy) {
1139
  case MVT::v8i8: return fastEmit_AArch64ISD_NEG_MVT_v8i8_r(RetVT, Op0, Op0IsKill);
1140
  case MVT::v16i8: return fastEmit_AArch64ISD_NEG_MVT_v16i8_r(RetVT, Op0, Op0IsKill);
1141
  case MVT::v4i16: return fastEmit_AArch64ISD_NEG_MVT_v4i16_r(RetVT, Op0, Op0IsKill);
1142
  case MVT::v8i16: return fastEmit_AArch64ISD_NEG_MVT_v8i16_r(RetVT, Op0, Op0IsKill);
1143
  case MVT::v2i32: return fastEmit_AArch64ISD_NEG_MVT_v2i32_r(RetVT, Op0, Op0IsKill);
1144
  case MVT::v4i32: return fastEmit_AArch64ISD_NEG_MVT_v4i32_r(RetVT, Op0, Op0IsKill);
1145
  case MVT::v1i64: return fastEmit_AArch64ISD_NEG_MVT_v1i64_r(RetVT, Op0, Op0IsKill);
1146
  case MVT::v2i64: return fastEmit_AArch64ISD_NEG_MVT_v2i64_r(RetVT, Op0, Op0IsKill);
1147
  default: return 0;
1148
  }
1149
}
1150
1151
// FastEmit functions for AArch64ISD::NOT.
1152
1153
0
unsigned fastEmit_AArch64ISD_NOT_MVT_v8i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1154
0
  if (RetVT.SimpleTy != MVT::v8i8)
1155
0
    return 0;
1156
0
  return fastEmitInst_r(AArch64::NOTv8i8, &AArch64::FPR64RegClass, Op0, Op0IsKill);
1157
0
}
1158
1159
0
unsigned fastEmit_AArch64ISD_NOT_MVT_v16i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1160
0
  if (RetVT.SimpleTy != MVT::v16i8)
1161
0
    return 0;
1162
0
  return fastEmitInst_r(AArch64::NOTv16i8, &AArch64::FPR128RegClass, Op0, Op0IsKill);
1163
0
}
1164
1165
0
unsigned fastEmit_AArch64ISD_NOT_MVT_v4i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1166
0
  if (RetVT.SimpleTy != MVT::v4i16)
1167
0
    return 0;
1168
0
  return fastEmitInst_r(AArch64::NOTv8i8, &AArch64::FPR64RegClass, Op0, Op0IsKill);
1169
0
}
1170
1171
0
unsigned fastEmit_AArch64ISD_NOT_MVT_v8i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1172
0
  if (RetVT.SimpleTy != MVT::v8i16)
1173
0
    return 0;
1174
0
  return fastEmitInst_r(AArch64::NOTv16i8, &AArch64::FPR128RegClass, Op0, Op0IsKill);
1175
0
}
1176
1177
0
unsigned fastEmit_AArch64ISD_NOT_MVT_v2i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1178
0
  if (RetVT.SimpleTy != MVT::v2i32)
1179
0
    return 0;
1180
0
  return fastEmitInst_r(AArch64::NOTv8i8, &AArch64::FPR64RegClass, Op0, Op0IsKill);
1181
0
}
1182
1183
0
unsigned fastEmit_AArch64ISD_NOT_MVT_v4i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1184
0
  if (RetVT.SimpleTy != MVT::v4i32)
1185
0
    return 0;
1186
0
  return fastEmitInst_r(AArch64::NOTv16i8, &AArch64::FPR128RegClass, Op0, Op0IsKill);
1187
0
}
1188
1189
0
unsigned fastEmit_AArch64ISD_NOT_MVT_v1i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1190
0
  if (RetVT.SimpleTy != MVT::v1i64)
1191
0
    return 0;
1192
0
  return fastEmitInst_r(AArch64::NOTv8i8, &AArch64::FPR64RegClass, Op0, Op0IsKill);
1193
0
}
1194
1195
0
unsigned fastEmit_AArch64ISD_NOT_MVT_v2i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1196
0
  if (RetVT.SimpleTy != MVT::v2i64)
1197
0
    return 0;
1198
0
  return fastEmitInst_r(AArch64::NOTv16i8, &AArch64::FPR128RegClass, Op0, Op0IsKill);
1199
0
}
1200
1201
unsigned fastEmit_AArch64ISD_NOT_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
1202
  switch (VT.SimpleTy) {
1203
  case MVT::v8i8: return fastEmit_AArch64ISD_NOT_MVT_v8i8_r(RetVT, Op0, Op0IsKill);
1204
  case MVT::v16i8: return fastEmit_AArch64ISD_NOT_MVT_v16i8_r(RetVT, Op0, Op0IsKill);
1205
  case MVT::v4i16: return fastEmit_AArch64ISD_NOT_MVT_v4i16_r(RetVT, Op0, Op0IsKill);
1206
  case MVT::v8i16: return fastEmit_AArch64ISD_NOT_MVT_v8i16_r(RetVT, Op0, Op0IsKill);
1207
  case MVT::v2i32: return fastEmit_AArch64ISD_NOT_MVT_v2i32_r(RetVT, Op0, Op0IsKill);
1208
  case MVT::v4i32: return fastEmit_AArch64ISD_NOT_MVT_v4i32_r(RetVT, Op0, Op0IsKill);
1209
  case MVT::v1i64: return fastEmit_AArch64ISD_NOT_MVT_v1i64_r(RetVT, Op0, Op0IsKill);
1210
  case MVT::v2i64: return fastEmit_AArch64ISD_NOT_MVT_v2i64_r(RetVT, Op0, Op0IsKill);
1211
  default: return 0;
1212
  }
1213
}
1214
1215
// FastEmit functions for AArch64ISD::REV16.
1216
1217
0
unsigned fastEmit_AArch64ISD_REV16_MVT_v8i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1218
0
  if (RetVT.SimpleTy != MVT::v8i8)
1219
0
    return 0;
1220
0
  if ((Subtarget->hasNEON())) {
1221
0
    return fastEmitInst_r(AArch64::REV16v8i8, &AArch64::FPR64RegClass, Op0, Op0IsKill);
1222
0
  }
1223
0
  return 0;
1224
0
}
1225
1226
0
unsigned fastEmit_AArch64ISD_REV16_MVT_v16i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1227
0
  if (RetVT.SimpleTy != MVT::v16i8)
1228
0
    return 0;
1229
0
  if ((Subtarget->hasNEON())) {
1230
0
    return fastEmitInst_r(AArch64::REV16v16i8, &AArch64::FPR128RegClass, Op0, Op0IsKill);
1231
0
  }
1232
0
  return 0;
1233
0
}
1234
1235
unsigned fastEmit_AArch64ISD_REV16_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
1236
  switch (VT.SimpleTy) {
1237
  case MVT::v8i8: return fastEmit_AArch64ISD_REV16_MVT_v8i8_r(RetVT, Op0, Op0IsKill);
1238
  case MVT::v16i8: return fastEmit_AArch64ISD_REV16_MVT_v16i8_r(RetVT, Op0, Op0IsKill);
1239
  default: return 0;
1240
  }
1241
}
1242
1243
// FastEmit functions for AArch64ISD::REV32.
1244
1245
0
unsigned fastEmit_AArch64ISD_REV32_MVT_v8i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1246
0
  if (RetVT.SimpleTy != MVT::v8i8)
1247
0
    return 0;
1248
0
  if ((Subtarget->hasNEON())) {
1249
0
    return fastEmitInst_r(AArch64::REV32v8i8, &AArch64::FPR64RegClass, Op0, Op0IsKill);
1250
0
  }
1251
0
  return 0;
1252
0
}
1253
1254
0
unsigned fastEmit_AArch64ISD_REV32_MVT_v16i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1255
0
  if (RetVT.SimpleTy != MVT::v16i8)
1256
0
    return 0;
1257
0
  if ((Subtarget->hasNEON())) {
1258
0
    return fastEmitInst_r(AArch64::REV32v16i8, &AArch64::FPR128RegClass, Op0, Op0IsKill);
1259
0
  }
1260
0
  return 0;
1261
0
}
1262
1263
0
unsigned fastEmit_AArch64ISD_REV32_MVT_v4i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1264
0
  if (RetVT.SimpleTy != MVT::v4i16)
1265
0
    return 0;
1266
0
  if ((Subtarget->hasNEON())) {
1267
0
    return fastEmitInst_r(AArch64::REV32v4i16, &AArch64::FPR64RegClass, Op0, Op0IsKill);
1268
0
  }
1269
0
  return 0;
1270
0
}
1271
1272
0
unsigned fastEmit_AArch64ISD_REV32_MVT_v8i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1273
0
  if (RetVT.SimpleTy != MVT::v8i16)
1274
0
    return 0;
1275
0
  if ((Subtarget->hasNEON())) {
1276
0
    return fastEmitInst_r(AArch64::REV32v8i16, &AArch64::FPR128RegClass, Op0, Op0IsKill);
1277
0
  }
1278
0
  return 0;
1279
0
}
1280
1281
0
unsigned fastEmit_AArch64ISD_REV32_MVT_v4f16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1282
0
  if (RetVT.SimpleTy != MVT::v4f16)
1283
0
    return 0;
1284
0
  return fastEmitInst_r(AArch64::REV32v4i16, &AArch64::FPR64RegClass, Op0, Op0IsKill);
1285
0
}
1286
1287
0
unsigned fastEmit_AArch64ISD_REV32_MVT_v8f16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1288
0
  if (RetVT.SimpleTy != MVT::v8f16)
1289
0
    return 0;
1290
0
  return fastEmitInst_r(AArch64::REV32v8i16, &AArch64::FPR128RegClass, Op0, Op0IsKill);
1291
0
}
1292
1293
unsigned fastEmit_AArch64ISD_REV32_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
1294
  switch (VT.SimpleTy) {
1295
  case MVT::v8i8: return fastEmit_AArch64ISD_REV32_MVT_v8i8_r(RetVT, Op0, Op0IsKill);
1296
  case MVT::v16i8: return fastEmit_AArch64ISD_REV32_MVT_v16i8_r(RetVT, Op0, Op0IsKill);
1297
  case MVT::v4i16: return fastEmit_AArch64ISD_REV32_MVT_v4i16_r(RetVT, Op0, Op0IsKill);
1298
  case MVT::v8i16: return fastEmit_AArch64ISD_REV32_MVT_v8i16_r(RetVT, Op0, Op0IsKill);
1299
  case MVT::v4f16: return fastEmit_AArch64ISD_REV32_MVT_v4f16_r(RetVT, Op0, Op0IsKill);
1300
  case MVT::v8f16: return fastEmit_AArch64ISD_REV32_MVT_v8f16_r(RetVT, Op0, Op0IsKill);
1301
  default: return 0;
1302
  }
1303
}
1304
1305
// FastEmit functions for AArch64ISD::REV64.
1306
1307
0
unsigned fastEmit_AArch64ISD_REV64_MVT_v8i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1308
0
  if (RetVT.SimpleTy != MVT::v8i8)
1309
0
    return 0;
1310
0
  if ((Subtarget->hasNEON())) {
1311
0
    return fastEmitInst_r(AArch64::REV64v8i8, &AArch64::FPR64RegClass, Op0, Op0IsKill);
1312
0
  }
1313
0
  return 0;
1314
0
}
1315
1316
0
unsigned fastEmit_AArch64ISD_REV64_MVT_v16i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1317
0
  if (RetVT.SimpleTy != MVT::v16i8)
1318
0
    return 0;
1319
0
  if ((Subtarget->hasNEON())) {
1320
0
    return fastEmitInst_r(AArch64::REV64v16i8, &AArch64::FPR128RegClass, Op0, Op0IsKill);
1321
0
  }
1322
0
  return 0;
1323
0
}
1324
1325
0
unsigned fastEmit_AArch64ISD_REV64_MVT_v4i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1326
0
  if (RetVT.SimpleTy != MVT::v4i16)
1327
0
    return 0;
1328
0
  if ((Subtarget->hasNEON())) {
1329
0
    return fastEmitInst_r(AArch64::REV64v4i16, &AArch64::FPR64RegClass, Op0, Op0IsKill);
1330
0
  }
1331
0
  return 0;
1332
0
}
1333
1334
0
unsigned fastEmit_AArch64ISD_REV64_MVT_v8i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1335
0
  if (RetVT.SimpleTy != MVT::v8i16)
1336
0
    return 0;
1337
0
  if ((Subtarget->hasNEON())) {
1338
0
    return fastEmitInst_r(AArch64::REV64v8i16, &AArch64::FPR128RegClass, Op0, Op0IsKill);
1339
0
  }
1340
0
  return 0;
1341
0
}
1342
1343
0
unsigned fastEmit_AArch64ISD_REV64_MVT_v2i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1344
0
  if (RetVT.SimpleTy != MVT::v2i32)
1345
0
    return 0;
1346
0
  if ((Subtarget->hasNEON())) {
1347
0
    return fastEmitInst_r(AArch64::REV64v2i32, &AArch64::FPR64RegClass, Op0, Op0IsKill);
1348
0
  }
1349
0
  return 0;
1350
0
}
1351
1352
0
unsigned fastEmit_AArch64ISD_REV64_MVT_v4i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1353
0
  if (RetVT.SimpleTy != MVT::v4i32)
1354
0
    return 0;
1355
0
  if ((Subtarget->hasNEON())) {
1356
0
    return fastEmitInst_r(AArch64::REV64v4i32, &AArch64::FPR128RegClass, Op0, Op0IsKill);
1357
0
  }
1358
0
  return 0;
1359
0
}
1360
1361
0
unsigned fastEmit_AArch64ISD_REV64_MVT_v4f16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1362
0
  if (RetVT.SimpleTy != MVT::v4f16)
1363
0
    return 0;
1364
0
  return fastEmitInst_r(AArch64::REV64v4i16, &AArch64::FPR64RegClass, Op0, Op0IsKill);
1365
0
}
1366
1367
0
unsigned fastEmit_AArch64ISD_REV64_MVT_v8f16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1368
0
  if (RetVT.SimpleTy != MVT::v8f16)
1369
0
    return 0;
1370
0
  return fastEmitInst_r(AArch64::REV64v8i16, &AArch64::FPR128RegClass, Op0, Op0IsKill);
1371
0
}
1372
1373
0
unsigned fastEmit_AArch64ISD_REV64_MVT_v2f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1374
0
  if (RetVT.SimpleTy != MVT::v2f32)
1375
0
    return 0;
1376
0
  return fastEmitInst_r(AArch64::REV64v2i32, &AArch64::FPR64RegClass, Op0, Op0IsKill);
1377
0
}
1378
1379
0
unsigned fastEmit_AArch64ISD_REV64_MVT_v4f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1380
0
  if (RetVT.SimpleTy != MVT::v4f32)
1381
0
    return 0;
1382
0
  return fastEmitInst_r(AArch64::REV64v4i32, &AArch64::FPR128RegClass, Op0, Op0IsKill);
1383
0
}
1384
1385
unsigned fastEmit_AArch64ISD_REV64_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
1386
  switch (VT.SimpleTy) {
1387
  case MVT::v8i8: return fastEmit_AArch64ISD_REV64_MVT_v8i8_r(RetVT, Op0, Op0IsKill);
1388
  case MVT::v16i8: return fastEmit_AArch64ISD_REV64_MVT_v16i8_r(RetVT, Op0, Op0IsKill);
1389
  case MVT::v4i16: return fastEmit_AArch64ISD_REV64_MVT_v4i16_r(RetVT, Op0, Op0IsKill);
1390
  case MVT::v8i16: return fastEmit_AArch64ISD_REV64_MVT_v8i16_r(RetVT, Op0, Op0IsKill);
1391
  case MVT::v2i32: return fastEmit_AArch64ISD_REV64_MVT_v2i32_r(RetVT, Op0, Op0IsKill);
1392
  case MVT::v4i32: return fastEmit_AArch64ISD_REV64_MVT_v4i32_r(RetVT, Op0, Op0IsKill);
1393
  case MVT::v4f16: return fastEmit_AArch64ISD_REV64_MVT_v4f16_r(RetVT, Op0, Op0IsKill);
1394
  case MVT::v8f16: return fastEmit_AArch64ISD_REV64_MVT_v8f16_r(RetVT, Op0, Op0IsKill);
1395
  case MVT::v2f32: return fastEmit_AArch64ISD_REV64_MVT_v2f32_r(RetVT, Op0, Op0IsKill);
1396
  case MVT::v4f32: return fastEmit_AArch64ISD_REV64_MVT_v4f32_r(RetVT, Op0, Op0IsKill);
1397
  default: return 0;
1398
  }
1399
}
1400
1401
// FastEmit functions for AArch64ISD::SITOF.
1402
1403
0
unsigned fastEmit_AArch64ISD_SITOF_MVT_f16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1404
0
  if (RetVT.SimpleTy != MVT::f16)
1405
0
    return 0;
1406
0
  if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) {
1407
0
    return fastEmitInst_r(AArch64::SCVTFv1i16, &AArch64::FPR16RegClass, Op0, Op0IsKill);
1408
0
  }
1409
0
  return 0;
1410
0
}
1411
1412
0
unsigned fastEmit_AArch64ISD_SITOF_MVT_f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1413
0
  if (RetVT.SimpleTy != MVT::f32)
1414
0
    return 0;
1415
0
  if ((Subtarget->hasNEON())) {
1416
0
    return fastEmitInst_r(AArch64::SCVTFv1i32, &AArch64::FPR32RegClass, Op0, Op0IsKill);
1417
0
  }
1418
0
  return 0;
1419
0
}
1420
1421
0
unsigned fastEmit_AArch64ISD_SITOF_MVT_f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1422
0
  if (RetVT.SimpleTy != MVT::f64)
1423
0
    return 0;
1424
0
  if ((Subtarget->hasNEON())) {
1425
0
    return fastEmitInst_r(AArch64::SCVTFv1i64, &AArch64::FPR64RegClass, Op0, Op0IsKill);
1426
0
  }
1427
0
  return 0;
1428
0
}
1429
1430
unsigned fastEmit_AArch64ISD_SITOF_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
1431
  switch (VT.SimpleTy) {
1432
  case MVT::f16: return fastEmit_AArch64ISD_SITOF_MVT_f16_r(RetVT, Op0, Op0IsKill);
1433
  case MVT::f32: return fastEmit_AArch64ISD_SITOF_MVT_f32_r(RetVT, Op0, Op0IsKill);
1434
  case MVT::f64: return fastEmit_AArch64ISD_SITOF_MVT_f64_r(RetVT, Op0, Op0IsKill);
1435
  default: return 0;
1436
  }
1437
}
1438
1439
// FastEmit functions for AArch64ISD::UITOF.
1440
1441
0
unsigned fastEmit_AArch64ISD_UITOF_MVT_f16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1442
0
  if (RetVT.SimpleTy != MVT::f16)
1443
0
    return 0;
1444
0
  if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) {
1445
0
    return fastEmitInst_r(AArch64::UCVTFv1i16, &AArch64::FPR16RegClass, Op0, Op0IsKill);
1446
0
  }
1447
0
  return 0;
1448
0
}
1449
1450
0
unsigned fastEmit_AArch64ISD_UITOF_MVT_f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1451
0
  if (RetVT.SimpleTy != MVT::f32)
1452
0
    return 0;
1453
0
  if ((Subtarget->hasNEON())) {
1454
0
    return fastEmitInst_r(AArch64::UCVTFv1i32, &AArch64::FPR32RegClass, Op0, Op0IsKill);
1455
0
  }
1456
0
  return 0;
1457
0
}
1458
1459
0
unsigned fastEmit_AArch64ISD_UITOF_MVT_f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1460
0
  if (RetVT.SimpleTy != MVT::f64)
1461
0
    return 0;
1462
0
  if ((Subtarget->hasNEON())) {
1463
0
    return fastEmitInst_r(AArch64::UCVTFv1i64, &AArch64::FPR64RegClass, Op0, Op0IsKill);
1464
0
  }
1465
0
  return 0;
1466
0
}
1467
1468
unsigned fastEmit_AArch64ISD_UITOF_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
1469
  switch (VT.SimpleTy) {
1470
  case MVT::f16: return fastEmit_AArch64ISD_UITOF_MVT_f16_r(RetVT, Op0, Op0IsKill);
1471
  case MVT::f32: return fastEmit_AArch64ISD_UITOF_MVT_f32_r(RetVT, Op0, Op0IsKill);
1472
  case MVT::f64: return fastEmit_AArch64ISD_UITOF_MVT_f64_r(RetVT, Op0, Op0IsKill);
1473
  default: return 0;
1474
  }
1475
}
1476
1477
// FastEmit functions for ISD::ABS.
1478
1479
0
unsigned fastEmit_ISD_ABS_MVT_i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1480
0
  if (RetVT.SimpleTy != MVT::i64)
1481
0
    return 0;
1482
0
  if ((Subtarget->hasNEON())) {
1483
0
    return fastEmitInst_r(AArch64::ABSv1i64, &AArch64::FPR64RegClass, Op0, Op0IsKill);
1484
0
  }
1485
0
  return 0;
1486
0
}
1487
1488
0
unsigned fastEmit_ISD_ABS_MVT_v8i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1489
0
  if (RetVT.SimpleTy != MVT::v8i8)
1490
0
    return 0;
1491
0
  if ((Subtarget->hasNEON())) {
1492
0
    return fastEmitInst_r(AArch64::ABSv8i8, &AArch64::FPR64RegClass, Op0, Op0IsKill);
1493
0
  }
1494
0
  return 0;
1495
0
}
1496
1497
0
unsigned fastEmit_ISD_ABS_MVT_v16i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1498
0
  if (RetVT.SimpleTy != MVT::v16i8)
1499
0
    return 0;
1500
0
  if ((Subtarget->hasNEON())) {
1501
0
    return fastEmitInst_r(AArch64::ABSv16i8, &AArch64::FPR128RegClass, Op0, Op0IsKill);
1502
0
  }
1503
0
  return 0;
1504
0
}
1505
1506
0
unsigned fastEmit_ISD_ABS_MVT_v4i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1507
0
  if (RetVT.SimpleTy != MVT::v4i16)
1508
0
    return 0;
1509
0
  if ((Subtarget->hasNEON())) {
1510
0
    return fastEmitInst_r(AArch64::ABSv4i16, &AArch64::FPR64RegClass, Op0, Op0IsKill);
1511
0
  }
1512
0
  return 0;
1513
0
}
1514
1515
0
unsigned fastEmit_ISD_ABS_MVT_v8i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1516
0
  if (RetVT.SimpleTy != MVT::v8i16)
1517
0
    return 0;
1518
0
  if ((Subtarget->hasNEON())) {
1519
0
    return fastEmitInst_r(AArch64::ABSv8i16, &AArch64::FPR128RegClass, Op0, Op0IsKill);
1520
0
  }
1521
0
  return 0;
1522
0
}
1523
1524
0
unsigned fastEmit_ISD_ABS_MVT_v2i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1525
0
  if (RetVT.SimpleTy != MVT::v2i32)
1526
0
    return 0;
1527
0
  if ((Subtarget->hasNEON())) {
1528
0
    return fastEmitInst_r(AArch64::ABSv2i32, &AArch64::FPR64RegClass, Op0, Op0IsKill);
1529
0
  }
1530
0
  return 0;
1531
0
}
1532
1533
0
unsigned fastEmit_ISD_ABS_MVT_v4i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1534
0
  if (RetVT.SimpleTy != MVT::v4i32)
1535
0
    return 0;
1536
0
  if ((Subtarget->hasNEON())) {
1537
0
    return fastEmitInst_r(AArch64::ABSv4i32, &AArch64::FPR128RegClass, Op0, Op0IsKill);
1538
0
  }
1539
0
  return 0;
1540
0
}
1541
1542
0
unsigned fastEmit_ISD_ABS_MVT_v1i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1543
0
  if (RetVT.SimpleTy != MVT::v1i64)
1544
0
    return 0;
1545
0
  if ((Subtarget->hasNEON())) {
1546
0
    return fastEmitInst_r(AArch64::ABSv1i64, &AArch64::FPR64RegClass, Op0, Op0IsKill);
1547
0
  }
1548
0
  return 0;
1549
0
}
1550
1551
0
unsigned fastEmit_ISD_ABS_MVT_v2i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1552
0
  if (RetVT.SimpleTy != MVT::v2i64)
1553
0
    return 0;
1554
0
  if ((Subtarget->hasNEON())) {
1555
0
    return fastEmitInst_r(AArch64::ABSv2i64, &AArch64::FPR128RegClass, Op0, Op0IsKill);
1556
0
  }
1557
0
  return 0;
1558
0
}
1559
1560
unsigned fastEmit_ISD_ABS_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
1561
  switch (VT.SimpleTy) {
1562
  case MVT::i64: return fastEmit_ISD_ABS_MVT_i64_r(RetVT, Op0, Op0IsKill);
1563
  case MVT::v8i8: return fastEmit_ISD_ABS_MVT_v8i8_r(RetVT, Op0, Op0IsKill);
1564
  case MVT::v16i8: return fastEmit_ISD_ABS_MVT_v16i8_r(RetVT, Op0, Op0IsKill);
1565
  case MVT::v4i16: return fastEmit_ISD_ABS_MVT_v4i16_r(RetVT, Op0, Op0IsKill);
1566
  case MVT::v8i16: return fastEmit_ISD_ABS_MVT_v8i16_r(RetVT, Op0, Op0IsKill);
1567
  case MVT::v2i32: return fastEmit_ISD_ABS_MVT_v2i32_r(RetVT, Op0, Op0IsKill);
1568
  case MVT::v4i32: return fastEmit_ISD_ABS_MVT_v4i32_r(RetVT, Op0, Op0IsKill);
1569
  case MVT::v1i64: return fastEmit_ISD_ABS_MVT_v1i64_r(RetVT, Op0, Op0IsKill);
1570
  case MVT::v2i64: return fastEmit_ISD_ABS_MVT_v2i64_r(RetVT, Op0, Op0IsKill);
1571
  default: return 0;
1572
  }
1573
}
1574
1575
// FastEmit functions for ISD::BITCAST.
1576
1577
0
unsigned fastEmit_ISD_BITCAST_MVT_f64_MVT_v8i8_r(unsigned Op0, bool Op0IsKill) {
1578
0
  if ((!Subtarget->isLittleEndian())) {
1579
0
    return fastEmitInst_r(AArch64::REV64v8i8, &AArch64::FPR64RegClass, Op0, Op0IsKill);
1580
0
  }
1581
0
  return 0;
1582
0
}
1583
1584
0
unsigned fastEmit_ISD_BITCAST_MVT_f64_MVT_v4i16_r(unsigned Op0, bool Op0IsKill) {
1585
0
  if ((!Subtarget->isLittleEndian())) {
1586
0
    return fastEmitInst_r(AArch64::REV64v4i16, &AArch64::FPR64RegClass, Op0, Op0IsKill);
1587
0
  }
1588
0
  return 0;
1589
0
}
1590
1591
0
unsigned fastEmit_ISD_BITCAST_MVT_f64_MVT_v2i32_r(unsigned Op0, bool Op0IsKill) {
1592
0
  if ((!Subtarget->isLittleEndian())) {
1593
0
    return fastEmitInst_r(AArch64::REV64v2i32, &AArch64::FPR64RegClass, Op0, Op0IsKill);
1594
0
  }
1595
0
  return 0;
1596
0
}
1597
1598
0
unsigned fastEmit_ISD_BITCAST_MVT_f64_MVT_v4f16_r(unsigned Op0, bool Op0IsKill) {
1599
0
  if ((!Subtarget->isLittleEndian())) {
1600
0
    return fastEmitInst_r(AArch64::REV64v4i16, &AArch64::FPR64RegClass, Op0, Op0IsKill);
1601
0
  }
1602
0
  return 0;
1603
0
}
1604
1605
0
unsigned fastEmit_ISD_BITCAST_MVT_f64_MVT_v2f32_r(unsigned Op0, bool Op0IsKill) {
1606
0
  if ((!Subtarget->isLittleEndian())) {
1607
0
    return fastEmitInst_r(AArch64::REV64v2i32, &AArch64::FPR64RegClass, Op0, Op0IsKill);
1608
0
  }
1609
0
  return 0;
1610
0
}
1611
1612
4
unsigned fastEmit_ISD_BITCAST_MVT_f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1613
4
switch (RetVT.SimpleTy) {
1614
4
  
case MVT::v8i8: return fastEmit_ISD_BITCAST_MVT_f64_MVT_v8i8_r(Op0, Op0IsKill)0
;
1615
4
  
case MVT::v4i16: return fastEmit_ISD_BITCAST_MVT_f64_MVT_v4i16_r(Op0, Op0IsKill)0
;
1616
4
  
case MVT::v2i32: return fastEmit_ISD_BITCAST_MVT_f64_MVT_v2i32_r(Op0, Op0IsKill)0
;
1617
4
  
case MVT::v4f16: return fastEmit_ISD_BITCAST_MVT_f64_MVT_v4f16_r(Op0, Op0IsKill)0
;
1618
4
  
case MVT::v2f32: return fastEmit_ISD_BITCAST_MVT_f64_MVT_v2f32_r(Op0, Op0IsKill)0
;
1619
4
  default: return 0;
1620
4
}
1621
4
}
1622
1623
2
unsigned fastEmit_ISD_BITCAST_MVT_v8i8_MVT_f64_r(unsigned Op0, bool Op0IsKill) {
1624
2
  if ((!Subtarget->isLittleEndian())) {
1625
2
    return fastEmitInst_r(AArch64::REV64v8i8, &AArch64::FPR64RegClass, Op0, Op0IsKill);
1626
2
  }
1627
0
  return 0;
1628
0
}
1629
1630
0
unsigned fastEmit_ISD_BITCAST_MVT_v8i8_MVT_v4i16_r(unsigned Op0, bool Op0IsKill) {
1631
0
  if ((!Subtarget->isLittleEndian())) {
1632
0
    return fastEmitInst_r(AArch64::REV16v8i8, &AArch64::FPR64RegClass, Op0, Op0IsKill);
1633
0
  }
1634
0
  return 0;
1635
0
}
1636
1637
0
unsigned fastEmit_ISD_BITCAST_MVT_v8i8_MVT_v2i32_r(unsigned Op0, bool Op0IsKill) {
1638
0
  if ((!Subtarget->isLittleEndian())) {
1639
0
    return fastEmitInst_r(AArch64::REV32v8i8, &AArch64::FPR64RegClass, Op0, Op0IsKill);
1640
0
  }
1641
0
  return 0;
1642
0
}
1643
1644
1
unsigned fastEmit_ISD_BITCAST_MVT_v8i8_MVT_v1i64_r(unsigned Op0, bool Op0IsKill) {
1645
1
  if ((!Subtarget->isLittleEndian())) {
1646
1
    return fastEmitInst_r(AArch64::REV64v8i8, &AArch64::FPR64RegClass, Op0, Op0IsKill);
1647
1
  }
1648
0
  return 0;
1649
0
}
1650
1651
0
unsigned fastEmit_ISD_BITCAST_MVT_v8i8_MVT_v4f16_r(unsigned Op0, bool Op0IsKill) {
1652
0
  if ((!Subtarget->isLittleEndian())) {
1653
0
    return fastEmitInst_r(AArch64::REV16v8i8, &AArch64::FPR64RegClass, Op0, Op0IsKill);
1654
0
  }
1655
0
  return 0;
1656
0
}
1657
1658
0
unsigned fastEmit_ISD_BITCAST_MVT_v8i8_MVT_v2f32_r(unsigned Op0, bool Op0IsKill) {
1659
0
  if ((!Subtarget->isLittleEndian())) {
1660
0
    return fastEmitInst_r(AArch64::REV32v8i8, &AArch64::FPR64RegClass, Op0, Op0IsKill);
1661
0
  }
1662
0
  return 0;
1663
0
}
1664
1665
0
unsigned fastEmit_ISD_BITCAST_MVT_v8i8_MVT_v1f64_r(unsigned Op0, bool Op0IsKill) {
1666
0
  if ((!Subtarget->isLittleEndian())) {
1667
0
    return fastEmitInst_r(AArch64::REV64v8i8, &AArch64::FPR64RegClass, Op0, Op0IsKill);
1668
0
  }
1669
0
  return 0;
1670
0
}
1671
1672
5
unsigned fastEmit_ISD_BITCAST_MVT_v8i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1673
5
switch (RetVT.SimpleTy) {
1674
5
  
case MVT::f64: return fastEmit_ISD_BITCAST_MVT_v8i8_MVT_f64_r(Op0, Op0IsKill)2
;
1675
5
  
case MVT::v4i16: return fastEmit_ISD_BITCAST_MVT_v8i8_MVT_v4i16_r(Op0, Op0IsKill)0
;
1676
5
  
case MVT::v2i32: return fastEmit_ISD_BITCAST_MVT_v8i8_MVT_v2i32_r(Op0, Op0IsKill)0
;
1677
5
  
case MVT::v1i64: return fastEmit_ISD_BITCAST_MVT_v8i8_MVT_v1i64_r(Op0, Op0IsKill)1
;
1678
5
  
case MVT::v4f16: return fastEmit_ISD_BITCAST_MVT_v8i8_MVT_v4f16_r(Op0, Op0IsKill)0
;
1679
5
  
case MVT::v2f32: return fastEmit_ISD_BITCAST_MVT_v8i8_MVT_v2f32_r(Op0, Op0IsKill)0
;
1680
5
  
case MVT::v1f64: return fastEmit_ISD_BITCAST_MVT_v8i8_MVT_v1f64_r(Op0, Op0IsKill)0
;
1681
5
  
default: return 02
;
1682
5
}
1683
5
}
1684
1685
0
unsigned fastEmit_ISD_BITCAST_MVT_v16i8_MVT_v8i16_r(unsigned Op0, bool Op0IsKill) {
1686
0
  if ((!Subtarget->isLittleEndian())) {
1687
0
    return fastEmitInst_r(AArch64::REV16v16i8, &AArch64::FPR128RegClass, Op0, Op0IsKill);
1688
0
  }
1689
0
  return 0;
1690
0
}
1691
1692
0
unsigned fastEmit_ISD_BITCAST_MVT_v16i8_MVT_v4i32_r(unsigned Op0, bool Op0IsKill) {
1693
0
  if ((!Subtarget->isLittleEndian())) {
1694
0
    return fastEmitInst_r(AArch64::REV32v16i8, &AArch64::FPR128RegClass, Op0, Op0IsKill);
1695
0
  }
1696
0
  return 0;
1697
0
}
1698
1699
0
unsigned fastEmit_ISD_BITCAST_MVT_v16i8_MVT_v2i64_r(unsigned Op0, bool Op0IsKill) {
1700
0
  if ((!Subtarget->isLittleEndian())) {
1701
0
    return fastEmitInst_r(AArch64::REV64v16i8, &AArch64::FPR128RegClass, Op0, Op0IsKill);
1702
0
  }
1703
0
  return 0;
1704
0
}
1705
1706
0
unsigned fastEmit_ISD_BITCAST_MVT_v16i8_MVT_v8f16_r(unsigned Op0, bool Op0IsKill) {
1707
0
  if ((!Subtarget->isLittleEndian())) {
1708
0
    return fastEmitInst_r(AArch64::REV16v16i8, &AArch64::FPR128RegClass, Op0, Op0IsKill);
1709
0
  }
1710
0
  return 0;
1711
0
}
1712
1713
0
unsigned fastEmit_ISD_BITCAST_MVT_v16i8_MVT_v4f32_r(unsigned Op0, bool Op0IsKill) {
1714
0
  if ((!Subtarget->isLittleEndian())) {
1715
0
    return fastEmitInst_r(AArch64::REV32v16i8, &AArch64::FPR128RegClass, Op0, Op0IsKill);
1716
0
  }
1717
0
  return 0;
1718
0
}
1719
1720
0
unsigned fastEmit_ISD_BITCAST_MVT_v16i8_MVT_v2f64_r(unsigned Op0, bool Op0IsKill) {
1721
0
  if ((!Subtarget->isLittleEndian())) {
1722
0
    return fastEmitInst_r(AArch64::REV64v16i8, &AArch64::FPR128RegClass, Op0, Op0IsKill);
1723
0
  }
1724
0
  return 0;
1725
0
}
1726
1727
unsigned fastEmit_ISD_BITCAST_MVT_v16i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1728
switch (RetVT.SimpleTy) {
1729
  case MVT::v8i16: return fastEmit_ISD_BITCAST_MVT_v16i8_MVT_v8i16_r(Op0, Op0IsKill);
1730
  case MVT::v4i32: return fastEmit_ISD_BITCAST_MVT_v16i8_MVT_v4i32_r(Op0, Op0IsKill);
1731
  case MVT::v2i64: return fastEmit_ISD_BITCAST_MVT_v16i8_MVT_v2i64_r(Op0, Op0IsKill);
1732
  case MVT::v8f16: return fastEmit_ISD_BITCAST_MVT_v16i8_MVT_v8f16_r(Op0, Op0IsKill);
1733
  case MVT::v4f32: return fastEmit_ISD_BITCAST_MVT_v16i8_MVT_v4f32_r(Op0, Op0IsKill);
1734
  case MVT::v2f64: return fastEmit_ISD_BITCAST_MVT_v16i8_MVT_v2f64_r(Op0, Op0IsKill);
1735
  default: return 0;
1736
}
1737
}
1738
1739
2
unsigned fastEmit_ISD_BITCAST_MVT_v4i16_MVT_f64_r(unsigned Op0, bool Op0IsKill) {
1740
2
  if ((!Subtarget->isLittleEndian())) {
1741
2
    return fastEmitInst_r(AArch64::REV64v4i16, &AArch64::FPR64RegClass, Op0, Op0IsKill);
1742
2
  }
1743
0
  return 0;
1744
0
}
1745
1746
0
unsigned fastEmit_ISD_BITCAST_MVT_v4i16_MVT_v8i8_r(unsigned Op0, bool Op0IsKill) {
1747
0
  if ((!Subtarget->isLittleEndian())) {
1748
0
    return fastEmitInst_r(AArch64::REV16v8i8, &AArch64::FPR64RegClass, Op0, Op0IsKill);
1749
0
  }
1750
0
  return 0;
1751
0
}
1752
1753
0
unsigned fastEmit_ISD_BITCAST_MVT_v4i16_MVT_v2i32_r(unsigned Op0, bool Op0IsKill) {
1754
0
  if ((!Subtarget->isLittleEndian())) {
1755
0
    return fastEmitInst_r(AArch64::REV32v4i16, &AArch64::FPR64RegClass, Op0, Op0IsKill);
1756
0
  }
1757
0
  return 0;
1758
0
}
1759
1760
1
unsigned fastEmit_ISD_BITCAST_MVT_v4i16_MVT_v1i64_r(unsigned Op0, bool Op0IsKill) {
1761
1
  if ((!Subtarget->isLittleEndian())) {
1762
1
    return fastEmitInst_r(AArch64::REV64v4i16, &AArch64::FPR64RegClass, Op0, Op0IsKill);
1763
1
  }
1764
0
  return 0;
1765
0
}
1766
1767
0
unsigned fastEmit_ISD_BITCAST_MVT_v4i16_MVT_v2f32_r(unsigned Op0, bool Op0IsKill) {
1768
0
  if ((!Subtarget->isLittleEndian())) {
1769
0
    return fastEmitInst_r(AArch64::REV32v4i16, &AArch64::FPR64RegClass, Op0, Op0IsKill);
1770
0
  }
1771
0
  return 0;
1772
0
}
1773
1774
0
unsigned fastEmit_ISD_BITCAST_MVT_v4i16_MVT_v1f64_r(unsigned Op0, bool Op0IsKill) {
1775
0
  if ((!Subtarget->isLittleEndian())) {
1776
0
    return fastEmitInst_r(AArch64::REV64v4i16, &AArch64::FPR64RegClass, Op0, Op0IsKill);
1777
0
  }
1778
0
  return 0;
1779
0
}
1780
1781
5
unsigned fastEmit_ISD_BITCAST_MVT_v4i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1782
5
switch (RetVT.SimpleTy) {
1783
5
  
case MVT::f64: return fastEmit_ISD_BITCAST_MVT_v4i16_MVT_f64_r(Op0, Op0IsKill)2
;
1784
5
  
case MVT::v8i8: return fastEmit_ISD_BITCAST_MVT_v4i16_MVT_v8i8_r(Op0, Op0IsKill)0
;
1785
5
  
case MVT::v2i32: return fastEmit_ISD_BITCAST_MVT_v4i16_MVT_v2i32_r(Op0, Op0IsKill)0
;
1786
5
  
case MVT::v1i64: return fastEmit_ISD_BITCAST_MVT_v4i16_MVT_v1i64_r(Op0, Op0IsKill)1
;
1787
5
  
case MVT::v2f32: return fastEmit_ISD_BITCAST_MVT_v4i16_MVT_v2f32_r(Op0, Op0IsKill)0
;
1788
5
  
case MVT::v1f64: return fastEmit_ISD_BITCAST_MVT_v4i16_MVT_v1f64_r(Op0, Op0IsKill)0
;
1789
5
  
default: return 02
;
1790
5
}
1791
5
}
1792
1793
0
unsigned fastEmit_ISD_BITCAST_MVT_v8i16_MVT_v16i8_r(unsigned Op0, bool Op0IsKill) {
1794
0
  if ((!Subtarget->isLittleEndian())) {
1795
0
    return fastEmitInst_r(AArch64::REV16v16i8, &AArch64::FPR128RegClass, Op0, Op0IsKill);
1796
0
  }
1797
0
  return 0;
1798
0
}
1799
1800
0
unsigned fastEmit_ISD_BITCAST_MVT_v8i16_MVT_v4i32_r(unsigned Op0, bool Op0IsKill) {
1801
0
  if ((!Subtarget->isLittleEndian())) {
1802
0
    return fastEmitInst_r(AArch64::REV32v8i16, &AArch64::FPR128RegClass, Op0, Op0IsKill);
1803
0
  }
1804
0
  return 0;
1805
0
}
1806
1807
0
unsigned fastEmit_ISD_BITCAST_MVT_v8i16_MVT_v2i64_r(unsigned Op0, bool Op0IsKill) {
1808
0
  if ((!Subtarget->isLittleEndian())) {
1809
0
    return fastEmitInst_r(AArch64::REV64v8i16, &AArch64::FPR128RegClass, Op0, Op0IsKill);
1810
0
  }
1811
0
  return 0;
1812
0
}
1813
1814
0
unsigned fastEmit_ISD_BITCAST_MVT_v8i16_MVT_v4f32_r(unsigned Op0, bool Op0IsKill) {
1815
0
  if ((!Subtarget->isLittleEndian())) {
1816
0
    return fastEmitInst_r(AArch64::REV32v8i16, &AArch64::FPR128RegClass, Op0, Op0IsKill);
1817
0
  }
1818
0
  return 0;
1819
0
}
1820
1821
0
unsigned fastEmit_ISD_BITCAST_MVT_v8i16_MVT_v2f64_r(unsigned Op0, bool Op0IsKill) {
1822
0
  if ((!Subtarget->isLittleEndian())) {
1823
0
    return fastEmitInst_r(AArch64::REV64v8i16, &AArch64::FPR128RegClass, Op0, Op0IsKill);
1824
0
  }
1825
0
  return 0;
1826
0
}
1827
1828
unsigned fastEmit_ISD_BITCAST_MVT_v8i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1829
switch (RetVT.SimpleTy) {
1830
  case MVT::v16i8: return fastEmit_ISD_BITCAST_MVT_v8i16_MVT_v16i8_r(Op0, Op0IsKill);
1831
  case MVT::v4i32: return fastEmit_ISD_BITCAST_MVT_v8i16_MVT_v4i32_r(Op0, Op0IsKill);
1832
  case MVT::v2i64: return fastEmit_ISD_BITCAST_MVT_v8i16_MVT_v2i64_r(Op0, Op0IsKill);
1833
  case MVT::v4f32: return fastEmit_ISD_BITCAST_MVT_v8i16_MVT_v4f32_r(Op0, Op0IsKill);
1834
  case MVT::v2f64: return fastEmit_ISD_BITCAST_MVT_v8i16_MVT_v2f64_r(Op0, Op0IsKill);
1835
  default: return 0;
1836
}
1837
}
1838
1839
2
unsigned fastEmit_ISD_BITCAST_MVT_v2i32_MVT_f64_r(unsigned Op0, bool Op0IsKill) {
1840
2
  if ((!Subtarget->isLittleEndian())) {
1841
2
    return fastEmitInst_r(AArch64::REV64v2i32, &AArch64::FPR64RegClass, Op0, Op0IsKill);
1842
2
  }
1843
0
  return 0;
1844
0
}
1845
1846
0
unsigned fastEmit_ISD_BITCAST_MVT_v2i32_MVT_v8i8_r(unsigned Op0, bool Op0IsKill) {
1847
0
  if ((!Subtarget->isLittleEndian())) {
1848
0
    return fastEmitInst_r(AArch64::REV32v8i8, &AArch64::FPR64RegClass, Op0, Op0IsKill);
1849
0
  }
1850
0
  return 0;
1851
0
}
1852
1853
0
unsigned fastEmit_ISD_BITCAST_MVT_v2i32_MVT_v4i16_r(unsigned Op0, bool Op0IsKill) {
1854
0
  if ((!Subtarget->isLittleEndian())) {
1855
0
    return fastEmitInst_r(AArch64::REV32v4i16, &AArch64::FPR64RegClass, Op0, Op0IsKill);
1856
0
  }
1857
0
  return 0;
1858
0
}
1859
1860
1
unsigned fastEmit_ISD_BITCAST_MVT_v2i32_MVT_v1i64_r(unsigned Op0, bool Op0IsKill) {
1861
1
  if ((!Subtarget->isLittleEndian())) {
1862
1
    return fastEmitInst_r(AArch64::REV64v2i32, &AArch64::FPR64RegClass, Op0, Op0IsKill);
1863
1
  }
1864
0
  return 0;
1865
0
}
1866
1867
0
unsigned fastEmit_ISD_BITCAST_MVT_v2i32_MVT_v4f16_r(unsigned Op0, bool Op0IsKill) {
1868
0
  if ((!Subtarget->isLittleEndian())) {
1869
0
    return fastEmitInst_r(AArch64::REV32v4i16, &AArch64::FPR64RegClass, Op0, Op0IsKill);
1870
0
  }
1871
0
  return 0;
1872
0
}
1873
1874
0
unsigned fastEmit_ISD_BITCAST_MVT_v2i32_MVT_v1f64_r(unsigned Op0, bool Op0IsKill) {
1875
0
  if ((!Subtarget->isLittleEndian())) {
1876
0
    return fastEmitInst_r(AArch64::REV64v2i32, &AArch64::FPR64RegClass, Op0, Op0IsKill);
1877
0
  }
1878
0
  return 0;
1879
0
}
1880
1881
5
unsigned fastEmit_ISD_BITCAST_MVT_v2i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1882
5
switch (RetVT.SimpleTy) {
1883
5
  
case MVT::f64: return fastEmit_ISD_BITCAST_MVT_v2i32_MVT_f64_r(Op0, Op0IsKill)2
;
1884
5
  
case MVT::v8i8: return fastEmit_ISD_BITCAST_MVT_v2i32_MVT_v8i8_r(Op0, Op0IsKill)0
;
1885
5
  
case MVT::v4i16: return fastEmit_ISD_BITCAST_MVT_v2i32_MVT_v4i16_r(Op0, Op0IsKill)0
;
1886
5
  
case MVT::v1i64: return fastEmit_ISD_BITCAST_MVT_v2i32_MVT_v1i64_r(Op0, Op0IsKill)1
;
1887
5
  
case MVT::v4f16: return fastEmit_ISD_BITCAST_MVT_v2i32_MVT_v4f16_r(Op0, Op0IsKill)0
;
1888
5
  
case MVT::v1f64: return fastEmit_ISD_BITCAST_MVT_v2i32_MVT_v1f64_r(Op0, Op0IsKill)0
;
1889
5
  
default: return 02
;
1890
5
}
1891
5
}
1892
1893
0
unsigned fastEmit_ISD_BITCAST_MVT_v4i32_MVT_v16i8_r(unsigned Op0, bool Op0IsKill) {
1894
0
  if ((!Subtarget->isLittleEndian())) {
1895
0
    return fastEmitInst_r(AArch64::REV32v16i8, &AArch64::FPR128RegClass, Op0, Op0IsKill);
1896
0
  }
1897
0
  return 0;
1898
0
}
1899
1900
0
unsigned fastEmit_ISD_BITCAST_MVT_v4i32_MVT_v8i16_r(unsigned Op0, bool Op0IsKill) {
1901
0
  if ((!Subtarget->isLittleEndian())) {
1902
0
    return fastEmitInst_r(AArch64::REV32v8i16, &AArch64::FPR128RegClass, Op0, Op0IsKill);
1903
0
  }
1904
0
  return 0;
1905
0
}
1906
1907
0
unsigned fastEmit_ISD_BITCAST_MVT_v4i32_MVT_v2i64_r(unsigned Op0, bool Op0IsKill) {
1908
0
  if ((!Subtarget->isLittleEndian())) {
1909
0
    return fastEmitInst_r(AArch64::REV64v4i32, &AArch64::FPR128RegClass, Op0, Op0IsKill);
1910
0
  }
1911
0
  return 0;
1912
0
}
1913
1914
0
unsigned fastEmit_ISD_BITCAST_MVT_v4i32_MVT_v8f16_r(unsigned Op0, bool Op0IsKill) {
1915
0
  if ((!Subtarget->isLittleEndian())) {
1916
0
    return fastEmitInst_r(AArch64::REV32v8i16, &AArch64::FPR128RegClass, Op0, Op0IsKill);
1917
0
  }
1918
0
  return 0;
1919
0
}
1920
1921
0
unsigned fastEmit_ISD_BITCAST_MVT_v4i32_MVT_v2f64_r(unsigned Op0, bool Op0IsKill) {
1922
0
  if ((!Subtarget->isLittleEndian())) {
1923
0
    return fastEmitInst_r(AArch64::REV64v4i32, &AArch64::FPR128RegClass, Op0, Op0IsKill);
1924
0
  }
1925
0
  return 0;
1926
0
}
1927
1928
unsigned fastEmit_ISD_BITCAST_MVT_v4i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1929
switch (RetVT.SimpleTy) {
1930
  case MVT::v16i8: return fastEmit_ISD_BITCAST_MVT_v4i32_MVT_v16i8_r(Op0, Op0IsKill);
1931
  case MVT::v8i16: return fastEmit_ISD_BITCAST_MVT_v4i32_MVT_v8i16_r(Op0, Op0IsKill);
1932
  case MVT::v2i64: return fastEmit_ISD_BITCAST_MVT_v4i32_MVT_v2i64_r(Op0, Op0IsKill);
1933
  case MVT::v8f16: return fastEmit_ISD_BITCAST_MVT_v4i32_MVT_v8f16_r(Op0, Op0IsKill);
1934
  case MVT::v2f64: return fastEmit_ISD_BITCAST_MVT_v4i32_MVT_v2f64_r(Op0, Op0IsKill);
1935
  default: return 0;
1936
}
1937
}
1938
1939
0
unsigned fastEmit_ISD_BITCAST_MVT_v1i64_MVT_v8i8_r(unsigned Op0, bool Op0IsKill) {
1940
0
  if ((!Subtarget->isLittleEndian())) {
1941
0
    return fastEmitInst_r(AArch64::REV64v8i8, &AArch64::FPR64RegClass, Op0, Op0IsKill);
1942
0
  }
1943
0
  return 0;
1944
0
}
1945
1946
0
unsigned fastEmit_ISD_BITCAST_MVT_v1i64_MVT_v4i16_r(unsigned Op0, bool Op0IsKill) {
1947
0
  if ((!Subtarget->isLittleEndian())) {
1948
0
    return fastEmitInst_r(AArch64::REV64v4i16, &AArch64::FPR64RegClass, Op0, Op0IsKill);
1949
0
  }
1950
0
  return 0;
1951
0
}
1952
1953
0
unsigned fastEmit_ISD_BITCAST_MVT_v1i64_MVT_v2i32_r(unsigned Op0, bool Op0IsKill) {
1954
0
  if ((!Subtarget->isLittleEndian())) {
1955
0
    return fastEmitInst_r(AArch64::REV64v2i32, &AArch64::FPR64RegClass, Op0, Op0IsKill);
1956
0
  }
1957
0
  return 0;
1958
0
}
1959
1960
0
unsigned fastEmit_ISD_BITCAST_MVT_v1i64_MVT_v4f16_r(unsigned Op0, bool Op0IsKill) {
1961
0
  if ((!Subtarget->isLittleEndian())) {
1962
0
    return fastEmitInst_r(AArch64::REV64v4i16, &AArch64::FPR64RegClass, Op0, Op0IsKill);
1963
0
  }
1964
0
  return 0;
1965
0
}
1966
1967
0
unsigned fastEmit_ISD_BITCAST_MVT_v1i64_MVT_v2f32_r(unsigned Op0, bool Op0IsKill) {
1968
0
  if ((!Subtarget->isLittleEndian())) {
1969
0
    return fastEmitInst_r(AArch64::REV64v2i32, &AArch64::FPR64RegClass, Op0, Op0IsKill);
1970
0
  }
1971
0
  return 0;
1972
0
}
1973
1974
4
unsigned fastEmit_ISD_BITCAST_MVT_v1i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1975
4
switch (RetVT.SimpleTy) {
1976
4
  
case MVT::v8i8: return fastEmit_ISD_BITCAST_MVT_v1i64_MVT_v8i8_r(Op0, Op0IsKill)0
;
1977
4
  
case MVT::v4i16: return fastEmit_ISD_BITCAST_MVT_v1i64_MVT_v4i16_r(Op0, Op0IsKill)0
;
1978
4
  
case MVT::v2i32: return fastEmit_ISD_BITCAST_MVT_v1i64_MVT_v2i32_r(Op0, Op0IsKill)0
;
1979
4
  
case MVT::v4f16: return fastEmit_ISD_BITCAST_MVT_v1i64_MVT_v4f16_r(Op0, Op0IsKill)0
;
1980
4
  
case MVT::v2f32: return fastEmit_ISD_BITCAST_MVT_v1i64_MVT_v2f32_r(Op0, Op0IsKill)0
;
1981
4
  default: return 0;
1982
4
}
1983
4
}
1984
1985
0
unsigned fastEmit_ISD_BITCAST_MVT_v2i64_MVT_v16i8_r(unsigned Op0, bool Op0IsKill) {
1986
0
  if ((!Subtarget->isLittleEndian())) {
1987
0
    return fastEmitInst_r(AArch64::REV64v16i8, &AArch64::FPR128RegClass, Op0, Op0IsKill);
1988
0
  }
1989
0
  return 0;
1990
0
}
1991
1992
0
unsigned fastEmit_ISD_BITCAST_MVT_v2i64_MVT_v8i16_r(unsigned Op0, bool Op0IsKill) {
1993
0
  if ((!Subtarget->isLittleEndian())) {
1994
0
    return fastEmitInst_r(AArch64::REV64v8i16, &AArch64::FPR128RegClass, Op0, Op0IsKill);
1995
0
  }
1996
0
  return 0;
1997
0
}
1998
1999
0
unsigned fastEmit_ISD_BITCAST_MVT_v2i64_MVT_v4i32_r(unsigned Op0, bool Op0IsKill) {
2000
0
  if ((!Subtarget->isLittleEndian())) {
2001
0
    return fastEmitInst_r(AArch64::REV64v4i32, &AArch64::FPR128RegClass, Op0, Op0IsKill);
2002
0
  }
2003
0
  return 0;
2004
0
}
2005
2006
0
unsigned fastEmit_ISD_BITCAST_MVT_v2i64_MVT_v8f16_r(unsigned Op0, bool Op0IsKill) {
2007
0
  if ((!Subtarget->isLittleEndian())) {
2008
0
    return fastEmitInst_r(AArch64::REV64v8i16, &AArch64::FPR128RegClass, Op0, Op0IsKill);
2009
0
  }
2010
0
  return 0;
2011
0
}
2012
2013
0
unsigned fastEmit_ISD_BITCAST_MVT_v2i64_MVT_v4f32_r(unsigned Op0, bool Op0IsKill) {
2014
0
  if ((!Subtarget->isLittleEndian())) {
2015
0
    return fastEmitInst_r(AArch64::REV64v4i32, &AArch64::FPR128RegClass, Op0, Op0IsKill);
2016
0
  }
2017
0
  return 0;
2018
0
}
2019
2020
unsigned fastEmit_ISD_BITCAST_MVT_v2i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2021
switch (RetVT.SimpleTy) {
2022
  case MVT::v16i8: return fastEmit_ISD_BITCAST_MVT_v2i64_MVT_v16i8_r(Op0, Op0IsKill);
2023
  case MVT::v8i16: return fastEmit_ISD_BITCAST_MVT_v2i64_MVT_v8i16_r(Op0, Op0IsKill);
2024
  case MVT::v4i32: return fastEmit_ISD_BITCAST_MVT_v2i64_MVT_v4i32_r(Op0, Op0IsKill);
2025
  case MVT::v8f16: return fastEmit_ISD_BITCAST_MVT_v2i64_MVT_v8f16_r(Op0, Op0IsKill);
2026
  case MVT::v4f32: return fastEmit_ISD_BITCAST_MVT_v2i64_MVT_v4f32_r(Op0, Op0IsKill);
2027
  default: return 0;
2028
}
2029
}
2030
2031
1
unsigned fastEmit_ISD_BITCAST_MVT_v4f16_MVT_f64_r(unsigned Op0, bool Op0IsKill) {
2032
1
  if ((!Subtarget->isLittleEndian())) {
2033
1
    return fastEmitInst_r(AArch64::REV64v4i16, &AArch64::FPR64RegClass, Op0, Op0IsKill);
2034
1
  }
2035
0
  return 0;
2036
0
}
2037
2038
0
unsigned fastEmit_ISD_BITCAST_MVT_v4f16_MVT_v8i8_r(unsigned Op0, bool Op0IsKill) {
2039
0
  if ((!Subtarget->isLittleEndian())) {
2040
0
    return fastEmitInst_r(AArch64::REV16v8i8, &AArch64::FPR64RegClass, Op0, Op0IsKill);
2041
0
  }
2042
0
  return 0;
2043
0
}
2044
2045
0
unsigned fastEmit_ISD_BITCAST_MVT_v4f16_MVT_v2i32_r(unsigned Op0, bool Op0IsKill) {
2046
0
  if ((!Subtarget->isLittleEndian())) {
2047
0
    return fastEmitInst_r(AArch64::REV32v4i16, &AArch64::FPR64RegClass, Op0, Op0IsKill);
2048
0
  }
2049
0
  return 0;
2050
0
}
2051
2052
0
unsigned fastEmit_ISD_BITCAST_MVT_v4f16_MVT_v1i64_r(unsigned Op0, bool Op0IsKill) {
2053
0
  if ((!Subtarget->isLittleEndian())) {
2054
0
    return fastEmitInst_r(AArch64::REV64v4i16, &AArch64::FPR64RegClass, Op0, Op0IsKill);
2055
0
  }
2056
0
  return 0;
2057
0
}
2058
2059
0
unsigned fastEmit_ISD_BITCAST_MVT_v4f16_MVT_v2f32_r(unsigned Op0, bool Op0IsKill) {
2060
0
  if ((!Subtarget->isLittleEndian())) {
2061
0
    return fastEmitInst_r(AArch64::REV32v4i16, &AArch64::FPR64RegClass, Op0, Op0IsKill);
2062
0
  }
2063
0
  return 0;
2064
0
}
2065
2066
0
unsigned fastEmit_ISD_BITCAST_MVT_v4f16_MVT_v1f64_r(unsigned Op0, bool Op0IsKill) {
2067
0
  if ((!Subtarget->isLittleEndian())) {
2068
0
    return fastEmitInst_r(AArch64::REV64v4i16, &AArch64::FPR64RegClass, Op0, Op0IsKill);
2069
0
  }
2070
0
  return 0;
2071
0
}
2072
2073
2
unsigned fastEmit_ISD_BITCAST_MVT_v4f16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2074
2
switch (RetVT.SimpleTy) {
2075
2
  
case MVT::f64: return fastEmit_ISD_BITCAST_MVT_v4f16_MVT_f64_r(Op0, Op0IsKill)1
;
2076
2
  
case MVT::v8i8: return fastEmit_ISD_BITCAST_MVT_v4f16_MVT_v8i8_r(Op0, Op0IsKill)0
;
2077
2
  
case MVT::v2i32: return fastEmit_ISD_BITCAST_MVT_v4f16_MVT_v2i32_r(Op0, Op0IsKill)0
;
2078
2
  
case MVT::v1i64: return fastEmit_ISD_BITCAST_MVT_v4f16_MVT_v1i64_r(Op0, Op0IsKill)0
;
2079
2
  
case MVT::v2f32: return fastEmit_ISD_BITCAST_MVT_v4f16_MVT_v2f32_r(Op0, Op0IsKill)0
;
2080
2
  
case MVT::v1f64: return fastEmit_ISD_BITCAST_MVT_v4f16_MVT_v1f64_r(Op0, Op0IsKill)0
;
2081
2
  
default: return 01
;
2082
2
}
2083
2
}
2084
2085
0
unsigned fastEmit_ISD_BITCAST_MVT_v8f16_MVT_v16i8_r(unsigned Op0, bool Op0IsKill) {
2086
0
  if ((!Subtarget->isLittleEndian())) {
2087
0
    return fastEmitInst_r(AArch64::REV16v16i8, &AArch64::FPR128RegClass, Op0, Op0IsKill);
2088
0
  }
2089
0
  return 0;
2090
0
}
2091
2092
0
unsigned fastEmit_ISD_BITCAST_MVT_v8f16_MVT_v4i32_r(unsigned Op0, bool Op0IsKill) {
2093
0
  if ((!Subtarget->isLittleEndian())) {
2094
0
    return fastEmitInst_r(AArch64::REV32v8i16, &AArch64::FPR128RegClass, Op0, Op0IsKill);
2095
0
  }
2096
0
  return 0;
2097
0
}
2098
2099
0
unsigned fastEmit_ISD_BITCAST_MVT_v8f16_MVT_v2i64_r(unsigned Op0, bool Op0IsKill) {
2100
0
  if ((!Subtarget->isLittleEndian())) {
2101
0
    return fastEmitInst_r(AArch64::REV64v8i16, &AArch64::FPR128RegClass, Op0, Op0IsKill);
2102
0
  }
2103
0
  return 0;
2104
0
}
2105
2106
0
unsigned fastEmit_ISD_BITCAST_MVT_v8f16_MVT_v4f32_r(unsigned Op0, bool Op0IsKill) {
2107
0
  if ((!Subtarget->isLittleEndian())) {
2108
0
    return fastEmitInst_r(AArch64::REV32v8i16, &AArch64::FPR128RegClass, Op0, Op0IsKill);
2109
0
  }
2110
0
  return 0;
2111
0
}
2112
2113
0
unsigned fastEmit_ISD_BITCAST_MVT_v8f16_MVT_v2f64_r(unsigned Op0, bool Op0IsKill) {
2114
0
  if ((!Subtarget->isLittleEndian())) {
2115
0
    return fastEmitInst_r(AArch64::REV64v8i16, &AArch64::FPR128RegClass, Op0, Op0IsKill);
2116
0
  }
2117
0
  return 0;
2118
0
}
2119
2120
unsigned fastEmit_ISD_BITCAST_MVT_v8f16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2121
switch (RetVT.SimpleTy) {
2122
  case MVT::v16i8: return fastEmit_ISD_BITCAST_MVT_v8f16_MVT_v16i8_r(Op0, Op0IsKill);
2123
  case MVT::v4i32: return fastEmit_ISD_BITCAST_MVT_v8f16_MVT_v4i32_r(Op0, Op0IsKill);
2124
  case MVT::v2i64: return fastEmit_ISD_BITCAST_MVT_v8f16_MVT_v2i64_r(Op0, Op0IsKill);
2125
  case MVT::v4f32: return fastEmit_ISD_BITCAST_MVT_v8f16_MVT_v4f32_r(Op0, Op0IsKill);
2126
  case MVT::v2f64: return fastEmit_ISD_BITCAST_MVT_v8f16_MVT_v2f64_r(Op0, Op0IsKill);
2127
  default: return 0;
2128
}
2129
}
2130
2131
2
unsigned fastEmit_ISD_BITCAST_MVT_v2f32_MVT_f64_r(unsigned Op0, bool Op0IsKill) {
2132
2
  if ((!Subtarget->isLittleEndian())) {
2133
2
    return fastEmitInst_r(AArch64::REV64v2i32, &AArch64::FPR64RegClass, Op0, Op0IsKill);
2134
2
  }
2135
0
  return 0;
2136
0
}
2137
2138
0
unsigned fastEmit_ISD_BITCAST_MVT_v2f32_MVT_v8i8_r(unsigned Op0, bool Op0IsKill) {
2139
0
  if ((!Subtarget->isLittleEndian())) {
2140
0
    return fastEmitInst_r(AArch64::REV32v8i8, &AArch64::FPR64RegClass, Op0, Op0IsKill);
2141
0
  }
2142
0
  return 0;
2143
0
}
2144
2145
0
unsigned fastEmit_ISD_BITCAST_MVT_v2f32_MVT_v4i16_r(unsigned Op0, bool Op0IsKill) {
2146
0
  if ((!Subtarget->isLittleEndian())) {
2147
0
    return fastEmitInst_r(AArch64::REV32v4i16, &AArch64::FPR64RegClass, Op0, Op0IsKill);
2148
0
  }
2149
0
  return 0;
2150
0
}
2151
2152
1
unsigned fastEmit_ISD_BITCAST_MVT_v2f32_MVT_v1i64_r(unsigned Op0, bool Op0IsKill) {
2153
1
  if ((!Subtarget->isLittleEndian())) {
2154
1
    return fastEmitInst_r(AArch64::REV64v2i32, &AArch64::FPR64RegClass, Op0, Op0IsKill);
2155
1
  }
2156
0
  return 0;
2157
0
}
2158
2159
0
unsigned fastEmit_ISD_BITCAST_MVT_v2f32_MVT_v4f16_r(unsigned Op0, bool Op0IsKill) {
2160
0
  if ((!Subtarget->isLittleEndian())) {
2161
0
    return fastEmitInst_r(AArch64::REV32v4i16, &AArch64::FPR64RegClass, Op0, Op0IsKill);
2162
0
  }
2163
0
  return 0;
2164
0
}
2165
2166
0
unsigned fastEmit_ISD_BITCAST_MVT_v2f32_MVT_v1f64_r(unsigned Op0, bool Op0IsKill) {
2167
0
  if ((!Subtarget->isLittleEndian())) {
2168
0
    return fastEmitInst_r(AArch64::REV64v2i32, &AArch64::FPR64RegClass, Op0, Op0IsKill);
2169
0
  }
2170
0
  return 0;
2171
0
}
2172
2173
5
unsigned fastEmit_ISD_BITCAST_MVT_v2f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2174
5
switch (RetVT.SimpleTy) {
2175
5
  
case MVT::f64: return fastEmit_ISD_BITCAST_MVT_v2f32_MVT_f64_r(Op0, Op0IsKill)2
;
2176
5
  
case MVT::v8i8: return fastEmit_ISD_BITCAST_MVT_v2f32_MVT_v8i8_r(Op0, Op0IsKill)0
;
2177
5
  
case MVT::v4i16: return fastEmit_ISD_BITCAST_MVT_v2f32_MVT_v4i16_r(Op0, Op0IsKill)0
;
2178
5
  
case MVT::v1i64: return fastEmit_ISD_BITCAST_MVT_v2f32_MVT_v1i64_r(Op0, Op0IsKill)1
;
2179
5
  
case MVT::v4f16: return fastEmit_ISD_BITCAST_MVT_v2f32_MVT_v4f16_r(Op0, Op0IsKill)0
;
2180
5
  
case MVT::v1f64: return fastEmit_ISD_BITCAST_MVT_v2f32_MVT_v1f64_r(Op0, Op0IsKill)0
;
2181
5
  
default: return 02
;
2182
5
}
2183
5
}
2184
2185
0
unsigned fastEmit_ISD_BITCAST_MVT_v4f32_MVT_v16i8_r(unsigned Op0, bool Op0IsKill) {
2186
0
  if ((!Subtarget->isLittleEndian())) {
2187
0
    return fastEmitInst_r(AArch64::REV32v16i8, &AArch64::FPR128RegClass, Op0, Op0IsKill);
2188
0
  }
2189
0
  return 0;
2190
0
}
2191
2192
0
unsigned fastEmit_ISD_BITCAST_MVT_v4f32_MVT_v8i16_r(unsigned Op0, bool Op0IsKill) {
2193
0
  if ((!Subtarget->isLittleEndian())) {
2194
0
    return fastEmitInst_r(AArch64::REV32v8i16, &AArch64::FPR128RegClass, Op0, Op0IsKill);
2195
0
  }
2196
0
  return 0;
2197
0
}
2198
2199
0
unsigned fastEmit_ISD_BITCAST_MVT_v4f32_MVT_v2i64_r(unsigned Op0, bool Op0IsKill) {
2200
0
  if ((!Subtarget->isLittleEndian())) {
2201
0
    return fastEmitInst_r(AArch64::REV64v4i32, &AArch64::FPR128RegClass, Op0, Op0IsKill);
2202
0
  }
2203
0
  return 0;
2204
0
}
2205
2206
0
unsigned fastEmit_ISD_BITCAST_MVT_v4f32_MVT_v8f16_r(unsigned Op0, bool Op0IsKill) {
2207
0
  if ((!Subtarget->isLittleEndian())) {
2208
0
    return fastEmitInst_r(AArch64::REV32v8i16, &AArch64::FPR128RegClass, Op0, Op0IsKill);
2209
0
  }
2210
0
  return 0;
2211
0
}
2212
2213
0
unsigned fastEmit_ISD_BITCAST_MVT_v4f32_MVT_v2f64_r(unsigned Op0, bool Op0IsKill) {
2214
0
  if ((!Subtarget->isLittleEndian())) {
2215
0
    return fastEmitInst_r(AArch64::REV64v4i32, &AArch64::FPR128RegClass, Op0, Op0IsKill);
2216
0
  }
2217
0
  return 0;
2218
0
}
2219
2220
unsigned fastEmit_ISD_BITCAST_MVT_v4f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2221
switch (RetVT.SimpleTy) {
2222
  case MVT::v16i8: return fastEmit_ISD_BITCAST_MVT_v4f32_MVT_v16i8_r(Op0, Op0IsKill);
2223
  case MVT::v8i16: return fastEmit_ISD_BITCAST_MVT_v4f32_MVT_v8i16_r(Op0, Op0IsKill);
2224
  case MVT::v2i64: return fastEmit_ISD_BITCAST_MVT_v4f32_MVT_v2i64_r(Op0, Op0IsKill);
2225
  case MVT::v8f16: return fastEmit_ISD_BITCAST_MVT_v4f32_MVT_v8f16_r(Op0, Op0IsKill);
2226
  case MVT::v2f64: return fastEmit_ISD_BITCAST_MVT_v4f32_MVT_v2f64_r(Op0, Op0IsKill);
2227
  default: return 0;
2228
}
2229
}
2230
2231
0
unsigned fastEmit_ISD_BITCAST_MVT_v1f64_MVT_v8i8_r(unsigned Op0, bool Op0IsKill) {
2232
0
  if ((!Subtarget->isLittleEndian())) {
2233
0
    return fastEmitInst_r(AArch64::REV64v8i8, &AArch64::FPR64RegClass, Op0, Op0IsKill);
2234
0
  }
2235
0
  return 0;
2236
0
}
2237
2238
0
unsigned fastEmit_ISD_BITCAST_MVT_v1f64_MVT_v4i16_r(unsigned Op0, bool Op0IsKill) {
2239
0
  if ((!Subtarget->isLittleEndian())) {
2240
0
    return fastEmitInst_r(AArch64::REV64v4i16, &AArch64::FPR64RegClass, Op0, Op0IsKill);
2241
0
  }
2242
0
  return 0;
2243
0
}
2244
2245
0
unsigned fastEmit_ISD_BITCAST_MVT_v1f64_MVT_v2i32_r(unsigned Op0, bool Op0IsKill) {
2246
0
  if ((!Subtarget->isLittleEndian())) {
2247
0
    return fastEmitInst_r(AArch64::REV64v2i32, &AArch64::FPR64RegClass, Op0, Op0IsKill);
2248
0
  }
2249
0
  return 0;
2250
0
}
2251
2252
0
unsigned fastEmit_ISD_BITCAST_MVT_v1f64_MVT_v4f16_r(unsigned Op0, bool Op0IsKill) {
2253
0
  if ((!Subtarget->isLittleEndian())) {
2254
0
    return fastEmitInst_r(AArch64::REV64v4i16, &AArch64::FPR64RegClass, Op0, Op0IsKill);
2255
0
  }
2256
0
  return 0;
2257
0
}
2258
2259
0
unsigned fastEmit_ISD_BITCAST_MVT_v1f64_MVT_v2f32_r(unsigned Op0, bool Op0IsKill) {
2260
0
  if ((!Subtarget->isLittleEndian())) {
2261
0
    return fastEmitInst_r(AArch64::REV64v2i32, &AArch64::FPR64RegClass, Op0, Op0IsKill);
2262
0
  }
2263
0
  return 0;
2264
0
}
2265
2266
unsigned fastEmit_ISD_BITCAST_MVT_v1f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2267
switch (RetVT.SimpleTy) {
2268
  case MVT::v8i8: return fastEmit_ISD_BITCAST_MVT_v1f64_MVT_v8i8_r(Op0, Op0IsKill);
2269
  case MVT::v4i16: return fastEmit_ISD_BITCAST_MVT_v1f64_MVT_v4i16_r(Op0, Op0IsKill);
2270
  case MVT::v2i32: return fastEmit_ISD_BITCAST_MVT_v1f64_MVT_v2i32_r(Op0, Op0IsKill);
2271
  case MVT::v4f16: return fastEmit_ISD_BITCAST_MVT_v1f64_MVT_v4f16_r(Op0, Op0IsKill);
2272
  case MVT::v2f32: return fastEmit_ISD_BITCAST_MVT_v1f64_MVT_v2f32_r(Op0, Op0IsKill);
2273
  default: return 0;
2274
}
2275
}
2276
2277
0
unsigned fastEmit_ISD_BITCAST_MVT_v2f64_MVT_v16i8_r(unsigned Op0, bool Op0IsKill) {
2278
0
  if ((!Subtarget->isLittleEndian())) {
2279
0
    return fastEmitInst_r(AArch64::REV64v16i8, &AArch64::FPR128RegClass, Op0, Op0IsKill);
2280
0
  }
2281
0
  return 0;
2282
0
}
2283
2284
0
unsigned fastEmit_ISD_BITCAST_MVT_v2f64_MVT_v8i16_r(unsigned Op0, bool Op0IsKill) {
2285
0
  if ((!Subtarget->isLittleEndian())) {
2286
0
    return fastEmitInst_r(AArch64::REV64v8i16, &AArch64::FPR128RegClass, Op0, Op0IsKill);
2287
0
  }
2288
0
  return 0;
2289
0
}
2290
2291
0
unsigned fastEmit_ISD_BITCAST_MVT_v2f64_MVT_v4i32_r(unsigned Op0, bool Op0IsKill) {
2292
0
  if ((!Subtarget->isLittleEndian())) {
2293
0
    return fastEmitInst_r(AArch64::REV64v4i32, &AArch64::FPR128RegClass, Op0, Op0IsKill);
2294
0
  }
2295
0
  return 0;
2296
0
}
2297
2298
0
unsigned fastEmit_ISD_BITCAST_MVT_v2f64_MVT_v8f16_r(unsigned Op0, bool Op0IsKill) {
2299
0
  if ((!Subtarget->isLittleEndian())) {
2300
0
    return fastEmitInst_r(AArch64::REV64v8i16, &AArch64::FPR128RegClass, Op0, Op0IsKill);
2301
0
  }
2302
0
  return 0;
2303
0
}
2304
2305
0
unsigned fastEmit_ISD_BITCAST_MVT_v2f64_MVT_v4f32_r(unsigned Op0, bool Op0IsKill) {
2306
0
  if ((!Subtarget->isLittleEndian())) {
2307
0
    return fastEmitInst_r(AArch64::REV64v4i32, &AArch64::FPR128RegClass, Op0, Op0IsKill);
2308
0
  }
2309
0
  return 0;
2310
0
}
2311
2312
unsigned fastEmit_ISD_BITCAST_MVT_v2f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2313
switch (RetVT.SimpleTy) {
2314
  case MVT::v16i8: return fastEmit_ISD_BITCAST_MVT_v2f64_MVT_v16i8_r(Op0, Op0IsKill);
2315
  case MVT::v8i16: return fastEmit_ISD_BITCAST_MVT_v2f64_MVT_v8i16_r(Op0, Op0IsKill);
2316
  case MVT::v4i32: return fastEmit_ISD_BITCAST_MVT_v2f64_MVT_v4i32_r(Op0, Op0IsKill);
2317
  case MVT::v8f16: return fastEmit_ISD_BITCAST_MVT_v2f64_MVT_v8f16_r(Op0, Op0IsKill);
2318
  case MVT::v4f32: return fastEmit_ISD_BITCAST_MVT_v2f64_MVT_v4f32_r(Op0, Op0IsKill);
2319
  default: return 0;
2320
}
2321
}
2322
2323
36
unsigned fastEmit_ISD_BITCAST_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
2324
36
  switch (VT.SimpleTy) {
2325
36
  
case MVT::f64: return fastEmit_ISD_BITCAST_MVT_f64_r(RetVT, Op0, Op0IsKill)4
;
2326
36
  
case MVT::v8i8: return fastEmit_ISD_BITCAST_MVT_v8i8_r(RetVT, Op0, Op0IsKill)5
;
2327
36
  
case MVT::v16i8: return fastEmit_ISD_BITCAST_MVT_v16i8_r(RetVT, Op0, Op0IsKill)0
;
2328
36
  
case MVT::v4i16: return fastEmit_ISD_BITCAST_MVT_v4i16_r(RetVT, Op0, Op0IsKill)5
;
2329
36
  
case MVT::v8i16: return fastEmit_ISD_BITCAST_MVT_v8i16_r(RetVT, Op0, Op0IsKill)0
;
2330
36
  
case MVT::v2i32: return fastEmit_ISD_BITCAST_MVT_v2i32_r(RetVT, Op0, Op0IsKill)5
;
2331
36
  
case MVT::v4i32: return fastEmit_ISD_BITCAST_MVT_v4i32_r(RetVT, Op0, Op0IsKill)0
;
2332
36
  
case MVT::v1i64: return fastEmit_ISD_BITCAST_MVT_v1i64_r(RetVT, Op0, Op0IsKill)4
;
2333
36
  
case MVT::v2i64: return fastEmit_ISD_BITCAST_MVT_v2i64_r(RetVT, Op0, Op0IsKill)0
;
2334
36
  
case MVT::v4f16: return fastEmit_ISD_BITCAST_MVT_v4f16_r(RetVT, Op0, Op0IsKill)2
;
2335
36
  
case MVT::v8f16: return fastEmit_ISD_BITCAST_MVT_v8f16_r(RetVT, Op0, Op0IsKill)0
;
2336
36
  
case MVT::v2f32: return fastEmit_ISD_BITCAST_MVT_v2f32_r(RetVT, Op0, Op0IsKill)5
;
2337
36
  
case MVT::v4f32: return fastEmit_ISD_BITCAST_MVT_v4f32_r(RetVT, Op0, Op0IsKill)0
;
2338
36
  
case MVT::v1f64: return fastEmit_ISD_BITCAST_MVT_v1f64_r(RetVT, Op0, Op0IsKill)0
;
2339
36
  
case MVT::v2f64: return fastEmit_ISD_BITCAST_MVT_v2f64_r(RetVT, Op0, Op0IsKill)0
;
2340
36
  
default: return 06
;
2341
36
  }
2342
36
}
2343
2344
// FastEmit functions for ISD::BITREVERSE.
2345
2346
0
unsigned fastEmit_ISD_BITREVERSE_MVT_i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2347
0
  if (RetVT.SimpleTy != MVT::i32)
2348
0
    return 0;
2349
0
  return fastEmitInst_r(AArch64::RBITWr, &AArch64::GPR32RegClass, Op0, Op0IsKill);
2350
0
}
2351
2352
0
unsigned fastEmit_ISD_BITREVERSE_MVT_i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2353
0
  if (RetVT.SimpleTy != MVT::i64)
2354
0
    return 0;
2355
0
  return fastEmitInst_r(AArch64::RBITXr, &AArch64::GPR64RegClass, Op0, Op0IsKill);
2356
0
}
2357
2358
unsigned fastEmit_ISD_BITREVERSE_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
2359
  switch (VT.SimpleTy) {
2360
  case MVT::i32: return fastEmit_ISD_BITREVERSE_MVT_i32_r(RetVT, Op0, Op0IsKill);
2361
  case MVT::i64: return fastEmit_ISD_BITREVERSE_MVT_i64_r(RetVT, Op0, Op0IsKill);
2362
  default: return 0;
2363
  }
2364
}
2365
2366
// FastEmit functions for ISD::BRIND.
2367
2368
0
unsigned fastEmit_ISD_BRIND_MVT_i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2369
0
  if (RetVT.SimpleTy != MVT::isVoid)
2370
0
    return 0;
2371
0
  return fastEmitInst_r(AArch64::BR, &AArch64::GPR64RegClass, Op0, Op0IsKill);
2372
0
}
2373
2374
unsigned fastEmit_ISD_BRIND_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
2375
  switch (VT.SimpleTy) {
2376
  case MVT::i64: return fastEmit_ISD_BRIND_MVT_i64_r(RetVT, Op0, Op0IsKill);
2377
  default: return 0;
2378
  }
2379
}
2380
2381
// FastEmit functions for ISD::BSWAP.
2382
2383
0
unsigned fastEmit_ISD_BSWAP_MVT_i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2384
0
  if (RetVT.SimpleTy != MVT::i32)
2385
0
    return 0;
2386
0
  return fastEmitInst_r(AArch64::REVWr, &AArch64::GPR32RegClass, Op0, Op0IsKill);
2387
0
}
2388
2389
0
unsigned fastEmit_ISD_BSWAP_MVT_i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2390
0
  if (RetVT.SimpleTy != MVT::i64)
2391
0
    return 0;
2392
0
  return fastEmitInst_r(AArch64::REVXr, &AArch64::GPR64RegClass, Op0, Op0IsKill);
2393
0
}
2394
2395
unsigned fastEmit_ISD_BSWAP_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
2396
  switch (VT.SimpleTy) {
2397
  case MVT::i32: return fastEmit_ISD_BSWAP_MVT_i32_r(RetVT, Op0, Op0IsKill);
2398
  case MVT::i64: return fastEmit_ISD_BSWAP_MVT_i64_r(RetVT, Op0, Op0IsKill);
2399
  default: return 0;
2400
  }
2401
}
2402
2403
// FastEmit functions for ISD::CTLZ.
2404
2405
0
unsigned fastEmit_ISD_CTLZ_MVT_i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2406
0
  if (RetVT.SimpleTy != MVT::i32)
2407
0
    return 0;
2408
0
  return fastEmitInst_r(AArch64::CLZWr, &AArch64::GPR32RegClass, Op0, Op0IsKill);
2409
0
}
2410
2411
0
unsigned fastEmit_ISD_CTLZ_MVT_i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2412
0
  if (RetVT.SimpleTy != MVT::i64)
2413
0
    return 0;
2414
0
  return fastEmitInst_r(AArch64::CLZXr, &AArch64::GPR64RegClass, Op0, Op0IsKill);
2415
0
}
2416
2417
0
unsigned fastEmit_ISD_CTLZ_MVT_v8i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2418
0
  if (RetVT.SimpleTy != MVT::v8i8)
2419
0
    return 0;
2420
0
  if ((Subtarget->hasNEON())) {
2421
0
    return fastEmitInst_r(AArch64::CLZv8i8, &AArch64::FPR64RegClass, Op0, Op0IsKill);
2422
0
  }
2423
0
  return 0;
2424
0
}
2425
2426
0
unsigned fastEmit_ISD_CTLZ_MVT_v16i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2427
0
  if (RetVT.SimpleTy != MVT::v16i8)
2428
0
    return 0;
2429
0
  if ((Subtarget->hasNEON())) {
2430
0
    return fastEmitInst_r(AArch64::CLZv16i8, &AArch64::FPR128RegClass, Op0, Op0IsKill);
2431
0
  }
2432
0
  return 0;
2433
0
}
2434
2435
0
unsigned fastEmit_ISD_CTLZ_MVT_v4i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2436
0
  if (RetVT.SimpleTy != MVT::v4i16)
2437
0
    return 0;
2438
0
  if ((Subtarget->hasNEON())) {
2439
0
    return fastEmitInst_r(AArch64::CLZv4i16, &AArch64::FPR64RegClass, Op0, Op0IsKill);
2440
0
  }
2441
0
  return 0;
2442
0
}
2443
2444
0
unsigned fastEmit_ISD_CTLZ_MVT_v8i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2445
0
  if (RetVT.SimpleTy != MVT::v8i16)
2446
0
    return 0;
2447
0
  if ((Subtarget->hasNEON())) {
2448
0
    return fastEmitInst_r(AArch64::CLZv8i16, &AArch64::FPR128RegClass, Op0, Op0IsKill);
2449
0
  }
2450
0
  return 0;
2451
0
}
2452
2453
0
unsigned fastEmit_ISD_CTLZ_MVT_v2i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2454
0
  if (RetVT.SimpleTy != MVT::v2i32)
2455
0
    return 0;
2456
0
  if ((Subtarget->hasNEON())) {
2457
0
    return fastEmitInst_r(AArch64::CLZv2i32, &AArch64::FPR64RegClass, Op0, Op0IsKill);
2458
0
  }
2459
0
  return 0;
2460
0
}
2461
2462
0
unsigned fastEmit_ISD_CTLZ_MVT_v4i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2463
0
  if (RetVT.SimpleTy != MVT::v4i32)
2464
0
    return 0;
2465
0
  if ((Subtarget->hasNEON())) {
2466
0
    return fastEmitInst_r(AArch64::CLZv4i32, &AArch64::FPR128RegClass, Op0, Op0IsKill);
2467
0
  }
2468
0
  return 0;
2469
0
}
2470
2471
unsigned fastEmit_ISD_CTLZ_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
2472
  switch (VT.SimpleTy) {
2473
  case MVT::i32: return fastEmit_ISD_CTLZ_MVT_i32_r(RetVT, Op0, Op0IsKill);
2474
  case MVT::i64: return fastEmit_ISD_CTLZ_MVT_i64_r(RetVT, Op0, Op0IsKill);
2475
  case MVT::v8i8: return fastEmit_ISD_CTLZ_MVT_v8i8_r(RetVT, Op0, Op0IsKill);
2476
  case MVT::v16i8: return fastEmit_ISD_CTLZ_MVT_v16i8_r(RetVT, Op0, Op0IsKill);
2477
  case MVT::v4i16: return fastEmit_ISD_CTLZ_MVT_v4i16_r(RetVT, Op0, Op0IsKill);
2478
  case MVT::v8i16: return fastEmit_ISD_CTLZ_MVT_v8i16_r(RetVT, Op0, Op0IsKill);
2479
  case MVT::v2i32: return fastEmit_ISD_CTLZ_MVT_v2i32_r(RetVT, Op0, Op0IsKill);
2480
  case MVT::v4i32: return fastEmit_ISD_CTLZ_MVT_v4i32_r(RetVT, Op0, Op0IsKill);
2481
  default: return 0;
2482
  }
2483
}
2484
2485
// FastEmit functions for ISD::CTPOP.
2486
2487
0
unsigned fastEmit_ISD_CTPOP_MVT_v8i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2488
0
  if (RetVT.SimpleTy != MVT::v8i8)
2489
0
    return 0;
2490
0
  if ((Subtarget->hasNEON())) {
2491
0
    return fastEmitInst_r(AArch64::CNTv8i8, &AArch64::FPR64RegClass, Op0, Op0IsKill);
2492
0
  }
2493
0
  return 0;
2494
0
}
2495
2496
0
unsigned fastEmit_ISD_CTPOP_MVT_v16i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2497
0
  if (RetVT.SimpleTy != MVT::v16i8)
2498
0
    return 0;
2499
0
  if ((Subtarget->hasNEON())) {
2500
0
    return fastEmitInst_r(AArch64::CNTv16i8, &AArch64::FPR128RegClass, Op0, Op0IsKill);
2501
0
  }
2502
0
  return 0;
2503
0
}
2504
2505
unsigned fastEmit_ISD_CTPOP_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
2506
  switch (VT.SimpleTy) {
2507
  case MVT::v8i8: return fastEmit_ISD_CTPOP_MVT_v8i8_r(RetVT, Op0, Op0IsKill);
2508
  case MVT::v16i8: return fastEmit_ISD_CTPOP_MVT_v16i8_r(RetVT, Op0, Op0IsKill);
2509
  default: return 0;
2510
  }
2511
}
2512
2513
// FastEmit functions for ISD::FABS.
2514
2515
0
unsigned fastEmit_ISD_FABS_MVT_f16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2516
0
  if (RetVT.SimpleTy != MVT::f16)
2517
0
    return 0;
2518
0
  if ((Subtarget->hasFullFP16())) {
2519
0
    return fastEmitInst_r(AArch64::FABSHr, &AArch64::FPR16RegClass, Op0, Op0IsKill);
2520
0
  }
2521
0
  return 0;
2522
0
}
2523
2524
0
unsigned fastEmit_ISD_FABS_MVT_f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2525
0
  if (RetVT.SimpleTy != MVT::f32)
2526
0
    return 0;
2527
0
  if ((Subtarget->hasFPARMv8())) {
2528
0
    return fastEmitInst_r(AArch64::FABSSr, &AArch64::FPR32RegClass, Op0, Op0IsKill);
2529
0
  }
2530
0
  return 0;
2531
0
}
2532
2533
0
unsigned fastEmit_ISD_FABS_MVT_f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2534
0
  if (RetVT.SimpleTy != MVT::f64)
2535
0
    return 0;
2536
0
  if ((Subtarget->hasFPARMv8())) {
2537
0
    return fastEmitInst_r(AArch64::FABSDr, &AArch64::FPR64RegClass, Op0, Op0IsKill);
2538
0
  }
2539
0
  return 0;
2540
0
}
2541
2542
0
unsigned fastEmit_ISD_FABS_MVT_v4f16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2543
0
  if (RetVT.SimpleTy != MVT::v4f16)
2544
0
    return 0;
2545
0
  if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) {
2546
0
    return fastEmitInst_r(AArch64::FABSv4f16, &AArch64::FPR64RegClass, Op0, Op0IsKill);
2547
0
  }
2548
0
  return 0;
2549
0
}
2550
2551
0
unsigned fastEmit_ISD_FABS_MVT_v8f16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2552
0
  if (RetVT.SimpleTy != MVT::v8f16)
2553
0
    return 0;
2554
0
  if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) {
2555
0
    return fastEmitInst_r(AArch64::FABSv8f16, &AArch64::FPR128RegClass, Op0, Op0IsKill);
2556
0
  }
2557
0
  return 0;
2558
0
}
2559
2560
0
unsigned fastEmit_ISD_FABS_MVT_v2f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2561
0
  if (RetVT.SimpleTy != MVT::v2f32)
2562
0
    return 0;
2563
0
  if ((Subtarget->hasNEON())) {
2564
0
    return fastEmitInst_r(AArch64::FABSv2f32, &AArch64::FPR64RegClass, Op0, Op0IsKill);
2565
0
  }
2566
0
  return 0;
2567
0
}
2568
2569
0
unsigned fastEmit_ISD_FABS_MVT_v4f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2570
0
  if (RetVT.SimpleTy != MVT::v4f32)
2571
0
    return 0;
2572
0
  if ((Subtarget->hasNEON())) {
2573
0
    return fastEmitInst_r(AArch64::FABSv4f32, &AArch64::FPR128RegClass, Op0, Op0IsKill);
2574
0
  }
2575
0
  return 0;
2576
0
}
2577
2578
0
unsigned fastEmit_ISD_FABS_MVT_v2f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2579
0
  if (RetVT.SimpleTy != MVT::v2f64)
2580
0
    return 0;
2581
0
  if ((Subtarget->hasNEON())) {
2582
0
    return fastEmitInst_r(AArch64::FABSv2f64, &AArch64::FPR128RegClass, Op0, Op0IsKill);
2583
0
  }
2584
0
  return 0;
2585
0
}
2586
2587
unsigned fastEmit_ISD_FABS_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
2588
  switch (VT.SimpleTy) {
2589
  case MVT::f16: return fastEmit_ISD_FABS_MVT_f16_r(RetVT, Op0, Op0IsKill);
2590
  case MVT::f32: return fastEmit_ISD_FABS_MVT_f32_r(RetVT, Op0, Op0IsKill);
2591
  case MVT::f64: return fastEmit_ISD_FABS_MVT_f64_r(RetVT, Op0, Op0IsKill);
2592
  case MVT::v4f16: return fastEmit_ISD_FABS_MVT_v4f16_r(RetVT, Op0, Op0IsKill);
2593
  case MVT::v8f16: return fastEmit_ISD_FABS_MVT_v8f16_r(RetVT, Op0, Op0IsKill);
2594
  case MVT::v2f32: return fastEmit_ISD_FABS_MVT_v2f32_r(RetVT, Op0, Op0IsKill);
2595
  case MVT::v4f32: return fastEmit_ISD_FABS_MVT_v4f32_r(RetVT, Op0, Op0IsKill);
2596
  case MVT::v2f64: return fastEmit_ISD_FABS_MVT_v2f64_r(RetVT, Op0, Op0IsKill);
2597
  default: return 0;
2598
  }
2599
}
2600
2601
// FastEmit functions for ISD::FCEIL.
2602
2603
0
unsigned fastEmit_ISD_FCEIL_MVT_f16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2604
0
  if (RetVT.SimpleTy != MVT::f16)
2605
0
    return 0;
2606
0
  if ((Subtarget->hasFullFP16())) {
2607
0
    return fastEmitInst_r(AArch64::FRINTPHr, &AArch64::FPR16RegClass, Op0, Op0IsKill);
2608
0
  }
2609
0
  return 0;
2610
0
}
2611
2612
0
unsigned fastEmit_ISD_FCEIL_MVT_f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2613
0
  if (RetVT.SimpleTy != MVT::f32)
2614
0
    return 0;
2615
0
  if ((Subtarget->hasFPARMv8())) {
2616
0
    return fastEmitInst_r(AArch64::FRINTPSr, &AArch64::FPR32RegClass, Op0, Op0IsKill);
2617
0
  }
2618
0
  return 0;
2619
0
}
2620
2621
0
unsigned fastEmit_ISD_FCEIL_MVT_f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2622
0
  if (RetVT.SimpleTy != MVT::f64)
2623
0
    return 0;
2624
0
  if ((Subtarget->hasFPARMv8())) {
2625
0
    return fastEmitInst_r(AArch64::FRINTPDr, &AArch64::FPR64RegClass, Op0, Op0IsKill);
2626
0
  }
2627
0
  return 0;
2628
0
}
2629
2630
0
unsigned fastEmit_ISD_FCEIL_MVT_v4f16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2631
0
  if (RetVT.SimpleTy != MVT::v4f16)
2632
0
    return 0;
2633
0
  if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) {
2634
0
    return fastEmitInst_r(AArch64::FRINTPv4f16, &AArch64::FPR64RegClass, Op0, Op0IsKill);
2635
0
  }
2636
0
  return 0;
2637
0
}
2638
2639
0
unsigned fastEmit_ISD_FCEIL_MVT_v8f16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2640
0
  if (RetVT.SimpleTy != MVT::v8f16)
2641
0
    return 0;
2642
0
  if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) {
2643
0
    return fastEmitInst_r(AArch64::FRINTPv8f16, &AArch64::FPR128RegClass, Op0, Op0IsKill);
2644
0
  }
2645
0
  return 0;
2646
0
}
2647
2648
0
unsigned fastEmit_ISD_FCEIL_MVT_v2f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2649
0
  if (RetVT.SimpleTy != MVT::v2f32)
2650
0
    return 0;
2651
0
  if ((Subtarget->hasNEON())) {
2652
0
    return fastEmitInst_r(AArch64::FRINTPv2f32, &AArch64::FPR64RegClass, Op0, Op0IsKill);
2653
0
  }
2654
0
  return 0;
2655
0
}
2656
2657
0
unsigned fastEmit_ISD_FCEIL_MVT_v4f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2658
0
  if (RetVT.SimpleTy != MVT::v4f32)
2659
0
    return 0;
2660
0
  if ((Subtarget->hasNEON())) {
2661
0
    return fastEmitInst_r(AArch64::FRINTPv4f32, &AArch64::FPR128RegClass, Op0, Op0IsKill);
2662
0
  }
2663
0
  return 0;
2664
0
}
2665
2666
0
unsigned fastEmit_ISD_FCEIL_MVT_v2f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2667
0
  if (RetVT.SimpleTy != MVT::v2f64)
2668
0
    return 0;
2669
0
  if ((Subtarget->hasNEON())) {
2670
0
    return fastEmitInst_r(AArch64::FRINTPv2f64, &AArch64::FPR128RegClass, Op0, Op0IsKill);
2671
0
  }
2672
0
  return 0;
2673
0
}
2674
2675
unsigned fastEmit_ISD_FCEIL_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
2676
  switch (VT.SimpleTy) {
2677
  case MVT::f16: return fastEmit_ISD_FCEIL_MVT_f16_r(RetVT, Op0, Op0IsKill);
2678
  case MVT::f32: return fastEmit_ISD_FCEIL_MVT_f32_r(RetVT, Op0, Op0IsKill);
2679
  case MVT::f64: return fastEmit_ISD_FCEIL_MVT_f64_r(RetVT, Op0, Op0IsKill);
2680
  case MVT::v4f16: return fastEmit_ISD_FCEIL_MVT_v4f16_r(RetVT, Op0, Op0IsKill);
2681
  case MVT::v8f16: return fastEmit_ISD_FCEIL_MVT_v8f16_r(RetVT, Op0, Op0IsKill);
2682
  case MVT::v2f32: return fastEmit_ISD_FCEIL_MVT_v2f32_r(RetVT, Op0, Op0IsKill);
2683
  case MVT::v4f32: return fastEmit_ISD_FCEIL_MVT_v4f32_r(RetVT, Op0, Op0IsKill);
2684
  case MVT::v2f64: return fastEmit_ISD_FCEIL_MVT_v2f64_r(RetVT, Op0, Op0IsKill);
2685
  default: return 0;
2686
  }
2687
}
2688
2689
// FastEmit functions for ISD::FFLOOR.
2690
2691
0
unsigned fastEmit_ISD_FFLOOR_MVT_f16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2692
0
  if (RetVT.SimpleTy != MVT::f16)
2693
0
    return 0;
2694
0
  if ((Subtarget->hasFullFP16())) {
2695
0
    return fastEmitInst_r(AArch64::FRINTMHr, &AArch64::FPR16RegClass, Op0, Op0IsKill);
2696
0
  }
2697
0
  return 0;
2698
0
}
2699
2700
0
unsigned fastEmit_ISD_FFLOOR_MVT_f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2701
0
  if (RetVT.SimpleTy != MVT::f32)
2702
0
    return 0;
2703
0
  if ((Subtarget->hasFPARMv8())) {
2704
0
    return fastEmitInst_r(AArch64::FRINTMSr, &AArch64::FPR32RegClass, Op0, Op0IsKill);
2705
0
  }
2706
0
  return 0;
2707
0
}
2708
2709
0
unsigned fastEmit_ISD_FFLOOR_MVT_f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2710
0
  if (RetVT.SimpleTy != MVT::f64)
2711
0
    return 0;
2712
0
  if ((Subtarget->hasFPARMv8())) {
2713
0
    return fastEmitInst_r(AArch64::FRINTMDr, &AArch64::FPR64RegClass, Op0, Op0IsKill);
2714
0
  }
2715
0
  return 0;
2716
0
}
2717
2718
0
unsigned fastEmit_ISD_FFLOOR_MVT_v4f16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2719
0
  if (RetVT.SimpleTy != MVT::v4f16)
2720
0
    return 0;
2721
0
  if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) {
2722
0
    return fastEmitInst_r(AArch64::FRINTMv4f16, &AArch64::FPR64RegClass, Op0, Op0IsKill);
2723
0
  }
2724
0
  return 0;
2725
0
}
2726
2727
0
unsigned fastEmit_ISD_FFLOOR_MVT_v8f16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2728
0
  if (RetVT.SimpleTy != MVT::v8f16)
2729
0
    return 0;
2730
0
  if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) {
2731
0
    return fastEmitInst_r(AArch64::FRINTMv8f16, &AArch64::FPR128RegClass, Op0, Op0IsKill);
2732
0
  }
2733
0
  return 0;
2734
0
}
2735
2736
0
unsigned fastEmit_ISD_FFLOOR_MVT_v2f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2737
0
  if (RetVT.SimpleTy != MVT::v2f32)
2738
0
    return 0;
2739
0
  if ((Subtarget->hasNEON())) {
2740
0
    return fastEmitInst_r(AArch64::FRINTMv2f32, &AArch64::FPR64RegClass, Op0, Op0IsKill);
2741
0
  }
2742
0
  return 0;
2743
0
}
2744
2745
0
unsigned fastEmit_ISD_FFLOOR_MVT_v4f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2746
0
  if (RetVT.SimpleTy != MVT::v4f32)
2747
0
    return 0;
2748
0
  if ((Subtarget->hasNEON())) {
2749
0
    return fastEmitInst_r(AArch64::FRINTMv4f32, &AArch64::FPR128RegClass, Op0, Op0IsKill);
2750
0
  }
2751
0
  return 0;
2752
0
}
2753
2754
0
unsigned fastEmit_ISD_FFLOOR_MVT_v2f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2755
0
  if (RetVT.SimpleTy != MVT::v2f64)
2756
0
    return 0;
2757
0
  if ((Subtarget->hasNEON())) {
2758
0
    return fastEmitInst_r(AArch64::FRINTMv2f64, &AArch64::FPR128RegClass, Op0, Op0IsKill);
2759
0
  }
2760
0
  return 0;
2761
0
}
2762
2763
unsigned fastEmit_ISD_FFLOOR_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
2764
  switch (VT.SimpleTy) {
2765
  case MVT::f16: return fastEmit_ISD_FFLOOR_MVT_f16_r(RetVT, Op0, Op0IsKill);
2766
  case MVT::f32: return fastEmit_ISD_FFLOOR_MVT_f32_r(RetVT, Op0, Op0IsKill);
2767
  case MVT::f64: return fastEmit_ISD_FFLOOR_MVT_f64_r(RetVT, Op0, Op0IsKill);
2768
  case MVT::v4f16: return fastEmit_ISD_FFLOOR_MVT_v4f16_r(RetVT, Op0, Op0IsKill);
2769
  case MVT::v8f16: return fastEmit_ISD_FFLOOR_MVT_v8f16_r(RetVT, Op0, Op0IsKill);
2770
  case MVT::v2f32: return fastEmit_ISD_FFLOOR_MVT_v2f32_r(RetVT, Op0, Op0IsKill);
2771
  case MVT::v4f32: return fastEmit_ISD_FFLOOR_MVT_v4f32_r(RetVT, Op0, Op0IsKill);
2772
  case MVT::v2f64: return fastEmit_ISD_FFLOOR_MVT_v2f64_r(RetVT, Op0, Op0IsKill);
2773
  default: return 0;
2774
  }
2775
}
2776
2777
// FastEmit functions for ISD::FNEARBYINT.
2778
2779
0
unsigned fastEmit_ISD_FNEARBYINT_MVT_f16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2780
0
  if (RetVT.SimpleTy != MVT::f16)
2781
0
    return 0;
2782
0
  if ((Subtarget->hasFullFP16())) {
2783
0
    return fastEmitInst_r(AArch64::FRINTIHr, &AArch64::FPR16RegClass, Op0, Op0IsKill);
2784
0
  }
2785
0
  return 0;
2786
0
}
2787
2788
0
unsigned fastEmit_ISD_FNEARBYINT_MVT_f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2789
0
  if (RetVT.SimpleTy != MVT::f32)
2790
0
    return 0;
2791
0
  if ((Subtarget->hasFPARMv8())) {
2792
0
    return fastEmitInst_r(AArch64::FRINTISr, &AArch64::FPR32RegClass, Op0, Op0IsKill);
2793
0
  }
2794
0
  return 0;
2795
0
}
2796
2797
0
unsigned fastEmit_ISD_FNEARBYINT_MVT_f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2798
0
  if (RetVT.SimpleTy != MVT::f64)
2799
0
    return 0;
2800
0
  if ((Subtarget->hasFPARMv8())) {
2801
0
    return fastEmitInst_r(AArch64::FRINTIDr, &AArch64::FPR64RegClass, Op0, Op0IsKill);
2802
0
  }
2803
0
  return 0;
2804
0
}
2805
2806
0
unsigned fastEmit_ISD_FNEARBYINT_MVT_v4f16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2807
0
  if (RetVT.SimpleTy != MVT::v4f16)
2808
0
    return 0;
2809
0
  if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) {
2810
0
    return fastEmitInst_r(AArch64::FRINTIv4f16, &AArch64::FPR64RegClass, Op0, Op0IsKill);
2811
0
  }
2812
0
  return 0;
2813
0
}
2814
2815
0
unsigned fastEmit_ISD_FNEARBYINT_MVT_v8f16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2816
0
  if (RetVT.SimpleTy != MVT::v8f16)
2817
0
    return 0;
2818
0
  if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) {
2819
0
    return fastEmitInst_r(AArch64::FRINTIv8f16, &AArch64::FPR128RegClass, Op0, Op0IsKill);
2820
0
  }
2821
0
  return 0;
2822
0
}
2823
2824
0
unsigned fastEmit_ISD_FNEARBYINT_MVT_v2f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2825
0
  if (RetVT.SimpleTy != MVT::v2f32)
2826
0
    return 0;
2827
0
  if ((Subtarget->hasNEON())) {
2828
0
    return fastEmitInst_r(AArch64::FRINTIv2f32, &AArch64::FPR64RegClass, Op0, Op0IsKill);
2829
0
  }
2830
0
  return 0;
2831
0
}
2832
2833
0
unsigned fastEmit_ISD_FNEARBYINT_MVT_v4f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2834
0
  if (RetVT.SimpleTy != MVT::v4f32)
2835
0
    return 0;
2836
0
  if ((Subtarget->hasNEON())) {
2837
0
    return fastEmitInst_r(AArch64::FRINTIv4f32, &AArch64::FPR128RegClass, Op0, Op0IsKill);
2838
0
  }
2839
0
  return 0;
2840
0
}
2841
2842
0
unsigned fastEmit_ISD_FNEARBYINT_MVT_v2f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2843
0
  if (RetVT.SimpleTy != MVT::v2f64)
2844
0
    return 0;
2845
0
  if ((Subtarget->hasNEON())) {
2846
0
    return fastEmitInst_r(AArch64::FRINTIv2f64, &AArch64::FPR128RegClass, Op0, Op0IsKill);
2847
0
  }
2848
0
  return 0;
2849
0
}
2850
2851
unsigned fastEmit_ISD_FNEARBYINT_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
2852
  switch (VT.SimpleTy) {
2853
  case MVT::f16: return fastEmit_ISD_FNEARBYINT_MVT_f16_r(RetVT, Op0, Op0IsKill);
2854
  case MVT::f32: return fastEmit_ISD_FNEARBYINT_MVT_f32_r(RetVT, Op0, Op0IsKill);
2855
  case MVT::f64: return fastEmit_ISD_FNEARBYINT_MVT_f64_r(RetVT, Op0, Op0IsKill);
2856
  case MVT::v4f16: return fastEmit_ISD_FNEARBYINT_MVT_v4f16_r(RetVT, Op0, Op0IsKill);
2857
  case MVT::v8f16: return fastEmit_ISD_FNEARBYINT_MVT_v8f16_r(RetVT, Op0, Op0IsKill);
2858
  case MVT::v2f32: return fastEmit_ISD_FNEARBYINT_MVT_v2f32_r(RetVT, Op0, Op0IsKill);
2859
  case MVT::v4f32: return fastEmit_ISD_FNEARBYINT_MVT_v4f32_r(RetVT, Op0, Op0IsKill);
2860
  case MVT::v2f64: return fastEmit_ISD_FNEARBYINT_MVT_v2f64_r(RetVT, Op0, Op0IsKill);
2861
  default: return 0;
2862
  }
2863
}
2864
2865
// FastEmit functions for ISD::FNEG.
2866
2867
0
unsigned fastEmit_ISD_FNEG_MVT_f16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2868
0
  if (RetVT.SimpleTy != MVT::f16)
2869
0
    return 0;
2870
0
  if ((Subtarget->hasFullFP16())) {
2871
0
    return fastEmitInst_r(AArch64::FNEGHr, &AArch64::FPR16RegClass, Op0, Op0IsKill);
2872
0
  }
2873
0
  return 0;
2874
0
}
2875
2876
0
unsigned fastEmit_ISD_FNEG_MVT_f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2877
0
  if (RetVT.SimpleTy != MVT::f32)
2878
0
    return 0;
2879
0
  if ((Subtarget->hasFPARMv8())) {
2880
0
    return fastEmitInst_r(AArch64::FNEGSr, &AArch64::FPR32RegClass, Op0, Op0IsKill);
2881
0
  }
2882
0
  return 0;
2883
0
}
2884
2885
0
unsigned fastEmit_ISD_FNEG_MVT_f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2886
0
  if (RetVT.SimpleTy != MVT::f64)
2887
0
    return 0;
2888
0
  if ((Subtarget->hasFPARMv8())) {
2889
0
    return fastEmitInst_r(AArch64::FNEGDr, &AArch64::FPR64RegClass, Op0, Op0IsKill);
2890
0
  }
2891
0
  return 0;
2892
0
}
2893
2894
0
unsigned fastEmit_ISD_FNEG_MVT_v4f16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2895
0
  if (RetVT.SimpleTy != MVT::v4f16)
2896
0
    return 0;
2897
0
  if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) {
2898
0
    return fastEmitInst_r(AArch64::FNEGv4f16, &AArch64::FPR64RegClass, Op0, Op0IsKill);
2899
0
  }
2900
0
  return 0;
2901
0
}
2902
2903
0
unsigned fastEmit_ISD_FNEG_MVT_v8f16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2904
0
  if (RetVT.SimpleTy != MVT::v8f16)
2905
0
    return 0;
2906
0
  if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) {
2907
0
    return fastEmitInst_r(AArch64::FNEGv8f16, &AArch64::FPR128RegClass, Op0, Op0IsKill);
2908
0
  }
2909
0
  return 0;
2910
0
}
2911
2912
0
unsigned fastEmit_ISD_FNEG_MVT_v2f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2913
0
  if (RetVT.SimpleTy != MVT::v2f32)
2914
0
    return 0;
2915
0
  if ((Subtarget->hasNEON())) {
2916
0
    return fastEmitInst_r(AArch64::FNEGv2f32, &AArch64::FPR64RegClass, Op0, Op0IsKill);
2917
0
  }
2918
0
  return 0;
2919
0
}
2920
2921
0
unsigned fastEmit_ISD_FNEG_MVT_v4f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2922
0
  if (RetVT.SimpleTy != MVT::v4f32)
2923
0
    return 0;
2924
0
  if ((Subtarget->hasNEON())) {
2925
0
    return fastEmitInst_r(AArch64::FNEGv4f32, &AArch64::FPR128RegClass, Op0, Op0IsKill);
2926
0
  }
2927
0
  return 0;
2928
0
}
2929
2930
0
unsigned fastEmit_ISD_FNEG_MVT_v2f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2931
0
  if (RetVT.SimpleTy != MVT::v2f64)
2932
0
    return 0;
2933
0
  if ((Subtarget->hasNEON())) {
2934
0
    return fastEmitInst_r(AArch64::FNEGv2f64, &AArch64::FPR128RegClass, Op0, Op0IsKill);
2935
0
  }
2936
0
  return 0;
2937
0
}
2938
2939
unsigned fastEmit_ISD_FNEG_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
2940
  switch (VT.SimpleTy) {
2941
  case MVT::f16: return fastEmit_ISD_FNEG_MVT_f16_r(RetVT, Op0, Op0IsKill);
2942
  case MVT::f32: return fastEmit_ISD_FNEG_MVT_f32_r(RetVT, Op0, Op0IsKill);
2943
  case MVT::f64: return fastEmit_ISD_FNEG_MVT_f64_r(RetVT, Op0, Op0IsKill);
2944
  case MVT::v4f16: return fastEmit_ISD_FNEG_MVT_v4f16_r(RetVT, Op0, Op0IsKill);
2945
  case MVT::v8f16: return fastEmit_ISD_FNEG_MVT_v8f16_r(RetVT, Op0, Op0IsKill);
2946
  case MVT::v2f32: return fastEmit_ISD_FNEG_MVT_v2f32_r(RetVT, Op0, Op0IsKill);
2947
  case MVT::v4f32: return fastEmit_ISD_FNEG_MVT_v4f32_r(RetVT, Op0, Op0IsKill);
2948
  case MVT::v2f64: return fastEmit_ISD_FNEG_MVT_v2f64_r(RetVT, Op0, Op0IsKill);
2949
  default: return 0;
2950
  }
2951
}
2952
2953
// FastEmit functions for ISD::FP_EXTEND.
2954
2955
0
unsigned fastEmit_ISD_FP_EXTEND_MVT_f16_MVT_f32_r(unsigned Op0, bool Op0IsKill) {
2956
0
  if ((Subtarget->hasFPARMv8())) {
2957
0
    return fastEmitInst_r(AArch64::FCVTSHr, &AArch64::FPR32RegClass, Op0, Op0IsKill);
2958
0
  }
2959
0
  return 0;
2960
0
}
2961
2962
0
unsigned fastEmit_ISD_FP_EXTEND_MVT_f16_MVT_f64_r(unsigned Op0, bool Op0IsKill) {
2963
0
  if ((Subtarget->hasFPARMv8())) {
2964
0
    return fastEmitInst_r(AArch64::FCVTDHr, &AArch64::FPR64RegClass, Op0, Op0IsKill);
2965
0
  }
2966
0
  return 0;
2967
0
}
2968
2969
unsigned fastEmit_ISD_FP_EXTEND_MVT_f16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2970
switch (RetVT.SimpleTy) {
2971
  case MVT::f32: return fastEmit_ISD_FP_EXTEND_MVT_f16_MVT_f32_r(Op0, Op0IsKill);
2972
  case MVT::f64: return fastEmit_ISD_FP_EXTEND_MVT_f16_MVT_f64_r(Op0, Op0IsKill);
2973
  default: return 0;
2974
}
2975
}
2976
2977
0
unsigned fastEmit_ISD_FP_EXTEND_MVT_f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2978
0
  if (RetVT.SimpleTy != MVT::f64)
2979
0
    return 0;
2980
0
  if ((Subtarget->hasFPARMv8())) {
2981
0
    return fastEmitInst_r(AArch64::FCVTDSr, &AArch64::FPR64RegClass, Op0, Op0IsKill);
2982
0
  }
2983
0
  return 0;
2984
0
}
2985
2986
0
unsigned fastEmit_ISD_FP_EXTEND_MVT_v4f16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2987
0
  if (RetVT.SimpleTy != MVT::v4f32)
2988
0
    return 0;
2989
0
  return fastEmitInst_r(AArch64::FCVTLv4i16, &AArch64::FPR128RegClass, Op0, Op0IsKill);
2990
0
}
2991
2992
0
unsigned fastEmit_ISD_FP_EXTEND_MVT_v2f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2993
0
  if (RetVT.SimpleTy != MVT::v2f64)
2994
0
    return 0;
2995
0
  return fastEmitInst_r(AArch64::FCVTLv2i32, &AArch64::FPR128RegClass, Op0, Op0IsKill);
2996
0
}
2997
2998
unsigned fastEmit_ISD_FP_EXTEND_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
2999
  switch (VT.SimpleTy) {
3000
  case MVT::f16: return fastEmit_ISD_FP_EXTEND_MVT_f16_r(RetVT, Op0, Op0IsKill);
3001
  case MVT::f32: return fastEmit_ISD_FP_EXTEND_MVT_f32_r(RetVT, Op0, Op0IsKill);
3002
  case MVT::v4f16: return fastEmit_ISD_FP_EXTEND_MVT_v4f16_r(RetVT, Op0, Op0IsKill);
3003
  case MVT::v2f32: return fastEmit_ISD_FP_EXTEND_MVT_v2f32_r(RetVT, Op0, Op0IsKill);
3004
  default: return 0;
3005
  }
3006
}
3007
3008
// FastEmit functions for ISD::FP_ROUND.
3009
3010
0
unsigned fastEmit_ISD_FP_ROUND_MVT_f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3011
0
  if (RetVT.SimpleTy != MVT::f16)
3012
0
    return 0;
3013
0
  if ((Subtarget->hasFPARMv8())) {
3014
0
    return fastEmitInst_r(AArch64::FCVTHSr, &AArch64::FPR16RegClass, Op0, Op0IsKill);
3015
0
  }
3016
0
  return 0;
3017
0
}
3018
3019
0
unsigned fastEmit_ISD_FP_ROUND_MVT_f64_MVT_f16_r(unsigned Op0, bool Op0IsKill) {
3020
0
  if ((Subtarget->hasFPARMv8())) {
3021
0
    return fastEmitInst_r(AArch64::FCVTHDr, &AArch64::FPR16RegClass, Op0, Op0IsKill);
3022
0
  }
3023
0
  return 0;
3024
0
}
3025
3026
0
unsigned fastEmit_ISD_FP_ROUND_MVT_f64_MVT_f32_r(unsigned Op0, bool Op0IsKill) {
3027
0
  if ((Subtarget->hasFPARMv8())) {
3028
0
    return fastEmitInst_r(AArch64::FCVTSDr, &AArch64::FPR32RegClass, Op0, Op0IsKill);
3029
0
  }
3030
0
  return 0;
3031
0
}
3032
3033
unsigned fastEmit_ISD_FP_ROUND_MVT_f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3034
switch (RetVT.SimpleTy) {
3035
  case MVT::f16: return fastEmit_ISD_FP_ROUND_MVT_f64_MVT_f16_r(Op0, Op0IsKill);
3036
  case MVT::f32: return fastEmit_ISD_FP_ROUND_MVT_f64_MVT_f32_r(Op0, Op0IsKill);
3037
  default: return 0;
3038
}
3039
}
3040
3041
0
unsigned fastEmit_ISD_FP_ROUND_MVT_v4f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3042
0
  if (RetVT.SimpleTy != MVT::v4f16)
3043
0
    return 0;
3044
0
  return fastEmitInst_r(AArch64::FCVTNv4i16, &AArch64::FPR64RegClass, Op0, Op0IsKill);
3045
0
}
3046
3047
0
unsigned fastEmit_ISD_FP_ROUND_MVT_v2f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3048
0
  if (RetVT.SimpleTy != MVT::v2f32)
3049
0
    return 0;
3050
0
  return fastEmitInst_r(AArch64::FCVTNv2i32, &AArch64::FPR64RegClass, Op0, Op0IsKill);
3051
0
}
3052
3053
unsigned fastEmit_ISD_FP_ROUND_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
3054
  switch (VT.SimpleTy) {
3055
  case MVT::f32: return fastEmit_ISD_FP_ROUND_MVT_f32_r(RetVT, Op0, Op0IsKill);
3056
  case MVT::f64: return fastEmit_ISD_FP_ROUND_MVT_f64_r(RetVT, Op0, Op0IsKill);
3057
  case MVT::v4f32: return fastEmit_ISD_FP_ROUND_MVT_v4f32_r(RetVT, Op0, Op0IsKill);
3058
  case MVT::v2f64: return fastEmit_ISD_FP_ROUND_MVT_v2f64_r(RetVT, Op0, Op0IsKill);
3059
  default: return 0;
3060
  }
3061
}
3062
3063
// FastEmit functions for ISD::FP_TO_SINT.
3064
3065
1
unsigned fastEmit_ISD_FP_TO_SINT_MVT_f16_MVT_i32_r(unsigned Op0, bool Op0IsKill) {
3066
1
  if ((Subtarget->hasFullFP16())) {
3067
0
    return fastEmitInst_r(AArch64::FCVTZSUWHr, &AArch64::GPR32RegClass, Op0, Op0IsKill);
3068
0
  }
3069
1
  return 0;
3070
1
}
3071
3072
0
unsigned fastEmit_ISD_FP_TO_SINT_MVT_f16_MVT_i64_r(unsigned Op0, bool Op0IsKill) {
3073
0
  if ((Subtarget->hasFullFP16())) {
3074
0
    return fastEmitInst_r(AArch64::FCVTZSUXHr, &AArch64::GPR64RegClass, Op0, Op0IsKill);
3075
0
  }
3076
0
  return 0;
3077
0
}
3078
3079
1
unsigned fastEmit_ISD_FP_TO_SINT_MVT_f16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3080
1
switch (RetVT.SimpleTy) {
3081
1
  case MVT::i32: return fastEmit_ISD_FP_TO_SINT_MVT_f16_MVT_i32_r(Op0, Op0IsKill);
3082
1
  
case MVT::i64: return fastEmit_ISD_FP_TO_SINT_MVT_f16_MVT_i64_r(Op0, Op0IsKill)0
;
3083
1
  
default: return 00
;
3084
1
}
3085
1
}
3086
3087
1
unsigned fastEmit_ISD_FP_TO_SINT_MVT_f32_MVT_i32_r(unsigned Op0, bool Op0IsKill) {
3088
1
  if ((Subtarget->hasFPARMv8())) {
3089
1
    return fastEmitInst_r(AArch64::FCVTZSUWSr, &AArch64::GPR32RegClass, Op0, Op0IsKill);
3090
1
  }
3091
0
  return 0;
3092
0
}
3093
3094
0
unsigned fastEmit_ISD_FP_TO_SINT_MVT_f32_MVT_i64_r(unsigned Op0, bool Op0IsKill) {
3095
0
  if ((Subtarget->hasFPARMv8())) {
3096
0
    return fastEmitInst_r(AArch64::FCVTZSUXSr, &AArch64::GPR64RegClass, Op0, Op0IsKill);
3097
0
  }
3098
0
  return 0;
3099
0
}
3100
3101
1
unsigned fastEmit_ISD_FP_TO_SINT_MVT_f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3102
1
switch (RetVT.SimpleTy) {
3103
1
  case MVT::i32: return fastEmit_ISD_FP_TO_SINT_MVT_f32_MVT_i32_r(Op0, Op0IsKill);
3104
1
  
case MVT::i64: return fastEmit_ISD_FP_TO_SINT_MVT_f32_MVT_i64_r(Op0, Op0IsKill)0
;
3105
1
  
default: return 00
;
3106
1
}
3107
1
}
3108
3109
1
unsigned fastEmit_ISD_FP_TO_SINT_MVT_f64_MVT_i32_r(unsigned Op0, bool Op0IsKill) {
3110
1
  if ((Subtarget->hasFPARMv8())) {
3111
1
    return fastEmitInst_r(AArch64::FCVTZSUWDr, &AArch64::GPR32RegClass, Op0, Op0IsKill);
3112
1
  }
3113
0
  return 0;
3114
0
}
3115
3116
0
unsigned fastEmit_ISD_FP_TO_SINT_MVT_f64_MVT_i64_r(unsigned Op0, bool Op0IsKill) {
3117
0
  if ((Subtarget->hasFPARMv8())) {
3118
0
    return fastEmitInst_r(AArch64::FCVTZSUXDr, &AArch64::GPR64RegClass, Op0, Op0IsKill);
3119
0
  }
3120
0
  return 0;
3121
0
}
3122
3123
1
unsigned fastEmit_ISD_FP_TO_SINT_MVT_f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3124
1
switch (RetVT.SimpleTy) {
3125
1
  case MVT::i32: return fastEmit_ISD_FP_TO_SINT_MVT_f64_MVT_i32_r(Op0, Op0IsKill);
3126
1
  
case MVT::i64: return fastEmit_ISD_FP_TO_SINT_MVT_f64_MVT_i64_r(Op0, Op0IsKill)0
;
3127
1
  
default: return 00
;
3128
1
}
3129
1
}
3130
3131
0
unsigned fastEmit_ISD_FP_TO_SINT_MVT_v4f16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3132
0
  if (RetVT.SimpleTy != MVT::v4i16)
3133
0
    return 0;
3134
0
  if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) {
3135
0
    return fastEmitInst_r(AArch64::FCVTZSv4f16, &AArch64::FPR64RegClass, Op0, Op0IsKill);
3136
0
  }
3137
0
  return 0;
3138
0
}
3139
3140
0
unsigned fastEmit_ISD_FP_TO_SINT_MVT_v8f16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3141
0
  if (RetVT.SimpleTy != MVT::v8i16)
3142
0
    return 0;
3143
0
  if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) {
3144
0
    return fastEmitInst_r(AArch64::FCVTZSv8f16, &AArch64::FPR128RegClass, Op0, Op0IsKill);
3145
0
  }
3146
0
  return 0;
3147
0
}
3148
3149
0
unsigned fastEmit_ISD_FP_TO_SINT_MVT_v2f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3150
0
  if (RetVT.SimpleTy != MVT::v2i32)
3151
0
    return 0;
3152
0
  if ((Subtarget->hasNEON())) {
3153
0
    return fastEmitInst_r(AArch64::FCVTZSv2f32, &AArch64::FPR64RegClass, Op0, Op0IsKill);
3154
0
  }
3155
0
  return 0;
3156
0
}
3157
3158
0
unsigned fastEmit_ISD_FP_TO_SINT_MVT_v4f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3159
0
  if (RetVT.SimpleTy != MVT::v4i32)
3160
0
    return 0;
3161
0
  if ((Subtarget->hasNEON())) {
3162
0
    return fastEmitInst_r(AArch64::FCVTZSv4f32, &AArch64::FPR128RegClass, Op0, Op0IsKill);
3163
0
  }
3164
0
  return 0;
3165
0
}
3166
3167
1
unsigned fastEmit_ISD_FP_TO_SINT_MVT_v2f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3168
1
  if (RetVT.SimpleTy != MVT::v2i64)
3169
0
    return 0;
3170
1
  if ((Subtarget->hasNEON())) {
3171
1
    return fastEmitInst_r(AArch64::FCVTZSv2f64, &AArch64::FPR128RegClass, Op0, Op0IsKill);
3172
1
  }
3173
0
  return 0;
3174
0
}
3175
3176
4
unsigned fastEmit_ISD_FP_TO_SINT_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
3177
4
  switch (VT.SimpleTy) {
3178
4
  
case MVT::f16: return fastEmit_ISD_FP_TO_SINT_MVT_f16_r(RetVT, Op0, Op0IsKill)1
;
3179
4
  
case MVT::f32: return fastEmit_ISD_FP_TO_SINT_MVT_f32_r(RetVT, Op0, Op0IsKill)1
;
3180
4
  
case MVT::f64: return fastEmit_ISD_FP_TO_SINT_MVT_f64_r(RetVT, Op0, Op0IsKill)1
;
3181
4
  
case MVT::v4f16: return fastEmit_ISD_FP_TO_SINT_MVT_v4f16_r(RetVT, Op0, Op0IsKill)0
;
3182
4
  
case MVT::v8f16: return fastEmit_ISD_FP_TO_SINT_MVT_v8f16_r(RetVT, Op0, Op0IsKill)0
;
3183
4
  
case MVT::v2f32: return fastEmit_ISD_FP_TO_SINT_MVT_v2f32_r(RetVT, Op0, Op0IsKill)0
;
3184
4
  
case MVT::v4f32: return fastEmit_ISD_FP_TO_SINT_MVT_v4f32_r(RetVT, Op0, Op0IsKill)0
;
3185
4
  
case MVT::v2f64: return fastEmit_ISD_FP_TO_SINT_MVT_v2f64_r(RetVT, Op0, Op0IsKill)1
;
3186
4
  
default: return 00
;
3187
4
  }
3188
4
}
3189
3190
// FastEmit functions for ISD::FP_TO_UINT.
3191
3192
0
unsigned fastEmit_ISD_FP_TO_UINT_MVT_f16_MVT_i32_r(unsigned Op0, bool Op0IsKill) {
3193
0
  if ((Subtarget->hasFullFP16())) {
3194
0
    return fastEmitInst_r(AArch64::FCVTZUUWHr, &AArch64::GPR32RegClass, Op0, Op0IsKill);
3195
0
  }
3196
0
  return 0;
3197
0
}
3198
3199
0
unsigned fastEmit_ISD_FP_TO_UINT_MVT_f16_MVT_i64_r(unsigned Op0, bool Op0IsKill) {
3200
0
  if ((Subtarget->hasFullFP16())) {
3201
0
    return fastEmitInst_r(AArch64::FCVTZUUXHr, &AArch64::GPR64RegClass, Op0, Op0IsKill);
3202
0
  }
3203
0
  return 0;
3204
0
}
3205
3206
unsigned fastEmit_ISD_FP_TO_UINT_MVT_f16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3207
switch (RetVT.SimpleTy) {
3208
  case MVT::i32: return fastEmit_ISD_FP_TO_UINT_MVT_f16_MVT_i32_r(Op0, Op0IsKill);
3209
  case MVT::i64: return fastEmit_ISD_FP_TO_UINT_MVT_f16_MVT_i64_r(Op0, Op0IsKill);
3210
  default: return 0;
3211
}
3212
}
3213
3214
0
unsigned fastEmit_ISD_FP_TO_UINT_MVT_f32_MVT_i32_r(unsigned Op0, bool Op0IsKill) {
3215
0
  if ((Subtarget->hasFPARMv8())) {
3216
0
    return fastEmitInst_r(AArch64::FCVTZUUWSr, &AArch64::GPR32RegClass, Op0, Op0IsKill);
3217
0
  }
3218
0
  return 0;
3219
0
}
3220
3221
0
unsigned fastEmit_ISD_FP_TO_UINT_MVT_f32_MVT_i64_r(unsigned Op0, bool Op0IsKill) {
3222
0
  if ((Subtarget->hasFPARMv8())) {
3223
0
    return fastEmitInst_r(AArch64::FCVTZUUXSr, &AArch64::GPR64RegClass, Op0, Op0IsKill);
3224
0
  }
3225
0
  return 0;
3226
0
}
3227
3228
unsigned fastEmit_ISD_FP_TO_UINT_MVT_f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3229
switch (RetVT.SimpleTy) {
3230
  case MVT::i32: return fastEmit_ISD_FP_TO_UINT_MVT_f32_MVT_i32_r(Op0, Op0IsKill);
3231
  case MVT::i64: return fastEmit_ISD_FP_TO_UINT_MVT_f32_MVT_i64_r(Op0, Op0IsKill);
3232
  default: return 0;
3233
}
3234
}
3235
3236
0
unsigned fastEmit_ISD_FP_TO_UINT_MVT_f64_MVT_i32_r(unsigned Op0, bool Op0IsKill) {
3237
0
  if ((Subtarget->hasFPARMv8())) {
3238
0
    return fastEmitInst_r(AArch64::FCVTZUUWDr, &AArch64::GPR32RegClass, Op0, Op0IsKill);
3239
0
  }
3240
0
  return 0;
3241
0
}
3242
3243
0
unsigned fastEmit_ISD_FP_TO_UINT_MVT_f64_MVT_i64_r(unsigned Op0, bool Op0IsKill) {
3244
0
  if ((Subtarget->hasFPARMv8())) {
3245
0
    return fastEmitInst_r(AArch64::FCVTZUUXDr, &AArch64::GPR64RegClass, Op0, Op0IsKill);
3246
0
  }
3247
0
  return 0;
3248
0
}
3249
3250
unsigned fastEmit_ISD_FP_TO_UINT_MVT_f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3251
switch (RetVT.SimpleTy) {
3252
  case MVT::i32: return fastEmit_ISD_FP_TO_UINT_MVT_f64_MVT_i32_r(Op0, Op0IsKill);
3253
  case MVT::i64: return fastEmit_ISD_FP_TO_UINT_MVT_f64_MVT_i64_r(Op0, Op0IsKill);
3254
  default: return 0;
3255
}
3256
}
3257
3258
0
unsigned fastEmit_ISD_FP_TO_UINT_MVT_v4f16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3259
0
  if (RetVT.SimpleTy != MVT::v4i16)
3260
0
    return 0;
3261
0
  if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) {
3262
0
    return fastEmitInst_r(AArch64::FCVTZUv4f16, &AArch64::FPR64RegClass, Op0, Op0IsKill);
3263
0
  }
3264
0
  return 0;
3265
0
}
3266
3267
0
unsigned fastEmit_ISD_FP_TO_UINT_MVT_v8f16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3268
0
  if (RetVT.SimpleTy != MVT::v8i16)
3269
0
    return 0;
3270
0
  if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) {
3271
0
    return fastEmitInst_r(AArch64::FCVTZUv8f16, &AArch64::FPR128RegClass, Op0, Op0IsKill);
3272
0
  }
3273
0
  return 0;
3274
0
}
3275
3276
0
unsigned fastEmit_ISD_FP_TO_UINT_MVT_v2f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3277
0
  if (RetVT.SimpleTy != MVT::v2i32)
3278
0
    return 0;
3279
0
  if ((Subtarget->hasNEON())) {
3280
0
    return fastEmitInst_r(AArch64::FCVTZUv2f32, &AArch64::FPR64RegClass, Op0, Op0IsKill);
3281
0
  }
3282
0
  return 0;
3283
0
}
3284
3285
0
unsigned fastEmit_ISD_FP_TO_UINT_MVT_v4f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3286
0
  if (RetVT.SimpleTy != MVT::v4i32)
3287
0
    return 0;
3288
0
  if ((Subtarget->hasNEON())) {
3289
0
    return fastEmitInst_r(AArch64::FCVTZUv4f32, &AArch64::FPR128RegClass, Op0, Op0IsKill);
3290
0
  }
3291
0
  return 0;
3292
0
}
3293
3294
0
unsigned fastEmit_ISD_FP_TO_UINT_MVT_v2f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3295
0
  if (RetVT.SimpleTy != MVT::v2i64)
3296
0
    return 0;
3297
0
  if ((Subtarget->hasNEON())) {
3298
0
    return fastEmitInst_r(AArch64::FCVTZUv2f64, &AArch64::FPR128RegClass, Op0, Op0IsKill);
3299
0
  }
3300
0
  return 0;
3301
0
}
3302
3303
unsigned fastEmit_ISD_FP_TO_UINT_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
3304
  switch (VT.SimpleTy) {
3305
  case MVT::f16: return fastEmit_ISD_FP_TO_UINT_MVT_f16_r(RetVT, Op0, Op0IsKill);
3306
  case MVT::f32: return fastEmit_ISD_FP_TO_UINT_MVT_f32_r(RetVT, Op0, Op0IsKill);
3307
  case MVT::f64: return fastEmit_ISD_FP_TO_UINT_MVT_f64_r(RetVT, Op0, Op0IsKill);
3308
  case MVT::v4f16: return fastEmit_ISD_FP_TO_UINT_MVT_v4f16_r(RetVT, Op0, Op0IsKill);
3309
  case MVT::v8f16: return fastEmit_ISD_FP_TO_UINT_MVT_v8f16_r(RetVT, Op0, Op0IsKill);
3310
  case MVT::v2f32: return fastEmit_ISD_FP_TO_UINT_MVT_v2f32_r(RetVT, Op0, Op0IsKill);
3311
  case MVT::v4f32: return fastEmit_ISD_FP_TO_UINT_MVT_v4f32_r(RetVT, Op0, Op0IsKill);
3312
  case MVT::v2f64: return fastEmit_ISD_FP_TO_UINT_MVT_v2f64_r(RetVT, Op0, Op0IsKill);
3313
  default: return 0;
3314
  }
3315
}
3316
3317
// FastEmit functions for ISD::FRINT.
3318
3319
0
unsigned fastEmit_ISD_FRINT_MVT_f16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3320
0
  if (RetVT.SimpleTy != MVT::f16)
3321
0
    return 0;
3322
0
  if ((Subtarget->hasFullFP16())) {
3323
0
    return fastEmitInst_r(AArch64::FRINTXHr, &AArch64::FPR16RegClass, Op0, Op0IsKill);
3324
0
  }
3325
0
  return 0;
3326
0
}
3327
3328
0
unsigned fastEmit_ISD_FRINT_MVT_f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3329
0
  if (RetVT.SimpleTy != MVT::f32)
3330
0
    return 0;
3331
0
  if ((Subtarget->hasFPARMv8())) {
3332
0
    return fastEmitInst_r(AArch64::FRINTXSr, &AArch64::FPR32RegClass, Op0, Op0IsKill);
3333
0
  }
3334
0
  return 0;
3335
0
}
3336
3337
0
unsigned fastEmit_ISD_FRINT_MVT_f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3338
0
  if (RetVT.SimpleTy != MVT::f64)
3339
0
    return 0;
3340
0
  if ((Subtarget->hasFPARMv8())) {
3341
0
    return fastEmitInst_r(AArch64::FRINTXDr, &AArch64::FPR64RegClass, Op0, Op0IsKill);
3342
0
  }
3343
0
  return 0;
3344
0
}
3345
3346
0
unsigned fastEmit_ISD_FRINT_MVT_v4f16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3347
0
  if (RetVT.SimpleTy != MVT::v4f16)
3348
0
    return 0;
3349
0
  if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) {
3350
0
    return fastEmitInst_r(AArch64::FRINTXv4f16, &AArch64::FPR64RegClass, Op0, Op0IsKill);
3351
0
  }
3352
0
  return 0;
3353
0
}
3354
3355
0
unsigned fastEmit_ISD_FRINT_MVT_v8f16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3356
0
  if (RetVT.SimpleTy != MVT::v8f16)
3357
0
    return 0;
3358
0
  if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) {
3359
0
    return fastEmitInst_r(AArch64::FRINTXv8f16, &AArch64::FPR128RegClass, Op0, Op0IsKill);
3360
0
  }
3361
0
  return 0;
3362
0
}
3363
3364
0
unsigned fastEmit_ISD_FRINT_MVT_v2f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3365
0
  if (RetVT.SimpleTy != MVT::v2f32)
3366
0
    return 0;
3367
0
  if ((Subtarget->hasNEON())) {
3368
0
    return fastEmitInst_r(AArch64::FRINTXv2f32, &AArch64::FPR64RegClass, Op0, Op0IsKill);
3369
0
  }
3370
0
  return 0;
3371
0
}
3372
3373
0
unsigned fastEmit_ISD_FRINT_MVT_v4f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3374
0
  if (RetVT.SimpleTy != MVT::v4f32)
3375
0
    return 0;
3376
0
  if ((Subtarget->hasNEON())) {
3377
0
    return fastEmitInst_r(AArch64::FRINTXv4f32, &AArch64::FPR128RegClass, Op0, Op0IsKill);
3378
0
  }
3379
0
  return 0;
3380
0
}
3381
3382
0
unsigned fastEmit_ISD_FRINT_MVT_v2f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3383
0
  if (RetVT.SimpleTy != MVT::v2f64)
3384
0
    return 0;
3385
0
  if ((Subtarget->hasNEON())) {
3386
0
    return fastEmitInst_r(AArch64::FRINTXv2f64, &AArch64::FPR128RegClass, Op0, Op0IsKill);
3387
0
  }
3388
0
  return 0;
3389
0
}
3390
3391
unsigned fastEmit_ISD_FRINT_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
3392
  switch (VT.SimpleTy) {
3393
  case MVT::f16: return fastEmit_ISD_FRINT_MVT_f16_r(RetVT, Op0, Op0IsKill);
3394
  case MVT::f32: return fastEmit_ISD_FRINT_MVT_f32_r(RetVT, Op0, Op0IsKill);
3395
  case MVT::f64: return fastEmit_ISD_FRINT_MVT_f64_r(RetVT, Op0, Op0IsKill);
3396
  case MVT::v4f16: return fastEmit_ISD_FRINT_MVT_v4f16_r(RetVT, Op0, Op0IsKill);
3397
  case MVT::v8f16: return fastEmit_ISD_FRINT_MVT_v8f16_r(RetVT, Op0, Op0IsKill);
3398
  case MVT::v2f32: return fastEmit_ISD_FRINT_MVT_v2f32_r(RetVT, Op0, Op0IsKill);
3399
  case MVT::v4f32: return fastEmit_ISD_FRINT_MVT_v4f32_r(RetVT, Op0, Op0IsKill);
3400
  case MVT::v2f64: return fastEmit_ISD_FRINT_MVT_v2f64_r(RetVT, Op0, Op0IsKill);
3401
  default: return 0;
3402
  }
3403
}
3404
3405
// FastEmit functions for ISD::FROUND.
3406
3407
0
unsigned fastEmit_ISD_FROUND_MVT_f16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3408
0
  if (RetVT.SimpleTy != MVT::f16)
3409
0
    return 0;
3410
0
  if ((Subtarget->hasFullFP16())) {
3411
0
    return fastEmitInst_r(AArch64::FRINTAHr, &AArch64::FPR16RegClass, Op0, Op0IsKill);
3412
0
  }
3413
0
  return 0;
3414
0
}
3415
3416
0
unsigned fastEmit_ISD_FROUND_MVT_f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3417
0
  if (RetVT.SimpleTy != MVT::f32)
3418
0
    return 0;
3419
0
  if ((Subtarget->hasFPARMv8())) {
3420
0
    return fastEmitInst_r(AArch64::FRINTASr, &AArch64::FPR32RegClass, Op0, Op0IsKill);
3421
0
  }
3422
0
  return 0;
3423
0
}
3424
3425
0
unsigned fastEmit_ISD_FROUND_MVT_f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3426
0
  if (RetVT.SimpleTy != MVT::f64)
3427
0
    return 0;
3428
0
  if ((Subtarget->hasFPARMv8())) {
3429
0
    return fastEmitInst_r(AArch64::FRINTADr, &AArch64::FPR64RegClass, Op0, Op0IsKill);
3430
0
  }
3431
0
  return 0;
3432
0
}
3433
3434
0
unsigned fastEmit_ISD_FROUND_MVT_v4f16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3435
0
  if (RetVT.SimpleTy != MVT::v4f16)
3436
0
    return 0;
3437
0
  if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) {
3438
0
    return fastEmitInst_r(AArch64::FRINTAv4f16, &AArch64::FPR64RegClass, Op0, Op0IsKill);
3439
0
  }
3440
0
  return 0;
3441
0
}
3442
3443
0
unsigned fastEmit_ISD_FROUND_MVT_v8f16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3444
0
  if (RetVT.SimpleTy != MVT::v8f16)
3445
0
    return 0;
3446
0
  if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) {
3447
0
    return fastEmitInst_r(AArch64::FRINTAv8f16, &AArch64::FPR128RegClass, Op0, Op0IsKill);
3448
0
  }
3449
0
  return 0;
3450
0
}
3451
3452
0
unsigned fastEmit_ISD_FROUND_MVT_v2f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3453
0
  if (RetVT.SimpleTy != MVT::v2f32)
3454
0
    return 0;
3455
0
  if ((Subtarget->hasNEON())) {
3456
0
    return fastEmitInst_r(AArch64::FRINTAv2f32, &AArch64::FPR64RegClass, Op0, Op0IsKill);
3457
0
  }
3458
0
  return 0;
3459
0
}
3460
3461
0
unsigned fastEmit_ISD_FROUND_MVT_v4f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3462
0
  if (RetVT.SimpleTy != MVT::v4f32)
3463
0
    return 0;
3464
0
  if ((Subtarget->hasNEON())) {
3465
0
    return fastEmitInst_r(AArch64::FRINTAv4f32, &AArch64::FPR128RegClass, Op0, Op0IsKill);
3466
0
  }
3467
0
  return 0;
3468
0
}
3469
3470
0
unsigned fastEmit_ISD_FROUND_MVT_v2f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3471
0
  if (RetVT.SimpleTy != MVT::v2f64)
3472
0
    return 0;
3473
0
  if ((Subtarget->hasNEON())) {
3474
0
    return fastEmitInst_r(AArch64::FRINTAv2f64, &AArch64::FPR128RegClass, Op0, Op0IsKill);
3475
0
  }
3476
0
  return 0;
3477
0
}
3478
3479
unsigned fastEmit_ISD_FROUND_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
3480
  switch (VT.SimpleTy) {
3481
  case MVT::f16: return fastEmit_ISD_FROUND_MVT_f16_r(RetVT, Op0, Op0IsKill);
3482
  case MVT::f32: return fastEmit_ISD_FROUND_MVT_f32_r(RetVT, Op0, Op0IsKill);
3483
  case MVT::f64: return fastEmit_ISD_FROUND_MVT_f64_r(RetVT, Op0, Op0IsKill);
3484
  case MVT::v4f16: return fastEmit_ISD_FROUND_MVT_v4f16_r(RetVT, Op0, Op0IsKill);
3485
  case MVT::v8f16: return fastEmit_ISD_FROUND_MVT_v8f16_r(RetVT, Op0, Op0IsKill);
3486
  case MVT::v2f32: return fastEmit_ISD_FROUND_MVT_v2f32_r(RetVT, Op0, Op0IsKill);
3487
  case MVT::v4f32: return fastEmit_ISD_FROUND_MVT_v4f32_r(RetVT, Op0, Op0IsKill);
3488
  case MVT::v2f64: return fastEmit_ISD_FROUND_MVT_v2f64_r(RetVT, Op0, Op0IsKill);
3489
  default: return 0;
3490
  }
3491
}
3492
3493
// FastEmit functions for ISD::FSQRT.
3494
3495
0
unsigned fastEmit_ISD_FSQRT_MVT_f16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3496
0
  if (RetVT.SimpleTy != MVT::f16)
3497
0
    return 0;
3498
0
  if ((Subtarget->hasFullFP16())) {
3499
0
    return fastEmitInst_r(AArch64::FSQRTHr, &AArch64::FPR16RegClass, Op0, Op0IsKill);
3500
0
  }
3501
0
  return 0;
3502
0
}
3503
3504
1
unsigned fastEmit_ISD_FSQRT_MVT_f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3505
1
  if (RetVT.SimpleTy != MVT::f32)
3506
0
    return 0;
3507
1
  if ((Subtarget->hasFPARMv8())) {
3508
1
    return fastEmitInst_r(AArch64::FSQRTSr, &AArch64::FPR32RegClass, Op0, Op0IsKill);
3509
1
  }
3510
0
  return 0;
3511
0
}
3512
3513
1
unsigned fastEmit_ISD_FSQRT_MVT_f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3514
1
  if (RetVT.SimpleTy != MVT::f64)
3515
0
    return 0;
3516
1
  if ((Subtarget->hasFPARMv8())) {
3517
1
    return fastEmitInst_r(AArch64::FSQRTDr, &AArch64::FPR64RegClass, Op0, Op0IsKill);
3518
1
  }
3519
0
  return 0;
3520
0
}
3521
3522
0
unsigned fastEmit_ISD_FSQRT_MVT_v4f16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3523
0
  if (RetVT.SimpleTy != MVT::v4f16)
3524
0
    return 0;
3525
0
  if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) {
3526
0
    return fastEmitInst_r(AArch64::FSQRTv4f16, &AArch64::FPR64RegClass, Op0, Op0IsKill);
3527
0
  }
3528
0
  return 0;
3529
0
}
3530
3531
0
unsigned fastEmit_ISD_FSQRT_MVT_v8f16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3532
0
  if (RetVT.SimpleTy != MVT::v8f16)
3533
0
    return 0;
3534
0
  if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) {
3535
0
    return fastEmitInst_r(AArch64::FSQRTv8f16, &AArch64::FPR128RegClass, Op0, Op0IsKill);
3536
0
  }
3537
0
  return 0;
3538
0
}
3539
3540
0
unsigned fastEmit_ISD_FSQRT_MVT_v2f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3541
0
  if (RetVT.SimpleTy != MVT::v2f32)
3542
0
    return 0;
3543
0
  if ((Subtarget->hasNEON())) {
3544
0
    return fastEmitInst_r(AArch64::FSQRTv2f32, &AArch64::FPR64RegClass, Op0, Op0IsKill);
3545
0
  }
3546
0
  return 0;
3547
0
}
3548
3549
0
unsigned fastEmit_ISD_FSQRT_MVT_v4f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3550
0
  if (RetVT.SimpleTy != MVT::v4f32)
3551
0
    return 0;
3552
0
  if ((Subtarget->hasNEON())) {
3553
0
    return fastEmitInst_r(AArch64::FSQRTv4f32, &AArch64::FPR128RegClass, Op0, Op0IsKill);
3554
0
  }
3555
0
  return 0;
3556
0
}
3557
3558
0
unsigned fastEmit_ISD_FSQRT_MVT_v2f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3559
0
  if (RetVT.SimpleTy != MVT::v2f64)
3560
0
    return 0;
3561
0
  if ((Subtarget->hasNEON())) {
3562
0
    return fastEmitInst_r(AArch64::FSQRTv2f64, &AArch64::FPR128RegClass, Op0, Op0IsKill);
3563
0
  }
3564
0
  return 0;
3565
0
}
3566
3567
2
unsigned fastEmit_ISD_FSQRT_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
3568
2
  switch (VT.SimpleTy) {
3569
2
  
case MVT::f16: return fastEmit_ISD_FSQRT_MVT_f16_r(RetVT, Op0, Op0IsKill)0
;
3570
2
  
case MVT::f32: return fastEmit_ISD_FSQRT_MVT_f32_r(RetVT, Op0, Op0IsKill)1
;
3571
2
  
case MVT::f64: return fastEmit_ISD_FSQRT_MVT_f64_r(RetVT, Op0, Op0IsKill)1
;
3572
2
  
case MVT::v4f16: return fastEmit_ISD_FSQRT_MVT_v4f16_r(RetVT, Op0, Op0IsKill)0
;
3573
2
  
case MVT::v8f16: return fastEmit_ISD_FSQRT_MVT_v8f16_r(RetVT, Op0, Op0IsKill)0
;
3574
2
  
case MVT::v2f32: return fastEmit_ISD_FSQRT_MVT_v2f32_r(RetVT, Op0, Op0IsKill)0
;
3575
2
  
case MVT::v4f32: return fastEmit_ISD_FSQRT_MVT_v4f32_r(RetVT, Op0, Op0IsKill)0
;
3576
2
  
case MVT::v2f64: return fastEmit_ISD_FSQRT_MVT_v2f64_r(RetVT, Op0, Op0IsKill)0
;
3577
2
  
default: return 00
;
3578
2
  }
3579
2
}
3580
3581
// FastEmit functions for ISD::FTRUNC.
3582
3583
0
unsigned fastEmit_ISD_FTRUNC_MVT_f16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3584
0
  if (RetVT.SimpleTy != MVT::f16)
3585
0
    return 0;
3586
0
  if ((Subtarget->hasFullFP16())) {
3587
0
    return fastEmitInst_r(AArch64::FRINTZHr, &AArch64::FPR16RegClass, Op0, Op0IsKill);
3588
0
  }
3589
0
  return 0;
3590
0
}
3591
3592
0
unsigned fastEmit_ISD_FTRUNC_MVT_f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3593
0
  if (RetVT.SimpleTy != MVT::f32)
3594
0
    return 0;
3595
0
  if ((Subtarget->hasFPARMv8())) {
3596
0
    return fastEmitInst_r(AArch64::FRINTZSr, &AArch64::FPR32RegClass, Op0, Op0IsKill);
3597
0
  }
3598
0
  return 0;
3599
0
}
3600
3601
0
unsigned fastEmit_ISD_FTRUNC_MVT_f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3602
0
  if (RetVT.SimpleTy != MVT::f64)
3603
0
    return 0;
3604
0
  if ((Subtarget->hasFPARMv8())) {
3605
0
    return fastEmitInst_r(AArch64::FRINTZDr, &AArch64::FPR64RegClass, Op0, Op0IsKill);
3606
0
  }
3607
0
  return 0;
3608
0
}
3609
3610
0
unsigned fastEmit_ISD_FTRUNC_MVT_v4f16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3611
0
  if (RetVT.SimpleTy != MVT::v4f16)
3612
0
    return 0;
3613
0
  if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) {
3614
0
    return fastEmitInst_r(AArch64::FRINTZv4f16, &AArch64::FPR64RegClass, Op0, Op0IsKill);
3615
0
  }
3616
0
  return 0;
3617
0
}
3618
3619
0
unsigned fastEmit_ISD_FTRUNC_MVT_v8f16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3620
0
  if (RetVT.SimpleTy != MVT::v8f16)
3621
0
    return 0;
3622
0
  if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) {
3623
0
    return fastEmitInst_r(AArch64::FRINTZv8f16, &AArch64::FPR128RegClass, Op0, Op0IsKill);
3624
0
  }
3625
0
  return 0;
3626
0
}
3627
3628
0
unsigned fastEmit_ISD_FTRUNC_MVT_v2f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3629
0
  if (RetVT.SimpleTy != MVT::v2f32)
3630
0
    return 0;
3631
0
  if ((Subtarget->hasNEON())) {
3632
0
    return fastEmitInst_r(AArch64::FRINTZv2f32, &AArch64::FPR64RegClass, Op0, Op0IsKill);
3633
0
  }
3634
0
  return 0;
3635
0
}
3636
3637
0
unsigned fastEmit_ISD_FTRUNC_MVT_v4f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3638
0
  if (RetVT.SimpleTy != MVT::v4f32)
3639
0
    return 0;
3640
0
  if ((Subtarget->hasNEON())) {
3641
0
    return fastEmitInst_r(AArch64::FRINTZv4f32, &AArch64::FPR128RegClass, Op0, Op0IsKill);
3642
0
  }
3643
0
  return 0;
3644
0
}
3645
3646
0
unsigned fastEmit_ISD_FTRUNC_MVT_v2f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3647
0
  if (RetVT.SimpleTy != MVT::v2f64)
3648
0
    return 0;
3649
0
  if ((Subtarget->hasNEON())) {
3650
0
    return fastEmitInst_r(AArch64::FRINTZv2f64, &AArch64::FPR128RegClass, Op0, Op0IsKill);
3651
0
  }
3652
0
  return 0;
3653
0
}
3654
3655
unsigned fastEmit_ISD_FTRUNC_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
3656
  switch (VT.SimpleTy) {
3657
  case MVT::f16: return fastEmit_ISD_FTRUNC_MVT_f16_r(RetVT, Op0, Op0IsKill);
3658
  case MVT::f32: return fastEmit_ISD_FTRUNC_MVT_f32_r(RetVT, Op0, Op0IsKill);
3659
  case MVT::f64: return fastEmit_ISD_FTRUNC_MVT_f64_r(RetVT, Op0, Op0IsKill);
3660
  case MVT::v4f16: return fastEmit_ISD_FTRUNC_MVT_v4f16_r(RetVT, Op0, Op0IsKill);
3661
  case MVT::v8f16: return fastEmit_ISD_FTRUNC_MVT_v8f16_r(RetVT, Op0, Op0IsKill);
3662
  case MVT::v2f32: return fastEmit_ISD_FTRUNC_MVT_v2f32_r(RetVT, Op0, Op0IsKill);
3663
  case MVT::v4f32: return fastEmit_ISD_FTRUNC_MVT_v4f32_r(RetVT, Op0, Op0IsKill);
3664
  case MVT::v2f64: return fastEmit_ISD_FTRUNC_MVT_v2f64_r(RetVT, Op0, Op0IsKill);
3665
  default: return 0;
3666
  }
3667
}
3668
3669
// FastEmit functions for ISD::SINT_TO_FP.
3670
3671
1
unsigned fastEmit_ISD_SINT_TO_FP_MVT_i32_MVT_f16_r(unsigned Op0, bool Op0IsKill) {
3672
1
  if ((Subtarget->hasFullFP16())) {
3673
0
    return fastEmitInst_r(AArch64::SCVTFUWHri, &AArch64::FPR16RegClass, Op0, Op0IsKill);
3674
0
  }
3675
1
  return 0;
3676
1
}
3677
3678
3
unsigned fastEmit_ISD_SINT_TO_FP_MVT_i32_MVT_f32_r(unsigned Op0, bool Op0IsKill) {
3679
3
  if ((Subtarget->hasFPARMv8())) {
3680
3
    return fastEmitInst_r(AArch64::SCVTFUWSri, &AArch64::FPR32RegClass, Op0, Op0IsKill);
3681
3
  }
3682
0
  return 0;
3683
0
}
3684
3685
3
unsigned fastEmit_ISD_SINT_TO_FP_MVT_i32_MVT_f64_r(unsigned Op0, bool Op0IsKill) {
3686
3
  if ((Subtarget->hasFPARMv8())) {
3687
3
    return fastEmitInst_r(AArch64::SCVTFUWDri, &AArch64::FPR64RegClass, Op0, Op0IsKill);
3688
3
  }
3689
0
  return 0;
3690
0
}
3691
3692
7
unsigned fastEmit_ISD_SINT_TO_FP_MVT_i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3693
7
switch (RetVT.SimpleTy) {
3694
7
  
case MVT::f16: return fastEmit_ISD_SINT_TO_FP_MVT_i32_MVT_f16_r(Op0, Op0IsKill)1
;
3695
7
  
case MVT::f32: return fastEmit_ISD_SINT_TO_FP_MVT_i32_MVT_f32_r(Op0, Op0IsKill)3
;
3696
7
  
case MVT::f64: return fastEmit_ISD_SINT_TO_FP_MVT_i32_MVT_f64_r(Op0, Op0IsKill)3
;
3697
7
  
default: return 00
;
3698
7
}
3699
7
}
3700
3701
1
unsigned fastEmit_ISD_SINT_TO_FP_MVT_i64_MVT_f16_r(unsigned Op0, bool Op0IsKill) {
3702
1
  if ((Subtarget->hasFullFP16())) {
3703
0
    return fastEmitInst_r(AArch64::SCVTFUXHri, &AArch64::FPR16RegClass, Op0, Op0IsKill);
3704
0
  }
3705
1
  return 0;
3706
1
}
3707
3708
1
unsigned fastEmit_ISD_SINT_TO_FP_MVT_i64_MVT_f32_r(unsigned Op0, bool Op0IsKill) {
3709
1
  if ((Subtarget->hasFPARMv8())) {
3710
1
    return fastEmitInst_r(AArch64::SCVTFUXSri, &AArch64::FPR32RegClass, Op0, Op0IsKill);
3711
1
  }
3712
0
  return 0;
3713
0
}
3714
3715
1
unsigned fastEmit_ISD_SINT_TO_FP_MVT_i64_MVT_f64_r(unsigned Op0, bool Op0IsKill) {
3716
1
  if ((Subtarget->hasFPARMv8())) {
3717
1
    return fastEmitInst_r(AArch64::SCVTFUXDri, &AArch64::FPR64RegClass, Op0, Op0IsKill);
3718
1
  }
3719
0
  return 0;
3720
0
}
3721
3722
3
unsigned fastEmit_ISD_SINT_TO_FP_MVT_i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3723
3
switch (RetVT.SimpleTy) {
3724
3
  
case MVT::f16: return fastEmit_ISD_SINT_TO_FP_MVT_i64_MVT_f16_r(Op0, Op0IsKill)1
;
3725
3
  
case MVT::f32: return fastEmit_ISD_SINT_TO_FP_MVT_i64_MVT_f32_r(Op0, Op0IsKill)1
;
3726
3
  
case MVT::f64: return fastEmit_ISD_SINT_TO_FP_MVT_i64_MVT_f64_r(Op0, Op0IsKill)1
;
3727
3
  
default: return 00
;
3728
3
}
3729
3
}
3730
3731
0
unsigned fastEmit_ISD_SINT_TO_FP_MVT_v4i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3732
0
  if (RetVT.SimpleTy != MVT::v4f16)
3733
0
    return 0;
3734
0
  if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) {
3735
0
    return fastEmitInst_r(AArch64::SCVTFv4f16, &AArch64::FPR64RegClass, Op0, Op0IsKill);
3736
0
  }
3737
0
  return 0;
3738
0
}
3739
3740
0
unsigned fastEmit_ISD_SINT_TO_FP_MVT_v8i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3741
0
  if (RetVT.SimpleTy != MVT::v8f16)
3742
0
    return 0;
3743
0
  if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) {
3744
0
    return fastEmitInst_r(AArch64::SCVTFv8f16, &AArch64::FPR128RegClass, Op0, Op0IsKill);
3745
0
  }
3746
0
  return 0;
3747
0
}
3748
3749
1
unsigned fastEmit_ISD_SINT_TO_FP_MVT_v2i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3750
1
  if (RetVT.SimpleTy != MVT::v2f32)
3751
1
    return 0;
3752
0
  if ((Subtarget->hasNEON())) {
3753
0
    return fastEmitInst_r(AArch64::SCVTFv2f32, &AArch64::FPR64RegClass, Op0, Op0IsKill);
3754
0
  }
3755
0
  return 0;
3756
0
}
3757
3758
0
unsigned fastEmit_ISD_SINT_TO_FP_MVT_v4i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3759
0
  if (RetVT.SimpleTy != MVT::v4f32)
3760
0
    return 0;
3761
0
  if ((Subtarget->hasNEON())) {
3762
0
    return fastEmitInst_r(AArch64::SCVTFv4f32, &AArch64::FPR128RegClass, Op0, Op0IsKill);
3763
0
  }
3764
0
  return 0;
3765
0
}
3766
3767
0
unsigned fastEmit_ISD_SINT_TO_FP_MVT_v2i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3768
0
  if (RetVT.SimpleTy != MVT::v2f64)
3769
0
    return 0;
3770
0
  if ((Subtarget->hasNEON())) {
3771
0
    return fastEmitInst_r(AArch64::SCVTFv2f64, &AArch64::FPR128RegClass, Op0, Op0IsKill);
3772
0
  }
3773
0
  return 0;
3774
0
}
3775
3776
11
unsigned fastEmit_ISD_SINT_TO_FP_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
3777
11
  switch (VT.SimpleTy) {
3778
11
  
case MVT::i32: return fastEmit_ISD_SINT_TO_FP_MVT_i32_r(RetVT, Op0, Op0IsKill)7
;
3779
11
  
case MVT::i64: return fastEmit_ISD_SINT_TO_FP_MVT_i64_r(RetVT, Op0, Op0IsKill)3
;
3780
11
  
case MVT::v4i16: return fastEmit_ISD_SINT_TO_FP_MVT_v4i16_r(RetVT, Op0, Op0IsKill)0
;
3781
11
  
case MVT::v8i16: return fastEmit_ISD_SINT_TO_FP_MVT_v8i16_r(RetVT, Op0, Op0IsKill)0
;
3782
11
  
case MVT::v2i32: return fastEmit_ISD_SINT_TO_FP_MVT_v2i32_r(RetVT, Op0, Op0IsKill)1
;
3783
11
  
case MVT::v4i32: return fastEmit_ISD_SINT_TO_FP_MVT_v4i32_r(RetVT, Op0, Op0IsKill)0
;
3784
11
  
case MVT::v2i64: return fastEmit_ISD_SINT_TO_FP_MVT_v2i64_r(RetVT, Op0, Op0IsKill)0
;
3785
11
  
default: return 00
;
3786
11
  }
3787
11
}
3788
3789
// FastEmit functions for ISD::TRUNCATE.
3790
3791
12
unsigned fastEmit_ISD_TRUNCATE_MVT_i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3792
12
  if (RetVT.SimpleTy != MVT::i32)
3793
0
    return 0;
3794
12
  return fastEmitInst_extractsubreg(RetVT, Op0, Op0IsKill, AArch64::sub_32);
3795
12
}
3796
3797
0
unsigned fastEmit_ISD_TRUNCATE_MVT_v8i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3798
0
  if (RetVT.SimpleTy != MVT::v8i8)
3799
0
    return 0;
3800
0
  if ((Subtarget->hasNEON())) {
3801
0
    return fastEmitInst_r(AArch64::XTNv8i8, &AArch64::FPR64RegClass, Op0, Op0IsKill);
3802
0
  }
3803
0
  return 0;
3804
0
}
3805
3806
0
unsigned fastEmit_ISD_TRUNCATE_MVT_v4i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3807
0
  if (RetVT.SimpleTy != MVT::v4i16)
3808
0
    return 0;
3809
0
  if ((Subtarget->hasNEON())) {
3810
0
    return fastEmitInst_r(AArch64::XTNv4i16, &AArch64::FPR64RegClass, Op0, Op0IsKill);
3811
0
  }
3812
0
  return 0;
3813
0
}
3814
3815
0
unsigned fastEmit_ISD_TRUNCATE_MVT_v2i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3816
0
  if (RetVT.SimpleTy != MVT::v2i32)
3817
0
    return 0;
3818
0
  if ((Subtarget->hasNEON())) {
3819
0
    return fastEmitInst_r(AArch64::XTNv2i32, &AArch64::FPR64RegClass, Op0, Op0IsKill);
3820
0
  }
3821
0
  return 0;
3822
0
}
3823
3824
12
unsigned fastEmit_ISD_TRUNCATE_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
3825
12
  switch (VT.SimpleTy) {
3826
12
  case MVT::i64: return fastEmit_ISD_TRUNCATE_MVT_i64_r(RetVT, Op0, Op0IsKill);
3827
12
  
case MVT::v8i16: return fastEmit_ISD_TRUNCATE_MVT_v8i16_r(RetVT, Op0, Op0IsKill)0
;
3828
12
  
case MVT::v4i32: return fastEmit_ISD_TRUNCATE_MVT_v4i32_r(RetVT, Op0, Op0IsKill)0
;
3829
12
  
case MVT::v2i64: return fastEmit_ISD_TRUNCATE_MVT_v2i64_r(RetVT, Op0, Op0IsKill)0
;
3830
12
  
default: return 00
;
3831
12
  }
3832
12
}
3833
3834
// FastEmit functions for ISD::UINT_TO_FP.
3835
3836
0
unsigned fastEmit_ISD_UINT_TO_FP_MVT_i32_MVT_f16_r(unsigned Op0, bool Op0IsKill) {
3837
0
  if ((Subtarget->hasFullFP16())) {
3838
0
    return fastEmitInst_r(AArch64::UCVTFUWHri, &AArch64::FPR16RegClass, Op0, Op0IsKill);
3839
0
  }
3840
0
  return 0;
3841
0
}
3842
3843
0
unsigned fastEmit_ISD_UINT_TO_FP_MVT_i32_MVT_f32_r(unsigned Op0, bool Op0IsKill) {
3844
0
  if ((Subtarget->hasFPARMv8())) {
3845
0
    return fastEmitInst_r(AArch64::UCVTFUWSri, &AArch64::FPR32RegClass, Op0, Op0IsKill);
3846
0
  }
3847
0
  return 0;
3848
0
}
3849
3850
0
unsigned fastEmit_ISD_UINT_TO_FP_MVT_i32_MVT_f64_r(unsigned Op0, bool Op0IsKill) {
3851
0
  if ((Subtarget->hasFPARMv8())) {
3852
0
    return fastEmitInst_r(AArch64::UCVTFUWDri, &AArch64::FPR64RegClass, Op0, Op0IsKill);
3853
0
  }
3854
0
  return 0;
3855
0
}
3856
3857
unsigned fastEmit_ISD_UINT_TO_FP_MVT_i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3858
switch (RetVT.SimpleTy) {
3859
  case MVT::f16: return fastEmit_ISD_UINT_TO_FP_MVT_i32_MVT_f16_r(Op0, Op0IsKill);
3860
  case MVT::f32: return fastEmit_ISD_UINT_TO_FP_MVT_i32_MVT_f32_r(Op0, Op0IsKill);
3861
  case MVT::f64: return fastEmit_ISD_UINT_TO_FP_MVT_i32_MVT_f64_r(Op0, Op0IsKill);
3862
  default: return 0;
3863
}
3864
}
3865
3866
0
unsigned fastEmit_ISD_UINT_TO_FP_MVT_i64_MVT_f16_r(unsigned Op0, bool Op0IsKill) {
3867
0
  if ((Subtarget->hasFullFP16())) {
3868
0
    return fastEmitInst_r(AArch64::UCVTFUXHri, &AArch64::FPR16RegClass, Op0, Op0IsKill);
3869
0
  }
3870
0
  return 0;
3871
0
}
3872
3873
0
unsigned fastEmit_ISD_UINT_TO_FP_MVT_i64_MVT_f32_r(unsigned Op0, bool Op0IsKill) {
3874
0
  if ((Subtarget->hasFPARMv8())) {
3875
0
    return fastEmitInst_r(AArch64::UCVTFUXSri, &AArch64::FPR32RegClass, Op0, Op0IsKill);
3876
0
  }
3877
0
  return 0;
3878
0
}
3879
3880
0
unsigned fastEmit_ISD_UINT_TO_FP_MVT_i64_MVT_f64_r(unsigned Op0, bool Op0IsKill) {
3881
0
  if ((Subtarget->hasFPARMv8())) {
3882
0
    return fastEmitInst_r(AArch64::UCVTFUXDri, &AArch64::FPR64RegClass, Op0, Op0IsKill);
3883
0
  }
3884
0
  return 0;
3885
0
}
3886
3887
unsigned fastEmit_ISD_UINT_TO_FP_MVT_i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3888
switch (RetVT.SimpleTy) {
3889
  case MVT::f16: return fastEmit_ISD_UINT_TO_FP_MVT_i64_MVT_f16_r(Op0, Op0IsKill);
3890
  case MVT::f32: return fastEmit_ISD_UINT_TO_FP_MVT_i64_MVT_f32_r(Op0, Op0IsKill);
3891
  case MVT::f64: return fastEmit_ISD_UINT_TO_FP_MVT_i64_MVT_f64_r(Op0, Op0IsKill);
3892
  default: return 0;
3893
}
3894
}
3895
3896
0
unsigned fastEmit_ISD_UINT_TO_FP_MVT_v4i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3897
0
  if (RetVT.SimpleTy != MVT::v4f16)
3898
0
    return 0;
3899
0
  if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) {
3900
0
    return fastEmitInst_r(AArch64::UCVTFv4f16, &AArch64::FPR64RegClass, Op0, Op0IsKill);
3901
0
  }
3902
0
  return 0;
3903
0
}
3904
3905
0
unsigned fastEmit_ISD_UINT_TO_FP_MVT_v8i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3906
0
  if (RetVT.SimpleTy != MVT::v8f16)
3907
0
    return 0;
3908
0
  if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) {
3909
0
    return fastEmitInst_r(AArch64::UCVTFv8f16, &AArch64::FPR128RegClass, Op0, Op0IsKill);
3910
0
  }
3911
0
  return 0;
3912
0
}
3913
3914
0
unsigned fastEmit_ISD_UINT_TO_FP_MVT_v2i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3915
0
  if (RetVT.SimpleTy != MVT::v2f32)
3916
0
    return 0;
3917
0
  if ((Subtarget->hasNEON())) {
3918
0
    return fastEmitInst_r(AArch64::UCVTFv2f32, &AArch64::FPR64RegClass, Op0, Op0IsKill);
3919
0
  }
3920
0
  return 0;
3921
0
}
3922
3923
0
unsigned fastEmit_ISD_UINT_TO_FP_MVT_v4i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3924
0
  if (RetVT.SimpleTy != MVT::v4f32)
3925
0
    return 0;
3926
0
  if ((Subtarget->hasNEON())) {
3927
0
    return fastEmitInst_r(AArch64::UCVTFv4f32, &AArch64::FPR128RegClass, Op0, Op0IsKill);
3928
0
  }
3929
0
  return 0;
3930
0
}
3931
3932
0
unsigned fastEmit_ISD_UINT_TO_FP_MVT_v2i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3933
0
  if (RetVT.SimpleTy != MVT::v2f64)
3934
0
    return 0;
3935
0
  if ((Subtarget->hasNEON())) {
3936
0
    return fastEmitInst_r(AArch64::UCVTFv2f64, &AArch64::FPR128RegClass, Op0, Op0IsKill);
3937
0
  }
3938
0
  return 0;
3939
0
}
3940
3941
unsigned fastEmit_ISD_UINT_TO_FP_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
3942
  switch (VT.SimpleTy) {
3943
  case MVT::i32: return fastEmit_ISD_UINT_TO_FP_MVT_i32_r(RetVT, Op0, Op0IsKill);
3944
  case MVT::i64: return fastEmit_ISD_UINT_TO_FP_MVT_i64_r(RetVT, Op0, Op0IsKill);
3945
  case MVT::v4i16: return fastEmit_ISD_UINT_TO_FP_MVT_v4i16_r(RetVT, Op0, Op0IsKill);
3946
  case MVT::v8i16: return fastEmit_ISD_UINT_TO_FP_MVT_v8i16_r(RetVT, Op0, Op0IsKill);
3947
  case MVT::v2i32: return fastEmit_ISD_UINT_TO_FP_MVT_v2i32_r(RetVT, Op0, Op0IsKill);
3948
  case MVT::v4i32: return fastEmit_ISD_UINT_TO_FP_MVT_v4i32_r(RetVT, Op0, Op0IsKill);
3949
  case MVT::v2i64: return fastEmit_ISD_UINT_TO_FP_MVT_v2i64_r(RetVT, Op0, Op0IsKill);
3950
  default: return 0;
3951
  }
3952
}
3953
3954
// Top-level FastEmit function.
3955
3956
65
unsigned fastEmit_r(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, bool Op0IsKill) override {
3957
65
  switch (Opcode) {
3958
65
  
case AArch64ISD::CALL: return fastEmit_AArch64ISD_CALL_r(VT, RetVT, Op0, Op0IsKill)0
;
3959
65
  
case AArch64ISD::CMEQz: return fastEmit_AArch64ISD_CMEQz_r(VT, RetVT, Op0, Op0IsKill)0
;
3960
65
  
case AArch64ISD::CMGEz: return fastEmit_AArch64ISD_CMGEz_r(VT, RetVT, Op0, Op0IsKill)0
;
3961
65
  
case AArch64ISD::CMGTz: return fastEmit_AArch64ISD_CMGTz_r(VT, RetVT, Op0, Op0IsKill)0
;
3962
65
  
case AArch64ISD::CMLEz: return fastEmit_AArch64ISD_CMLEz_r(VT, RetVT, Op0, Op0IsKill)0
;
3963
65
  
case AArch64ISD::CMLTz: return fastEmit_AArch64ISD_CMLTz_r(VT, RetVT, Op0, Op0IsKill)0
;
3964
65
  
case AArch64ISD::DUP: return fastEmit_AArch64ISD_DUP_r(VT, RetVT, Op0, Op0IsKill)0
;
3965
65
  
case AArch64ISD::FCMEQz: return fastEmit_AArch64ISD_FCMEQz_r(VT, RetVT, Op0, Op0IsKill)0
;
3966
65
  
case AArch64ISD::FCMGEz: return fastEmit_AArch64ISD_FCMGEz_r(VT, RetVT, Op0, Op0IsKill)0
;
3967
65
  
case AArch64ISD::FCMGTz: return fastEmit_AArch64ISD_FCMGTz_r(VT, RetVT, Op0, Op0IsKill)0
;
3968
65
  
case AArch64ISD::FCMLEz: return fastEmit_AArch64ISD_FCMLEz_r(VT, RetVT, Op0, Op0IsKill)0
;
3969
65
  
case AArch64ISD::FCMLTz: return fastEmit_AArch64ISD_FCMLTz_r(VT, RetVT, Op0, Op0IsKill)0
;
3970
65
  
case AArch64ISD::FRECPE: return fastEmit_AArch64ISD_FRECPE_r(VT, RetVT, Op0, Op0IsKill)0
;
3971
65
  
case AArch64ISD::FRSQRTE: return fastEmit_AArch64ISD_FRSQRTE_r(VT, RetVT, Op0, Op0IsKill)0
;
3972
65
  
case AArch64ISD::NEG: return fastEmit_AArch64ISD_NEG_r(VT, RetVT, Op0, Op0IsKill)0
;
3973
65
  
case AArch64ISD::NOT: return fastEmit_AArch64ISD_NOT_r(VT, RetVT, Op0, Op0IsKill)0
;
3974
65
  
case AArch64ISD::REV16: return fastEmit_AArch64ISD_REV16_r(VT, RetVT, Op0, Op0IsKill)0
;
3975
65
  
case AArch64ISD::REV32: return fastEmit_AArch64ISD_REV32_r(VT, RetVT, Op0, Op0IsKill)0
;
3976
65
  
case AArch64ISD::REV64: return fastEmit_AArch64ISD_REV64_r(VT, RetVT, Op0, Op0IsKill)0
;
3977
65
  
case AArch64ISD::SITOF: return fastEmit_AArch64ISD_SITOF_r(VT, RetVT, Op0, Op0IsKill)0
;
3978
65
  
case AArch64ISD::UITOF: return fastEmit_AArch64ISD_UITOF_r(VT, RetVT, Op0, Op0IsKill)0
;
3979
65
  
case ISD::ABS: return fastEmit_ISD_ABS_r(VT, RetVT, Op0, Op0IsKill)0
;
3980
65
  
case ISD::BITCAST: return fastEmit_ISD_BITCAST_r(VT, RetVT, Op0, Op0IsKill)36
;
3981
65
  
case ISD::BITREVERSE: return fastEmit_ISD_BITREVERSE_r(VT, RetVT, Op0, Op0IsKill)0
;
3982
65
  
case ISD::BRIND: return fastEmit_ISD_BRIND_r(VT, RetVT, Op0, Op0IsKill)0
;
3983
65
  
case ISD::BSWAP: return fastEmit_ISD_BSWAP_r(VT, RetVT, Op0, Op0IsKill)0
;
3984
65
  
case ISD::CTLZ: return fastEmit_ISD_CTLZ_r(VT, RetVT, Op0, Op0IsKill)0
;
3985
65
  
case ISD::CTPOP: return fastEmit_ISD_CTPOP_r(VT, RetVT, Op0, Op0IsKill)0
;
3986
65
  
case ISD::FABS: return fastEmit_ISD_FABS_r(VT, RetVT, Op0, Op0IsKill)0
;
3987
65
  
case ISD::FCEIL: return fastEmit_ISD_FCEIL_r(VT, RetVT, Op0, Op0IsKill)0
;
3988
65
  
case ISD::FFLOOR: return fastEmit_ISD_FFLOOR_r(VT, RetVT, Op0, Op0IsKill)0
;
3989
65
  
case ISD::FNEARBYINT: return fastEmit_ISD_FNEARBYINT_r(VT, RetVT, Op0, Op0IsKill)0
;
3990
65
  
case ISD::FNEG: return fastEmit_ISD_FNEG_r(VT, RetVT, Op0, Op0IsKill)0
;
3991
65
  
case ISD::FP_EXTEND: return fastEmit_ISD_FP_EXTEND_r(VT, RetVT, Op0, Op0IsKill)0
;
3992
65
  
case ISD::FP_ROUND: return fastEmit_ISD_FP_ROUND_r(VT, RetVT, Op0, Op0IsKill)0
;
3993
65
  
case ISD::FP_TO_SINT: return fastEmit_ISD_FP_TO_SINT_r(VT, RetVT, Op0, Op0IsKill)4
;
3994
65
  
case ISD::FP_TO_UINT: return fastEmit_ISD_FP_TO_UINT_r(VT, RetVT, Op0, Op0IsKill)0
;
3995
65
  
case ISD::FRINT: return fastEmit_ISD_FRINT_r(VT, RetVT, Op0, Op0IsKill)0
;
3996
65
  
case ISD::FROUND: return fastEmit_ISD_FROUND_r(VT, RetVT, Op0, Op0IsKill)0
;
3997
65
  
case ISD::FSQRT: return fastEmit_ISD_FSQRT_r(VT, RetVT, Op0, Op0IsKill)2
;
3998
65
  
case ISD::FTRUNC: return fastEmit_ISD_FTRUNC_r(VT, RetVT, Op0, Op0IsKill)0
;
3999
65
  
case ISD::SINT_TO_FP: return fastEmit_ISD_SINT_TO_FP_r(VT, RetVT, Op0, Op0IsKill)11
;
4000
65
  
case ISD::TRUNCATE: return fastEmit_ISD_TRUNCATE_r(VT, RetVT, Op0, Op0IsKill)12
;
4001
65
  
case ISD::UINT_TO_FP: return fastEmit_ISD_UINT_TO_FP_r(VT, RetVT, Op0, Op0IsKill)0
;
4002
65
  
default: return 00
;
4003
65
  }
4004
65
}
4005
4006
// FastEmit functions for AArch64ISD::CMEQ.
4007
4008
0
unsigned fastEmit_AArch64ISD_CMEQ_MVT_v8i8_rr(MVT RetVT, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) {
4009
0
  if (RetVT.SimpleTy != MVT::v8i8)
4010
0
    return 0;
4011
0
  if ((Subtarget->hasNEON())) {
4012
0
    return fastEmitInst_rr(AArch64::CMEQv8i8, &AArch64::FPR64RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
4013
0
  }
4014
0
  return 0;
4015
0
}
4016
4017
0
unsigned fastEmit_AArch64ISD_CMEQ_MVT_v16i8_rr(MVT RetVT, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) {
4018
0
  if (RetVT.SimpleTy != MVT::v16i8)
4019
0
    return 0;
4020
0
  if ((Subtarget->hasNEON())) {
4021
0
    return fastEmitInst_rr(AArch64::CMEQv16i8, &AArch64::FPR128RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
4022
0
  }
4023
0
  return 0;
4024
0
}
4025
4026
0
unsigned fastEmit_AArch64ISD_CMEQ_MVT_v4i16_rr(MVT RetVT, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) {
4027
0
  if (RetVT.SimpleTy != MVT::v4i16)
4028
0
    return 0;
4029
0
  if ((Subtarget->hasNEON())) {
4030
0
    return fastEmitInst_rr(AArch64::CMEQv4i16, &AArch64::FPR64RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
4031
0
  }
4032
0
  return 0;
4033
0
}
4034
4035
0
unsigned fastEmit_AArch64ISD_CMEQ_MVT_v8i16_rr(MVT RetVT, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) {
4036
0
  if (RetVT.SimpleTy != MVT::v8i16)
4037
0
    return 0;
4038
0
  if ((Subtarget->hasNEON())) {
4039
0
    return fastEmitInst_rr(AArch64::CMEQv8i16, &AArch64::FPR128RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
4040
0
  }
4041
0
  return 0;
4042
0
}
4043
4044
0
unsigned fastEmit_AArch64ISD_CMEQ_MVT_v2i32_rr(MVT RetVT, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) {
4045
0
  if (RetVT.SimpleTy != MVT::v2i32)
4046
0
    return 0;
4047
0
  if ((Subtarget->hasNEON())) {
4048
0
    return fastEmitInst_rr(AArch64::CMEQv2i32, &AArch64::FPR64RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
4049
0
  }
4050
0
  return 0;
4051
0
}
4052
4053
0
unsigned fastEmit_AArch64ISD_CMEQ_MVT_v4i32_rr(MVT RetVT, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) {
4054
0
  if (RetVT.SimpleTy != MVT::v4i32)
4055
0
    return 0;
4056
0
  if ((Subtarget->hasNEON())) {
4057
0
    return fastEmitInst_rr(AArch64::CMEQv4i32, &AArch64::FPR128RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
4058
0
  }
4059
0
  return 0;
4060
0
}
4061
4062
0
unsigned fastEmit_AArch64ISD_CMEQ_MVT_v1i64_rr(MVT RetVT, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) {
4063
0
  if (RetVT.SimpleTy != MVT::v1i64)
4064
0
    return 0;
4065
0
  if ((Subtarget->hasNEON())) {
4066
0
    return fastEmitInst_rr(AArch64::CMEQv1i64, &AArch64::FPR64RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
4067
0
  }
4068
0
  return 0;
4069
0
}
4070
4071
0
unsigned fastEmit_AArch64ISD_CMEQ_MVT_v2i64_rr(MVT RetVT, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) {
4072
0
  if (RetVT.SimpleTy != MVT::v2i64)
4073
0
    return 0;
4074
0
  if ((Subtarget->hasNEON())) {
4075
0
    return fastEmitInst_rr(AArch64::CMEQv2i64, &AArch64::FPR128RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
4076
0
  }
4077
0
  return 0;
4078
0
}
4079
4080
unsigned fastEmit_AArch64ISD_CMEQ_rr(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) {
4081
  switch (VT.SimpleTy) {
4082
  case MVT::v8i8: return fastEmit_AArch64ISD_CMEQ_MVT_v8i8_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
4083
  case MVT::v16i8: return fastEmit_AArch64ISD_CMEQ_MVT_v16i8_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
4084
  case MVT::v4i16: return fastEmit_AArch64ISD_CMEQ_MVT_v4i16_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
4085
  case MVT::v8i16: return fastEmit_AArch64ISD_CMEQ_MVT_v8i16_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
4086
  case MVT::v2i32: return fastEmit_AArch64ISD_CMEQ_MVT_v2i32_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
4087
  case MVT::v4i32: return fastEmit_AArch64ISD_CMEQ_MVT_v4i32_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
4088
  case MVT::v1i64: return fastEmit_AArch64ISD_CMEQ_MVT_v1i64_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
4089
  case MVT::v2i64: return fastEmit_AArch64ISD_CMEQ_MVT_v2i64_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
4090
  default: return 0;
4091
  }
4092
}
4093
4094
// FastEmit functions for AArch64ISD::CMGE.
4095
4096
0
unsigned fastEmit_AArch64ISD_CMGE_MVT_v8i8_rr(MVT RetVT, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) {
4097
0
  if (RetVT.SimpleTy != MVT::v8i8)
4098
0
    return 0;
4099
0
  if ((Subtarget->hasNEON())) {
4100
0
    return fastEmitInst_rr(AArch64::CMGEv8i8, &AArch64::FPR64RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
4101
0
  }
4102
0
  return 0;
4103
0
}
4104
4105
0
unsigned fastEmit_AArch64ISD_CMGE_MVT_v16i8_rr(MVT RetVT, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) {
4106
0
  if (RetVT.SimpleTy != MVT::v16i8)
4107
0
    return 0;
4108
0
  if ((Subtarget->hasNEON())) {
4109
0
    return fastEmitInst_rr(AArch64::CMGEv16i8, &AArch64::FPR128RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
4110
0
  }
4111
0
  return 0;
4112
0
}
4113
4114
0
unsigned fastEmit_AArch64ISD_CMGE_MVT_v4i16_rr(MVT RetVT, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) {
4115
0
  if (RetVT.SimpleTy != MVT::v4i16)
4116
0
    return 0;
4117
0
  if ((Subtarget->hasNEON())) {
4118
0
    return fastEmitInst_rr(AArch64::CMGEv4i16, &AArch64::FPR64RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
4119
0
  }
4120
0
  return 0;
4121
0
}
4122
4123
0
unsigned fastEmit_AArch64ISD_CMGE_MVT_v8i16_rr(MVT RetVT, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) {
4124
0
  if (RetVT.SimpleTy != MVT::v8i16)
4125
0
    return 0;
4126
0
  if ((Subtarget->hasNEON())) {
4127
0
    return fastEmitInst_rr(AArch64::CMGEv8i16, &AArch64::FPR128RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
4128
0
  }
4129
0
  return 0;
4130
0
}
4131
4132
0
unsigned fastEmit_AArch64ISD_CMGE_MVT_v2i32_rr(MVT RetVT, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) {
4133
0
  if (RetVT.SimpleTy != MVT::v2i32)
4134
0
    return 0;
4135
0
  if ((Subtarget->hasNEON())) {
4136
0
    return fastEmitInst_rr(AArch64::CMGEv2i32, &AArch64::FPR64RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
4137
0
  }
4138
0
  return 0;
4139
0
}
4140
4141
0
unsigned fastEmit_AArch64ISD_CMGE_MVT_v4i32_rr(MVT RetVT, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) {
4142
0
  if (RetVT.SimpleTy != MVT::v4i32)
4143
0
    return 0;
4144
0
  if ((Subtarget->hasNEON())) {
4145
0
    return fastEmitInst_rr(AArch64::CMGEv4i32, &AArch64::FPR128RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
4146
0
  }
4147
0
  return 0;
4148
0
}
4149
4150
0
unsigned fastEmit_AArch64ISD_CMGE_MVT_v1i64_rr(MVT RetVT, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) {
4151
0
  if (RetVT.SimpleTy != MVT::v1i64)
4152
0
    return 0;
4153
0
  if ((Subtarget->hasNEON())) {
4154
0
    return fastEmitInst_rr(AArch64::CMGEv1i64, &AArch64::FPR64RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
4155
0
  }
4156
0
  return 0;
4157
0
}
4158
4159
0
unsigned fastEmit_AArch64ISD_CMGE_MVT_v2i64_rr(MVT RetVT, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) {
4160
0
  if (RetVT.SimpleTy != MVT::v2i64)
4161
0
    return 0;
4162
0
  if ((Subtarget->hasNEON())) {
4163
0
    return fastEmitInst_rr(AArch64::CMGEv2i64, &AArch64::FPR128RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
4164
0
  }
4165
0
  return 0;
4166
0
}
4167
4168
unsigned fastEmit_AArch64ISD_CMGE_rr(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) {
4169
  switch (VT.SimpleTy) {
4170
  case MVT::v8i8: return fastEmit_AArch64ISD_CMGE_MVT_v8i8_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
4171
  case MVT::v16i8: return fastEmit_AArch64ISD_CMGE_MVT_v16i8_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
4172
  case MVT::v4i16: return fastEmit_AArch64ISD_CMGE_MVT_v4i16_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
4173
  case MVT::v8i16: return fastEmit_AArch64ISD_CMGE_MVT_v8i16_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
4174
  case MVT::v2i32: return fastEmit_AArch64ISD_CMGE_MVT_v2i32_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
4175
  case MVT::v4i32: return fastEmit_AArch64ISD_CMGE_MVT_v4i32_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
4176
  case MVT::v1i64: return fastEmit_AArch64ISD_CMGE_MVT_v1i64_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
4177
  case MVT::v2i64: return fastEmit_AArch64ISD_CMGE_MVT_v2i64_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
4178
  default: return 0;
4179
  }
4180
}
4181
4182
// FastEmit functions for AArch64ISD::CMGT.
4183
4184
0
unsigned fastEmit_AArch64ISD_CMGT_MVT_v8i8_rr(MVT RetVT, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) {
4185
0
  if (RetVT.SimpleTy != MVT::v8i8)
4186
0
    return 0;
4187
0
  if ((Subtarget->hasNEON())) {
4188
0
    return fastEmitInst_rr(AArch64::CMGTv8i8, &AArch64::FPR64RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
4189
0
  }
4190
0
  return 0;
4191
0
}
4192
4193
0
unsigned fastEmit_AArch64ISD_CMGT_MVT_v16i8_rr(MVT RetVT, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) {
4194
0
  if (RetVT.SimpleTy != MVT::v16i8)
4195
0
    return 0;
4196
0
  if ((Subtarget->hasNEON())) {
4197
0
    return fastEmitInst_rr(AArch64::CMGTv16i8, &AArch64::FPR128RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
4198
0
  }
4199
0
  return 0;
4200
0
}
4201
4202
0
unsigned fastEmit_AArch64ISD_CMGT_MVT_v4i16_rr(MVT RetVT, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) {
4203
0
  if (RetVT.SimpleTy != MVT::v4i16)
4204
0
    return 0;
4205
0
  if ((Subtarget->hasNEON())) {
4206
0
    return fastEmitInst_rr(AArch64::CMGTv4i16, &AArch64::FPR64RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
4207
0
  }
4208
0
  return 0;
4209
0
}
4210
4211
0
unsigned fastEmit_AArch64ISD_CMGT_MVT_v8i16_rr(MVT RetVT, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) {
4212
0
  if (RetVT.SimpleTy != MVT::v8i16)
4213
0
    return 0;
4214
0
  if ((Subtarget->hasNEON())) {
4215
0
    return fastEmitInst_rr(AArch64::CMGTv8i16, &AArch64::FPR128RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
4216
0
  }
4217
0
  return 0;
4218
0
}
4219
4220
0
unsigned fastEmit_AArch64ISD_CMGT_MVT_v2i32_rr(MVT RetVT, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) {
4221
0
  if (RetVT.SimpleTy != MVT::v2i32)
4222
0
    return 0;
4223
0
  if ((Subtarget->hasNEON())) {
4224
0
    return fastEmitInst_rr(AArch64::CMGTv2i32, &AArch64::FPR64RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
4225
0
  }
4226
0
  return 0;
4227
0
}
4228
4229
0
unsigned fastEmit_AArch64ISD_CMGT_MVT_v4i32_rr(MVT RetVT, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) {
4230
0
  if (RetVT.SimpleTy != MVT::v4i32)
4231
0
    return 0;
4232
0
  if ((Subtarget->hasNEON())) {
4233
0
    return fastEmitInst_rr(AArch64::CMGTv4i32, &AArch64::FPR128RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
4234
0
  }
4235
0
  return 0;
4236
0
}
4237
4238
0
unsigned fastEmit_AArch64ISD_CMGT_MVT_v1i64_rr(MVT RetVT, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) {
4239
0
  if (RetVT.SimpleTy != MVT::v1i64)
4240
0
    return 0;
4241
0
  if ((Subtarget->hasNEON())) {
4242
0
    return fastEmitInst_rr(AArch64::CMGTv1i64, &AArch64::FPR64RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
4243
0
  }
4244
0
  return 0;
4245
0
}
4246
4247
0
unsigned fastEmit_AArch64ISD_CMGT_MVT_v2i64_rr(MVT RetVT, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) {
4248
0
  if (RetVT.SimpleTy != MVT::v2i64)
4249
0
    return 0;
4250
0
  if ((Subtarget->hasNEON())) {
4251
0
    return fastEmitInst_rr(AArch64::CMGTv2i64, &AArch64::FPR128RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
4252
0
  }
4253
0
  return 0;
4254
0
}
4255
4256
unsigned fastEmit_AArch64ISD_CMGT_rr(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) {
4257
  switch (VT.SimpleTy) {
4258
  case MVT::v8i8: return fastEmit_AArch64ISD_CMGT_MVT_v8i8_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
4259
  case MVT::v16i8: return fastEmit_AArch64ISD_CMGT_MVT_v16i8_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
4260
  case MVT::v4i16: return fastEmit_AArch64ISD_CMGT_MVT_v4i16_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
4261
  case MVT::v8i16: return fastEmit_AArch64ISD_CMGT_MVT_v8i16_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
4262
  case MVT::v2i32: return fastEmit_AArch64ISD_CMGT_MVT_v2i32_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
4263
  case MVT::v4i32: return fastEmit_AArch64ISD_CMGT_MVT_v4i32_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
4264
  case MVT::v1i64: return fastEmit_AArch64ISD_CMGT_MVT_v1i64_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
4265
  case MVT::v2i64: return fastEmit_AArch64ISD_CMGT_MVT_v2i64_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
4266
  default: return 0;
4267
  }
4268
}
4269
4270
// FastEmit functions for AArch64ISD::CMHI.
4271
4272
0
unsigned fastEmit_AArch64ISD_CMHI_MVT_v8i8_rr(MVT RetVT, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) {
4273
0
  if (RetVT.SimpleTy != MVT::v8i8)
4274
0
    return 0;
4275
0
  if ((Subtarget->hasNEON())) {
4276
0
    return fastEmitInst_rr(AArch64::CMHIv8i8, &AArch64::FPR64RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
4277
0
  }
4278
0
  return 0;
4279
0
}
4280
4281
0
unsigned fastEmit_AArch64ISD_CMHI_MVT_v16i8_rr(MVT RetVT, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) {
4282
0
  if (RetVT.SimpleTy != MVT::v16i8)
4283
0
    return 0;
4284
0
  if ((Subtarget->hasNEON())) {
4285
0
    return fastEmitInst_rr(AArch64::CMHIv16i8, &AArch64::FPR128RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
4286
0
  }
4287
0
  return 0;
4288
0
}
4289
4290
0
unsigned fastEmit_AArch64ISD_CMHI_MVT_v4i16_rr(MVT RetVT, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) {
4291
0
  if (RetVT.SimpleTy != MVT::v4i16)
4292
0
    return 0;
4293
0
  if ((Subtarget->hasNEON())) {
4294
0
    return fastEmitInst_rr(AArch64::CMHIv4i16, &AArch64::FPR64RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
4295
0
  }
4296
0
  return 0;
4297
0
}
4298
4299
0
unsigned fastEmit_AArch64ISD_CMHI_MVT_v8i16_rr(MVT RetVT, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) {
4300
0
  if (RetVT.SimpleTy != MVT::v8i16)
4301
0
    return 0;
4302
0
  if ((Subtarget->hasNEON())) {
4303
0
    return fastEmitInst_rr(AArch64::CMHIv8i16, &AArch64::FPR128RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
4304
0
  }
4305
0
  return 0;
4306
0
}
4307
4308
0
unsigned fastEmit_AArch64ISD_CMHI_MVT_v2i32_rr(MVT RetVT, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) {
4309
0
  if (RetVT.SimpleTy != MVT::v2i32)
4310
0
    return 0;
4311
0
  if ((Subtarget->hasNEON())) {
4312
0
    return fastEmitInst_rr(AArch64::CMHIv2i32, &AArch64::FPR64RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
4313
0
  }
4314
0
  return 0;
4315
0
}
4316
4317
0
unsigned fastEmit_AArch64ISD_CMHI_MVT_v4i32_rr(MVT RetVT, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) {
4318
0
  if (RetVT.SimpleTy != MVT::v4i32)
4319
0
    return 0;
4320
0
  if ((Subtarget->hasNEON())) {
4321
0
    return fastEmitInst_rr(AArch64::CMHIv4i32, &AArch64::FPR128RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
4322
0
  }
4323
0
  return 0;
4324
0
}
4325
4326
0
unsigned fastEmit_AArch64ISD_CMHI_MVT_v1i64_rr(MVT RetVT, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) {
4327
0
  if (RetVT.SimpleTy != MVT::v1i64)
4328
0
    return 0;
4329
0
  if ((Subtarget->hasNEON())) {
4330
0
    return fastEmitInst_rr(AArch64::CMHIv1i64, &AArch64::FPR64RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
4331
0
  }
4332
0
  return 0;
4333
0
}
4334
4335
0
unsigned fastEmit_AArch64ISD_CMHI_MVT_v2i64_rr(MVT RetVT, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) {
4336
0
  if (RetVT.SimpleTy != MVT::v2i64)
4337
0
    return 0;
4338
0
  if ((Subtarget->hasNEON())) {
4339
0
    return fastEmitInst_rr(AArch64::CMHIv2i64, &AArch64::FPR128RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
4340
0
  }
4341
0
  return 0;
4342
0
}
4343
4344
unsigned fastEmit_AArch64ISD_CMHI_rr(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) {
4345
  switch (VT.SimpleTy) {
4346
  case MVT::v8i8: return fastEmit_AArch64ISD_CMHI_MVT_v8i8_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
4347
  case MVT::v16i8: return fastEmit_AArch64ISD_CMHI_MVT_v16i8_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
4348
  case MVT::v4i16: return fastEmit_AArch64ISD_CMHI_MVT_v4i16_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
4349
  case MVT::v8i16: return fastEmit_AArch64ISD_CMHI_MVT_v8i16_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
4350
  case MVT::v2i32: return fastEmit_AArch64ISD_CMHI_MVT_v2i32_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
4351
  case MVT::v4i32: return fastEmit_AArch64ISD_CMHI_MVT_v4i32_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
4352
  case MVT::v1i64: return fastEmit_AArch64ISD_CMHI_MVT_v1i64_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
4353
  case MVT::v2i64: return fastEmit_AArch64ISD_CMHI_MVT_v2i64_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
4354
  default: return 0;
4355
  }
4356
}
4357
4358
// FastEmit functions for AArch64ISD::CMHS.
4359
4360
0
unsigned fastEmit_AArch64ISD_CMHS_MVT_v8i8_rr(MVT RetVT, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) {
4361
0
  if (RetVT.SimpleTy != MVT::v8i8)
4362
0
    return 0;
4363
0
  if ((Subtarget->hasNEON())) {
4364
0
    return fastEmitInst_rr(AArch64::CMHSv8i8, &AArch64::FPR64RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
4365
0
  }
4366
0
  return 0;
4367
0
}
4368
4369
0
unsigned fastEmit_AArch64ISD_CMHS_MVT_v16i8_rr(MVT RetVT, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) {
4370
0
  if (RetVT.SimpleTy != MVT::v16i8)
4371
0
    return 0;
4372
0
  if ((Subtarget->hasNEON())) {
4373
0
    return fastEmitInst_rr(AArch64::CMHSv16i8, &AArch64::FPR128RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
4374
0
  }
4375
0
  return 0;
4376
0
}
4377
4378
0
unsigned fastEmit_AArch64ISD_CMHS_MVT_v4i16_rr(MVT RetVT, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) {
4379
0
  if (RetVT.SimpleTy != MVT::v4i16)
4380
0
    return 0;
4381
0
  if ((Subtarget->hasNEON())) {
4382
0
    return fastEmitInst_rr(AArch64::CMHSv4i16, &AArch64::FPR64RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
4383
0
  }
4384
0
  return 0;
4385
0
}
4386
4387
0
unsigned fastEmit_AArch64ISD_CMHS_MVT_v8i16_rr(MVT RetVT, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) {
4388
0
  if (RetVT.SimpleTy != MVT::v8i16)
4389
0
    return 0;
4390
0
  if ((Subtarget->hasNEON())) {
4391
0
    return fastEmitInst_rr(AArch64::CMHSv8i16, &AArch64::FPR128RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
4392
0
  }
4393
0
  return 0;
4394
0
}
4395
4396
0
unsigned fastEmit_AArch64ISD_CMHS_MVT_v2i32_rr(MVT RetVT, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) {
4397
0
  if (RetVT.SimpleTy != MVT::v2i32)
4398
0
    return 0;
4399
0
  if ((Subtarget->hasNEON())) {
4400
0
    return fastEmitInst_rr(AArch64::CMHSv2i32, &AArch64::FPR64RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
4401
0
  }
4402
0
  return 0;
4403
0
}
4404
4405
0
unsigned fastEmit_AArch64ISD_CMHS_MVT_v4i32_rr(MVT RetVT, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) {
4406
0
  if (RetVT.SimpleTy != MVT::v4i32)
4407
0
    return 0;
4408
0
  if ((Subtarget->hasNEON())) {
4409
0
    return fastEmitInst_rr(AArch64::CMHSv4i32, &AArch64::FPR128RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
4410
0
  }
4411
0
  return 0;
4412
0
}
4413
4414
0
unsigned fastEmit_AArch64ISD_CMHS_MVT_v1i64_rr(MVT RetVT, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) {
4415
0
  if (RetVT.SimpleTy != MVT::v1i64)
4416
0
    return 0;
4417
0
  if ((Subtarget->hasNEON())) {
4418
0
    return fastEmitInst_rr(AArch64::CMHSv1i64, &AArch64::FPR64RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
4419
0
  }
4420
0
  return 0;
4421
0
}
4422
4423
0
unsigned fastEmit_AArch64ISD_CMHS_MVT_v2i64_rr(MVT RetVT, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) {
4424
0
  if (RetVT.SimpleTy != MVT::v2i64)
4425
0
    return 0;
4426
0
  if ((Subtarget->hasNEON())) {
4427
0
    return fastEmitInst_rr(AArch64::CMHSv2i64, &AArch64::FPR128RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
4428
0
  }
4429
0
  return 0;
4430
0
}
4431
4432
unsigned fastEmit_AArch64ISD_CMHS_rr(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) {
4433
  switch (VT.SimpleTy) {
4434
  case MVT::v8i8: return fastEmit_AArch64ISD_CMHS_MVT_v8i8_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
4435
  case MVT::v16i8: return fastEmit_AArch64ISD_CMHS_MVT_v16i8_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
4436
  case MVT::v4i16: return fastEmit_AArch64ISD_CMHS_MVT_v4i16_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
4437
  case MVT::v8i16: return fastEmit_AArch64ISD_CMHS_MVT_v8i16_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
4438
  case MVT::v2i32: return fastEmit_AArch64ISD_CMHS_MVT_v2i32_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
4439
  case MVT::v4i32: return fastEmit_AArch64ISD_CMHS_MVT_v4i32_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
4440
  case MVT::v1i64: return fastEmit_AArch64ISD_CMHS_MVT_v1i64_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
4441
  case MVT::v2i64: return fastEmit_AArch64ISD_CMHS_MVT_v2i64_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
4442
  default: return 0;
4443
  }
4444
}
4445
4446
// FastEmit functions for AArch64ISD::FCMEQ.
4447
4448
0
unsigned fastEmit_AArch64ISD_FCMEQ_MVT_f32_rr(MVT RetVT, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) {
4449
0
  if (RetVT.SimpleTy != MVT::i32)
4450
0
    return 0;
4451
0
  if ((Subtarget->hasNEON())) {
4452
0
    return fastEmitInst_rr(AArch64::FCMEQ32, &AArch64::FPR32RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
4453
0
  }
4454
0
  return 0;
4455
0
}
4456
4457
0
unsigned fastEmit_AArch64ISD_FCMEQ_MVT_f64_rr(MVT RetVT, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) {
4458
0
  if (RetVT.SimpleTy != MVT::i64)
4459
0
    return 0;
4460
0
  if ((Subtarget->hasNEON())) {
4461
0
    return fastEmitInst_rr(AArch64::FCMEQ64, &AArch64::FPR64RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
4462
0
  }
4463
0
  return 0;
4464
0
}
4465
4466
0
unsigned fastEmit_AArch64ISD_FCMEQ_MVT_v4f16_rr(MVT RetVT, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) {
4467
0
  if (RetVT.SimpleTy != MVT::v4i16)
4468
0
    return 0;
4469
0
  if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) {
4470
0
    return fastEmitInst_rr(AArch64::FCMEQv4f16, &AArch64::FPR64RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
4471
0
  }
4472
0
  return 0;
4473
0
}
4474
4475
0
unsigned fastEmit_AArch64ISD_FCMEQ_MVT_v8f16_rr(MVT RetVT, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) {
4476
0
  if (RetVT.SimpleTy != MVT::v8i16)
4477
0
    return 0;
4478
0
  if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) {
4479
0
    return fastEmitInst_rr(AArch64::FCMEQv8f16, &AArch64::FPR128RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
4480
0
  }
4481
0
  return 0;
4482
0
}
4483
4484
0
unsigned fastEmit_AArch64ISD_FCMEQ_MVT_v2f32_rr(MVT RetVT, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) {
4485
0
  if (RetVT.SimpleTy != MVT::v2i32)
4486
0
    return 0;
4487
0
  if ((Subtarget->hasNEON())) {
4488
0
    return fastEmitInst_rr(AArch64::FCMEQv2f32, &AArch64::FPR64RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
4489
0
  }
4490
0
  return 0;
4491
0
}
4492
4493
0
unsigned fastEmit_AArch64ISD_FCMEQ_MVT_v4f32_rr(MVT RetVT, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) {
4494
0
  if (RetVT.SimpleTy != MVT::v4i32)
4495
0
    return 0;
4496
0
  if ((Subtarget->hasNEON())) {
4497
0
    return fastEmitInst_rr(AArch64::FCMEQv4f32, &AArch64::FPR128RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
4498
0
  }
4499
0
  return 0;
4500
0
}
4501
4502
0
unsigned fastEmit_AArch64ISD_FCMEQ_MVT_v1f64_rr(MVT RetVT, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) {
4503
0
  if (RetVT.SimpleTy != MVT::v1i64)
4504
0
    return 0;
4505
0
  if ((Subtarget->hasNEON())) {
4506
0
    return fastEmitInst_rr(AArch64::FCMEQ64, &AArch64::FPR64RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
4507
0
  }
4508
0
  return 0;
4509
0
}
4510
4511
0
unsigned fastEmit_AArch64ISD_FCMEQ_MVT_v2f64_rr(MVT RetVT, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) {
4512
0
  if (RetVT.SimpleTy != MVT::v2i64)
4513
0
    return 0;
4514
0
  if ((Subtarget->hasNEON())) {
4515
0
    return fastEmitInst_rr(AArch64::FCMEQv2f64, &AArch64::FPR128RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
4516
0
  }
4517
0
  return 0;
4518
0
}
4519
4520
unsigned fastEmit_AArch64ISD_FCMEQ_rr(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) {
4521
  switch (VT.SimpleTy) {
4522
  case MVT::f32: return fastEmit_AArch64ISD_FCMEQ_MVT_f32_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
4523
  case MVT::f64: return fastEmit_AArch64ISD_FCMEQ_MVT_f64_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
4524
  case MVT::v4f16: return fastEmit_AArch64ISD_FCMEQ_MVT_v4f16_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
4525
  case MVT::v8f16: return fastEmit_AArch64ISD_FCMEQ_MVT_v8f16_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
4526
  case MVT::v2f32: return fastEmit_AArch64ISD_FCMEQ_MVT_v2f32_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
4527
  case MVT::v4f32: return fastEmit_AArch64ISD_FCMEQ_MVT_v4f32_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
4528
  case MVT::v1f64: return fastEmit_AArch64ISD_FCMEQ_MVT_v1f64_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
4529
  case MVT::v2f64: return fastEmit_AArch64ISD_FCMEQ_MVT_v2f64_rr(RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
4530
  default: return 0;
4531
  }
4532
}
4533
4534
// FastEmit functions for AArch64ISD::FCMGE.
4535
4536
0
unsigned fastEmit_AArch64ISD_FCMGE_MVT_f32_rr(MVT RetVT, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) {
4537
0
  if (RetVT.SimpleTy != MVT::i32)
4538
0
    return 0;
4539
0
  if ((Subtarget->hasNEON())) {
4540
0
    return fastEmitInst_rr(AArch64::FCMGE32, &AArch64::FPR32RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
4541
0
  }
4542
0
  return 0;
4543
0
}
4544
4545
0
unsigned fastEmit_AArch64ISD_FCMGE_MVT_f64_rr(MVT RetVT, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill) {
4546
0
  if (RetVT.SimpleTy != MVT::i64)
4547
0
    return 0;
4548
0
  if ((Subtarget->hasNEON())) {
4549
0
    return fastEmitInst_rr(AArch64::FCMGE64, &AArch64::FPR64RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
4550
0
  }
4551
0
  return 0;
4552
0