Coverage Report

Created: 2018-09-25 00:18

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/clang-build/lib/Target/AMDGPU/R600GenMCCodeEmitter.inc
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/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
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|*                                                                            *|
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|* Machine Code Emitter                                                       *|
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|*                                                                            *|
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|* Automatically generated file, do not edit!                                 *|
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|*                                                                            *|
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\*===----------------------------------------------------------------------===*/
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uint64_t R600MCCodeEmitter::getBinaryCodeForInstr(const MCInst &MI,
10
    SmallVectorImpl<MCFixup> &Fixups,
11
268
    const MCSubtargetInfo &STI) const {
12
268
  static const uint64_t InstBits[] = {
13
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    UINT64_C(0),
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    UINT64_C(0),
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    UINT64_C(0),
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    UINT64_C(0),
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    UINT64_C(0),
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    UINT64_C(0),
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    UINT64_C(0),
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    UINT64_C(0),
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    UINT64_C(0),
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    UINT64_C(0),
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268
    UINT64_C(0),
24
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    UINT64_C(0),
25
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    UINT64_C(0),
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    UINT64_C(0),
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268
    UINT64_C(0),
28
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    UINT64_C(0),
29
268
    UINT64_C(0),
30
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    UINT64_C(0),
31
268
    UINT64_C(0),
32
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    UINT64_C(0),
33
268
    UINT64_C(0),
34
268
    UINT64_C(0),
35
268
    UINT64_C(0),
36
268
    UINT64_C(0),
37
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    UINT64_C(0),
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    UINT64_C(0),
39
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    UINT64_C(0),
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    UINT64_C(0),
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    UINT64_C(0),
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    UINT64_C(0),
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    UINT64_C(0),
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268
    UINT64_C(0),
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268
    UINT64_C(0),
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    UINT64_C(0),
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268
    UINT64_C(0),
48
268
    UINT64_C(0),
49
268
    UINT64_C(0),
50
268
    UINT64_C(0),
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268
    UINT64_C(0),
52
268
    UINT64_C(0),
53
268
    UINT64_C(0),
54
268
    UINT64_C(0),
55
268
    UINT64_C(0),
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268
    UINT64_C(0),
57
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    UINT64_C(0),
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    UINT64_C(0),
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    UINT64_C(0),
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    UINT64_C(0),
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    UINT64_C(0),
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    UINT64_C(0),
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    UINT64_C(0),
64
268
    UINT64_C(0),
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    UINT64_C(0),
66
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    UINT64_C(0),
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268
    UINT64_C(0),
68
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    UINT64_C(0),
69
268
    UINT64_C(0),
70
268
    UINT64_C(0),
71
268
    UINT64_C(0),
72
268
    UINT64_C(0),
73
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    UINT64_C(0),
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    UINT64_C(0),
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    UINT64_C(0),
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268
    UINT64_C(0),
77
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    UINT64_C(0),
78
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    UINT64_C(0),
79
268
    UINT64_C(0),
80
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    UINT64_C(0),
81
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    UINT64_C(0),
82
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    UINT64_C(0),
83
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    UINT64_C(0),
84
268
    UINT64_C(0),
85
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    UINT64_C(0),
86
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    UINT64_C(0),
87
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    UINT64_C(0),
88
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    UINT64_C(0),
89
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    UINT64_C(0),
90
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    UINT64_C(0),
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    UINT64_C(0),
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    UINT64_C(0),
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    UINT64_C(0),
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    UINT64_C(0),
95
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    UINT64_C(0),
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    UINT64_C(0),
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    UINT64_C(0),
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268
    UINT64_C(0),
99
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    UINT64_C(0),
100
268
    UINT64_C(0),
101
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    UINT64_C(0),
102
268
    UINT64_C(0),
103
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    UINT64_C(0),
104
268
    UINT64_C(0),
105
268
    UINT64_C(0),
106
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    UINT64_C(0),
107
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    UINT64_C(0),
108
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    UINT64_C(0),
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268
    UINT64_C(0),
110
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    UINT64_C(0),
111
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    UINT64_C(0),
112
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    UINT64_C(0),
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268
    UINT64_C(0),
114
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    UINT64_C(0),
115
268
    UINT64_C(0),
116
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    UINT64_C(0),
117
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    UINT64_C(0),
118
268
    UINT64_C(0),
119
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    UINT64_C(0),
120
268
    UINT64_C(0),
121
268
    UINT64_C(0),
122
268
    UINT64_C(0),
123
268
    UINT64_C(0),
124
268
    UINT64_C(0),
125
268
    UINT64_C(0),
126
268
    UINT64_C(0),
127
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    UINT64_C(0),
128
268
    UINT64_C(0),
129
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    UINT64_C(0),
130
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    UINT64_C(0),
131
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    UINT64_C(0),
132
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    UINT64_C(0),
133
268
    UINT64_C(0),
134
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    UINT64_C(0),
135
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    UINT64_C(0),
136
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    UINT64_C(0),
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    UINT64_C(0),
138
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    UINT64_C(0),
139
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    UINT64_C(0),
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    UINT64_C(0),
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142
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    UINT64_C(0),
143
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    UINT64_C(0),
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    UINT64_C(0),
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    UINT64_C(0),
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147
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    UINT64_C(0),
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149
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    UINT64_C(0),
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    UINT64_C(0),
154
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    UINT64_C(0),
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268
    UINT64_C(0),
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    UINT64_C(0),
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    UINT64_C(0),
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    UINT64_C(0),
159
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    UINT64_C(0),
160
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    UINT64_C(0),
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    UINT64_C(0),
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    UINT64_C(0),
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    UINT64_C(0),
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    UINT64_C(0),
165
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    UINT64_C(0),
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    UINT64_C(0),
167
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    UINT64_C(0),
168
268
    UINT64_C(0),
169
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    UINT64_C(0),
170
268
    UINT64_C(0),
171
268
    UINT64_C(0),
172
268
    UINT64_C(0),
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268
    UINT64_C(0),
174
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    UINT64_C(0),
175
268
    UINT64_C(0),
176
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    UINT64_C(0),
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268
    UINT64_C(0),
178
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    UINT64_C(0),
179
268
    UINT64_C(0),
180
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    UINT64_C(0),
181
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    UINT64_C(0),
182
268
    UINT64_C(0),
183
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    UINT64_C(0),
184
268
    UINT64_C(0),
185
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    UINT64_C(0),
186
268
    UINT64_C(0),
187
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    UINT64_C(0),
188
268
    UINT64_C(0),
189
268
    UINT64_C(0),
190
268
    UINT64_C(0),
191
268
    UINT64_C(0),
192
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    UINT64_C(0),
193
268
    UINT64_C(0),
194
268
    UINT64_C(0),
195
268
    UINT64_C(0),
196
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    UINT64_C(0),
197
268
    UINT64_C(0),
198
268
    UINT64_C(0),
199
268
    UINT64_C(0),
200
268
    UINT64_C(0),
201
268
    UINT64_C(0),
202
268
    UINT64_C(0),
203
268
    UINT64_C(0),
204
268
    UINT64_C(0),
205
268
    UINT64_C(0),
206
268
    UINT64_C(0),
207
268
    UINT64_C(0),
208
268
    UINT64_C(0),  // ADD
209
268
    UINT64_C(45079976738816), // ADDC_UINT
210
268
    UINT64_C(28587302322176), // ADD_INT
211
268
    UINT64_C(0),  // ALU_CLAUSE
212
268
    UINT64_C(26388279066624), // AND_INT
213
268
    UINT64_C(11544872091648), // ASHR_eg
214
268
    UINT64_C(61572651155456), // ASHR_r600
215
268
    UINT64_C(93458488360960), // BCNT_INT
216
268
    UINT64_C(175921860444160),  // BFE_INT_eg
217
268
    UINT64_C(140737488355328),  // BFE_UINT_eg
218
268
    UINT64_C(211106232532992),  // BFI_INT_eg
219
268
    UINT64_C(87960930222080), // BFM_INT_eg
220
268
    UINT64_C(422212465065984),  // BIT_ALIGN_INT_eg
221
268
    UINT64_C(9895604649984),  // CEIL
222
268
    UINT64_C(11529215046068469760), // CF_ALU
223
268
    UINT64_C(13258597302978740224), // CF_ALU_BREAK
224
268
    UINT64_C(12970366926827028480), // CF_ALU_CONTINUE
225
268
    UINT64_C(13546827679130451968), // CF_ALU_ELSE_AFTER
226
268
    UINT64_C(12105675798371893248), // CF_ALU_POP_AFTER
227
268
    UINT64_C(11817445422220181504), // CF_ALU_PUSH_BEFORE
228
268
    UINT64_C(9565645608534933504),  // CF_CALL_FS_EG
229
268
    UINT64_C(9907919180215091200),  // CF_CALL_FS_R600
230
268
    UINT64_C(9367487224930631680),  // CF_CONTINUE_EG
231
268
    UINT64_C(9511602413006487552),  // CF_CONTINUE_R600
232
268
    UINT64_C(9457559217478041600),  // CF_ELSE_EG
233
268
    UINT64_C(9691746398101307392),  // CF_ELSE_R600
234
268
    UINT64_C(9799832789158199296),  // CF_END_CM
235
268
    UINT64_C(9232379236109516800),  // CF_END_EG
236
268
    UINT64_C(9232379236109516800),  // CF_END_R600
237
268
    UINT64_C(9403516021949595648),  // CF_JUMP_EG
238
268
    UINT64_C(9583660007044415488),  // CF_JUMP_R600
239
268
    UINT64_C(9421530420459077632),  // CF_PUSH_EG
240
268
    UINT64_C(9655717601082343424),  // CF_PUSH_ELSE_R600
241
268
    UINT64_C(9241386435364257792),  // CF_TC_EG
242
268
    UINT64_C(9259400833873739776),  // CF_TC_R600
243
268
    UINT64_C(9259400833873739776),  // CF_VC_EG
244
268
    UINT64_C(9295429630892703744),  // CF_VC_R600
245
268
    UINT64_C(985162418487296),  // CNDE_INT
246
268
    UINT64_C(879609302220800),  // CNDE_eg
247
268
    UINT64_C(844424930131968),  // CNDE_r600
248
268
    UINT64_C(1055531162664960), // CNDGE_INT
249
268
    UINT64_C(949978046398464),  // CNDGE_eg
250
268
    UINT64_C(914793674309632),  // CNDGE_r600
251
268
    UINT64_C(1020346790576128), // CNDGT_INT
252
268
    UINT64_C(914793674309632),  // CNDGT_eg
253
268
    UINT64_C(879609302220800),  // CNDGT_r600
254
268
    UINT64_C(78065325572096), // COS_cm
255
268
    UINT64_C(78065325572096), // COS_eg
256
268
    UINT64_C(61022895341568), // COS_r600
257
268
    UINT64_C(61022895341568), // COS_r700
258
268
    UINT64_C(105553116266496),  // CUBE_eg_real
259
268
    UINT64_C(45079976738816), // CUBE_r600_real
260
268
    UINT64_C(104453604638720),  // DOT4_eg
261
268
    UINT64_C(43980465111040), // DOT4_r600
262
268
    UINT64_C(9223372036854775808),  // EG_ExportBuf
263
268
    UINT64_C(9223372040076001280),  // EG_ExportSwz
264
268
    UINT64_C(9313444029402185728),  // END_LOOP_EG
265
268
    UINT64_C(9403516021949595648),  // END_LOOP_R600
266
268
    UINT64_C(70918499991552), // EXP_IEEE_cm
267
268
    UINT64_C(70918499991552), // EXP_IEEE_eg
268
268
    UINT64_C(53326313947136), // EXP_IEEE_r600
269
268
    UINT64_C(0),  // FETCH_CLAUSE
270
268
    UINT64_C(94008244174848), // FFBH_UINT
271
268
    UINT64_C(94557999988736), // FFBL_INT
272
268
    UINT64_C(10995116277760), // FLOOR
273
268
    UINT64_C(89610197663744), // FLT16_TO_FLT32
274
268
    UINT64_C(89060441849856), // FLT32_TO_FLT16
275
268
    UINT64_C(43980465111040), // FLT_TO_INT_eg
276
268
    UINT64_C(58823872086016), // FLT_TO_INT_r600
277
268
    UINT64_C(84662395338752), // FLT_TO_UINT_eg
278
268
    UINT64_C(66520453480448), // FLT_TO_UINT_r600
279
268
    UINT64_C(246290604621824),  // FMA_eg
280
268
    UINT64_C(8796093022208),  // FRACT
281
268
    UINT64_C(46181635850240), // GROUP_BARRIER
282
268
    UINT64_C(123145302310912),  // INTERP_LOAD_P0
283
268
    UINT64_C(4294967295), // INTERP_PAIR_XY
284
268
    UINT64_C(4294967295), // INTERP_PAIR_ZW
285
268
    UINT64_C(4294967295), // INTERP_VEC_LOAD
286
268
    UINT64_C(5747147278385152), // INTERP_XY
287
268
    UINT64_C(5747697034199040), // INTERP_ZW
288
268
    UINT64_C(85212151152640), // INT_TO_FLT_eg
289
268
    UINT64_C(59373627899904), // INT_TO_FLT_r600
290
268
    UINT64_C(24739011624960), // KILLGT
291
268
    UINT64_C(598134325510144),  // LDS_ADD
292
268
    UINT64_C(288828510477221888), // LDS_ADD_RET
293
268
    UINT64_C(81662927618179072),  // LDS_AND
294
268
    UINT64_C(369893303769890816), // LDS_AND_RET
295
268
    UINT64_C(486986894081523712), // LDS_BYTE_READ_RET
296
268
    UINT64_C(162727720910848000), // LDS_BYTE_WRITE
297
268
    UINT64_C(144713322401366016), // LDS_CMPST
298
268
    UINT64_C(432943698553077760), // LDS_CMPST_RET
299
268
    UINT64_C(54641329853956096),  // LDS_MAX_INT
300
268
    UINT64_C(342871706005667840), // LDS_MAX_INT_RET
301
268
    UINT64_C(72655728363438080),  // LDS_MAX_UINT
302
268
    UINT64_C(360886104515149824), // LDS_MAX_UINT_RET
303
268
    UINT64_C(45634130599215104),  // LDS_MIN_INT
304
268
    UINT64_C(333864506750926848), // LDS_MIN_INT_RET
305
268
    UINT64_C(63648529108697088),  // LDS_MIN_UINT
306
268
    UINT64_C(351878905260408832), // LDS_MIN_UINT_RET
307
268
    UINT64_C(90670126872920064),  // LDS_OR
308
268
    UINT64_C(378900503024631808), // LDS_OR_RET
309
268
    UINT64_C(450958097062559744), // LDS_READ_RET
310
268
    UINT64_C(505001292591005696), // LDS_SHORT_READ_RET
311
268
    UINT64_C(171734920165588992), // LDS_SHORT_WRITE
312
268
    UINT64_C(9605333580251136), // LDS_SUB
313
268
    UINT64_C(297835709731962880), // LDS_SUB_RET
314
268
    UINT64_C(495994093336264704), // LDS_UBYTE_READ_RET
315
268
    UINT64_C(514008491845746688), // LDS_USHORT_READ_RET
316
268
    UINT64_C(117691724637143040), // LDS_WRITE
317
268
    UINT64_C(117691724637143040), // LDS_WRXCHG
318
268
    UINT64_C(405922100788854784), // LDS_WRXCHG_RET
319
268
    UINT64_C(99677326127661056),  // LDS_XOR
320
268
    UINT64_C(387907702279372800), // LDS_XOR_RET
321
268
    UINT64_C(0),  // LITERALS
322
268
    UINT64_C(71468255805440), // LOG_CLAMPED_eg
323
268
    UINT64_C(53876069761024), // LOG_CLAMPED_r600
324
268
    UINT64_C(72018011619328), // LOG_IEEE_cm
325
268
    UINT64_C(72018011619328), // LOG_IEEE_eg
326
268
    UINT64_C(54425825574912), // LOG_IEEE_r600
327
268
    UINT64_C(9385501623440113664),  // LOOP_BREAK_EG
328
268
    UINT64_C(9547631210025451520),  // LOOP_BREAK_R600
329
268
    UINT64_C(12644383719424), // LSHL_eg
330
268
    UINT64_C(62672162783232), // LSHL_r600
331
268
    UINT64_C(12094627905536), // LSHR_eg
332
268
    UINT64_C(62122406969344), // LSHR_r600
333
268
    UINT64_C(1649267441664),  // MAX
334
268
    UINT64_C(2748779069440),  // MAX_DX10
335
268
    UINT64_C(29686813949952), // MAX_INT
336
268
    UINT64_C(30786325577728), // MAX_UINT
337
268
    UINT64_C(2199023255552),  // MIN
338
268
    UINT64_C(3298534883328),  // MIN_DX10
339
268
    UINT64_C(30236569763840), // MIN_INT
340
268
    UINT64_C(31336081391616), // MIN_UINT
341
268
    UINT64_C(13743895347200), // MOV
342
268
    UINT64_C(112150186033152),  // MOVA_INT_eg
343
268
    UINT64_C(549755813888), // MUL
344
268
    UINT64_C(844424930131968),  // MULADD_IEEE_eg
345
268
    UINT64_C(703687441776640),  // MULADD_IEEE_r600
346
268
    UINT64_C(281474976710656),  // MULADD_INT24_cm
347
268
    UINT64_C(562949953421312),  // MULADD_UINT24_eg
348
268
    UINT64_C(703687441776640),  // MULADD_eg
349
268
    UINT64_C(562949953421312),  // MULADD_r600
350
268
    UINT64_C(79164837199872), // MULHI_INT_cm
351
268
    UINT64_C(50577534877696), // MULHI_INT_cm24
352
268
    UINT64_C(79164837199872), // MULHI_INT_eg
353
268
    UINT64_C(63771674411008), // MULHI_INT_r600
354
268
    UINT64_C(97856534872064), // MULHI_UINT24_eg
355
268
    UINT64_C(80264348827648), // MULHI_UINT_cm
356
268
    UINT64_C(97856534872064), // MULHI_UINT_cm24
357
268
    UINT64_C(80264348827648), // MULHI_UINT_eg
358
268
    UINT64_C(64871186038784), // MULHI_UINT_r600
359
268
    UINT64_C(78615081385984), // MULLO_INT_cm
360
268
    UINT64_C(78615081385984), // MULLO_INT_eg
361
268
    UINT64_C(63221918597120), // MULLO_INT_r600
362
268
    UINT64_C(79714593013760), // MULLO_UINT_cm
363
268
    UINT64_C(79714593013760), // MULLO_UINT_eg
364
268
    UINT64_C(64321430224896), // MULLO_UINT_r600
365
268
    UINT64_C(1099511627776),  // MUL_IEEE
366
268
    UINT64_C(50027779063808), // MUL_INT24_cm
367
268
    UINT64_C(1090715534753792), // MUL_LIT_eg
368
268
    UINT64_C(422212465065984),  // MUL_LIT_r600
369
268
    UINT64_C(99505802313728), // MUL_UINT24_eg
370
268
    UINT64_C(28037546508288), // NOT_INT
371
268
    UINT64_C(26938034880512), // OR_INT
372
268
    UINT64_C(0),  // PAD
373
268
    UINT64_C(9475573615987523584),  // POP_EG
374
268
    UINT64_C(9727775195120271360),  // POP_R600
375
268
    UINT64_C(17592186044416), // PRED_SETE
376
268
    UINT64_C(36283883716608), // PRED_SETE_INT
377
268
    UINT64_C(18691697672192), // PRED_SETGE
378
268
    UINT64_C(37383395344384), // PRED_SETGE_INT
379
268
    UINT64_C(18141941858304), // PRED_SETGT
380
268
    UINT64_C(36833639530496), // PRED_SETGT_INT
381
268
    UINT64_C(19241453486080), // PRED_SETNE
382
268
    UINT64_C(37933151158272), // PRED_SETNE_INT
383
268
    UINT64_C(9223372036854775808),  // R600_ExportBuf
384
268
    UINT64_C(9223372040076001280),  // R600_ExportSwz
385
268
    UINT64_C(10772874191460901488), // RAT_ATOMIC_ADD_NORET
386
268
    UINT64_C(10772874191460900976), // RAT_ATOMIC_ADD_RTN
387
268
    UINT64_C(10772874191460901600), // RAT_ATOMIC_AND_NORET
388
268
    UINT64_C(10772874191460901088), // RAT_ATOMIC_AND_RTN
389
268
    UINT64_C(10772874191460901440), // RAT_ATOMIC_CMPXCHG_INT_NORET
390
268
    UINT64_C(10772874191460900928), // RAT_ATOMIC_CMPXCHG_INT_RTN
391
268
    UINT64_C(10772874191460901680), // RAT_ATOMIC_DEC_UINT_NORET
392
268
    UINT64_C(10772874191460901168), // RAT_ATOMIC_DEC_UINT_RTN
393
268
    UINT64_C(10772874191460901664), // RAT_ATOMIC_INC_UINT_NORET
394
268
    UINT64_C(10772874191460901152), // RAT_ATOMIC_INC_UINT_RTN
395
268
    UINT64_C(10772874191460901568), // RAT_ATOMIC_MAX_INT_NORET
396
268
    UINT64_C(10772874191460901056), // RAT_ATOMIC_MAX_INT_RTN
397
268
    UINT64_C(10772874191460901584), // RAT_ATOMIC_MAX_UINT_NORET
398
268
    UINT64_C(10772874191460901072), // RAT_ATOMIC_MAX_UINT_RTN
399
268
    UINT64_C(10772874191460901536), // RAT_ATOMIC_MIN_INT_NORET
400
268
    UINT64_C(10772874191460901024), // RAT_ATOMIC_MIN_INT_RTN
401
268
    UINT64_C(10772874191460901552), // RAT_ATOMIC_MIN_UINT_NORET
402
268
    UINT64_C(10772874191460901040), // RAT_ATOMIC_MIN_UINT_RTN
403
268
    UINT64_C(10772874191460901616), // RAT_ATOMIC_OR_NORET
404
268
    UINT64_C(10772874191460901104), // RAT_ATOMIC_OR_RTN
405
268
    UINT64_C(10772874191460901520), // RAT_ATOMIC_RSUB_NORET
406
268
    UINT64_C(10772874191460901008), // RAT_ATOMIC_RSUB_RTN
407
268
    UINT64_C(10772874191460901504), // RAT_ATOMIC_SUB_NORET
408
268
    UINT64_C(10772874191460900992), // RAT_ATOMIC_SUB_RTN
409
268
    UINT64_C(10772874191460901408), // RAT_ATOMIC_XCHG_INT_NORET
410
268
    UINT64_C(10772874191460900880), // RAT_ATOMIC_XCHG_INT_RTN
411
268
    UINT64_C(10772874191460901632), // RAT_ATOMIC_XOR_NORET
412
268
    UINT64_C(10772874191460901120), // RAT_ATOMIC_XOR_RTN
413
268
    UINT64_C(10772874191460901136), // RAT_MSKOR
414
268
    UINT64_C(10790888589970383168), // RAT_STORE_DWORD128
415
268
    UINT64_C(10790642299365761344), // RAT_STORE_DWORD32
416
268
    UINT64_C(10790677483737850176), // RAT_STORE_DWORD64
417
268
    UINT64_C(10772874191460900880), // RAT_STORE_TYPED_cm
418
268
    UINT64_C(10772874191460900880), // RAT_STORE_TYPED_eg
419
268
    UINT64_C(10790888589970382880), // RAT_WRITE_CACHELESS_128_eg
420
268
    UINT64_C(10790642299365761056), // RAT_WRITE_CACHELESS_32_eg
421
268
    UINT64_C(10790677483737849888), // RAT_WRITE_CACHELESS_64_eg
422
268
    UINT64_C(74217034874880), // RECIPSQRT_CLAMPED_cm
423
268
    UINT64_C(74217034874880), // RECIPSQRT_CLAMPED_eg
424
268
    UINT64_C(56624848830464), // RECIPSQRT_CLAMPED_r600
425
268
    UINT64_C(75316546502656), // RECIPSQRT_IEEE_cm
426
268
    UINT64_C(75316546502656), // RECIPSQRT_IEEE_eg
427
268
    UINT64_C(57724360458240), // RECIPSQRT_IEEE_r600
428
268
    UINT64_C(72567767433216), // RECIP_CLAMPED_cm
429
268
    UINT64_C(72567767433216), // RECIP_CLAMPED_eg
430
268
    UINT64_C(54975581388800), // RECIP_CLAMPED_r600
431
268
    UINT64_C(73667279060992), // RECIP_IEEE_cm
432
268
    UINT64_C(73667279060992), // RECIP_IEEE_eg
433
268
    UINT64_C(56075093016576), // RECIP_IEEE_r600
434
268
    UINT64_C(81363860455424), // RECIP_UINT_eg
435
268
    UINT64_C(65970697666560), // RECIP_UINT_r600
436
268
    UINT64_C(10445360463872), // RNDNE
437
268
    UINT64_C(4398046511104),  // SETE
438
268
    UINT64_C(6597069766656),  // SETE_DX10
439
268
    UINT64_C(31885837205504), // SETE_INT
440
268
    UINT64_C(7696581394432),  // SETGE_DX10
441
268
    UINT64_C(32985348833280), // SETGE_INT
442
268
    UINT64_C(34634616274944), // SETGE_UINT
443
268
    UINT64_C(7146825580544),  // SETGT_DX10
444
268
    UINT64_C(32435593019392), // SETGT_INT
445
268
    UINT64_C(34084860461056), // SETGT_UINT
446
268
    UINT64_C(8246337208320),  // SETNE_DX10
447
268
    UINT64_C(33535104647168), // SETNE_INT
448
268
    UINT64_C(5497558138880),  // SGE
449
268
    UINT64_C(4947802324992),  // SGT
450
268
    UINT64_C(77515569758208), // SIN_cm
451
268
    UINT64_C(77515569758208), // SIN_eg
452
268
    UINT64_C(60473139527680), // SIN_r600
453
268
    UINT64_C(60473139527680), // SIN_r700
454
268
    UINT64_C(6047313952768),  // SNE
455
268
    UINT64_C(45629732552704), // SUBB_UINT
456
268
    UINT64_C(29137058136064), // SUB_INT
457
268
    UINT64_C(7),  // TEX_GET_GRADIENTS_H
458
268
    UINT64_C(8),  // TEX_GET_GRADIENTS_V
459
268
    UINT64_C(4),  // TEX_GET_TEXTURE_RESINFO
460
268
    UINT64_C(3),  // TEX_LD
461
268
    UINT64_C(35), // TEX_LDPTR
462
268
    UINT64_C(16), // TEX_SAMPLE
463
268
    UINT64_C(24), // TEX_SAMPLE_C
464
268
    UINT64_C(28), // TEX_SAMPLE_C_G
465
268
    UINT64_C(25), // TEX_SAMPLE_C_L
466
268
    UINT64_C(26), // TEX_SAMPLE_C_LB
467
268
    UINT64_C(20), // TEX_SAMPLE_G
468
268
    UINT64_C(17), // TEX_SAMPLE_L
469
268
    UINT64_C(18), // TEX_SAMPLE_LB
470
268
    UINT64_C(11), // TEX_SET_GRADIENTS_H
471
268
    UINT64_C(12), // TEX_SET_GRADIENTS_V
472
268
    UINT64_C(16775081780284751936), // TEX_VTX_CONSTBUF
473
268
    UINT64_C(9236056004066541632),  // TEX_VTX_TEXBUF
474
268
    UINT64_C(9345848836096),  // TRUNC
475
268
    UINT64_C(85761906966528), // UINT_TO_FLT_eg
476
268
    UINT64_C(59923383713792), // UINT_TO_FLT_r600
477
268
    UINT64_C(1769087820812517440),  // VTX_READ_128_cm
478
268
    UINT64_C(1769087821886259264),  // VTX_READ_128_eg
479
268
    UINT64_C(1251983104222953536),  // VTX_READ_16_cm
480
268
    UINT64_C(1251983104357171264),  // VTX_READ_16_eg
481
268
    UINT64_C(1396098292298809408),  // VTX_READ_32_cm
482
268
    UINT64_C(1396098292567244864),  // VTX_READ_32_eg
483
268
    UINT64_C(1684223115334254656),  // VTX_READ_64_cm
484
268
    UINT64_C(1684223115871125568),  // VTX_READ_64_eg
485
268
    UINT64_C(1179925510185025600),  // VTX_READ_8_cm
486
268
    UINT64_C(1179925510252134464),  // VTX_READ_8_eg
487
268
    UINT64_C(9331458427911667712),  // WHILE_LOOP_EG
488
268
    UINT64_C(9439544818968559616),  // WHILE_LOOP_R600
489
268
    UINT64_C(27487790694400), // XOR_INT
490
268
    UINT64_C(0)
491
268
  };
492
268
  const unsigned opcode = MI.getOpcode();
493
268
  uint64_t Value = InstBits[opcode];
494
268
  uint64_t op = 0;
495
268
  (void)op;  // suppress warning
496
268
  switch (opcode) {
497
268
    case R600::CF_CALL_FS_EG:
498
83
    case R600::CF_CALL_FS_R600:
499
83
    case R600::CF_END_CM:
500
83
    case R600::CF_END_EG:
501
83
    case R600::CF_END_R600:
502
83
    case R600::GROUP_BARRIER:
503
83
    case R600::INTERP_PAIR_XY:
504
83
    case R600::INTERP_PAIR_ZW:
505
83
    case R600::INTERP_VEC_LOAD:
506
83
    case R600::PAD: {
507
83
      break;
508
83
    }
509
83
    case R600::CF_CONTINUE_EG:
510
0
    case R600::END_LOOP_EG:
511
0
    case R600::LOOP_BREAK_EG:
512
0
    case R600::WHILE_LOOP_EG: {
513
0
      // op: ADDR
514
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
515
0
      Value |= op & UINT64_C(16777215);
516
0
      break;
517
0
    }
518
14
    case R600::CF_TC_EG:
519
14
    case R600::CF_VC_EG: {
520
14
      // op: ADDR
521
14
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
522
14
      Value |= op & UINT64_C(16777215);
523
14
      // op: COUNT
524
14
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
525
14
      Value |= (op & UINT64_C(63)) << 42;
526
14
      break;
527
14
    }
528
14
    case R600::CF_ELSE_EG:
529
0
    case R600::CF_JUMP_EG:
530
0
    case R600::CF_PUSH_EG:
531
0
    case R600::POP_EG: {
532
0
      // op: ADDR
533
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
534
0
      Value |= op & UINT64_C(16777215);
535
0
      // op: POP_COUNT
536
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
537
0
      Value |= (op & UINT64_C(7)) << 32;
538
0
      break;
539
0
    }
540
32
    case R600::CF_ALU:
541
32
    case R600::CF_ALU_BREAK:
542
32
    case R600::CF_ALU_CONTINUE:
543
32
    case R600::CF_ALU_ELSE_AFTER:
544
32
    case R600::CF_ALU_POP_AFTER:
545
32
    case R600::CF_ALU_PUSH_BEFORE: {
546
32
      // op: ADDR
547
32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
548
32
      Value |= op & UINT64_C(4194303);
549
32
      // op: KCACHE_BANK0
550
32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
551
32
      Value |= (op & UINT64_C(15)) << 22;
552
32
      // op: KCACHE_BANK1
553
32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
554
32
      Value |= (op & UINT64_C(15)) << 26;
555
32
      // op: KCACHE_MODE0
556
32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
557
32
      Value |= (op & UINT64_C(3)) << 30;
558
32
      // op: KCACHE_MODE1
559
32
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
560
32
      Value |= (op & UINT64_C(3)) << 32;
561
32
      // op: KCACHE_ADDR0
562
32
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
563
32
      Value |= (op & UINT64_C(255)) << 34;
564
32
      // op: KCACHE_ADDR1
565
32
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
566
32
      Value |= (op & UINT64_C(255)) << 42;
567
32
      // op: COUNT
568
32
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
569
32
      Value |= (op & UINT64_C(127)) << 50;
570
32
      break;
571
32
    }
572
32
    case R600::CF_CONTINUE_R600:
573
0
    case R600::CF_PUSH_ELSE_R600:
574
0
    case R600::END_LOOP_R600:
575
0
    case R600::LOOP_BREAK_R600:
576
0
    case R600::WHILE_LOOP_R600: {
577
0
      // op: ADDR
578
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
579
0
      Value |= op & UINT64_C(4294967295);
580
0
      break;
581
0
    }
582
1
    case R600::CF_TC_R600:
583
1
    case R600::CF_VC_R600: {
584
1
      // op: ADDR
585
1
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
586
1
      Value |= op & UINT64_C(4294967295);
587
1
      // op: CNT
588
1
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
589
1
      Value |= (op & UINT64_C(8)) << 48;
590
1
      Value |= (op & UINT64_C(7)) << 42;
591
1
      break;
592
1
    }
593
1
    case R600::CF_ELSE_R600:
594
0
    case R600::CF_JUMP_R600:
595
0
    case R600::POP_R600: {
596
0
      // op: ADDR
597
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
598
0
      Value |= op & UINT64_C(4294967295);
599
0
      // op: POP_COUNT
600
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
601
0
      Value |= (op & UINT64_C(7)) << 32;
602
0
      break;
603
0
    }
604
10
    case R600::TEX_GET_GRADIENTS_H:
605
10
    case R600::TEX_GET_GRADIENTS_V:
606
10
    case R600::TEX_GET_TEXTURE_RESINFO:
607
10
    case R600::TEX_LD:
608
10
    case R600::TEX_LDPTR:
609
10
    case R600::TEX_SAMPLE:
610
10
    case R600::TEX_SAMPLE_C:
611
10
    case R600::TEX_SAMPLE_C_G:
612
10
    case R600::TEX_SAMPLE_C_L:
613
10
    case R600::TEX_SAMPLE_C_LB:
614
10
    case R600::TEX_SAMPLE_G:
615
10
    case R600::TEX_SAMPLE_L:
616
10
    case R600::TEX_SAMPLE_LB:
617
10
    case R600::TEX_SET_GRADIENTS_H:
618
10
    case R600::TEX_SET_GRADIENTS_V: {
619
10
      // op: RESOURCE_ID
620
10
      op = getMachineOpValue(MI, MI.getOperand(13), Fixups, STI);
621
10
      Value |= (op & UINT64_C(255)) << 8;
622
10
      // op: SRC_GPR
623
10
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
624
10
      Value |= (op & UINT64_C(127)) << 16;
625
10
      // op: DST_GPR
626
10
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
627
10
      Value |= (op & UINT64_C(127)) << 32;
628
10
      // op: DST_SEL_X
629
10
      op = getMachineOpValue(MI, MI.getOperand(9), Fixups, STI);
630
10
      Value |= (op & UINT64_C(7)) << 41;
631
10
      // op: DST_SEL_Y
632
10
      op = getMachineOpValue(MI, MI.getOperand(10), Fixups, STI);
633
10
      Value |= (op & UINT64_C(7)) << 44;
634
10
      // op: DST_SEL_Z
635
10
      op = getMachineOpValue(MI, MI.getOperand(11), Fixups, STI);
636
10
      Value |= (op & UINT64_C(7)) << 47;
637
10
      // op: DST_SEL_W
638
10
      op = getMachineOpValue(MI, MI.getOperand(12), Fixups, STI);
639
10
      Value |= (op & UINT64_C(7)) << 50;
640
10
      // op: COORD_TYPE_X
641
10
      op = getMachineOpValue(MI, MI.getOperand(15), Fixups, STI);
642
10
      Value |= (op & UINT64_C(1)) << 60;
643
10
      // op: COORD_TYPE_Y
644
10
      op = getMachineOpValue(MI, MI.getOperand(16), Fixups, STI);
645
10
      Value |= (op & UINT64_C(1)) << 61;
646
10
      // op: COORD_TYPE_Z
647
10
      op = getMachineOpValue(MI, MI.getOperand(17), Fixups, STI);
648
10
      Value |= (op & UINT64_C(1)) << 62;
649
10
      // op: COORD_TYPE_W
650
10
      op = getMachineOpValue(MI, MI.getOperand(18), Fixups, STI);
651
10
      Value |= (op & UINT64_C(1)) << 63;
652
10
      break;
653
10
    }
654
10
    case R600::EG_ExportBuf: {
655
0
      // op: arraybase
656
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
657
0
      Value |= op & UINT64_C(8191);
658
0
      // op: type
659
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
660
0
      Value |= (op & UINT64_C(3)) << 13;
661
0
      // op: gpr
662
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
663
0
      Value |= (op & UINT64_C(127)) << 15;
664
0
      // op: arraySize
665
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
666
0
      Value |= (op & UINT64_C(4095)) << 32;
667
0
      // op: compMask
668
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
669
0
      Value |= (op & UINT64_C(15)) << 44;
670
0
      // op: eop
671
0
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
672
0
      Value |= (op & UINT64_C(1)) << 53;
673
0
      // op: inst
674
0
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
675
0
      Value |= (op & UINT64_C(255)) << 54;
676
0
      break;
677
10
    }
678
10
    case R600::R600_ExportBuf: {
679
0
      // op: arraybase
680
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
681
0
      Value |= op & UINT64_C(8191);
682
0
      // op: type
683
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
684
0
      Value |= (op & UINT64_C(3)) << 13;
685
0
      // op: gpr
686
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
687
0
      Value |= (op & UINT64_C(127)) << 15;
688
0
      // op: arraySize
689
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
690
0
      Value |= (op & UINT64_C(4095)) << 32;
691
0
      // op: compMask
692
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
693
0
      Value |= (op & UINT64_C(15)) << 44;
694
0
      // op: eop
695
0
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
696
0
      Value |= (op & UINT64_C(1)) << 53;
697
0
      // op: inst
698
0
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
699
0
      Value |= (op & UINT64_C(255)) << 55;
700
0
      break;
701
10
    }
702
10
    case R600::EG_ExportSwz: {
703
1
      // op: arraybase
704
1
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
705
1
      Value |= op & UINT64_C(8191);
706
1
      // op: type
707
1
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
708
1
      Value |= (op & UINT64_C(3)) << 13;
709
1
      // op: gpr
710
1
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
711
1
      Value |= (op & UINT64_C(127)) << 15;
712
1
      // op: sw_x
713
1
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
714
1
      Value |= (op & UINT64_C(7)) << 32;
715
1
      // op: sw_y
716
1
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
717
1
      Value |= (op & UINT64_C(7)) << 35;
718
1
      // op: sw_z
719
1
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
720
1
      Value |= (op & UINT64_C(7)) << 38;
721
1
      // op: sw_w
722
1
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
723
1
      Value |= (op & UINT64_C(7)) << 41;
724
1
      // op: eop
725
1
      op = getMachineOpValue(MI, MI.getOperand(8), Fixups, STI);
726
1
      Value |= (op & UINT64_C(1)) << 53;
727
1
      // op: inst
728
1
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
729
1
      Value |= (op & UINT64_C(255)) << 54;
730
1
      break;
731
10
    }
732
10
    case R600::R600_ExportSwz: {
733
2
      // op: arraybase
734
2
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
735
2
      Value |= op & UINT64_C(8191);
736
2
      // op: type
737
2
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
738
2
      Value |= (op & UINT64_C(3)) << 13;
739
2
      // op: gpr
740
2
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
741
2
      Value |= (op & UINT64_C(127)) << 15;
742
2
      // op: sw_x
743
2
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
744
2
      Value |= (op & UINT64_C(7)) << 32;
745
2
      // op: sw_y
746
2
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
747
2
      Value |= (op & UINT64_C(7)) << 35;
748
2
      // op: sw_z
749
2
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
750
2
      Value |= (op & UINT64_C(7)) << 38;
751
2
      // op: sw_w
752
2
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
753
2
      Value |= (op & UINT64_C(7)) << 41;
754
2
      // op: eop
755
2
      op = getMachineOpValue(MI, MI.getOperand(8), Fixups, STI);
756
2
      Value |= (op & UINT64_C(1)) << 53;
757
2
      // op: inst
758
2
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
759
2
      Value |= (op & UINT64_C(255)) << 55;
760
2
      break;
761
10
    }
762
10
    case R600::TEX_VTX_CONSTBUF:
763
0
    case R600::TEX_VTX_TEXBUF: {
764
0
      // op: dst_gpr
765
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
766
0
      Value |= (op & UINT64_C(127)) << 32;
767
0
      // op: src_gpr
768
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
769
0
      Value |= (op & UINT64_C(127)) << 16;
770
0
      // op: buffer_id
771
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
772
0
      Value |= (op & UINT64_C(255)) << 8;
773
0
      break;
774
0
    }
775
24
    case R600::LITERALS: {
776
24
      // op: literal1
777
24
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
778
24
      Value |= op & UINT64_C(4294967295);
779
24
      // op: literal2
780
24
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
781
24
      Value |= (op & UINT64_C(4294967295)) << 32;
782
24
      break;
783
0
    }
784
0
    case R600::ALU_CLAUSE:
785
0
    case R600::FETCH_CLAUSE: {
786
0
      // op: num
787
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
788
0
      Value |= op & UINT64_C(255);
789
0
      break;
790
0
    }
791
0
    case R600::RAT_STORE_TYPED_cm: {
792
0
      // op: rat_id
793
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
794
0
      Value |= op & UINT64_C(15);
795
0
      // op: rw_gpr
796
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
797
0
      Value |= (op & UINT64_C(127)) << 15;
798
0
      // op: index_gpr
799
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
800
0
      Value |= (op & UINT64_C(127)) << 23;
801
0
      break;
802
0
    }
803
0
    case R600::RAT_STORE_TYPED_eg: {
804
0
      // op: rat_id
805
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
806
0
      Value |= op & UINT64_C(15);
807
0
      // op: rw_gpr
808
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
809
0
      Value |= (op & UINT64_C(127)) << 15;
810
0
      // op: index_gpr
811
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
812
0
      Value |= (op & UINT64_C(127)) << 23;
813
0
      // op: eop
814
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
815
0
      Value |= (op & UINT64_C(1)) << 53;
816
0
      break;
817
0
    }
818
4
    case R600::RAT_MSKOR:
819
4
    case R600::RAT_STORE_DWORD128:
820
4
    case R600::RAT_STORE_DWORD32:
821
4
    case R600::RAT_STORE_DWORD64: {
822
4
      // op: rw_gpr
823
4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
824
4
      Value |= (op & UINT64_C(127)) << 15;
825
4
      // op: index_gpr
826
4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
827
4
      Value |= (op & UINT64_C(127)) << 23;
828
4
      break;
829
4
    }
830
11
    case R600::RAT_WRITE_CACHELESS_128_eg:
831
11
    case R600::RAT_WRITE_CACHELESS_32_eg:
832
11
    case R600::RAT_WRITE_CACHELESS_64_eg: {
833
11
      // op: rw_gpr
834
11
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
835
11
      Value |= (op & UINT64_C(127)) << 15;
836
11
      // op: index_gpr
837
11
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
838
11
      Value |= (op & UINT64_C(127)) << 23;
839
11
      // op: eop
840
11
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
841
11
      Value |= (op & UINT64_C(1)) << 53;
842
11
      break;
843
11
    }
844
11
    case R600::RAT_ATOMIC_ADD_NORET:
845
0
    case R600::RAT_ATOMIC_ADD_RTN:
846
0
    case R600::RAT_ATOMIC_AND_NORET:
847
0
    case R600::RAT_ATOMIC_AND_RTN:
848
0
    case R600::RAT_ATOMIC_CMPXCHG_INT_NORET:
849
0
    case R600::RAT_ATOMIC_CMPXCHG_INT_RTN:
850
0
    case R600::RAT_ATOMIC_DEC_UINT_NORET:
851
0
    case R600::RAT_ATOMIC_DEC_UINT_RTN:
852
0
    case R600::RAT_ATOMIC_INC_UINT_NORET:
853
0
    case R600::RAT_ATOMIC_INC_UINT_RTN:
854
0
    case R600::RAT_ATOMIC_MAX_INT_NORET:
855
0
    case R600::RAT_ATOMIC_MAX_INT_RTN:
856
0
    case R600::RAT_ATOMIC_MAX_UINT_NORET:
857
0
    case R600::RAT_ATOMIC_MAX_UINT_RTN:
858
0
    case R600::RAT_ATOMIC_MIN_INT_NORET:
859
0
    case R600::RAT_ATOMIC_MIN_INT_RTN:
860
0
    case R600::RAT_ATOMIC_MIN_UINT_NORET:
861
0
    case R600::RAT_ATOMIC_MIN_UINT_RTN:
862
0
    case R600::RAT_ATOMIC_OR_NORET:
863
0
    case R600::RAT_ATOMIC_OR_RTN:
864
0
    case R600::RAT_ATOMIC_RSUB_NORET:
865
0
    case R600::RAT_ATOMIC_RSUB_RTN:
866
0
    case R600::RAT_ATOMIC_SUB_NORET:
867
0
    case R600::RAT_ATOMIC_SUB_RTN:
868
0
    case R600::RAT_ATOMIC_XCHG_INT_NORET:
869
0
    case R600::RAT_ATOMIC_XCHG_INT_RTN:
870
0
    case R600::RAT_ATOMIC_XOR_NORET:
871
0
    case R600::RAT_ATOMIC_XOR_RTN: {
872
0
      // op: rw_gpr
873
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
874
0
      Value |= (op & UINT64_C(127)) << 15;
875
0
      // op: index_gpr
876
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
877
0
      Value |= (op & UINT64_C(127)) << 23;
878
0
      break;
879
0
    }
880
0
    case R600::LDS_CMPST: {
881
0
      // op: src0
882
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
883
0
      Value |= (op & UINT64_C(1536)) << 1;
884
0
      Value |= op & UINT64_C(511);
885
0
      // op: src0_rel
886
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
887
0
      Value |= (op & UINT64_C(1)) << 9;
888
0
      // op: src1
889
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
890
0
      Value |= (op & UINT64_C(1536)) << 14;
891
0
      Value |= (op & UINT64_C(511)) << 13;
892
0
      // op: src1_rel
893
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
894
0
      Value |= (op & UINT64_C(1)) << 22;
895
0
      // op: pred_sel
896
0
      op = getMachineOpValue(MI, MI.getOperand(10), Fixups, STI);
897
0
      Value |= (op & UINT64_C(3)) << 29;
898
0
      // op: last
899
0
      op = getMachineOpValue(MI, MI.getOperand(9), Fixups, STI);
900
0
      Value |= (op & UINT64_C(1)) << 31;
901
0
      // op: src2
902
0
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
903
0
      Value |= (op & UINT64_C(1536)) << 33;
904
0
      Value |= (op & UINT64_C(511)) << 32;
905
0
      // op: src2_rel
906
0
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
907
0
      Value |= (op & UINT64_C(1)) << 41;
908
0
      // op: bank_swizzle
909
0
      op = getMachineOpValue(MI, MI.getOperand(11), Fixups, STI);
910
0
      Value |= (op & UINT64_C(7)) << 50;
911
0
      break;
912
0
    }
913
0
    case R600::LDS_ADD:
914
0
    case R600::LDS_AND:
915
0
    case R600::LDS_BYTE_WRITE:
916
0
    case R600::LDS_MAX_INT:
917
0
    case R600::LDS_MAX_UINT:
918
0
    case R600::LDS_MIN_INT:
919
0
    case R600::LDS_MIN_UINT:
920
0
    case R600::LDS_OR:
921
0
    case R600::LDS_SHORT_WRITE:
922
0
    case R600::LDS_SUB:
923
0
    case R600::LDS_WRITE:
924
0
    case R600::LDS_WRXCHG:
925
0
    case R600::LDS_XOR: {
926
0
      // op: src0
927
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
928
0
      Value |= (op & UINT64_C(1536)) << 1;
929
0
      Value |= op & UINT64_C(511);
930
0
      // op: src0_rel
931
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
932
0
      Value |= (op & UINT64_C(1)) << 9;
933
0
      // op: src1
934
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
935
0
      Value |= (op & UINT64_C(1536)) << 14;
936
0
      Value |= (op & UINT64_C(511)) << 13;
937
0
      // op: src1_rel
938
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
939
0
      Value |= (op & UINT64_C(1)) << 22;
940
0
      // op: pred_sel
941
0
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
942
0
      Value |= (op & UINT64_C(3)) << 29;
943
0
      // op: last
944
0
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
945
0
      Value |= (op & UINT64_C(1)) << 31;
946
0
      // op: bank_swizzle
947
0
      op = getMachineOpValue(MI, MI.getOperand(8), Fixups, STI);
948
0
      Value |= (op & UINT64_C(7)) << 50;
949
0
      break;
950
0
    }
951
0
    case R600::LDS_BYTE_READ_RET:
952
0
    case R600::LDS_READ_RET:
953
0
    case R600::LDS_SHORT_READ_RET:
954
0
    case R600::LDS_UBYTE_READ_RET:
955
0
    case R600::LDS_USHORT_READ_RET: {
956
0
      // op: src0
957
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
958
0
      Value |= (op & UINT64_C(1536)) << 1;
959
0
      Value |= op & UINT64_C(511);
960
0
      // op: src0_rel
961
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
962
0
      Value |= (op & UINT64_C(1)) << 9;
963
0
      // op: pred_sel
964
0
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
965
0
      Value |= (op & UINT64_C(3)) << 29;
966
0
      // op: last
967
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
968
0
      Value |= (op & UINT64_C(1)) << 31;
969
0
      // op: bank_swizzle
970
0
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
971
0
      Value |= (op & UINT64_C(7)) << 50;
972
0
      break;
973
0
    }
974
0
    case R600::LDS_CMPST_RET: {
975
0
      // op: src0
976
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
977
0
      Value |= (op & UINT64_C(1536)) << 1;
978
0
      Value |= op & UINT64_C(511);
979
0
      // op: src0_rel
980
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
981
0
      Value |= (op & UINT64_C(1)) << 9;
982
0
      // op: src1
983
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
984
0
      Value |= (op & UINT64_C(1536)) << 14;
985
0
      Value |= (op & UINT64_C(511)) << 13;
986
0
      // op: src1_rel
987
0
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
988
0
      Value |= (op & UINT64_C(1)) << 22;
989
0
      // op: pred_sel
990
0
      op = getMachineOpValue(MI, MI.getOperand(11), Fixups, STI);
991
0
      Value |= (op & UINT64_C(3)) << 29;
992
0
      // op: last
993
0
      op = getMachineOpValue(MI, MI.getOperand(10), Fixups, STI);
994
0
      Value |= (op & UINT64_C(1)) << 31;
995
0
      // op: src2
996
0
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
997
0
      Value |= (op & UINT64_C(1536)) << 33;
998
0
      Value |= (op & UINT64_C(511)) << 32;
999
0
      // op: src2_rel
1000
0
      op = getMachineOpValue(MI, MI.getOperand(8), Fixups, STI);
1001
0
      Value |= (op & UINT64_C(1)) << 41;
1002
0
      // op: bank_swizzle
1003
0
      op = getMachineOpValue(MI, MI.getOperand(12), Fixups, STI);
1004
0
      Value |= (op & UINT64_C(7)) << 50;
1005
0
      break;
1006
0
    }
1007
0
    case R600::LDS_ADD_RET:
1008
0
    case R600::LDS_AND_RET:
1009
0
    case R600::LDS_MAX_INT_RET:
1010
0
    case R600::LDS_MAX_UINT_RET:
1011
0
    case R600::LDS_MIN_INT_RET:
1012
0
    case R600::LDS_MIN_UINT_RET:
1013
0
    case R600::LDS_OR_RET:
1014
0
    case R600::LDS_SUB_RET:
1015
0
    case R600::LDS_WRXCHG_RET:
1016
0
    case R600::LDS_XOR_RET: {
1017
0
      // op: src0
1018
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
1019
0
      Value |= (op & UINT64_C(1536)) << 1;
1020
0
      Value |= op & UINT64_C(511);
1021
0
      // op: src0_rel
1022
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
1023
0
      Value |= (op & UINT64_C(1)) << 9;
1024
0
      // op: src1
1025
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
1026
0
      Value |= (op & UINT64_C(1536)) << 14;
1027
0
      Value |= (op & UINT64_C(511)) << 13;
1028
0
      // op: src1_rel
1029
0
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
1030
0
      Value |= (op & UINT64_C(1)) << 22;
1031
0
      // op: pred_sel
1032
0
      op = getMachineOpValue(MI, MI.getOperand(8), Fixups, STI);
1033
0
      Value |= (op & UINT64_C(3)) << 29;
1034
0
      // op: last
1035
0
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
1036
0
      Value |= (op & UINT64_C(1)) << 31;
1037
0
      // op: bank_swizzle
1038
0
      op = getMachineOpValue(MI, MI.getOperand(9), Fixups, STI);
1039
0
      Value |= (op & UINT64_C(7)) << 50;
1040
0
      break;
1041
0
    }
1042
0
    case R600::BFE_INT_eg:
1043
0
    case R600::BFE_UINT_eg:
1044
0
    case R600::BFI_INT_eg:
1045
0
    case R600::BIT_ALIGN_INT_eg:
1046
0
    case R600::CNDE_INT:
1047
0
    case R600::CNDE_eg:
1048
0
    case R600::CNDE_r600:
1049
0
    case R600::CNDGE_INT:
1050
0
    case R600::CNDGE_eg:
1051
0
    case R600::CNDGE_r600:
1052
0
    case R600::CNDGT_INT:
1053
0
    case R600::CNDGT_eg:
1054
0
    case R600::CNDGT_r600:
1055
0
    case R600::FMA_eg:
1056
0
    case R600::MULADD_IEEE_eg:
1057
0
    case R600::MULADD_IEEE_r600:
1058
0
    case R600::MULADD_INT24_cm:
1059
0
    case R600::MULADD_UINT24_eg:
1060
0
    case R600::MULADD_eg:
1061
0
    case R600::MULADD_r600:
1062
0
    case R600::MUL_LIT_eg:
1063
0
    case R600::MUL_LIT_r600: {
1064
0
      // op: src0
1065
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
1066
0
      Value |= (op & UINT64_C(1536)) << 1;
1067
0
      Value |= op & UINT64_C(511);
1068
0
      // op: src0_rel
1069
0
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
1070
0
      Value |= (op & UINT64_C(1)) << 9;
1071
0
      // op: src1
1072
0
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
1073
0
      Value |= (op & UINT64_C(1536)) << 14;
1074
0
      Value |= (op & UINT64_C(511)) << 13;
1075
0
      // op: src1_rel
1076
0
      op = getMachineOpValue(MI, MI.getOperand(9), Fixups, STI);
1077
0
      Value |= (op & UINT64_C(1)) << 22;
1078
0
      // op: pred_sel
1079
0
      op = getMachineOpValue(MI, MI.getOperand(16), Fixups, STI);
1080
0
      Value |= (op & UINT64_C(3)) << 29;
1081
0
      // op: last
1082
0
      op = getMachineOpValue(MI, MI.getOperand(15), Fixups, STI);
1083
0
      Value |= (op & UINT64_C(1)) << 31;
1084
0
      // op: src0_neg
1085
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
1086
0
      Value |= (op & UINT64_C(1)) << 12;
1087
0
      // op: src1_neg
1088
0
      op = getMachineOpValue(MI, MI.getOperand(8), Fixups, STI);
1089
0
      Value |= (op & UINT64_C(1)) << 25;
1090
0
      // op: dst
1091
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1092
0
      Value |= (op & UINT64_C(1536)) << 52;
1093
0
      Value |= (op & UINT64_C(127)) << 53;
1094
0
      // op: bank_swizzle
1095
0
      op = getMachineOpValue(MI, MI.getOperand(18), Fixups, STI);
1096
0
      Value |= (op & UINT64_C(7)) << 50;
1097
0
      // op: dst_rel
1098
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
1099
0
      Value |= (op & UINT64_C(1)) << 60;
1100
0
      // op: clamp
1101
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
1102
0
      Value |= (op & UINT64_C(1)) << 63;
1103
0
      // op: src2
1104
0
      op = getMachineOpValue(MI, MI.getOperand(11), Fixups, STI);
1105
0
      Value |= (op & UINT64_C(1536)) << 33;
1106
0
      Value |= (op & UINT64_C(511)) << 32;
1107
0
      // op: src2_rel
1108
0
      op = getMachineOpValue(MI, MI.getOperand(13), Fixups, STI);
1109
0
      Value |= (op & UINT64_C(1)) << 41;
1110
0
      // op: src2_neg
1111
0
      op = getMachineOpValue(MI, MI.getOperand(12), Fixups, STI);
1112
0
      Value |= (op & UINT64_C(1)) << 44;
1113
0
      break;
1114
0
    }
1115
10
    case R600::BCNT_INT:
1116
10
    case R600::CEIL:
1117
10
    case R600::COS_cm:
1118
10
    case R600::COS_eg:
1119
10
    case R600::COS_r600:
1120
10
    case R600::COS_r700:
1121
10
    case R600::EXP_IEEE_cm:
1122
10
    case R600::EXP_IEEE_eg:
1123
10
    case R600::EXP_IEEE_r600:
1124
10
    case R600::FFBH_UINT:
1125
10
    case R600::FFBL_INT:
1126
10
    case R600::FLOOR:
1127
10
    case R600::FLT16_TO_FLT32:
1128
10
    case R600::FLT32_TO_FLT16:
1129
10
    case R600::FLT_TO_INT_eg:
1130
10
    case R600::FLT_TO_INT_r600:
1131
10
    case R600::FLT_TO_UINT_eg:
1132
10
    case R600::FLT_TO_UINT_r600:
1133
10
    case R600::FRACT:
1134
10
    case R600::INTERP_LOAD_P0:
1135
10
    case R600::INT_TO_FLT_eg:
1136
10
    case R600::INT_TO_FLT_r600:
1137
10
    case R600::LOG_CLAMPED_eg:
1138
10
    case R600::LOG_CLAMPED_r600:
1139
10
    case R600::LOG_IEEE_cm:
1140
10
    case R600::LOG_IEEE_eg:
1141
10
    case R600::LOG_IEEE_r600:
1142
10
    case R600::MOV:
1143
10
    case R600::MOVA_INT_eg:
1144
10
    case R600::NOT_INT:
1145
10
    case R600::RECIPSQRT_CLAMPED_cm:
1146
10
    case R600::RECIPSQRT_CLAMPED_eg:
1147
10
    case R600::RECIPSQRT_CLAMPED_r600:
1148
10
    case R600::RECIPSQRT_IEEE_cm:
1149
10
    case R600::RECIPSQRT_IEEE_eg:
1150
10
    case R600::RECIPSQRT_IEEE_r600:
1151
10
    case R600::RECIP_CLAMPED_cm:
1152
10
    case R600::RECIP_CLAMPED_eg:
1153
10
    case R600::RECIP_CLAMPED_r600:
1154
10
    case R600::RECIP_IEEE_cm:
1155
10
    case R600::RECIP_IEEE_eg:
1156
10
    case R600::RECIP_IEEE_r600:
1157
10
    case R600::RECIP_UINT_eg:
1158
10
    case R600::RECIP_UINT_r600:
1159
10
    case R600::RNDNE:
1160
10
    case R600::SIN_cm:
1161
10
    case R600::SIN_eg:
1162
10
    case R600::SIN_r600:
1163
10
    case R600::SIN_r700:
1164
10
    case R600::TRUNC:
1165
10
    case R600::UINT_TO_FLT_eg:
1166
10
    case R600::UINT_TO_FLT_r600: {
1167
10
      // op: src0
1168
10
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
1169
10
      Value |= (op & UINT64_C(1536)) << 1;
1170
10
      Value |= op & UINT64_C(511);
1171
10
      // op: src0_rel
1172
10
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
1173
10
      Value |= (op & UINT64_C(1)) << 9;
1174
10
      // op: pred_sel
1175
10
      op = getMachineOpValue(MI, MI.getOperand(11), Fixups, STI);
1176
10
      Value |= (op & UINT64_C(3)) << 29;
1177
10
      // op: last
1178
10
      op = getMachineOpValue(MI, MI.getOperand(10), Fixups, STI);
1179
10
      Value |= (op & UINT64_C(1)) << 31;
1180
10
      // op: src0_neg
1181
10
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
1182
10
      Value |= (op & UINT64_C(1)) << 12;
1183
10
      // op: dst
1184
10
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1185
10
      Value |= (op & UINT64_C(1536)) << 52;
1186
10
      Value |= (op & UINT64_C(127)) << 53;
1187
10
      // op: bank_swizzle
1188
10
      op = getMachineOpValue(MI, MI.getOperand(13), Fixups, STI);
1189
10
      Value |= (op & UINT64_C(7)) << 50;
1190
10
      // op: dst_rel
1191
10
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
1192
10
      Value |= (op & UINT64_C(1)) << 60;
1193
10
      // op: clamp
1194
10
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
1195
10
      Value |= (op & UINT64_C(1)) << 63;
1196
10
      // op: src0_abs
1197
10
      op = getMachineOpValue(MI, MI.getOperand(8), Fixups, STI);
1198
10
      Value |= (op & UINT64_C(1)) << 32;
1199
10
      // op: write
1200
10
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
1201
10
      Value |= (op & UINT64_C(1)) << 36;
1202
10
      // op: omod
1203
10
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
1204
10
      Value |= (op & UINT64_C(3)) << 37;
1205
10
      break;
1206
10
    }
1207
62
    case R600::ADD:
1208
62
    case R600::ADDC_UINT:
1209
62
    case R600::ADD_INT:
1210
62
    case R600::AND_INT:
1211
62
    case R600::ASHR_eg:
1212
62
    case R600::ASHR_r600:
1213
62
    case R600::BFM_INT_eg:
1214
62
    case R600::CUBE_eg_real:
1215
62
    case R600::CUBE_r600_real:
1216
62
    case R600::DOT4_eg:
1217
62
    case R600::DOT4_r600:
1218
62
    case R600::KILLGT:
1219
62
    case R600::LSHL_eg:
1220
62
    case R600::LSHL_r600:
1221
62
    case R600::LSHR_eg:
1222
62
    case R600::LSHR_r600:
1223
62
    case R600::MAX:
1224
62
    case R600::MAX_DX10:
1225
62
    case R600::MAX_INT:
1226
62
    case R600::MAX_UINT:
1227
62
    case R600::MIN:
1228
62
    case R600::MIN_DX10:
1229
62
    case R600::MIN_INT:
1230
62
    case R600::MIN_UINT:
1231
62
    case R600::MUL:
1232
62
    case R600::MULHI_INT_cm:
1233
62
    case R600::MULHI_INT_cm24:
1234
62
    case R600::MULHI_INT_eg:
1235
62
    case R600::MULHI_INT_r600:
1236
62
    case R600::MULHI_UINT24_eg:
1237
62
    case R600::MULHI_UINT_cm:
1238
62
    case R600::MULHI_UINT_cm24:
1239
62
    case R600::MULHI_UINT_eg:
1240
62
    case R600::MULHI_UINT_r600:
1241
62
    case R600::MULLO_INT_cm:
1242
62
    case R600::MULLO_INT_eg:
1243
62
    case R600::MULLO_INT_r600:
1244
62
    case R600::MULLO_UINT_cm:
1245
62
    case R600::MULLO_UINT_eg:
1246
62
    case R600::MULLO_UINT_r600:
1247
62
    case R600::MUL_IEEE:
1248
62
    case R600::MUL_INT24_cm:
1249
62
    case R600::MUL_UINT24_eg:
1250
62
    case R600::OR_INT:
1251
62
    case R600::PRED_SETE:
1252
62
    case R600::PRED_SETE_INT:
1253
62
    case R600::PRED_SETGE:
1254
62
    case R600::PRED_SETGE_INT:
1255
62
    case R600::PRED_SETGT:
1256
62
    case R600::PRED_SETGT_INT:
1257
62
    case R600::PRED_SETNE:
1258
62
    case R600::PRED_SETNE_INT:
1259
62
    case R600::SETE:
1260
62
    case R600::SETE_DX10:
1261
62
    case R600::SETE_INT:
1262
62
    case R600::SETGE_DX10:
1263
62
    case R600::SETGE_INT:
1264
62
    case R600::SETGE_UINT:
1265
62
    case R600::SETGT_DX10:
1266
62
    case R600::SETGT_INT:
1267
62
    case R600::SETGT_UINT:
1268
62
    case R600::SETNE_DX10:
1269
62
    case R600::SETNE_INT:
1270
62
    case R600::SGE:
1271
62
    case R600::SGT:
1272
62
    case R600::SNE:
1273
62
    case R600::SUBB_UINT:
1274
62
    case R600::SUB_INT:
1275
62
    case R600::XOR_INT: {
1276
62
      // op: src0
1277
62
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
1278
62
      Value |= (op & UINT64_C(1536)) << 1;
1279
62
      Value |= op & UINT64_C(511);
1280
62
      // op: src0_rel
1281
62
      op = getMachineOpValue(MI, MI.getOperand(9), Fixups, STI);
1282
62
      Value |= (op & UINT64_C(1)) << 9;
1283
62
      // op: src1
1284
62
      op = getMachineOpValue(MI, MI.getOperand(12), Fixups, STI);
1285
62
      Value |= (op & UINT64_C(1536)) << 14;
1286
62
      Value |= (op & UINT64_C(511)) << 13;
1287
62
      // op: src1_rel
1288
62
      op = getMachineOpValue(MI, MI.getOperand(14), Fixups, STI);
1289
62
      Value |= (op & UINT64_C(1)) << 22;
1290
62
      // op: pred_sel
1291
62
      op = getMachineOpValue(MI, MI.getOperand(18), Fixups, STI);
1292
62
      Value |= (op & UINT64_C(3)) << 29;
1293
62
      // op: last
1294
62
      op = getMachineOpValue(MI, MI.getOperand(17), Fixups, STI);
1295
62
      Value |= (op & UINT64_C(1)) << 31;
1296
62
      // op: src0_neg
1297
62
      op = getMachineOpValue(MI, MI.getOperand(8), Fixups, STI);
1298
62
      Value |= (op & UINT64_C(1)) << 12;
1299
62
      // op: src1_neg
1300
62
      op = getMachineOpValue(MI, MI.getOperand(13), Fixups, STI);
1301
62
      Value |= (op & UINT64_C(1)) << 25;
1302
62
      // op: dst
1303
62
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1304
62
      Value |= (op & UINT64_C(1536)) << 52;
1305
62
      Value |= (op & UINT64_C(127)) << 53;
1306
62
      // op: bank_swizzle
1307
62
      op = getMachineOpValue(MI, MI.getOperand(20), Fixups, STI);
1308
62
      Value |= (op & UINT64_C(7)) << 50;
1309
62
      // op: dst_rel
1310
62
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
1311
62
      Value |= (op & UINT64_C(1)) << 60;
1312
62
      // op: clamp
1313
62
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
1314
62
      Value |= (op & UINT64_C(1)) << 63;
1315
62
      // op: src0_abs
1316
62
      op = getMachineOpValue(MI, MI.getOperand(10), Fixups, STI);
1317
62
      Value |= (op & UINT64_C(1)) << 32;
1318
62
      // op: src1_abs
1319
62
      op = getMachineOpValue(MI, MI.getOperand(15), Fixups, STI);
1320
62
      Value |= (op & UINT64_C(1)) << 33;
1321
62
      // op: update_exec_mask
1322
62
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
1323
62
      Value |= (op & UINT64_C(1)) << 34;
1324
62
      // op: update_pred
1325
62
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
1326
62
      Value |= (op & UINT64_C(1)) << 35;
1327
62
      // op: write
1328
62
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
1329
62
      Value |= (op & UINT64_C(1)) << 36;
1330
62
      // op: omod
1331
62
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
1332
62
      Value |= (op & UINT64_C(3)) << 37;
1333
62
      break;
1334
62
    }
1335
62
    case R600::INTERP_XY:
1336
0
    case R600::INTERP_ZW: {
1337
0
      // op: src0
1338
0
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
1339
0
      Value |= (op & UINT64_C(1536)) << 1;
1340
0
      Value |= op & UINT64_C(511);
1341
0
      // op: src0_rel
1342
0
      op = getMachineOpValue(MI, MI.getOperand(9), Fixups, STI);
1343
0
      Value |= (op & UINT64_C(1)) << 9;
1344
0
      // op: src1
1345
0
      op = getMachineOpValue(MI, MI.getOperand(12), Fixups, STI);
1346
0
      Value |= (op & UINT64_C(1536)) << 14;
1347
0
      Value |= (op & UINT64_C(511)) << 13;
1348
0
      // op: src1_rel
1349
0
      op = getMachineOpValue(MI, MI.getOperand(14), Fixups, STI);
1350
0
      Value |= (op & UINT64_C(1)) << 22;
1351
0
      // op: pred_sel
1352
0
      op = getMachineOpValue(MI, MI.getOperand(18), Fixups, STI);
1353
0
      Value |= (op & UINT64_C(3)) << 29;
1354
0
      // op: last
1355
0
      op = getMachineOpValue(MI, MI.getOperand(17), Fixups, STI);
1356
0
      Value |= (op & UINT64_C(1)) << 31;
1357
0
      // op: src0_neg
1358
0
      op = getMachineOpValue(MI, MI.getOperand(8), Fixups, STI);
1359
0
      Value |= (op & UINT64_C(1)) << 12;
1360
0
      // op: src1_neg
1361
0
      op = getMachineOpValue(MI, MI.getOperand(13), Fixups, STI);
1362
0
      Value |= (op & UINT64_C(1)) << 25;
1363
0
      // op: dst
1364
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1365
0
      Value |= (op & UINT64_C(1536)) << 52;
1366
0
      Value |= (op & UINT64_C(127)) << 53;
1367
0
      // op: dst_rel
1368
0
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
1369
0
      Value |= (op & UINT64_C(1)) << 60;
1370
0
      // op: clamp
1371
0
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
1372
0
      Value |= (op & UINT64_C(1)) << 63;
1373
0
      // op: src0_abs
1374
0
      op = getMachineOpValue(MI, MI.getOperand(10), Fixups, STI);
1375
0
      Value |= (op & UINT64_C(1)) << 32;
1376
0
      // op: src1_abs
1377
0
      op = getMachineOpValue(MI, MI.getOperand(15), Fixups, STI);
1378
0
      Value |= (op & UINT64_C(1)) << 33;
1379
0
      // op: update_exec_mask
1380
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
1381
0
      Value |= (op & UINT64_C(1)) << 34;
1382
0
      // op: update_pred
1383
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
1384
0
      Value |= (op & UINT64_C(1)) << 35;
1385
0
      // op: write
1386
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
1387
0
      Value |= (op & UINT64_C(1)) << 36;
1388
0
      // op: omod
1389
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
1390
0
      Value |= (op & UINT64_C(3)) << 37;
1391
0
      break;
1392
0
    }
1393
14
    case R600::VTX_READ_128_cm:
1394
14
    case R600::VTX_READ_128_eg:
1395
14
    case R600::VTX_READ_16_cm:
1396
14
    case R600::VTX_READ_16_eg:
1397
14
    case R600::VTX_READ_32_cm:
1398
14
    case R600::VTX_READ_32_eg:
1399
14
    case R600::VTX_READ_64_cm:
1400
14
    case R600::VTX_READ_64_eg:
1401
14
    case R600::VTX_READ_8_cm:
1402
14
    case R600::VTX_READ_8_eg: {
1403
14
      // op: src_gpr
1404
14
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
1405
14
      Value |= (op & UINT64_C(127)) << 16;
1406
14
      // op: buffer_id
1407
14
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
1408
14
      Value |= (op & UINT64_C(255)) << 8;
1409
14
      // op: dst_gpr
1410
14
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1411
14
      Value |= (op & UINT64_C(127)) << 32;
1412
14
      break;
1413
14
    }
1414
14
  default:
1415
0
    std::string msg;
1416
0
    raw_string_ostream Msg(msg);
1417
0
    Msg << "Not supported instr: " << MI;
1418
0
    report_fatal_error(Msg.str());
1419
268
  }
1420
268
  return Value;
1421
268
}
1422
1423
#ifdef ENABLE_INSTR_PREDICATE_VERIFIER
1424
#undef ENABLE_INSTR_PREDICATE_VERIFIER
1425
#include <sstream>
1426
1427
// Flags for subtarget features that participate in instruction matching.
1428
enum SubtargetFeatureFlag : uint8_t {
1429
  Feature_None = 0
1430
};
1431
1432
#ifndef NDEBUG
1433
static const char *SubtargetFeatureNames[] = {
1434
  nullptr
1435
};
1436
1437
#endif // NDEBUG
1438
uint64_t R600MCCodeEmitter::
1439
315
computeAvailableFeatures(const FeatureBitset& FB) const {
1440
315
  uint64_t Features = 0;
1441
315
  return Features;
1442
315
}
1443
1444
void R600MCCodeEmitter::verifyInstructionPredicates(
1445
315
    const MCInst &Inst, uint64_t AvailableFeatures) const {
1446
#ifndef NDEBUG
1447
  static uint64_t RequiredFeatures[] = {
1448
    0, // PHI = 0
1449
    0, // INLINEASM = 1
1450
    0, // CFI_INSTRUCTION = 2
1451
    0, // EH_LABEL = 3
1452
    0, // GC_LABEL = 4
1453
    0, // ANNOTATION_LABEL = 5
1454
    0, // KILL = 6
1455
    0, // EXTRACT_SUBREG = 7
1456
    0, // INSERT_SUBREG = 8
1457
    0, // IMPLICIT_DEF = 9
1458
    0, // SUBREG_TO_REG = 10
1459
    0, // COPY_TO_REGCLASS = 11
1460
    0, // DBG_VALUE = 12
1461
    0, // DBG_LABEL = 13
1462
    0, // REG_SEQUENCE = 14
1463
    0, // COPY = 15
1464
    0, // BUNDLE = 16
1465
    0, // LIFETIME_START = 17
1466
    0, // LIFETIME_END = 18
1467
    0, // STACKMAP = 19
1468
    0, // FENTRY_CALL = 20
1469
    0, // PATCHPOINT = 21
1470
    0, // LOAD_STACK_GUARD = 22
1471
    0, // STATEPOINT = 23
1472
    0, // LOCAL_ESCAPE = 24
1473
    0, // FAULTING_OP = 25
1474
    0, // PATCHABLE_OP = 26
1475
    0, // PATCHABLE_FUNCTION_ENTER = 27
1476
    0, // PATCHABLE_RET = 28
1477
    0, // PATCHABLE_FUNCTION_EXIT = 29
1478
    0, // PATCHABLE_TAIL_CALL = 30
1479
    0, // PATCHABLE_EVENT_CALL = 31
1480
    0, // PATCHABLE_TYPED_EVENT_CALL = 32
1481
    0, // ICALL_BRANCH_FUNNEL = 33
1482
    0, // G_ADD = 34
1483
    0, // G_SUB = 35
1484
    0, // G_MUL = 36
1485
    0, // G_SDIV = 37
1486
    0, // G_UDIV = 38
1487
    0, // G_SREM = 39
1488
    0, // G_UREM = 40
1489
    0, // G_AND = 41
1490
    0, // G_OR = 42
1491
    0, // G_XOR = 43
1492
    0, // G_IMPLICIT_DEF = 44
1493
    0, // G_PHI = 45
1494
    0, // G_FRAME_INDEX = 46
1495
    0, // G_GLOBAL_VALUE = 47
1496
    0, // G_EXTRACT = 48
1497
    0, // G_UNMERGE_VALUES = 49
1498
    0, // G_INSERT = 50
1499
    0, // G_MERGE_VALUES = 51
1500
    0, // G_PTRTOINT = 52
1501
    0, // G_INTTOPTR = 53
1502
    0, // G_BITCAST = 54
1503
    0, // G_INTRINSIC_TRUNC = 55
1504
    0, // G_INTRINSIC_ROUND = 56
1505
    0, // G_LOAD = 57
1506
    0, // G_SEXTLOAD = 58
1507
    0, // G_ZEXTLOAD = 59
1508
    0, // G_STORE = 60
1509
    0, // G_ATOMIC_CMPXCHG_WITH_SUCCESS = 61
1510
    0, // G_ATOMIC_CMPXCHG = 62
1511
    0, // G_ATOMICRMW_XCHG = 63
1512
    0, // G_ATOMICRMW_ADD = 64
1513
    0, // G_ATOMICRMW_SUB = 65
1514
    0, // G_ATOMICRMW_AND = 66
1515
    0, // G_ATOMICRMW_NAND = 67
1516
    0, // G_ATOMICRMW_OR = 68
1517
    0, // G_ATOMICRMW_XOR = 69
1518
    0, // G_ATOMICRMW_MAX = 70
1519
    0, // G_ATOMICRMW_MIN = 71
1520
    0, // G_ATOMICRMW_UMAX = 72
1521
    0, // G_ATOMICRMW_UMIN = 73
1522
    0, // G_BRCOND = 74
1523
    0, // G_BRINDIRECT = 75
1524
    0, // G_INTRINSIC = 76
1525
    0, // G_INTRINSIC_W_SIDE_EFFECTS = 77
1526
    0, // G_ANYEXT = 78
1527
    0, // G_TRUNC = 79
1528
    0, // G_CONSTANT = 80
1529
    0, // G_FCONSTANT = 81
1530
    0, // G_VASTART = 82
1531
    0, // G_VAARG = 83
1532
    0, // G_SEXT = 84
1533
    0, // G_ZEXT = 85
1534
    0, // G_SHL = 86
1535
    0, // G_LSHR = 87
1536
    0, // G_ASHR = 88
1537
    0, // G_ICMP = 89
1538
    0, // G_FCMP = 90
1539
    0, // G_SELECT = 91
1540
    0, // G_UADDO = 92
1541
    0, // G_UADDE = 93
1542
    0, // G_USUBO = 94
1543
    0, // G_USUBE = 95
1544
    0, // G_SADDO = 96
1545
    0, // G_SADDE = 97
1546
    0, // G_SSUBO = 98
1547
    0, // G_SSUBE = 99
1548
    0, // G_UMULO = 100
1549
    0, // G_SMULO = 101
1550
    0, // G_UMULH = 102
1551
    0, // G_SMULH = 103
1552
    0, // G_FADD = 104
1553
    0, // G_FSUB = 105
1554
    0, // G_FMUL = 106
1555
    0, // G_FMA = 107
1556
    0, // G_FDIV = 108
1557
    0, // G_FREM = 109
1558
    0, // G_FPOW = 110
1559
    0, // G_FEXP = 111
1560
    0, // G_FEXP2 = 112
1561
    0, // G_FLOG = 113
1562
    0, // G_FLOG2 = 114
1563
    0, // G_FNEG = 115
1564
    0, // G_FPEXT = 116
1565
    0, // G_FPTRUNC = 117
1566
    0, // G_FPTOSI = 118
1567
    0, // G_FPTOUI = 119
1568
    0, // G_SITOFP = 120
1569
    0, // G_UITOFP = 121
1570
    0, // G_FABS = 122
1571
    0, // G_GEP = 123
1572
    0, // G_PTR_MASK = 124
1573
    0, // G_BR = 125
1574
    0, // G_INSERT_VECTOR_ELT = 126
1575
    0, // G_EXTRACT_VECTOR_ELT = 127
1576
    0, // G_SHUFFLE_VECTOR = 128
1577
    0, // G_CTTZ = 129
1578
    0, // G_CTTZ_ZERO_UNDEF = 130
1579
    0, // G_CTLZ = 131
1580
    0, // G_CTLZ_ZERO_UNDEF = 132
1581
    0, // G_CTPOP = 133
1582
    0, // G_BSWAP = 134
1583
    0, // G_ADDRSPACE_CAST = 135
1584
    0, // G_BLOCK_ADDR = 136
1585
    0, // BRANCH = 137
1586
    0, // BRANCH_COND_f32 = 138
1587
    0, // BRANCH_COND_i32 = 139
1588
    0, // BREAK = 140
1589
    0, // BREAKC_f32 = 141
1590
    0, // BREAKC_i32 = 142
1591
    0, // BREAK_LOGICALNZ_f32 = 143
1592
    0, // BREAK_LOGICALNZ_i32 = 144
1593
    0, // BREAK_LOGICALZ_f32 = 145
1594
    0, // BREAK_LOGICALZ_i32 = 146
1595
    0, // CONST_COPY = 147
1596
    0, // CONTINUE = 148
1597
    0, // CONTINUEC_f32 = 149
1598
    0, // CONTINUEC_i32 = 150
1599
    0, // CONTINUE_LOGICALNZ_f32 = 151
1600
    0, // CONTINUE_LOGICALNZ_i32 = 152
1601
    0, // CONTINUE_LOGICALZ_f32 = 153
1602
    0, // CONTINUE_LOGICALZ_i32 = 154
1603
    0, // CUBE_eg_pseudo = 155
1604
    0, // CUBE_r600_pseudo = 156
1605
    0, // DEFAULT = 157
1606
    0, // DOT_4 = 158
1607
    0, // DUMMY_CHAIN = 159
1608
    0, // ELSE = 160
1609
    0, // END = 161
1610
    0, // ENDFUNC = 162
1611
    0, // ENDIF = 163
1612
    0, // ENDLOOP = 164
1613
    0, // ENDMAIN = 165
1614
    0, // ENDSWITCH = 166
1615
    0, // FABS_R600 = 167
1616
    0, // FNEG_R600 = 168
1617
    0, // FUNC = 169
1618
    0, // IFC_f32 = 170
1619
    0, // IFC_i32 = 171
1620
    0, // IF_LOGICALNZ_f32 = 172
1621
    0, // IF_LOGICALNZ_i32 = 173
1622
    0, // IF_LOGICALZ_f32 = 174
1623
    0, // IF_LOGICALZ_i32 = 175
1624
    0, // IF_PREDICATE_SET = 176
1625
    0, // JUMP = 177
1626
    0, // JUMP_COND = 178
1627
    0, // MASK_WRITE = 179
1628
    0, // MOV_IMM_F32 = 180
1629
    0, // MOV_IMM_GLOBAL_ADDR = 181
1630
    0, // MOV_IMM_I32 = 182
1631
    0, // PRED_X = 183
1632
    0, // R600_EXTRACT_ELT_V2 = 184
1633
    0, // R600_EXTRACT_ELT_V4 = 185
1634
    0, // R600_INSERT_ELT_V2 = 186
1635
    0, // R600_INSERT_ELT_V4 = 187
1636
    0, // R600_RegisterLoad = 188
1637
    0, // R600_RegisterStore = 189
1638
    0, // RETDYN = 190
1639
    0, // RETURN = 191
1640
    0, // TXD = 192
1641
    0, // TXD_SHADOW = 193
1642
    0, // WHILELOOP = 194
1643
    0, // ADD = 195
1644
    0, // ADDC_UINT = 196
1645
    0, // ADD_INT = 197
1646
    0, // ALU_CLAUSE = 198
1647
    0, // AND_INT = 199
1648
    0, // ASHR_eg = 200
1649
    0, // ASHR_r600 = 201
1650
    0, // BCNT_INT = 202
1651
    0, // BFE_INT_eg = 203
1652
    0, // BFE_UINT_eg = 204
1653
    0, // BFI_INT_eg = 205
1654
    0, // BFM_INT_eg = 206
1655
    0, // BIT_ALIGN_INT_eg = 207
1656
    0, // CEIL = 208
1657
    0, // CF_ALU = 209
1658
    0, // CF_ALU_BREAK = 210
1659
    0, // CF_ALU_CONTINUE = 211
1660
    0, // CF_ALU_ELSE_AFTER = 212
1661
    0, // CF_ALU_POP_AFTER = 213
1662
    0, // CF_ALU_PUSH_BEFORE = 214
1663
    0, // CF_CALL_FS_EG = 215
1664
    0, // CF_CALL_FS_R600 = 216
1665
    0, // CF_CONTINUE_EG = 217
1666
    0, // CF_CONTINUE_R600 = 218
1667
    0, // CF_ELSE_EG = 219
1668
    0, // CF_ELSE_R600 = 220
1669
    0, // CF_END_CM = 221
1670
    0, // CF_END_EG = 222
1671
    0, // CF_END_R600 = 223
1672
    0, // CF_JUMP_EG = 224
1673
    0, // CF_JUMP_R600 = 225
1674
    0, // CF_PUSH_EG = 226
1675
    0, // CF_PUSH_ELSE_R600 = 227
1676
    0, // CF_TC_EG = 228
1677
    0, // CF_TC_R600 = 229
1678
    0, // CF_VC_EG = 230
1679
    0, // CF_VC_R600 = 231
1680
    0, // CNDE_INT = 232
1681
    0, // CNDE_eg = 233
1682
    0, // CNDE_r600 = 234
1683
    0, // CNDGE_INT = 235
1684
    0, // CNDGE_eg = 236
1685
    0, // CNDGE_r600 = 237
1686
    0, // CNDGT_INT = 238
1687
    0, // CNDGT_eg = 239
1688
    0, // CNDGT_r600 = 240
1689
    0, // COS_cm = 241
1690
    0, // COS_eg = 242
1691
    0, // COS_r600 = 243
1692
    0, // COS_r700 = 244
1693
    0, // CUBE_eg_real = 245
1694
    0, // CUBE_r600_real = 246
1695
    0, // DOT4_eg = 247
1696
    0, // DOT4_r600 = 248
1697
    0, // EG_ExportBuf = 249
1698
    0, // EG_ExportSwz = 250
1699
    0, // END_LOOP_EG = 251
1700
    0, // END_LOOP_R600 = 252
1701
    0, // EXP_IEEE_cm = 253
1702
    0, // EXP_IEEE_eg = 254
1703
    0, // EXP_IEEE_r600 = 255
1704
    0, // FETCH_CLAUSE = 256
1705
    0, // FFBH_UINT = 257
1706
    0, // FFBL_INT = 258
1707
    0, // FLOOR = 259
1708
    0, // FLT16_TO_FLT32 = 260
1709
    0, // FLT32_TO_FLT16 = 261
1710
    0, // FLT_TO_INT_eg = 262
1711
    0, // FLT_TO_INT_r600 = 263
1712
    0, // FLT_TO_UINT_eg = 264
1713
    0, // FLT_TO_UINT_r600 = 265
1714
    0, // FMA_eg = 266
1715
    0, // FRACT = 267
1716
    0, // GROUP_BARRIER = 268
1717
    0, // INTERP_LOAD_P0 = 269
1718
    0, // INTERP_PAIR_XY = 270
1719
    0, // INTERP_PAIR_ZW = 271
1720
    0, // INTERP_VEC_LOAD = 272
1721
    0, // INTERP_XY = 273
1722
    0, // INTERP_ZW = 274
1723
    0, // INT_TO_FLT_eg = 275
1724
    0, // INT_TO_FLT_r600 = 276
1725
    0, // KILLGT = 277
1726
    0, // LDS_ADD = 278
1727
    0, // LDS_ADD_RET = 279
1728
    0, // LDS_AND = 280
1729
    0, // LDS_AND_RET = 281
1730
    0, // LDS_BYTE_READ_RET = 282
1731
    0, // LDS_BYTE_WRITE = 283
1732
    0, // LDS_CMPST = 284
1733
    0, // LDS_CMPST_RET = 285
1734
    0, // LDS_MAX_INT = 286
1735
    0, // LDS_MAX_INT_RET = 287
1736
    0, // LDS_MAX_UINT = 288
1737
    0, // LDS_MAX_UINT_RET = 289
1738
    0, // LDS_MIN_INT = 290
1739
    0, // LDS_MIN_INT_RET = 291
1740
    0, // LDS_MIN_UINT = 292
1741
    0, // LDS_MIN_UINT_RET = 293
1742
    0, // LDS_OR = 294
1743
    0, // LDS_OR_RET = 295
1744
    0, // LDS_READ_RET = 296
1745
    0, // LDS_SHORT_READ_RET = 297
1746
    0, // LDS_SHORT_WRITE = 298
1747
    0, // LDS_SUB = 299
1748
    0, // LDS_SUB_RET = 300
1749
    0, // LDS_UBYTE_READ_RET = 301
1750
    0, // LDS_USHORT_READ_RET = 302
1751
    0, // LDS_WRITE = 303
1752
    0, // LDS_WRXCHG = 304
1753
    0, // LDS_WRXCHG_RET = 305
1754
    0, // LDS_XOR = 306
1755
    0, // LDS_XOR_RET = 307
1756
    0, // LITERALS = 308
1757
    0, // LOG_CLAMPED_eg = 309
1758
    0, // LOG_CLAMPED_r600 = 310
1759
    0, // LOG_IEEE_cm = 311
1760
    0, // LOG_IEEE_eg = 312
1761
    0, // LOG_IEEE_r600 = 313
1762
    0, // LOOP_BREAK_EG = 314
1763
    0, // LOOP_BREAK_R600 = 315
1764
    0, // LSHL_eg = 316
1765
    0, // LSHL_r600 = 317
1766
    0, // LSHR_eg = 318
1767
    0, // LSHR_r600 = 319
1768
    0, // MAX = 320
1769
    0, // MAX_DX10 = 321
1770
    0, // MAX_INT = 322
1771
    0, // MAX_UINT = 323
1772
    0, // MIN = 324
1773
    0, // MIN_DX10 = 325
1774
    0, // MIN_INT = 326
1775
    0, // MIN_UINT = 327
1776
    0, // MOV = 328
1777
    0, // MOVA_INT_eg = 329
1778
    0, // MUL = 330
1779
    0, // MULADD_IEEE_eg = 331
1780
    0, // MULADD_IEEE_r600 = 332
1781
    0, // MULADD_INT24_cm = 333
1782
    0, // MULADD_UINT24_eg = 334
1783
    0, // MULADD_eg = 335
1784
    0, // MULADD_r600 = 336
1785
    0, // MULHI_INT_cm = 337
1786
    0, // MULHI_INT_cm24 = 338
1787
    0, // MULHI_INT_eg = 339
1788
    0, // MULHI_INT_r600 = 340
1789
    0, // MULHI_UINT24_eg = 341
1790
    0, // MULHI_UINT_cm = 342
1791
    0, // MULHI_UINT_cm24 = 343
1792
    0, // MULHI_UINT_eg = 344
1793
    0, // MULHI_UINT_r600 = 345
1794
    0, // MULLO_INT_cm = 346
1795
    0, // MULLO_INT_eg = 347
1796
    0, // MULLO_INT_r600 = 348
1797
    0, // MULLO_UINT_cm = 349
1798
    0, // MULLO_UINT_eg = 350
1799
    0, // MULLO_UINT_r600 = 351
1800
    0, // MUL_IEEE = 352
1801
    0, // MUL_INT24_cm = 353
1802
    0, // MUL_LIT_eg = 354
1803
    0, // MUL_LIT_r600 = 355
1804
    0, // MUL_UINT24_eg = 356
1805
    0, // NOT_INT = 357
1806
    0, // OR_INT = 358
1807
    0, // PAD = 359
1808
    0, // POP_EG = 360
1809
    0, // POP_R600 = 361
1810
    0, // PRED_SETE = 362
1811
    0, // PRED_SETE_INT = 363
1812
    0, // PRED_SETGE = 364
1813
    0, // PRED_SETGE_INT = 365
1814
    0, // PRED_SETGT = 366
1815
    0, // PRED_SETGT_INT = 367
1816
    0, // PRED_SETNE = 368
1817
    0, // PRED_SETNE_INT = 369
1818
    0, // R600_ExportBuf = 370
1819
    0, // R600_ExportSwz = 371
1820
    0, // RAT_ATOMIC_ADD_NORET = 372
1821
    0, // RAT_ATOMIC_ADD_RTN = 373
1822
    0, // RAT_ATOMIC_AND_NORET = 374
1823
    0, // RAT_ATOMIC_AND_RTN = 375
1824
    0, // RAT_ATOMIC_CMPXCHG_INT_NORET = 376
1825
    0, // RAT_ATOMIC_CMPXCHG_INT_RTN = 377
1826
    0, // RAT_ATOMIC_DEC_UINT_NORET = 378
1827
    0, // RAT_ATOMIC_DEC_UINT_RTN = 379
1828
    0, // RAT_ATOMIC_INC_UINT_NORET = 380
1829
    0, // RAT_ATOMIC_INC_UINT_RTN = 381
1830
    0, // RAT_ATOMIC_MAX_INT_NORET = 382
1831
    0, // RAT_ATOMIC_MAX_INT_RTN = 383
1832
    0, // RAT_ATOMIC_MAX_UINT_NORET = 384
1833
    0, // RAT_ATOMIC_MAX_UINT_RTN = 385
1834
    0, // RAT_ATOMIC_MIN_INT_NORET = 386
1835
    0, // RAT_ATOMIC_MIN_INT_RTN = 387
1836
    0, // RAT_ATOMIC_MIN_UINT_NORET = 388
1837
    0, // RAT_ATOMIC_MIN_UINT_RTN = 389
1838
    0, // RAT_ATOMIC_OR_NORET = 390
1839
    0, // RAT_ATOMIC_OR_RTN = 391
1840
    0, // RAT_ATOMIC_RSUB_NORET = 392
1841
    0, // RAT_ATOMIC_RSUB_RTN = 393
1842
    0, // RAT_ATOMIC_SUB_NORET = 394
1843
    0, // RAT_ATOMIC_SUB_RTN = 395
1844
    0, // RAT_ATOMIC_XCHG_INT_NORET = 396
1845
    0, // RAT_ATOMIC_XCHG_INT_RTN = 397
1846
    0, // RAT_ATOMIC_XOR_NORET = 398
1847
    0, // RAT_ATOMIC_XOR_RTN = 399
1848
    0, // RAT_MSKOR = 400
1849
    0, // RAT_STORE_DWORD128 = 401
1850
    0, // RAT_STORE_DWORD32 = 402
1851
    0, // RAT_STORE_DWORD64 = 403
1852
    0, // RAT_STORE_TYPED_cm = 404
1853
    0, // RAT_STORE_TYPED_eg = 405
1854
    0, // RAT_WRITE_CACHELESS_128_eg = 406
1855
    0, // RAT_WRITE_CACHELESS_32_eg = 407
1856
    0, // RAT_WRITE_CACHELESS_64_eg = 408
1857
    0, // RECIPSQRT_CLAMPED_cm = 409
1858
    0, // RECIPSQRT_CLAMPED_eg = 410
1859
    0, // RECIPSQRT_CLAMPED_r600 = 411
1860
    0, // RECIPSQRT_IEEE_cm = 412
1861
    0, // RECIPSQRT_IEEE_eg = 413
1862
    0, // RECIPSQRT_IEEE_r600 = 414
1863
    0, // RECIP_CLAMPED_cm = 415
1864
    0, // RECIP_CLAMPED_eg = 416
1865
    0, // RECIP_CLAMPED_r600 = 417
1866
    0, // RECIP_IEEE_cm = 418
1867
    0, // RECIP_IEEE_eg = 419
1868
    0, // RECIP_IEEE_r600 = 420
1869
    0, // RECIP_UINT_eg = 421
1870
    0, // RECIP_UINT_r600 = 422
1871
    0, // RNDNE = 423
1872
    0, // SETE = 424
1873
    0, // SETE_DX10 = 425
1874
    0, // SETE_INT = 426
1875
    0, // SETGE_DX10 = 427
1876
    0, // SETGE_INT = 428
1877
    0, // SETGE_UINT = 429
1878
    0, // SETGT_DX10 = 430
1879
    0, // SETGT_INT = 431
1880
    0, // SETGT_UINT = 432
1881
    0, // SETNE_DX10 = 433
1882
    0, // SETNE_INT = 434
1883
    0, // SGE = 435
1884
    0, // SGT = 436
1885
    0, // SIN_cm = 437
1886
    0, // SIN_eg = 438
1887
    0, // SIN_r600 = 439
1888
    0, // SIN_r700 = 440
1889
    0, // SNE = 441
1890
    0, // SUBB_UINT = 442
1891
    0, // SUB_INT = 443
1892
    0, // TEX_GET_GRADIENTS_H = 444
1893
    0, // TEX_GET_GRADIENTS_V = 445
1894
    0, // TEX_GET_TEXTURE_RESINFO = 446
1895
    0, // TEX_LD = 447
1896
    0, // TEX_LDPTR = 448
1897
    0, // TEX_SAMPLE = 449
1898
    0, // TEX_SAMPLE_C = 450
1899
    0, // TEX_SAMPLE_C_G = 451
1900
    0, // TEX_SAMPLE_C_L = 452
1901
    0, // TEX_SAMPLE_C_LB = 453
1902
    0, // TEX_SAMPLE_G = 454
1903
    0, // TEX_SAMPLE_L = 455
1904
    0, // TEX_SAMPLE_LB = 456
1905
    0, // TEX_SET_GRADIENTS_H = 457
1906
    0, // TEX_SET_GRADIENTS_V = 458
1907
    0, // TEX_VTX_CONSTBUF = 459
1908
    0, // TEX_VTX_TEXBUF = 460
1909
    0, // TRUNC = 461
1910
    0, // UINT_TO_FLT_eg = 462
1911
    0, // UINT_TO_FLT_r600 = 463
1912
    0, // VTX_READ_128_cm = 464
1913
    0, // VTX_READ_128_eg = 465
1914
    0, // VTX_READ_16_cm = 466
1915
    0, // VTX_READ_16_eg = 467
1916
    0, // VTX_READ_32_cm = 468
1917
    0, // VTX_READ_32_eg = 469
1918
    0, // VTX_READ_64_cm = 470
1919
    0, // VTX_READ_64_eg = 471
1920
    0, // VTX_READ_8_cm = 472
1921
    0, // VTX_READ_8_eg = 473
1922
    0, // WHILE_LOOP_EG = 474
1923
    0, // WHILE_LOOP_R600 = 475
1924
    0, // XOR_INT = 476
1925
  };
1926
1927
  assert(Inst.getOpcode() < 477);
1928
  uint64_t MissingFeatures =
1929
      (AvailableFeatures & RequiredFeatures[Inst.getOpcode()]) ^
1930
      RequiredFeatures[Inst.getOpcode()];
1931
  if (MissingFeatures) {
1932
    std::ostringstream Msg;
1933
    Msg << "Attempting to emit " << MCII.getName(Inst.getOpcode()).str()
1934
        << " instruction but the ";
1935
    for (unsigned i = 0; i < 8 * sizeof(MissingFeatures); ++i)
1936
      if (MissingFeatures & (1ULL << i))
1937
        Msg << SubtargetFeatureNames[i] << " ";
1938
    Msg << "predicate(s) are not met";
1939
    report_fatal_error(Msg.str());
1940
  }
1941
#else
1942
// Silence unused variable warning on targets that don't use MCII for other purposes (e.g. BPF).
1943
315
(void)MCII;
1944
315
#endif // NDEBUG
1945
315
}
1946
#endif