Coverage Report

Created: 2018-07-12 09:57

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/clang-build/lib/Target/AMDGPU/R600GenMCCodeEmitter.inc
Line
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/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2
|*                                                                            *|
3
|* Machine Code Emitter                                                       *|
4
|*                                                                            *|
5
|* Automatically generated file, do not edit!                                 *|
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|*                                                                            *|
7
\*===----------------------------------------------------------------------===*/
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uint64_t R600MCCodeEmitter::getBinaryCodeForInstr(const MCInst &MI,
10
    SmallVectorImpl<MCFixup> &Fixups,
11
266
    const MCSubtargetInfo &STI) const {
12
266
  static const uint64_t InstBits[] = {
13
266
    UINT64_C(0),
14
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    UINT64_C(0),
15
266
    UINT64_C(0),
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266
    UINT64_C(0),
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266
    UINT64_C(0),
18
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    UINT64_C(0),
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266
    UINT64_C(0),
20
266
    UINT64_C(0),
21
266
    UINT64_C(0),
22
266
    UINT64_C(0),
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266
    UINT64_C(0),
24
266
    UINT64_C(0),
25
266
    UINT64_C(0),
26
266
    UINT64_C(0),
27
266
    UINT64_C(0),
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266
    UINT64_C(0),
29
266
    UINT64_C(0),
30
266
    UINT64_C(0),
31
266
    UINT64_C(0),
32
266
    UINT64_C(0),
33
266
    UINT64_C(0),
34
266
    UINT64_C(0),
35
266
    UINT64_C(0),
36
266
    UINT64_C(0),
37
266
    UINT64_C(0),
38
266
    UINT64_C(0),
39
266
    UINT64_C(0),
40
266
    UINT64_C(0),
41
266
    UINT64_C(0),
42
266
    UINT64_C(0),
43
266
    UINT64_C(0),
44
266
    UINT64_C(0),
45
266
    UINT64_C(0),
46
266
    UINT64_C(0),
47
266
    UINT64_C(0),
48
266
    UINT64_C(0),
49
266
    UINT64_C(0),
50
266
    UINT64_C(0),
51
266
    UINT64_C(0),
52
266
    UINT64_C(0),
53
266
    UINT64_C(0),
54
266
    UINT64_C(0),
55
266
    UINT64_C(0),
56
266
    UINT64_C(0),
57
266
    UINT64_C(0),
58
266
    UINT64_C(0),
59
266
    UINT64_C(0),
60
266
    UINT64_C(0),
61
266
    UINT64_C(0),
62
266
    UINT64_C(0),
63
266
    UINT64_C(0),
64
266
    UINT64_C(0),
65
266
    UINT64_C(0),
66
266
    UINT64_C(0),
67
266
    UINT64_C(0),
68
266
    UINT64_C(0),
69
266
    UINT64_C(0),
70
266
    UINT64_C(0),
71
266
    UINT64_C(0),
72
266
    UINT64_C(0),
73
266
    UINT64_C(0),
74
266
    UINT64_C(0),
75
266
    UINT64_C(0),
76
266
    UINT64_C(0),
77
266
    UINT64_C(0),
78
266
    UINT64_C(0),
79
266
    UINT64_C(0),
80
266
    UINT64_C(0),
81
266
    UINT64_C(0),
82
266
    UINT64_C(0),
83
266
    UINT64_C(0),
84
266
    UINT64_C(0),
85
266
    UINT64_C(0),
86
266
    UINT64_C(0),
87
266
    UINT64_C(0),
88
266
    UINT64_C(0),
89
266
    UINT64_C(0),
90
266
    UINT64_C(0),
91
266
    UINT64_C(0),
92
266
    UINT64_C(0),
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266
    UINT64_C(0),
94
266
    UINT64_C(0),
95
266
    UINT64_C(0),
96
266
    UINT64_C(0),
97
266
    UINT64_C(0),
98
266
    UINT64_C(0),
99
266
    UINT64_C(0),
100
266
    UINT64_C(0),
101
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    UINT64_C(0),
102
266
    UINT64_C(0),
103
266
    UINT64_C(0),
104
266
    UINT64_C(0),
105
266
    UINT64_C(0),
106
266
    UINT64_C(0),
107
266
    UINT64_C(0),
108
266
    UINT64_C(0),
109
266
    UINT64_C(0),
110
266
    UINT64_C(0),
111
266
    UINT64_C(0),
112
266
    UINT64_C(0),
113
266
    UINT64_C(0),
114
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    UINT64_C(0),
115
266
    UINT64_C(0),
116
266
    UINT64_C(0),
117
266
    UINT64_C(0),
118
266
    UINT64_C(0),
119
266
    UINT64_C(0),
120
266
    UINT64_C(0),
121
266
    UINT64_C(0),
122
266
    UINT64_C(0),
123
266
    UINT64_C(0),
124
266
    UINT64_C(0),
125
266
    UINT64_C(0),
126
266
    UINT64_C(0),
127
266
    UINT64_C(0),
128
266
    UINT64_C(0),
129
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    UINT64_C(0),
130
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    UINT64_C(0),
131
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    UINT64_C(0),
132
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    UINT64_C(0),
133
266
    UINT64_C(0),
134
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    UINT64_C(0),
135
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    UINT64_C(0),
136
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    UINT64_C(0),
137
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    UINT64_C(0),
138
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    UINT64_C(0),
139
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    UINT64_C(0),
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    UINT64_C(0),
141
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    UINT64_C(0),
142
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    UINT64_C(0),
143
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    UINT64_C(0),
144
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    UINT64_C(0),
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    UINT64_C(0),
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    UINT64_C(0),
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    UINT64_C(0),
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    UINT64_C(0),
149
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    UINT64_C(0),
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    UINT64_C(0),
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    UINT64_C(0),
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    UINT64_C(0),
153
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    UINT64_C(0),
154
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    UINT64_C(0),
155
266
    UINT64_C(0),
156
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    UINT64_C(0),
157
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    UINT64_C(0),
158
266
    UINT64_C(0),
159
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    UINT64_C(0),
160
266
    UINT64_C(0),
161
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    UINT64_C(0),
162
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    UINT64_C(0),
163
266
    UINT64_C(0),
164
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    UINT64_C(0),
165
266
    UINT64_C(0),
166
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    UINT64_C(0),
167
266
    UINT64_C(0),
168
266
    UINT64_C(0),
169
266
    UINT64_C(0),
170
266
    UINT64_C(0),
171
266
    UINT64_C(0),
172
266
    UINT64_C(0),
173
266
    UINT64_C(0),
174
266
    UINT64_C(0),
175
266
    UINT64_C(0),
176
266
    UINT64_C(0),
177
266
    UINT64_C(0),
178
266
    UINT64_C(0),
179
266
    UINT64_C(0),
180
266
    UINT64_C(0),
181
266
    UINT64_C(0),
182
266
    UINT64_C(0),
183
266
    UINT64_C(0),
184
266
    UINT64_C(0),
185
266
    UINT64_C(0),
186
266
    UINT64_C(0),
187
266
    UINT64_C(0),
188
266
    UINT64_C(0),
189
266
    UINT64_C(0),
190
266
    UINT64_C(0),
191
266
    UINT64_C(0),
192
266
    UINT64_C(0),
193
266
    UINT64_C(0),
194
266
    UINT64_C(0),
195
266
    UINT64_C(0),
196
266
    UINT64_C(0),  // ADD
197
266
    UINT64_C(45079976738816), // ADDC_UINT
198
266
    UINT64_C(28587302322176), // ADD_INT
199
266
    UINT64_C(0),  // ALU_CLAUSE
200
266
    UINT64_C(26388279066624), // AND_INT
201
266
    UINT64_C(11544872091648), // ASHR_eg
202
266
    UINT64_C(61572651155456), // ASHR_r600
203
266
    UINT64_C(93458488360960), // BCNT_INT
204
266
    UINT64_C(175921860444160),  // BFE_INT_eg
205
266
    UINT64_C(140737488355328),  // BFE_UINT_eg
206
266
    UINT64_C(211106232532992),  // BFI_INT_eg
207
266
    UINT64_C(87960930222080), // BFM_INT_eg
208
266
    UINT64_C(422212465065984),  // BIT_ALIGN_INT_eg
209
266
    UINT64_C(9895604649984),  // CEIL
210
266
    UINT64_C(11529215046068469760), // CF_ALU
211
266
    UINT64_C(13258597302978740224), // CF_ALU_BREAK
212
266
    UINT64_C(12970366926827028480), // CF_ALU_CONTINUE
213
266
    UINT64_C(13546827679130451968), // CF_ALU_ELSE_AFTER
214
266
    UINT64_C(12105675798371893248), // CF_ALU_POP_AFTER
215
266
    UINT64_C(11817445422220181504), // CF_ALU_PUSH_BEFORE
216
266
    UINT64_C(9565645608534933504),  // CF_CALL_FS_EG
217
266
    UINT64_C(9907919180215091200),  // CF_CALL_FS_R600
218
266
    UINT64_C(9367487224930631680),  // CF_CONTINUE_EG
219
266
    UINT64_C(9511602413006487552),  // CF_CONTINUE_R600
220
266
    UINT64_C(9457559217478041600),  // CF_ELSE_EG
221
266
    UINT64_C(9691746398101307392),  // CF_ELSE_R600
222
266
    UINT64_C(9799832789158199296),  // CF_END_CM
223
266
    UINT64_C(9232379236109516800),  // CF_END_EG
224
266
    UINT64_C(9232379236109516800),  // CF_END_R600
225
266
    UINT64_C(9403516021949595648),  // CF_JUMP_EG
226
266
    UINT64_C(9583660007044415488),  // CF_JUMP_R600
227
266
    UINT64_C(9421530420459077632),  // CF_PUSH_EG
228
266
    UINT64_C(9655717601082343424),  // CF_PUSH_ELSE_R600
229
266
    UINT64_C(9241386435364257792),  // CF_TC_EG
230
266
    UINT64_C(9259400833873739776),  // CF_TC_R600
231
266
    UINT64_C(9259400833873739776),  // CF_VC_EG
232
266
    UINT64_C(9295429630892703744),  // CF_VC_R600
233
266
    UINT64_C(985162418487296),  // CNDE_INT
234
266
    UINT64_C(879609302220800),  // CNDE_eg
235
266
    UINT64_C(844424930131968),  // CNDE_r600
236
266
    UINT64_C(1055531162664960), // CNDGE_INT
237
266
    UINT64_C(949978046398464),  // CNDGE_eg
238
266
    UINT64_C(914793674309632),  // CNDGE_r600
239
266
    UINT64_C(1020346790576128), // CNDGT_INT
240
266
    UINT64_C(914793674309632),  // CNDGT_eg
241
266
    UINT64_C(879609302220800),  // CNDGT_r600
242
266
    UINT64_C(78065325572096), // COS_cm
243
266
    UINT64_C(78065325572096), // COS_eg
244
266
    UINT64_C(61022895341568), // COS_r600
245
266
    UINT64_C(61022895341568), // COS_r700
246
266
    UINT64_C(105553116266496),  // CUBE_eg_real
247
266
    UINT64_C(45079976738816), // CUBE_r600_real
248
266
    UINT64_C(104453604638720),  // DOT4_eg
249
266
    UINT64_C(43980465111040), // DOT4_r600
250
266
    UINT64_C(9223372036854775808),  // EG_ExportBuf
251
266
    UINT64_C(9223372040076001280),  // EG_ExportSwz
252
266
    UINT64_C(9313444029402185728),  // END_LOOP_EG
253
266
    UINT64_C(9403516021949595648),  // END_LOOP_R600
254
266
    UINT64_C(70918499991552), // EXP_IEEE_cm
255
266
    UINT64_C(70918499991552), // EXP_IEEE_eg
256
266
    UINT64_C(53326313947136), // EXP_IEEE_r600
257
266
    UINT64_C(0),  // FETCH_CLAUSE
258
266
    UINT64_C(94008244174848), // FFBH_UINT
259
266
    UINT64_C(94557999988736), // FFBL_INT
260
266
    UINT64_C(10995116277760), // FLOOR
261
266
    UINT64_C(89610197663744), // FLT16_TO_FLT32
262
266
    UINT64_C(89060441849856), // FLT32_TO_FLT16
263
266
    UINT64_C(43980465111040), // FLT_TO_INT_eg
264
266
    UINT64_C(58823872086016), // FLT_TO_INT_r600
265
266
    UINT64_C(84662395338752), // FLT_TO_UINT_eg
266
266
    UINT64_C(66520453480448), // FLT_TO_UINT_r600
267
266
    UINT64_C(246290604621824),  // FMA_eg
268
266
    UINT64_C(8796093022208),  // FRACT
269
266
    UINT64_C(46181635850240), // GROUP_BARRIER
270
266
    UINT64_C(123145302310912),  // INTERP_LOAD_P0
271
266
    UINT64_C(4294967295), // INTERP_PAIR_XY
272
266
    UINT64_C(4294967295), // INTERP_PAIR_ZW
273
266
    UINT64_C(4294967295), // INTERP_VEC_LOAD
274
266
    UINT64_C(5747147278385152), // INTERP_XY
275
266
    UINT64_C(5747697034199040), // INTERP_ZW
276
266
    UINT64_C(85212151152640), // INT_TO_FLT_eg
277
266
    UINT64_C(59373627899904), // INT_TO_FLT_r600
278
266
    UINT64_C(24739011624960), // KILLGT
279
266
    UINT64_C(598134325510144),  // LDS_ADD
280
266
    UINT64_C(288828510477221888), // LDS_ADD_RET
281
266
    UINT64_C(81662927618179072),  // LDS_AND
282
266
    UINT64_C(369893303769890816), // LDS_AND_RET
283
266
    UINT64_C(486986894081523712), // LDS_BYTE_READ_RET
284
266
    UINT64_C(162727720910848000), // LDS_BYTE_WRITE
285
266
    UINT64_C(144713322401366016), // LDS_CMPST
286
266
    UINT64_C(432943698553077760), // LDS_CMPST_RET
287
266
    UINT64_C(54641329853956096),  // LDS_MAX_INT
288
266
    UINT64_C(342871706005667840), // LDS_MAX_INT_RET
289
266
    UINT64_C(72655728363438080),  // LDS_MAX_UINT
290
266
    UINT64_C(360886104515149824), // LDS_MAX_UINT_RET
291
266
    UINT64_C(45634130599215104),  // LDS_MIN_INT
292
266
    UINT64_C(333864506750926848), // LDS_MIN_INT_RET
293
266
    UINT64_C(63648529108697088),  // LDS_MIN_UINT
294
266
    UINT64_C(351878905260408832), // LDS_MIN_UINT_RET
295
266
    UINT64_C(90670126872920064),  // LDS_OR
296
266
    UINT64_C(378900503024631808), // LDS_OR_RET
297
266
    UINT64_C(450958097062559744), // LDS_READ_RET
298
266
    UINT64_C(505001292591005696), // LDS_SHORT_READ_RET
299
266
    UINT64_C(171734920165588992), // LDS_SHORT_WRITE
300
266
    UINT64_C(9605333580251136), // LDS_SUB
301
266
    UINT64_C(297835709731962880), // LDS_SUB_RET
302
266
    UINT64_C(495994093336264704), // LDS_UBYTE_READ_RET
303
266
    UINT64_C(514008491845746688), // LDS_USHORT_READ_RET
304
266
    UINT64_C(117691724637143040), // LDS_WRITE
305
266
    UINT64_C(117691724637143040), // LDS_WRXCHG
306
266
    UINT64_C(405922100788854784), // LDS_WRXCHG_RET
307
266
    UINT64_C(99677326127661056),  // LDS_XOR
308
266
    UINT64_C(387907702279372800), // LDS_XOR_RET
309
266
    UINT64_C(0),  // LITERALS
310
266
    UINT64_C(71468255805440), // LOG_CLAMPED_eg
311
266
    UINT64_C(53876069761024), // LOG_CLAMPED_r600
312
266
    UINT64_C(72018011619328), // LOG_IEEE_cm
313
266
    UINT64_C(72018011619328), // LOG_IEEE_eg
314
266
    UINT64_C(54425825574912), // LOG_IEEE_r600
315
266
    UINT64_C(9385501623440113664),  // LOOP_BREAK_EG
316
266
    UINT64_C(9547631210025451520),  // LOOP_BREAK_R600
317
266
    UINT64_C(12644383719424), // LSHL_eg
318
266
    UINT64_C(62672162783232), // LSHL_r600
319
266
    UINT64_C(12094627905536), // LSHR_eg
320
266
    UINT64_C(62122406969344), // LSHR_r600
321
266
    UINT64_C(1649267441664),  // MAX
322
266
    UINT64_C(2748779069440),  // MAX_DX10
323
266
    UINT64_C(29686813949952), // MAX_INT
324
266
    UINT64_C(30786325577728), // MAX_UINT
325
266
    UINT64_C(2199023255552),  // MIN
326
266
    UINT64_C(3298534883328),  // MIN_DX10
327
266
    UINT64_C(30236569763840), // MIN_INT
328
266
    UINT64_C(31336081391616), // MIN_UINT
329
266
    UINT64_C(13743895347200), // MOV
330
266
    UINT64_C(112150186033152),  // MOVA_INT_eg
331
266
    UINT64_C(549755813888), // MUL
332
266
    UINT64_C(844424930131968),  // MULADD_IEEE_eg
333
266
    UINT64_C(703687441776640),  // MULADD_IEEE_r600
334
266
    UINT64_C(281474976710656),  // MULADD_INT24_cm
335
266
    UINT64_C(562949953421312),  // MULADD_UINT24_eg
336
266
    UINT64_C(703687441776640),  // MULADD_eg
337
266
    UINT64_C(562949953421312),  // MULADD_r600
338
266
    UINT64_C(79164837199872), // MULHI_INT_cm
339
266
    UINT64_C(50577534877696), // MULHI_INT_cm24
340
266
    UINT64_C(79164837199872), // MULHI_INT_eg
341
266
    UINT64_C(63771674411008), // MULHI_INT_r600
342
266
    UINT64_C(97856534872064), // MULHI_UINT24_eg
343
266
    UINT64_C(80264348827648), // MULHI_UINT_cm
344
266
    UINT64_C(97856534872064), // MULHI_UINT_cm24
345
266
    UINT64_C(80264348827648), // MULHI_UINT_eg
346
266
    UINT64_C(64871186038784), // MULHI_UINT_r600
347
266
    UINT64_C(78615081385984), // MULLO_INT_cm
348
266
    UINT64_C(78615081385984), // MULLO_INT_eg
349
266
    UINT64_C(63221918597120), // MULLO_INT_r600
350
266
    UINT64_C(79714593013760), // MULLO_UINT_cm
351
266
    UINT64_C(79714593013760), // MULLO_UINT_eg
352
266
    UINT64_C(64321430224896), // MULLO_UINT_r600
353
266
    UINT64_C(1099511627776),  // MUL_IEEE
354
266
    UINT64_C(50027779063808), // MUL_INT24_cm
355
266
    UINT64_C(1090715534753792), // MUL_LIT_eg
356
266
    UINT64_C(422212465065984),  // MUL_LIT_r600
357
266
    UINT64_C(99505802313728), // MUL_UINT24_eg
358
266
    UINT64_C(28037546508288), // NOT_INT
359
266
    UINT64_C(26938034880512), // OR_INT
360
266
    UINT64_C(0),  // PAD
361
266
    UINT64_C(9475573615987523584),  // POP_EG
362
266
    UINT64_C(9727775195120271360),  // POP_R600
363
266
    UINT64_C(17592186044416), // PRED_SETE
364
266
    UINT64_C(36283883716608), // PRED_SETE_INT
365
266
    UINT64_C(18691697672192), // PRED_SETGE
366
266
    UINT64_C(37383395344384), // PRED_SETGE_INT
367
266
    UINT64_C(18141941858304), // PRED_SETGT
368
266
    UINT64_C(36833639530496), // PRED_SETGT_INT
369
266
    UINT64_C(19241453486080), // PRED_SETNE
370
266
    UINT64_C(37933151158272), // PRED_SETNE_INT
371
266
    UINT64_C(9223372036854775808),  // R600_ExportBuf
372
266
    UINT64_C(9223372040076001280),  // R600_ExportSwz
373
266
    UINT64_C(10772874191460901488), // RAT_ATOMIC_ADD_NORET
374
266
    UINT64_C(10772874191460900976), // RAT_ATOMIC_ADD_RTN
375
266
    UINT64_C(10772874191460901600), // RAT_ATOMIC_AND_NORET
376
266
    UINT64_C(10772874191460901088), // RAT_ATOMIC_AND_RTN
377
266
    UINT64_C(10772874191460901440), // RAT_ATOMIC_CMPXCHG_INT_NORET
378
266
    UINT64_C(10772874191460900928), // RAT_ATOMIC_CMPXCHG_INT_RTN
379
266
    UINT64_C(10772874191460901680), // RAT_ATOMIC_DEC_UINT_NORET
380
266
    UINT64_C(10772874191460901168), // RAT_ATOMIC_DEC_UINT_RTN
381
266
    UINT64_C(10772874191460901664), // RAT_ATOMIC_INC_UINT_NORET
382
266
    UINT64_C(10772874191460901152), // RAT_ATOMIC_INC_UINT_RTN
383
266
    UINT64_C(10772874191460901568), // RAT_ATOMIC_MAX_INT_NORET
384
266
    UINT64_C(10772874191460901056), // RAT_ATOMIC_MAX_INT_RTN
385
266
    UINT64_C(10772874191460901584), // RAT_ATOMIC_MAX_UINT_NORET
386
266
    UINT64_C(10772874191460901072), // RAT_ATOMIC_MAX_UINT_RTN
387
266
    UINT64_C(10772874191460901536), // RAT_ATOMIC_MIN_INT_NORET
388
266
    UINT64_C(10772874191460901024), // RAT_ATOMIC_MIN_INT_RTN
389
266
    UINT64_C(10772874191460901552), // RAT_ATOMIC_MIN_UINT_NORET
390
266
    UINT64_C(10772874191460901040), // RAT_ATOMIC_MIN_UINT_RTN
391
266
    UINT64_C(10772874191460901616), // RAT_ATOMIC_OR_NORET
392
266
    UINT64_C(10772874191460901104), // RAT_ATOMIC_OR_RTN
393
266
    UINT64_C(10772874191460901520), // RAT_ATOMIC_RSUB_NORET
394
266
    UINT64_C(10772874191460901008), // RAT_ATOMIC_RSUB_RTN
395
266
    UINT64_C(10772874191460901504), // RAT_ATOMIC_SUB_NORET
396
266
    UINT64_C(10772874191460900992), // RAT_ATOMIC_SUB_RTN
397
266
    UINT64_C(10772874191460901408), // RAT_ATOMIC_XCHG_INT_NORET
398
266
    UINT64_C(10772874191460900880), // RAT_ATOMIC_XCHG_INT_RTN
399
266
    UINT64_C(10772874191460901632), // RAT_ATOMIC_XOR_NORET
400
266
    UINT64_C(10772874191460901120), // RAT_ATOMIC_XOR_RTN
401
266
    UINT64_C(10772874191460901136), // RAT_MSKOR
402
266
    UINT64_C(10790888589970383168), // RAT_STORE_DWORD128
403
266
    UINT64_C(10790642299365761344), // RAT_STORE_DWORD32
404
266
    UINT64_C(10790677483737850176), // RAT_STORE_DWORD64
405
266
    UINT64_C(10772874191460900880), // RAT_STORE_TYPED_cm
406
266
    UINT64_C(10772874191460900880), // RAT_STORE_TYPED_eg
407
266
    UINT64_C(10790888589970382880), // RAT_WRITE_CACHELESS_128_eg
408
266
    UINT64_C(10790642299365761056), // RAT_WRITE_CACHELESS_32_eg
409
266
    UINT64_C(10790677483737849888), // RAT_WRITE_CACHELESS_64_eg
410
266
    UINT64_C(74217034874880), // RECIPSQRT_CLAMPED_cm
411
266
    UINT64_C(74217034874880), // RECIPSQRT_CLAMPED_eg
412
266
    UINT64_C(56624848830464), // RECIPSQRT_CLAMPED_r600
413
266
    UINT64_C(75316546502656), // RECIPSQRT_IEEE_cm
414
266
    UINT64_C(75316546502656), // RECIPSQRT_IEEE_eg
415
266
    UINT64_C(57724360458240), // RECIPSQRT_IEEE_r600
416
266
    UINT64_C(72567767433216), // RECIP_CLAMPED_cm
417
266
    UINT64_C(72567767433216), // RECIP_CLAMPED_eg
418
266
    UINT64_C(54975581388800), // RECIP_CLAMPED_r600
419
266
    UINT64_C(73667279060992), // RECIP_IEEE_cm
420
266
    UINT64_C(73667279060992), // RECIP_IEEE_eg
421
266
    UINT64_C(56075093016576), // RECIP_IEEE_r600
422
266
    UINT64_C(81363860455424), // RECIP_UINT_eg
423
266
    UINT64_C(65970697666560), // RECIP_UINT_r600
424
266
    UINT64_C(10445360463872), // RNDNE
425
266
    UINT64_C(4398046511104),  // SETE
426
266
    UINT64_C(6597069766656),  // SETE_DX10
427
266
    UINT64_C(31885837205504), // SETE_INT
428
266
    UINT64_C(7696581394432),  // SETGE_DX10
429
266
    UINT64_C(32985348833280), // SETGE_INT
430
266
    UINT64_C(34634616274944), // SETGE_UINT
431
266
    UINT64_C(7146825580544),  // SETGT_DX10
432
266
    UINT64_C(32435593019392), // SETGT_INT
433
266
    UINT64_C(34084860461056), // SETGT_UINT
434
266
    UINT64_C(8246337208320),  // SETNE_DX10
435
266
    UINT64_C(33535104647168), // SETNE_INT
436
266
    UINT64_C(5497558138880),  // SGE
437
266
    UINT64_C(4947802324992),  // SGT
438
266
    UINT64_C(77515569758208), // SIN_cm
439
266
    UINT64_C(77515569758208), // SIN_eg
440
266
    UINT64_C(60473139527680), // SIN_r600
441
266
    UINT64_C(60473139527680), // SIN_r700
442
266
    UINT64_C(6047313952768),  // SNE
443
266
    UINT64_C(45629732552704), // SUBB_UINT
444
266
    UINT64_C(29137058136064), // SUB_INT
445
266
    UINT64_C(7),  // TEX_GET_GRADIENTS_H
446
266
    UINT64_C(8),  // TEX_GET_GRADIENTS_V
447
266
    UINT64_C(4),  // TEX_GET_TEXTURE_RESINFO
448
266
    UINT64_C(3),  // TEX_LD
449
266
    UINT64_C(35), // TEX_LDPTR
450
266
    UINT64_C(16), // TEX_SAMPLE
451
266
    UINT64_C(24), // TEX_SAMPLE_C
452
266
    UINT64_C(28), // TEX_SAMPLE_C_G
453
266
    UINT64_C(25), // TEX_SAMPLE_C_L
454
266
    UINT64_C(26), // TEX_SAMPLE_C_LB
455
266
    UINT64_C(20), // TEX_SAMPLE_G
456
266
    UINT64_C(17), // TEX_SAMPLE_L
457
266
    UINT64_C(18), // TEX_SAMPLE_LB
458
266
    UINT64_C(11), // TEX_SET_GRADIENTS_H
459
266
    UINT64_C(12), // TEX_SET_GRADIENTS_V
460
266
    UINT64_C(16775081780284751936), // TEX_VTX_CONSTBUF
461
266
    UINT64_C(9236056004066541632),  // TEX_VTX_TEXBUF
462
266
    UINT64_C(9345848836096),  // TRUNC
463
266
    UINT64_C(85761906966528), // UINT_TO_FLT_eg
464
266
    UINT64_C(59923383713792), // UINT_TO_FLT_r600
465
266
    UINT64_C(1769087820812517440),  // VTX_READ_128_cm
466
266
    UINT64_C(1769087821886259264),  // VTX_READ_128_eg
467
266
    UINT64_C(1251983104222953536),  // VTX_READ_16_cm
468
266
    UINT64_C(1251983104357171264),  // VTX_READ_16_eg
469
266
    UINT64_C(1396098292298809408),  // VTX_READ_32_cm
470
266
    UINT64_C(1396098292567244864),  // VTX_READ_32_eg
471
266
    UINT64_C(1684223115334254656),  // VTX_READ_64_cm
472
266
    UINT64_C(1684223115871125568),  // VTX_READ_64_eg
473
266
    UINT64_C(1179925510185025600),  // VTX_READ_8_cm
474
266
    UINT64_C(1179925510252134464),  // VTX_READ_8_eg
475
266
    UINT64_C(9331458427911667712),  // WHILE_LOOP_EG
476
266
    UINT64_C(9439544818968559616),  // WHILE_LOOP_R600
477
266
    UINT64_C(27487790694400), // XOR_INT
478
266
    UINT64_C(0)
479
266
  };
480
266
  const unsigned opcode = MI.getOpcode();
481
266
  uint64_t Value = InstBits[opcode];
482
266
  uint64_t op = 0;
483
266
  (void)op;  // suppress warning
484
266
  switch (opcode) {
485
266
    case R600::CF_CALL_FS_EG:
486
81
    case R600::CF_CALL_FS_R600:
487
81
    case R600::CF_END_CM:
488
81
    case R600::CF_END_EG:
489
81
    case R600::CF_END_R600:
490
81
    case R600::GROUP_BARRIER:
491
81
    case R600::INTERP_PAIR_XY:
492
81
    case R600::INTERP_PAIR_ZW:
493
81
    case R600::INTERP_VEC_LOAD:
494
81
    case R600::PAD: {
495
81
      break;
496
81
    }
497
81
    case R600::CF_CONTINUE_EG:
498
0
    case R600::END_LOOP_EG:
499
0
    case R600::LOOP_BREAK_EG:
500
0
    case R600::WHILE_LOOP_EG: {
501
0
      // op: ADDR
502
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
503
0
      Value |= op & UINT64_C(16777215);
504
0
      break;
505
0
    }
506
14
    case R600::CF_TC_EG:
507
14
    case R600::CF_VC_EG: {
508
14
      // op: ADDR
509
14
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
510
14
      Value |= op & UINT64_C(16777215);
511
14
      // op: COUNT
512
14
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
513
14
      Value |= (op & UINT64_C(63)) << 42;
514
14
      break;
515
14
    }
516
14
    case R600::CF_ELSE_EG:
517
0
    case R600::CF_JUMP_EG:
518
0
    case R600::CF_PUSH_EG:
519
0
    case R600::POP_EG: {
520
0
      // op: ADDR
521
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
522
0
      Value |= op & UINT64_C(16777215);
523
0
      // op: POP_COUNT
524
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
525
0
      Value |= (op & UINT64_C(7)) << 32;
526
0
      break;
527
0
    }
528
32
    case R600::CF_ALU:
529
32
    case R600::CF_ALU_BREAK:
530
32
    case R600::CF_ALU_CONTINUE:
531
32
    case R600::CF_ALU_ELSE_AFTER:
532
32
    case R600::CF_ALU_POP_AFTER:
533
32
    case R600::CF_ALU_PUSH_BEFORE: {
534
32
      // op: ADDR
535
32
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
536
32
      Value |= op & UINT64_C(4194303);
537
32
      // op: KCACHE_BANK0
538
32
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
539
32
      Value |= (op & UINT64_C(15)) << 22;
540
32
      // op: KCACHE_BANK1
541
32
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
542
32
      Value |= (op & UINT64_C(15)) << 26;
543
32
      // op: KCACHE_MODE0
544
32
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
545
32
      Value |= (op & UINT64_C(3)) << 30;
546
32
      // op: KCACHE_MODE1
547
32
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
548
32
      Value |= (op & UINT64_C(3)) << 32;
549
32
      // op: KCACHE_ADDR0
550
32
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
551
32
      Value |= (op & UINT64_C(255)) << 34;
552
32
      // op: KCACHE_ADDR1
553
32
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
554
32
      Value |= (op & UINT64_C(255)) << 42;
555
32
      // op: COUNT
556
32
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
557
32
      Value |= (op & UINT64_C(127)) << 50;
558
32
      break;
559
32
    }
560
32
    case R600::CF_CONTINUE_R600:
561
0
    case R600::CF_PUSH_ELSE_R600:
562
0
    case R600::END_LOOP_R600:
563
0
    case R600::LOOP_BREAK_R600:
564
0
    case R600::WHILE_LOOP_R600: {
565
0
      // op: ADDR
566
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
567
0
      Value |= op & UINT64_C(4294967295);
568
0
      break;
569
0
    }
570
1
    case R600::CF_TC_R600:
571
1
    case R600::CF_VC_R600: {
572
1
      // op: ADDR
573
1
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
574
1
      Value |= op & UINT64_C(4294967295);
575
1
      // op: CNT
576
1
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
577
1
      Value |= (op & UINT64_C(8)) << 48;
578
1
      Value |= (op & UINT64_C(7)) << 42;
579
1
      break;
580
1
    }
581
1
    case R600::CF_ELSE_R600:
582
0
    case R600::CF_JUMP_R600:
583
0
    case R600::POP_R600: {
584
0
      // op: ADDR
585
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
586
0
      Value |= op & UINT64_C(4294967295);
587
0
      // op: POP_COUNT
588
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
589
0
      Value |= (op & UINT64_C(7)) << 32;
590
0
      break;
591
0
    }
592
10
    case R600::TEX_GET_GRADIENTS_H:
593
10
    case R600::TEX_GET_GRADIENTS_V:
594
10
    case R600::TEX_GET_TEXTURE_RESINFO:
595
10
    case R600::TEX_LD:
596
10
    case R600::TEX_LDPTR:
597
10
    case R600::TEX_SAMPLE:
598
10
    case R600::TEX_SAMPLE_C:
599
10
    case R600::TEX_SAMPLE_C_G:
600
10
    case R600::TEX_SAMPLE_C_L:
601
10
    case R600::TEX_SAMPLE_C_LB:
602
10
    case R600::TEX_SAMPLE_G:
603
10
    case R600::TEX_SAMPLE_L:
604
10
    case R600::TEX_SAMPLE_LB:
605
10
    case R600::TEX_SET_GRADIENTS_H:
606
10
    case R600::TEX_SET_GRADIENTS_V: {
607
10
      // op: RESOURCE_ID
608
10
      op = getMachineOpValue(MI, MI.getOperand(13), Fixups, STI);
609
10
      Value |= (op & UINT64_C(255)) << 8;
610
10
      // op: SRC_GPR
611
10
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
612
10
      Value |= (op & UINT64_C(127)) << 16;
613
10
      // op: DST_GPR
614
10
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
615
10
      Value |= (op & UINT64_C(127)) << 32;
616
10
      // op: DST_SEL_X
617
10
      op = getMachineOpValue(MI, MI.getOperand(9), Fixups, STI);
618
10
      Value |= (op & UINT64_C(7)) << 41;
619
10
      // op: DST_SEL_Y
620
10
      op = getMachineOpValue(MI, MI.getOperand(10), Fixups, STI);
621
10
      Value |= (op & UINT64_C(7)) << 44;
622
10
      // op: DST_SEL_Z
623
10
      op = getMachineOpValue(MI, MI.getOperand(11), Fixups, STI);
624
10
      Value |= (op & UINT64_C(7)) << 47;
625
10
      // op: DST_SEL_W
626
10
      op = getMachineOpValue(MI, MI.getOperand(12), Fixups, STI);
627
10
      Value |= (op & UINT64_C(7)) << 50;
628
10
      // op: COORD_TYPE_X
629
10
      op = getMachineOpValue(MI, MI.getOperand(15), Fixups, STI);
630
10
      Value |= (op & UINT64_C(1)) << 60;
631
10
      // op: COORD_TYPE_Y
632
10
      op = getMachineOpValue(MI, MI.getOperand(16), Fixups, STI);
633
10
      Value |= (op & UINT64_C(1)) << 61;
634
10
      // op: COORD_TYPE_Z
635
10
      op = getMachineOpValue(MI, MI.getOperand(17), Fixups, STI);
636
10
      Value |= (op & UINT64_C(1)) << 62;
637
10
      // op: COORD_TYPE_W
638
10
      op = getMachineOpValue(MI, MI.getOperand(18), Fixups, STI);
639
10
      Value |= (op & UINT64_C(1)) << 63;
640
10
      break;
641
10
    }
642
10
    case R600::EG_ExportBuf: {
643
0
      // op: arraybase
644
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
645
0
      Value |= op & UINT64_C(8191);
646
0
      // op: type
647
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
648
0
      Value |= (op & UINT64_C(3)) << 13;
649
0
      // op: gpr
650
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
651
0
      Value |= (op & UINT64_C(127)) << 15;
652
0
      // op: arraySize
653
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
654
0
      Value |= (op & UINT64_C(4095)) << 32;
655
0
      // op: compMask
656
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
657
0
      Value |= (op & UINT64_C(15)) << 44;
658
0
      // op: eop
659
0
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
660
0
      Value |= (op & UINT64_C(1)) << 53;
661
0
      // op: inst
662
0
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
663
0
      Value |= (op & UINT64_C(255)) << 54;
664
0
      break;
665
10
    }
666
10
    case R600::R600_ExportBuf: {
667
0
      // op: arraybase
668
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
669
0
      Value |= op & UINT64_C(8191);
670
0
      // op: type
671
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
672
0
      Value |= (op & UINT64_C(3)) << 13;
673
0
      // op: gpr
674
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
675
0
      Value |= (op & UINT64_C(127)) << 15;
676
0
      // op: arraySize
677
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
678
0
      Value |= (op & UINT64_C(4095)) << 32;
679
0
      // op: compMask
680
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
681
0
      Value |= (op & UINT64_C(15)) << 44;
682
0
      // op: eop
683
0
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
684
0
      Value |= (op & UINT64_C(1)) << 53;
685
0
      // op: inst
686
0
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
687
0
      Value |= (op & UINT64_C(255)) << 55;
688
0
      break;
689
10
    }
690
10
    case R600::EG_ExportSwz: {
691
1
      // op: arraybase
692
1
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
693
1
      Value |= op & UINT64_C(8191);
694
1
      // op: type
695
1
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
696
1
      Value |= (op & UINT64_C(3)) << 13;
697
1
      // op: gpr
698
1
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
699
1
      Value |= (op & UINT64_C(127)) << 15;
700
1
      // op: sw_x
701
1
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
702
1
      Value |= (op & UINT64_C(7)) << 32;
703
1
      // op: sw_y
704
1
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
705
1
      Value |= (op & UINT64_C(7)) << 35;
706
1
      // op: sw_z
707
1
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
708
1
      Value |= (op & UINT64_C(7)) << 38;
709
1
      // op: sw_w
710
1
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
711
1
      Value |= (op & UINT64_C(7)) << 41;
712
1
      // op: eop
713
1
      op = getMachineOpValue(MI, MI.getOperand(8), Fixups, STI);
714
1
      Value |= (op & UINT64_C(1)) << 53;
715
1
      // op: inst
716
1
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
717
1
      Value |= (op & UINT64_C(255)) << 54;
718
1
      break;
719
10
    }
720
10
    case R600::R600_ExportSwz: {
721
2
      // op: arraybase
722
2
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
723
2
      Value |= op & UINT64_C(8191);
724
2
      // op: type
725
2
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
726
2
      Value |= (op & UINT64_C(3)) << 13;
727
2
      // op: gpr
728
2
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
729
2
      Value |= (op & UINT64_C(127)) << 15;
730
2
      // op: sw_x
731
2
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
732
2
      Value |= (op & UINT64_C(7)) << 32;
733
2
      // op: sw_y
734
2
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
735
2
      Value |= (op & UINT64_C(7)) << 35;
736
2
      // op: sw_z
737
2
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
738
2
      Value |= (op & UINT64_C(7)) << 38;
739
2
      // op: sw_w
740
2
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
741
2
      Value |= (op & UINT64_C(7)) << 41;
742
2
      // op: eop
743
2
      op = getMachineOpValue(MI, MI.getOperand(8), Fixups, STI);
744
2
      Value |= (op & UINT64_C(1)) << 53;
745
2
      // op: inst
746
2
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
747
2
      Value |= (op & UINT64_C(255)) << 55;
748
2
      break;
749
10
    }
750
10
    case R600::TEX_VTX_CONSTBUF:
751
0
    case R600::TEX_VTX_TEXBUF: {
752
0
      // op: dst_gpr
753
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
754
0
      Value |= (op & UINT64_C(127)) << 32;
755
0
      // op: src_gpr
756
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
757
0
      Value |= (op & UINT64_C(127)) << 16;
758
0
      // op: buffer_id
759
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
760
0
      Value |= (op & UINT64_C(255)) << 8;
761
0
      break;
762
0
    }
763
24
    case R600::LITERALS: {
764
24
      // op: literal1
765
24
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
766
24
      Value |= op & UINT64_C(4294967295);
767
24
      // op: literal2
768
24
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
769
24
      Value |= (op & UINT64_C(4294967295)) << 32;
770
24
      break;
771
0
    }
772
0
    case R600::ALU_CLAUSE:
773
0
    case R600::FETCH_CLAUSE: {
774
0
      // op: num
775
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
776
0
      Value |= op & UINT64_C(255);
777
0
      break;
778
0
    }
779
0
    case R600::RAT_STORE_TYPED_cm: {
780
0
      // op: rat_id
781
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
782
0
      Value |= op & UINT64_C(15);
783
0
      // op: rw_gpr
784
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
785
0
      Value |= (op & UINT64_C(127)) << 15;
786
0
      // op: index_gpr
787
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
788
0
      Value |= (op & UINT64_C(127)) << 23;
789
0
      break;
790
0
    }
791
0
    case R600::RAT_STORE_TYPED_eg: {
792
0
      // op: rat_id
793
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
794
0
      Value |= op & UINT64_C(15);
795
0
      // op: rw_gpr
796
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
797
0
      Value |= (op & UINT64_C(127)) << 15;
798
0
      // op: index_gpr
799
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
800
0
      Value |= (op & UINT64_C(127)) << 23;
801
0
      // op: eop
802
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
803
0
      Value |= (op & UINT64_C(1)) << 53;
804
0
      break;
805
0
    }
806
4
    case R600::RAT_MSKOR:
807
4
    case R600::RAT_STORE_DWORD128:
808
4
    case R600::RAT_STORE_DWORD32:
809
4
    case R600::RAT_STORE_DWORD64: {
810
4
      // op: rw_gpr
811
4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
812
4
      Value |= (op & UINT64_C(127)) << 15;
813
4
      // op: index_gpr
814
4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
815
4
      Value |= (op & UINT64_C(127)) << 23;
816
4
      break;
817
4
    }
818
11
    case R600::RAT_WRITE_CACHELESS_128_eg:
819
11
    case R600::RAT_WRITE_CACHELESS_32_eg:
820
11
    case R600::RAT_WRITE_CACHELESS_64_eg: {
821
11
      // op: rw_gpr
822
11
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
823
11
      Value |= (op & UINT64_C(127)) << 15;
824
11
      // op: index_gpr
825
11
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
826
11
      Value |= (op & UINT64_C(127)) << 23;
827
11
      // op: eop
828
11
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
829
11
      Value |= (op & UINT64_C(1)) << 53;
830
11
      break;
831
11
    }
832
11
    case R600::RAT_ATOMIC_ADD_NORET:
833
0
    case R600::RAT_ATOMIC_ADD_RTN:
834
0
    case R600::RAT_ATOMIC_AND_NORET:
835
0
    case R600::RAT_ATOMIC_AND_RTN:
836
0
    case R600::RAT_ATOMIC_CMPXCHG_INT_NORET:
837
0
    case R600::RAT_ATOMIC_CMPXCHG_INT_RTN:
838
0
    case R600::RAT_ATOMIC_DEC_UINT_NORET:
839
0
    case R600::RAT_ATOMIC_DEC_UINT_RTN:
840
0
    case R600::RAT_ATOMIC_INC_UINT_NORET:
841
0
    case R600::RAT_ATOMIC_INC_UINT_RTN:
842
0
    case R600::RAT_ATOMIC_MAX_INT_NORET:
843
0
    case R600::RAT_ATOMIC_MAX_INT_RTN:
844
0
    case R600::RAT_ATOMIC_MAX_UINT_NORET:
845
0
    case R600::RAT_ATOMIC_MAX_UINT_RTN:
846
0
    case R600::RAT_ATOMIC_MIN_INT_NORET:
847
0
    case R600::RAT_ATOMIC_MIN_INT_RTN:
848
0
    case R600::RAT_ATOMIC_MIN_UINT_NORET:
849
0
    case R600::RAT_ATOMIC_MIN_UINT_RTN:
850
0
    case R600::RAT_ATOMIC_OR_NORET:
851
0
    case R600::RAT_ATOMIC_OR_RTN:
852
0
    case R600::RAT_ATOMIC_RSUB_NORET:
853
0
    case R600::RAT_ATOMIC_RSUB_RTN:
854
0
    case R600::RAT_ATOMIC_SUB_NORET:
855
0
    case R600::RAT_ATOMIC_SUB_RTN:
856
0
    case R600::RAT_ATOMIC_XCHG_INT_NORET:
857
0
    case R600::RAT_ATOMIC_XCHG_INT_RTN:
858
0
    case R600::RAT_ATOMIC_XOR_NORET:
859
0
    case R600::RAT_ATOMIC_XOR_RTN: {
860
0
      // op: rw_gpr
861
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
862
0
      Value |= (op & UINT64_C(127)) << 15;
863
0
      // op: index_gpr
864
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
865
0
      Value |= (op & UINT64_C(127)) << 23;
866
0
      break;
867
0
    }
868
0
    case R600::LDS_CMPST: {
869
0
      // op: src0
870
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
871
0
      Value |= (op & UINT64_C(1536)) << 1;
872
0
      Value |= op & UINT64_C(511);
873
0
      // op: src0_rel
874
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
875
0
      Value |= (op & UINT64_C(1)) << 9;
876
0
      // op: src1
877
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
878
0
      Value |= (op & UINT64_C(1536)) << 14;
879
0
      Value |= (op & UINT64_C(511)) << 13;
880
0
      // op: src1_rel
881
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
882
0
      Value |= (op & UINT64_C(1)) << 22;
883
0
      // op: pred_sel
884
0
      op = getMachineOpValue(MI, MI.getOperand(10), Fixups, STI);
885
0
      Value |= (op & UINT64_C(3)) << 29;
886
0
      // op: last
887
0
      op = getMachineOpValue(MI, MI.getOperand(9), Fixups, STI);
888
0
      Value |= (op & UINT64_C(1)) << 31;
889
0
      // op: src2
890
0
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
891
0
      Value |= (op & UINT64_C(1536)) << 33;
892
0
      Value |= (op & UINT64_C(511)) << 32;
893
0
      // op: src2_rel
894
0
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
895
0
      Value |= (op & UINT64_C(1)) << 41;
896
0
      // op: bank_swizzle
897
0
      op = getMachineOpValue(MI, MI.getOperand(11), Fixups, STI);
898
0
      Value |= (op & UINT64_C(7)) << 50;
899
0
      break;
900
0
    }
901
0
    case R600::LDS_ADD:
902
0
    case R600::LDS_AND:
903
0
    case R600::LDS_BYTE_WRITE:
904
0
    case R600::LDS_MAX_INT:
905
0
    case R600::LDS_MAX_UINT:
906
0
    case R600::LDS_MIN_INT:
907
0
    case R600::LDS_MIN_UINT:
908
0
    case R600::LDS_OR:
909
0
    case R600::LDS_SHORT_WRITE:
910
0
    case R600::LDS_SUB:
911
0
    case R600::LDS_WRITE:
912
0
    case R600::LDS_WRXCHG:
913
0
    case R600::LDS_XOR: {
914
0
      // op: src0
915
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
916
0
      Value |= (op & UINT64_C(1536)) << 1;
917
0
      Value |= op & UINT64_C(511);
918
0
      // op: src0_rel
919
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
920
0
      Value |= (op & UINT64_C(1)) << 9;
921
0
      // op: src1
922
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
923
0
      Value |= (op & UINT64_C(1536)) << 14;
924
0
      Value |= (op & UINT64_C(511)) << 13;
925
0
      // op: src1_rel
926
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
927
0
      Value |= (op & UINT64_C(1)) << 22;
928
0
      // op: pred_sel
929
0
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
930
0
      Value |= (op & UINT64_C(3)) << 29;
931
0
      // op: last
932
0
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
933
0
      Value |= (op & UINT64_C(1)) << 31;
934
0
      // op: bank_swizzle
935
0
      op = getMachineOpValue(MI, MI.getOperand(8), Fixups, STI);
936
0
      Value |= (op & UINT64_C(7)) << 50;
937
0
      break;
938
0
    }
939
0
    case R600::LDS_BYTE_READ_RET:
940
0
    case R600::LDS_READ_RET:
941
0
    case R600::LDS_SHORT_READ_RET:
942
0
    case R600::LDS_UBYTE_READ_RET:
943
0
    case R600::LDS_USHORT_READ_RET: {
944
0
      // op: src0
945
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
946
0
      Value |= (op & UINT64_C(1536)) << 1;
947
0
      Value |= op & UINT64_C(511);
948
0
      // op: src0_rel
949
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
950
0
      Value |= (op & UINT64_C(1)) << 9;
951
0
      // op: pred_sel
952
0
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
953
0
      Value |= (op & UINT64_C(3)) << 29;
954
0
      // op: last
955
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
956
0
      Value |= (op & UINT64_C(1)) << 31;
957
0
      // op: bank_swizzle
958
0
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
959
0
      Value |= (op & UINT64_C(7)) << 50;
960
0
      break;
961
0
    }
962
0
    case R600::LDS_CMPST_RET: {
963
0
      // op: src0
964
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
965
0
      Value |= (op & UINT64_C(1536)) << 1;
966
0
      Value |= op & UINT64_C(511);
967
0
      // op: src0_rel
968
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
969
0
      Value |= (op & UINT64_C(1)) << 9;
970
0
      // op: src1
971
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
972
0
      Value |= (op & UINT64_C(1536)) << 14;
973
0
      Value |= (op & UINT64_C(511)) << 13;
974
0
      // op: src1_rel
975
0
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
976
0
      Value |= (op & UINT64_C(1)) << 22;
977
0
      // op: pred_sel
978
0
      op = getMachineOpValue(MI, MI.getOperand(11), Fixups, STI);
979
0
      Value |= (op & UINT64_C(3)) << 29;
980
0
      // op: last
981
0
      op = getMachineOpValue(MI, MI.getOperand(10), Fixups, STI);
982
0
      Value |= (op & UINT64_C(1)) << 31;
983
0
      // op: src2
984
0
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
985
0
      Value |= (op & UINT64_C(1536)) << 33;
986
0
      Value |= (op & UINT64_C(511)) << 32;
987
0
      // op: src2_rel
988
0
      op = getMachineOpValue(MI, MI.getOperand(8), Fixups, STI);
989
0
      Value |= (op & UINT64_C(1)) << 41;
990
0
      // op: bank_swizzle
991
0
      op = getMachineOpValue(MI, MI.getOperand(12), Fixups, STI);
992
0
      Value |= (op & UINT64_C(7)) << 50;
993
0
      break;
994
0
    }
995
0
    case R600::LDS_ADD_RET:
996
0
    case R600::LDS_AND_RET:
997
0
    case R600::LDS_MAX_INT_RET:
998
0
    case R600::LDS_MAX_UINT_RET:
999
0
    case R600::LDS_MIN_INT_RET:
1000
0
    case R600::LDS_MIN_UINT_RET:
1001
0
    case R600::LDS_OR_RET:
1002
0
    case R600::LDS_SUB_RET:
1003
0
    case R600::LDS_WRXCHG_RET:
1004
0
    case R600::LDS_XOR_RET: {
1005
0
      // op: src0
1006
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
1007
0
      Value |= (op & UINT64_C(1536)) << 1;
1008
0
      Value |= op & UINT64_C(511);
1009
0
      // op: src0_rel
1010
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
1011
0
      Value |= (op & UINT64_C(1)) << 9;
1012
0
      // op: src1
1013
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
1014
0
      Value |= (op & UINT64_C(1536)) << 14;
1015
0
      Value |= (op & UINT64_C(511)) << 13;
1016
0
      // op: src1_rel
1017
0
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
1018
0
      Value |= (op & UINT64_C(1)) << 22;
1019
0
      // op: pred_sel
1020
0
      op = getMachineOpValue(MI, MI.getOperand(8), Fixups, STI);
1021
0
      Value |= (op & UINT64_C(3)) << 29;
1022
0
      // op: last
1023
0
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
1024
0
      Value |= (op & UINT64_C(1)) << 31;
1025
0
      // op: bank_swizzle
1026
0
      op = getMachineOpValue(MI, MI.getOperand(9), Fixups, STI);
1027
0
      Value |= (op & UINT64_C(7)) << 50;
1028
0
      break;
1029
0
    }
1030
0
    case R600::BFE_INT_eg:
1031
0
    case R600::BFE_UINT_eg:
1032
0
    case R600::BFI_INT_eg:
1033
0
    case R600::BIT_ALIGN_INT_eg:
1034
0
    case R600::CNDE_INT:
1035
0
    case R600::CNDE_eg:
1036
0
    case R600::CNDE_r600:
1037
0
    case R600::CNDGE_INT:
1038
0
    case R600::CNDGE_eg:
1039
0
    case R600::CNDGE_r600:
1040
0
    case R600::CNDGT_INT:
1041
0
    case R600::CNDGT_eg:
1042
0
    case R600::CNDGT_r600:
1043
0
    case R600::FMA_eg:
1044
0
    case R600::MULADD_IEEE_eg:
1045
0
    case R600::MULADD_IEEE_r600:
1046
0
    case R600::MULADD_INT24_cm:
1047
0
    case R600::MULADD_UINT24_eg:
1048
0
    case R600::MULADD_eg:
1049
0
    case R600::MULADD_r600:
1050
0
    case R600::MUL_LIT_eg:
1051
0
    case R600::MUL_LIT_r600: {
1052
0
      // op: src0
1053
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
1054
0
      Value |= (op & UINT64_C(1536)) << 1;
1055
0
      Value |= op & UINT64_C(511);
1056
0
      // op: src0_rel
1057
0
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
1058
0
      Value |= (op & UINT64_C(1)) << 9;
1059
0
      // op: src1
1060
0
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
1061
0
      Value |= (op & UINT64_C(1536)) << 14;
1062
0
      Value |= (op & UINT64_C(511)) << 13;
1063
0
      // op: src1_rel
1064
0
      op = getMachineOpValue(MI, MI.getOperand(9), Fixups, STI);
1065
0
      Value |= (op & UINT64_C(1)) << 22;
1066
0
      // op: pred_sel
1067
0
      op = getMachineOpValue(MI, MI.getOperand(16), Fixups, STI);
1068
0
      Value |= (op & UINT64_C(3)) << 29;
1069
0
      // op: last
1070
0
      op = getMachineOpValue(MI, MI.getOperand(15), Fixups, STI);
1071
0
      Value |= (op & UINT64_C(1)) << 31;
1072
0
      // op: src0_neg
1073
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
1074
0
      Value |= (op & UINT64_C(1)) << 12;
1075
0
      // op: src1_neg
1076
0
      op = getMachineOpValue(MI, MI.getOperand(8), Fixups, STI);
1077
0
      Value |= (op & UINT64_C(1)) << 25;
1078
0
      // op: dst
1079
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1080
0
      Value |= (op & UINT64_C(1536)) << 52;
1081
0
      Value |= (op & UINT64_C(127)) << 53;
1082
0
      // op: bank_swizzle
1083
0
      op = getMachineOpValue(MI, MI.getOperand(18), Fixups, STI);
1084
0
      Value |= (op & UINT64_C(7)) << 50;
1085
0
      // op: dst_rel
1086
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
1087
0
      Value |= (op & UINT64_C(1)) << 60;
1088
0
      // op: clamp
1089
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
1090
0
      Value |= (op & UINT64_C(1)) << 63;
1091
0
      // op: src2
1092
0
      op = getMachineOpValue(MI, MI.getOperand(11), Fixups, STI);
1093
0
      Value |= (op & UINT64_C(1536)) << 33;
1094
0
      Value |= (op & UINT64_C(511)) << 32;
1095
0
      // op: src2_rel
1096
0
      op = getMachineOpValue(MI, MI.getOperand(13), Fixups, STI);
1097
0
      Value |= (op & UINT64_C(1)) << 41;
1098
0
      // op: src2_neg
1099
0
      op = getMachineOpValue(MI, MI.getOperand(12), Fixups, STI);
1100
0
      Value |= (op & UINT64_C(1)) << 44;
1101
0
      break;
1102
0
    }
1103
10
    case R600::BCNT_INT:
1104
10
    case R600::CEIL:
1105
10
    case R600::COS_cm:
1106
10
    case R600::COS_eg:
1107
10
    case R600::COS_r600:
1108
10
    case R600::COS_r700:
1109
10
    case R600::EXP_IEEE_cm:
1110
10
    case R600::EXP_IEEE_eg:
1111
10
    case R600::EXP_IEEE_r600:
1112
10
    case R600::FFBH_UINT:
1113
10
    case R600::FFBL_INT:
1114
10
    case R600::FLOOR:
1115
10
    case R600::FLT16_TO_FLT32:
1116
10
    case R600::FLT32_TO_FLT16:
1117
10
    case R600::FLT_TO_INT_eg:
1118
10
    case R600::FLT_TO_INT_r600:
1119
10
    case R600::FLT_TO_UINT_eg:
1120
10
    case R600::FLT_TO_UINT_r600:
1121
10
    case R600::FRACT:
1122
10
    case R600::INTERP_LOAD_P0:
1123
10
    case R600::INT_TO_FLT_eg:
1124
10
    case R600::INT_TO_FLT_r600:
1125
10
    case R600::LOG_CLAMPED_eg:
1126
10
    case R600::LOG_CLAMPED_r600:
1127
10
    case R600::LOG_IEEE_cm:
1128
10
    case R600::LOG_IEEE_eg:
1129
10
    case R600::LOG_IEEE_r600:
1130
10
    case R600::MOV:
1131
10
    case R600::MOVA_INT_eg:
1132
10
    case R600::NOT_INT:
1133
10
    case R600::RECIPSQRT_CLAMPED_cm:
1134
10
    case R600::RECIPSQRT_CLAMPED_eg:
1135
10
    case R600::RECIPSQRT_CLAMPED_r600:
1136
10
    case R600::RECIPSQRT_IEEE_cm:
1137
10
    case R600::RECIPSQRT_IEEE_eg:
1138
10
    case R600::RECIPSQRT_IEEE_r600:
1139
10
    case R600::RECIP_CLAMPED_cm:
1140
10
    case R600::RECIP_CLAMPED_eg:
1141
10
    case R600::RECIP_CLAMPED_r600:
1142
10
    case R600::RECIP_IEEE_cm:
1143
10
    case R600::RECIP_IEEE_eg:
1144
10
    case R600::RECIP_IEEE_r600:
1145
10
    case R600::RECIP_UINT_eg:
1146
10
    case R600::RECIP_UINT_r600:
1147
10
    case R600::RNDNE:
1148
10
    case R600::SIN_cm:
1149
10
    case R600::SIN_eg:
1150
10
    case R600::SIN_r600:
1151
10
    case R600::SIN_r700:
1152
10
    case R600::TRUNC:
1153
10
    case R600::UINT_TO_FLT_eg:
1154
10
    case R600::UINT_TO_FLT_r600: {
1155
10
      // op: src0
1156
10
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
1157
10
      Value |= (op & UINT64_C(1536)) << 1;
1158
10
      Value |= op & UINT64_C(511);
1159
10
      // op: src0_rel
1160
10
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
1161
10
      Value |= (op & UINT64_C(1)) << 9;
1162
10
      // op: pred_sel
1163
10
      op = getMachineOpValue(MI, MI.getOperand(11), Fixups, STI);
1164
10
      Value |= (op & UINT64_C(3)) << 29;
1165
10
      // op: last
1166
10
      op = getMachineOpValue(MI, MI.getOperand(10), Fixups, STI);
1167
10
      Value |= (op & UINT64_C(1)) << 31;
1168
10
      // op: src0_neg
1169
10
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
1170
10
      Value |= (op & UINT64_C(1)) << 12;
1171
10
      // op: dst
1172
10
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1173
10
      Value |= (op & UINT64_C(1536)) << 52;
1174
10
      Value |= (op & UINT64_C(127)) << 53;
1175
10
      // op: bank_swizzle
1176
10
      op = getMachineOpValue(MI, MI.getOperand(13), Fixups, STI);
1177
10
      Value |= (op & UINT64_C(7)) << 50;
1178
10
      // op: dst_rel
1179
10
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
1180
10
      Value |= (op & UINT64_C(1)) << 60;
1181
10
      // op: clamp
1182
10
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
1183
10
      Value |= (op & UINT64_C(1)) << 63;
1184
10
      // op: src0_abs
1185
10
      op = getMachineOpValue(MI, MI.getOperand(8), Fixups, STI);
1186
10
      Value |= (op & UINT64_C(1)) << 32;
1187
10
      // op: write
1188
10
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
1189
10
      Value |= (op & UINT64_C(1)) << 36;
1190
10
      // op: omod
1191
10
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
1192
10
      Value |= (op & UINT64_C(3)) << 37;
1193
10
      break;
1194
10
    }
1195
62
    case R600::ADD:
1196
62
    case R600::ADDC_UINT:
1197
62
    case R600::ADD_INT:
1198
62
    case R600::AND_INT:
1199
62
    case R600::ASHR_eg:
1200
62
    case R600::ASHR_r600:
1201
62
    case R600::BFM_INT_eg:
1202
62
    case R600::CUBE_eg_real:
1203
62
    case R600::CUBE_r600_real:
1204
62
    case R600::DOT4_eg:
1205
62
    case R600::DOT4_r600:
1206
62
    case R600::KILLGT:
1207
62
    case R600::LSHL_eg:
1208
62
    case R600::LSHL_r600:
1209
62
    case R600::LSHR_eg:
1210
62
    case R600::LSHR_r600:
1211
62
    case R600::MAX:
1212
62
    case R600::MAX_DX10:
1213
62
    case R600::MAX_INT:
1214
62
    case R600::MAX_UINT:
1215
62
    case R600::MIN:
1216
62
    case R600::MIN_DX10:
1217
62
    case R600::MIN_INT:
1218
62
    case R600::MIN_UINT:
1219
62
    case R600::MUL:
1220
62
    case R600::MULHI_INT_cm:
1221
62
    case R600::MULHI_INT_cm24:
1222
62
    case R600::MULHI_INT_eg:
1223
62
    case R600::MULHI_INT_r600:
1224
62
    case R600::MULHI_UINT24_eg:
1225
62
    case R600::MULHI_UINT_cm:
1226
62
    case R600::MULHI_UINT_cm24:
1227
62
    case R600::MULHI_UINT_eg:
1228
62
    case R600::MULHI_UINT_r600:
1229
62
    case R600::MULLO_INT_cm:
1230
62
    case R600::MULLO_INT_eg:
1231
62
    case R600::MULLO_INT_r600:
1232
62
    case R600::MULLO_UINT_cm:
1233
62
    case R600::MULLO_UINT_eg:
1234
62
    case R600::MULLO_UINT_r600:
1235
62
    case R600::MUL_IEEE:
1236
62
    case R600::MUL_INT24_cm:
1237
62
    case R600::MUL_UINT24_eg:
1238
62
    case R600::OR_INT:
1239
62
    case R600::PRED_SETE:
1240
62
    case R600::PRED_SETE_INT:
1241
62
    case R600::PRED_SETGE:
1242
62
    case R600::PRED_SETGE_INT:
1243
62
    case R600::PRED_SETGT:
1244
62
    case R600::PRED_SETGT_INT:
1245
62
    case R600::PRED_SETNE:
1246
62
    case R600::PRED_SETNE_INT:
1247
62
    case R600::SETE:
1248
62
    case R600::SETE_DX10:
1249
62
    case R600::SETE_INT:
1250
62
    case R600::SETGE_DX10:
1251
62
    case R600::SETGE_INT:
1252
62
    case R600::SETGE_UINT:
1253
62
    case R600::SETGT_DX10:
1254
62
    case R600::SETGT_INT:
1255
62
    case R600::SETGT_UINT:
1256
62
    case R600::SETNE_DX10:
1257
62
    case R600::SETNE_INT:
1258
62
    case R600::SGE:
1259
62
    case R600::SGT:
1260
62
    case R600::SNE:
1261
62
    case R600::SUBB_UINT:
1262
62
    case R600::SUB_INT:
1263
62
    case R600::XOR_INT: {
1264
62
      // op: src0
1265
62
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
1266
62
      Value |= (op & UINT64_C(1536)) << 1;
1267
62
      Value |= op & UINT64_C(511);
1268
62
      // op: src0_rel
1269
62
      op = getMachineOpValue(MI, MI.getOperand(9), Fixups, STI);
1270
62
      Value |= (op & UINT64_C(1)) << 9;
1271
62
      // op: src1
1272
62
      op = getMachineOpValue(MI, MI.getOperand(12), Fixups, STI);
1273
62
      Value |= (op & UINT64_C(1536)) << 14;
1274
62
      Value |= (op & UINT64_C(511)) << 13;
1275
62
      // op: src1_rel
1276
62
      op = getMachineOpValue(MI, MI.getOperand(14), Fixups, STI);
1277
62
      Value |= (op & UINT64_C(1)) << 22;
1278
62
      // op: pred_sel
1279
62
      op = getMachineOpValue(MI, MI.getOperand(18), Fixups, STI);
1280
62
      Value |= (op & UINT64_C(3)) << 29;
1281
62
      // op: last
1282
62
      op = getMachineOpValue(MI, MI.getOperand(17), Fixups, STI);
1283
62
      Value |= (op & UINT64_C(1)) << 31;
1284
62
      // op: src0_neg
1285
62
      op = getMachineOpValue(MI, MI.getOperand(8), Fixups, STI);
1286
62
      Value |= (op & UINT64_C(1)) << 12;
1287
62
      // op: src1_neg
1288
62
      op = getMachineOpValue(MI, MI.getOperand(13), Fixups, STI);
1289
62
      Value |= (op & UINT64_C(1)) << 25;
1290
62
      // op: dst
1291
62
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1292
62
      Value |= (op & UINT64_C(1536)) << 52;
1293
62
      Value |= (op & UINT64_C(127)) << 53;
1294
62
      // op: bank_swizzle
1295
62
      op = getMachineOpValue(MI, MI.getOperand(20), Fixups, STI);
1296
62
      Value |= (op & UINT64_C(7)) << 50;
1297
62
      // op: dst_rel
1298
62
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
1299
62
      Value |= (op & UINT64_C(1)) << 60;
1300
62
      // op: clamp
1301
62
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
1302
62
      Value |= (op & UINT64_C(1)) << 63;
1303
62
      // op: src0_abs
1304
62
      op = getMachineOpValue(MI, MI.getOperand(10), Fixups, STI);
1305
62
      Value |= (op & UINT64_C(1)) << 32;
1306
62
      // op: src1_abs
1307
62
      op = getMachineOpValue(MI, MI.getOperand(15), Fixups, STI);
1308
62
      Value |= (op & UINT64_C(1)) << 33;
1309
62
      // op: update_exec_mask
1310
62
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
1311
62
      Value |= (op & UINT64_C(1)) << 34;
1312
62
      // op: update_pred
1313
62
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
1314
62
      Value |= (op & UINT64_C(1)) << 35;
1315
62
      // op: write
1316
62
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
1317
62
      Value |= (op & UINT64_C(1)) << 36;
1318
62
      // op: omod
1319
62
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
1320
62
      Value |= (op & UINT64_C(3)) << 37;
1321
62
      break;
1322
62
    }
1323
62
    case R600::INTERP_XY:
1324
0
    case R600::INTERP_ZW: {
1325
0
      // op: src0
1326
0
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
1327
0
      Value |= (op & UINT64_C(1536)) << 1;
1328
0
      Value |= op & UINT64_C(511);
1329
0
      // op: src0_rel
1330
0
      op = getMachineOpValue(MI, MI.getOperand(9), Fixups, STI);
1331
0
      Value |= (op & UINT64_C(1)) << 9;
1332
0
      // op: src1
1333
0
      op = getMachineOpValue(MI, MI.getOperand(12), Fixups, STI);
1334
0
      Value |= (op & UINT64_C(1536)) << 14;
1335
0
      Value |= (op & UINT64_C(511)) << 13;
1336
0
      // op: src1_rel
1337
0
      op = getMachineOpValue(MI, MI.getOperand(14), Fixups, STI);
1338
0
      Value |= (op & UINT64_C(1)) << 22;
1339
0
      // op: pred_sel
1340
0
      op = getMachineOpValue(MI, MI.getOperand(18), Fixups, STI);
1341
0
      Value |= (op & UINT64_C(3)) << 29;
1342
0
      // op: last
1343
0
      op = getMachineOpValue(MI, MI.getOperand(17), Fixups, STI);
1344
0
      Value |= (op & UINT64_C(1)) << 31;
1345
0
      // op: src0_neg
1346
0
      op = getMachineOpValue(MI, MI.getOperand(8), Fixups, STI);
1347
0
      Value |= (op & UINT64_C(1)) << 12;
1348
0
      // op: src1_neg
1349
0
      op = getMachineOpValue(MI, MI.getOperand(13), Fixups, STI);
1350
0
      Value |= (op & UINT64_C(1)) << 25;
1351
0
      // op: dst
1352
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1353
0
      Value |= (op & UINT64_C(1536)) << 52;
1354
0
      Value |= (op & UINT64_C(127)) << 53;
1355
0
      // op: dst_rel
1356
0
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
1357
0
      Value |= (op & UINT64_C(1)) << 60;
1358
0
      // op: clamp
1359
0
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
1360
0
      Value |= (op & UINT64_C(1)) << 63;
1361
0
      // op: src0_abs
1362
0
      op = getMachineOpValue(MI, MI.getOperand(10), Fixups, STI);
1363
0
      Value |= (op & UINT64_C(1)) << 32;
1364
0
      // op: src1_abs
1365
0
      op = getMachineOpValue(MI, MI.getOperand(15), Fixups, STI);
1366
0
      Value |= (op & UINT64_C(1)) << 33;
1367
0
      // op: update_exec_mask
1368
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
1369
0
      Value |= (op & UINT64_C(1)) << 34;
1370
0
      // op: update_pred
1371
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
1372
0
      Value |= (op & UINT64_C(1)) << 35;
1373
0
      // op: write
1374
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
1375
0
      Value |= (op & UINT64_C(1)) << 36;
1376
0
      // op: omod
1377
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
1378
0
      Value |= (op & UINT64_C(3)) << 37;
1379
0
      break;
1380
0
    }
1381
14
    case R600::VTX_READ_128_cm:
1382
14
    case R600::VTX_READ_128_eg:
1383
14
    case R600::VTX_READ_16_cm:
1384
14
    case R600::VTX_READ_16_eg:
1385
14
    case R600::VTX_READ_32_cm:
1386
14
    case R600::VTX_READ_32_eg:
1387
14
    case R600::VTX_READ_64_cm:
1388
14
    case R600::VTX_READ_64_eg:
1389
14
    case R600::VTX_READ_8_cm:
1390
14
    case R600::VTX_READ_8_eg: {
1391
14
      // op: src_gpr
1392
14
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
1393
14
      Value |= (op & UINT64_C(127)) << 16;
1394
14
      // op: buffer_id
1395
14
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
1396
14
      Value |= (op & UINT64_C(255)) << 8;
1397
14
      // op: dst_gpr
1398
14
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1399
14
      Value |= (op & UINT64_C(127)) << 32;
1400
14
      break;
1401
14
    }
1402
14
  default:
1403
0
    std::string msg;
1404
0
    raw_string_ostream Msg(msg);
1405
0
    Msg << "Not supported instr: " << MI;
1406
0
    report_fatal_error(Msg.str());
1407
266
  }
1408
266
  return Value;
1409
266
}
1410
1411
#ifdef ENABLE_INSTR_PREDICATE_VERIFIER
1412
#undef ENABLE_INSTR_PREDICATE_VERIFIER
1413
#include <sstream>
1414
1415
// Flags for subtarget features that participate in instruction matching.
1416
enum SubtargetFeatureFlag : uint8_t {
1417
  Feature_None = 0
1418
};
1419
1420
#ifndef NDEBUG
1421
static const char *SubtargetFeatureNames[] = {
1422
  nullptr
1423
};
1424
1425
#endif // NDEBUG
1426
uint64_t R600MCCodeEmitter::
1427
313
computeAvailableFeatures(const FeatureBitset& FB) const {
1428
313
  uint64_t Features = 0;
1429
313
  return Features;
1430
313
}
1431
1432
void R600MCCodeEmitter::verifyInstructionPredicates(
1433
313
    const MCInst &Inst, uint64_t AvailableFeatures) const {
1434
#ifndef NDEBUG
1435
  static uint64_t RequiredFeatures[] = {
1436
    0, // PHI = 0
1437
    0, // INLINEASM = 1
1438
    0, // CFI_INSTRUCTION = 2
1439
    0, // EH_LABEL = 3
1440
    0, // GC_LABEL = 4
1441
    0, // ANNOTATION_LABEL = 5
1442
    0, // KILL = 6
1443
    0, // EXTRACT_SUBREG = 7
1444
    0, // INSERT_SUBREG = 8
1445
    0, // IMPLICIT_DEF = 9
1446
    0, // SUBREG_TO_REG = 10
1447
    0, // COPY_TO_REGCLASS = 11
1448
    0, // DBG_VALUE = 12
1449
    0, // DBG_LABEL = 13
1450
    0, // REG_SEQUENCE = 14
1451
    0, // COPY = 15
1452
    0, // BUNDLE = 16
1453
    0, // LIFETIME_START = 17
1454
    0, // LIFETIME_END = 18
1455
    0, // STACKMAP = 19
1456
    0, // FENTRY_CALL = 20
1457
    0, // PATCHPOINT = 21
1458
    0, // LOAD_STACK_GUARD = 22
1459
    0, // STATEPOINT = 23
1460
    0, // LOCAL_ESCAPE = 24
1461
    0, // FAULTING_OP = 25
1462
    0, // PATCHABLE_OP = 26
1463
    0, // PATCHABLE_FUNCTION_ENTER = 27
1464
    0, // PATCHABLE_RET = 28
1465
    0, // PATCHABLE_FUNCTION_EXIT = 29
1466
    0, // PATCHABLE_TAIL_CALL = 30
1467
    0, // PATCHABLE_EVENT_CALL = 31
1468
    0, // PATCHABLE_TYPED_EVENT_CALL = 32
1469
    0, // ICALL_BRANCH_FUNNEL = 33
1470
    0, // G_ADD = 34
1471
    0, // G_SUB = 35
1472
    0, // G_MUL = 36
1473
    0, // G_SDIV = 37
1474
    0, // G_UDIV = 38
1475
    0, // G_SREM = 39
1476
    0, // G_UREM = 40
1477
    0, // G_AND = 41
1478
    0, // G_OR = 42
1479
    0, // G_XOR = 43
1480
    0, // G_IMPLICIT_DEF = 44
1481
    0, // G_PHI = 45
1482
    0, // G_FRAME_INDEX = 46
1483
    0, // G_GLOBAL_VALUE = 47
1484
    0, // G_EXTRACT = 48
1485
    0, // G_UNMERGE_VALUES = 49
1486
    0, // G_INSERT = 50
1487
    0, // G_MERGE_VALUES = 51
1488
    0, // G_PTRTOINT = 52
1489
    0, // G_INTTOPTR = 53
1490
    0, // G_BITCAST = 54
1491
    0, // G_LOAD = 55
1492
    0, // G_SEXTLOAD = 56
1493
    0, // G_ZEXTLOAD = 57
1494
    0, // G_STORE = 58
1495
    0, // G_ATOMIC_CMPXCHG_WITH_SUCCESS = 59
1496
    0, // G_ATOMIC_CMPXCHG = 60
1497
    0, // G_ATOMICRMW_XCHG = 61
1498
    0, // G_ATOMICRMW_ADD = 62
1499
    0, // G_ATOMICRMW_SUB = 63
1500
    0, // G_ATOMICRMW_AND = 64
1501
    0, // G_ATOMICRMW_NAND = 65
1502
    0, // G_ATOMICRMW_OR = 66
1503
    0, // G_ATOMICRMW_XOR = 67
1504
    0, // G_ATOMICRMW_MAX = 68
1505
    0, // G_ATOMICRMW_MIN = 69
1506
    0, // G_ATOMICRMW_UMAX = 70
1507
    0, // G_ATOMICRMW_UMIN = 71
1508
    0, // G_BRCOND = 72
1509
    0, // G_BRINDIRECT = 73
1510
    0, // G_INTRINSIC = 74
1511
    0, // G_INTRINSIC_W_SIDE_EFFECTS = 75
1512
    0, // G_ANYEXT = 76
1513
    0, // G_TRUNC = 77
1514
    0, // G_CONSTANT = 78
1515
    0, // G_FCONSTANT = 79
1516
    0, // G_VASTART = 80
1517
    0, // G_VAARG = 81
1518
    0, // G_SEXT = 82
1519
    0, // G_ZEXT = 83
1520
    0, // G_SHL = 84
1521
    0, // G_LSHR = 85
1522
    0, // G_ASHR = 86
1523
    0, // G_ICMP = 87
1524
    0, // G_FCMP = 88
1525
    0, // G_SELECT = 89
1526
    0, // G_UADDE = 90
1527
    0, // G_USUBE = 91
1528
    0, // G_SADDO = 92
1529
    0, // G_SSUBO = 93
1530
    0, // G_UMULO = 94
1531
    0, // G_SMULO = 95
1532
    0, // G_UMULH = 96
1533
    0, // G_SMULH = 97
1534
    0, // G_FADD = 98
1535
    0, // G_FSUB = 99
1536
    0, // G_FMUL = 100
1537
    0, // G_FMA = 101
1538
    0, // G_FDIV = 102
1539
    0, // G_FREM = 103
1540
    0, // G_FPOW = 104
1541
    0, // G_FEXP = 105
1542
    0, // G_FEXP2 = 106
1543
    0, // G_FLOG = 107
1544
    0, // G_FLOG2 = 108
1545
    0, // G_FNEG = 109
1546
    0, // G_FPEXT = 110
1547
    0, // G_FPTRUNC = 111
1548
    0, // G_FPTOSI = 112
1549
    0, // G_FPTOUI = 113
1550
    0, // G_SITOFP = 114
1551
    0, // G_UITOFP = 115
1552
    0, // G_FABS = 116
1553
    0, // G_GEP = 117
1554
    0, // G_PTR_MASK = 118
1555
    0, // G_BR = 119
1556
    0, // G_INSERT_VECTOR_ELT = 120
1557
    0, // G_EXTRACT_VECTOR_ELT = 121
1558
    0, // G_SHUFFLE_VECTOR = 122
1559
    0, // G_BSWAP = 123
1560
    0, // G_ADDRSPACE_CAST = 124
1561
    0, // BRANCH = 125
1562
    0, // BRANCH_COND_f32 = 126
1563
    0, // BRANCH_COND_i32 = 127
1564
    0, // BREAK = 128
1565
    0, // BREAKC_f32 = 129
1566
    0, // BREAKC_i32 = 130
1567
    0, // BREAK_LOGICALNZ_f32 = 131
1568
    0, // BREAK_LOGICALNZ_i32 = 132
1569
    0, // BREAK_LOGICALZ_f32 = 133
1570
    0, // BREAK_LOGICALZ_i32 = 134
1571
    0, // CONST_COPY = 135
1572
    0, // CONTINUE = 136
1573
    0, // CONTINUEC_f32 = 137
1574
    0, // CONTINUEC_i32 = 138
1575
    0, // CONTINUE_LOGICALNZ_f32 = 139
1576
    0, // CONTINUE_LOGICALNZ_i32 = 140
1577
    0, // CONTINUE_LOGICALZ_f32 = 141
1578
    0, // CONTINUE_LOGICALZ_i32 = 142
1579
    0, // CUBE_eg_pseudo = 143
1580
    0, // CUBE_r600_pseudo = 144
1581
    0, // DEFAULT = 145
1582
    0, // DOT_4 = 146
1583
    0, // DUMMY_CHAIN = 147
1584
    0, // ELSE = 148
1585
    0, // END = 149
1586
    0, // ENDFUNC = 150
1587
    0, // ENDIF = 151
1588
    0, // ENDLOOP = 152
1589
    0, // ENDMAIN = 153
1590
    0, // ENDSWITCH = 154
1591
    0, // FABS_R600 = 155
1592
    0, // FNEG_R600 = 156
1593
    0, // FUNC = 157
1594
    0, // IFC_f32 = 158
1595
    0, // IFC_i32 = 159
1596
    0, // IF_LOGICALNZ_f32 = 160
1597
    0, // IF_LOGICALNZ_i32 = 161
1598
    0, // IF_LOGICALZ_f32 = 162
1599
    0, // IF_LOGICALZ_i32 = 163
1600
    0, // IF_PREDICATE_SET = 164
1601
    0, // JUMP = 165
1602
    0, // JUMP_COND = 166
1603
    0, // MASK_WRITE = 167
1604
    0, // MOV_IMM_F32 = 168
1605
    0, // MOV_IMM_GLOBAL_ADDR = 169
1606
    0, // MOV_IMM_I32 = 170
1607
    0, // PRED_X = 171
1608
    0, // R600_EXTRACT_ELT_V2 = 172
1609
    0, // R600_EXTRACT_ELT_V4 = 173
1610
    0, // R600_INSERT_ELT_V2 = 174
1611
    0, // R600_INSERT_ELT_V4 = 175
1612
    0, // R600_RegisterLoad = 176
1613
    0, // R600_RegisterStore = 177
1614
    0, // RETDYN = 178
1615
    0, // RETURN = 179
1616
    0, // TXD = 180
1617
    0, // TXD_SHADOW = 181
1618
    0, // WHILELOOP = 182
1619
    0, // ADD = 183
1620
    0, // ADDC_UINT = 184
1621
    0, // ADD_INT = 185
1622
    0, // ALU_CLAUSE = 186
1623
    0, // AND_INT = 187
1624
    0, // ASHR_eg = 188
1625
    0, // ASHR_r600 = 189
1626
    0, // BCNT_INT = 190
1627
    0, // BFE_INT_eg = 191
1628
    0, // BFE_UINT_eg = 192
1629
    0, // BFI_INT_eg = 193
1630
    0, // BFM_INT_eg = 194
1631
    0, // BIT_ALIGN_INT_eg = 195
1632
    0, // CEIL = 196
1633
    0, // CF_ALU = 197
1634
    0, // CF_ALU_BREAK = 198
1635
    0, // CF_ALU_CONTINUE = 199
1636
    0, // CF_ALU_ELSE_AFTER = 200
1637
    0, // CF_ALU_POP_AFTER = 201
1638
    0, // CF_ALU_PUSH_BEFORE = 202
1639
    0, // CF_CALL_FS_EG = 203
1640
    0, // CF_CALL_FS_R600 = 204
1641
    0, // CF_CONTINUE_EG = 205
1642
    0, // CF_CONTINUE_R600 = 206
1643
    0, // CF_ELSE_EG = 207
1644
    0, // CF_ELSE_R600 = 208
1645
    0, // CF_END_CM = 209
1646
    0, // CF_END_EG = 210
1647
    0, // CF_END_R600 = 211
1648
    0, // CF_JUMP_EG = 212
1649
    0, // CF_JUMP_R600 = 213
1650
    0, // CF_PUSH_EG = 214
1651
    0, // CF_PUSH_ELSE_R600 = 215
1652
    0, // CF_TC_EG = 216
1653
    0, // CF_TC_R600 = 217
1654
    0, // CF_VC_EG = 218
1655
    0, // CF_VC_R600 = 219
1656
    0, // CNDE_INT = 220
1657
    0, // CNDE_eg = 221
1658
    0, // CNDE_r600 = 222
1659
    0, // CNDGE_INT = 223
1660
    0, // CNDGE_eg = 224
1661
    0, // CNDGE_r600 = 225
1662
    0, // CNDGT_INT = 226
1663
    0, // CNDGT_eg = 227
1664
    0, // CNDGT_r600 = 228
1665
    0, // COS_cm = 229
1666
    0, // COS_eg = 230
1667
    0, // COS_r600 = 231
1668
    0, // COS_r700 = 232
1669
    0, // CUBE_eg_real = 233
1670
    0, // CUBE_r600_real = 234
1671
    0, // DOT4_eg = 235
1672
    0, // DOT4_r600 = 236
1673
    0, // EG_ExportBuf = 237
1674
    0, // EG_ExportSwz = 238
1675
    0, // END_LOOP_EG = 239
1676
    0, // END_LOOP_R600 = 240
1677
    0, // EXP_IEEE_cm = 241
1678
    0, // EXP_IEEE_eg = 242
1679
    0, // EXP_IEEE_r600 = 243
1680
    0, // FETCH_CLAUSE = 244
1681
    0, // FFBH_UINT = 245
1682
    0, // FFBL_INT = 246
1683
    0, // FLOOR = 247
1684
    0, // FLT16_TO_FLT32 = 248
1685
    0, // FLT32_TO_FLT16 = 249
1686
    0, // FLT_TO_INT_eg = 250
1687
    0, // FLT_TO_INT_r600 = 251
1688
    0, // FLT_TO_UINT_eg = 252
1689
    0, // FLT_TO_UINT_r600 = 253
1690
    0, // FMA_eg = 254
1691
    0, // FRACT = 255
1692
    0, // GROUP_BARRIER = 256
1693
    0, // INTERP_LOAD_P0 = 257
1694
    0, // INTERP_PAIR_XY = 258
1695
    0, // INTERP_PAIR_ZW = 259
1696
    0, // INTERP_VEC_LOAD = 260
1697
    0, // INTERP_XY = 261
1698
    0, // INTERP_ZW = 262
1699
    0, // INT_TO_FLT_eg = 263
1700
    0, // INT_TO_FLT_r600 = 264
1701
    0, // KILLGT = 265
1702
    0, // LDS_ADD = 266
1703
    0, // LDS_ADD_RET = 267
1704
    0, // LDS_AND = 268
1705
    0, // LDS_AND_RET = 269
1706
    0, // LDS_BYTE_READ_RET = 270
1707
    0, // LDS_BYTE_WRITE = 271
1708
    0, // LDS_CMPST = 272
1709
    0, // LDS_CMPST_RET = 273
1710
    0, // LDS_MAX_INT = 274
1711
    0, // LDS_MAX_INT_RET = 275
1712
    0, // LDS_MAX_UINT = 276
1713
    0, // LDS_MAX_UINT_RET = 277
1714
    0, // LDS_MIN_INT = 278
1715
    0, // LDS_MIN_INT_RET = 279
1716
    0, // LDS_MIN_UINT = 280
1717
    0, // LDS_MIN_UINT_RET = 281
1718
    0, // LDS_OR = 282
1719
    0, // LDS_OR_RET = 283
1720
    0, // LDS_READ_RET = 284
1721
    0, // LDS_SHORT_READ_RET = 285
1722
    0, // LDS_SHORT_WRITE = 286
1723
    0, // LDS_SUB = 287
1724
    0, // LDS_SUB_RET = 288
1725
    0, // LDS_UBYTE_READ_RET = 289
1726
    0, // LDS_USHORT_READ_RET = 290
1727
    0, // LDS_WRITE = 291
1728
    0, // LDS_WRXCHG = 292
1729
    0, // LDS_WRXCHG_RET = 293
1730
    0, // LDS_XOR = 294
1731
    0, // LDS_XOR_RET = 295
1732
    0, // LITERALS = 296
1733
    0, // LOG_CLAMPED_eg = 297
1734
    0, // LOG_CLAMPED_r600 = 298
1735
    0, // LOG_IEEE_cm = 299
1736
    0, // LOG_IEEE_eg = 300
1737
    0, // LOG_IEEE_r600 = 301
1738
    0, // LOOP_BREAK_EG = 302
1739
    0, // LOOP_BREAK_R600 = 303
1740
    0, // LSHL_eg = 304
1741
    0, // LSHL_r600 = 305
1742
    0, // LSHR_eg = 306
1743
    0, // LSHR_r600 = 307
1744
    0, // MAX = 308
1745
    0, // MAX_DX10 = 309
1746
    0, // MAX_INT = 310
1747
    0, // MAX_UINT = 311
1748
    0, // MIN = 312
1749
    0, // MIN_DX10 = 313
1750
    0, // MIN_INT = 314
1751
    0, // MIN_UINT = 315
1752
    0, // MOV = 316
1753
    0, // MOVA_INT_eg = 317
1754
    0, // MUL = 318
1755
    0, // MULADD_IEEE_eg = 319
1756
    0, // MULADD_IEEE_r600 = 320
1757
    0, // MULADD_INT24_cm = 321
1758
    0, // MULADD_UINT24_eg = 322
1759
    0, // MULADD_eg = 323
1760
    0, // MULADD_r600 = 324
1761
    0, // MULHI_INT_cm = 325
1762
    0, // MULHI_INT_cm24 = 326
1763
    0, // MULHI_INT_eg = 327
1764
    0, // MULHI_INT_r600 = 328
1765
    0, // MULHI_UINT24_eg = 329
1766
    0, // MULHI_UINT_cm = 330
1767
    0, // MULHI_UINT_cm24 = 331
1768
    0, // MULHI_UINT_eg = 332
1769
    0, // MULHI_UINT_r600 = 333
1770
    0, // MULLO_INT_cm = 334
1771
    0, // MULLO_INT_eg = 335
1772
    0, // MULLO_INT_r600 = 336
1773
    0, // MULLO_UINT_cm = 337
1774
    0, // MULLO_UINT_eg = 338
1775
    0, // MULLO_UINT_r600 = 339
1776
    0, // MUL_IEEE = 340
1777
    0, // MUL_INT24_cm = 341
1778
    0, // MUL_LIT_eg = 342
1779
    0, // MUL_LIT_r600 = 343
1780
    0, // MUL_UINT24_eg = 344
1781
    0, // NOT_INT = 345
1782
    0, // OR_INT = 346
1783
    0, // PAD = 347
1784
    0, // POP_EG = 348
1785
    0, // POP_R600 = 349
1786
    0, // PRED_SETE = 350
1787
    0, // PRED_SETE_INT = 351
1788
    0, // PRED_SETGE = 352
1789
    0, // PRED_SETGE_INT = 353
1790
    0, // PRED_SETGT = 354
1791
    0, // PRED_SETGT_INT = 355
1792
    0, // PRED_SETNE = 356
1793
    0, // PRED_SETNE_INT = 357
1794
    0, // R600_ExportBuf = 358
1795
    0, // R600_ExportSwz = 359
1796
    0, // RAT_ATOMIC_ADD_NORET = 360
1797
    0, // RAT_ATOMIC_ADD_RTN = 361
1798
    0, // RAT_ATOMIC_AND_NORET = 362
1799
    0, // RAT_ATOMIC_AND_RTN = 363
1800
    0, // RAT_ATOMIC_CMPXCHG_INT_NORET = 364
1801
    0, // RAT_ATOMIC_CMPXCHG_INT_RTN = 365
1802
    0, // RAT_ATOMIC_DEC_UINT_NORET = 366
1803
    0, // RAT_ATOMIC_DEC_UINT_RTN = 367
1804
    0, // RAT_ATOMIC_INC_UINT_NORET = 368
1805
    0, // RAT_ATOMIC_INC_UINT_RTN = 369
1806
    0, // RAT_ATOMIC_MAX_INT_NORET = 370
1807
    0, // RAT_ATOMIC_MAX_INT_RTN = 371
1808
    0, // RAT_ATOMIC_MAX_UINT_NORET = 372
1809
    0, // RAT_ATOMIC_MAX_UINT_RTN = 373
1810
    0, // RAT_ATOMIC_MIN_INT_NORET = 374
1811
    0, // RAT_ATOMIC_MIN_INT_RTN = 375
1812
    0, // RAT_ATOMIC_MIN_UINT_NORET = 376
1813
    0, // RAT_ATOMIC_MIN_UINT_RTN = 377
1814
    0, // RAT_ATOMIC_OR_NORET = 378
1815
    0, // RAT_ATOMIC_OR_RTN = 379
1816
    0, // RAT_ATOMIC_RSUB_NORET = 380
1817
    0, // RAT_ATOMIC_RSUB_RTN = 381
1818
    0, // RAT_ATOMIC_SUB_NORET = 382
1819
    0, // RAT_ATOMIC_SUB_RTN = 383
1820
    0, // RAT_ATOMIC_XCHG_INT_NORET = 384
1821
    0, // RAT_ATOMIC_XCHG_INT_RTN = 385
1822
    0, // RAT_ATOMIC_XOR_NORET = 386
1823
    0, // RAT_ATOMIC_XOR_RTN = 387
1824
    0, // RAT_MSKOR = 388
1825
    0, // RAT_STORE_DWORD128 = 389
1826
    0, // RAT_STORE_DWORD32 = 390
1827
    0, // RAT_STORE_DWORD64 = 391
1828
    0, // RAT_STORE_TYPED_cm = 392
1829
    0, // RAT_STORE_TYPED_eg = 393
1830
    0, // RAT_WRITE_CACHELESS_128_eg = 394
1831
    0, // RAT_WRITE_CACHELESS_32_eg = 395
1832
    0, // RAT_WRITE_CACHELESS_64_eg = 396
1833
    0, // RECIPSQRT_CLAMPED_cm = 397
1834
    0, // RECIPSQRT_CLAMPED_eg = 398
1835
    0, // RECIPSQRT_CLAMPED_r600 = 399
1836
    0, // RECIPSQRT_IEEE_cm = 400
1837
    0, // RECIPSQRT_IEEE_eg = 401
1838
    0, // RECIPSQRT_IEEE_r600 = 402
1839
    0, // RECIP_CLAMPED_cm = 403
1840
    0, // RECIP_CLAMPED_eg = 404
1841
    0, // RECIP_CLAMPED_r600 = 405
1842
    0, // RECIP_IEEE_cm = 406
1843
    0, // RECIP_IEEE_eg = 407
1844
    0, // RECIP_IEEE_r600 = 408
1845
    0, // RECIP_UINT_eg = 409
1846
    0, // RECIP_UINT_r600 = 410
1847
    0, // RNDNE = 411
1848
    0, // SETE = 412
1849
    0, // SETE_DX10 = 413
1850
    0, // SETE_INT = 414
1851
    0, // SETGE_DX10 = 415
1852
    0, // SETGE_INT = 416
1853
    0, // SETGE_UINT = 417
1854
    0, // SETGT_DX10 = 418
1855
    0, // SETGT_INT = 419
1856
    0, // SETGT_UINT = 420
1857
    0, // SETNE_DX10 = 421
1858
    0, // SETNE_INT = 422
1859
    0, // SGE = 423
1860
    0, // SGT = 424
1861
    0, // SIN_cm = 425
1862
    0, // SIN_eg = 426
1863
    0, // SIN_r600 = 427
1864
    0, // SIN_r700 = 428
1865
    0, // SNE = 429
1866
    0, // SUBB_UINT = 430
1867
    0, // SUB_INT = 431
1868
    0, // TEX_GET_GRADIENTS_H = 432
1869
    0, // TEX_GET_GRADIENTS_V = 433
1870
    0, // TEX_GET_TEXTURE_RESINFO = 434
1871
    0, // TEX_LD = 435
1872
    0, // TEX_LDPTR = 436
1873
    0, // TEX_SAMPLE = 437
1874
    0, // TEX_SAMPLE_C = 438
1875
    0, // TEX_SAMPLE_C_G = 439
1876
    0, // TEX_SAMPLE_C_L = 440
1877
    0, // TEX_SAMPLE_C_LB = 441
1878
    0, // TEX_SAMPLE_G = 442
1879
    0, // TEX_SAMPLE_L = 443
1880
    0, // TEX_SAMPLE_LB = 444
1881
    0, // TEX_SET_GRADIENTS_H = 445
1882
    0, // TEX_SET_GRADIENTS_V = 446
1883
    0, // TEX_VTX_CONSTBUF = 447
1884
    0, // TEX_VTX_TEXBUF = 448
1885
    0, // TRUNC = 449
1886
    0, // UINT_TO_FLT_eg = 450
1887
    0, // UINT_TO_FLT_r600 = 451
1888
    0, // VTX_READ_128_cm = 452
1889
    0, // VTX_READ_128_eg = 453
1890
    0, // VTX_READ_16_cm = 454
1891
    0, // VTX_READ_16_eg = 455
1892
    0, // VTX_READ_32_cm = 456
1893
    0, // VTX_READ_32_eg = 457
1894
    0, // VTX_READ_64_cm = 458
1895
    0, // VTX_READ_64_eg = 459
1896
    0, // VTX_READ_8_cm = 460
1897
    0, // VTX_READ_8_eg = 461
1898
    0, // WHILE_LOOP_EG = 462
1899
    0, // WHILE_LOOP_R600 = 463
1900
    0, // XOR_INT = 464
1901
  };
1902
1903
  assert(Inst.getOpcode() < 465);
1904
  uint64_t MissingFeatures =
1905
      (AvailableFeatures & RequiredFeatures[Inst.getOpcode()]) ^
1906
      RequiredFeatures[Inst.getOpcode()];
1907
  if (MissingFeatures) {
1908
    std::ostringstream Msg;
1909
    Msg << "Attempting to emit " << MCII.getName(Inst.getOpcode()).str()
1910
        << " instruction but the ";
1911
    for (unsigned i = 0; i < 8 * sizeof(MissingFeatures); ++i)
1912
      if (MissingFeatures & (1ULL << i))
1913
        Msg << SubtargetFeatureNames[i] << " ";
1914
    Msg << "predicate(s) are not met";
1915
    report_fatal_error(Msg.str());
1916
  }
1917
#else
1918
// Silence unused variable warning on targets that don't use MCII for other purposes (e.g. BPF).
1919
313
(void)MCII;
1920
313
#endif // NDEBUG
1921
313
}
1922
#endif