Coverage Report

Created: 2018-11-16 02:38

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/clang-build/lib/Target/ARM/ARMGenCallingConv.inc
Line
Count
Source (jump to first uncovered line)
1
/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2
|*                                                                            *|
3
|* Calling Convention Implementation Fragment                                 *|
4
|*                                                                            *|
5
|* Automatically generated file, do not edit!                                 *|
6
|*                                                                            *|
7
\*===----------------------------------------------------------------------===*/
8
9
static bool CC_ARM_AAPCS(unsigned ValNo, MVT ValVT,
10
                         MVT LocVT, CCValAssign::LocInfo LocInfo,
11
                         ISD::ArgFlagsTy ArgFlags, CCState &State);
12
static bool CC_ARM_AAPCS_Common(unsigned ValNo, MVT ValVT,
13
                                MVT LocVT, CCValAssign::LocInfo LocInfo,
14
                                ISD::ArgFlagsTy ArgFlags, CCState &State);
15
static bool CC_ARM_AAPCS_VFP(unsigned ValNo, MVT ValVT,
16
                             MVT LocVT, CCValAssign::LocInfo LocInfo,
17
                             ISD::ArgFlagsTy ArgFlags, CCState &State);
18
static bool CC_ARM_APCS(unsigned ValNo, MVT ValVT,
19
                        MVT LocVT, CCValAssign::LocInfo LocInfo,
20
                        ISD::ArgFlagsTy ArgFlags, CCState &State);
21
static bool CC_ARM_APCS_GHC(unsigned ValNo, MVT ValVT,
22
                            MVT LocVT, CCValAssign::LocInfo LocInfo,
23
                            ISD::ArgFlagsTy ArgFlags, CCState &State);
24
static bool FastCC_ARM_APCS(unsigned ValNo, MVT ValVT,
25
                            MVT LocVT, CCValAssign::LocInfo LocInfo,
26
                            ISD::ArgFlagsTy ArgFlags, CCState &State);
27
static bool RetCC_ARM_AAPCS(unsigned ValNo, MVT ValVT,
28
                            MVT LocVT, CCValAssign::LocInfo LocInfo,
29
                            ISD::ArgFlagsTy ArgFlags, CCState &State);
30
static bool RetCC_ARM_AAPCS_Common(unsigned ValNo, MVT ValVT,
31
                                   MVT LocVT, CCValAssign::LocInfo LocInfo,
32
                                   ISD::ArgFlagsTy ArgFlags, CCState &State);
33
static bool RetCC_ARM_AAPCS_VFP(unsigned ValNo, MVT ValVT,
34
                                MVT LocVT, CCValAssign::LocInfo LocInfo,
35
                                ISD::ArgFlagsTy ArgFlags, CCState &State);
36
static bool RetCC_ARM_APCS(unsigned ValNo, MVT ValVT,
37
                           MVT LocVT, CCValAssign::LocInfo LocInfo,
38
                           ISD::ArgFlagsTy ArgFlags, CCState &State);
39
static bool RetFastCC_ARM_APCS(unsigned ValNo, MVT ValVT,
40
                               MVT LocVT, CCValAssign::LocInfo LocInfo,
41
                               ISD::ArgFlagsTy ArgFlags, CCState &State);
42
43
44
static bool CC_ARM_AAPCS(unsigned ValNo, MVT ValVT,
45
                         MVT LocVT, CCValAssign::LocInfo LocInfo,
46
36.3k
                         ISD::ArgFlagsTy ArgFlags, CCState &State) {
47
36.3k
48
36.3k
  if (ArgFlags.isByVal()) {
49
373
    State.HandleByVal(ValNo, ValVT, LocVT, LocInfo, 4, 4, ArgFlags);
50
373
    return false;
51
373
  }
52
35.9k
53
35.9k
  if (ArgFlags.isNest()) {
54
10
    if (unsigned Reg = State.AllocateReg(ARM::R12)) {
55
10
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
56
10
      return false;
57
10
    }
58
35.9k
  }
59
35.9k
60
35.9k
  if (LocVT == MVT::v1i64 ||
61
35.9k
      
LocVT == MVT::v2i3235.9k
||
62
35.9k
      
LocVT == MVT::v4i1635.8k
||
63
35.9k
      
LocVT == MVT::v4f1635.7k
||
64
35.9k
      
LocVT == MVT::v8i835.7k
||
65
35.9k
      
LocVT == MVT::v2f3235.7k
) {
66
279
    LocVT = MVT::f64;
67
279
    LocInfo = CCValAssign::BCvt;
68
279
  }
69
35.9k
70
35.9k
  if (LocVT == MVT::v2i64 ||
71
35.9k
      
LocVT == MVT::v4i3235.9k
||
72
35.9k
      
LocVT == MVT::v8i1635.8k
||
73
35.9k
      
LocVT == MVT::v8f1635.7k
||
74
35.9k
      
LocVT == MVT::v16i835.7k
||
75
35.9k
      
LocVT == MVT::v4f3235.7k
) {
76
268
    LocVT = MVT::v2f64;
77
268
    LocInfo = CCValAssign::BCvt;
78
268
  }
79
35.9k
80
35.9k
  if (ArgFlags.isSwiftSelf()) {
81
0
    if (LocVT == MVT::i32) {
82
0
      if (unsigned Reg = State.AllocateReg(ARM::R10)) {
83
0
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
84
0
        return false;
85
0
      }
86
35.9k
    }
87
0
  }
88
35.9k
89
35.9k
  if (ArgFlags.isSwiftError()) {
90
11
    if (LocVT == MVT::i32) {
91
11
      if (unsigned Reg = State.AllocateReg(ARM::R8)) {
92
11
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
93
11
        return false;
94
11
      }
95
35.9k
    }
96
11
  }
97
35.9k
98
35.9k
  if (LocVT == MVT::f64 ||
99
35.9k
      
LocVT == MVT::v2f6434.4k
) {
100
1.74k
    if (CC_ARM_AAPCS_Custom_f64(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
101
1.33k
        return false;
102
34.6k
  }
103
34.6k
104
34.6k
  if (LocVT == MVT::f32) {
105
1.64k
    LocVT = MVT::i32;
106
1.64k
    LocInfo = CCValAssign::BCvt;
107
1.64k
  }
108
34.6k
109
34.6k
  if (!CC_ARM_AAPCS_Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
110
34.6k
    return false;
111
5
112
5
  return true;  // CC didn't match.
113
5
}
ARMFastISel.cpp:CC_ARM_AAPCS(unsigned int, llvm::MVT, llvm::MVT, llvm::CCValAssign::LocInfo, llvm::ISD::ArgFlagsTy, llvm::CCState&)
Line
Count
Source
46
124
                         ISD::ArgFlagsTy ArgFlags, CCState &State) {
47
124
48
124
  if (ArgFlags.isByVal()) {
49
0
    State.HandleByVal(ValNo, ValVT, LocVT, LocInfo, 4, 4, ArgFlags);
50
0
    return false;
51
0
  }
52
124
53
124
  if (ArgFlags.isNest()) {
54
0
    if (unsigned Reg = State.AllocateReg(ARM::R12)) {
55
0
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
56
0
      return false;
57
0
    }
58
124
  }
59
124
60
124
  if (LocVT == MVT::v1i64 ||
61
124
      LocVT == MVT::v2i32 ||
62
124
      LocVT == MVT::v4i16 ||
63
124
      LocVT == MVT::v4f16 ||
64
124
      LocVT == MVT::v8i8 ||
65
124
      LocVT == MVT::v2f32) {
66
0
    LocVT = MVT::f64;
67
0
    LocInfo = CCValAssign::BCvt;
68
0
  }
69
124
70
124
  if (LocVT == MVT::v2i64 ||
71
124
      LocVT == MVT::v4i32 ||
72
124
      
LocVT == MVT::v8i16123
||
73
124
      
LocVT == MVT::v8f16123
||
74
124
      
LocVT == MVT::v16i8123
||
75
124
      
LocVT == MVT::v4f32123
) {
76
2
    LocVT = MVT::v2f64;
77
2
    LocInfo = CCValAssign::BCvt;
78
2
  }
79
124
80
124
  if (ArgFlags.isSwiftSelf()) {
81
0
    if (LocVT == MVT::i32) {
82
0
      if (unsigned Reg = State.AllocateReg(ARM::R10)) {
83
0
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
84
0
        return false;
85
0
      }
86
124
    }
87
0
  }
88
124
89
124
  if (ArgFlags.isSwiftError()) {
90
0
    if (LocVT == MVT::i32) {
91
0
      if (unsigned Reg = State.AllocateReg(ARM::R8)) {
92
0
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
93
0
        return false;
94
0
      }
95
124
    }
96
0
  }
97
124
98
124
  if (LocVT == MVT::f64 ||
99
124
      LocVT == MVT::v2f64) {
100
2
    if (CC_ARM_AAPCS_Custom_f64(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
101
2
        return false;
102
122
  }
103
122
104
122
  if (LocVT == MVT::f32) {
105
6
    LocVT = MVT::i32;
106
6
    LocInfo = CCValAssign::BCvt;
107
6
  }
108
122
109
122
  if (!CC_ARM_AAPCS_Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
110
122
    return false;
111
0
112
0
  return true;  // CC didn't match.
113
0
}
ARMISelLowering.cpp:CC_ARM_AAPCS(unsigned int, llvm::MVT, llvm::MVT, llvm::CCValAssign::LocInfo, llvm::ISD::ArgFlagsTy, llvm::CCState&)
Line
Count
Source
46
36.2k
                         ISD::ArgFlagsTy ArgFlags, CCState &State) {
47
36.2k
48
36.2k
  if (ArgFlags.isByVal()) {
49
373
    State.HandleByVal(ValNo, ValVT, LocVT, LocInfo, 4, 4, ArgFlags);
50
373
    return false;
51
373
  }
52
35.8k
53
35.8k
  if (ArgFlags.isNest()) {
54
10
    if (unsigned Reg = State.AllocateReg(ARM::R12)) {
55
10
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
56
10
      return false;
57
10
    }
58
35.8k
  }
59
35.8k
60
35.8k
  if (LocVT == MVT::v1i64 ||
61
35.8k
      
LocVT == MVT::v2i3235.8k
||
62
35.8k
      
LocVT == MVT::v4i1635.7k
||
63
35.8k
      
LocVT == MVT::v4f1635.6k
||
64
35.8k
      
LocVT == MVT::v8i835.6k
||
65
35.8k
      
LocVT == MVT::v2f3235.5k
) {
66
279
    LocVT = MVT::f64;
67
279
    LocInfo = CCValAssign::BCvt;
68
279
  }
69
35.8k
70
35.8k
  if (LocVT == MVT::v2i64 ||
71
35.8k
      
LocVT == MVT::v4i3235.7k
||
72
35.8k
      
LocVT == MVT::v8i1635.7k
||
73
35.8k
      
LocVT == MVT::v8f1635.6k
||
74
35.8k
      
LocVT == MVT::v16i835.6k
||
75
35.8k
      
LocVT == MVT::v4f3235.6k
) {
76
266
    LocVT = MVT::v2f64;
77
266
    LocInfo = CCValAssign::BCvt;
78
266
  }
79
35.8k
80
35.8k
  if (ArgFlags.isSwiftSelf()) {
81
0
    if (LocVT == MVT::i32) {
82
0
      if (unsigned Reg = State.AllocateReg(ARM::R10)) {
83
0
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
84
0
        return false;
85
0
      }
86
35.8k
    }
87
0
  }
88
35.8k
89
35.8k
  if (ArgFlags.isSwiftError()) {
90
11
    if (LocVT == MVT::i32) {
91
11
      if (unsigned Reg = State.AllocateReg(ARM::R8)) {
92
11
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
93
11
        return false;
94
11
      }
95
35.8k
    }
96
11
  }
97
35.8k
98
35.8k
  if (LocVT == MVT::f64 ||
99
35.8k
      
LocVT == MVT::v2f6434.3k
) {
100
1.74k
    if (CC_ARM_AAPCS_Custom_f64(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
101
1.33k
        return false;
102
34.4k
  }
103
34.4k
104
34.4k
  if (LocVT == MVT::f32) {
105
1.64k
    LocVT = MVT::i32;
106
1.64k
    LocInfo = CCValAssign::BCvt;
107
1.64k
  }
108
34.4k
109
34.4k
  if (!CC_ARM_AAPCS_Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
110
34.4k
    return false;
111
5
112
5
  return true;  // CC didn't match.
113
5
}
114
115
116
static bool CC_ARM_AAPCS_Common(unsigned ValNo, MVT ValVT,
117
                                MVT LocVT, CCValAssign::LocInfo LocInfo,
118
89.0k
                                ISD::ArgFlagsTy ArgFlags, CCState &State) {
119
89.0k
120
89.0k
  if (LocVT == MVT::i1 ||
121
89.0k
      
LocVT == MVT::i889.0k
||
122
89.0k
      
LocVT == MVT::i1688.8k
) {
123
244
    LocVT = MVT::i32;
124
244
    if (ArgFlags.isSExt())
125
23
        LocInfo = CCValAssign::SExt;
126
221
    else if (ArgFlags.isZExt())
127
50
        LocInfo = CCValAssign::ZExt;
128
171
    else
129
171
        LocInfo = CCValAssign::AExt;
130
244
  }
131
89.0k
132
89.0k
  if (LocVT == MVT::i32) {
133
88.5k
    if (ArgFlags.getOrigAlign() == 8) {
134
8.13k
      static const MCPhysReg RegList1[] = {
135
8.13k
        ARM::R0, ARM::R2
136
8.13k
      };
137
8.13k
      static const MCPhysReg RegList2[] = {
138
8.13k
        ARM::R0, ARM::R1
139
8.13k
      };
140
8.13k
      if (unsigned Reg = State.AllocateReg(RegList1, RegList2)) {
141
5.00k
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
142
5.00k
        return false;
143
5.00k
      }
144
84.0k
    }
145
88.5k
  }
146
84.0k
147
84.0k
  if (LocVT == MVT::i32) {
148
83.5k
    if (ArgFlags.getOrigAlign() != 8) {
149
80.4k
      static const MCPhysReg RegList3[] = {
150
80.4k
        ARM::R0, ARM::R1, ARM::R2, ARM::R3
151
80.4k
      };
152
80.4k
      if (unsigned Reg = State.AllocateReg(RegList3)) {
153
67.7k
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
154
67.7k
        return false;
155
67.7k
      }
156
16.2k
    }
157
83.5k
  }
158
16.2k
159
16.2k
  if (LocVT == MVT::i32) {
160
15.7k
    if (ArgFlags.getOrigAlign() == 8) {
161
3.13k
      static const MCPhysReg ShadowRegList4[] = {
162
3.13k
        ARM::R0, ARM::R1, ARM::R2, ARM::R3
163
3.13k
      };
164
3.13k
      unsigned Offset5 = State.AllocateStack(4, 8, ShadowRegList4);
165
3.13k
      State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset5, LocVT, LocInfo));
166
3.13k
      return false;
167
3.13k
    }
168
13.1k
  }
169
13.1k
170
13.1k
  if (LocVT == MVT::i32) {
171
12.6k
    static const MCPhysReg ShadowRegList6[] = {
172
12.6k
      ARM::R0, ARM::R1, ARM::R2, ARM::R3
173
12.6k
    };
174
12.6k
    unsigned Offset7 = State.AllocateStack(4, 4, ShadowRegList6);
175
12.6k
    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset7, LocVT, LocInfo));
176
12.6k
    return false;
177
12.6k
  }
178
475
179
475
  if (LocVT == MVT::f32) {
180
4
    static const MCPhysReg ShadowRegList8[] = {
181
4
      ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
182
4
    };
183
4
    unsigned Offset9 = State.AllocateStack(4, 4, ShadowRegList8);
184
4
    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset9, LocVT, LocInfo));
185
4
    return false;
186
4
  }
187
471
188
471
  if (LocVT == MVT::f64) {
189
314
    static const MCPhysReg ShadowRegList10[] = {
190
314
      ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
191
314
    };
192
314
    unsigned Offset11 = State.AllocateStack(8, 8, ShadowRegList10);
193
314
    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset11, LocVT, LocInfo));
194
314
    return false;
195
314
  }
196
157
197
157
  if (LocVT == MVT::v2f64) {
198
152
    if (ArgFlags.getOrigAlign() == 16) {
199
3
      static const MCPhysReg ShadowRegList12[] = {
200
3
        ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
201
3
      };
202
3
      unsigned Offset13 = State.AllocateStack(16, 16, ShadowRegList12);
203
3
      State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset13, LocVT, LocInfo));
204
3
      return false;
205
3
    }
206
154
  }
207
154
208
154
  if (LocVT == MVT::v2f64) {
209
149
    static const MCPhysReg ShadowRegList14[] = {
210
149
      ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
211
149
    };
212
149
    unsigned Offset15 = State.AllocateStack(16, 8, ShadowRegList14);
213
149
    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset15, LocVT, LocInfo));
214
149
    return false;
215
149
  }
216
5
217
5
  return true;  // CC didn't match.
218
5
}
ARMFastISel.cpp:CC_ARM_AAPCS_Common(unsigned int, llvm::MVT, llvm::MVT, llvm::CCValAssign::LocInfo, llvm::ISD::ArgFlagsTy, llvm::CCState&)
Line
Count
Source
118
136
                                ISD::ArgFlagsTy ArgFlags, CCState &State) {
119
136
120
136
  if (LocVT == MVT::i1 ||
121
136
      
LocVT == MVT::i8133
||
122
136
      
LocVT == MVT::i16103
) {
123
43
    LocVT = MVT::i32;
124
43
    if (ArgFlags.isSExt())
125
6
        LocInfo = CCValAssign::SExt;
126
37
    else if (ArgFlags.isZExt())
127
35
        LocInfo = CCValAssign::ZExt;
128
2
    else
129
2
        LocInfo = CCValAssign::AExt;
130
43
  }
131
136
132
136
  if (LocVT == MVT::i32) {
133
136
    if (ArgFlags.getOrigAlign() == 8) {
134
0
      static const MCPhysReg RegList1[] = {
135
0
        ARM::R0, ARM::R2
136
0
      };
137
0
      static const MCPhysReg RegList2[] = {
138
0
        ARM::R0, ARM::R1
139
0
      };
140
0
      if (unsigned Reg = State.AllocateReg(RegList1, RegList2)) {
141
0
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
142
0
        return false;
143
0
      }
144
136
    }
145
136
  }
146
136
147
136
  if (LocVT == MVT::i32) {
148
136
    if (ArgFlags.getOrigAlign() != 8) {
149
136
      static const MCPhysReg RegList3[] = {
150
136
        ARM::R0, ARM::R1, ARM::R2, ARM::R3
151
136
      };
152
136
      if (unsigned Reg = State.AllocateReg(RegList3)) {
153
116
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
154
116
        return false;
155
116
      }
156
20
    }
157
136
  }
158
20
159
20
  if (LocVT == MVT::i32) {
160
20
    if (ArgFlags.getOrigAlign() == 8) {
161
0
      static const MCPhysReg ShadowRegList4[] = {
162
0
        ARM::R0, ARM::R1, ARM::R2, ARM::R3
163
0
      };
164
0
      unsigned Offset5 = State.AllocateStack(4, 8, ShadowRegList4);
165
0
      State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset5, LocVT, LocInfo));
166
0
      return false;
167
0
    }
168
20
  }
169
20
170
20
  if (LocVT == MVT::i32) {
171
20
    static const MCPhysReg ShadowRegList6[] = {
172
20
      ARM::R0, ARM::R1, ARM::R2, ARM::R3
173
20
    };
174
20
    unsigned Offset7 = State.AllocateStack(4, 4, ShadowRegList6);
175
20
    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset7, LocVT, LocInfo));
176
20
    return false;
177
20
  }
178
0
179
0
  if (LocVT == MVT::f32) {
180
0
    static const MCPhysReg ShadowRegList8[] = {
181
0
      ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
182
0
    };
183
0
    unsigned Offset9 = State.AllocateStack(4, 4, ShadowRegList8);
184
0
    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset9, LocVT, LocInfo));
185
0
    return false;
186
0
  }
187
0
188
0
  if (LocVT == MVT::f64) {
189
0
    static const MCPhysReg ShadowRegList10[] = {
190
0
      ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
191
0
    };
192
0
    unsigned Offset11 = State.AllocateStack(8, 8, ShadowRegList10);
193
0
    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset11, LocVT, LocInfo));
194
0
    return false;
195
0
  }
196
0
197
0
  if (LocVT == MVT::v2f64) {
198
0
    if (ArgFlags.getOrigAlign() == 16) {
199
0
      static const MCPhysReg ShadowRegList12[] = {
200
0
        ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
201
0
      };
202
0
      unsigned Offset13 = State.AllocateStack(16, 16, ShadowRegList12);
203
0
      State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset13, LocVT, LocInfo));
204
0
      return false;
205
0
    }
206
0
  }
207
0
208
0
  if (LocVT == MVT::v2f64) {
209
0
    static const MCPhysReg ShadowRegList14[] = {
210
0
      ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
211
0
    };
212
0
    unsigned Offset15 = State.AllocateStack(16, 8, ShadowRegList14);
213
0
    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset15, LocVT, LocInfo));
214
0
    return false;
215
0
  }
216
0
217
0
  return true;  // CC didn't match.
218
0
}
ARMISelLowering.cpp:CC_ARM_AAPCS_Common(unsigned int, llvm::MVT, llvm::MVT, llvm::CCValAssign::LocInfo, llvm::ISD::ArgFlagsTy, llvm::CCState&)
Line
Count
Source
118
88.9k
                                ISD::ArgFlagsTy ArgFlags, CCState &State) {
119
88.9k
120
88.9k
  if (LocVT == MVT::i1 ||
121
88.9k
      
LocVT == MVT::i888.8k
||
122
88.9k
      
LocVT == MVT::i1688.7k
) {
123
201
    LocVT = MVT::i32;
124
201
    if (ArgFlags.isSExt())
125
17
        LocInfo = CCValAssign::SExt;
126
184
    else if (ArgFlags.isZExt())
127
15
        LocInfo = CCValAssign::ZExt;
128
169
    else
129
169
        LocInfo = CCValAssign::AExt;
130
201
  }
131
88.9k
132
88.9k
  if (LocVT == MVT::i32) {
133
88.4k
    if (ArgFlags.getOrigAlign() == 8) {
134
8.13k
      static const MCPhysReg RegList1[] = {
135
8.13k
        ARM::R0, ARM::R2
136
8.13k
      };
137
8.13k
      static const MCPhysReg RegList2[] = {
138
8.13k
        ARM::R0, ARM::R1
139
8.13k
      };
140
8.13k
      if (unsigned Reg = State.AllocateReg(RegList1, RegList2)) {
141
5.00k
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
142
5.00k
        return false;
143
5.00k
      }
144
83.9k
    }
145
88.4k
  }
146
83.9k
147
83.9k
  if (LocVT == MVT::i32) {
148
83.4k
    if (ArgFlags.getOrigAlign() != 8) {
149
80.2k
      static const MCPhysReg RegList3[] = {
150
80.2k
        ARM::R0, ARM::R1, ARM::R2, ARM::R3
151
80.2k
      };
152
80.2k
      if (unsigned Reg = State.AllocateReg(RegList3)) {
153
67.6k
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
154
67.6k
        return false;
155
67.6k
      }
156
16.2k
    }
157
83.4k
  }
158
16.2k
159
16.2k
  if (LocVT == MVT::i32) {
160
15.7k
    if (ArgFlags.getOrigAlign() == 8) {
161
3.13k
      static const MCPhysReg ShadowRegList4[] = {
162
3.13k
        ARM::R0, ARM::R1, ARM::R2, ARM::R3
163
3.13k
      };
164
3.13k
      unsigned Offset5 = State.AllocateStack(4, 8, ShadowRegList4);
165
3.13k
      State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset5, LocVT, LocInfo));
166
3.13k
      return false;
167
3.13k
    }
168
13.0k
  }
169
13.0k
170
13.0k
  if (LocVT == MVT::i32) {
171
12.6k
    static const MCPhysReg ShadowRegList6[] = {
172
12.6k
      ARM::R0, ARM::R1, ARM::R2, ARM::R3
173
12.6k
    };
174
12.6k
    unsigned Offset7 = State.AllocateStack(4, 4, ShadowRegList6);
175
12.6k
    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset7, LocVT, LocInfo));
176
12.6k
    return false;
177
12.6k
  }
178
475
179
475
  if (LocVT == MVT::f32) {
180
4
    static const MCPhysReg ShadowRegList8[] = {
181
4
      ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
182
4
    };
183
4
    unsigned Offset9 = State.AllocateStack(4, 4, ShadowRegList8);
184
4
    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset9, LocVT, LocInfo));
185
4
    return false;
186
4
  }
187
471
188
471
  if (LocVT == MVT::f64) {
189
314
    static const MCPhysReg ShadowRegList10[] = {
190
314
      ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
191
314
    };
192
314
    unsigned Offset11 = State.AllocateStack(8, 8, ShadowRegList10);
193
314
    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset11, LocVT, LocInfo));
194
314
    return false;
195
314
  }
196
157
197
157
  if (LocVT == MVT::v2f64) {
198
152
    if (ArgFlags.getOrigAlign() == 16) {
199
3
      static const MCPhysReg ShadowRegList12[] = {
200
3
        ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
201
3
      };
202
3
      unsigned Offset13 = State.AllocateStack(16, 16, ShadowRegList12);
203
3
      State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset13, LocVT, LocInfo));
204
3
      return false;
205
3
    }
206
154
  }
207
154
208
154
  if (LocVT == MVT::v2f64) {
209
149
    static const MCPhysReg ShadowRegList14[] = {
210
149
      ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
211
149
    };
212
149
    unsigned Offset15 = State.AllocateStack(16, 8, ShadowRegList14);
213
149
    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset15, LocVT, LocInfo));
214
149
    return false;
215
149
  }
216
5
217
5
  return true;  // CC didn't match.
218
5
}
219
220
221
static bool CC_ARM_AAPCS_VFP(unsigned ValNo, MVT ValVT,
222
                             MVT LocVT, CCValAssign::LocInfo LocInfo,
223
59.8k
                             ISD::ArgFlagsTy ArgFlags, CCState &State) {
224
59.8k
225
59.8k
  if (ArgFlags.isByVal()) {
226
12
    State.HandleByVal(ValNo, ValVT, LocVT, LocInfo, 4, 4, ArgFlags);
227
12
    return false;
228
12
  }
229
59.8k
230
59.8k
  if (LocVT == MVT::v1i64 ||
231
59.8k
      
LocVT == MVT::v2i3259.8k
||
232
59.8k
      
LocVT == MVT::v4i1659.7k
||
233
59.8k
      
LocVT == MVT::v4f1659.7k
||
234
59.8k
      
LocVT == MVT::v8i859.5k
||
235
59.8k
      
LocVT == MVT::v2f3259.5k
) {
236
315
    LocVT = MVT::f64;
237
315
    LocInfo = CCValAssign::BCvt;
238
315
  }
239
59.8k
240
59.8k
  if (LocVT == MVT::v2i64 ||
241
59.8k
      
LocVT == MVT::v4i3259.7k
||
242
59.8k
      
LocVT == MVT::v8i1659.7k
||
243
59.8k
      
LocVT == MVT::v8f1659.6k
||
244
59.8k
      
LocVT == MVT::v16i859.5k
||
245
59.8k
      
LocVT == MVT::v4f3259.5k
) {
246
350
    LocVT = MVT::v2f64;
247
350
    LocInfo = CCValAssign::BCvt;
248
350
  }
249
59.8k
250
59.8k
  if (ArgFlags.isSwiftSelf()) {
251
53
    if (LocVT == MVT::i32) {
252
53
      if (unsigned Reg = State.AllocateReg(ARM::R10)) {
253
53
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
254
53
        return false;
255
53
      }
256
59.7k
    }
257
53
  }
258
59.7k
259
59.7k
  if (ArgFlags.isSwiftError()) {
260
36
    if (LocVT == MVT::i32) {
261
36
      if (unsigned Reg = State.AllocateReg(ARM::R8)) {
262
36
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
263
36
        return false;
264
36
      }
265
59.7k
    }
266
36
  }
267
59.7k
268
59.7k
  if (ArgFlags.isInConsecutiveRegs()) {
269
5.05k
    if (CC_ARM_AAPCS_Custom_Aggregate(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
270
5.05k
        return false;
271
54.6k
  }
272
54.6k
273
54.6k
  if (LocVT == MVT::v2f64) {
274
62
    static const MCPhysReg RegList1[] = {
275
62
      ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
276
62
    };
277
62
    if (unsigned Reg = State.AllocateReg(RegList1)) {
278
14
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
279
14
      return false;
280
14
    }
281
54.6k
  }
282
54.6k
283
54.6k
  if (LocVT == MVT::f64) {
284
154
    static const MCPhysReg RegList2[] = {
285
154
      ARM::D0, ARM::D1, ARM::D2, ARM::D3, ARM::D4, ARM::D5, ARM::D6, ARM::D7
286
154
    };
287
154
    if (unsigned Reg = State.AllocateReg(RegList2)) {
288
142
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
289
142
      return false;
290
142
    }
291
54.5k
  }
292
54.5k
293
54.5k
  if (LocVT == MVT::f32) {
294
105
    static const MCPhysReg RegList3[] = {
295
105
      ARM::S0, ARM::S1, ARM::S2, ARM::S3, ARM::S4, ARM::S5, ARM::S6, ARM::S7, ARM::S8, ARM::S9, ARM::S10, ARM::S11, ARM::S12, ARM::S13, ARM::S14, ARM::S15
296
105
    };
297
105
    if (unsigned Reg = State.AllocateReg(RegList3)) {
298
101
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
299
101
      return false;
300
101
    }
301
54.4k
  }
302
54.4k
303
54.4k
  if (!CC_ARM_AAPCS_Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
304
54.4k
    return false;
305
0
306
0
  return true;  // CC didn't match.
307
0
}
ARMFastISel.cpp:CC_ARM_AAPCS_VFP(unsigned int, llvm::MVT, llvm::MVT, llvm::CCValAssign::LocInfo, llvm::ISD::ArgFlagsTy, llvm::CCState&)
Line
Count
Source
223
16
                             ISD::ArgFlagsTy ArgFlags, CCState &State) {
224
16
225
16
  if (ArgFlags.isByVal()) {
226
0
    State.HandleByVal(ValNo, ValVT, LocVT, LocInfo, 4, 4, ArgFlags);
227
0
    return false;
228
0
  }
229
16
230
16
  if (LocVT == MVT::v1i64 ||
231
16
      LocVT == MVT::v2i32 ||
232
16
      LocVT == MVT::v4i16 ||
233
16
      LocVT == MVT::v4f16 ||
234
16
      LocVT == MVT::v8i8 ||
235
16
      LocVT == MVT::v2f32) {
236
0
    LocVT = MVT::f64;
237
0
    LocInfo = CCValAssign::BCvt;
238
0
  }
239
16
240
16
  if (LocVT == MVT::v2i64 ||
241
16
      LocVT == MVT::v4i32 ||
242
16
      LocVT == MVT::v8i16 ||
243
16
      LocVT == MVT::v8f16 ||
244
16
      LocVT == MVT::v16i8 ||
245
16
      LocVT == MVT::v4f32) {
246
0
    LocVT = MVT::v2f64;
247
0
    LocInfo = CCValAssign::BCvt;
248
0
  }
249
16
250
16
  if (ArgFlags.isSwiftSelf()) {
251
0
    if (LocVT == MVT::i32) {
252
0
      if (unsigned Reg = State.AllocateReg(ARM::R10)) {
253
0
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
254
0
        return false;
255
0
      }
256
16
    }
257
0
  }
258
16
259
16
  if (ArgFlags.isSwiftError()) {
260
0
    if (LocVT == MVT::i32) {
261
0
      if (unsigned Reg = State.AllocateReg(ARM::R8)) {
262
0
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
263
0
        return false;
264
0
      }
265
16
    }
266
0
  }
267
16
268
16
  if (ArgFlags.isInConsecutiveRegs()) {
269
0
    if (CC_ARM_AAPCS_Custom_Aggregate(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
270
0
        return false;
271
16
  }
272
16
273
16
  if (LocVT == MVT::v2f64) {
274
0
    static const MCPhysReg RegList1[] = {
275
0
      ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
276
0
    };
277
0
    if (unsigned Reg = State.AllocateReg(RegList1)) {
278
0
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
279
0
      return false;
280
0
    }
281
16
  }
282
16
283
16
  if (LocVT == MVT::f64) {
284
0
    static const MCPhysReg RegList2[] = {
285
0
      ARM::D0, ARM::D1, ARM::D2, ARM::D3, ARM::D4, ARM::D5, ARM::D6, ARM::D7
286
0
    };
287
0
    if (unsigned Reg = State.AllocateReg(RegList2)) {
288
0
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
289
0
      return false;
290
0
    }
291
16
  }
292
16
293
16
  if (LocVT == MVT::f32) {
294
2
    static const MCPhysReg RegList3[] = {
295
2
      ARM::S0, ARM::S1, ARM::S2, ARM::S3, ARM::S4, ARM::S5, ARM::S6, ARM::S7, ARM::S8, ARM::S9, ARM::S10, ARM::S11, ARM::S12, ARM::S13, ARM::S14, ARM::S15
296
2
    };
297
2
    if (unsigned Reg = State.AllocateReg(RegList3)) {
298
2
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
299
2
      return false;
300
2
    }
301
14
  }
302
14
303
14
  if (!CC_ARM_AAPCS_Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
304
14
    return false;
305
0
306
0
  return true;  // CC didn't match.
307
0
}
ARMISelLowering.cpp:CC_ARM_AAPCS_VFP(unsigned int, llvm::MVT, llvm::MVT, llvm::CCValAssign::LocInfo, llvm::ISD::ArgFlagsTy, llvm::CCState&)
Line
Count
Source
223
59.8k
                             ISD::ArgFlagsTy ArgFlags, CCState &State) {
224
59.8k
225
59.8k
  if (ArgFlags.isByVal()) {
226
12
    State.HandleByVal(ValNo, ValVT, LocVT, LocInfo, 4, 4, ArgFlags);
227
12
    return false;
228
12
  }
229
59.8k
230
59.8k
  if (LocVT == MVT::v1i64 ||
231
59.8k
      
LocVT == MVT::v2i3259.8k
||
232
59.8k
      
LocVT == MVT::v4i1659.7k
||
233
59.8k
      
LocVT == MVT::v4f1659.6k
||
234
59.8k
      
LocVT == MVT::v8i859.5k
||
235
59.8k
      
LocVT == MVT::v2f3259.5k
) {
236
315
    LocVT = MVT::f64;
237
315
    LocInfo = CCValAssign::BCvt;
238
315
  }
239
59.8k
240
59.8k
  if (LocVT == MVT::v2i64 ||
241
59.8k
      
LocVT == MVT::v4i3259.7k
||
242
59.8k
      
LocVT == MVT::v8i1659.7k
||
243
59.8k
      
LocVT == MVT::v8f1659.6k
||
244
59.8k
      
LocVT == MVT::v16i859.5k
||
245
59.8k
      
LocVT == MVT::v4f3259.5k
) {
246
350
    LocVT = MVT::v2f64;
247
350
    LocInfo = CCValAssign::BCvt;
248
350
  }
249
59.8k
250
59.8k
  if (ArgFlags.isSwiftSelf()) {
251
53
    if (LocVT == MVT::i32) {
252
53
      if (unsigned Reg = State.AllocateReg(ARM::R10)) {
253
53
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
254
53
        return false;
255
53
      }
256
59.7k
    }
257
53
  }
258
59.7k
259
59.7k
  if (ArgFlags.isSwiftError()) {
260
36
    if (LocVT == MVT::i32) {
261
36
      if (unsigned Reg = State.AllocateReg(ARM::R8)) {
262
36
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
263
36
        return false;
264
36
      }
265
59.7k
    }
266
36
  }
267
59.7k
268
59.7k
  if (ArgFlags.isInConsecutiveRegs()) {
269
5.05k
    if (CC_ARM_AAPCS_Custom_Aggregate(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
270
5.05k
        return false;
271
54.6k
  }
272
54.6k
273
54.6k
  if (LocVT == MVT::v2f64) {
274
62
    static const MCPhysReg RegList1[] = {
275
62
      ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
276
62
    };
277
62
    if (unsigned Reg = State.AllocateReg(RegList1)) {
278
14
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
279
14
      return false;
280
14
    }
281
54.6k
  }
282
54.6k
283
54.6k
  if (LocVT == MVT::f64) {
284
154
    static const MCPhysReg RegList2[] = {
285
154
      ARM::D0, ARM::D1, ARM::D2, ARM::D3, ARM::D4, ARM::D5, ARM::D6, ARM::D7
286
154
    };
287
154
    if (unsigned Reg = State.AllocateReg(RegList2)) {
288
142
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
289
142
      return false;
290
142
    }
291
54.5k
  }
292
54.5k
293
54.5k
  if (LocVT == MVT::f32) {
294
103
    static const MCPhysReg RegList3[] = {
295
103
      ARM::S0, ARM::S1, ARM::S2, ARM::S3, ARM::S4, ARM::S5, ARM::S6, ARM::S7, ARM::S8, ARM::S9, ARM::S10, ARM::S11, ARM::S12, ARM::S13, ARM::S14, ARM::S15
296
103
    };
297
103
    if (unsigned Reg = State.AllocateReg(RegList3)) {
298
99
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
299
99
      return false;
300
99
    }
301
54.4k
  }
302
54.4k
303
54.4k
  if (!CC_ARM_AAPCS_Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
304
54.4k
    return false;
305
0
306
0
  return true;  // CC didn't match.
307
0
}
308
309
310
static bool CC_ARM_APCS(unsigned ValNo, MVT ValVT,
311
                        MVT LocVT, CCValAssign::LocInfo LocInfo,
312
117k
                        ISD::ArgFlagsTy ArgFlags, CCState &State) {
313
117k
314
117k
  if (ArgFlags.isByVal()) {
315
34
    State.HandleByVal(ValNo, ValVT, LocVT, LocInfo, 4, 4, ArgFlags);
316
34
    return false;
317
34
  }
318
117k
319
117k
  if (LocVT == MVT::i1 ||
320
117k
      
LocVT == MVT::i8117k
||
321
117k
      
LocVT == MVT::i16117k
) {
322
91
    LocVT = MVT::i32;
323
91
    if (ArgFlags.isSExt())
324
13
        LocInfo = CCValAssign::SExt;
325
78
    else if (ArgFlags.isZExt())
326
72
        LocInfo = CCValAssign::ZExt;
327
6
    else
328
6
        LocInfo = CCValAssign::AExt;
329
91
  }
330
117k
331
117k
  if (ArgFlags.isSwiftSelf()) {
332
20
    if (LocVT == MVT::i32) {
333
20
      if (unsigned Reg = State.AllocateReg(ARM::R10)) {
334
20
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
335
20
        return false;
336
20
      }
337
117k
    }
338
20
  }
339
117k
340
117k
  if (ArgFlags.isSwiftError()) {
341
22
    if (LocVT == MVT::i32) {
342
22
      if (unsigned Reg = State.AllocateReg(ARM::R8)) {
343
22
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
344
22
        return false;
345
22
      }
346
117k
    }
347
22
  }
348
117k
349
117k
  if (LocVT == MVT::v1i64 ||
350
117k
      
LocVT == MVT::v2i32117k
||
351
117k
      
LocVT == MVT::v4i16117k
||
352
117k
      
LocVT == MVT::v8i8117k
||
353
117k
      
LocVT == MVT::v2f32117k
) {
354
81
    LocVT = MVT::f64;
355
81
    LocInfo = CCValAssign::BCvt;
356
81
  }
357
117k
358
117k
  if (LocVT == MVT::v2i64 ||
359
117k
      
LocVT == MVT::v4i32117k
||
360
117k
      
LocVT == MVT::v8i16117k
||
361
117k
      
LocVT == MVT::v16i8117k
||
362
117k
      
LocVT == MVT::v4f32117k
) {
363
84
    LocVT = MVT::v2f64;
364
84
    LocInfo = CCValAssign::BCvt;
365
84
  }
366
117k
367
117k
  if (LocVT == MVT::f64 ||
368
117k
      
LocVT == MVT::v2f64116k
) {
369
1.06k
    if (CC_ARM_APCS_Custom_f64(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
370
571
        return false;
371
117k
  }
372
117k
373
117k
  if (LocVT == MVT::f32) {
374
1.05k
    LocVT = MVT::i32;
375
1.05k
    LocInfo = CCValAssign::BCvt;
376
1.05k
  }
377
117k
378
117k
  if (LocVT == MVT::i32) {
379
116k
    static const MCPhysReg RegList1[] = {
380
116k
      ARM::R0, ARM::R1, ARM::R2, ARM::R3
381
116k
    };
382
116k
    if (unsigned Reg = State.AllocateReg(RegList1)) {
383
90.0k
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
384
90.0k
      return false;
385
90.0k
    }
386
27.1k
  }
387
27.1k
388
27.1k
  if (LocVT == MVT::i32) {
389
26.6k
    unsigned Offset2 = State.AllocateStack(4, 4);
390
26.6k
    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset2, LocVT, LocInfo));
391
26.6k
    return false;
392
26.6k
  }
393
497
394
497
  if (LocVT == MVT::f64) {
395
471
    unsigned Offset3 = State.AllocateStack(8, 4);
396
471
    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset3, LocVT, LocInfo));
397
471
    return false;
398
471
  }
399
26
400
26
  if (LocVT == MVT::v2f64) {
401
26
    unsigned Offset4 = State.AllocateStack(16, 4);
402
26
    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset4, LocVT, LocInfo));
403
26
    return false;
404
26
  }
405
0
406
0
  return true;  // CC didn't match.
407
0
}
ARMFastISel.cpp:CC_ARM_APCS(unsigned int, llvm::MVT, llvm::MVT, llvm::CCValAssign::LocInfo, llvm::ISD::ArgFlagsTy, llvm::CCState&)
Line
Count
Source
312
1.16k
                        ISD::ArgFlagsTy ArgFlags, CCState &State) {
313
1.16k
314
1.16k
  if (ArgFlags.isByVal()) {
315
0
    State.HandleByVal(ValNo, ValVT, LocVT, LocInfo, 4, 4, ArgFlags);
316
0
    return false;
317
0
  }
318
1.16k
319
1.16k
  if (LocVT == MVT::i1 ||
320
1.16k
      
LocVT == MVT::i81.16k
||
321
1.16k
      
LocVT == MVT::i161.09k
) {
322
91
    LocVT = MVT::i32;
323
91
    if (ArgFlags.isSExt())
324
13
        LocInfo = CCValAssign::SExt;
325
78
    else if (ArgFlags.isZExt())
326
72
        LocInfo = CCValAssign::ZExt;
327
6
    else
328
6
        LocInfo = CCValAssign::AExt;
329
91
  }
330
1.16k
331
1.16k
  if (ArgFlags.isSwiftSelf()) {
332
0
    if (LocVT == MVT::i32) {
333
0
      if (unsigned Reg = State.AllocateReg(ARM::R10)) {
334
0
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
335
0
        return false;
336
0
      }
337
1.16k
    }
338
0
  }
339
1.16k
340
1.16k
  if (ArgFlags.isSwiftError()) {
341
0
    if (LocVT == MVT::i32) {
342
0
      if (unsigned Reg = State.AllocateReg(ARM::R8)) {
343
0
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
344
0
        return false;
345
0
      }
346
1.16k
    }
347
0
  }
348
1.16k
349
1.16k
  if (LocVT == MVT::v1i64 ||
350
1.16k
      LocVT == MVT::v2i32 ||
351
1.16k
      LocVT == MVT::v4i16 ||
352
1.16k
      LocVT == MVT::v8i8 ||
353
1.16k
      LocVT == MVT::v2f32) {
354
1
    LocVT = MVT::f64;
355
1
    LocInfo = CCValAssign::BCvt;
356
1
  }
357
1.16k
358
1.16k
  if (LocVT == MVT::v2i64 ||
359
1.16k
      LocVT == MVT::v4i32 ||
360
1.16k
      
LocVT == MVT::v8i161.16k
||
361
1.16k
      
LocVT == MVT::v16i81.16k
||
362
1.16k
      
LocVT == MVT::v4f321.16k
) {
363
3
    LocVT = MVT::v2f64;
364
3
    LocInfo = CCValAssign::BCvt;
365
3
  }
366
1.16k
367
1.16k
  if (LocVT == MVT::f64 ||
368
1.16k
      
LocVT == MVT::v2f64750
) {
369
422
    if (CC_ARM_APCS_Custom_f64(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
370
3
        return false;
371
1.16k
  }
372
1.16k
373
1.16k
  if (LocVT == MVT::f32) {
374
76
    LocVT = MVT::i32;
375
76
    LocInfo = CCValAssign::BCvt;
376
76
  }
377
1.16k
378
1.16k
  if (LocVT == MVT::i32) {
379
747
    static const MCPhysReg RegList1[] = {
380
747
      ARM::R0, ARM::R1, ARM::R2, ARM::R3
381
747
    };
382
747
    if (unsigned Reg = State.AllocateReg(RegList1)) {
383
611
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
384
611
      return false;
385
611
    }
386
555
  }
387
555
388
555
  if (LocVT == MVT::i32) {
389
136
    unsigned Offset2 = State.AllocateStack(4, 4);
390
136
    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset2, LocVT, LocInfo));
391
136
    return false;
392
136
  }
393
419
394
419
  if (LocVT == MVT::f64) {
395
418
    unsigned Offset3 = State.AllocateStack(8, 4);
396
418
    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset3, LocVT, LocInfo));
397
418
    return false;
398
418
  }
399
1
400
1
  if (LocVT == MVT::v2f64) {
401
1
    unsigned Offset4 = State.AllocateStack(16, 4);
402
1
    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset4, LocVT, LocInfo));
403
1
    return false;
404
1
  }
405
0
406
0
  return true;  // CC didn't match.
407
0
}
ARMISelLowering.cpp:CC_ARM_APCS(unsigned int, llvm::MVT, llvm::MVT, llvm::CCValAssign::LocInfo, llvm::ISD::ArgFlagsTy, llvm::CCState&)
Line
Count
Source
312
116k
                        ISD::ArgFlagsTy ArgFlags, CCState &State) {
313
116k
314
116k
  if (ArgFlags.isByVal()) {
315
34
    State.HandleByVal(ValNo, ValVT, LocVT, LocInfo, 4, 4, ArgFlags);
316
34
    return false;
317
34
  }
318
116k
319
116k
  if (LocVT == MVT::i1 ||
320
116k
      LocVT == MVT::i8 ||
321
116k
      LocVT == MVT::i16) {
322
0
    LocVT = MVT::i32;
323
0
    if (ArgFlags.isSExt())
324
0
        LocInfo = CCValAssign::SExt;
325
0
    else if (ArgFlags.isZExt())
326
0
        LocInfo = CCValAssign::ZExt;
327
0
    else
328
0
        LocInfo = CCValAssign::AExt;
329
0
  }
330
116k
331
116k
  if (ArgFlags.isSwiftSelf()) {
332
20
    if (LocVT == MVT::i32) {
333
20
      if (unsigned Reg = State.AllocateReg(ARM::R10)) {
334
20
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
335
20
        return false;
336
20
      }
337
116k
    }
338
20
  }
339
116k
340
116k
  if (ArgFlags.isSwiftError()) {
341
22
    if (LocVT == MVT::i32) {
342
22
      if (unsigned Reg = State.AllocateReg(ARM::R8)) {
343
22
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
344
22
        return false;
345
22
      }
346
116k
    }
347
22
  }
348
116k
349
116k
  if (LocVT == MVT::v1i64 ||
350
116k
      
LocVT == MVT::v2i32116k
||
351
116k
      
LocVT == MVT::v4i16116k
||
352
116k
      
LocVT == MVT::v8i8116k
||
353
116k
      
LocVT == MVT::v2f32116k
) {
354
80
    LocVT = MVT::f64;
355
80
    LocInfo = CCValAssign::BCvt;
356
80
  }
357
116k
358
116k
  if (LocVT == MVT::v2i64 ||
359
116k
      
LocVT == MVT::v4i32116k
||
360
116k
      
LocVT == MVT::v8i16116k
||
361
116k
      
LocVT == MVT::v16i8116k
||
362
116k
      
LocVT == MVT::v4f32116k
) {
363
81
    LocVT = MVT::v2f64;
364
81
    LocInfo = CCValAssign::BCvt;
365
81
  }
366
116k
367
116k
  if (LocVT == MVT::f64 ||
368
116k
      
LocVT == MVT::v2f64116k
) {
369
646
    if (CC_ARM_APCS_Custom_f64(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
370
568
        return false;
371
116k
  }
372
116k
373
116k
  if (LocVT == MVT::f32) {
374
977
    LocVT = MVT::i32;
375
977
    LocInfo = CCValAssign::BCvt;
376
977
  }
377
116k
378
116k
  if (LocVT == MVT::i32) {
379
115k
    static const MCPhysReg RegList1[] = {
380
115k
      ARM::R0, ARM::R1, ARM::R2, ARM::R3
381
115k
    };
382
115k
    if (unsigned Reg = State.AllocateReg(RegList1)) {
383
89.4k
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
384
89.4k
      return false;
385
89.4k
    }
386
26.6k
  }
387
26.6k
388
26.6k
  if (LocVT == MVT::i32) {
389
26.5k
    unsigned Offset2 = State.AllocateStack(4, 4);
390
26.5k
    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset2, LocVT, LocInfo));
391
26.5k
    return false;
392
26.5k
  }
393
78
394
78
  if (LocVT == MVT::f64) {
395
53
    unsigned Offset3 = State.AllocateStack(8, 4);
396
53
    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset3, LocVT, LocInfo));
397
53
    return false;
398
53
  }
399
25
400
25
  if (LocVT == MVT::v2f64) {
401
25
    unsigned Offset4 = State.AllocateStack(16, 4);
402
25
    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset4, LocVT, LocInfo));
403
25
    return false;
404
25
  }
405
0
406
0
  return true;  // CC didn't match.
407
0
}
408
409
410
static bool CC_ARM_APCS_GHC(unsigned ValNo, MVT ValVT,
411
                            MVT LocVT, CCValAssign::LocInfo LocInfo,
412
0
                            ISD::ArgFlagsTy ArgFlags, CCState &State) {
413
0
414
0
  if (LocVT == MVT::v1i64 ||
415
0
      LocVT == MVT::v2i32 ||
416
0
      LocVT == MVT::v4i16 ||
417
0
      LocVT == MVT::v8i8 ||
418
0
      LocVT == MVT::v2f32) {
419
0
    LocVT = MVT::f64;
420
0
    LocInfo = CCValAssign::BCvt;
421
0
  }
422
0
423
0
  if (LocVT == MVT::v2i64 ||
424
0
      LocVT == MVT::v4i32 ||
425
0
      LocVT == MVT::v8i16 ||
426
0
      LocVT == MVT::v16i8 ||
427
0
      LocVT == MVT::v4f32) {
428
0
    LocVT = MVT::v2f64;
429
0
    LocInfo = CCValAssign::BCvt;
430
0
  }
431
0
432
0
  if (LocVT == MVT::v2f64) {
433
0
    static const MCPhysReg RegList1[] = {
434
0
      ARM::Q4, ARM::Q5
435
0
    };
436
0
    if (unsigned Reg = State.AllocateReg(RegList1)) {
437
0
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
438
0
      return false;
439
0
    }
440
0
  }
441
0
442
0
  if (LocVT == MVT::f64) {
443
0
    static const MCPhysReg RegList2[] = {
444
0
      ARM::D8, ARM::D9, ARM::D10, ARM::D11
445
0
    };
446
0
    if (unsigned Reg = State.AllocateReg(RegList2)) {
447
0
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
448
0
      return false;
449
0
    }
450
0
  }
451
0
452
0
  if (LocVT == MVT::f32) {
453
0
    static const MCPhysReg RegList3[] = {
454
0
      ARM::S16, ARM::S17, ARM::S18, ARM::S19, ARM::S20, ARM::S21, ARM::S22, ARM::S23
455
0
    };
456
0
    if (unsigned Reg = State.AllocateReg(RegList3)) {
457
0
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
458
0
      return false;
459
0
    }
460
0
  }
461
0
462
0
  if (LocVT == MVT::i8 ||
463
0
      LocVT == MVT::i16) {
464
0
    LocVT = MVT::i32;
465
0
    if (ArgFlags.isSExt())
466
0
        LocInfo = CCValAssign::SExt;
467
0
    else if (ArgFlags.isZExt())
468
0
        LocInfo = CCValAssign::ZExt;
469
0
    else
470
0
        LocInfo = CCValAssign::AExt;
471
0
  }
472
0
473
0
  if (LocVT == MVT::i32) {
474
0
    static const MCPhysReg RegList4[] = {
475
0
      ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11
476
0
    };
477
0
    if (unsigned Reg = State.AllocateReg(RegList4)) {
478
0
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
479
0
      return false;
480
0
    }
481
0
  }
482
0
483
0
  return true;  // CC didn't match.
484
0
}
Unexecuted instantiation: ARMFastISel.cpp:CC_ARM_APCS_GHC(unsigned int, llvm::MVT, llvm::MVT, llvm::CCValAssign::LocInfo, llvm::ISD::ArgFlagsTy, llvm::CCState&)
Unexecuted instantiation: ARMISelLowering.cpp:CC_ARM_APCS_GHC(unsigned int, llvm::MVT, llvm::MVT, llvm::CCValAssign::LocInfo, llvm::ISD::ArgFlagsTy, llvm::CCState&)
485
486
487
static bool FastCC_ARM_APCS(unsigned ValNo, MVT ValVT,
488
                            MVT LocVT, CCValAssign::LocInfo LocInfo,
489
3.24k
                            ISD::ArgFlagsTy ArgFlags, CCState &State) {
490
3.24k
491
3.24k
  if (LocVT == MVT::v1i64 ||
492
3.24k
      LocVT == MVT::v2i32 ||
493
3.24k
      LocVT == MVT::v4i16 ||
494
3.24k
      LocVT == MVT::v8i8 ||
495
3.24k
      LocVT == MVT::v2f32) {
496
0
    LocVT = MVT::f64;
497
0
    LocInfo = CCValAssign::BCvt;
498
0
  }
499
3.24k
500
3.24k
  if (LocVT == MVT::v2i64 ||
501
3.24k
      LocVT == MVT::v4i32 ||
502
3.24k
      LocVT == MVT::v8i16 ||
503
3.24k
      LocVT == MVT::v16i8 ||
504
3.24k
      LocVT == MVT::v4f32) {
505
0
    LocVT = MVT::v2f64;
506
0
    LocInfo = CCValAssign::BCvt;
507
0
  }
508
3.24k
509
3.24k
  if (LocVT == MVT::v2f64) {
510
0
    static const MCPhysReg RegList1[] = {
511
0
      ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
512
0
    };
513
0
    if (unsigned Reg = State.AllocateReg(RegList1)) {
514
0
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
515
0
      return false;
516
0
    }
517
3.24k
  }
518
3.24k
519
3.24k
  if (LocVT == MVT::f64) {
520
44
    static const MCPhysReg RegList2[] = {
521
44
      ARM::D0, ARM::D1, ARM::D2, ARM::D3, ARM::D4, ARM::D5, ARM::D6, ARM::D7
522
44
    };
523
44
    if (unsigned Reg = State.AllocateReg(RegList2)) {
524
41
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
525
41
      return false;
526
41
    }
527
3.20k
  }
528
3.20k
529
3.20k
  if (LocVT == MVT::f32) {
530
14
    static const MCPhysReg RegList3[] = {
531
14
      ARM::S0, ARM::S1, ARM::S2, ARM::S3, ARM::S4, ARM::S5, ARM::S6, ARM::S7, ARM::S8, ARM::S9, ARM::S10, ARM::S11, ARM::S12, ARM::S13, ARM::S14, ARM::S15
532
14
    };
533
14
    if (unsigned Reg = State.AllocateReg(RegList3)) {
534
11
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
535
11
      return false;
536
11
    }
537
3.19k
  }
538
3.19k
539
3.19k
  if (LocVT == MVT::f32) {
540
3
    static const MCPhysReg ShadowRegList4[] = {
541
3
      ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
542
3
    };
543
3
    unsigned Offset5 = State.AllocateStack(4, 4, ShadowRegList4);
544
3
    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset5, LocVT, LocInfo));
545
3
    return false;
546
3
  }
547
3.19k
548
3.19k
  if (LocVT == MVT::f64) {
549
3
    static const MCPhysReg ShadowRegList6[] = {
550
3
      ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
551
3
    };
552
3
    unsigned Offset7 = State.AllocateStack(8, 4, ShadowRegList6);
553
3
    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset7, LocVT, LocInfo));
554
3
    return false;
555
3
  }
556
3.18k
557
3.18k
  if (LocVT == MVT::v2f64) {
558
0
    static const MCPhysReg ShadowRegList8[] = {
559
0
      ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
560
0
    };
561
0
    unsigned Offset9 = State.AllocateStack(16, 4, ShadowRegList8);
562
0
    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset9, LocVT, LocInfo));
563
0
    return false;
564
0
  }
565
3.18k
566
3.18k
  if (!CC_ARM_APCS(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
567
3.18k
    return false;
568
0
569
0
  return true;  // CC didn't match.
570
0
}
ARMFastISel.cpp:FastCC_ARM_APCS(unsigned int, llvm::MVT, llvm::MVT, llvm::CCValAssign::LocInfo, llvm::ISD::ArgFlagsTy, llvm::CCState&)
Line
Count
Source
489
5
                            ISD::ArgFlagsTy ArgFlags, CCState &State) {
490
5
491
5
  if (LocVT == MVT::v1i64 ||
492
5
      LocVT == MVT::v2i32 ||
493
5
      LocVT == MVT::v4i16 ||
494
5
      LocVT == MVT::v8i8 ||
495
5
      LocVT == MVT::v2f32) {
496
0
    LocVT = MVT::f64;
497
0
    LocInfo = CCValAssign::BCvt;
498
0
  }
499
5
500
5
  if (LocVT == MVT::v2i64 ||
501
5
      LocVT == MVT::v4i32 ||
502
5
      LocVT == MVT::v8i16 ||
503
5
      LocVT == MVT::v16i8 ||
504
5
      LocVT == MVT::v4f32) {
505
0
    LocVT = MVT::v2f64;
506
0
    LocInfo = CCValAssign::BCvt;
507
0
  }
508
5
509
5
  if (LocVT == MVT::v2f64) {
510
0
    static const MCPhysReg RegList1[] = {
511
0
      ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
512
0
    };
513
0
    if (unsigned Reg = State.AllocateReg(RegList1)) {
514
0
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
515
0
      return false;
516
0
    }
517
5
  }
518
5
519
5
  if (LocVT == MVT::f64) {
520
0
    static const MCPhysReg RegList2[] = {
521
0
      ARM::D0, ARM::D1, ARM::D2, ARM::D3, ARM::D4, ARM::D5, ARM::D6, ARM::D7
522
0
    };
523
0
    if (unsigned Reg = State.AllocateReg(RegList2)) {
524
0
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
525
0
      return false;
526
0
    }
527
5
  }
528
5
529
5
  if (LocVT == MVT::f32) {
530
4
    static const MCPhysReg RegList3[] = {
531
4
      ARM::S0, ARM::S1, ARM::S2, ARM::S3, ARM::S4, ARM::S5, ARM::S6, ARM::S7, ARM::S8, ARM::S9, ARM::S10, ARM::S11, ARM::S12, ARM::S13, ARM::S14, ARM::S15
532
4
    };
533
4
    if (unsigned Reg = State.AllocateReg(RegList3)) {
534
4
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
535
4
      return false;
536
4
    }
537
1
  }
538
1
539
1
  if (LocVT == MVT::f32) {
540
0
    static const MCPhysReg ShadowRegList4[] = {
541
0
      ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
542
0
    };
543
0
    unsigned Offset5 = State.AllocateStack(4, 4, ShadowRegList4);
544
0
    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset5, LocVT, LocInfo));
545
0
    return false;
546
0
  }
547
1
548
1
  if (LocVT == MVT::f64) {
549
0
    static const MCPhysReg ShadowRegList6[] = {
550
0
      ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
551
0
    };
552
0
    unsigned Offset7 = State.AllocateStack(8, 4, ShadowRegList6);
553
0
    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset7, LocVT, LocInfo));
554
0
    return false;
555
0
  }
556
1
557
1
  if (LocVT == MVT::v2f64) {
558
0
    static const MCPhysReg ShadowRegList8[] = {
559
0
      ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
560
0
    };
561
0
    unsigned Offset9 = State.AllocateStack(16, 4, ShadowRegList8);
562
0
    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset9, LocVT, LocInfo));
563
0
    return false;
564
0
  }
565
1
566
1
  if (!CC_ARM_APCS(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
567
1
    return false;
568
0
569
0
  return true;  // CC didn't match.
570
0
}
ARMISelLowering.cpp:FastCC_ARM_APCS(unsigned int, llvm::MVT, llvm::MVT, llvm::CCValAssign::LocInfo, llvm::ISD::ArgFlagsTy, llvm::CCState&)
Line
Count
Source
489
3.24k
                            ISD::ArgFlagsTy ArgFlags, CCState &State) {
490
3.24k
491
3.24k
  if (LocVT == MVT::v1i64 ||
492
3.24k
      LocVT == MVT::v2i32 ||
493
3.24k
      LocVT == MVT::v4i16 ||
494
3.24k
      LocVT == MVT::v8i8 ||
495
3.24k
      LocVT == MVT::v2f32) {
496
0
    LocVT = MVT::f64;
497
0
    LocInfo = CCValAssign::BCvt;
498
0
  }
499
3.24k
500
3.24k
  if (LocVT == MVT::v2i64 ||
501
3.24k
      LocVT == MVT::v4i32 ||
502
3.24k
      LocVT == MVT::v8i16 ||
503
3.24k
      LocVT == MVT::v16i8 ||
504
3.24k
      LocVT == MVT::v4f32) {
505
0
    LocVT = MVT::v2f64;
506
0
    LocInfo = CCValAssign::BCvt;
507
0
  }
508
3.24k
509
3.24k
  if (LocVT == MVT::v2f64) {
510
0
    static const MCPhysReg RegList1[] = {
511
0
      ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
512
0
    };
513
0
    if (unsigned Reg = State.AllocateReg(RegList1)) {
514
0
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
515
0
      return false;
516
0
    }
517
3.24k
  }
518
3.24k
519
3.24k
  if (LocVT == MVT::f64) {
520
44
    static const MCPhysReg RegList2[] = {
521
44
      ARM::D0, ARM::D1, ARM::D2, ARM::D3, ARM::D4, ARM::D5, ARM::D6, ARM::D7
522
44
    };
523
44
    if (unsigned Reg = State.AllocateReg(RegList2)) {
524
41
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
525
41
      return false;
526
41
    }
527
3.20k
  }
528
3.20k
529
3.20k
  if (LocVT == MVT::f32) {
530
10
    static const MCPhysReg RegList3[] = {
531
10
      ARM::S0, ARM::S1, ARM::S2, ARM::S3, ARM::S4, ARM::S5, ARM::S6, ARM::S7, ARM::S8, ARM::S9, ARM::S10, ARM::S11, ARM::S12, ARM::S13, ARM::S14, ARM::S15
532
10
    };
533
10
    if (unsigned Reg = State.AllocateReg(RegList3)) {
534
7
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
535
7
      return false;
536
7
    }
537
3.19k
  }
538
3.19k
539
3.19k
  if (LocVT == MVT::f32) {
540
3
    static const MCPhysReg ShadowRegList4[] = {
541
3
      ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
542
3
    };
543
3
    unsigned Offset5 = State.AllocateStack(4, 4, ShadowRegList4);
544
3
    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset5, LocVT, LocInfo));
545
3
    return false;
546
3
  }
547
3.19k
548
3.19k
  if (LocVT == MVT::f64) {
549
3
    static const MCPhysReg ShadowRegList6[] = {
550
3
      ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
551
3
    };
552
3
    unsigned Offset7 = State.AllocateStack(8, 4, ShadowRegList6);
553
3
    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset7, LocVT, LocInfo));
554
3
    return false;
555
3
  }
556
3.18k
557
3.18k
  if (LocVT == MVT::v2f64) {
558
0
    static const MCPhysReg ShadowRegList8[] = {
559
0
      ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
560
0
    };
561
0
    unsigned Offset9 = State.AllocateStack(16, 4, ShadowRegList8);
562
0
    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset9, LocVT, LocInfo));
563
0
    return false;
564
0
  }
565
3.18k
566
3.18k
  if (!CC_ARM_APCS(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
567
3.18k
    return false;
568
0
569
0
  return true;  // CC didn't match.
570
0
}
571
572
573
static bool RetCC_ARM_AAPCS(unsigned ValNo, MVT ValVT,
574
                            MVT LocVT, CCValAssign::LocInfo LocInfo,
575
31.5k
                            ISD::ArgFlagsTy ArgFlags, CCState &State) {
576
31.5k
577
31.5k
  if (LocVT == MVT::v1i64 ||
578
31.5k
      
LocVT == MVT::v2i3231.3k
||
579
31.5k
      
LocVT == MVT::v4i1630.9k
||
580
31.5k
      
LocVT == MVT::v4f1630.5k
||
581
31.5k
      
LocVT == MVT::v8i830.5k
||
582
31.5k
      
LocVT == MVT::v2f3230.0k
) {
583
1.63k
    LocVT = MVT::f64;
584
1.63k
    LocInfo = CCValAssign::BCvt;
585
1.63k
  }
586
31.5k
587
31.5k
  if (LocVT == MVT::v2i64 ||
588
31.5k
      
LocVT == MVT::v4i3231.3k
||
589
31.5k
      
LocVT == MVT::v8i1630.8k
||
590
31.5k
      
LocVT == MVT::v8f1630.4k
||
591
31.5k
      
LocVT == MVT::v16i830.4k
||
592
31.5k
      
LocVT == MVT::v4f3230.1k
) {
593
1.53k
    LocVT = MVT::v2f64;
594
1.53k
    LocInfo = CCValAssign::BCvt;
595
1.53k
  }
596
31.5k
597
31.5k
  if (ArgFlags.isSwiftSelf()) {
598
0
    if (LocVT == MVT::i32) {
599
0
      if (unsigned Reg = State.AllocateReg(ARM::R10)) {
600
0
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
601
0
        return false;
602
0
      }
603
31.5k
    }
604
0
  }
605
31.5k
606
31.5k
  if (ArgFlags.isSwiftError()) {
607
12
    if (LocVT == MVT::i32) {
608
12
      if (unsigned Reg = State.AllocateReg(ARM::R8)) {
609
12
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
610
12
        return false;
611
12
      }
612
31.5k
    }
613
12
  }
614
31.5k
615
31.5k
  if (LocVT == MVT::f64 ||
616
31.5k
      
LocVT == MVT::v2f6429.1k
) {
617
3.97k
    if (RetCC_ARM_AAPCS_Custom_f64(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
618
3.92k
        return false;
619
27.6k
  }
620
27.6k
621
27.6k
  if (LocVT == MVT::f32) {
622
1.86k
    LocVT = MVT::i32;
623
1.86k
    LocInfo = CCValAssign::BCvt;
624
1.86k
  }
625
27.6k
626
27.6k
  if (!RetCC_ARM_AAPCS_Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
627
27.4k
    return false;
628
235
629
235
  return true;  // CC didn't match.
630
235
}
ARMFastISel.cpp:RetCC_ARM_AAPCS(unsigned int, llvm::MVT, llvm::MVT, llvm::CCValAssign::LocInfo, llvm::ISD::ArgFlagsTy, llvm::CCState&)
Line
Count
Source
575
214
                            ISD::ArgFlagsTy ArgFlags, CCState &State) {
576
214
577
214
  if (LocVT == MVT::v1i64 ||
578
214
      LocVT == MVT::v2i32 ||
579
214
      LocVT == MVT::v4i16 ||
580
214
      LocVT == MVT::v4f16 ||
581
214
      LocVT == MVT::v8i8 ||
582
214
      LocVT == MVT::v2f32) {
583
0
    LocVT = MVT::f64;
584
0
    LocInfo = CCValAssign::BCvt;
585
0
  }
586
214
587
214
  if (LocVT == MVT::v2i64 ||
588
214
      LocVT == MVT::v4i32 ||
589
214
      LocVT == MVT::v8i16 ||
590
214
      LocVT == MVT::v8f16 ||
591
214
      LocVT == MVT::v16i8 ||
592
214
      
LocVT == MVT::v4f32212
) {
593
2
    LocVT = MVT::v2f64;
594
2
    LocInfo = CCValAssign::BCvt;
595
2
  }
596
214
597
214
  if (ArgFlags.isSwiftSelf()) {
598
0
    if (LocVT == MVT::i32) {
599
0
      if (unsigned Reg = State.AllocateReg(ARM::R10)) {
600
0
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
601
0
        return false;
602
0
      }
603
214
    }
604
0
  }
605
214
606
214
  if (ArgFlags.isSwiftError()) {
607
0
    if (LocVT == MVT::i32) {
608
0
      if (unsigned Reg = State.AllocateReg(ARM::R8)) {
609
0
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
610
0
        return false;
611
0
      }
612
214
    }
613
0
  }
614
214
615
214
  if (LocVT == MVT::f64 ||
616
214
      LocVT == MVT::v2f64) {
617
2
    if (RetCC_ARM_AAPCS_Custom_f64(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
618
2
        return false;
619
212
  }
620
212
621
212
  if (LocVT == MVT::f32) {
622
0
    LocVT = MVT::i32;
623
0
    LocInfo = CCValAssign::BCvt;
624
0
  }
625
212
626
212
  if (!RetCC_ARM_AAPCS_Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
627
212
    return false;
628
0
629
0
  return true;  // CC didn't match.
630
0
}
ARMISelLowering.cpp:RetCC_ARM_AAPCS(unsigned int, llvm::MVT, llvm::MVT, llvm::CCValAssign::LocInfo, llvm::ISD::ArgFlagsTy, llvm::CCState&)
Line
Count
Source
575
31.3k
                            ISD::ArgFlagsTy ArgFlags, CCState &State) {
576
31.3k
577
31.3k
  if (LocVT == MVT::v1i64 ||
578
31.3k
      
LocVT == MVT::v2i3231.1k
||
579
31.3k
      
LocVT == MVT::v4i1630.7k
||
580
31.3k
      
LocVT == MVT::v4f1630.3k
||
581
31.3k
      
LocVT == MVT::v8i830.2k
||
582
31.3k
      
LocVT == MVT::v2f3229.8k
) {
583
1.63k
    LocVT = MVT::f64;
584
1.63k
    LocInfo = CCValAssign::BCvt;
585
1.63k
  }
586
31.3k
587
31.3k
  if (LocVT == MVT::v2i64 ||
588
31.3k
      
LocVT == MVT::v4i3231.1k
||
589
31.3k
      
LocVT == MVT::v8i1630.6k
||
590
31.3k
      
LocVT == MVT::v8f1630.2k
||
591
31.3k
      
LocVT == MVT::v16i830.2k
||
592
31.3k
      
LocVT == MVT::v4f3229.9k
) {
593
1.53k
    LocVT = MVT::v2f64;
594
1.53k
    LocInfo = CCValAssign::BCvt;
595
1.53k
  }
596
31.3k
597
31.3k
  if (ArgFlags.isSwiftSelf()) {
598
0
    if (LocVT == MVT::i32) {
599
0
      if (unsigned Reg = State.AllocateReg(ARM::R10)) {
600
0
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
601
0
        return false;
602
0
      }
603
31.3k
    }
604
0
  }
605
31.3k
606
31.3k
  if (ArgFlags.isSwiftError()) {
607
12
    if (LocVT == MVT::i32) {
608
12
      if (unsigned Reg = State.AllocateReg(ARM::R8)) {
609
12
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
610
12
        return false;
611
12
      }
612
31.3k
    }
613
12
  }
614
31.3k
615
31.3k
  if (LocVT == MVT::f64 ||
616
31.3k
      
LocVT == MVT::v2f6428.9k
) {
617
3.97k
    if (RetCC_ARM_AAPCS_Custom_f64(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
618
3.92k
        return false;
619
27.4k
  }
620
27.4k
621
27.4k
  if (LocVT == MVT::f32) {
622
1.86k
    LocVT = MVT::i32;
623
1.86k
    LocInfo = CCValAssign::BCvt;
624
1.86k
  }
625
27.4k
626
27.4k
  if (!RetCC_ARM_AAPCS_Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
627
27.1k
    return false;
628
235
629
235
  return true;  // CC didn't match.
630
235
}
631
632
633
static bool RetCC_ARM_AAPCS_Common(unsigned ValNo, MVT ValVT,
634
                                   MVT LocVT, CCValAssign::LocInfo LocInfo,
635
53.8k
                                   ISD::ArgFlagsTy ArgFlags, CCState &State) {
636
53.8k
637
53.8k
  if (LocVT == MVT::i1 ||
638
53.8k
      
LocVT == MVT::i853.8k
||
639
53.8k
      
LocVT == MVT::i1653.7k
) {
640
95
    LocVT = MVT::i32;
641
95
    if (ArgFlags.isSExt())
642
10
        LocInfo = CCValAssign::SExt;
643
85
    else if (ArgFlags.isZExt())
644
6
        LocInfo = CCValAssign::ZExt;
645
79
    else
646
79
        LocInfo = CCValAssign::AExt;
647
95
  }
648
53.8k
649
53.8k
  if (LocVT == MVT::i32) {
650
53.5k
    static const MCPhysReg RegList1[] = {
651
53.5k
      ARM::R0, ARM::R1, ARM::R2, ARM::R3
652
53.5k
    };
653
53.5k
    if (unsigned Reg = State.AllocateReg(RegList1)) {
654
53.5k
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
655
53.5k
      return false;
656
53.5k
    }
657
281
  }
658
281
659
281
  if (LocVT == MVT::i64) {
660
0
    static const MCPhysReg RegList2[] = {
661
0
      ARM::R0, ARM::R2
662
0
    };
663
0
    static const MCPhysReg RegList3[] = {
664
0
      ARM::R1, ARM::R3
665
0
    };
666
0
    if (unsigned Reg = State.AllocateReg(RegList2, RegList3)) {
667
0
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
668
0
      return false;
669
0
    }
670
281
  }
671
281
672
281
  return true;  // CC didn't match.
673
281
}
ARMFastISel.cpp:RetCC_ARM_AAPCS_Common(unsigned int, llvm::MVT, llvm::MVT, llvm::CCValAssign::LocInfo, llvm::ISD::ArgFlagsTy, llvm::CCState&)
Line
Count
Source
635
258
                                   ISD::ArgFlagsTy ArgFlags, CCState &State) {
636
258
637
258
  if (LocVT == MVT::i1 ||
638
258
      
LocVT == MVT::i8255
||
639
258
      
LocVT == MVT::i16249
) {
640
15
    LocVT = MVT::i32;
641
15
    if (ArgFlags.isSExt())
642
0
        LocInfo = CCValAssign::SExt;
643
15
    else if (ArgFlags.isZExt())
644
0
        LocInfo = CCValAssign::ZExt;
645
15
    else
646
15
        LocInfo = CCValAssign::AExt;
647
15
  }
648
258
649
258
  if (LocVT == MVT::i32) {
650
258
    static const MCPhysReg RegList1[] = {
651
258
      ARM::R0, ARM::R1, ARM::R2, ARM::R3
652
258
    };
653
258
    if (unsigned Reg = State.AllocateReg(RegList1)) {
654
258
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
655
258
      return false;
656
258
    }
657
0
  }
658
0
659
0
  if (LocVT == MVT::i64) {
660
0
    static const MCPhysReg RegList2[] = {
661
0
      ARM::R0, ARM::R2
662
0
    };
663
0
    static const MCPhysReg RegList3[] = {
664
0
      ARM::R1, ARM::R3
665
0
    };
666
0
    if (unsigned Reg = State.AllocateReg(RegList2, RegList3)) {
667
0
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
668
0
      return false;
669
0
    }
670
0
  }
671
0
672
0
  return true;  // CC didn't match.
673
0
}
ARMISelLowering.cpp:RetCC_ARM_AAPCS_Common(unsigned int, llvm::MVT, llvm::MVT, llvm::CCValAssign::LocInfo, llvm::ISD::ArgFlagsTy, llvm::CCState&)
Line
Count
Source
635
53.5k
                                   ISD::ArgFlagsTy ArgFlags, CCState &State) {
636
53.5k
637
53.5k
  if (LocVT == MVT::i1 ||
638
53.5k
      
LocVT == MVT::i853.5k
||
639
53.5k
      
LocVT == MVT::i1653.5k
) {
640
80
    LocVT = MVT::i32;
641
80
    if (ArgFlags.isSExt())
642
10
        LocInfo = CCValAssign::SExt;
643
70
    else if (ArgFlags.isZExt())
644
6
        LocInfo = CCValAssign::ZExt;
645
64
    else
646
64
        LocInfo = CCValAssign::AExt;
647
80
  }
648
53.5k
649
53.5k
  if (LocVT == MVT::i32) {
650
53.3k
    static const MCPhysReg RegList1[] = {
651
53.3k
      ARM::R0, ARM::R1, ARM::R2, ARM::R3
652
53.3k
    };
653
53.3k
    if (unsigned Reg = State.AllocateReg(RegList1)) {
654
53.2k
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
655
53.2k
      return false;
656
53.2k
    }
657
281
  }
658
281
659
281
  if (LocVT == MVT::i64) {
660
0
    static const MCPhysReg RegList2[] = {
661
0
      ARM::R0, ARM::R2
662
0
    };
663
0
    static const MCPhysReg RegList3[] = {
664
0
      ARM::R1, ARM::R3
665
0
    };
666
0
    if (unsigned Reg = State.AllocateReg(RegList2, RegList3)) {
667
0
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
668
0
      return false;
669
0
    }
670
281
  }
671
281
672
281
  return true;  // CC didn't match.
673
281
}
674
675
676
static bool RetCC_ARM_AAPCS_VFP(unsigned ValNo, MVT ValVT,
677
                                MVT LocVT, CCValAssign::LocInfo LocInfo,
678
30.8k
                                ISD::ArgFlagsTy ArgFlags, CCState &State) {
679
30.8k
680
30.8k
  if (LocVT == MVT::v1i64 ||
681
30.8k
      
LocVT == MVT::v2i3230.8k
||
682
30.8k
      
LocVT == MVT::v4i1630.8k
||
683
30.8k
      
LocVT == MVT::v4f1630.7k
||
684
30.8k
      
LocVT == MVT::v8i830.5k
||
685
30.8k
      
LocVT == MVT::v2f3230.5k
) {
686
374
    LocVT = MVT::f64;
687
374
    LocInfo = CCValAssign::BCvt;
688
374
  }
689
30.8k
690
30.8k
  if (LocVT == MVT::v2i64 ||
691
30.8k
      
LocVT == MVT::v4i3230.8k
||
692
30.8k
      
LocVT == MVT::v8i1630.7k
||
693
30.8k
      
LocVT == MVT::v8f1630.6k
||
694
30.8k
      
LocVT == MVT::v16i830.5k
||
695
30.8k
      
LocVT == MVT::v4f3230.4k
) {
696
532
    LocVT = MVT::v2f64;
697
532
    LocInfo = CCValAssign::BCvt;
698
532
  }
699
30.8k
700
30.8k
  if (ArgFlags.isSwiftSelf()) {
701
0
    if (LocVT == MVT::i32) {
702
0
      if (unsigned Reg = State.AllocateReg(ARM::R10)) {
703
0
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
704
0
        return false;
705
0
      }
706
30.8k
    }
707
0
  }
708
30.8k
709
30.8k
  if (ArgFlags.isSwiftError()) {
710
36
    if (LocVT == MVT::i32) {
711
36
      if (unsigned Reg = State.AllocateReg(ARM::R8)) {
712
36
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
713
36
        return false;
714
36
      }
715
30.8k
    }
716
36
  }
717
30.8k
718
30.8k
  if (LocVT == MVT::v2f64) {
719
560
    static const MCPhysReg RegList1[] = {
720
560
      ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
721
560
    };
722
560
    if (unsigned Reg = State.AllocateReg(RegList1)) {
723
560
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
724
560
      return false;
725
560
    }
726
30.2k
  }
727
30.2k
728
30.2k
  if (LocVT == MVT::f64) {
729
2.15k
    static const MCPhysReg RegList2[] = {
730
2.15k
      ARM::D0, ARM::D1, ARM::D2, ARM::D3, ARM::D4, ARM::D5, ARM::D6, ARM::D7
731
2.15k
    };
732
2.15k
    if (unsigned Reg = State.AllocateReg(RegList2)) {
733
2.15k
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
734
2.15k
      return false;
735
2.15k
    }
736
28.1k
  }
737
28.1k
738
28.1k
  if (LocVT == MVT::f32) {
739
1.94k
    static const MCPhysReg RegList3[] = {
740
1.94k
      ARM::S0, ARM::S1, ARM::S2, ARM::S3, ARM::S4, ARM::S5, ARM::S6, ARM::S7, ARM::S8, ARM::S9, ARM::S10, ARM::S11, ARM::S12, ARM::S13, ARM::S14, ARM::S15
741
1.94k
    };
742
1.94k
    if (unsigned Reg = State.AllocateReg(RegList3)) {
743
1.94k
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
744
1.94k
      return false;
745
1.94k
    }
746
26.1k
  }
747
26.1k
748
26.1k
  if (!RetCC_ARM_AAPCS_Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
749
26.1k
    return false;
750
46
751
46
  return true;  // CC didn't match.
752
46
}
ARMFastISel.cpp:RetCC_ARM_AAPCS_VFP(unsigned int, llvm::MVT, llvm::MVT, llvm::CCValAssign::LocInfo, llvm::ISD::ArgFlagsTy, llvm::CCState&)
Line
Count
Source
678
65
                                ISD::ArgFlagsTy ArgFlags, CCState &State) {
679
65
680
65
  if (LocVT == MVT::v1i64 ||
681
65
      LocVT == MVT::v2i32 ||
682
65
      LocVT == MVT::v4i16 ||
683
65
      LocVT == MVT::v4f16 ||
684
65
      LocVT == MVT::v8i8 ||
685
65
      LocVT == MVT::v2f32) {
686
0
    LocVT = MVT::f64;
687
0
    LocInfo = CCValAssign::BCvt;
688
0
  }
689
65
690
65
  if (LocVT == MVT::v2i64 ||
691
65
      LocVT == MVT::v4i32 ||
692
65
      LocVT == MVT::v8i16 ||
693
65
      LocVT == MVT::v8f16 ||
694
65
      LocVT == MVT::v16i8 ||
695
65
      LocVT == MVT::v4f32) {
696
4
    LocVT = MVT::v2f64;
697
4
    LocInfo = CCValAssign::BCvt;
698
4
  }
699
65
700
65
  if (ArgFlags.isSwiftSelf()) {
701
0
    if (LocVT == MVT::i32) {
702
0
      if (unsigned Reg = State.AllocateReg(ARM::R10)) {
703
0
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
704
0
        return false;
705
0
      }
706
65
    }
707
0
  }
708
65
709
65
  if (ArgFlags.isSwiftError()) {
710
0
    if (LocVT == MVT::i32) {
711
0
      if (unsigned Reg = State.AllocateReg(ARM::R8)) {
712
0
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
713
0
        return false;
714
0
      }
715
65
    }
716
0
  }
717
65
718
65
  if (LocVT == MVT::v2f64) {
719
4
    static const MCPhysReg RegList1[] = {
720
4
      ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
721
4
    };
722
4
    if (unsigned Reg = State.AllocateReg(RegList1)) {
723
4
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
724
4
      return false;
725
4
    }
726
61
  }
727
61
728
61
  if (LocVT == MVT::f64) {
729
12
    static const MCPhysReg RegList2[] = {
730
12
      ARM::D0, ARM::D1, ARM::D2, ARM::D3, ARM::D4, ARM::D5, ARM::D6, ARM::D7
731
12
    };
732
12
    if (unsigned Reg = State.AllocateReg(RegList2)) {
733
12
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
734
12
      return false;
735
12
    }
736
49
  }
737
49
738
49
  if (LocVT == MVT::f32) {
739
3
    static const MCPhysReg RegList3[] = {
740
3
      ARM::S0, ARM::S1, ARM::S2, ARM::S3, ARM::S4, ARM::S5, ARM::S6, ARM::S7, ARM::S8, ARM::S9, ARM::S10, ARM::S11, ARM::S12, ARM::S13, ARM::S14, ARM::S15
741
3
    };
742
3
    if (unsigned Reg = State.AllocateReg(RegList3)) {
743
3
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
744
3
      return false;
745
3
    }
746
46
  }
747
46
748
46
  if (!RetCC_ARM_AAPCS_Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
749
46
    return false;
750
0
751
0
  return true;  // CC didn't match.
752
0
}
ARMISelLowering.cpp:RetCC_ARM_AAPCS_VFP(unsigned int, llvm::MVT, llvm::MVT, llvm::CCValAssign::LocInfo, llvm::ISD::ArgFlagsTy, llvm::CCState&)
Line
Count
Source
678
30.7k
                                ISD::ArgFlagsTy ArgFlags, CCState &State) {
679
30.7k
680
30.7k
  if (LocVT == MVT::v1i64 ||
681
30.7k
      
LocVT == MVT::v2i3230.7k
||
682
30.7k
      
LocVT == MVT::v4i1630.7k
||
683
30.7k
      
LocVT == MVT::v4f1630.6k
||
684
30.7k
      
LocVT == MVT::v8i830.4k
||
685
30.7k
      
LocVT == MVT::v2f3230.4k
) {
686
374
    LocVT = MVT::f64;
687
374
    LocInfo = CCValAssign::BCvt;
688
374
  }
689
30.7k
690
30.7k
  if (LocVT == MVT::v2i64 ||
691
30.7k
      
LocVT == MVT::v4i3230.7k
||
692
30.7k
      
LocVT == MVT::v8i1630.6k
||
693
30.7k
      
LocVT == MVT::v8f1630.6k
||
694
30.7k
      
LocVT == MVT::v16i830.4k
||
695
30.7k
      
LocVT == MVT::v4f3230.4k
) {
696
528
    LocVT = MVT::v2f64;
697
528
    LocInfo = CCValAssign::BCvt;
698
528
  }
699
30.7k
700
30.7k
  if (ArgFlags.isSwiftSelf()) {
701
0
    if (LocVT == MVT::i32) {
702
0
      if (unsigned Reg = State.AllocateReg(ARM::R10)) {
703
0
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
704
0
        return false;
705
0
      }
706
30.7k
    }
707
0
  }
708
30.7k
709
30.7k
  if (ArgFlags.isSwiftError()) {
710
36
    if (LocVT == MVT::i32) {
711
36
      if (unsigned Reg = State.AllocateReg(ARM::R8)) {
712
36
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
713
36
        return false;
714
36
      }
715
30.7k
    }
716
36
  }
717
30.7k
718
30.7k
  if (LocVT == MVT::v2f64) {
719
556
    static const MCPhysReg RegList1[] = {
720
556
      ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
721
556
    };
722
556
    if (unsigned Reg = State.AllocateReg(RegList1)) {
723
556
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
724
556
      return false;
725
556
    }
726
30.2k
  }
727
30.2k
728
30.2k
  if (LocVT == MVT::f64) {
729
2.14k
    static const MCPhysReg RegList2[] = {
730
2.14k
      ARM::D0, ARM::D1, ARM::D2, ARM::D3, ARM::D4, ARM::D5, ARM::D6, ARM::D7
731
2.14k
    };
732
2.14k
    if (unsigned Reg = State.AllocateReg(RegList2)) {
733
2.14k
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
734
2.14k
      return false;
735
2.14k
    }
736
28.0k
  }
737
28.0k
738
28.0k
  if (LocVT == MVT::f32) {
739
1.93k
    static const MCPhysReg RegList3[] = {
740
1.93k
      ARM::S0, ARM::S1, ARM::S2, ARM::S3, ARM::S4, ARM::S5, ARM::S6, ARM::S7, ARM::S8, ARM::S9, ARM::S10, ARM::S11, ARM::S12, ARM::S13, ARM::S14, ARM::S15
741
1.93k
    };
742
1.93k
    if (unsigned Reg = State.AllocateReg(RegList3)) {
743
1.93k
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
744
1.93k
      return false;
745
1.93k
    }
746
26.1k
  }
747
26.1k
748
26.1k
  if (!RetCC_ARM_AAPCS_Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
749
26.0k
    return false;
750
46
751
46
  return true;  // CC didn't match.
752
46
}
753
754
755
static bool RetCC_ARM_APCS(unsigned ValNo, MVT ValVT,
756
                           MVT LocVT, CCValAssign::LocInfo LocInfo,
757
51.1k
                           ISD::ArgFlagsTy ArgFlags, CCState &State) {
758
51.1k
759
51.1k
  if (LocVT == MVT::i1 ||
760
51.1k
      
LocVT == MVT::i851.1k
||
761
51.1k
      
LocVT == MVT::i1651.1k
) {
762
30
    LocVT = MVT::i32;
763
30
    if (ArgFlags.isSExt())
764
0
        LocInfo = CCValAssign::SExt;
765
30
    else if (ArgFlags.isZExt())
766
0
        LocInfo = CCValAssign::ZExt;
767
30
    else
768
30
        LocInfo = CCValAssign::AExt;
769
30
  }
770
51.1k
771
51.1k
  if (LocVT == MVT::f32) {
772
528
    LocVT = MVT::i32;
773
528
    LocInfo = CCValAssign::BCvt;
774
528
  }
775
51.1k
776
51.1k
  if (ArgFlags.isSwiftSelf()) {
777
0
    if (LocVT == MVT::i32) {
778
0
      if (unsigned Reg = State.AllocateReg(ARM::R10)) {
779
0
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
780
0
        return false;
781
0
      }
782
51.1k
    }
783
0
  }
784
51.1k
785
51.1k
  if (ArgFlags.isSwiftError()) {
786
24
    if (LocVT == MVT::i32) {
787
24
      if (unsigned Reg = State.AllocateReg(ARM::R8)) {
788
24
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
789
24
        return false;
790
24
      }
791
51.1k
    }
792
24
  }
793
51.1k
794
51.1k
  if (LocVT == MVT::v1i64 ||
795
51.1k
      
LocVT == MVT::v2i3251.0k
||
796
51.1k
      
LocVT == MVT::v4i1651.0k
||
797
51.1k
      
LocVT == MVT::v8i851.0k
||
798
51.1k
      
LocVT == MVT::v2f3251.0k
) {
799
128
    LocVT = MVT::f64;
800
128
    LocInfo = CCValAssign::BCvt;
801
128
  }
802
51.1k
803
51.1k
  if (LocVT == MVT::v2i64 ||
804
51.1k
      
LocVT == MVT::v4i3251.0k
||
805
51.1k
      
LocVT == MVT::v8i1651.0k
||
806
51.1k
      
LocVT == MVT::v16i851.0k
||
807
51.1k
      
LocVT == MVT::v4f3251.0k
) {
808
139
    LocVT = MVT::v2f64;
809
139
    LocInfo = CCValAssign::BCvt;
810
139
  }
811
51.1k
812
51.1k
  if (LocVT == MVT::f64 ||
813
51.1k
      
LocVT == MVT::v2f6450.6k
) {
814
660
    if (RetCC_ARM_APCS_Custom_f64(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
815
656
        return false;
816
50.4k
  }
817
50.4k
818
50.4k
  if (LocVT == MVT::i32) {
819
50.4k
    static const MCPhysReg RegList1[] = {
820
50.4k
      ARM::R0, ARM::R1, ARM::R2, ARM::R3
821
50.4k
    };
822
50.4k
    if (unsigned Reg = State.AllocateReg(RegList1)) {
823
50.4k
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
824
50.4k
      return false;
825
50.4k
    }
826
5
  }
827
5
828
5
  if (LocVT == MVT::i64) {
829
0
    static const MCPhysReg RegList2[] = {
830
0
      ARM::R0, ARM::R2
831
0
    };
832
0
    static const MCPhysReg RegList3[] = {
833
0
      ARM::R1, ARM::R3
834
0
    };
835
0
    if (unsigned Reg = State.AllocateReg(RegList2, RegList3)) {
836
0
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
837
0
      return false;
838
0
    }
839
5
  }
840
5
841
5
  return true;  // CC didn't match.
842
5
}
ARMFastISel.cpp:RetCC_ARM_APCS(unsigned int, llvm::MVT, llvm::MVT, llvm::CCValAssign::LocInfo, llvm::ISD::ArgFlagsTy, llvm::CCState&)
Line
Count
Source
757
452
                           ISD::ArgFlagsTy ArgFlags, CCState &State) {
758
452
759
452
  if (LocVT == MVT::i1 ||
760
452
      
LocVT == MVT::i8446
||
761
452
      
LocVT == MVT::i16434
) {
762
30
    LocVT = MVT::i32;
763
30
    if (ArgFlags.isSExt())
764
0
        LocInfo = CCValAssign::SExt;
765
30
    else if (ArgFlags.isZExt())
766
0
        LocInfo = CCValAssign::ZExt;
767
30
    else
768
30
        LocInfo = CCValAssign::AExt;
769
30
  }
770
452
771
452
  if (LocVT == MVT::f32) {
772
10
    LocVT = MVT::i32;
773
10
    LocInfo = CCValAssign::BCvt;
774
10
  }
775
452
776
452
  if (ArgFlags.isSwiftSelf()) {
777
0
    if (LocVT == MVT::i32) {
778
0
      if (unsigned Reg = State.AllocateReg(ARM::R10)) {
779
0
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
780
0
        return false;
781
0
      }
782
452
    }
783
0
  }
784
452
785
452
  if (ArgFlags.isSwiftError()) {
786
0
    if (LocVT == MVT::i32) {
787
0
      if (unsigned Reg = State.AllocateReg(ARM::R8)) {
788
0
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
789
0
        return false;
790
0
      }
791
452
    }
792
0
  }
793
452
794
452
  if (LocVT == MVT::v1i64 ||
795
452
      LocVT == MVT::v2i32 ||
796
452
      LocVT == MVT::v4i16 ||
797
452
      LocVT == MVT::v8i8 ||
798
452
      LocVT == MVT::v2f32) {
799
0
    LocVT = MVT::f64;
800
0
    LocInfo = CCValAssign::BCvt;
801
0
  }
802
452
803
452
  if (LocVT == MVT::v2i64 ||
804
452
      LocVT == MVT::v4i32 ||
805
452
      LocVT == MVT::v8i16 ||
806
452
      LocVT == MVT::v16i8 ||
807
452
      
LocVT == MVT::v4f32448
) {
808
5
    LocVT = MVT::v2f64;
809
5
    LocInfo = CCValAssign::BCvt;
810
5
  }
811
452
812
452
  if (LocVT == MVT::f64 ||
813
452
      LocVT == MVT::v2f64) {
814
5
    if (RetCC_ARM_APCS_Custom_f64(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
815
5
        return false;
816
447
  }
817
447
818
447
  if (LocVT == MVT::i32) {
819
447
    static const MCPhysReg RegList1[] = {
820
447
      ARM::R0, ARM::R1, ARM::R2, ARM::R3
821
447
    };
822
447
    if (unsigned Reg = State.AllocateReg(RegList1)) {
823
447
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
824
447
      return false;
825
447
    }
826
0
  }
827
0
828
0
  if (LocVT == MVT::i64) {
829
0
    static const MCPhysReg RegList2[] = {
830
0
      ARM::R0, ARM::R2
831
0
    };
832
0
    static const MCPhysReg RegList3[] = {
833
0
      ARM::R1, ARM::R3
834
0
    };
835
0
    if (unsigned Reg = State.AllocateReg(RegList2, RegList3)) {
836
0
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
837
0
      return false;
838
0
    }
839
0
  }
840
0
841
0
  return true;  // CC didn't match.
842
0
}
ARMISelLowering.cpp:RetCC_ARM_APCS(unsigned int, llvm::MVT, llvm::MVT, llvm::CCValAssign::LocInfo, llvm::ISD::ArgFlagsTy, llvm::CCState&)
Line
Count
Source
757
50.6k
                           ISD::ArgFlagsTy ArgFlags, CCState &State) {
758
50.6k
759
50.6k
  if (LocVT == MVT::i1 ||
760
50.6k
      LocVT == MVT::i8 ||
761
50.6k
      LocVT == MVT::i16) {
762
0
    LocVT = MVT::i32;
763
0
    if (ArgFlags.isSExt())
764
0
        LocInfo = CCValAssign::SExt;
765
0
    else if (ArgFlags.isZExt())
766
0
        LocInfo = CCValAssign::ZExt;
767
0
    else
768
0
        LocInfo = CCValAssign::AExt;
769
0
  }
770
50.6k
771
50.6k
  if (LocVT == MVT::f32) {
772
518
    LocVT = MVT::i32;
773
518
    LocInfo = CCValAssign::BCvt;
774
518
  }
775
50.6k
776
50.6k
  if (ArgFlags.isSwiftSelf()) {
777
0
    if (LocVT == MVT::i32) {
778
0
      if (unsigned Reg = State.AllocateReg(ARM::R10)) {
779
0
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
780
0
        return false;
781
0
      }
782
50.6k
    }
783
0
  }
784
50.6k
785
50.6k
  if (ArgFlags.isSwiftError()) {
786
24
    if (LocVT == MVT::i32) {
787
24
      if (unsigned Reg = State.AllocateReg(ARM::R8)) {
788
24
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
789
24
        return false;
790
24
      }
791
50.6k
    }
792
24
  }
793
50.6k
794
50.6k
  if (LocVT == MVT::v1i64 ||
795
50.6k
      
LocVT == MVT::v2i3250.6k
||
796
50.6k
      
LocVT == MVT::v4i1650.6k
||
797
50.6k
      
LocVT == MVT::v8i850.6k
||
798
50.6k
      
LocVT == MVT::v2f3250.5k
) {
799
128
    LocVT = MVT::f64;
800
128
    LocInfo = CCValAssign::BCvt;
801
128
  }
802
50.6k
803
50.6k
  if (LocVT == MVT::v2i64 ||
804
50.6k
      
LocVT == MVT::v4i3250.6k
||
805
50.6k
      
LocVT == MVT::v8i1650.6k
||
806
50.6k
      
LocVT == MVT::v16i850.6k
||
807
50.6k
      
LocVT == MVT::v4f3250.5k
) {
808
134
    LocVT = MVT::v2f64;
809
134
    LocInfo = CCValAssign::BCvt;
810
134
  }
811
50.6k
812
50.6k
  if (LocVT == MVT::f64 ||
813
50.6k
      
LocVT == MVT::v2f6450.1k
) {
814
655
    if (RetCC_ARM_APCS_Custom_f64(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
815
651
        return false;
816
50.0k
  }
817
50.0k
818
50.0k
  if (LocVT == MVT::i32) {
819
49.9k
    static const MCPhysReg RegList1[] = {
820
49.9k
      ARM::R0, ARM::R1, ARM::R2, ARM::R3
821
49.9k
    };
822
49.9k
    if (unsigned Reg = State.AllocateReg(RegList1)) {
823
49.9k
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
824
49.9k
      return false;
825
49.9k
    }
826
5
  }
827
5
828
5
  if (LocVT == MVT::i64) {
829
0
    static const MCPhysReg RegList2[] = {
830
0
      ARM::R0, ARM::R2
831
0
    };
832
0
    static const MCPhysReg RegList3[] = {
833
0
      ARM::R1, ARM::R3
834
0
    };
835
0
    if (unsigned Reg = State.AllocateReg(RegList2, RegList3)) {
836
0
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
837
0
      return false;
838
0
    }
839
5
  }
840
5
841
5
  return true;  // CC didn't match.
842
5
}
843
844
845
static bool RetFastCC_ARM_APCS(unsigned ValNo, MVT ValVT,
846
                               MVT LocVT, CCValAssign::LocInfo LocInfo,
847
1.30k
                               ISD::ArgFlagsTy ArgFlags, CCState &State) {
848
1.30k
849
1.30k
  if (LocVT == MVT::v1i64 ||
850
1.30k
      LocVT == MVT::v2i32 ||
851
1.30k
      LocVT == MVT::v4i16 ||
852
1.30k
      LocVT == MVT::v8i8 ||
853
1.30k
      LocVT == MVT::v2f32) {
854
0
    LocVT = MVT::f64;
855
0
    LocInfo = CCValAssign::BCvt;
856
0
  }
857
1.30k
858
1.30k
  if (LocVT == MVT::v2i64 ||
859
1.30k
      LocVT == MVT::v4i32 ||
860
1.30k
      LocVT == MVT::v8i16 ||
861
1.30k
      LocVT == MVT::v16i8 ||
862
1.30k
      LocVT == MVT::v4f32) {
863
0
    LocVT = MVT::v2f64;
864
0
    LocInfo = CCValAssign::BCvt;
865
0
  }
866
1.30k
867
1.30k
  if (LocVT == MVT::v2f64) {
868
0
    static const MCPhysReg RegList1[] = {
869
0
      ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
870
0
    };
871
0
    if (unsigned Reg = State.AllocateReg(RegList1)) {
872
0
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
873
0
      return false;
874
0
    }
875
1.30k
  }
876
1.30k
877
1.30k
  if (LocVT == MVT::f64) {
878
8
    static const MCPhysReg RegList2[] = {
879
8
      ARM::D0, ARM::D1, ARM::D2, ARM::D3, ARM::D4, ARM::D5, ARM::D6, ARM::D7
880
8
    };
881
8
    if (unsigned Reg = State.AllocateReg(RegList2)) {
882
8
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
883
8
      return false;
884
8
    }
885
1.29k
  }
886
1.29k
887
1.29k
  if (LocVT == MVT::f32) {
888
4
    static const MCPhysReg RegList3[] = {
889
4
      ARM::S0, ARM::S1, ARM::S2, ARM::S3, ARM::S4, ARM::S5, ARM::S6, ARM::S7, ARM::S8, ARM::S9, ARM::S10, ARM::S11, ARM::S12, ARM::S13, ARM::S14, ARM::S15
890
4
    };
891
4
    if (unsigned Reg = State.AllocateReg(RegList3)) {
892
4
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
893
4
      return false;
894
4
    }
895
1.29k
  }
896
1.29k
897
1.29k
  if (!RetCC_ARM_APCS(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
898
1.29k
    return false;
899
0
900
0
  return true;  // CC didn't match.
901
0
}
Unexecuted instantiation: ARMFastISel.cpp:RetFastCC_ARM_APCS(unsigned int, llvm::MVT, llvm::MVT, llvm::CCValAssign::LocInfo, llvm::ISD::ArgFlagsTy, llvm::CCState&)
ARMISelLowering.cpp:RetFastCC_ARM_APCS(unsigned int, llvm::MVT, llvm::MVT, llvm::CCValAssign::LocInfo, llvm::ISD::ArgFlagsTy, llvm::CCState&)
Line
Count
Source
847
1.30k
                               ISD::ArgFlagsTy ArgFlags, CCState &State) {
848
1.30k
849
1.30k
  if (LocVT == MVT::v1i64 ||
850
1.30k
      LocVT == MVT::v2i32 ||
851
1.30k
      LocVT == MVT::v4i16 ||
852
1.30k
      LocVT == MVT::v8i8 ||
853
1.30k
      LocVT == MVT::v2f32) {
854
0
    LocVT = MVT::f64;
855
0
    LocInfo = CCValAssign::BCvt;
856
0
  }
857
1.30k
858
1.30k
  if (LocVT == MVT::v2i64 ||
859
1.30k
      LocVT == MVT::v4i32 ||
860
1.30k
      LocVT == MVT::v8i16 ||
861
1.30k
      LocVT == MVT::v16i8 ||
862
1.30k
      LocVT == MVT::v4f32) {
863
0
    LocVT = MVT::v2f64;
864
0
    LocInfo = CCValAssign::BCvt;
865
0
  }
866
1.30k
867
1.30k
  if (LocVT == MVT::v2f64) {
868
0
    static const MCPhysReg RegList1[] = {
869
0
      ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3
870
0
    };
871
0
    if (unsigned Reg = State.AllocateReg(RegList1)) {
872
0
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
873
0
      return false;
874
0
    }
875
1.30k
  }
876
1.30k
877
1.30k
  if (LocVT == MVT::f64) {
878
8
    static const MCPhysReg RegList2[] = {
879
8
      ARM::D0, ARM::D1, ARM::D2, ARM::D3, ARM::D4, ARM::D5, ARM::D6, ARM::D7
880
8
    };
881
8
    if (unsigned Reg = State.AllocateReg(RegList2)) {
882
8
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
883
8
      return false;
884
8
    }
885
1.29k
  }
886
1.29k
887
1.29k
  if (LocVT == MVT::f32) {
888
4
    static const MCPhysReg RegList3[] = {
889
4
      ARM::S0, ARM::S1, ARM::S2, ARM::S3, ARM::S4, ARM::S5, ARM::S6, ARM::S7, ARM::S8, ARM::S9, ARM::S10, ARM::S11, ARM::S12, ARM::S13, ARM::S14, ARM::S15
890
4
    };
891
4
    if (unsigned Reg = State.AllocateReg(RegList3)) {
892
4
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
893
4
      return false;
894
4
    }
895
1.29k
  }
896
1.29k
897
1.29k
  if (!RetCC_ARM_APCS(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
898
1.29k
    return false;
899
0
900
0
  return true;  // CC didn't match.
901
0
}