Coverage Report

Created: 2018-12-14 11:24

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/clang-build/lib/Target/BPF/BPFGenCallingConv.inc
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Source (jump to first uncovered line)
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/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
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|*                                                                            *|
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|* Calling Convention Implementation Fragment                                 *|
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|*                                                                            *|
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|* Automatically generated file, do not edit!                                 *|
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|*                                                                            *|
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\*===----------------------------------------------------------------------===*/
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static bool CC_BPF32(unsigned ValNo, MVT ValVT,
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                     MVT LocVT, CCValAssign::LocInfo LocInfo,
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                     ISD::ArgFlagsTy ArgFlags, CCState &State);
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static bool CC_BPF64(unsigned ValNo, MVT ValVT,
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                     MVT LocVT, CCValAssign::LocInfo LocInfo,
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                     ISD::ArgFlagsTy ArgFlags, CCState &State);
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static bool RetCC_BPF32(unsigned ValNo, MVT ValVT,
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                        MVT LocVT, CCValAssign::LocInfo LocInfo,
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                        ISD::ArgFlagsTy ArgFlags, CCState &State);
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static bool RetCC_BPF64(unsigned ValNo, MVT ValVT,
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                        MVT LocVT, CCValAssign::LocInfo LocInfo,
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                        ISD::ArgFlagsTy ArgFlags, CCState &State);
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static bool CC_BPF32(unsigned ValNo, MVT ValVT,
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                     MVT LocVT, CCValAssign::LocInfo LocInfo,
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                     ISD::ArgFlagsTy ArgFlags, CCState &State) {
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  if (LocVT == MVT::i32) {
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    static const MCPhysReg RegList1[] = {
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      BPF::W1, BPF::W2, BPF::W3, BPF::W4, BPF::W5
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    };
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    static const MCPhysReg RegList2[] = {
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      BPF::R1, BPF::R2, BPF::R3, BPF::R4, BPF::R5
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    };
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    if (unsigned Reg = State.AllocateReg(RegList1, RegList2)) {
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      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
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      return false;
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    }
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  }
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  if (LocVT == MVT::i64) {
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    static const MCPhysReg RegList3[] = {
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      BPF::R1, BPF::R2, BPF::R3, BPF::R4, BPF::R5
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    };
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    static const MCPhysReg RegList4[] = {
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      BPF::W1, BPF::W2, BPF::W3, BPF::W4, BPF::W5
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    };
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    if (unsigned Reg = State.AllocateReg(RegList3, RegList4)) {
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      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
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      return false;
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    }
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0
  }
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  unsigned Offset5 = State.AllocateStack(8, 8);
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0
  State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset5, LocVT, LocInfo));
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  return false;
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  return true;  // CC didn't match.
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0
}
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static bool CC_BPF64(unsigned ValNo, MVT ValVT,
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                     MVT LocVT, CCValAssign::LocInfo LocInfo,
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                     ISD::ArgFlagsTy ArgFlags, CCState &State) {
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  if (LocVT == MVT::i8 ||
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      LocVT == MVT::i16 ||
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      LocVT == MVT::i32) {
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0
    LocVT = MVT::i64;
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0
    if (ArgFlags.isSExt())
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        LocInfo = CCValAssign::SExt;
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    else if (ArgFlags.isZExt())
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        LocInfo = CCValAssign::ZExt;
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    else
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        LocInfo = CCValAssign::AExt;
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0
  }
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  if (LocVT == MVT::i64) {
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    static const MCPhysReg RegList1[] = {
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      BPF::R1, BPF::R2, BPF::R3, BPF::R4, BPF::R5
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    };
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    if (unsigned Reg = State.AllocateReg(RegList1)) {
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      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
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      return false;
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    }
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  }
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  unsigned Offset2 = State.AllocateStack(8, 8);
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  State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset2, LocVT, LocInfo));
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  return false;
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return true0
; // CC didn't match.
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}
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static bool RetCC_BPF32(unsigned ValNo, MVT ValVT,
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                        MVT LocVT, CCValAssign::LocInfo LocInfo,
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                        ISD::ArgFlagsTy ArgFlags, CCState &State) {
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  if (LocVT == MVT::i32) {
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    if (unsigned Reg = State.AllocateReg(BPF::W0, BPF::R0)) {
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      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
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      return false;
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    }
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  }
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  if (LocVT == MVT::i64) {
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    if (unsigned Reg = State.AllocateReg(BPF::R0, BPF::W0)) {
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      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
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      return false;
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    }
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  }
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  return true;  // CC didn't match.
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0
}
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static bool RetCC_BPF64(unsigned ValNo, MVT ValVT,
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                        MVT LocVT, CCValAssign::LocInfo LocInfo,
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                        ISD::ArgFlagsTy ArgFlags, CCState &State) {
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  if (LocVT == MVT::i64) {
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    if (unsigned Reg = State.AllocateReg(BPF::R0)) {
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      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
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      return false;
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    }
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  }
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  return true;  // CC didn't match.
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0
}