Coverage Report

Created: 2019-02-15 18:59

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/clang-build/lib/Target/Lanai/LanaiGenMCCodeEmitter.inc
Line
Count
Source (jump to first uncovered line)
1
/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2
|*                                                                            *|
3
|* Machine Code Emitter                                                       *|
4
|*                                                                            *|
5
|* Automatically generated file, do not edit!                                 *|
6
|*                                                                            *|
7
\*===----------------------------------------------------------------------===*/
8
9
uint64_t LanaiMCCodeEmitter::getBinaryCodeForInstr(const MCInst &MI,
10
    SmallVectorImpl<MCFixup> &Fixups,
11
481
    const MCSubtargetInfo &STI) const {
12
481
  static const uint64_t InstBits[] = {
13
481
    UINT64_C(0),
14
481
    UINT64_C(0),
15
481
    UINT64_C(0),
16
481
    UINT64_C(0),
17
481
    UINT64_C(0),
18
481
    UINT64_C(0),
19
481
    UINT64_C(0),
20
481
    UINT64_C(0),
21
481
    UINT64_C(0),
22
481
    UINT64_C(0),
23
481
    UINT64_C(0),
24
481
    UINT64_C(0),
25
481
    UINT64_C(0),
26
481
    UINT64_C(0),
27
481
    UINT64_C(0),
28
481
    UINT64_C(0),
29
481
    UINT64_C(0),
30
481
    UINT64_C(0),
31
481
    UINT64_C(0),
32
481
    UINT64_C(0),
33
481
    UINT64_C(0),
34
481
    UINT64_C(0),
35
481
    UINT64_C(0),
36
481
    UINT64_C(0),
37
481
    UINT64_C(0),
38
481
    UINT64_C(0),
39
481
    UINT64_C(0),
40
481
    UINT64_C(0),
41
481
    UINT64_C(0),
42
481
    UINT64_C(0),
43
481
    UINT64_C(0),
44
481
    UINT64_C(0),
45
481
    UINT64_C(0),
46
481
    UINT64_C(0),
47
481
    UINT64_C(0),
48
481
    UINT64_C(0),
49
481
    UINT64_C(0),
50
481
    UINT64_C(0),
51
481
    UINT64_C(0),
52
481
    UINT64_C(0),
53
481
    UINT64_C(0),
54
481
    UINT64_C(0),
55
481
    UINT64_C(0),
56
481
    UINT64_C(0),
57
481
    UINT64_C(0),
58
481
    UINT64_C(0),
59
481
    UINT64_C(0),
60
481
    UINT64_C(0),
61
481
    UINT64_C(0),
62
481
    UINT64_C(0),
63
481
    UINT64_C(0),
64
481
    UINT64_C(0),
65
481
    UINT64_C(0),
66
481
    UINT64_C(0),
67
481
    UINT64_C(0),
68
481
    UINT64_C(0),
69
481
    UINT64_C(0),
70
481
    UINT64_C(0),
71
481
    UINT64_C(0),
72
481
    UINT64_C(0),
73
481
    UINT64_C(0),
74
481
    UINT64_C(0),
75
481
    UINT64_C(0),
76
481
    UINT64_C(0),
77
481
    UINT64_C(0),
78
481
    UINT64_C(0),
79
481
    UINT64_C(0),
80
481
    UINT64_C(0),
81
481
    UINT64_C(0),
82
481
    UINT64_C(0),
83
481
    UINT64_C(0),
84
481
    UINT64_C(0),
85
481
    UINT64_C(0),
86
481
    UINT64_C(0),
87
481
    UINT64_C(0),
88
481
    UINT64_C(0),
89
481
    UINT64_C(0),
90
481
    UINT64_C(0),
91
481
    UINT64_C(0),
92
481
    UINT64_C(0),
93
481
    UINT64_C(0),
94
481
    UINT64_C(0),
95
481
    UINT64_C(0),
96
481
    UINT64_C(0),
97
481
    UINT64_C(0),
98
481
    UINT64_C(0),
99
481
    UINT64_C(0),
100
481
    UINT64_C(0),
101
481
    UINT64_C(0),
102
481
    UINT64_C(0),
103
481
    UINT64_C(0),
104
481
    UINT64_C(0),
105
481
    UINT64_C(0),
106
481
    UINT64_C(0),
107
481
    UINT64_C(0),
108
481
    UINT64_C(0),
109
481
    UINT64_C(0),
110
481
    UINT64_C(0),
111
481
    UINT64_C(0),
112
481
    UINT64_C(0),
113
481
    UINT64_C(0),
114
481
    UINT64_C(0),
115
481
    UINT64_C(0),
116
481
    UINT64_C(0),
117
481
    UINT64_C(0),
118
481
    UINT64_C(0),
119
481
    UINT64_C(0),
120
481
    UINT64_C(0),
121
481
    UINT64_C(0),
122
481
    UINT64_C(0),
123
481
    UINT64_C(0),
124
481
    UINT64_C(0),
125
481
    UINT64_C(0),
126
481
    UINT64_C(0),
127
481
    UINT64_C(0),
128
481
    UINT64_C(0),
129
481
    UINT64_C(0),
130
481
    UINT64_C(0),
131
481
    UINT64_C(0),
132
481
    UINT64_C(0),
133
481
    UINT64_C(0),
134
481
    UINT64_C(0),
135
481
    UINT64_C(0),
136
481
    UINT64_C(0),
137
481
    UINT64_C(0),
138
481
    UINT64_C(0),
139
481
    UINT64_C(0),
140
481
    UINT64_C(0),
141
481
    UINT64_C(0),
142
481
    UINT64_C(0),
143
481
    UINT64_C(0),
144
481
    UINT64_C(0),
145
481
    UINT64_C(0),
146
481
    UINT64_C(0),
147
481
    UINT64_C(0),
148
481
    UINT64_C(0),
149
481
    UINT64_C(0),
150
481
    UINT64_C(0),
151
481
    UINT64_C(0),
152
481
    UINT64_C(0),
153
481
    UINT64_C(0),
154
481
    UINT64_C(0),
155
481
    UINT64_C(0),
156
481
    UINT64_C(0),
157
481
    UINT64_C(0),
158
481
    UINT64_C(0),
159
481
    UINT64_C(0),
160
481
    UINT64_C(0),
161
481
    UINT64_C(0),
162
481
    UINT64_C(0),
163
481
    UINT64_C(0),
164
481
    UINT64_C(0),
165
481
    UINT64_C(0),
166
481
    UINT64_C(268632064),  // ADDC_F_I_HI
167
481
    UINT64_C(268566528),  // ADDC_F_I_LO
168
481
    UINT64_C(3221356800), // ADDC_F_R
169
481
    UINT64_C(268500992),  // ADDC_I_HI
170
481
    UINT64_C(268435456),  // ADDC_I_LO
171
481
    UINT64_C(3221225728), // ADDC_R
172
481
    UINT64_C(196608), // ADD_F_I_HI
173
481
    UINT64_C(131072), // ADD_F_I_LO
174
481
    UINT64_C(3221356544), // ADD_F_R
175
481
    UINT64_C(65536),  // ADD_I_HI
176
481
    UINT64_C(0),  // ADD_I_LO
177
481
    UINT64_C(3221225472), // ADD_R
178
481
    UINT64_C(1073938432), // AND_F_I_HI
179
481
    UINT64_C(1073872896), // AND_F_I_LO
180
481
    UINT64_C(3221357568), // AND_F_R
181
481
    UINT64_C(1073807360), // AND_I_HI
182
481
    UINT64_C(1073741824), // AND_I_LO
183
481
    UINT64_C(3221226496), // AND_R
184
481
    UINT64_C(3758096384), // BRCC
185
481
    UINT64_C(3238003968), // BRIND_CC
186
481
    UINT64_C(3238003968), // BRIND_CCA
187
481
    UINT64_C(3774873602), // BRR
188
481
    UINT64_C(3758096384), // BT
189
481
    UINT64_C(3238003968), // JR
190
481
    UINT64_C(4026531840), // LDADDR
191
481
    UINT64_C(4026744832), // LDBs_RI
192
481
    UINT64_C(2684354564), // LDBs_RR
193
481
    UINT64_C(4026748928), // LDBz_RI
194
481
    UINT64_C(2684354565), // LDBz_RR
195
481
    UINT64_C(4026728448), // LDHs_RI
196
481
    UINT64_C(2684354560), // LDHs_RR
197
481
    UINT64_C(4026732544), // LDHz_RI
198
481
    UINT64_C(2684354561), // LDHz_RR
199
481
    UINT64_C(2147483648), // LDW_RI
200
481
    UINT64_C(2684354562), // LDW_RR
201
481
    UINT64_C(2684354563), // LDWz_RR
202
481
    UINT64_C(3489660930), // LEADZ
203
481
    UINT64_C(2),  // LOG0
204
481
    UINT64_C(3),  // LOG1
205
481
    UINT64_C(4),  // LOG2
206
481
    UINT64_C(5),  // LOG3
207
481
    UINT64_C(6),  // LOG4
208
481
    UINT64_C(65536),  // MOVHI
209
481
    UINT64_C(1),  // NOP
210
481
    UINT64_C(1342373888), // OR_F_I_HI
211
481
    UINT64_C(1342308352), // OR_F_I_LO
212
481
    UINT64_C(3221357824), // OR_F_R
213
481
    UINT64_C(1342242816), // OR_I_HI
214
481
    UINT64_C(1342177280), // OR_I_LO
215
481
    UINT64_C(3221226752), // OR_R
216
481
    UINT64_C(3489660929), // POPC
217
481
    UINT64_C(2165768188), // RET
218
481
    UINT64_C(1879244800), // SA_F_I
219
481
    UINT64_C(1879113728), // SA_I
220
481
    UINT64_C(3758096386), // SCC
221
481
    UINT64_C(3221227264), // SELECT
222
481
    UINT64_C(537067520),  // SFSUB_F_RI_HI
223
481
    UINT64_C(537001984),  // SFSUB_F_RI_LO
224
481
    UINT64_C(3221357056), // SFSUB_F_RR
225
481
    UINT64_C(3221358464), // SHL_F_R
226
481
    UINT64_C(3221227392), // SHL_R
227
481
    UINT64_C(4026662912), // SLI
228
481
    UINT64_C(1879179264), // SL_F_I
229
481
    UINT64_C(1879048192), // SL_I
230
481
    UINT64_C(3221358528), // SRA_F_R
231
481
    UINT64_C(3221227456), // SRA_R
232
481
    UINT64_C(3221358464), // SRL_F_R
233
481
    UINT64_C(3221227392), // SRL_R
234
481
    UINT64_C(4026597376), // STADDR
235
481
    UINT64_C(4026753024), // STB_RI
236
481
    UINT64_C(2952790020), // STB_RR
237
481
    UINT64_C(4026736640), // STH_RI
238
481
    UINT64_C(2952790016), // STH_RR
239
481
    UINT64_C(805502976),  // SUBB_F_I_HI
240
481
    UINT64_C(805437440),  // SUBB_F_I_LO
241
481
    UINT64_C(3221357312), // SUBB_F_R
242
481
    UINT64_C(805371904),  // SUBB_I_HI
243
481
    UINT64_C(805306368),  // SUBB_I_LO
244
481
    UINT64_C(3221226240), // SUBB_R
245
481
    UINT64_C(537067520),  // SUB_F_I_HI
246
481
    UINT64_C(537001984),  // SUB_F_I_LO
247
481
    UINT64_C(3221357056), // SUB_F_R
248
481
    UINT64_C(536936448),  // SUB_I_HI
249
481
    UINT64_C(536870912),  // SUB_I_LO
250
481
    UINT64_C(3221225984), // SUB_R
251
481
    UINT64_C(2415919104), // SW_RI
252
481
    UINT64_C(2952790018), // SW_RR
253
481
    UINT64_C(3489660931), // TRAILZ
254
481
    UINT64_C(1610809344), // XOR_F_I_HI
255
481
    UINT64_C(1610743808), // XOR_F_I_LO
256
481
    UINT64_C(3221358080), // XOR_F_R
257
481
    UINT64_C(1610678272), // XOR_I_HI
258
481
    UINT64_C(1610612736), // XOR_I_LO
259
481
    UINT64_C(3221227008), // XOR_R
260
481
    UINT64_C(0)
261
481
  };
262
481
  const unsigned opcode = MI.getOpcode();
263
481
  uint64_t Value = InstBits[opcode];
264
481
  uint64_t op = 0;
265
481
  (void)op;  // suppress warning
266
481
  switch (opcode) {
267
481
    case Lanai::LOG0:
268
3
    case Lanai::LOG1:
269
3
    case Lanai::LOG2:
270
3
    case Lanai::LOG3:
271
3
    case Lanai::LOG4:
272
3
    case Lanai::NOP:
273
3
    case Lanai::RET: {
274
3
      break;
275
3
    }
276
20
    case Lanai::BRR: {
277
20
      // op: DDDI
278
20
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
279
20
      Value |= (op & UINT64_C(14)) << 24;
280
20
      Value |= op & UINT64_C(1);
281
20
      // op: imm16
282
20
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
283
20
      Value |= op & UINT64_C(65532);
284
20
      break;
285
3
    }
286
37
    case Lanai::STB_RI:
287
37
    case Lanai::STH_RI: {
288
37
      // op: Rd
289
37
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
290
37
      Value |= (op & UINT64_C(31)) << 23;
291
37
      // op: P
292
37
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
293
37
      Value |= (op & UINT64_C(1)) << 11;
294
37
      // op: Q
295
37
      op = getSplsOpValue(MI, 1, Fixups, STI);
296
37
      Value |= (op & UINT64_C(1)) << 10;
297
37
      // op: dst
298
37
      op = getSplsOpValue(MI, 1, Fixups, STI);
299
37
      Value |= (op & UINT64_C(126976)) << 6;
300
37
      Value |= op & UINT64_C(1023);
301
37
      Value = adjustPqBitsSpls(MI, Value, STI);
302
37
      break;
303
37
    }
304
65
    case Lanai::LDBs_RI:
305
65
    case Lanai::LDBz_RI:
306
65
    case Lanai::LDHs_RI:
307
65
    case Lanai::LDHz_RI: {
308
65
      // op: Rd
309
65
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
310
65
      Value |= (op & UINT64_C(31)) << 23;
311
65
      // op: P
312
65
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
313
65
      Value |= (op & UINT64_C(1)) << 11;
314
65
      // op: Q
315
65
      op = getSplsOpValue(MI, 1, Fixups, STI);
316
65
      Value |= (op & UINT64_C(1)) << 10;
317
65
      // op: src
318
65
      op = getSplsOpValue(MI, 1, Fixups, STI);
319
65
      Value |= (op & UINT64_C(126976)) << 6;
320
65
      Value |= op & UINT64_C(1023);
321
65
      Value = adjustPqBitsSpls(MI, Value, STI);
322
65
      break;
323
65
    }
324
65
    case Lanai::SW_RI: {
325
21
      // op: Rd
326
21
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
327
21
      Value |= (op & UINT64_C(31)) << 23;
328
21
      // op: P
329
21
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
330
21
      Value |= (op & UINT64_C(1)) << 17;
331
21
      // op: Q
332
21
      op = getRiMemoryOpValue(MI, 1, Fixups, STI);
333
21
      Value |= (op & UINT64_C(1)) << 16;
334
21
      // op: dst
335
21
      op = getRiMemoryOpValue(MI, 1, Fixups, STI);
336
21
      Value |= op & UINT64_C(8126464);
337
21
      Value |= op & UINT64_C(65535);
338
21
      Value = adjustPqBitsRmAndRrm(MI, Value, STI);
339
21
      break;
340
65
    }
341
65
    case Lanai::LDW_RI: {
342
44
      // op: Rd
343
44
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
344
44
      Value |= (op & UINT64_C(31)) << 23;
345
44
      // op: P
346
44
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
347
44
      Value |= (op & UINT64_C(1)) << 17;
348
44
      // op: Q
349
44
      op = getRiMemoryOpValue(MI, 1, Fixups, STI);
350
44
      Value |= (op & UINT64_C(1)) << 16;
351
44
      // op: src
352
44
      op = getRiMemoryOpValue(MI, 1, Fixups, STI);
353
44
      Value |= op & UINT64_C(8126464);
354
44
      Value |= op & UINT64_C(65535);
355
44
      Value = adjustPqBitsRmAndRrm(MI, Value, STI);
356
44
      break;
357
65
    }
358
88
    case Lanai::STB_RR:
359
88
    case Lanai::STH_RR:
360
88
    case Lanai::SW_RR: {
361
88
      // op: Rd
362
88
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
363
88
      Value |= (op & UINT64_C(31)) << 23;
364
88
      // op: P
365
88
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
366
88
      Value |= (op & UINT64_C(1)) << 17;
367
88
      // op: Q
368
88
      op = getRrMemoryOpValue(MI, 1, Fixups, STI);
369
88
      Value |= (op & UINT64_C(1)) << 16;
370
88
      // op: dst
371
88
      op = getRrMemoryOpValue(MI, 1, Fixups, STI);
372
88
      Value |= (op & UINT64_C(1015808)) << 3;
373
88
      Value |= (op & UINT64_C(31744)) << 1;
374
88
      Value |= (op & UINT64_C(255)) << 3;
375
88
      Value = adjustPqBitsRmAndRrm(MI, Value, STI);
376
88
      break;
377
88
    }
378
88
    case Lanai::LDBs_RR:
379
39
    case Lanai::LDBz_RR:
380
39
    case Lanai::LDHs_RR:
381
39
    case Lanai::LDHz_RR:
382
39
    case Lanai::LDW_RR:
383
39
    case Lanai::LDWz_RR: {
384
39
      // op: Rd
385
39
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
386
39
      Value |= (op & UINT64_C(31)) << 23;
387
39
      // op: P
388
39
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
389
39
      Value |= (op & UINT64_C(1)) << 17;
390
39
      // op: Q
391
39
      op = getRrMemoryOpValue(MI, 1, Fixups, STI);
392
39
      Value |= (op & UINT64_C(1)) << 16;
393
39
      // op: src
394
39
      op = getRrMemoryOpValue(MI, 1, Fixups, STI);
395
39
      Value |= (op & UINT64_C(1015808)) << 3;
396
39
      Value |= (op & UINT64_C(31744)) << 1;
397
39
      Value |= (op & UINT64_C(255)) << 3;
398
39
      Value = adjustPqBitsRmAndRrm(MI, Value, STI);
399
39
      break;
400
39
    }
401
39
    case Lanai::LEADZ:
402
3
    case Lanai::POPC:
403
3
    case Lanai::TRAILZ: {
404
3
      // op: Rd
405
3
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
406
3
      Value |= (op & UINT64_C(31)) << 23;
407
3
      // op: Rs1
408
3
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
409
3
      Value |= (op & UINT64_C(31)) << 18;
410
3
      break;
411
3
    }
412
42
    case Lanai::ADDC_F_R:
413
42
    case Lanai::ADDC_R:
414
42
    case Lanai::ADD_F_R:
415
42
    case Lanai::ADD_R:
416
42
    case Lanai::AND_F_R:
417
42
    case Lanai::AND_R:
418
42
    case Lanai::OR_F_R:
419
42
    case Lanai::OR_R:
420
42
    case Lanai::SELECT:
421
42
    case Lanai::SHL_F_R:
422
42
    case Lanai::SHL_R:
423
42
    case Lanai::SRA_F_R:
424
42
    case Lanai::SRA_R:
425
42
    case Lanai::SRL_F_R:
426
42
    case Lanai::SRL_R:
427
42
    case Lanai::SUBB_F_R:
428
42
    case Lanai::SUBB_R:
429
42
    case Lanai::SUB_F_R:
430
42
    case Lanai::SUB_R:
431
42
    case Lanai::XOR_F_R:
432
42
    case Lanai::XOR_R: {
433
42
      // op: Rd
434
42
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
435
42
      Value |= (op & UINT64_C(31)) << 23;
436
42
      // op: Rs1
437
42
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
438
42
      Value |= (op & UINT64_C(31)) << 18;
439
42
      // op: Rs2
440
42
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
441
42
      Value |= (op & UINT64_C(31)) << 11;
442
42
      // op: DDDI
443
42
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
444
42
      Value |= (op & UINT64_C(1)) << 16;
445
42
      Value |= (op & UINT64_C(14)) >> 1;
446
42
      break;
447
42
    }
448
64
    case Lanai::ADDC_F_I_HI:
449
64
    case Lanai::ADDC_F_I_LO:
450
64
    case Lanai::ADDC_I_HI:
451
64
    case Lanai::ADDC_I_LO:
452
64
    case Lanai::ADD_F_I_HI:
453
64
    case Lanai::ADD_F_I_LO:
454
64
    case Lanai::ADD_I_HI:
455
64
    case Lanai::ADD_I_LO:
456
64
    case Lanai::AND_F_I_HI:
457
64
    case Lanai::AND_F_I_LO:
458
64
    case Lanai::AND_I_HI:
459
64
    case Lanai::AND_I_LO:
460
64
    case Lanai::OR_F_I_HI:
461
64
    case Lanai::OR_F_I_LO:
462
64
    case Lanai::OR_I_HI:
463
64
    case Lanai::OR_I_LO:
464
64
    case Lanai::SA_F_I:
465
64
    case Lanai::SA_I:
466
64
    case Lanai::SL_F_I:
467
64
    case Lanai::SL_I:
468
64
    case Lanai::SUBB_F_I_HI:
469
64
    case Lanai::SUBB_F_I_LO:
470
64
    case Lanai::SUBB_I_HI:
471
64
    case Lanai::SUBB_I_LO:
472
64
    case Lanai::SUB_F_I_HI:
473
64
    case Lanai::SUB_F_I_LO:
474
64
    case Lanai::SUB_I_HI:
475
64
    case Lanai::SUB_I_LO:
476
64
    case Lanai::XOR_F_I_HI:
477
64
    case Lanai::XOR_F_I_LO:
478
64
    case Lanai::XOR_I_HI:
479
64
    case Lanai::XOR_I_LO: {
480
64
      // op: Rd
481
64
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
482
64
      Value |= (op & UINT64_C(31)) << 23;
483
64
      // op: Rs1
484
64
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
485
64
      Value |= (op & UINT64_C(31)) << 18;
486
64
      // op: imm16
487
64
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
488
64
      Value |= op & UINT64_C(65535);
489
64
      break;
490
64
    }
491
64
    case Lanai::STADDR: {
492
2
      // op: Rd
493
2
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
494
2
      Value |= (op & UINT64_C(31)) << 23;
495
2
      // op: dst
496
2
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
497
2
      Value |= (op & UINT64_C(2031616)) << 2;
498
2
      Value |= op & UINT64_C(65535);
499
2
      break;
500
64
    }
501
64
    case Lanai::SLI: {
502
1
      // op: Rd
503
1
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
504
1
      Value |= (op & UINT64_C(31)) << 23;
505
1
      // op: imm
506
1
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
507
1
      Value |= (op & UINT64_C(2031616)) << 2;
508
1
      Value |= op & UINT64_C(65535);
509
1
      break;
510
64
    }
511
64
    case Lanai::MOVHI: {
512
0
      // op: Rd
513
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
514
0
      Value |= (op & UINT64_C(31)) << 23;
515
0
      // op: imm16
516
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
517
0
      Value |= op & UINT64_C(65535);
518
0
      break;
519
64
    }
520
64
    case Lanai::LDADDR: {
521
3
      // op: Rd
522
3
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
523
3
      Value |= (op & UINT64_C(31)) << 23;
524
3
      // op: src
525
3
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
526
3
      Value |= (op & UINT64_C(2031616)) << 2;
527
3
      Value |= op & UINT64_C(65535);
528
3
      break;
529
64
    }
530
64
    case Lanai::BRIND_CC: {
531
0
      // op: Rs1
532
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
533
0
      Value |= (op & UINT64_C(31)) << 18;
534
0
      // op: DDDI
535
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
536
0
      Value |= (op & UINT64_C(1)) << 16;
537
0
      Value |= (op & UINT64_C(14)) >> 1;
538
0
      break;
539
64
    }
540
64
    case Lanai::SCC: {
541
20
      // op: Rs1
542
20
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
543
20
      Value |= (op & UINT64_C(31)) << 18;
544
20
      // op: DDDI
545
20
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
546
20
      Value |= (op & UINT64_C(14)) << 24;
547
20
      Value |= op & UINT64_C(1);
548
20
      break;
549
64
    }
550
64
    case Lanai::SFSUB_F_RR: {
551
0
      // op: Rs1
552
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
553
0
      Value |= (op & UINT64_C(31)) << 18;
554
0
      // op: Rs2
555
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
556
0
      Value |= (op & UINT64_C(31)) << 11;
557
0
      break;
558
64
    }
559
64
    case Lanai::BRIND_CCA: {
560
0
      // op: Rs1
561
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
562
0
      Value |= (op & UINT64_C(31)) << 18;
563
0
      // op: Rs2
564
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
565
0
      Value |= (op & UINT64_C(31)) << 11;
566
0
      // op: DDDI
567
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
568
0
      Value |= (op & UINT64_C(1)) << 16;
569
0
      Value |= (op & UINT64_C(14)) >> 1;
570
0
      break;
571
64
    }
572
64
    case Lanai::SFSUB_F_RI_HI:
573
0
    case Lanai::SFSUB_F_RI_LO: {
574
0
      // op: Rs1
575
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
576
0
      Value |= (op & UINT64_C(31)) << 18;
577
0
      // op: imm16
578
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
579
0
      Value |= op & UINT64_C(65535);
580
0
      break;
581
0
    }
582
2
    case Lanai::JR: {
583
2
      // op: Rs2
584
2
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
585
2
      Value |= (op & UINT64_C(31)) << 11;
586
2
      break;
587
0
    }
588
6
    case Lanai::BT: {
589
6
      // op: addr
590
6
      op = getBranchTargetOpValue(MI, 0, Fixups, STI);
591
6
      Value |= op & UINT64_C(33554428);
592
6
      break;
593
0
    }
594
21
    case Lanai::BRCC: {
595
21
      // op: addr
596
21
      op = getBranchTargetOpValue(MI, 0, Fixups, STI);
597
21
      Value |= op & UINT64_C(33554428);
598
21
      // op: DDDI
599
21
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
600
21
      Value |= (op & UINT64_C(14)) << 24;
601
21
      Value |= op & UINT64_C(1);
602
21
      break;
603
0
    }
604
0
  default:
605
0
    std::string msg;
606
0
    raw_string_ostream Msg(msg);
607
0
    Msg << "Not supported instr: " << MI;
608
0
    report_fatal_error(Msg.str());
609
481
  }
610
481
  return Value;
611
481
}
612
613
#ifdef ENABLE_INSTR_PREDICATE_VERIFIER
614
#undef ENABLE_INSTR_PREDICATE_VERIFIER
615
#include <sstream>
616
617
// Flags for subtarget features that participate in instruction matching.
618
enum SubtargetFeatureFlag : uint8_t {
619
  Feature_None = 0
620
};
621
622
#ifndef NDEBUG
623
static const char *SubtargetFeatureNames[] = {
624
  nullptr
625
};
626
627
#endif // NDEBUG
628
uint64_t LanaiMCCodeEmitter::
629
computeAvailableFeatures(const FeatureBitset& FB) const {
630
  uint64_t Features = 0;
631
  return Features;
632
}
633
634
void LanaiMCCodeEmitter::verifyInstructionPredicates(
635
    const MCInst &Inst, uint64_t AvailableFeatures) const {
636
#ifndef NDEBUG
637
  static uint64_t RequiredFeatures[] = {
638
    0, // PHI = 0
639
    0, // INLINEASM = 1
640
    0, // INLINEASM_BR = 2
641
    0, // CFI_INSTRUCTION = 3
642
    0, // EH_LABEL = 4
643
    0, // GC_LABEL = 5
644
    0, // ANNOTATION_LABEL = 6
645
    0, // KILL = 7
646
    0, // EXTRACT_SUBREG = 8
647
    0, // INSERT_SUBREG = 9
648
    0, // IMPLICIT_DEF = 10
649
    0, // SUBREG_TO_REG = 11
650
    0, // COPY_TO_REGCLASS = 12
651
    0, // DBG_VALUE = 13
652
    0, // DBG_LABEL = 14
653
    0, // REG_SEQUENCE = 15
654
    0, // COPY = 16
655
    0, // BUNDLE = 17
656
    0, // LIFETIME_START = 18
657
    0, // LIFETIME_END = 19
658
    0, // STACKMAP = 20
659
    0, // FENTRY_CALL = 21
660
    0, // PATCHPOINT = 22
661
    0, // LOAD_STACK_GUARD = 23
662
    0, // STATEPOINT = 24
663
    0, // LOCAL_ESCAPE = 25
664
    0, // FAULTING_OP = 26
665
    0, // PATCHABLE_OP = 27
666
    0, // PATCHABLE_FUNCTION_ENTER = 28
667
    0, // PATCHABLE_RET = 29
668
    0, // PATCHABLE_FUNCTION_EXIT = 30
669
    0, // PATCHABLE_TAIL_CALL = 31
670
    0, // PATCHABLE_EVENT_CALL = 32
671
    0, // PATCHABLE_TYPED_EVENT_CALL = 33
672
    0, // ICALL_BRANCH_FUNNEL = 34
673
    0, // G_ADD = 35
674
    0, // G_SUB = 36
675
    0, // G_MUL = 37
676
    0, // G_SDIV = 38
677
    0, // G_UDIV = 39
678
    0, // G_SREM = 40
679
    0, // G_UREM = 41
680
    0, // G_AND = 42
681
    0, // G_OR = 43
682
    0, // G_XOR = 44
683
    0, // G_IMPLICIT_DEF = 45
684
    0, // G_PHI = 46
685
    0, // G_FRAME_INDEX = 47
686
    0, // G_GLOBAL_VALUE = 48
687
    0, // G_EXTRACT = 49
688
    0, // G_UNMERGE_VALUES = 50
689
    0, // G_INSERT = 51
690
    0, // G_MERGE_VALUES = 52
691
    0, // G_BUILD_VECTOR = 53
692
    0, // G_BUILD_VECTOR_TRUNC = 54
693
    0, // G_CONCAT_VECTORS = 55
694
    0, // G_PTRTOINT = 56
695
    0, // G_INTTOPTR = 57
696
    0, // G_BITCAST = 58
697
    0, // G_INTRINSIC_TRUNC = 59
698
    0, // G_INTRINSIC_ROUND = 60
699
    0, // G_LOAD = 61
700
    0, // G_SEXTLOAD = 62
701
    0, // G_ZEXTLOAD = 63
702
    0, // G_STORE = 64
703
    0, // G_ATOMIC_CMPXCHG_WITH_SUCCESS = 65
704
    0, // G_ATOMIC_CMPXCHG = 66
705
    0, // G_ATOMICRMW_XCHG = 67
706
    0, // G_ATOMICRMW_ADD = 68
707
    0, // G_ATOMICRMW_SUB = 69
708
    0, // G_ATOMICRMW_AND = 70
709
    0, // G_ATOMICRMW_NAND = 71
710
    0, // G_ATOMICRMW_OR = 72
711
    0, // G_ATOMICRMW_XOR = 73
712
    0, // G_ATOMICRMW_MAX = 74
713
    0, // G_ATOMICRMW_MIN = 75
714
    0, // G_ATOMICRMW_UMAX = 76
715
    0, // G_ATOMICRMW_UMIN = 77
716
    0, // G_BRCOND = 78
717
    0, // G_BRINDIRECT = 79
718
    0, // G_INTRINSIC = 80
719
    0, // G_INTRINSIC_W_SIDE_EFFECTS = 81
720
    0, // G_ANYEXT = 82
721
    0, // G_TRUNC = 83
722
    0, // G_CONSTANT = 84
723
    0, // G_FCONSTANT = 85
724
    0, // G_VASTART = 86
725
    0, // G_VAARG = 87
726
    0, // G_SEXT = 88
727
    0, // G_ZEXT = 89
728
    0, // G_SHL = 90
729
    0, // G_LSHR = 91
730
    0, // G_ASHR = 92
731
    0, // G_ICMP = 93
732
    0, // G_FCMP = 94
733
    0, // G_SELECT = 95
734
    0, // G_UADDO = 96
735
    0, // G_UADDE = 97
736
    0, // G_USUBO = 98
737
    0, // G_USUBE = 99
738
    0, // G_SADDO = 100
739
    0, // G_SADDE = 101
740
    0, // G_SSUBO = 102
741
    0, // G_SSUBE = 103
742
    0, // G_UMULO = 104
743
    0, // G_SMULO = 105
744
    0, // G_UMULH = 106
745
    0, // G_SMULH = 107
746
    0, // G_FADD = 108
747
    0, // G_FSUB = 109
748
    0, // G_FMUL = 110
749
    0, // G_FMA = 111
750
    0, // G_FDIV = 112
751
    0, // G_FREM = 113
752
    0, // G_FPOW = 114
753
    0, // G_FEXP = 115
754
    0, // G_FEXP2 = 116
755
    0, // G_FLOG = 117
756
    0, // G_FLOG2 = 118
757
    0, // G_FLOG10 = 119
758
    0, // G_FNEG = 120
759
    0, // G_FPEXT = 121
760
    0, // G_FPTRUNC = 122
761
    0, // G_FPTOSI = 123
762
    0, // G_FPTOUI = 124
763
    0, // G_SITOFP = 125
764
    0, // G_UITOFP = 126
765
    0, // G_FABS = 127
766
    0, // G_FCANONICALIZE = 128
767
    0, // G_GEP = 129
768
    0, // G_PTR_MASK = 130
769
    0, // G_BR = 131
770
    0, // G_INSERT_VECTOR_ELT = 132
771
    0, // G_EXTRACT_VECTOR_ELT = 133
772
    0, // G_SHUFFLE_VECTOR = 134
773
    0, // G_CTTZ = 135
774
    0, // G_CTTZ_ZERO_UNDEF = 136
775
    0, // G_CTLZ = 137
776
    0, // G_CTLZ_ZERO_UNDEF = 138
777
    0, // G_CTPOP = 139
778
    0, // G_BSWAP = 140
779
    0, // G_FCEIL = 141
780
    0, // G_FCOS = 142
781
    0, // G_FSIN = 143
782
    0, // G_FSQRT = 144
783
    0, // G_FFLOOR = 145
784
    0, // G_ADDRSPACE_CAST = 146
785
    0, // G_BLOCK_ADDR = 147
786
    0, // ADJCALLSTACKDOWN = 148
787
    0, // ADJCALLSTACKUP = 149
788
    0, // ADJDYNALLOC = 150
789
    0, // CALL = 151
790
    0, // CALLR = 152
791
    0, // ADDC_F_I_HI = 153
792
    0, // ADDC_F_I_LO = 154
793
    0, // ADDC_F_R = 155
794
    0, // ADDC_I_HI = 156
795
    0, // ADDC_I_LO = 157
796
    0, // ADDC_R = 158
797
    0, // ADD_F_I_HI = 159
798
    0, // ADD_F_I_LO = 160
799
    0, // ADD_F_R = 161
800
    0, // ADD_I_HI = 162
801
    0, // ADD_I_LO = 163
802
    0, // ADD_R = 164
803
    0, // AND_F_I_HI = 165
804
    0, // AND_F_I_LO = 166
805
    0, // AND_F_R = 167
806
    0, // AND_I_HI = 168
807
    0, // AND_I_LO = 169
808
    0, // AND_R = 170
809
    0, // BRCC = 171
810
    0, // BRIND_CC = 172
811
    0, // BRIND_CCA = 173
812
    0, // BRR = 174
813
    0, // BT = 175
814
    0, // JR = 176
815
    0, // LDADDR = 177
816
    0, // LDBs_RI = 178
817
    0, // LDBs_RR = 179
818
    0, // LDBz_RI = 180
819
    0, // LDBz_RR = 181
820
    0, // LDHs_RI = 182
821
    0, // LDHs_RR = 183
822
    0, // LDHz_RI = 184
823
    0, // LDHz_RR = 185
824
    0, // LDW_RI = 186
825
    0, // LDW_RR = 187
826
    0, // LDWz_RR = 188
827
    0, // LEADZ = 189
828
    0, // LOG0 = 190
829
    0, // LOG1 = 191
830
    0, // LOG2 = 192
831
    0, // LOG3 = 193
832
    0, // LOG4 = 194
833
    0, // MOVHI = 195
834
    0, // NOP = 196
835
    0, // OR_F_I_HI = 197
836
    0, // OR_F_I_LO = 198
837
    0, // OR_F_R = 199
838
    0, // OR_I_HI = 200
839
    0, // OR_I_LO = 201
840
    0, // OR_R = 202
841
    0, // POPC = 203
842
    0, // RET = 204
843
    0, // SA_F_I = 205
844
    0, // SA_I = 206
845
    0, // SCC = 207
846
    0, // SELECT = 208
847
    0, // SFSUB_F_RI_HI = 209
848
    0, // SFSUB_F_RI_LO = 210
849
    0, // SFSUB_F_RR = 211
850
    0, // SHL_F_R = 212
851
    0, // SHL_R = 213
852
    0, // SLI = 214
853
    0, // SL_F_I = 215
854
    0, // SL_I = 216
855
    0, // SRA_F_R = 217
856
    0, // SRA_R = 218
857
    0, // SRL_F_R = 219
858
    0, // SRL_R = 220
859
    0, // STADDR = 221
860
    0, // STB_RI = 222
861
    0, // STB_RR = 223
862
    0, // STH_RI = 224
863
    0, // STH_RR = 225
864
    0, // SUBB_F_I_HI = 226
865
    0, // SUBB_F_I_LO = 227
866
    0, // SUBB_F_R = 228
867
    0, // SUBB_I_HI = 229
868
    0, // SUBB_I_LO = 230
869
    0, // SUBB_R = 231
870
    0, // SUB_F_I_HI = 232
871
    0, // SUB_F_I_LO = 233
872
    0, // SUB_F_R = 234
873
    0, // SUB_I_HI = 235
874
    0, // SUB_I_LO = 236
875
    0, // SUB_R = 237
876
    0, // SW_RI = 238
877
    0, // SW_RR = 239
878
    0, // TRAILZ = 240
879
    0, // XOR_F_I_HI = 241
880
    0, // XOR_F_I_LO = 242
881
    0, // XOR_F_R = 243
882
    0, // XOR_I_HI = 244
883
    0, // XOR_I_LO = 245
884
    0, // XOR_R = 246
885
  };
886
887
  assert(Inst.getOpcode() < 247);
888
  uint64_t MissingFeatures =
889
      (AvailableFeatures & RequiredFeatures[Inst.getOpcode()]) ^
890
      RequiredFeatures[Inst.getOpcode()];
891
  if (MissingFeatures) {
892
    std::ostringstream Msg;
893
    Msg << "Attempting to emit " << MCII.getName(Inst.getOpcode()).str()
894
        << " instruction but the ";
895
    for (unsigned i = 0; i < 8 * sizeof(MissingFeatures); ++i)
896
      if (MissingFeatures & (1ULL << i))
897
        Msg << SubtargetFeatureNames[i] << " ";
898
    Msg << "predicate(s) are not met";
899
    report_fatal_error(Msg.str());
900
  }
901
#else
902
// Silence unused variable warning on targets that don't use MCII for other purposes (e.g. BPF).
903
(void)MCII;
904
#endif // NDEBUG
905
}
906
#endif