Coverage Report

Created: 2018-07-19 03:59

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/clang-build/lib/Target/Mips/MipsGenMCCodeEmitter.inc
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/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
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|*                                                                            *|
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|* Machine Code Emitter                                                       *|
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|*                                                                            *|
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|* Automatically generated file, do not edit!                                 *|
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|*                                                                            *|
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\*===----------------------------------------------------------------------===*/
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uint64_t MipsMCCodeEmitter::getBinaryCodeForInstr(const MCInst &MI,
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    SmallVectorImpl<MCFixup> &Fixups,
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    const MCSubtargetInfo &STI) const {
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  static const uint64_t InstBits[] = {
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42.5k
    UINT64_C(0),
429
42.5k
    UINT64_C(0),
430
42.5k
    UINT64_C(0),
431
42.5k
    UINT64_C(0),
432
42.5k
    UINT64_C(0),
433
42.5k
    UINT64_C(0),
434
42.5k
    UINT64_C(0),
435
42.5k
    UINT64_C(0),
436
42.5k
    UINT64_C(0),
437
42.5k
    UINT64_C(0),
438
42.5k
    UINT64_C(0),
439
42.5k
    UINT64_C(0),
440
42.5k
    UINT64_C(0),
441
42.5k
    UINT64_C(0),
442
42.5k
    UINT64_C(0),
443
42.5k
    UINT64_C(0),
444
42.5k
    UINT64_C(0),
445
42.5k
    UINT64_C(0),
446
42.5k
    UINT64_C(0),
447
42.5k
    UINT64_C(0),
448
42.5k
    UINT64_C(0),
449
42.5k
    UINT64_C(0),
450
42.5k
    UINT64_C(0),
451
42.5k
    UINT64_C(0),
452
42.5k
    UINT64_C(0),
453
42.5k
    UINT64_C(0),
454
42.5k
    UINT64_C(0),
455
42.5k
    UINT64_C(0),
456
42.5k
    UINT64_C(0),
457
42.5k
    UINT64_C(0),
458
42.5k
    UINT64_C(0),
459
42.5k
    UINT64_C(0),
460
42.5k
    UINT64_C(0),
461
42.5k
    UINT64_C(0),
462
42.5k
    UINT64_C(0),
463
42.5k
    UINT64_C(0),
464
42.5k
    UINT64_C(0),
465
42.5k
    UINT64_C(0),
466
42.5k
    UINT64_C(0),
467
42.5k
    UINT64_C(0),
468
42.5k
    UINT64_C(0),
469
42.5k
    UINT64_C(0),
470
42.5k
    UINT64_C(0),
471
42.5k
    UINT64_C(0),
472
42.5k
    UINT64_C(0),
473
42.5k
    UINT64_C(0),
474
42.5k
    UINT64_C(0),
475
42.5k
    UINT64_C(0),
476
42.5k
    UINT64_C(0),
477
42.5k
    UINT64_C(0),
478
42.5k
    UINT64_C(0),
479
42.5k
    UINT64_C(0),
480
42.5k
    UINT64_C(0),
481
42.5k
    UINT64_C(0),
482
42.5k
    UINT64_C(0),
483
42.5k
    UINT64_C(0),
484
42.5k
    UINT64_C(0),
485
42.5k
    UINT64_C(0),
486
42.5k
    UINT64_C(0),
487
42.5k
    UINT64_C(0),
488
42.5k
    UINT64_C(0),
489
42.5k
    UINT64_C(0),
490
42.5k
    UINT64_C(0),
491
42.5k
    UINT64_C(0),
492
42.5k
    UINT64_C(0),
493
42.5k
    UINT64_C(0),
494
42.5k
    UINT64_C(0),
495
42.5k
    UINT64_C(0),
496
42.5k
    UINT64_C(0),
497
42.5k
    UINT64_C(0),
498
42.5k
    UINT64_C(0),
499
42.5k
    UINT64_C(0),
500
42.5k
    UINT64_C(0),
501
42.5k
    UINT64_C(0),
502
42.5k
    UINT64_C(0),
503
42.5k
    UINT64_C(0),
504
42.5k
    UINT64_C(0),
505
42.5k
    UINT64_C(0),
506
42.5k
    UINT64_C(0),
507
42.5k
    UINT64_C(0),
508
42.5k
    UINT64_C(0),
509
42.5k
    UINT64_C(0),
510
42.5k
    UINT64_C(0),
511
42.5k
    UINT64_C(0),
512
42.5k
    UINT64_C(0),
513
42.5k
    UINT64_C(0),
514
42.5k
    UINT64_C(0),
515
42.5k
    UINT64_C(0),
516
42.5k
    UINT64_C(0),
517
42.5k
    UINT64_C(0),
518
42.5k
    UINT64_C(0),
519
42.5k
    UINT64_C(0),
520
42.5k
    UINT64_C(0),
521
42.5k
    UINT64_C(0),
522
42.5k
    UINT64_C(0),
523
42.5k
    UINT64_C(2080375378), // ABSQ_S_PH
524
42.5k
    UINT64_C(4412), // ABSQ_S_PH_MM
525
42.5k
    UINT64_C(2080374866), // ABSQ_S_QB
526
42.5k
    UINT64_C(316),  // ABSQ_S_QB_MMR2
527
42.5k
    UINT64_C(2080375890), // ABSQ_S_W
528
42.5k
    UINT64_C(8508), // ABSQ_S_W_MM
529
42.5k
    UINT64_C(32), // ADD
530
42.5k
    UINT64_C(3959422976), // ADDIUPC
531
42.5k
    UINT64_C(2013265920), // ADDIUPC_MM
532
42.5k
    UINT64_C(2013265920), // ADDIUPC_MMR6
533
42.5k
    UINT64_C(27649),  // ADDIUR1SP_MM
534
42.5k
    UINT64_C(27648),  // ADDIUR2_MM
535
42.5k
    UINT64_C(19456),  // ADDIUS5_MM
536
42.5k
    UINT64_C(19457),  // ADDIUSP_MM
537
42.5k
    UINT64_C(805306368),  // ADDIU_MMR6
538
42.5k
    UINT64_C(2080375320), // ADDQH_PH
539
42.5k
    UINT64_C(77), // ADDQH_PH_MMR2
540
42.5k
    UINT64_C(2080375448), // ADDQH_R_PH
541
42.5k
    UINT64_C(1101), // ADDQH_R_PH_MMR2
542
42.5k
    UINT64_C(2080375960), // ADDQH_R_W
543
42.5k
    UINT64_C(1165), // ADDQH_R_W_MMR2
544
42.5k
    UINT64_C(2080375832), // ADDQH_W
545
42.5k
    UINT64_C(141),  // ADDQH_W_MMR2
546
42.5k
    UINT64_C(2080375440), // ADDQ_PH
547
42.5k
    UINT64_C(13), // ADDQ_PH_MM
548
42.5k
    UINT64_C(2080375696), // ADDQ_S_PH
549
42.5k
    UINT64_C(1037), // ADDQ_S_PH_MM
550
42.5k
    UINT64_C(2080376208), // ADDQ_S_W
551
42.5k
    UINT64_C(773),  // ADDQ_S_W_MM
552
42.5k
    UINT64_C(2080375824), // ADDSC
553
42.5k
    UINT64_C(901),  // ADDSC_MM
554
42.5k
    UINT64_C(2021654544), // ADDS_A_B
555
42.5k
    UINT64_C(2027946000), // ADDS_A_D
556
42.5k
    UINT64_C(2023751696), // ADDS_A_H
557
42.5k
    UINT64_C(2025848848), // ADDS_A_W
558
42.5k
    UINT64_C(2030043152), // ADDS_S_B
559
42.5k
    UINT64_C(2036334608), // ADDS_S_D
560
42.5k
    UINT64_C(2032140304), // ADDS_S_H
561
42.5k
    UINT64_C(2034237456), // ADDS_S_W
562
42.5k
    UINT64_C(2038431760), // ADDS_U_B
563
42.5k
    UINT64_C(2044723216), // ADDS_U_D
564
42.5k
    UINT64_C(2040528912), // ADDS_U_H
565
42.5k
    UINT64_C(2042626064), // ADDS_U_W
566
42.5k
    UINT64_C(1024), // ADDU16_MM
567
42.5k
    UINT64_C(1024), // ADDU16_MMR6
568
42.5k
    UINT64_C(2080374808), // ADDUH_QB
569
42.5k
    UINT64_C(333),  // ADDUH_QB_MMR2
570
42.5k
    UINT64_C(2080374936), // ADDUH_R_QB
571
42.5k
    UINT64_C(1357), // ADDUH_R_QB_MMR2
572
42.5k
    UINT64_C(336),  // ADDU_MMR6
573
42.5k
    UINT64_C(2080375312), // ADDU_PH
574
42.5k
    UINT64_C(269),  // ADDU_PH_MMR2
575
42.5k
    UINT64_C(2080374800), // ADDU_QB
576
42.5k
    UINT64_C(205),  // ADDU_QB_MM
577
42.5k
    UINT64_C(2080375568), // ADDU_S_PH
578
42.5k
    UINT64_C(1293), // ADDU_S_PH_MMR2
579
42.5k
    UINT64_C(2080375056), // ADDU_S_QB
580
42.5k
    UINT64_C(1229), // ADDU_S_QB_MM
581
42.5k
    UINT64_C(2013265926), // ADDVI_B
582
42.5k
    UINT64_C(2019557382), // ADDVI_D
583
42.5k
    UINT64_C(2015363078), // ADDVI_H
584
42.5k
    UINT64_C(2017460230), // ADDVI_W
585
42.5k
    UINT64_C(2013265934), // ADDV_B
586
42.5k
    UINT64_C(2019557390), // ADDV_D
587
42.5k
    UINT64_C(2015363086), // ADDV_H
588
42.5k
    UINT64_C(2017460238), // ADDV_W
589
42.5k
    UINT64_C(2080375888), // ADDWC
590
42.5k
    UINT64_C(965),  // ADDWC_MM
591
42.5k
    UINT64_C(2013265936), // ADD_A_B
592
42.5k
    UINT64_C(2019557392), // ADD_A_D
593
42.5k
    UINT64_C(2015363088), // ADD_A_H
594
42.5k
    UINT64_C(2017460240), // ADD_A_W
595
42.5k
    UINT64_C(272),  // ADD_MM
596
42.5k
    UINT64_C(272),  // ADD_MMR6
597
42.5k
    UINT64_C(536870912),  // ADDi
598
42.5k
    UINT64_C(268435456),  // ADDi_MM
599
42.5k
    UINT64_C(603979776),  // ADDiu
600
42.5k
    UINT64_C(805306368),  // ADDiu_MM
601
42.5k
    UINT64_C(33), // ADDu
602
42.5k
    UINT64_C(336),  // ADDu_MM
603
42.5k
    UINT64_C(2080375328), // ALIGN
604
42.5k
    UINT64_C(31), // ALIGN_MMR6
605
42.5k
    UINT64_C(3961454592), // ALUIPC
606
42.5k
    UINT64_C(2015297536), // ALUIPC_MMR6
607
42.5k
    UINT64_C(36), // AND
608
42.5k
    UINT64_C(17536),  // AND16_MM
609
42.5k
    UINT64_C(17409),  // AND16_MMR6
610
42.5k
    UINT64_C(36), // AND64
611
42.5k
    UINT64_C(11264),  // ANDI16_MM
612
42.5k
    UINT64_C(11264),  // ANDI16_MMR6
613
42.5k
    UINT64_C(2013265920), // ANDI_B
614
42.5k
    UINT64_C(3489660928), // ANDI_MMR6
615
42.5k
    UINT64_C(592),  // AND_MM
616
42.5k
    UINT64_C(592),  // AND_MMR6
617
42.5k
    UINT64_C(2013265950), // AND_V
618
42.5k
    UINT64_C(805306368),  // ANDi
619
42.5k
    UINT64_C(805306368),  // ANDi64
620
42.5k
    UINT64_C(3489660928), // ANDi_MM
621
42.5k
    UINT64_C(2080374833), // APPEND
622
42.5k
    UINT64_C(533),  // APPEND_MMR2
623
42.5k
    UINT64_C(2046820369), // ASUB_S_B
624
42.5k
    UINT64_C(2053111825), // ASUB_S_D
625
42.5k
    UINT64_C(2048917521), // ASUB_S_H
626
42.5k
    UINT64_C(2051014673), // ASUB_S_W
627
42.5k
    UINT64_C(2055208977), // ASUB_U_B
628
42.5k
    UINT64_C(2061500433), // ASUB_U_D
629
42.5k
    UINT64_C(2057306129), // ASUB_U_H
630
42.5k
    UINT64_C(2059403281), // ASUB_U_W
631
42.5k
    UINT64_C(1006632960), // AUI
632
42.5k
    UINT64_C(3961389056), // AUIPC
633
42.5k
    UINT64_C(2015232000), // AUIPC_MMR6
634
42.5k
    UINT64_C(268435456),  // AUI_MMR6
635
42.5k
    UINT64_C(2063597584), // AVER_S_B
636
42.5k
    UINT64_C(2069889040), // AVER_S_D
637
42.5k
    UINT64_C(2065694736), // AVER_S_H
638
42.5k
    UINT64_C(2067791888), // AVER_S_W
639
42.5k
    UINT64_C(2071986192), // AVER_U_B
640
42.5k
    UINT64_C(2078277648), // AVER_U_D
641
42.5k
    UINT64_C(2074083344), // AVER_U_H
642
42.5k
    UINT64_C(2076180496), // AVER_U_W
643
42.5k
    UINT64_C(2046820368), // AVE_S_B
644
42.5k
    UINT64_C(2053111824), // AVE_S_D
645
42.5k
    UINT64_C(2048917520), // AVE_S_H
646
42.5k
    UINT64_C(2051014672), // AVE_S_W
647
42.5k
    UINT64_C(2055208976), // AVE_U_B
648
42.5k
    UINT64_C(2061500432), // AVE_U_D
649
42.5k
    UINT64_C(2057306128), // AVE_U_H
650
42.5k
    UINT64_C(2059403280), // AVE_U_W
651
42.5k
    UINT64_C(4026550272), // AddiuRxImmX16
652
42.5k
    UINT64_C(4026533888), // AddiuRxPcImmX16
653
42.5k
    UINT64_C(18432),  // AddiuRxRxImm16
654
42.5k
    UINT64_C(4026550272), // AddiuRxRxImmX16
655
42.5k
    UINT64_C(4026548224), // AddiuRxRyOffMemX16
656
42.5k
    UINT64_C(25344),  // AddiuSpImm16
657
42.5k
    UINT64_C(4026544896), // AddiuSpImmX16
658
42.5k
    UINT64_C(57345),  // AdduRxRyRz16
659
42.5k
    UINT64_C(59404),  // AndRxRxRy16
660
42.5k
    UINT64_C(52224),  // B16_MM
661
42.5k
    UINT64_C(1879048232), // BADDu
662
42.5k
    UINT64_C(68222976), // BAL
663
42.5k
    UINT64_C(3892314112), // BALC
664
42.5k
    UINT64_C(3019898880), // BALC_MMR6
665
42.5k
    UINT64_C(2080375857), // BALIGN
666
42.5k
    UINT64_C(2236), // BALIGN_MMR2
667
42.5k
    UINT64_C(3355443200), // BBIT0
668
42.5k
    UINT64_C(3623878656), // BBIT032
669
42.5k
    UINT64_C(3892314112), // BBIT1
670
42.5k
    UINT64_C(4160749568), // BBIT132
671
42.5k
    UINT64_C(3355443200), // BC
672
42.5k
    UINT64_C(52224),  // BC16_MMR6
673
42.5k
    UINT64_C(1159725056), // BC1EQZ
674
42.5k
    UINT64_C(1090519040), // BC1EQZC_MMR6
675
42.5k
    UINT64_C(1157627904), // BC1F
676
42.5k
    UINT64_C(1157758976), // BC1FL
677
42.5k
    UINT64_C(1132462080), // BC1F_MM
678
42.5k
    UINT64_C(1168113664), // BC1NEZ
679
42.5k
    UINT64_C(1092616192), // BC1NEZC_MMR6
680
42.5k
    UINT64_C(1157693440), // BC1T
681
42.5k
    UINT64_C(1157824512), // BC1TL
682
42.5k
    UINT64_C(1134559232), // BC1T_MM
683
42.5k
    UINT64_C(1226833920), // BC2EQZ
684
42.5k
    UINT64_C(1094713344), // BC2EQZC_MMR6
685
42.5k
    UINT64_C(1235222528), // BC2NEZ
686
42.5k
    UINT64_C(1096810496), // BC2NEZC_MMR6
687
42.5k
    UINT64_C(2045771785), // BCLRI_B
688
42.5k
    UINT64_C(2038431753), // BCLRI_D
689
42.5k
    UINT64_C(2044723209), // BCLRI_H
690
42.5k
    UINT64_C(2042626057), // BCLRI_W
691
42.5k
    UINT64_C(2038431757), // BCLR_B
692
42.5k
    UINT64_C(2044723213), // BCLR_D
693
42.5k
    UINT64_C(2040528909), // BCLR_H
694
42.5k
    UINT64_C(2042626061), // BCLR_W
695
42.5k
    UINT64_C(2483027968), // BC_MMR6
696
42.5k
    UINT64_C(268435456),  // BEQ
697
42.5k
    UINT64_C(268435456),  // BEQ64
698
42.5k
    UINT64_C(536870912),  // BEQC
699
42.5k
    UINT64_C(536870912),  // BEQC64
700
42.5k
    UINT64_C(1946157056), // BEQC_MMR6
701
42.5k
    UINT64_C(1342177280), // BEQL
702
42.5k
    UINT64_C(35840),  // BEQZ16_MM
703
42.5k
    UINT64_C(536870912),  // BEQZALC
704
42.5k
    UINT64_C(1946157056), // BEQZALC_MMR6
705
42.5k
    UINT64_C(3623878656), // BEQZC
706
42.5k
    UINT64_C(35840),  // BEQZC16_MMR6
707
42.5k
    UINT64_C(3623878656), // BEQZC64
708
42.5k
    UINT64_C(1088421888), // BEQZC_MM
709
42.5k
    UINT64_C(2147483648), // BEQZC_MMR6
710
42.5k
    UINT64_C(2483027968), // BEQ_MM
711
42.5k
    UINT64_C(1476395008), // BGEC
712
42.5k
    UINT64_C(1476395008), // BGEC64
713
42.5k
    UINT64_C(4093640704), // BGEC_MMR6
714
42.5k
    UINT64_C(402653184),  // BGEUC
715
42.5k
    UINT64_C(402653184),  // BGEUC64
716
42.5k
    UINT64_C(3221225472), // BGEUC_MMR6
717
42.5k
    UINT64_C(67174400), // BGEZ
718
42.5k
    UINT64_C(67174400), // BGEZ64
719
42.5k
    UINT64_C(68222976), // BGEZAL
720
42.5k
    UINT64_C(402653184),  // BGEZALC
721
42.5k
    UINT64_C(3221225472), // BGEZALC_MMR6
722
42.5k
    UINT64_C(68354048), // BGEZALL
723
42.5k
    UINT64_C(1113587712), // BGEZALS_MM
724
42.5k
    UINT64_C(1080033280), // BGEZAL_MM
725
42.5k
    UINT64_C(1476395008), // BGEZC
726
42.5k
    UINT64_C(1476395008), // BGEZC64
727
42.5k
    UINT64_C(4093640704), // BGEZC_MMR6
728
42.5k
    UINT64_C(67305472), // BGEZL
729
42.5k
    UINT64_C(1077936128), // BGEZ_MM
730
42.5k
    UINT64_C(469762048),  // BGTZ
731
42.5k
    UINT64_C(469762048),  // BGTZ64
732
42.5k
    UINT64_C(469762048),  // BGTZALC
733
42.5k
    UINT64_C(3758096384), // BGTZALC_MMR6
734
42.5k
    UINT64_C(1543503872), // BGTZC
735
42.5k
    UINT64_C(1543503872), // BGTZC64
736
42.5k
    UINT64_C(3556769792), // BGTZC_MMR6
737
42.5k
    UINT64_C(1543503872), // BGTZL
738
42.5k
    UINT64_C(1086324736), // BGTZ_MM
739
42.5k
    UINT64_C(2070937609), // BINSLI_B
740
42.5k
    UINT64_C(2063597577), // BINSLI_D
741
42.5k
    UINT64_C(2069889033), // BINSLI_H
742
42.5k
    UINT64_C(2067791881), // BINSLI_W
743
42.5k
    UINT64_C(2063597581), // BINSL_B
744
42.5k
    UINT64_C(2069889037), // BINSL_D
745
42.5k
    UINT64_C(2065694733), // BINSL_H
746
42.5k
    UINT64_C(2067791885), // BINSL_W
747
42.5k
    UINT64_C(2079326217), // BINSRI_B
748
42.5k
    UINT64_C(2071986185), // BINSRI_D
749
42.5k
    UINT64_C(2078277641), // BINSRI_H
750
42.5k
    UINT64_C(2076180489), // BINSRI_W
751
42.5k
    UINT64_C(2071986189), // BINSR_B
752
42.5k
    UINT64_C(2078277645), // BINSR_D
753
42.5k
    UINT64_C(2074083341), // BINSR_H
754
42.5k
    UINT64_C(2076180493), // BINSR_W
755
42.5k
    UINT64_C(2080376530), // BITREV
756
42.5k
    UINT64_C(12604),  // BITREV_MM
757
42.5k
    UINT64_C(2080374816), // BITSWAP
758
42.5k
    UINT64_C(2876), // BITSWAP_MMR6
759
42.5k
    UINT64_C(402653184),  // BLEZ
760
42.5k
    UINT64_C(402653184),  // BLEZ64
761
42.5k
    UINT64_C(402653184),  // BLEZALC
762
42.5k
    UINT64_C(3221225472), // BLEZALC_MMR6
763
42.5k
    UINT64_C(1476395008), // BLEZC
764
42.5k
    UINT64_C(1476395008), // BLEZC64
765
42.5k
    UINT64_C(4093640704), // BLEZC_MMR6
766
42.5k
    UINT64_C(1476395008), // BLEZL
767
42.5k
    UINT64_C(1082130432), // BLEZ_MM
768
42.5k
    UINT64_C(1543503872), // BLTC
769
42.5k
    UINT64_C(1543503872), // BLTC64
770
42.5k
    UINT64_C(3556769792), // BLTC_MMR6
771
42.5k
    UINT64_C(469762048),  // BLTUC
772
42.5k
    UINT64_C(469762048),  // BLTUC64
773
42.5k
    UINT64_C(3758096384), // BLTUC_MMR6
774
42.5k
    UINT64_C(67108864), // BLTZ
775
42.5k
    UINT64_C(67108864), // BLTZ64
776
42.5k
    UINT64_C(68157440), // BLTZAL
777
42.5k
    UINT64_C(469762048),  // BLTZALC
778
42.5k
    UINT64_C(3758096384), // BLTZALC_MMR6
779
42.5k
    UINT64_C(68288512), // BLTZALL
780
42.5k
    UINT64_C(1109393408), // BLTZALS_MM
781
42.5k
    UINT64_C(1075838976), // BLTZAL_MM
782
42.5k
    UINT64_C(1543503872), // BLTZC
783
42.5k
    UINT64_C(1543503872), // BLTZC64
784
42.5k
    UINT64_C(3556769792), // BLTZC_MMR6
785
42.5k
    UINT64_C(67239936), // BLTZL
786
42.5k
    UINT64_C(1073741824), // BLTZ_MM
787
42.5k
    UINT64_C(2013265921), // BMNZI_B
788
42.5k
    UINT64_C(2021654558), // BMNZ_V
789
42.5k
    UINT64_C(2030043137), // BMZI_B
790
42.5k
    UINT64_C(2023751710), // BMZ_V
791
42.5k
    UINT64_C(335544320),  // BNE
792
42.5k
    UINT64_C(335544320),  // BNE64
793
42.5k
    UINT64_C(1610612736), // BNEC
794
42.5k
    UINT64_C(1610612736), // BNEC64
795
42.5k
    UINT64_C(2080374784), // BNEC_MMR6
796
42.5k
    UINT64_C(2062549001), // BNEGI_B
797
42.5k
    UINT64_C(2055208969), // BNEGI_D
798
42.5k
    UINT64_C(2061500425), // BNEGI_H
799
42.5k
    UINT64_C(2059403273), // BNEGI_W
800
42.5k
    UINT64_C(2055208973), // BNEG_B
801
42.5k
    UINT64_C(2061500429), // BNEG_D
802
42.5k
    UINT64_C(2057306125), // BNEG_H
803
42.5k
    UINT64_C(2059403277), // BNEG_W
804
42.5k
    UINT64_C(1409286144), // BNEL
805
42.5k
    UINT64_C(44032),  // BNEZ16_MM
806
42.5k
    UINT64_C(1610612736), // BNEZALC
807
42.5k
    UINT64_C(2080374784), // BNEZALC_MMR6
808
42.5k
    UINT64_C(4160749568), // BNEZC
809
42.5k
    UINT64_C(44032),  // BNEZC16_MMR6
810
42.5k
    UINT64_C(4160749568), // BNEZC64
811
42.5k
    UINT64_C(1084227584), // BNEZC_MM
812
42.5k
    UINT64_C(2684354560), // BNEZC_MMR6
813
42.5k
    UINT64_C(3019898880), // BNE_MM
814
42.5k
    UINT64_C(1610612736), // BNVC
815
42.5k
    UINT64_C(2080374784), // BNVC_MMR6
816
42.5k
    UINT64_C(1199570944), // BNZ_B
817
42.5k
    UINT64_C(1205862400), // BNZ_D
818
42.5k
    UINT64_C(1201668096), // BNZ_H
819
42.5k
    UINT64_C(1172307968), // BNZ_V
820
42.5k
    UINT64_C(1203765248), // BNZ_W
821
42.5k
    UINT64_C(536870912),  // BOVC
822
42.5k
    UINT64_C(1946157056), // BOVC_MMR6
823
42.5k
    UINT64_C(68943872), // BPOSGE32
824
42.5k
    UINT64_C(1126170624), // BPOSGE32C_MMR3
825
42.5k
    UINT64_C(1130364928), // BPOSGE32_MM
826
42.5k
    UINT64_C(13), // BREAK
827
42.5k
    UINT64_C(18048),  // BREAK16_MM
828
42.5k
    UINT64_C(17435),  // BREAK16_MMR6
829
42.5k
    UINT64_C(7),  // BREAK_MM
830
42.5k
    UINT64_C(7),  // BREAK_MMR6
831
42.5k
    UINT64_C(2046820353), // BSELI_B
832
42.5k
    UINT64_C(2025848862), // BSEL_V
833
42.5k
    UINT64_C(2054160393), // BSETI_B
834
42.5k
    UINT64_C(2046820361), // BSETI_D
835
42.5k
    UINT64_C(2053111817), // BSETI_H
836
42.5k
    UINT64_C(2051014665), // BSETI_W
837
42.5k
    UINT64_C(2046820365), // BSET_B
838
42.5k
    UINT64_C(2053111821), // BSET_D
839
42.5k
    UINT64_C(2048917517), // BSET_H
840
42.5k
    UINT64_C(2051014669), // BSET_W
841
42.5k
    UINT64_C(1191182336), // BZ_B
842
42.5k
    UINT64_C(1197473792), // BZ_D
843
42.5k
    UINT64_C(1193279488), // BZ_H
844
42.5k
    UINT64_C(1163919360), // BZ_V
845
42.5k
    UINT64_C(1195376640), // BZ_W
846
42.5k
    UINT64_C(8192), // BeqzRxImm16
847
42.5k
    UINT64_C(4026540032), // BeqzRxImmX16
848
42.5k
    UINT64_C(4096), // Bimm16
849
42.5k
    UINT64_C(4026535936), // BimmX16
850
42.5k
    UINT64_C(10240),  // BnezRxImm16
851
42.5k
    UINT64_C(4026542080), // BnezRxImmX16
852
42.5k
    UINT64_C(59397),  // Break16
853
42.5k
    UINT64_C(24576),  // Bteqz16
854
42.5k
    UINT64_C(4026544128), // BteqzX16
855
42.5k
    UINT64_C(24832),  // Btnez16
856
42.5k
    UINT64_C(4026544384), // BtnezX16
857
42.5k
    UINT64_C(3154116608), // CACHE
858
42.5k
    UINT64_C(2080374811), // CACHEE
859
42.5k
    UINT64_C(1610655232), // CACHEE_MM
860
42.5k
    UINT64_C(536895488),  // CACHE_MM
861
42.5k
    UINT64_C(536895488),  // CACHE_MMR6
862
42.5k
    UINT64_C(2080374821), // CACHE_R6
863
42.5k
    UINT64_C(1176502282), // CEIL_L_D64
864
42.5k
    UINT64_C(1409307451), // CEIL_L_D_MMR6
865
42.5k
    UINT64_C(1174405130), // CEIL_L_S
866
42.5k
    UINT64_C(1409291067), // CEIL_L_S_MMR6
867
42.5k
    UINT64_C(1176502286), // CEIL_W_D32
868
42.5k
    UINT64_C(1176502286), // CEIL_W_D64
869
42.5k
    UINT64_C(1409309499), // CEIL_W_D_MMR6
870
42.5k
    UINT64_C(1409309499), // CEIL_W_MM
871
42.5k
    UINT64_C(1174405134), // CEIL_W_S
872
42.5k
    UINT64_C(1409293115), // CEIL_W_S_MM
873
42.5k
    UINT64_C(1409293115), // CEIL_W_S_MMR6
874
42.5k
    UINT64_C(2013265927), // CEQI_B
875
42.5k
    UINT64_C(2019557383), // CEQI_D
876
42.5k
    UINT64_C(2015363079), // CEQI_H
877
42.5k
    UINT64_C(2017460231), // CEQI_W
878
42.5k
    UINT64_C(2013265935), // CEQ_B
879
42.5k
    UINT64_C(2019557391), // CEQ_D
880
42.5k
    UINT64_C(2015363087), // CEQ_H
881
42.5k
    UINT64_C(2017460239), // CEQ_W
882
42.5k
    UINT64_C(1145044992), // CFC1
883
42.5k
    UINT64_C(1409290299), // CFC1_MM
884
42.5k
    UINT64_C(52540),  // CFC2_MM
885
42.5k
    UINT64_C(2021523481), // CFCMSA
886
42.5k
    UINT64_C(1879048242), // CINS
887
42.5k
    UINT64_C(1879048243), // CINS32
888
42.5k
    UINT64_C(1879048242), // CINS64_32
889
42.5k
    UINT64_C(1879048242), // CINS_i32
890
42.5k
    UINT64_C(1176502299), // CLASS_D
891
42.5k
    UINT64_C(1409286752), // CLASS_D_MMR6
892
42.5k
    UINT64_C(1174405147), // CLASS_S
893
42.5k
    UINT64_C(1409286240), // CLASS_S_MMR6
894
42.5k
    UINT64_C(2046820359), // CLEI_S_B
895
42.5k
    UINT64_C(2053111815), // CLEI_S_D
896
42.5k
    UINT64_C(2048917511), // CLEI_S_H
897
42.5k
    UINT64_C(2051014663), // CLEI_S_W
898
42.5k
    UINT64_C(2055208967), // CLEI_U_B
899
42.5k
    UINT64_C(2061500423), // CLEI_U_D
900
42.5k
    UINT64_C(2057306119), // CLEI_U_H
901
42.5k
    UINT64_C(2059403271), // CLEI_U_W
902
42.5k
    UINT64_C(2046820367), // CLE_S_B
903
42.5k
    UINT64_C(2053111823), // CLE_S_D
904
42.5k
    UINT64_C(2048917519), // CLE_S_H
905
42.5k
    UINT64_C(2051014671), // CLE_S_W
906
42.5k
    UINT64_C(2055208975), // CLE_U_B
907
42.5k
    UINT64_C(2061500431), // CLE_U_D
908
42.5k
    UINT64_C(2057306127), // CLE_U_H
909
42.5k
    UINT64_C(2059403279), // CLE_U_W
910
42.5k
    UINT64_C(1879048225), // CLO
911
42.5k
    UINT64_C(19260),  // CLO_MM
912
42.5k
    UINT64_C(19260),  // CLO_MMR6
913
42.5k
    UINT64_C(81), // CLO_R6
914
42.5k
    UINT64_C(2030043143), // CLTI_S_B
915
42.5k
    UINT64_C(2036334599), // CLTI_S_D
916
42.5k
    UINT64_C(2032140295), // CLTI_S_H
917
42.5k
    UINT64_C(2034237447), // CLTI_S_W
918
42.5k
    UINT64_C(2038431751), // CLTI_U_B
919
42.5k
    UINT64_C(2044723207), // CLTI_U_D
920
42.5k
    UINT64_C(2040528903), // CLTI_U_H
921
42.5k
    UINT64_C(2042626055), // CLTI_U_W
922
42.5k
    UINT64_C(2030043151), // CLT_S_B
923
42.5k
    UINT64_C(2036334607), // CLT_S_D
924
42.5k
    UINT64_C(2032140303), // CLT_S_H
925
42.5k
    UINT64_C(2034237455), // CLT_S_W
926
42.5k
    UINT64_C(2038431759), // CLT_U_B
927
42.5k
    UINT64_C(2044723215), // CLT_U_D
928
42.5k
    UINT64_C(2040528911), // CLT_U_H
929
42.5k
    UINT64_C(2042626063), // CLT_U_W
930
42.5k
    UINT64_C(1879048224), // CLZ
931
42.5k
    UINT64_C(23356),  // CLZ_MM
932
42.5k
    UINT64_C(80), // CLZ_MMR6
933
42.5k
    UINT64_C(80), // CLZ_R6
934
42.5k
    UINT64_C(2080376337), // CMPGDU_EQ_QB
935
42.5k
    UINT64_C(389),  // CMPGDU_EQ_QB_MMR2
936
42.5k
    UINT64_C(2080376465), // CMPGDU_LE_QB
937
42.5k
    UINT64_C(517),  // CMPGDU_LE_QB_MMR2
938
42.5k
    UINT64_C(2080376401), // CMPGDU_LT_QB
939
42.5k
    UINT64_C(453),  // CMPGDU_LT_QB_MMR2
940
42.5k
    UINT64_C(2080375057), // CMPGU_EQ_QB
941
42.5k
    UINT64_C(1476395205), // CMPGU_EQ_QB_MM
942
42.5k
    UINT64_C(2080375185), // CMPGU_LE_QB
943
42.5k
    UINT64_C(1476395333), // CMPGU_LE_QB_MM
944
42.5k
    UINT64_C(2080375121), // CMPGU_LT_QB
945
42.5k
    UINT64_C(1476395269), // CMPGU_LT_QB_MM
946
42.5k
    UINT64_C(2080374801), // CMPU_EQ_QB
947
42.5k
    UINT64_C(581),  // CMPU_EQ_QB_MM
948
42.5k
    UINT64_C(2080374929), // CMPU_LE_QB
949
42.5k
    UINT64_C(709),  // CMPU_LE_QB_MM
950
42.5k
    UINT64_C(2080374865), // CMPU_LT_QB
951
42.5k
    UINT64_C(645),  // CMPU_LT_QB_MM
952
42.5k
    UINT64_C(1409286165), // CMP_AF_D_MMR6
953
42.5k
    UINT64_C(1409286149), // CMP_AF_S_MMR6
954
42.5k
    UINT64_C(1184890882), // CMP_EQ_D
955
42.5k
    UINT64_C(1409286293), // CMP_EQ_D_MMR6
956
42.5k
    UINT64_C(2080375313), // CMP_EQ_PH
957
42.5k
    UINT64_C(5),  // CMP_EQ_PH_MM
958
42.5k
    UINT64_C(1182793730), // CMP_EQ_S
959
42.5k
    UINT64_C(1409286277), // CMP_EQ_S_MMR6
960
42.5k
    UINT64_C(1184890880), // CMP_F_D
961
42.5k
    UINT64_C(1182793728), // CMP_F_S
962
42.5k
    UINT64_C(1184890886), // CMP_LE_D
963
42.5k
    UINT64_C(1409286549), // CMP_LE_D_MMR6
964
42.5k
    UINT64_C(2080375441), // CMP_LE_PH
965
42.5k
    UINT64_C(133),  // CMP_LE_PH_MM
966
42.5k
    UINT64_C(1182793734), // CMP_LE_S
967
42.5k
    UINT64_C(1409286533), // CMP_LE_S_MMR6
968
42.5k
    UINT64_C(1184890884), // CMP_LT_D
969
42.5k
    UINT64_C(1409286421), // CMP_LT_D_MMR6
970
42.5k
    UINT64_C(2080375377), // CMP_LT_PH
971
42.5k
    UINT64_C(69), // CMP_LT_PH_MM
972
42.5k
    UINT64_C(1182793732), // CMP_LT_S
973
42.5k
    UINT64_C(1409286405), // CMP_LT_S_MMR6
974
42.5k
    UINT64_C(1184890888), // CMP_SAF_D
975
42.5k
    UINT64_C(1409286677), // CMP_SAF_D_MMR6
976
42.5k
    UINT64_C(1182793736), // CMP_SAF_S
977
42.5k
    UINT64_C(1409286661), // CMP_SAF_S_MMR6
978
42.5k
    UINT64_C(1184890890), // CMP_SEQ_D
979
42.5k
    UINT64_C(1409286805), // CMP_SEQ_D_MMR6
980
42.5k
    UINT64_C(1182793738), // CMP_SEQ_S
981
42.5k
    UINT64_C(1409286789), // CMP_SEQ_S_MMR6
982
42.5k
    UINT64_C(1184890894), // CMP_SLE_D
983
42.5k
    UINT64_C(1409287061), // CMP_SLE_D_MMR6
984
42.5k
    UINT64_C(1182793742), // CMP_SLE_S
985
42.5k
    UINT64_C(1409287045), // CMP_SLE_S_MMR6
986
42.5k
    UINT64_C(1184890892), // CMP_SLT_D
987
42.5k
    UINT64_C(1409286933), // CMP_SLT_D_MMR6
988
42.5k
    UINT64_C(1182793740), // CMP_SLT_S
989
42.5k
    UINT64_C(1409286917), // CMP_SLT_S_MMR6
990
42.5k
    UINT64_C(1184890891), // CMP_SUEQ_D
991
42.5k
    UINT64_C(1409286869), // CMP_SUEQ_D_MMR6
992
42.5k
    UINT64_C(1182793739), // CMP_SUEQ_S
993
42.5k
    UINT64_C(1409286853), // CMP_SUEQ_S_MMR6
994
42.5k
    UINT64_C(1184890895), // CMP_SULE_D
995
42.5k
    UINT64_C(1409287125), // CMP_SULE_D_MMR6
996
42.5k
    UINT64_C(1182793743), // CMP_SULE_S
997
42.5k
    UINT64_C(1409287109), // CMP_SULE_S_MMR6
998
42.5k
    UINT64_C(1184890893), // CMP_SULT_D
999
42.5k
    UINT64_C(1409286997), // CMP_SULT_D_MMR6
1000
42.5k
    UINT64_C(1182793741), // CMP_SULT_S
1001
42.5k
    UINT64_C(1409286981), // CMP_SULT_S_MMR6
1002
42.5k
    UINT64_C(1184890889), // CMP_SUN_D
1003
42.5k
    UINT64_C(1409286741), // CMP_SUN_D_MMR6
1004
42.5k
    UINT64_C(1182793737), // CMP_SUN_S
1005
42.5k
    UINT64_C(1409286725), // CMP_SUN_S_MMR6
1006
42.5k
    UINT64_C(1184890883), // CMP_UEQ_D
1007
42.5k
    UINT64_C(1409286357), // CMP_UEQ_D_MMR6
1008
42.5k
    UINT64_C(1182793731), // CMP_UEQ_S
1009
42.5k
    UINT64_C(1409286341), // CMP_UEQ_S_MMR6
1010
42.5k
    UINT64_C(1184890887), // CMP_ULE_D
1011
42.5k
    UINT64_C(1409286613), // CMP_ULE_D_MMR6
1012
42.5k
    UINT64_C(1182793735), // CMP_ULE_S
1013
42.5k
    UINT64_C(1409286597), // CMP_ULE_S_MMR6
1014
42.5k
    UINT64_C(1184890885), // CMP_ULT_D
1015
42.5k
    UINT64_C(1409286485), // CMP_ULT_D_MMR6
1016
42.5k
    UINT64_C(1182793733), // CMP_ULT_S
1017
42.5k
    UINT64_C(1409286469), // CMP_ULT_S_MMR6
1018
42.5k
    UINT64_C(1184890881), // CMP_UN_D
1019
42.5k
    UINT64_C(1409286229), // CMP_UN_D_MMR6
1020
42.5k
    UINT64_C(1182793729), // CMP_UN_S
1021
42.5k
    UINT64_C(1409286213), // CMP_UN_S_MMR6
1022
42.5k
    UINT64_C(2021654553), // COPY_S_B
1023
42.5k
    UINT64_C(2025324569), // COPY_S_D
1024
42.5k
    UINT64_C(2023751705), // COPY_S_H
1025
42.5k
    UINT64_C(2024800281), // COPY_S_W
1026
42.5k
    UINT64_C(2025848857), // COPY_U_B
1027
42.5k
    UINT64_C(2027946009), // COPY_U_H
1028
42.5k
    UINT64_C(2028994585), // COPY_U_W
1029
42.5k
    UINT64_C(2080374799), // CRC32B
1030
42.5k
    UINT64_C(2080375055), // CRC32CB
1031
42.5k
    UINT64_C(2080375247), // CRC32CD
1032
42.5k
    UINT64_C(2080375119), // CRC32CH
1033
42.5k
    UINT64_C(2080375183), // CRC32CW
1034
42.5k
    UINT64_C(2080374991), // CRC32D
1035
42.5k
    UINT64_C(2080374863), // CRC32H
1036
42.5k
    UINT64_C(2080374927), // CRC32W
1037
42.5k
    UINT64_C(1153433600), // CTC1
1038
42.5k
    UINT64_C(1409292347), // CTC1_MM
1039
42.5k
    UINT64_C(56636),  // CTC2_MM
1040
42.5k
    UINT64_C(2017329177), // CTCMSA
1041
42.5k
    UINT64_C(1174405153), // CVT_D32_S
1042
42.5k
    UINT64_C(1409291131), // CVT_D32_S_MM
1043
42.5k
    UINT64_C(1182793761), // CVT_D32_W
1044
42.5k
    UINT64_C(1409299323), // CVT_D32_W_MM
1045
42.5k
    UINT64_C(1184890913), // CVT_D64_L
1046
42.5k
    UINT64_C(1174405153), // CVT_D64_S
1047
42.5k
    UINT64_C(1409291131), // CVT_D64_S_MM
1048
42.5k
    UINT64_C(1182793761), // CVT_D64_W
1049
42.5k
    UINT64_C(1409299323), // CVT_D64_W_MM
1050
42.5k
    UINT64_C(1409307515), // CVT_D_L_MMR6
1051
42.5k
    UINT64_C(1176502309), // CVT_L_D64
1052
42.5k
    UINT64_C(1409302843), // CVT_L_D64_MM
1053
42.5k
    UINT64_C(1409302843), // CVT_L_D_MMR6
1054
42.5k
    UINT64_C(1174405157), // CVT_L_S
1055
42.5k
    UINT64_C(1409286459), // CVT_L_S_MM
1056
42.5k
    UINT64_C(1409286459), // CVT_L_S_MMR6
1057
42.5k
    UINT64_C(1176502304), // CVT_S_D32
1058
42.5k
    UINT64_C(1409293179), // CVT_S_D32_MM
1059
42.5k
    UINT64_C(1176502304), // CVT_S_D64
1060
42.5k
    UINT64_C(1409293179), // CVT_S_D64_MM
1061
42.5k
    UINT64_C(1184890912), // CVT_S_L
1062
42.5k
    UINT64_C(1409309563), // CVT_S_L_MMR6
1063
42.5k
    UINT64_C(1182793760), // CVT_S_W
1064
42.5k
    UINT64_C(1409301371), // CVT_S_W_MM
1065
42.5k
    UINT64_C(1409301371), // CVT_S_W_MMR6
1066
42.5k
    UINT64_C(1176502308), // CVT_W_D32
1067
42.5k
    UINT64_C(1409304891), // CVT_W_D32_MM
1068
42.5k
    UINT64_C(1176502308), // CVT_W_D64
1069
42.5k
    UINT64_C(1409304891), // CVT_W_D64_MM
1070
42.5k
    UINT64_C(1174405156), // CVT_W_S
1071
42.5k
    UINT64_C(1409288507), // CVT_W_S_MM
1072
42.5k
    UINT64_C(1409288507), // CVT_W_S_MMR6
1073
42.5k
    UINT64_C(1176502322), // C_EQ_D32
1074
42.5k
    UINT64_C(1409287356), // C_EQ_D32_MM
1075
42.5k
    UINT64_C(1176502322), // C_EQ_D64
1076
42.5k
    UINT64_C(1409287356), // C_EQ_D64_MM
1077
42.5k
    UINT64_C(1174405170), // C_EQ_S
1078
42.5k
    UINT64_C(1409286332), // C_EQ_S_MM
1079
42.5k
    UINT64_C(1176502320), // C_F_D32
1080
42.5k
    UINT64_C(1409287228), // C_F_D32_MM
1081
42.5k
    UINT64_C(1176502320), // C_F_D64
1082
42.5k
    UINT64_C(1409287228), // C_F_D64_MM
1083
42.5k
    UINT64_C(1174405168), // C_F_S
1084
42.5k
    UINT64_C(1409286204), // C_F_S_MM
1085
42.5k
    UINT64_C(1176502334), // C_LE_D32
1086
42.5k
    UINT64_C(1409288124), // C_LE_D32_MM
1087
42.5k
    UINT64_C(1176502334), // C_LE_D64
1088
42.5k
    UINT64_C(1409288124), // C_LE_D64_MM
1089
42.5k
    UINT64_C(1174405182), // C_LE_S
1090
42.5k
    UINT64_C(1409287100), // C_LE_S_MM
1091
42.5k
    UINT64_C(1176502332), // C_LT_D32
1092
42.5k
    UINT64_C(1409287996), // C_LT_D32_MM
1093
42.5k
    UINT64_C(1176502332), // C_LT_D64
1094
42.5k
    UINT64_C(1409287996), // C_LT_D64_MM
1095
42.5k
    UINT64_C(1174405180), // C_LT_S
1096
42.5k
    UINT64_C(1409286972), // C_LT_S_MM
1097
42.5k
    UINT64_C(1176502333), // C_NGE_D32
1098
42.5k
    UINT64_C(1409288060), // C_NGE_D32_MM
1099
42.5k
    UINT64_C(1176502333), // C_NGE_D64
1100
42.5k
    UINT64_C(1409288060), // C_NGE_D64_MM
1101
42.5k
    UINT64_C(1174405181), // C_NGE_S
1102
42.5k
    UINT64_C(1409287036), // C_NGE_S_MM
1103
42.5k
    UINT64_C(1176502329), // C_NGLE_D32
1104
42.5k
    UINT64_C(1409287804), // C_NGLE_D32_MM
1105
42.5k
    UINT64_C(1176502329), // C_NGLE_D64
1106
42.5k
    UINT64_C(1409287804), // C_NGLE_D64_MM
1107
42.5k
    UINT64_C(1174405177), // C_NGLE_S
1108
42.5k
    UINT64_C(1409286780), // C_NGLE_S_MM
1109
42.5k
    UINT64_C(1176502331), // C_NGL_D32
1110
42.5k
    UINT64_C(1409287932), // C_NGL_D32_MM
1111
42.5k
    UINT64_C(1176502331), // C_NGL_D64
1112
42.5k
    UINT64_C(1409287932), // C_NGL_D64_MM
1113
42.5k
    UINT64_C(1174405179), // C_NGL_S
1114
42.5k
    UINT64_C(1409286908), // C_NGL_S_MM
1115
42.5k
    UINT64_C(1176502335), // C_NGT_D32
1116
42.5k
    UINT64_C(1409288188), // C_NGT_D32_MM
1117
42.5k
    UINT64_C(1176502335), // C_NGT_D64
1118
42.5k
    UINT64_C(1409288188), // C_NGT_D64_MM
1119
42.5k
    UINT64_C(1174405183), // C_NGT_S
1120
42.5k
    UINT64_C(1409287164), // C_NGT_S_MM
1121
42.5k
    UINT64_C(1176502326), // C_OLE_D32
1122
42.5k
    UINT64_C(1409287612), // C_OLE_D32_MM
1123
42.5k
    UINT64_C(1176502326), // C_OLE_D64
1124
42.5k
    UINT64_C(1409287612), // C_OLE_D64_MM
1125
42.5k
    UINT64_C(1174405174), // C_OLE_S
1126
42.5k
    UINT64_C(1409286588), // C_OLE_S_MM
1127
42.5k
    UINT64_C(1176502324), // C_OLT_D32
1128
42.5k
    UINT64_C(1409287484), // C_OLT_D32_MM
1129
42.5k
    UINT64_C(1176502324), // C_OLT_D64
1130
42.5k
    UINT64_C(1409287484), // C_OLT_D64_MM
1131
42.5k
    UINT64_C(1174405172), // C_OLT_S
1132
42.5k
    UINT64_C(1409286460), // C_OLT_S_MM
1133
42.5k
    UINT64_C(1176502330), // C_SEQ_D32
1134
42.5k
    UINT64_C(1409287868), // C_SEQ_D32_MM
1135
42.5k
    UINT64_C(1176502330), // C_SEQ_D64
1136
42.5k
    UINT64_C(1409287868), // C_SEQ_D64_MM
1137
42.5k
    UINT64_C(1174405178), // C_SEQ_S
1138
42.5k
    UINT64_C(1409286844), // C_SEQ_S_MM
1139
42.5k
    UINT64_C(1176502328), // C_SF_D32
1140
42.5k
    UINT64_C(1409287740), // C_SF_D32_MM
1141
42.5k
    UINT64_C(1176502328), // C_SF_D64
1142
42.5k
    UINT64_C(1409287740), // C_SF_D64_MM
1143
42.5k
    UINT64_C(1174405176), // C_SF_S
1144
42.5k
    UINT64_C(1409286716), // C_SF_S_MM
1145
42.5k
    UINT64_C(1176502323), // C_UEQ_D32
1146
42.5k
    UINT64_C(1409287420), // C_UEQ_D32_MM
1147
42.5k
    UINT64_C(1176502323), // C_UEQ_D64
1148
42.5k
    UINT64_C(1409287420), // C_UEQ_D64_MM
1149
42.5k
    UINT64_C(1174405171), // C_UEQ_S
1150
42.5k
    UINT64_C(1409286396), // C_UEQ_S_MM
1151
42.5k
    UINT64_C(1176502327), // C_ULE_D32
1152
42.5k
    UINT64_C(1409287676), // C_ULE_D32_MM
1153
42.5k
    UINT64_C(1176502327), // C_ULE_D64
1154
42.5k
    UINT64_C(1409287676), // C_ULE_D64_MM
1155
42.5k
    UINT64_C(1174405175), // C_ULE_S
1156
42.5k
    UINT64_C(1409286652), // C_ULE_S_MM
1157
42.5k
    UINT64_C(1176502325), // C_ULT_D32
1158
42.5k
    UINT64_C(1409287548), // C_ULT_D32_MM
1159
42.5k
    UINT64_C(1176502325), // C_ULT_D64
1160
42.5k
    UINT64_C(1409287548), // C_ULT_D64_MM
1161
42.5k
    UINT64_C(1174405173), // C_ULT_S
1162
42.5k
    UINT64_C(1409286524), // C_ULT_S_MM
1163
42.5k
    UINT64_C(1176502321), // C_UN_D32
1164
42.5k
    UINT64_C(1409287292), // C_UN_D32_MM
1165
42.5k
    UINT64_C(1176502321), // C_UN_D64
1166
42.5k
    UINT64_C(1409287292), // C_UN_D64_MM
1167
42.5k
    UINT64_C(1174405169), // C_UN_S
1168
42.5k
    UINT64_C(1409286268), // C_UN_S_MM
1169
42.5k
    UINT64_C(59402),  // CmpRxRy16
1170
42.5k
    UINT64_C(28672),  // CmpiRxImm16
1171
42.5k
    UINT64_C(4026560512), // CmpiRxImmX16
1172
42.5k
    UINT64_C(44), // DADD
1173
42.5k
    UINT64_C(1610612736), // DADDi
1174
42.5k
    UINT64_C(1677721600), // DADDiu
1175
42.5k
    UINT64_C(45), // DADDu
1176
42.5k
    UINT64_C(67502080), // DAHI
1177
42.5k
    UINT64_C(2080375332), // DALIGN
1178
42.5k
    UINT64_C(69074944), // DATI
1179
42.5k
    UINT64_C(1946157056), // DAUI
1180
42.5k
    UINT64_C(2080374820), // DBITSWAP
1181
42.5k
    UINT64_C(1879048229), // DCLO
1182
42.5k
    UINT64_C(83), // DCLO_R6
1183
42.5k
    UINT64_C(1879048228), // DCLZ
1184
42.5k
    UINT64_C(82), // DCLZ_R6
1185
42.5k
    UINT64_C(158),  // DDIV
1186
42.5k
    UINT64_C(159),  // DDIVU
1187
42.5k
    UINT64_C(1107296287), // DERET
1188
42.5k
    UINT64_C(58236),  // DERET_MM
1189
42.5k
    UINT64_C(58236),  // DERET_MMR6
1190
42.5k
    UINT64_C(2080374787), // DEXT
1191
42.5k
    UINT64_C(2080374787), // DEXT64_32
1192
42.5k
    UINT64_C(2080374785), // DEXTM
1193
42.5k
    UINT64_C(2080374786), // DEXTU
1194
42.5k
    UINT64_C(1096835072), // DI
1195
42.5k
    UINT64_C(2080374791), // DINS
1196
42.5k
    UINT64_C(2080374789), // DINSM
1197
42.5k
    UINT64_C(2080374790), // DINSU
1198
42.5k
    UINT64_C(154),  // DIV
1199
42.5k
    UINT64_C(155),  // DIVU
1200
42.5k
    UINT64_C(408),  // DIVU_MMR6
1201
42.5k
    UINT64_C(280),  // DIV_MMR6
1202
42.5k
    UINT64_C(2046820370), // DIV_S_B
1203
42.5k
    UINT64_C(2053111826), // DIV_S_D
1204
42.5k
    UINT64_C(2048917522), // DIV_S_H
1205
42.5k
    UINT64_C(2051014674), // DIV_S_W
1206
42.5k
    UINT64_C(2055208978), // DIV_U_B
1207
42.5k
    UINT64_C(2061500434), // DIV_U_D
1208
42.5k
    UINT64_C(2057306130), // DIV_U_H
1209
42.5k
    UINT64_C(2059403282), // DIV_U_W
1210
42.5k
    UINT64_C(18300),  // DI_MM
1211
42.5k
    UINT64_C(18300),  // DI_MMR6
1212
42.5k
    UINT64_C(21), // DLSA
1213
42.5k
    UINT64_C(21), // DLSA_R6
1214
42.5k
    UINT64_C(1075838976), // DMFC0
1215
42.5k
    UINT64_C(1142947840), // DMFC1
1216
42.5k
    UINT64_C(1210056704), // DMFC2
1217
42.5k
    UINT64_C(1210056704), // DMFC2_OCTEON
1218
42.5k
    UINT64_C(1080033536), // DMFGC0
1219
42.5k
    UINT64_C(222),  // DMOD
1220
42.5k
    UINT64_C(223),  // DMODU
1221
42.5k
    UINT64_C(1096813505), // DMT
1222
42.5k
    UINT64_C(1084227584), // DMTC0
1223
42.5k
    UINT64_C(1151336448), // DMTC1
1224
42.5k
    UINT64_C(1218445312), // DMTC2
1225
42.5k
    UINT64_C(1218445312), // DMTC2_OCTEON
1226
42.5k
    UINT64_C(1080034048), // DMTGC0
1227
42.5k
    UINT64_C(220),  // DMUH
1228
42.5k
    UINT64_C(221),  // DMUHU
1229
42.5k
    UINT64_C(1879048195), // DMUL
1230
42.5k
    UINT64_C(28), // DMULT
1231
42.5k
    UINT64_C(29), // DMULTu
1232
42.5k
    UINT64_C(157),  // DMULU
1233
42.5k
    UINT64_C(156),  // DMUL_R6
1234
42.5k
    UINT64_C(2019557395), // DOTP_S_D
1235
42.5k
    UINT64_C(2015363091), // DOTP_S_H
1236
42.5k
    UINT64_C(2017460243), // DOTP_S_W
1237
42.5k
    UINT64_C(2027946003), // DOTP_U_D
1238
42.5k
    UINT64_C(2023751699), // DOTP_U_H
1239
42.5k
    UINT64_C(2025848851), // DOTP_U_W
1240
42.5k
    UINT64_C(2036334611), // DPADD_S_D
1241
42.5k
    UINT64_C(2032140307), // DPADD_S_H
1242
42.5k
    UINT64_C(2034237459), // DPADD_S_W
1243
42.5k
    UINT64_C(2044723219), // DPADD_U_D
1244
42.5k
    UINT64_C(2040528915), // DPADD_U_H
1245
42.5k
    UINT64_C(2042626067), // DPADD_U_W
1246
42.5k
    UINT64_C(2080376496), // DPAQX_SA_W_PH
1247
42.5k
    UINT64_C(12988),  // DPAQX_SA_W_PH_MMR2
1248
42.5k
    UINT64_C(2080376368), // DPAQX_S_W_PH
1249
42.5k
    UINT64_C(8892), // DPAQX_S_W_PH_MMR2
1250
42.5k
    UINT64_C(2080375600), // DPAQ_SA_L_W
1251
42.5k
    UINT64_C(4796), // DPAQ_SA_L_W_MM
1252
42.5k
    UINT64_C(2080375088), // DPAQ_S_W_PH
1253
42.5k
    UINT64_C(700),  // DPAQ_S_W_PH_MM
1254
42.5k
    UINT64_C(2080375024), // DPAU_H_QBL
1255
42.5k
    UINT64_C(8380), // DPAU_H_QBL_MM
1256
42.5k
    UINT64_C(2080375280), // DPAU_H_QBR
1257
42.5k
    UINT64_C(12476),  // DPAU_H_QBR_MM
1258
42.5k
    UINT64_C(2080375344), // DPAX_W_PH
1259
42.5k
    UINT64_C(4284), // DPAX_W_PH_MMR2
1260
42.5k
    UINT64_C(2080374832), // DPA_W_PH
1261
42.5k
    UINT64_C(188),  // DPA_W_PH_MMR2
1262
42.5k
    UINT64_C(1879048237), // DPOP
1263
42.5k
    UINT64_C(2080376560), // DPSQX_SA_W_PH
1264
42.5k
    UINT64_C(14012),  // DPSQX_SA_W_PH_MMR2
1265
42.5k
    UINT64_C(2080376432), // DPSQX_S_W_PH
1266
42.5k
    UINT64_C(9916), // DPSQX_S_W_PH_MMR2
1267
42.5k
    UINT64_C(2080375664), // DPSQ_SA_L_W
1268
42.5k
    UINT64_C(5820), // DPSQ_SA_L_W_MM
1269
42.5k
    UINT64_C(2080375152), // DPSQ_S_W_PH
1270
42.5k
    UINT64_C(1724), // DPSQ_S_W_PH_MM
1271
42.5k
    UINT64_C(2053111827), // DPSUB_S_D
1272
42.5k
    UINT64_C(2048917523), // DPSUB_S_H
1273
42.5k
    UINT64_C(2051014675), // DPSUB_S_W
1274
42.5k
    UINT64_C(2061500435), // DPSUB_U_D
1275
42.5k
    UINT64_C(2057306131), // DPSUB_U_H
1276
42.5k
    UINT64_C(2059403283), // DPSUB_U_W
1277
42.5k
    UINT64_C(2080375536), // DPSU_H_QBL
1278
42.5k
    UINT64_C(9404), // DPSU_H_QBL_MM
1279
42.5k
    UINT64_C(2080375792), // DPSU_H_QBR
1280
42.5k
    UINT64_C(13500),  // DPSU_H_QBR_MM
1281
42.5k
    UINT64_C(2080375408), // DPSX_W_PH
1282
42.5k
    UINT64_C(5308), // DPSX_W_PH_MMR2
1283
42.5k
    UINT64_C(2080374896), // DPS_W_PH
1284
42.5k
    UINT64_C(1212), // DPS_W_PH_MMR2
1285
42.5k
    UINT64_C(2097210),  // DROTR
1286
42.5k
    UINT64_C(2097214),  // DROTR32
1287
42.5k
    UINT64_C(86), // DROTRV
1288
42.5k
    UINT64_C(2080374948), // DSBH
1289
42.5k
    UINT64_C(30), // DSDIV
1290
42.5k
    UINT64_C(2080375140), // DSHD
1291
42.5k
    UINT64_C(56), // DSLL
1292
42.5k
    UINT64_C(60), // DSLL32
1293
42.5k
    UINT64_C(60), // DSLL64_32
1294
42.5k
    UINT64_C(20), // DSLLV
1295
42.5k
    UINT64_C(59), // DSRA
1296
42.5k
    UINT64_C(63), // DSRA32
1297
42.5k
    UINT64_C(23), // DSRAV
1298
42.5k
    UINT64_C(58), // DSRL
1299
42.5k
    UINT64_C(62), // DSRL32
1300
42.5k
    UINT64_C(22), // DSRLV
1301
42.5k
    UINT64_C(46), // DSUB
1302
42.5k
    UINT64_C(47), // DSUBu
1303
42.5k
    UINT64_C(31), // DUDIV
1304
42.5k
    UINT64_C(1096810532), // DVP
1305
42.5k
    UINT64_C(1096810497), // DVPE
1306
42.5k
    UINT64_C(6524), // DVP_MMR6
1307
42.5k
    UINT64_C(59418),  // DivRxRy16
1308
42.5k
    UINT64_C(59419),  // DivuRxRy16
1309
42.5k
    UINT64_C(192),  // EHB
1310
42.5k
    UINT64_C(6144), // EHB_MM
1311
42.5k
    UINT64_C(6144), // EHB_MMR6
1312
42.5k
    UINT64_C(1096835104), // EI
1313
42.5k
    UINT64_C(22396),  // EI_MM
1314
42.5k
    UINT64_C(22396),  // EI_MMR6
1315
42.5k
    UINT64_C(1096813537), // EMT
1316
42.5k
    UINT64_C(1107296280), // ERET
1317
42.5k
    UINT64_C(1107296344), // ERETNC
1318
42.5k
    UINT64_C(127868), // ERETNC_MMR6
1319
42.5k
    UINT64_C(62332),  // ERET_MM
1320
42.5k
    UINT64_C(62332),  // ERET_MMR6
1321
42.5k
    UINT64_C(1096810500), // EVP
1322
42.5k
    UINT64_C(1096810529), // EVPE
1323
42.5k
    UINT64_C(14716),  // EVP_MMR6
1324
42.5k
    UINT64_C(2080374784), // EXT
1325
42.5k
    UINT64_C(2080374968), // EXTP
1326
42.5k
    UINT64_C(2080375480), // EXTPDP
1327
42.5k
    UINT64_C(2080375544), // EXTPDPV
1328
42.5k
    UINT64_C(14524),  // EXTPDPV_MM
1329
42.5k
    UINT64_C(13948),  // EXTPDP_MM
1330
42.5k
    UINT64_C(2080375032), // EXTPV
1331
42.5k
    UINT64_C(10428),  // EXTPV_MM
1332
42.5k
    UINT64_C(9852), // EXTP_MM
1333
42.5k
    UINT64_C(2080375288), // EXTRV_RS_W
1334
42.5k
    UINT64_C(11964),  // EXTRV_RS_W_MM
1335
42.5k
    UINT64_C(2080375160), // EXTRV_R_W
1336
42.5k
    UINT64_C(7868), // EXTRV_R_W_MM
1337
42.5k
    UINT64_C(2080375800), // EXTRV_S_H
1338
42.5k
    UINT64_C(16060),  // EXTRV_S_H_MM
1339
42.5k
    UINT64_C(2080374904), // EXTRV_W
1340
42.5k
    UINT64_C(3772), // EXTRV_W_MM
1341
42.5k
    UINT64_C(2080375224), // EXTR_RS_W
1342
42.5k
    UINT64_C(11900),  // EXTR_RS_W_MM
1343
42.5k
    UINT64_C(2080375096), // EXTR_R_W
1344
42.5k
    UINT64_C(7804), // EXTR_R_W_MM
1345
42.5k
    UINT64_C(2080375736), // EXTR_S_H
1346
42.5k
    UINT64_C(15996),  // EXTR_S_H_MM
1347
42.5k
    UINT64_C(2080374840), // EXTR_W
1348
42.5k
    UINT64_C(3708), // EXTR_W_MM
1349
42.5k
    UINT64_C(1879048250), // EXTS
1350
42.5k
    UINT64_C(1879048251), // EXTS32
1351
42.5k
    UINT64_C(44), // EXT_MM
1352
42.5k
    UINT64_C(44), // EXT_MMR6
1353
42.5k
    UINT64_C(1176502277), // FABS_D32
1354
42.5k
    UINT64_C(1409295227), // FABS_D32_MM
1355
42.5k
    UINT64_C(1176502277), // FABS_D64
1356
42.5k
    UINT64_C(1409295227), // FABS_D64_MM
1357
42.5k
    UINT64_C(1174405125), // FABS_S
1358
42.5k
    UINT64_C(1409287035), // FABS_S_MM
1359
42.5k
    UINT64_C(2015363099), // FADD_D
1360
42.5k
    UINT64_C(1176502272), // FADD_D32
1361
42.5k
    UINT64_C(1409286448), // FADD_D32_MM
1362
42.5k
    UINT64_C(1176502272), // FADD_D64
1363
42.5k
    UINT64_C(1409286448), // FADD_D64_MM
1364
42.5k
    UINT64_C(1174405120), // FADD_S
1365
42.5k
    UINT64_C(1409286192), // FADD_S_MM
1366
42.5k
    UINT64_C(1409286192), // FADD_S_MMR6
1367
42.5k
    UINT64_C(2013265947), // FADD_W
1368
42.5k
    UINT64_C(2015363098), // FCAF_D
1369
42.5k
    UINT64_C(2013265946), // FCAF_W
1370
42.5k
    UINT64_C(2023751706), // FCEQ_D
1371
42.5k
    UINT64_C(2021654554), // FCEQ_W
1372
42.5k
    UINT64_C(2065760286), // FCLASS_D
1373
42.5k
    UINT64_C(2065694750), // FCLASS_W
1374
42.5k
    UINT64_C(2040528922), // FCLE_D
1375
42.5k
    UINT64_C(2038431770), // FCLE_W
1376
42.5k
    UINT64_C(2032140314), // FCLT_D
1377
42.5k
    UINT64_C(2030043162), // FCLT_W
1378
42.5k
    UINT64_C(1176502320), // FCMP_D32
1379
42.5k
    UINT64_C(1409287228), // FCMP_D32_MM
1380
42.5k
    UINT64_C(1176502320), // FCMP_D64
1381
42.5k
    UINT64_C(1174405168), // FCMP_S32
1382
42.5k
    UINT64_C(1409286204), // FCMP_S32_MM
1383
42.5k
    UINT64_C(2027946012), // FCNE_D
1384
42.5k
    UINT64_C(2025848860), // FCNE_W
1385
42.5k
    UINT64_C(2019557404), // FCOR_D
1386
42.5k
    UINT64_C(2017460252), // FCOR_W
1387
42.5k
    UINT64_C(2027946010), // FCUEQ_D
1388
42.5k
    UINT64_C(2025848858), // FCUEQ_W
1389
42.5k
    UINT64_C(2044723226), // FCULE_D
1390
42.5k
    UINT64_C(2042626074), // FCULE_W
1391
42.5k
    UINT64_C(2036334618), // FCULT_D
1392
42.5k
    UINT64_C(2034237466), // FCULT_W
1393
42.5k
    UINT64_C(2023751708), // FCUNE_D
1394
42.5k
    UINT64_C(2021654556), // FCUNE_W
1395
42.5k
    UINT64_C(2019557402), // FCUN_D
1396
42.5k
    UINT64_C(2017460250), // FCUN_W
1397
42.5k
    UINT64_C(2027946011), // FDIV_D
1398
42.5k
    UINT64_C(1176502275), // FDIV_D32
1399
42.5k
    UINT64_C(1409286640), // FDIV_D32_MM
1400
42.5k
    UINT64_C(1176502275), // FDIV_D64
1401
42.5k
    UINT64_C(1409286640), // FDIV_D64_MM
1402
42.5k
    UINT64_C(1174405123), // FDIV_S
1403
42.5k
    UINT64_C(1409286384), // FDIV_S_MM
1404
42.5k
    UINT64_C(1409286384), // FDIV_S_MMR6
1405
42.5k
    UINT64_C(2025848859), // FDIV_W
1406
42.5k
    UINT64_C(2046820379), // FEXDO_H
1407
42.5k
    UINT64_C(2048917531), // FEXDO_W
1408
42.5k
    UINT64_C(2044723227), // FEXP2_D
1409
42.5k
    UINT64_C(2042626075), // FEXP2_W
1410
42.5k
    UINT64_C(2066808862), // FEXUPL_D
1411
42.5k
    UINT64_C(2066743326), // FEXUPL_W
1412
42.5k
    UINT64_C(2066939934), // FEXUPR_D
1413
42.5k
    UINT64_C(2066874398), // FEXUPR_W
1414
42.5k
    UINT64_C(2067595294), // FFINT_S_D
1415
42.5k
    UINT64_C(2067529758), // FFINT_S_W
1416
42.5k
    UINT64_C(2067726366), // FFINT_U_D
1417
42.5k
    UINT64_C(2067660830), // FFINT_U_W
1418
42.5k
    UINT64_C(2067071006), // FFQL_D
1419
42.5k
    UINT64_C(2067005470), // FFQL_W
1420
42.5k
    UINT64_C(2067202078), // FFQR_D
1421
42.5k
    UINT64_C(2067136542), // FFQR_W
1422
42.5k
    UINT64_C(2063597598), // FILL_B
1423
42.5k
    UINT64_C(2063794206), // FILL_D
1424
42.5k
    UINT64_C(2063663134), // FILL_H
1425
42.5k
    UINT64_C(2063728670), // FILL_W
1426
42.5k
    UINT64_C(2066677790), // FLOG2_D
1427
42.5k
    UINT64_C(2066612254), // FLOG2_W
1428
42.5k
    UINT64_C(1176502283), // FLOOR_L_D64
1429
42.5k
    UINT64_C(1409303355), // FLOOR_L_D_MMR6
1430
42.5k
    UINT64_C(1174405131), // FLOOR_L_S
1431
42.5k
    UINT64_C(1409286971), // FLOOR_L_S_MMR6
1432
42.5k
    UINT64_C(1176502287), // FLOOR_W_D32
1433
42.5k
    UINT64_C(1176502287), // FLOOR_W_D64
1434
42.5k
    UINT64_C(1409305403), // FLOOR_W_D_MMR6
1435
42.5k
    UINT64_C(1409305403), // FLOOR_W_MM
1436
42.5k
    UINT64_C(1174405135), // FLOOR_W_S
1437
42.5k
    UINT64_C(1409289019), // FLOOR_W_S_MM
1438
42.5k
    UINT64_C(1409289019), // FLOOR_W_S_MMR6
1439
42.5k
    UINT64_C(2032140315), // FMADD_D
1440
42.5k
    UINT64_C(2030043163), // FMADD_W
1441
42.5k
    UINT64_C(2078277659), // FMAX_A_D
1442
42.5k
    UINT64_C(2076180507), // FMAX_A_W
1443
42.5k
    UINT64_C(2074083355), // FMAX_D
1444
42.5k
    UINT64_C(2071986203), // FMAX_W
1445
42.5k
    UINT64_C(2069889051), // FMIN_A_D
1446
42.5k
    UINT64_C(2067791899), // FMIN_A_W
1447
42.5k
    UINT64_C(2065694747), // FMIN_D
1448
42.5k
    UINT64_C(2063597595), // FMIN_W
1449
42.5k
    UINT64_C(1176502278), // FMOV_D32
1450
42.5k
    UINT64_C(1409294459), // FMOV_D32_MM
1451
42.5k
    UINT64_C(1176502278), // FMOV_D64
1452
42.5k
    UINT64_C(1409294459), // FMOV_D64_MM
1453
42.5k
    UINT64_C(1174405126), // FMOV_S
1454
42.5k
    UINT64_C(1409286267), // FMOV_S_MM
1455
42.5k
    UINT64_C(1409286267), // FMOV_S_MMR6
1456
42.5k
    UINT64_C(2036334619), // FMSUB_D
1457
42.5k
    UINT64_C(2034237467), // FMSUB_W
1458
42.5k
    UINT64_C(2023751707), // FMUL_D
1459
42.5k
    UINT64_C(1176502274), // FMUL_D32
1460
42.5k
    UINT64_C(1409286576), // FMUL_D32_MM
1461
42.5k
    UINT64_C(1176502274), // FMUL_D64
1462
42.5k
    UINT64_C(1409286576), // FMUL_D64_MM
1463
42.5k
    UINT64_C(1174405122), // FMUL_S
1464
42.5k
    UINT64_C(1409286320), // FMUL_S_MM
1465
42.5k
    UINT64_C(1409286320), // FMUL_S_MMR6
1466
42.5k
    UINT64_C(2021654555), // FMUL_W
1467
42.5k
    UINT64_C(1176502279), // FNEG_D32
1468
42.5k
    UINT64_C(1409297275), // FNEG_D32_MM
1469
42.5k
    UINT64_C(1176502279), // FNEG_D64
1470
42.5k
    UINT64_C(1409297275), // FNEG_D64_MM
1471
42.5k
    UINT64_C(1174405127), // FNEG_S
1472
42.5k
    UINT64_C(1409289083), // FNEG_S_MM
1473
42.5k
    UINT64_C(1409289083), // FNEG_S_MMR6
1474
42.5k
    UINT64_C(2080374792), // FORK
1475
42.5k
    UINT64_C(2066415646), // FRCP_D
1476
42.5k
    UINT64_C(2066350110), // FRCP_W
1477
42.5k
    UINT64_C(2066546718), // FRINT_D
1478
42.5k
    UINT64_C(2066481182), // FRINT_W
1479
42.5k
    UINT64_C(2066284574), // FRSQRT_D
1480
42.5k
    UINT64_C(2066219038), // FRSQRT_W
1481
42.5k
    UINT64_C(2048917530), // FSAF_D
1482
42.5k
    UINT64_C(2046820378), // FSAF_W
1483
42.5k
    UINT64_C(2057306138), // FSEQ_D
1484
42.5k
    UINT64_C(2055208986), // FSEQ_W
1485
42.5k
    UINT64_C(2074083354), // FSLE_D
1486
42.5k
    UINT64_C(2071986202), // FSLE_W
1487
42.5k
    UINT64_C(2065694746), // FSLT_D
1488
42.5k
    UINT64_C(2063597594), // FSLT_W
1489
42.5k
    UINT64_C(2061500444), // FSNE_D
1490
42.5k
    UINT64_C(2059403292), // FSNE_W
1491
42.5k
    UINT64_C(2053111836), // FSOR_D
1492
42.5k
    UINT64_C(2051014684), // FSOR_W
1493
42.5k
    UINT64_C(2066153502), // FSQRT_D
1494
42.5k
    UINT64_C(1176502276), // FSQRT_D32
1495
42.5k
    UINT64_C(1409305147), // FSQRT_D32_MM
1496
42.5k
    UINT64_C(1176502276), // FSQRT_D64
1497
42.5k
    UINT64_C(1409305147), // FSQRT_D64_MM
1498
42.5k
    UINT64_C(1174405124), // FSQRT_S
1499
42.5k
    UINT64_C(1409288763), // FSQRT_S_MM
1500
42.5k
    UINT64_C(2066087966), // FSQRT_W
1501
42.5k
    UINT64_C(2019557403), // FSUB_D
1502
42.5k
    UINT64_C(1176502273), // FSUB_D32
1503
42.5k
    UINT64_C(1409286512), // FSUB_D32_MM
1504
42.5k
    UINT64_C(1176502273), // FSUB_D64
1505
42.5k
    UINT64_C(1409286512), // FSUB_D64_MM
1506
42.5k
    UINT64_C(1174405121), // FSUB_S
1507
42.5k
    UINT64_C(1409286256), // FSUB_S_MM
1508
42.5k
    UINT64_C(1409286256), // FSUB_S_MMR6
1509
42.5k
    UINT64_C(2017460251), // FSUB_W
1510
42.5k
    UINT64_C(2061500442), // FSUEQ_D
1511
42.5k
    UINT64_C(2059403290), // FSUEQ_W
1512
42.5k
    UINT64_C(2078277658), // FSULE_D
1513
42.5k
    UINT64_C(2076180506), // FSULE_W
1514
42.5k
    UINT64_C(2069889050), // FSULT_D
1515
42.5k
    UINT64_C(2067791898), // FSULT_W
1516
42.5k
    UINT64_C(2057306140), // FSUNE_D
1517
42.5k
    UINT64_C(2055208988), // FSUNE_W
1518
42.5k
    UINT64_C(2053111834), // FSUN_D
1519
42.5k
    UINT64_C(2051014682), // FSUN_W
1520
42.5k
    UINT64_C(2067333150), // FTINT_S_D
1521
42.5k
    UINT64_C(2067267614), // FTINT_S_W
1522
42.5k
    UINT64_C(2067464222), // FTINT_U_D
1523
42.5k
    UINT64_C(2067398686), // FTINT_U_W
1524
42.5k
    UINT64_C(2055208987), // FTQ_H
1525
42.5k
    UINT64_C(2057306139), // FTQ_W
1526
42.5k
    UINT64_C(2065891358), // FTRUNC_S_D
1527
42.5k
    UINT64_C(2065825822), // FTRUNC_S_W
1528
42.5k
    UINT64_C(2066022430), // FTRUNC_U_D
1529
42.5k
    UINT64_C(2065956894), // FTRUNC_U_W
1530
42.5k
    UINT64_C(2080374845), // GINVI
1531
42.5k
    UINT64_C(24956),  // GINVI_MMR6
1532
42.5k
    UINT64_C(2080374973), // GINVT
1533
42.5k
    UINT64_C(29052),  // GINVT_MMR6
1534
42.5k
    UINT64_C(2053111829), // HADD_S_D
1535
42.5k
    UINT64_C(2048917525), // HADD_S_H
1536
42.5k
    UINT64_C(2051014677), // HADD_S_W
1537
42.5k
    UINT64_C(2061500437), // HADD_U_D
1538
42.5k
    UINT64_C(2057306133), // HADD_U_H
1539
42.5k
    UINT64_C(2059403285), // HADD_U_W
1540
42.5k
    UINT64_C(2069889045), // HSUB_S_D
1541
42.5k
    UINT64_C(2065694741), // HSUB_S_H
1542
42.5k
    UINT64_C(2067791893), // HSUB_S_W
1543
42.5k
    UINT64_C(2078277653), // HSUB_U_D
1544
42.5k
    UINT64_C(2074083349), // HSUB_U_H
1545
42.5k
    UINT64_C(2076180501), // HSUB_U_W
1546
42.5k
    UINT64_C(1107296296), // HYPCALL
1547
42.5k
    UINT64_C(50044),  // HYPCALL_MM
1548
42.5k
    UINT64_C(2063597588), // ILVEV_B
1549
42.5k
    UINT64_C(2069889044), // ILVEV_D
1550
42.5k
    UINT64_C(2065694740), // ILVEV_H
1551
42.5k
    UINT64_C(2067791892), // ILVEV_W
1552
42.5k
    UINT64_C(2046820372), // ILVL_B
1553
42.5k
    UINT64_C(2053111828), // ILVL_D
1554
42.5k
    UINT64_C(2048917524), // ILVL_H
1555
42.5k
    UINT64_C(2051014676), // ILVL_W
1556
42.5k
    UINT64_C(2071986196), // ILVOD_B
1557
42.5k
    UINT64_C(2078277652), // ILVOD_D
1558
42.5k
    UINT64_C(2074083348), // ILVOD_H
1559
42.5k
    UINT64_C(2076180500), // ILVOD_W
1560
42.5k
    UINT64_C(2055208980), // ILVR_B
1561
42.5k
    UINT64_C(2061500436), // ILVR_D
1562
42.5k
    UINT64_C(2057306132), // ILVR_H
1563
42.5k
    UINT64_C(2059403284), // ILVR_W
1564
42.5k
    UINT64_C(2080374788), // INS
1565
42.5k
    UINT64_C(2030043161), // INSERT_B
1566
42.5k
    UINT64_C(2033713177), // INSERT_D
1567
42.5k
    UINT64_C(2032140313), // INSERT_H
1568
42.5k
    UINT64_C(2033188889), // INSERT_W
1569
42.5k
    UINT64_C(2080374796), // INSV
1570
42.5k
    UINT64_C(2034237465), // INSVE_B
1571
42.5k
    UINT64_C(2037907481), // INSVE_D
1572
42.5k
    UINT64_C(2036334617), // INSVE_H
1573
42.5k
    UINT64_C(2037383193), // INSVE_W
1574
42.5k
    UINT64_C(16700),  // INSV_MM
1575
42.5k
    UINT64_C(12), // INS_MM
1576
42.5k
    UINT64_C(12), // INS_MMR6
1577
42.5k
    UINT64_C(134217728),  // J
1578
42.5k
    UINT64_C(201326592),  // JAL
1579
42.5k
    UINT64_C(9),  // JALR
1580
42.5k
    UINT64_C(17856),  // JALR16_MM
1581
42.5k
    UINT64_C(9),  // JALR64
1582
42.5k
    UINT64_C(17419),  // JALRC16_MMR6
1583
42.5k
    UINT64_C(7996), // JALRC_HB_MMR6
1584
42.5k
    UINT64_C(3900), // JALRC_MMR6
1585
42.5k
    UINT64_C(17888),  // JALRS16_MM
1586
42.5k
    UINT64_C(20284),  // JALRS_MM
1587
42.5k
    UINT64_C(1033), // JALR_HB
1588
42.5k
    UINT64_C(1033), // JALR_HB64
1589
42.5k
    UINT64_C(3900), // JALR_MM
1590
42.5k
    UINT64_C(1946157056), // JALS_MM
1591
42.5k
    UINT64_C(1946157056), // JALX
1592
42.5k
    UINT64_C(4026531840), // JALX_MM
1593
42.5k
    UINT64_C(4093640704), // JAL_MM
1594
42.5k
    UINT64_C(4160749568), // JIALC
1595
42.5k
    UINT64_C(4160749568), // JIALC64
1596
42.5k
    UINT64_C(2147483648), // JIALC_MMR6
1597
42.5k
    UINT64_C(3623878656), // JIC
1598
42.5k
    UINT64_C(3623878656), // JIC64
1599
42.5k
    UINT64_C(2684354560), // JIC_MMR6
1600
42.5k
    UINT64_C(8),  // JR
1601
42.5k
    UINT64_C(17792),  // JR16_MM
1602
42.5k
    UINT64_C(8),  // JR64
1603
42.5k
    UINT64_C(18176),  // JRADDIUSP
1604
42.5k
    UINT64_C(17824),  // JRC16_MM
1605
42.5k
    UINT64_C(17411),  // JRC16_MMR6
1606
42.5k
    UINT64_C(17427),  // JRCADDIUSP_MMR6
1607
42.5k
    UINT64_C(1032), // JR_HB
1608
42.5k
    UINT64_C(1032), // JR_HB64
1609
42.5k
    UINT64_C(1033), // JR_HB64_R6
1610
42.5k
    UINT64_C(1033), // JR_HB_R6
1611
42.5k
    UINT64_C(3900), // JR_MM
1612
42.5k
    UINT64_C(3556769792), // J_MM
1613
42.5k
    UINT64_C(402653184),  // Jal16
1614
42.5k
    UINT64_C(402653184),  // JalB16
1615
42.5k
    UINT64_C(59424),  // JrRa16
1616
42.5k
    UINT64_C(59616),  // JrcRa16
1617
42.5k
    UINT64_C(59584),  // JrcRx16
1618
42.5k
    UINT64_C(59392),  // JumpLinkReg16
1619
42.5k
    UINT64_C(2147483648), // LB
1620
42.5k
    UINT64_C(2147483648), // LB64
1621
42.5k
    UINT64_C(2080374828), // LBE
1622
42.5k
    UINT64_C(1610639360), // LBE_MM
1623
42.5k
    UINT64_C(2048), // LBU16_MM
1624
42.5k
    UINT64_C(2080375178), // LBUX
1625
42.5k
    UINT64_C(549),  // LBUX_MM
1626
42.5k
    UINT64_C(335544320),  // LBU_MMR6
1627
42.5k
    UINT64_C(469762048),  // LB_MM
1628
42.5k
    UINT64_C(469762048),  // LB_MMR6
1629
42.5k
    UINT64_C(2415919104), // LBu
1630
42.5k
    UINT64_C(2415919104), // LBu64
1631
42.5k
    UINT64_C(2080374824), // LBuE
1632
42.5k
    UINT64_C(1610637312), // LBuE_MM
1633
42.5k
    UINT64_C(335544320),  // LBu_MM
1634
42.5k
    UINT64_C(3690987520), // LD
1635
42.5k
    UINT64_C(3556769792), // LDC1
1636
42.5k
    UINT64_C(3556769792), // LDC164
1637
42.5k
    UINT64_C(3154116608), // LDC1_D64_MMR6
1638
42.5k
    UINT64_C(3154116608), // LDC1_MM
1639
42.5k
    UINT64_C(3623878656), // LDC2
1640
42.5k
    UINT64_C(536879104),  // LDC2_MMR6
1641
42.5k
    UINT64_C(1237319680), // LDC2_R6
1642
42.5k
    UINT64_C(3690987520), // LDC3
1643
42.5k
    UINT64_C(2063597575), // LDI_B
1644
42.5k
    UINT64_C(2069889031), // LDI_D
1645
42.5k
    UINT64_C(2065694727), // LDI_H
1646
42.5k
    UINT64_C(2067791879), // LDI_W
1647
42.5k
    UINT64_C(1744830464), // LDL
1648
42.5k
    UINT64_C(3960995840), // LDPC
1649
42.5k
    UINT64_C(1811939328), // LDR
1650
42.5k
    UINT64_C(1275068417), // LDXC1
1651
42.5k
    UINT64_C(1275068417), // LDXC164
1652
42.5k
    UINT64_C(2013265952), // LD_B
1653
42.5k
    UINT64_C(2013265955), // LD_D
1654
42.5k
    UINT64_C(2013265953), // LD_H
1655
42.5k
    UINT64_C(2013265954), // LD_W
1656
42.5k
    UINT64_C(603979776),  // LEA_ADDiu
1657
42.5k
    UINT64_C(1677721600), // LEA_ADDiu64
1658
42.5k
    UINT64_C(805306368),  // LEA_ADDiu_MM
1659
42.5k
    UINT64_C(2214592512), // LH
1660
42.5k
    UINT64_C(2214592512), // LH64
1661
42.5k
    UINT64_C(2080374829), // LHE
1662
42.5k
    UINT64_C(1610639872), // LHE_MM
1663
42.5k
    UINT64_C(10240),  // LHU16_MM
1664
42.5k
    UINT64_C(2080375050), // LHX
1665
42.5k
    UINT64_C(357),  // LHX_MM
1666
42.5k
    UINT64_C(1006632960), // LH_MM
1667
42.5k
    UINT64_C(2483027968), // LHu
1668
42.5k
    UINT64_C(2483027968), // LHu64
1669
42.5k
    UINT64_C(2080374825), // LHuE
1670
42.5k
    UINT64_C(1610637824), // LHuE_MM
1671
42.5k
    UINT64_C(872415232),  // LHu_MM
1672
42.5k
    UINT64_C(60416),  // LI16_MM
1673
42.5k
    UINT64_C(60416),  // LI16_MMR6
1674
42.5k
    UINT64_C(3221225472), // LL
1675
42.5k
    UINT64_C(3221225472), // LL64
1676
42.5k
    UINT64_C(2080374838), // LL64_R6
1677
42.5k
    UINT64_C(3489660928), // LLD
1678
42.5k
    UINT64_C(2080374839), // LLD_R6
1679
42.5k
    UINT64_C(2080374830), // LLE
1680
42.5k
    UINT64_C(1610640384), // LLE_MM
1681
42.5k
    UINT64_C(1610625024), // LL_MM
1682
42.5k
    UINT64_C(1610625024), // LL_MMR6
1683
42.5k
    UINT64_C(2080374838), // LL_R6
1684
42.5k
    UINT64_C(5),  // LSA
1685
42.5k
    UINT64_C(15), // LSA_MMR6
1686
42.5k
    UINT64_C(5),  // LSA_R6
1687
42.5k
    UINT64_C(268435456),  // LUI_MMR6
1688
42.5k
    UINT64_C(1275068421), // LUXC1
1689
42.5k
    UINT64_C(1275068421), // LUXC164
1690
42.5k
    UINT64_C(1409286472), // LUXC1_MM
1691
42.5k
    UINT64_C(1006632960), // LUi
1692
42.5k
    UINT64_C(1006632960), // LUi64
1693
42.5k
    UINT64_C(1101004800), // LUi_MM
1694
42.5k
    UINT64_C(2348810240), // LW
1695
42.5k
    UINT64_C(26624),  // LW16_MM
1696
42.5k
    UINT64_C(2348810240), // LW64
1697
42.5k
    UINT64_C(3288334336), // LWC1
1698
42.5k
    UINT64_C(2617245696), // LWC1_MM
1699
42.5k
    UINT64_C(3355443200), // LWC2
1700
42.5k
    UINT64_C(536870912),  // LWC2_MMR6
1701
42.5k
    UINT64_C(1228931072), // LWC2_R6
1702
42.5k
    UINT64_C(3422552064), // LWC3
1703
42.5k
    UINT64_C(2348810240), // LWDSP
1704
42.5k
    UINT64_C(4227858432), // LWDSP_MM
1705
42.5k
    UINT64_C(2080374831), // LWE
1706
42.5k
    UINT64_C(1610640896), // LWE_MM
1707
42.5k
    UINT64_C(25600),  // LWGP_MM
1708
42.5k
    UINT64_C(2281701376), // LWL
1709
42.5k
    UINT64_C(2281701376), // LWL64
1710
42.5k
    UINT64_C(2080374809), // LWLE
1711
42.5k
    UINT64_C(1610638336), // LWLE_MM
1712
42.5k
    UINT64_C(1610612736), // LWL_MM
1713
42.5k
    UINT64_C(17664),  // LWM16_MM
1714
42.5k
    UINT64_C(17410),  // LWM16_MMR6
1715
42.5k
    UINT64_C(536891392),  // LWM32_MM
1716
42.5k
    UINT64_C(3959947264), // LWPC
1717
42.5k
    UINT64_C(2013790208), // LWPC_MMR6
1718
42.5k
    UINT64_C(536875008),  // LWP_MM
1719
42.5k
    UINT64_C(2550136832), // LWR
1720
42.5k
    UINT64_C(2550136832), // LWR64
1721
42.5k
    UINT64_C(2080374810), // LWRE
1722
42.5k
    UINT64_C(1610638848), // LWRE_MM
1723
42.5k
    UINT64_C(1610616832), // LWR_MM
1724
42.5k
    UINT64_C(18432),  // LWSP_MM
1725
42.5k
    UINT64_C(3960471552), // LWUPC
1726
42.5k
    UINT64_C(1610670080), // LWU_MM
1727
42.5k
    UINT64_C(2080374794), // LWX
1728
42.5k
    UINT64_C(1275068416), // LWXC1
1729
42.5k
    UINT64_C(1409286216), // LWXC1_MM
1730
42.5k
    UINT64_C(280),  // LWXS_MM
1731
42.5k
    UINT64_C(421),  // LWX_MM
1732
42.5k
    UINT64_C(4227858432), // LW_MM
1733
42.5k
    UINT64_C(4227858432), // LW_MMR6
1734
42.5k
    UINT64_C(2617245696), // LWu
1735
42.5k
    UINT64_C(4026570752), // LbRxRyOffMemX16
1736
42.5k
    UINT64_C(4026572800), // LbuRxRyOffMemX16
1737
42.5k
    UINT64_C(4026572800), // LhRxRyOffMemX16
1738
42.5k
    UINT64_C(4026572800), // LhuRxRyOffMemX16
1739
42.5k
    UINT64_C(26624),  // LiRxImm16
1740
42.5k
    UINT64_C(4026558464), // LiRxImmAlignX16
1741
42.5k
    UINT64_C(4026558464), // LiRxImmX16
1742
42.5k
    UINT64_C(45056),  // LwRxPcTcp16
1743
42.5k
    UINT64_C(4026576896), // LwRxPcTcpX16
1744
42.5k
    UINT64_C(4026570752), // LwRxRyOffMemX16
1745
42.5k
    UINT64_C(4026568704), // LwRxSpImmX16
1746
42.5k
    UINT64_C(1879048192), // MADD
1747
42.5k
    UINT64_C(1176502296), // MADDF_D
1748
42.5k
    UINT64_C(1409287096), // MADDF_D_MMR6
1749
42.5k
    UINT64_C(1174405144), // MADDF_S
1750
42.5k
    UINT64_C(1409286584), // MADDF_S_MMR6
1751
42.5k
    UINT64_C(2067791900), // MADDR_Q_H
1752
42.5k
    UINT64_C(2069889052), // MADDR_Q_W
1753
42.5k
    UINT64_C(1879048193), // MADDU
1754
42.5k
    UINT64_C(1879048193), // MADDU_DSP
1755
42.5k
    UINT64_C(6844), // MADDU_DSP_MM
1756
42.5k
    UINT64_C(56124),  // MADDU_MM
1757
42.5k
    UINT64_C(2021654546), // MADDV_B
1758
42.5k
    UINT64_C(2027946002), // MADDV_D
1759
42.5k
    UINT64_C(2023751698), // MADDV_H
1760
42.5k
    UINT64_C(2025848850), // MADDV_W
1761
42.5k
    UINT64_C(1275068449), // MADD_D32
1762
42.5k
    UINT64_C(1409286153), // MADD_D32_MM
1763
42.5k
    UINT64_C(1275068449), // MADD_D64
1764
42.5k
    UINT64_C(1879048192), // MADD_DSP
1765
42.5k
    UINT64_C(2748), // MADD_DSP_MM
1766
42.5k
    UINT64_C(52028),  // MADD_MM
1767
42.5k
    UINT64_C(2034237468), // MADD_Q_H
1768
42.5k
    UINT64_C(2036334620), // MADD_Q_W
1769
42.5k
    UINT64_C(1275068448), // MADD_S
1770
42.5k
    UINT64_C(1409286145), // MADD_S_MM
1771
42.5k
    UINT64_C(2080375856), // MAQ_SA_W_PHL
1772
42.5k
    UINT64_C(14972),  // MAQ_SA_W_PHL_MM
1773
42.5k
    UINT64_C(2080375984), // MAQ_SA_W_PHR
1774
42.5k
    UINT64_C(10876),  // MAQ_SA_W_PHR_MM
1775
42.5k
    UINT64_C(2080376112), // MAQ_S_W_PHL
1776
42.5k
    UINT64_C(6780), // MAQ_S_W_PHL_MM
1777
42.5k
    UINT64_C(2080376240), // MAQ_S_W_PHR
1778
42.5k
    UINT64_C(2684), // MAQ_S_W_PHR_MM
1779
42.5k
    UINT64_C(1176502303), // MAXA_D
1780
42.5k
    UINT64_C(1409286699), // MAXA_D_MMR6
1781
42.5k
    UINT64_C(1174405151), // MAXA_S
1782
42.5k
    UINT64_C(1409286187), // MAXA_S_MMR6
1783
42.5k
    UINT64_C(2030043142), // MAXI_S_B
1784
42.5k
    UINT64_C(2036334598), // MAXI_S_D
1785
42.5k
    UINT64_C(2032140294), // MAXI_S_H
1786
42.5k
    UINT64_C(2034237446), // MAXI_S_W
1787
42.5k
    UINT64_C(2038431750), // MAXI_U_B
1788
42.5k
    UINT64_C(2044723206), // MAXI_U_D
1789
42.5k
    UINT64_C(2040528902), // MAXI_U_H
1790
42.5k
    UINT64_C(2042626054), // MAXI_U_W
1791
42.5k
    UINT64_C(2063597582), // MAX_A_B
1792
42.5k
    UINT64_C(2069889038), // MAX_A_D
1793
42.5k
    UINT64_C(2065694734), // MAX_A_H
1794
42.5k
    UINT64_C(2067791886), // MAX_A_W
1795
42.5k
    UINT64_C(1176502301), // MAX_D
1796
42.5k
    UINT64_C(1409286667), // MAX_D_MMR6
1797
42.5k
    UINT64_C(1174405149), // MAX_S
1798
42.5k
    UINT64_C(2030043150), // MAX_S_B
1799
42.5k
    UINT64_C(2036334606), // MAX_S_D
1800
42.5k
    UINT64_C(2032140302), // MAX_S_H
1801
42.5k
    UINT64_C(1409286155), // MAX_S_MMR6
1802
42.5k
    UINT64_C(2034237454), // MAX_S_W
1803
42.5k
    UINT64_C(2038431758), // MAX_U_B
1804
42.5k
    UINT64_C(2044723214), // MAX_U_D
1805
42.5k
    UINT64_C(2040528910), // MAX_U_H
1806
42.5k
    UINT64_C(2042626062), // MAX_U_W
1807
42.5k
    UINT64_C(1073741824), // MFC0
1808
42.5k
    UINT64_C(252),  // MFC0_MMR6
1809
42.5k
    UINT64_C(1140850688), // MFC1
1810
42.5k
    UINT64_C(1140850688), // MFC1_D64
1811
42.5k
    UINT64_C(1409294395), // MFC1_MM
1812
42.5k
    UINT64_C(1409294395), // MFC1_MMR6
1813
42.5k
    UINT64_C(1207959552), // MFC2
1814
42.5k
    UINT64_C(19772),  // MFC2_MMR6
1815
42.5k
    UINT64_C(1080033280), // MFGC0
1816
42.5k
    UINT64_C(1276), // MFGC0_MM
1817
42.5k
    UINT64_C(244),  // MFHC0_MMR6
1818
42.5k
    UINT64_C(1147142144), // MFHC1_D32
1819
42.5k
    UINT64_C(1409298491), // MFHC1_D32_MM
1820
42.5k
    UINT64_C(1147142144), // MFHC1_D64
1821
42.5k
    UINT64_C(1409298491), // MFHC1_D64_MM
1822
42.5k
    UINT64_C(36156),  // MFHC2_MMR6
1823
42.5k
    UINT64_C(1080034304), // MFHGC0
1824
42.5k
    UINT64_C(1268), // MFHGC0_MM
1825
42.5k
    UINT64_C(16), // MFHI
1826
42.5k
    UINT64_C(17920),  // MFHI16_MM
1827
42.5k
    UINT64_C(16), // MFHI64
1828
42.5k
    UINT64_C(16), // MFHI_DSP
1829
42.5k
    UINT64_C(124),  // MFHI_DSP_MM
1830
42.5k
    UINT64_C(3452), // MFHI_MM
1831
42.5k
    UINT64_C(18), // MFLO
1832
42.5k
    UINT64_C(17984),  // MFLO16_MM
1833
42.5k
    UINT64_C(18), // MFLO64
1834
42.5k
    UINT64_C(18), // MFLO_DSP
1835
42.5k
    UINT64_C(4220), // MFLO_DSP_MM
1836
42.5k
    UINT64_C(7548), // MFLO_MM
1837
42.5k
    UINT64_C(1090519040), // MFTR
1838
42.5k
    UINT64_C(1176502302), // MINA_D
1839
42.5k
    UINT64_C(1409286691), // MINA_D_MMR6
1840
42.5k
    UINT64_C(1174405150), // MINA_S
1841
42.5k
    UINT64_C(1409286179), // MINA_S_MMR6
1842
42.5k
    UINT64_C(2046820358), // MINI_S_B
1843
42.5k
    UINT64_C(2053111814), // MINI_S_D
1844
42.5k
    UINT64_C(2048917510), // MINI_S_H
1845
42.5k
    UINT64_C(2051014662), // MINI_S_W
1846
42.5k
    UINT64_C(2055208966), // MINI_U_B
1847
42.5k
    UINT64_C(2061500422), // MINI_U_D
1848
42.5k
    UINT64_C(2057306118), // MINI_U_H
1849
42.5k
    UINT64_C(2059403270), // MINI_U_W
1850
42.5k
    UINT64_C(2071986190), // MIN_A_B
1851
42.5k
    UINT64_C(2078277646), // MIN_A_D
1852
42.5k
    UINT64_C(2074083342), // MIN_A_H
1853
42.5k
    UINT64_C(2076180494), // MIN_A_W
1854
42.5k
    UINT64_C(1176502300), // MIN_D
1855
42.5k
    UINT64_C(1409286659), // MIN_D_MMR6
1856
42.5k
    UINT64_C(1174405148), // MIN_S
1857
42.5k
    UINT64_C(2046820366), // MIN_S_B
1858
42.5k
    UINT64_C(2053111822), // MIN_S_D
1859
42.5k
    UINT64_C(2048917518), // MIN_S_H
1860
42.5k
    UINT64_C(1409286147), // MIN_S_MMR6
1861
42.5k
    UINT64_C(2051014670), // MIN_S_W
1862
42.5k
    UINT64_C(2055208974), // MIN_U_B
1863
42.5k
    UINT64_C(2061500430), // MIN_U_D
1864
42.5k
    UINT64_C(2057306126), // MIN_U_H
1865
42.5k
    UINT64_C(2059403278), // MIN_U_W
1866
42.5k
    UINT64_C(218),  // MOD
1867
42.5k
    UINT64_C(2080375952), // MODSUB
1868
42.5k
    UINT64_C(661),  // MODSUB_MM
1869
42.5k
    UINT64_C(219),  // MODU
1870
42.5k
    UINT64_C(472),  // MODU_MMR6
1871
42.5k
    UINT64_C(344),  // MOD_MMR6
1872
42.5k
    UINT64_C(2063597586), // MOD_S_B
1873
42.5k
    UINT64_C(2069889042), // MOD_S_D
1874
42.5k
    UINT64_C(2065694738), // MOD_S_H
1875
42.5k
    UINT64_C(2067791890), // MOD_S_W
1876
42.5k
    UINT64_C(2071986194), // MOD_U_B
1877
42.5k
    UINT64_C(2078277650), // MOD_U_D
1878
42.5k
    UINT64_C(2074083346), // MOD_U_H
1879
42.5k
    UINT64_C(2076180498), // MOD_U_W
1880
42.5k
    UINT64_C(3072), // MOVE16_MM
1881
42.5k
    UINT64_C(3072), // MOVE16_MMR6
1882
42.5k
    UINT64_C(33792),  // MOVEP_MM
1883
42.5k
    UINT64_C(17412),  // MOVEP_MMR6
1884
42.5k
    UINT64_C(2025717785), // MOVE_V
1885
42.5k
    UINT64_C(1176502289), // MOVF_D32
1886
42.5k
    UINT64_C(1409286688), // MOVF_D32_MM
1887
42.5k
    UINT64_C(1176502289), // MOVF_D64
1888
42.5k
    UINT64_C(1),  // MOVF_I
1889
42.5k
    UINT64_C(1),  // MOVF_I64
1890
42.5k
    UINT64_C(1409286523), // MOVF_I_MM
1891
42.5k
    UINT64_C(1174405137), // MOVF_S
1892
42.5k
    UINT64_C(1409286176), // MOVF_S_MM
1893
42.5k
    UINT64_C(1176502291), // MOVN_I64_D64
1894
42.5k
    UINT64_C(11), // MOVN_I64_I
1895
42.5k
    UINT64_C(11), // MOVN_I64_I64
1896
42.5k
    UINT64_C(1174405139), // MOVN_I64_S
1897
42.5k
    UINT64_C(1176502291), // MOVN_I_D32
1898
42.5k
    UINT64_C(1409286456), // MOVN_I_D32_MM
1899
42.5k
    UINT64_C(1176502291), // MOVN_I_D64
1900
42.5k
    UINT64_C(11), // MOVN_I_I
1901
42.5k
    UINT64_C(11), // MOVN_I_I64
1902
42.5k
    UINT64_C(24), // MOVN_I_MM
1903
42.5k
    UINT64_C(1174405139), // MOVN_I_S
1904
42.5k
    UINT64_C(1409286200), // MOVN_I_S_MM
1905
42.5k
    UINT64_C(1176567825), // MOVT_D32
1906
42.5k
    UINT64_C(1409286752), // MOVT_D32_MM
1907
42.5k
    UINT64_C(1176567825), // MOVT_D64
1908
42.5k
    UINT64_C(65537),  // MOVT_I
1909
42.5k
    UINT64_C(65537),  // MOVT_I64
1910
42.5k
    UINT64_C(1409288571), // MOVT_I_MM
1911
42.5k
    UINT64_C(1174470673), // MOVT_S
1912
42.5k
    UINT64_C(1409286240), // MOVT_S_MM
1913
42.5k
    UINT64_C(1176502290), // MOVZ_I64_D64
1914
42.5k
    UINT64_C(10), // MOVZ_I64_I
1915
42.5k
    UINT64_C(10), // MOVZ_I64_I64
1916
42.5k
    UINT64_C(1174405138), // MOVZ_I64_S
1917
42.5k
    UINT64_C(1176502290), // MOVZ_I_D32
1918
42.5k
    UINT64_C(1409286520), // MOVZ_I_D32_MM
1919
42.5k
    UINT64_C(1176502290), // MOVZ_I_D64
1920
42.5k
    UINT64_C(10), // MOVZ_I_I
1921
42.5k
    UINT64_C(10), // MOVZ_I_I64
1922
42.5k
    UINT64_C(88), // MOVZ_I_MM
1923
42.5k
    UINT64_C(1174405138), // MOVZ_I_S
1924
42.5k
    UINT64_C(1409286264), // MOVZ_I_S_MM
1925
42.5k
    UINT64_C(1879048196), // MSUB
1926
42.5k
    UINT64_C(1176502297), // MSUBF_D
1927
42.5k
    UINT64_C(1409287160), // MSUBF_D_MMR6
1928
42.5k
    UINT64_C(1174405145), // MSUBF_S
1929
42.5k
    UINT64_C(1409286648), // MSUBF_S_MMR6
1930
42.5k
    UINT64_C(2071986204), // MSUBR_Q_H
1931
42.5k
    UINT64_C(2074083356), // MSUBR_Q_W
1932
42.5k
    UINT64_C(1879048197), // MSUBU
1933
42.5k
    UINT64_C(1879048197), // MSUBU_DSP
1934
42.5k
    UINT64_C(15036),  // MSUBU_DSP_MM
1935
42.5k
    UINT64_C(64316),  // MSUBU_MM
1936
42.5k
    UINT64_C(2030043154), // MSUBV_B
1937
42.5k
    UINT64_C(2036334610), // MSUBV_D
1938
42.5k
    UINT64_C(2032140306), // MSUBV_H
1939
42.5k
    UINT64_C(2034237458), // MSUBV_W
1940
42.5k
    UINT64_C(1275068457), // MSUB_D32
1941
42.5k
    UINT64_C(1409286185), // MSUB_D32_MM
1942
42.5k
    UINT64_C(1275068457), // MSUB_D64
1943
42.5k
    UINT64_C(1879048196), // MSUB_DSP
1944
42.5k
    UINT64_C(10940),  // MSUB_DSP_MM
1945
42.5k
    UINT64_C(60220),  // MSUB_MM
1946
42.5k
    UINT64_C(2038431772), // MSUB_Q_H
1947
42.5k
    UINT64_C(2040528924), // MSUB_Q_W
1948
42.5k
    UINT64_C(1275068456), // MSUB_S
1949
42.5k
    UINT64_C(1409286177), // MSUB_S_MM
1950
42.5k
    UINT64_C(1082130432), // MTC0
1951
42.5k
    UINT64_C(764),  // MTC0_MMR6
1952
42.5k
    UINT64_C(1149239296), // MTC1
1953
42.5k
    UINT64_C(1149239296), // MTC1_D64
1954
42.5k
    UINT64_C(1409296443), // MTC1_MM
1955
42.5k
    UINT64_C(1409296443), // MTC1_MMR6
1956
42.5k
    UINT64_C(1216348160), // MTC2
1957
42.5k
    UINT64_C(23868),  // MTC2_MMR6
1958
42.5k
    UINT64_C(1080033792), // MTGC0
1959
42.5k
    UINT64_C(1788), // MTGC0_MM
1960
42.5k
    UINT64_C(756),  // MTHC0_MMR6
1961
42.5k
    UINT64_C(1155530752), // MTHC1_D32
1962
42.5k
    UINT64_C(1409300539), // MTHC1_D32_MM
1963
42.5k
    UINT64_C(1155530752), // MTHC1_D64
1964
42.5k
    UINT64_C(1409300539), // MTHC1_D64_MM
1965
42.5k
    UINT64_C(40252),  // MTHC2_MMR6
1966
42.5k
    UINT64_C(1080034816), // MTHGC0
1967
42.5k
    UINT64_C(1780), // MTHGC0_MM
1968
42.5k
    UINT64_C(17), // MTHI
1969
42.5k
    UINT64_C(17), // MTHI64
1970
42.5k
    UINT64_C(17), // MTHI_DSP
1971
42.5k
    UINT64_C(8316), // MTHI_DSP_MM
1972
42.5k
    UINT64_C(11644),  // MTHI_MM
1973
42.5k
    UINT64_C(2080376824), // MTHLIP
1974
42.5k
    UINT64_C(636),  // MTHLIP_MM
1975
42.5k
    UINT64_C(19), // MTLO
1976
42.5k
    UINT64_C(19), // MTLO64
1977
42.5k
    UINT64_C(19), // MTLO_DSP
1978
42.5k
    UINT64_C(12412),  // MTLO_DSP_MM
1979
42.5k
    UINT64_C(15740),  // MTLO_MM
1980
42.5k
    UINT64_C(1879048200), // MTM0
1981
42.5k
    UINT64_C(1879048204), // MTM1
1982
42.5k
    UINT64_C(1879048205), // MTM2
1983
42.5k
    UINT64_C(1879048201), // MTP0
1984
42.5k
    UINT64_C(1879048202), // MTP1
1985
42.5k
    UINT64_C(1879048203), // MTP2
1986
42.5k
    UINT64_C(1098907648), // MTTR
1987
42.5k
    UINT64_C(216),  // MUH
1988
42.5k
    UINT64_C(217),  // MUHU
1989
42.5k
    UINT64_C(216),  // MUHU_MMR6
1990
42.5k
    UINT64_C(88), // MUH_MMR6
1991
42.5k
    UINT64_C(1879048194), // MUL
1992
42.5k
    UINT64_C(2080376592), // MULEQ_S_W_PHL
1993
42.5k
    UINT64_C(37), // MULEQ_S_W_PHL_MM
1994
42.5k
    UINT64_C(2080376656), // MULEQ_S_W_PHR
1995
42.5k
    UINT64_C(101),  // MULEQ_S_W_PHR_MM
1996
42.5k
    UINT64_C(2080375184), // MULEU_S_PH_QBL
1997
42.5k
    UINT64_C(149),  // MULEU_S_PH_QBL_MM
1998
42.5k
    UINT64_C(2080375248), // MULEU_S_PH_QBR
1999
42.5k
    UINT64_C(213),  // MULEU_S_PH_QBR_MM
2000
42.5k
    UINT64_C(2080376784), // MULQ_RS_PH
2001
42.5k
    UINT64_C(277),  // MULQ_RS_PH_MM
2002
42.5k
    UINT64_C(2080376280), // MULQ_RS_W
2003
42.5k
    UINT64_C(405),  // MULQ_RS_W_MMR2
2004
42.5k
    UINT64_C(2080376720), // MULQ_S_PH
2005
42.5k
    UINT64_C(341),  // MULQ_S_PH_MMR2
2006
42.5k
    UINT64_C(2080376216), // MULQ_S_W
2007
42.5k
    UINT64_C(469),  // MULQ_S_W_MMR2
2008
42.5k
    UINT64_C(2063597596), // MULR_Q_H
2009
42.5k
    UINT64_C(2065694748), // MULR_Q_W
2010
42.5k
    UINT64_C(2080375216), // MULSAQ_S_W_PH
2011
42.5k
    UINT64_C(15548),  // MULSAQ_S_W_PH_MM
2012
42.5k
    UINT64_C(2080374960), // MULSA_W_PH
2013
42.5k
    UINT64_C(11452),  // MULSA_W_PH_MMR2
2014
42.5k
    UINT64_C(24), // MULT
2015
42.5k
    UINT64_C(25), // MULTU_DSP
2016
42.5k
    UINT64_C(7356), // MULTU_DSP_MM
2017
42.5k
    UINT64_C(24), // MULT_DSP
2018
42.5k
    UINT64_C(3260), // MULT_DSP_MM
2019
42.5k
    UINT64_C(35644),  // MULT_MM
2020
42.5k
    UINT64_C(25), // MULTu
2021
42.5k
    UINT64_C(39740),  // MULTu_MM
2022
42.5k
    UINT64_C(153),  // MULU
2023
42.5k
    UINT64_C(152),  // MULU_MMR6
2024
42.5k
    UINT64_C(2013265938), // MULV_B
2025
42.5k
    UINT64_C(2019557394), // MULV_D
2026
42.5k
    UINT64_C(2015363090), // MULV_H
2027
42.5k
    UINT64_C(2017460242), // MULV_W
2028
42.5k
    UINT64_C(528),  // MUL_MM
2029
42.5k
    UINT64_C(24), // MUL_MMR6
2030
42.5k
    UINT64_C(2080375576), // MUL_PH
2031
42.5k
    UINT64_C(45), // MUL_PH_MMR2
2032
42.5k
    UINT64_C(2030043164), // MUL_Q_H
2033
42.5k
    UINT64_C(2032140316), // MUL_Q_W
2034
42.5k
    UINT64_C(152),  // MUL_R6
2035
42.5k
    UINT64_C(2080375704), // MUL_S_PH
2036
42.5k
    UINT64_C(1069), // MUL_S_PH_MMR2
2037
42.5k
    UINT64_C(59408),  // Mfhi16
2038
42.5k
    UINT64_C(59410),  // Mflo16
2039
42.5k
    UINT64_C(25856),  // Move32R16
2040
42.5k
    UINT64_C(26368),  // MoveR3216
2041
42.5k
    UINT64_C(2064121886), // NLOC_B
2042
42.5k
    UINT64_C(2064318494), // NLOC_D
2043
42.5k
    UINT64_C(2064187422), // NLOC_H
2044
42.5k
    UINT64_C(2064252958), // NLOC_W
2045
42.5k
    UINT64_C(2064384030), // NLZC_B
2046
42.5k
    UINT64_C(2064580638), // NLZC_D
2047
42.5k
    UINT64_C(2064449566), // NLZC_H
2048
42.5k
    UINT64_C(2064515102), // NLZC_W
2049
42.5k
    UINT64_C(1275068465), // NMADD_D32
2050
42.5k
    UINT64_C(1409286154), // NMADD_D32_MM
2051
42.5k
    UINT64_C(1275068465), // NMADD_D64
2052
42.5k
    UINT64_C(1275068464), // NMADD_S
2053
42.5k
    UINT64_C(1409286146), // NMADD_S_MM
2054
42.5k
    UINT64_C(1275068473), // NMSUB_D32
2055
42.5k
    UINT64_C(1409286186), // NMSUB_D32_MM
2056
42.5k
    UINT64_C(1275068473), // NMSUB_D64
2057
42.5k
    UINT64_C(1275068472), // NMSUB_S
2058
42.5k
    UINT64_C(1409286178), // NMSUB_S_MM
2059
42.5k
    UINT64_C(39), // NOR
2060
42.5k
    UINT64_C(39), // NOR64
2061
42.5k
    UINT64_C(2046820352), // NORI_B
2062
42.5k
    UINT64_C(720),  // NOR_MM
2063
42.5k
    UINT64_C(720),  // NOR_MMR6
2064
42.5k
    UINT64_C(2017460254), // NOR_V
2065
42.5k
    UINT64_C(17408),  // NOT16_MM
2066
42.5k
    UINT64_C(17408),  // NOT16_MMR6
2067
42.5k
    UINT64_C(59421),  // NegRxRy16
2068
42.5k
    UINT64_C(59407),  // NotRxRy16
2069
42.5k
    UINT64_C(37), // OR
2070
42.5k
    UINT64_C(17600),  // OR16_MM
2071
42.5k
    UINT64_C(17417),  // OR16_MMR6
2072
42.5k
    UINT64_C(37), // OR64
2073
42.5k
    UINT64_C(2030043136), // ORI_B
2074
42.5k
    UINT64_C(1342177280), // ORI_MMR6
2075
42.5k
    UINT64_C(656),  // OR_MM
2076
42.5k
    UINT64_C(656),  // OR_MMR6
2077
42.5k
    UINT64_C(2015363102), // OR_V
2078
42.5k
    UINT64_C(872415232),  // ORi
2079
42.5k
    UINT64_C(872415232),  // ORi64
2080
42.5k
    UINT64_C(1342177280), // ORi_MM
2081
42.5k
    UINT64_C(59405),  // OrRxRxRy16
2082
42.5k
    UINT64_C(2080375697), // PACKRL_PH
2083
42.5k
    UINT64_C(429),  // PACKRL_PH_MM
2084
42.5k
    UINT64_C(320),  // PAUSE
2085
42.5k
    UINT64_C(10240),  // PAUSE_MM
2086
42.5k
    UINT64_C(10240),  // PAUSE_MMR6
2087
42.5k
    UINT64_C(2030043156), // PCKEV_B
2088
42.5k
    UINT64_C(2036334612), // PCKEV_D
2089
42.5k
    UINT64_C(2032140308), // PCKEV_H
2090
42.5k
    UINT64_C(2034237460), // PCKEV_W
2091
42.5k
    UINT64_C(2038431764), // PCKOD_B
2092
42.5k
    UINT64_C(2044723220), // PCKOD_D
2093
42.5k
    UINT64_C(2040528916), // PCKOD_H
2094
42.5k
    UINT64_C(2042626068), // PCKOD_W
2095
42.5k
    UINT64_C(2063859742), // PCNT_B
2096
42.5k
    UINT64_C(2064056350), // PCNT_D
2097
42.5k
    UINT64_C(2063925278), // PCNT_H
2098
42.5k
    UINT64_C(2063990814), // PCNT_W
2099
42.5k
    UINT64_C(2080375505), // PICK_PH
2100
42.5k
    UINT64_C(557),  // PICK_PH_MM
2101
42.5k
    UINT64_C(2080374993), // PICK_QB
2102
42.5k
    UINT64_C(493),  // PICK_QB_MM
2103
42.5k
    UINT64_C(1879048236), // POP
2104
42.5k
    UINT64_C(2080375058), // PRECEQU_PH_QBL
2105
42.5k
    UINT64_C(2080375186), // PRECEQU_PH_QBLA
2106
42.5k
    UINT64_C(29500),  // PRECEQU_PH_QBLA_MM
2107
42.5k
    UINT64_C(28988),  // PRECEQU_PH_QBL_MM
2108
42.5k
    UINT64_C(2080375122), // PRECEQU_PH_QBR
2109
42.5k
    UINT64_C(2080375250), // PRECEQU_PH_QBRA
2110
42.5k
    UINT64_C(37692),  // PRECEQU_PH_QBRA_MM
2111
42.5k
    UINT64_C(37180),  // PRECEQU_PH_QBR_MM
2112
42.5k
    UINT64_C(2080375570), // PRECEQ_W_PHL
2113
42.5k
    UINT64_C(20796),  // PRECEQ_W_PHL_MM
2114
42.5k
    UINT64_C(2080375634), // PRECEQ_W_PHR
2115
42.5k
    UINT64_C(24892),  // PRECEQ_W_PHR_MM
2116
42.5k
    UINT64_C(2080376594), // PRECEU_PH_QBL
2117
42.5k
    UINT64_C(2080376722), // PRECEU_PH_QBLA
2118
42.5k
    UINT64_C(45884),  // PRECEU_PH_QBLA_MM
2119
42.5k
    UINT64_C(45372),  // PRECEU_PH_QBL_MM
2120
42.5k
    UINT64_C(2080376658), // PRECEU_PH_QBR
2121
42.5k
    UINT64_C(2080376786), // PRECEU_PH_QBRA
2122
42.5k
    UINT64_C(54076),  // PRECEU_PH_QBRA_MM
2123
42.5k
    UINT64_C(53564),  // PRECEU_PH_QBR_MM
2124
42.5k
    UINT64_C(2080375761), // PRECRQU_S_QB_PH
2125
42.5k
    UINT64_C(365),  // PRECRQU_S_QB_PH_MM
2126
42.5k
    UINT64_C(2080376081), // PRECRQ_PH_W
2127
42.5k
    UINT64_C(237),  // PRECRQ_PH_W_MM
2128
42.5k
    UINT64_C(2080375569), // PRECRQ_QB_PH
2129
42.5k
    UINT64_C(173),  // PRECRQ_QB_PH_MM
2130
42.5k
    UINT64_C(2080376145), // PRECRQ_RS_PH_W
2131
42.5k
    UINT64_C(301),  // PRECRQ_RS_PH_W_MM
2132
42.5k
    UINT64_C(2080375633), // PRECR_QB_PH
2133
42.5k
    UINT64_C(109),  // PRECR_QB_PH_MMR2
2134
42.5k
    UINT64_C(2080376721), // PRECR_SRA_PH_W
2135
42.5k
    UINT64_C(973),  // PRECR_SRA_PH_W_MMR2
2136
42.5k
    UINT64_C(2080376785), // PRECR_SRA_R_PH_W
2137
42.5k
    UINT64_C(1997), // PRECR_SRA_R_PH_W_MMR2
2138
42.5k
    UINT64_C(3422552064), // PREF
2139
42.5k
    UINT64_C(2080374819), // PREFE
2140
42.5k
    UINT64_C(1610654720), // PREFE_MM
2141
42.5k
    UINT64_C(1409286560), // PREFX_MM
2142
42.5k
    UINT64_C(1610620928), // PREF_MM
2143
42.5k
    UINT64_C(1610620928), // PREF_MMR6
2144
42.5k
    UINT64_C(2080374837), // PREF_R6
2145
42.5k
    UINT64_C(2080374897), // PREPEND
2146
42.5k
    UINT64_C(597),  // PREPEND_MMR2
2147
42.5k
    UINT64_C(2080376080), // RADDU_W_QB
2148
42.5k
    UINT64_C(61756),  // RADDU_W_QB_MM
2149
42.5k
    UINT64_C(2080375992), // RDDSP
2150
42.5k
    UINT64_C(1660), // RDDSP_MM
2151
42.5k
    UINT64_C(2080374843), // RDHWR
2152
42.5k
    UINT64_C(2080374843), // RDHWR64
2153
42.5k
    UINT64_C(27452),  // RDHWR_MM
2154
42.5k
    UINT64_C(448),  // RDHWR_MMR6
2155
42.5k
    UINT64_C(57724),  // RDPGPR_MMR6
2156
42.5k
    UINT64_C(1176502293), // RECIP_D32
2157
42.5k
    UINT64_C(1409307195), // RECIP_D32_MM
2158
42.5k
    UINT64_C(1176502293), // RECIP_D64
2159
42.5k
    UINT64_C(1409307195), // RECIP_D64_MM
2160
42.5k
    UINT64_C(1174405141), // RECIP_S
2161
42.5k
    UINT64_C(1409290811), // RECIP_S_MM
2162
42.5k
    UINT64_C(2080375506), // REPLV_PH
2163
42.5k
    UINT64_C(828),  // REPLV_PH_MM
2164
42.5k
    UINT64_C(2080374994), // REPLV_QB
2165
42.5k
    UINT64_C(4924), // REPLV_QB_MM
2166
42.5k
    UINT64_C(2080375442), // REPL_PH
2167
42.5k
    UINT64_C(61), // REPL_PH_MM
2168
42.5k
    UINT64_C(2080374930), // REPL_QB
2169
42.5k
    UINT64_C(1532), // REPL_QB_MM
2170
42.5k
    UINT64_C(1176502298), // RINT_D
2171
42.5k
    UINT64_C(1409286688), // RINT_D_MMR6
2172
42.5k
    UINT64_C(1174405146), // RINT_S
2173
42.5k
    UINT64_C(1409286176), // RINT_S_MMR6
2174
42.5k
    UINT64_C(2097154),  // ROTR
2175
42.5k
    UINT64_C(70), // ROTRV
2176
42.5k
    UINT64_C(208),  // ROTRV_MM
2177
42.5k
    UINT64_C(192),  // ROTR_MM
2178
42.5k
    UINT64_C(1176502280), // ROUND_L_D64
2179
42.5k
    UINT64_C(1409315643), // ROUND_L_D_MMR6
2180
42.5k
    UINT64_C(1174405128), // ROUND_L_S
2181
42.5k
    UINT64_C(1409299259), // ROUND_L_S_MMR6
2182
42.5k
    UINT64_C(1176502284), // ROUND_W_D32
2183
42.5k
    UINT64_C(1176502284), // ROUND_W_D64
2184
42.5k
    UINT64_C(1409317691), // ROUND_W_D_MMR6
2185
42.5k
    UINT64_C(1409317691), // ROUND_W_MM
2186
42.5k
    UINT64_C(1174405132), // ROUND_W_S
2187
42.5k
    UINT64_C(1409301307), // ROUND_W_S_MM
2188
42.5k
    UINT64_C(1409301307), // ROUND_W_S_MMR6
2189
42.5k
    UINT64_C(1176502294), // RSQRT_D32
2190
42.5k
    UINT64_C(1409303099), // RSQRT_D32_MM
2191
42.5k
    UINT64_C(1176502294), // RSQRT_D64
2192
42.5k
    UINT64_C(1409303099), // RSQRT_D64_MM
2193
42.5k
    UINT64_C(1174405142), // RSQRT_S
2194
42.5k
    UINT64_C(1409286715), // RSQRT_S_MM
2195
42.5k
    UINT64_C(25728),  // Restore16
2196
42.5k
    UINT64_C(25728),  // RestoreX16
2197
42.5k
    UINT64_C(2020605962), // SAT_S_B
2198
42.5k
    UINT64_C(2013265930), // SAT_S_D
2199
42.5k
    UINT64_C(2019557386), // SAT_S_H
2200
42.5k
    UINT64_C(2017460234), // SAT_S_W
2201
42.5k
    UINT64_C(2028994570), // SAT_U_B
2202
42.5k
    UINT64_C(2021654538), // SAT_U_D
2203
42.5k
    UINT64_C(2027945994), // SAT_U_H
2204
42.5k
    UINT64_C(2025848842), // SAT_U_W
2205
42.5k
    UINT64_C(2684354560), // SB
2206
42.5k
    UINT64_C(34816),  // SB16_MM
2207
42.5k
    UINT64_C(34816),  // SB16_MMR6
2208
42.5k
    UINT64_C(2684354560), // SB64
2209
42.5k
    UINT64_C(2080374812), // SBE
2210
42.5k
    UINT64_C(1610655744), // SBE_MM
2211
42.5k
    UINT64_C(402653184),  // SB_MM
2212
42.5k
    UINT64_C(402653184),  // SB_MMR6
2213
42.5k
    UINT64_C(3758096384), // SC
2214
42.5k
    UINT64_C(3758096384), // SC64
2215
42.5k
    UINT64_C(2080374822), // SC64_R6
2216
42.5k
    UINT64_C(4026531840), // SCD
2217
42.5k
    UINT64_C(2080374823), // SCD_R6
2218
42.5k
    UINT64_C(2080374814), // SCE
2219
42.5k
    UINT64_C(1610656768), // SCE_MM
2220
42.5k
    UINT64_C(1610657792), // SC_MM
2221
42.5k
    UINT64_C(1610657792), // SC_MMR6
2222
42.5k
    UINT64_C(2080374822), // SC_R6
2223
42.5k
    UINT64_C(4227858432), // SD
2224
42.5k
    UINT64_C(1879048255), // SDBBP
2225
42.5k
    UINT64_C(18112),  // SDBBP16_MM
2226
42.5k
    UINT64_C(17467),  // SDBBP16_MMR6
2227
42.5k
    UINT64_C(56188),  // SDBBP_MM
2228
42.5k
    UINT64_C(56188),  // SDBBP_MMR6
2229
42.5k
    UINT64_C(14), // SDBBP_R6
2230
42.5k
    UINT64_C(4093640704), // SDC1
2231
42.5k
    UINT64_C(4093640704), // SDC164
2232
42.5k
    UINT64_C(3087007744), // SDC1_D64_MMR6
2233
42.5k
    UINT64_C(3087007744), // SDC1_MM
2234
42.5k
    UINT64_C(4160749568), // SDC2
2235
42.5k
    UINT64_C(536911872),  // SDC2_MMR6
2236
42.5k
    UINT64_C(1239416832), // SDC2_R6
2237
42.5k
    UINT64_C(4227858432), // SDC3
2238
42.5k
    UINT64_C(26), // SDIV
2239
42.5k
    UINT64_C(43836),  // SDIV_MM
2240
42.5k
    UINT64_C(2952790016), // SDL
2241
42.5k
    UINT64_C(3019898880), // SDR
2242
42.5k
    UINT64_C(1275068425), // SDXC1
2243
42.5k
    UINT64_C(1275068425), // SDXC164
2244
42.5k
    UINT64_C(2080375840), // SEB
2245
42.5k
    UINT64_C(2080375840), // SEB64
2246
42.5k
    UINT64_C(11068),  // SEB_MM
2247
42.5k
    UINT64_C(2080376352), // SEH
2248
42.5k
    UINT64_C(2080376352), // SEH64
2249
42.5k
    UINT64_C(15164),  // SEH_MM
2250
42.5k
    UINT64_C(53), // SELEQZ
2251
42.5k
    UINT64_C(53), // SELEQZ64
2252
42.5k
    UINT64_C(1176502292), // SELEQZ_D
2253
42.5k
    UINT64_C(1409286712), // SELEQZ_D_MMR6
2254
42.5k
    UINT64_C(320),  // SELEQZ_MMR6
2255
42.5k
    UINT64_C(1174405140), // SELEQZ_S
2256
42.5k
    UINT64_C(1409286200), // SELEQZ_S_MMR6
2257
42.5k
    UINT64_C(55), // SELNEZ
2258
42.5k
    UINT64_C(55), // SELNEZ64
2259
42.5k
    UINT64_C(1176502295), // SELNEZ_D
2260
42.5k
    UINT64_C(1409286776), // SELNEZ_D_MMR6
2261
42.5k
    UINT64_C(384),  // SELNEZ_MMR6
2262
42.5k
    UINT64_C(1174405143), // SELNEZ_S
2263
42.5k
    UINT64_C(1409286264), // SELNEZ_S_MMR6
2264
42.5k
    UINT64_C(1176502288), // SEL_D
2265
42.5k
    UINT64_C(1409286840), // SEL_D_MMR6
2266
42.5k
    UINT64_C(1174405136), // SEL_S
2267
42.5k
    UINT64_C(1409286328), // SEL_S_MMR6
2268
42.5k
    UINT64_C(1879048234), // SEQ
2269
42.5k
    UINT64_C(1879048238), // SEQi
2270
42.5k
    UINT64_C(2751463424), // SH
2271
42.5k
    UINT64_C(43008),  // SH16_MM
2272
42.5k
    UINT64_C(43008),  // SH16_MMR6
2273
42.5k
    UINT64_C(2751463424), // SH64
2274
42.5k
    UINT64_C(2080374813), // SHE
2275
42.5k
    UINT64_C(1610656256), // SHE_MM
2276
42.5k
    UINT64_C(2013265922), // SHF_B
2277
42.5k
    UINT64_C(2030043138), // SHF_H
2278
42.5k
    UINT64_C(2046820354), // SHF_W
2279
42.5k
    UINT64_C(2080376504), // SHILO
2280
42.5k
    UINT64_C(2080376568), // SHILOV
2281
42.5k
    UINT64_C(4732), // SHILOV_MM
2282
42.5k
    UINT64_C(29), // SHILO_MM
2283
42.5k
    UINT64_C(2080375443), // SHLLV_PH
2284
42.5k
    UINT64_C(14), // SHLLV_PH_MM
2285
42.5k
    UINT64_C(2080374931), // SHLLV_QB
2286
42.5k
    UINT64_C(917),  // SHLLV_QB_MM
2287
42.5k
    UINT64_C(2080375699), // SHLLV_S_PH
2288
42.5k
    UINT64_C(1038), // SHLLV_S_PH_MM
2289
42.5k
    UINT64_C(2080376211), // SHLLV_S_W
2290
42.5k
    UINT64_C(981),  // SHLLV_S_W_MM
2291
42.5k
    UINT64_C(2080375315), // SHLL_PH
2292
42.5k
    UINT64_C(949),  // SHLL_PH_MM
2293
42.5k
    UINT64_C(2080374803), // SHLL_QB
2294
42.5k
    UINT64_C(2172), // SHLL_QB_MM
2295
42.5k
    UINT64_C(2080375571), // SHLL_S_PH
2296
42.5k
    UINT64_C(2997), // SHLL_S_PH_MM
2297
42.5k
    UINT64_C(2080376083), // SHLL_S_W
2298
42.5k
    UINT64_C(1013), // SHLL_S_W_MM
2299
42.5k
    UINT64_C(2080375507), // SHRAV_PH
2300
42.5k
    UINT64_C(397),  // SHRAV_PH_MM
2301
42.5k
    UINT64_C(2080375187), // SHRAV_QB
2302
42.5k
    UINT64_C(461),  // SHRAV_QB_MMR2
2303
42.5k
    UINT64_C(2080375763), // SHRAV_R_PH
2304
42.5k
    UINT64_C(1421), // SHRAV_R_PH_MM
2305
42.5k
    UINT64_C(2080375251), // SHRAV_R_QB
2306
42.5k
    UINT64_C(1485), // SHRAV_R_QB_MMR2
2307
42.5k
    UINT64_C(2080376275), // SHRAV_R_W
2308
42.5k
    UINT64_C(725),  // SHRAV_R_W_MM
2309
42.5k
    UINT64_C(2080375379), // SHRA_PH
2310
42.5k
    UINT64_C(821),  // SHRA_PH_MM
2311
42.5k
    UINT64_C(2080375059), // SHRA_QB
2312
42.5k
    UINT64_C(508),  // SHRA_QB_MMR2
2313
42.5k
    UINT64_C(2080375635), // SHRA_R_PH
2314
42.5k
    UINT64_C(1845), // SHRA_R_PH_MM
2315
42.5k
    UINT64_C(2080375123), // SHRA_R_QB
2316
42.5k
    UINT64_C(4604), // SHRA_R_QB_MMR2
2317
42.5k
    UINT64_C(2080376147), // SHRA_R_W
2318
42.5k
    UINT64_C(757),  // SHRA_R_W_MM
2319
42.5k
    UINT64_C(2080376531), // SHRLV_PH
2320
42.5k
    UINT64_C(789),  // SHRLV_PH_MMR2
2321
42.5k
    UINT64_C(2080374995), // SHRLV_QB
2322
42.5k
    UINT64_C(853),  // SHRLV_QB_MM
2323
42.5k
    UINT64_C(2080376403), // SHRL_PH
2324
42.5k
    UINT64_C(1020), // SHRL_PH_MMR2
2325
42.5k
    UINT64_C(2080374867), // SHRL_QB
2326
42.5k
    UINT64_C(6268), // SHRL_QB_MM
2327
42.5k
    UINT64_C(939524096),  // SH_MM
2328
42.5k
    UINT64_C(939524096),  // SH_MMR6
2329
42.5k
    UINT64_C(2013265945), // SLDI_B
2330
42.5k
    UINT64_C(2016935961), // SLDI_D
2331
42.5k
    UINT64_C(2015363097), // SLDI_H
2332
42.5k
    UINT64_C(2016411673), // SLDI_W
2333
42.5k
    UINT64_C(2013265940), // SLD_B
2334
42.5k
    UINT64_C(2019557396), // SLD_D
2335
42.5k
    UINT64_C(2015363092), // SLD_H
2336
42.5k
    UINT64_C(2017460244), // SLD_W
2337
42.5k
    UINT64_C(0),  // SLL
2338
42.5k
    UINT64_C(9216), // SLL16_MM
2339
42.5k
    UINT64_C(9216), // SLL16_MMR6
2340
42.5k
    UINT64_C(0),  // SLL64_32
2341
42.5k
    UINT64_C(0),  // SLL64_64
2342
42.5k
    UINT64_C(2020605961), // SLLI_B
2343
42.5k
    UINT64_C(2013265929), // SLLI_D
2344
42.5k
    UINT64_C(2019557385), // SLLI_H
2345
42.5k
    UINT64_C(2017460233), // SLLI_W
2346
42.5k
    UINT64_C(4),  // SLLV
2347
42.5k
    UINT64_C(16), // SLLV_MM
2348
42.5k
    UINT64_C(2013265933), // SLL_B
2349
42.5k
    UINT64_C(2019557389), // SLL_D
2350
42.5k
    UINT64_C(2015363085), // SLL_H
2351
42.5k
    UINT64_C(0),  // SLL_MM
2352
42.5k
    UINT64_C(0),  // SLL_MMR6
2353
42.5k
    UINT64_C(2017460237), // SLL_W
2354
42.5k
    UINT64_C(42), // SLT
2355
42.5k
    UINT64_C(42), // SLT64
2356
42.5k
    UINT64_C(848),  // SLT_MM
2357
42.5k
    UINT64_C(671088640),  // SLTi
2358
42.5k
    UINT64_C(671088640),  // SLTi64
2359
42.5k
    UINT64_C(2415919104), // SLTi_MM
2360
42.5k
    UINT64_C(738197504),  // SLTiu
2361
42.5k
    UINT64_C(738197504),  // SLTiu64
2362
42.5k
    UINT64_C(2952790016), // SLTiu_MM
2363
42.5k
    UINT64_C(43), // SLTu
2364
42.5k
    UINT64_C(43), // SLTu64
2365
42.5k
    UINT64_C(912),  // SLTu_MM
2366
42.5k
    UINT64_C(1879048235), // SNE
2367
42.5k
    UINT64_C(1879048239), // SNEi
2368
42.5k
    UINT64_C(2017460249), // SPLATI_B
2369
42.5k
    UINT64_C(2021130265), // SPLATI_D
2370
42.5k
    UINT64_C(2019557401), // SPLATI_H
2371
42.5k
    UINT64_C(2020605977), // SPLATI_W
2372
42.5k
    UINT64_C(2021654548), // SPLAT_B
2373
42.5k
    UINT64_C(2027946004), // SPLAT_D
2374
42.5k
    UINT64_C(2023751700), // SPLAT_H
2375
42.5k
    UINT64_C(2025848852), // SPLAT_W
2376
42.5k
    UINT64_C(3),  // SRA
2377
42.5k
    UINT64_C(2028994569), // SRAI_B
2378
42.5k
    UINT64_C(2021654537), // SRAI_D
2379
42.5k
    UINT64_C(2027945993), // SRAI_H
2380
42.5k
    UINT64_C(2025848841), // SRAI_W
2381
42.5k
    UINT64_C(2037383178), // SRARI_B
2382
42.5k
    UINT64_C(2030043146), // SRARI_D
2383
42.5k
    UINT64_C(2036334602), // SRARI_H
2384
42.5k
    UINT64_C(2034237450), // SRARI_W
2385
42.5k
    UINT64_C(2021654549), // SRAR_B
2386
42.5k
    UINT64_C(2027946005), // SRAR_D
2387
42.5k
    UINT64_C(2023751701), // SRAR_H
2388
42.5k
    UINT64_C(2025848853), // SRAR_W
2389
42.5k
    UINT64_C(7),  // SRAV
2390
42.5k
    UINT64_C(144),  // SRAV_MM
2391
42.5k
    UINT64_C(2021654541), // SRA_B
2392
42.5k
    UINT64_C(2027945997), // SRA_D
2393
42.5k
    UINT64_C(2023751693), // SRA_H
2394
42.5k
    UINT64_C(128),  // SRA_MM
2395
42.5k
    UINT64_C(2025848845), // SRA_W
2396
42.5k
    UINT64_C(2),  // SRL
2397
42.5k
    UINT64_C(9217), // SRL16_MM
2398
42.5k
    UINT64_C(9217), // SRL16_MMR6
2399
42.5k
    UINT64_C(2037383177), // SRLI_B
2400
42.5k
    UINT64_C(2030043145), // SRLI_D
2401
42.5k
    UINT64_C(2036334601), // SRLI_H
2402
42.5k
    UINT64_C(2034237449), // SRLI_W
2403
42.5k
    UINT64_C(2045771786), // SRLRI_B
2404
42.5k
    UINT64_C(2038431754), // SRLRI_D
2405
42.5k
    UINT64_C(2044723210), // SRLRI_H
2406
42.5k
    UINT64_C(2042626058), // SRLRI_W
2407
42.5k
    UINT64_C(2030043157), // SRLR_B
2408
42.5k
    UINT64_C(2036334613), // SRLR_D
2409
42.5k
    UINT64_C(2032140309), // SRLR_H
2410
42.5k
    UINT64_C(2034237461), // SRLR_W
2411
42.5k
    UINT64_C(6),  // SRLV
2412
42.5k
    UINT64_C(80), // SRLV_MM
2413
42.5k
    UINT64_C(2030043149), // SRL_B
2414
42.5k
    UINT64_C(2036334605), // SRL_D
2415
42.5k
    UINT64_C(2032140301), // SRL_H
2416
42.5k
    UINT64_C(64), // SRL_MM
2417
42.5k
    UINT64_C(2034237453), // SRL_W
2418
42.5k
    UINT64_C(64), // SSNOP
2419
42.5k
    UINT64_C(2048), // SSNOP_MM
2420
42.5k
    UINT64_C(2048), // SSNOP_MMR6
2421
42.5k
    UINT64_C(2013265956), // ST_B
2422
42.5k
    UINT64_C(2013265959), // ST_D
2423
42.5k
    UINT64_C(2013265957), // ST_H
2424
42.5k
    UINT64_C(2013265958), // ST_W
2425
42.5k
    UINT64_C(34), // SUB
2426
42.5k
    UINT64_C(2080375384), // SUBQH_PH
2427
42.5k
    UINT64_C(589),  // SUBQH_PH_MMR2
2428
42.5k
    UINT64_C(2080375512), // SUBQH_R_PH
2429
42.5k
    UINT64_C(1613), // SUBQH_R_PH_MMR2
2430
42.5k
    UINT64_C(2080376024), // SUBQH_R_W
2431
42.5k
    UINT64_C(1677), // SUBQH_R_W_MMR2
2432
42.5k
    UINT64_C(2080375896), // SUBQH_W
2433
42.5k
    UINT64_C(653),  // SUBQH_W_MMR2
2434
42.5k
    UINT64_C(2080375504), // SUBQ_PH
2435
42.5k
    UINT64_C(525),  // SUBQ_PH_MM
2436
42.5k
    UINT64_C(2080375760), // SUBQ_S_PH
2437
42.5k
    UINT64_C(1549), // SUBQ_S_PH_MM
2438
42.5k
    UINT64_C(2080376272), // SUBQ_S_W
2439
42.5k
    UINT64_C(837),  // SUBQ_S_W_MM
2440
42.5k
    UINT64_C(2030043153), // SUBSUS_U_B
2441
42.5k
    UINT64_C(2036334609), // SUBSUS_U_D
2442
42.5k
    UINT64_C(2032140305), // SUBSUS_U_H
2443
42.5k
    UINT64_C(2034237457), // SUBSUS_U_W
2444
42.5k
    UINT64_C(2038431761), // SUBSUU_S_B
2445
42.5k
    UINT64_C(2044723217), // SUBSUU_S_D
2446
42.5k
    UINT64_C(2040528913), // SUBSUU_S_H
2447
42.5k
    UINT64_C(2042626065), // SUBSUU_S_W
2448
42.5k
    UINT64_C(2013265937), // SUBS_S_B
2449
42.5k
    UINT64_C(2019557393), // SUBS_S_D
2450
42.5k
    UINT64_C(2015363089), // SUBS_S_H
2451
42.5k
    UINT64_C(2017460241), // SUBS_S_W
2452
42.5k
    UINT64_C(2021654545), // SUBS_U_B
2453
42.5k
    UINT64_C(2027946001), // SUBS_U_D
2454
42.5k
    UINT64_C(2023751697), // SUBS_U_H
2455
42.5k
    UINT64_C(2025848849), // SUBS_U_W
2456
42.5k
    UINT64_C(1025), // SUBU16_MM
2457
42.5k
    UINT64_C(1025), // SUBU16_MMR6
2458
42.5k
    UINT64_C(2080374872), // SUBUH_QB
2459
42.5k
    UINT64_C(845),  // SUBUH_QB_MMR2
2460
42.5k
    UINT64_C(2080375000), // SUBUH_R_QB
2461
42.5k
    UINT64_C(1869), // SUBUH_R_QB_MMR2
2462
42.5k
    UINT64_C(464),  // SUBU_MMR6
2463
42.5k
    UINT64_C(2080375376), // SUBU_PH
2464
42.5k
    UINT64_C(781),  // SUBU_PH_MMR2
2465
42.5k
    UINT64_C(2080374864), // SUBU_QB
2466
42.5k
    UINT64_C(717),  // SUBU_QB_MM
2467
42.5k
    UINT64_C(2080375632), // SUBU_S_PH
2468
42.5k
    UINT64_C(1805), // SUBU_S_PH_MMR2
2469
42.5k
    UINT64_C(2080375120), // SUBU_S_QB
2470
42.5k
    UINT64_C(1741), // SUBU_S_QB_MM
2471
42.5k
    UINT64_C(2021654534), // SUBVI_B
2472
42.5k
    UINT64_C(2027945990), // SUBVI_D
2473
42.5k
    UINT64_C(2023751686), // SUBVI_H
2474
42.5k
    UINT64_C(2025848838), // SUBVI_W
2475
42.5k
    UINT64_C(2021654542), // SUBV_B
2476
42.5k
    UINT64_C(2027945998), // SUBV_D
2477
42.5k
    UINT64_C(2023751694), // SUBV_H
2478
42.5k
    UINT64_C(2025848846), // SUBV_W
2479
42.5k
    UINT64_C(400),  // SUB_MM
2480
42.5k
    UINT64_C(400),  // SUB_MMR6
2481
42.5k
    UINT64_C(35), // SUBu
2482
42.5k
    UINT64_C(464),  // SUBu_MM
2483
42.5k
    UINT64_C(1275068429), // SUXC1
2484
42.5k
    UINT64_C(1275068429), // SUXC164
2485
42.5k
    UINT64_C(1409286536), // SUXC1_MM
2486
42.5k
    UINT64_C(2885681152), // SW
2487
42.5k
    UINT64_C(59392),  // SW16_MM
2488
42.5k
    UINT64_C(59392),  // SW16_MMR6
2489
42.5k
    UINT64_C(2885681152), // SW64
2490
42.5k
    UINT64_C(3825205248), // SWC1
2491
42.5k
    UINT64_C(2550136832), // SWC1_MM
2492
42.5k
    UINT64_C(3892314112), // SWC2
2493
42.5k
    UINT64_C(536903680),  // SWC2_MMR6
2494
42.5k
    UINT64_C(1231028224), // SWC2_R6
2495
42.5k
    UINT64_C(3959422976), // SWC3
2496
42.5k
    UINT64_C(2885681152), // SWDSP
2497
42.5k
    UINT64_C(4160749568), // SWDSP_MM
2498
42.5k
    UINT64_C(2080374815), // SWE
2499
42.5k
    UINT64_C(1610657280), // SWE_MM
2500
42.5k
    UINT64_C(2818572288), // SWL
2501
42.5k
    UINT64_C(2818572288), // SWL64
2502
42.5k
    UINT64_C(2080374817), // SWLE
2503
42.5k
    UINT64_C(1610653696), // SWLE_MM
2504
42.5k
    UINT64_C(1610645504), // SWL_MM
2505
42.5k
    UINT64_C(17728),  // SWM16_MM
2506
42.5k
    UINT64_C(17418),  // SWM16_MMR6
2507
42.5k
    UINT64_C(536924160),  // SWM32_MM
2508
42.5k
    UINT64_C(536907776),  // SWP_MM
2509
42.5k
    UINT64_C(3087007744), // SWR
2510
42.5k
    UINT64_C(3087007744), // SWR64
2511
42.5k
    UINT64_C(2080374818), // SWRE
2512
42.5k
    UINT64_C(1610654208), // SWRE_MM
2513
42.5k
    UINT64_C(1610649600), // SWR_MM
2514
42.5k
    UINT64_C(51200),  // SWSP_MM
2515
42.5k
    UINT64_C(51200),  // SWSP_MMR6
2516
42.5k
    UINT64_C(1275068424), // SWXC1
2517
42.5k
    UINT64_C(1409286280), // SWXC1_MM
2518
42.5k
    UINT64_C(4160749568), // SW_MM
2519
42.5k
    UINT64_C(4160749568), // SW_MMR6
2520
42.5k
    UINT64_C(15), // SYNC
2521
42.5k
    UINT64_C(69140480), // SYNCI
2522
42.5k
    UINT64_C(1107296256), // SYNCI_MM
2523
42.5k
    UINT64_C(1098907648), // SYNCI_MMR6
2524
42.5k
    UINT64_C(27516),  // SYNC_MM
2525
42.5k
    UINT64_C(27516),  // SYNC_MMR6
2526
42.5k
    UINT64_C(12), // SYSCALL
2527
42.5k
    UINT64_C(35708),  // SYSCALL_MM
2528
42.5k
    UINT64_C(25728),  // Save16
2529
42.5k
    UINT64_C(25728),  // SaveX16
2530
42.5k
    UINT64_C(4026580992), // SbRxRyOffMemX16
2531
42.5k
    UINT64_C(59537),  // SebRx16
2532
42.5k
    UINT64_C(59569),  // SehRx16
2533
42.5k
    UINT64_C(4026583040), // ShRxRyOffMemX16
2534
42.5k
    UINT64_C(4026544128), // SllX16
2535
42.5k
    UINT64_C(59396),  // SllvRxRy16
2536
42.5k
    UINT64_C(59394),  // SltRxRy16
2537
42.5k
    UINT64_C(20480),  // SltiRxImm16
2538
42.5k
    UINT64_C(4026552320), // SltiRxImmX16
2539
42.5k
    UINT64_C(22528),  // SltiuRxImm16
2540
42.5k
    UINT64_C(4026554368), // SltiuRxImmX16
2541
42.5k
    UINT64_C(59395),  // SltuRxRy16
2542
42.5k
    UINT64_C(4026544131), // SraX16
2543
42.5k
    UINT64_C(59399),  // SravRxRy16
2544
42.5k
    UINT64_C(4026544130), // SrlX16
2545
42.5k
    UINT64_C(59398),  // SrlvRxRy16
2546
42.5k
    UINT64_C(57347),  // SubuRxRyRz16
2547
42.5k
    UINT64_C(4026587136), // SwRxRyOffMemX16
2548
42.5k
    UINT64_C(4026585088), // SwRxSpImmX16
2549
42.5k
    UINT64_C(52), // TEQ
2550
42.5k
    UINT64_C(67895296), // TEQI
2551
42.5k
    UINT64_C(1103101952), // TEQI_MM
2552
42.5k
    UINT64_C(60), // TEQ_MM
2553
42.5k
    UINT64_C(48), // TGE
2554
42.5k
    UINT64_C(67633152), // TGEI
2555
42.5k
    UINT64_C(67698688), // TGEIU
2556
42.5k
    UINT64_C(1096810496), // TGEIU_MM
2557
42.5k
    UINT64_C(1092616192), // TGEI_MM
2558
42.5k
    UINT64_C(49), // TGEU
2559
42.5k
    UINT64_C(1084), // TGEU_MM
2560
42.5k
    UINT64_C(572),  // TGE_MM
2561
42.5k
    UINT64_C(1107296267), // TLBGINV
2562
42.5k
    UINT64_C(1107296268), // TLBGINVF
2563
42.5k
    UINT64_C(20860),  // TLBGINVF_MM
2564
42.5k
    UINT64_C(16764),  // TLBGINV_MM
2565
42.5k
    UINT64_C(1107296272), // TLBGP
2566
42.5k
    UINT64_C(380),  // TLBGP_MM
2567
42.5k
    UINT64_C(1107296265), // TLBGR
2568
42.5k
    UINT64_C(4476), // TLBGR_MM
2569
42.5k
    UINT64_C(1107296266), // TLBGWI
2570
42.5k
    UINT64_C(8572), // TLBGWI_MM
2571
42.5k
    UINT64_C(1107296270), // TLBGWR
2572
42.5k
    UINT64_C(12668),  // TLBGWR_MM
2573
42.5k
    UINT64_C(1107296259), // TLBINV
2574
42.5k
    UINT64_C(1107296260), // TLBINVF
2575
42.5k
    UINT64_C(21372),  // TLBINVF_MMR6
2576
42.5k
    UINT64_C(17276),  // TLBINV_MMR6
2577
42.5k
    UINT64_C(1107296264), // TLBP
2578
42.5k
    UINT64_C(892),  // TLBP_MM
2579
42.5k
    UINT64_C(1107296257), // TLBR
2580
42.5k
    UINT64_C(4988), // TLBR_MM
2581
42.5k
    UINT64_C(1107296258), // TLBWI
2582
42.5k
    UINT64_C(9084), // TLBWI_MM
2583
42.5k
    UINT64_C(1107296262), // TLBWR
2584
42.5k
    UINT64_C(13180),  // TLBWR_MM
2585
42.5k
    UINT64_C(50), // TLT
2586
42.5k
    UINT64_C(67764224), // TLTI
2587
42.5k
    UINT64_C(1094713344), // TLTIU_MM
2588
42.5k
    UINT64_C(1090519040), // TLTI_MM
2589
42.5k
    UINT64_C(51), // TLTU
2590
42.5k
    UINT64_C(2620), // TLTU_MM
2591
42.5k
    UINT64_C(2108), // TLT_MM
2592
42.5k
    UINT64_C(54), // TNE
2593
42.5k
    UINT64_C(68026368), // TNEI
2594
42.5k
    UINT64_C(1098907648), // TNEI_MM
2595
42.5k
    UINT64_C(3132), // TNE_MM
2596
42.5k
    UINT64_C(1176502281), // TRUNC_L_D64
2597
42.5k
    UINT64_C(1409311547), // TRUNC_L_D_MMR6
2598
42.5k
    UINT64_C(1174405129), // TRUNC_L_S
2599
42.5k
    UINT64_C(1409295163), // TRUNC_L_S_MMR6
2600
42.5k
    UINT64_C(1176502285), // TRUNC_W_D32
2601
42.5k
    UINT64_C(1176502285), // TRUNC_W_D64
2602
42.5k
    UINT64_C(1409313595), // TRUNC_W_D_MMR6
2603
42.5k
    UINT64_C(1409313595), // TRUNC_W_MM
2604
42.5k
    UINT64_C(1174405133), // TRUNC_W_S
2605
42.5k
    UINT64_C(1409297211), // TRUNC_W_S_MM
2606
42.5k
    UINT64_C(1409297211), // TRUNC_W_S_MMR6
2607
42.5k
    UINT64_C(67829760), // TTLTIU
2608
42.5k
    UINT64_C(27), // UDIV
2609
42.5k
    UINT64_C(47932),  // UDIV_MM
2610
42.5k
    UINT64_C(1879048209), // V3MULU
2611
42.5k
    UINT64_C(1879048208), // VMM0
2612
42.5k
    UINT64_C(1879048207), // VMULU
2613
42.5k
    UINT64_C(2013265941), // VSHF_B
2614
42.5k
    UINT64_C(2019557397), // VSHF_D
2615
42.5k
    UINT64_C(2015363093), // VSHF_H
2616
42.5k
    UINT64_C(2017460245), // VSHF_W
2617
42.5k
    UINT64_C(1107296288), // WAIT
2618
42.5k
    UINT64_C(37756),  // WAIT_MM
2619
42.5k
    UINT64_C(37756),  // WAIT_MMR6
2620
42.5k
    UINT64_C(2080376056), // WRDSP
2621
42.5k
    UINT64_C(5756), // WRDSP_MM
2622
42.5k
    UINT64_C(61820),  // WRPGPR_MMR6
2623
42.5k
    UINT64_C(2080374944), // WSBH
2624
42.5k
    UINT64_C(31548),  // WSBH_MM
2625
42.5k
    UINT64_C(31548),  // WSBH_MMR6
2626
42.5k
    UINT64_C(38), // XOR
2627
42.5k
    UINT64_C(17472),  // XOR16_MM
2628
42.5k
    UINT64_C(17416),  // XOR16_MMR6
2629
42.5k
    UINT64_C(38), // XOR64
2630
42.5k
    UINT64_C(2063597568), // XORI_B
2631
42.5k
    UINT64_C(1879048192), // XORI_MMR6
2632
42.5k
    UINT64_C(784),  // XOR_MM
2633
42.5k
    UINT64_C(784),  // XOR_MMR6
2634
42.5k
    UINT64_C(2019557406), // XOR_V
2635
42.5k
    UINT64_C(939524096),  // XORi
2636
42.5k
    UINT64_C(939524096),  // XORi64
2637
42.5k
    UINT64_C(1879048192), // XORi_MM
2638
42.5k
    UINT64_C(59406),  // XorRxRxRy16
2639
42.5k
    UINT64_C(2080374793), // YIELD
2640
42.5k
    UINT64_C(0)
2641
42.5k
  };
2642
42.5k
  const unsigned opcode = MI.getOpcode();
2643
42.5k
  uint64_t Value = InstBits[opcode];
2644
42.5k
  uint64_t op = 0;
2645
42.5k
  (void)op;  // suppress warning
2646
42.5k
  switch (opcode) {
2647
42.5k
    case Mips::Break16:
2648
195
    case Mips::DERET:
2649
195
    case Mips::DERET_MM:
2650
195
    case Mips::DERET_MMR6:
2651
195
    case Mips::EHB:
2652
195
    case Mips::EHB_MM:
2653
195
    case Mips::EHB_MMR6:
2654
195
    case Mips::ERET:
2655
195
    case Mips::ERETNC:
2656
195
    case Mips::ERETNC_MMR6:
2657
195
    case Mips::ERET_MM:
2658
195
    case Mips::ERET_MMR6:
2659
195
    case Mips::JrRa16:
2660
195
    case Mips::JrcRa16:
2661
195
    case Mips::PAUSE:
2662
195
    case Mips::PAUSE_MM:
2663
195
    case Mips::PAUSE_MMR6:
2664
195
    case Mips::Restore16:
2665
195
    case Mips::RestoreX16:
2666
195
    case Mips::SSNOP:
2667
195
    case Mips::SSNOP_MM:
2668
195
    case Mips::SSNOP_MMR6:
2669
195
    case Mips::Save16:
2670
195
    case Mips::SaveX16:
2671
195
    case Mips::TLBGINV:
2672
195
    case Mips::TLBGINVF:
2673
195
    case Mips::TLBGINVF_MM:
2674
195
    case Mips::TLBGINV_MM:
2675
195
    case Mips::TLBGP:
2676
195
    case Mips::TLBGP_MM:
2677
195
    case Mips::TLBGR:
2678
195
    case Mips::TLBGR_MM:
2679
195
    case Mips::TLBGWI:
2680
195
    case Mips::TLBGWI_MM:
2681
195
    case Mips::TLBGWR:
2682
195
    case Mips::TLBGWR_MM:
2683
195
    case Mips::TLBINV:
2684
195
    case Mips::TLBINVF:
2685
195
    case Mips::TLBINVF_MMR6:
2686
195
    case Mips::TLBINV_MMR6:
2687
195
    case Mips::TLBP:
2688
195
    case Mips::TLBP_MM:
2689
195
    case Mips::TLBR:
2690
195
    case Mips::TLBR_MM:
2691
195
    case Mips::TLBWI:
2692
195
    case Mips::TLBWI_MM:
2693
195
    case Mips::TLBWR:
2694
195
    case Mips::TLBWR_MM:
2695
195
    case Mips::WAIT: {
2696
195
      break;
2697
195
    }
2698
195
    case Mips::MTHLIP:
2699
4
    case Mips::SHILOV: {
2700
4
      // op: ac
2701
4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2702
4
      Value |= (op & UINT64_C(3)) << 11;
2703
4
      // op: rs
2704
4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
2705
4
      Value |= (op & UINT64_C(31)) << 21;
2706
4
      break;
2707
4
    }
2708
47
    case Mips::DPAQX_SA_W_PH:
2709
47
    case Mips::DPAQX_S_W_PH:
2710
47
    case Mips::DPAQ_SA_L_W:
2711
47
    case Mips::DPAQ_S_W_PH:
2712
47
    case Mips::DPAU_H_QBL:
2713
47
    case Mips::DPAU_H_QBR:
2714
47
    case Mips::DPAX_W_PH:
2715
47
    case Mips::DPA_W_PH:
2716
47
    case Mips::DPSQX_SA_W_PH:
2717
47
    case Mips::DPSQX_S_W_PH:
2718
47
    case Mips::DPSQ_SA_L_W:
2719
47
    case Mips::DPSQ_S_W_PH:
2720
47
    case Mips::DPSU_H_QBL:
2721
47
    case Mips::DPSU_H_QBR:
2722
47
    case Mips::DPSX_W_PH:
2723
47
    case Mips::DPS_W_PH:
2724
47
    case Mips::MADDU_DSP:
2725
47
    case Mips::MADD_DSP:
2726
47
    case Mips::MAQ_SA_W_PHL:
2727
47
    case Mips::MAQ_SA_W_PHR:
2728
47
    case Mips::MAQ_S_W_PHL:
2729
47
    case Mips::MAQ_S_W_PHR:
2730
47
    case Mips::MSUBU_DSP:
2731
47
    case Mips::MSUB_DSP:
2732
47
    case Mips::MULSAQ_S_W_PH:
2733
47
    case Mips::MULSA_W_PH:
2734
47
    case Mips::MULTU_DSP:
2735
47
    case Mips::MULT_DSP: {
2736
47
      // op: ac
2737
47
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2738
47
      Value |= (op & UINT64_C(3)) << 11;
2739
47
      // op: rs
2740
47
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
2741
47
      Value |= (op & UINT64_C(31)) << 21;
2742
47
      // op: rt
2743
47
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
2744
47
      Value |= (op & UINT64_C(31)) << 16;
2745
47
      break;
2746
47
    }
2747
47
    case Mips::SHILO: {
2748
4
      // op: ac
2749
4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2750
4
      Value |= (op & UINT64_C(3)) << 11;
2751
4
      // op: shift
2752
4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
2753
4
      Value |= (op & UINT64_C(63)) << 20;
2754
4
      break;
2755
47
    }
2756
54
    case Mips::CACHEE:
2757
54
    case Mips::CACHE_R6:
2758
54
    case Mips::PREFE:
2759
54
    case Mips::PREF_R6: {
2760
54
      // op: addr
2761
54
      op = getMemEncoding(MI, 0, Fixups, STI);
2762
54
      Value |= (op & UINT64_C(2031616)) << 5;
2763
54
      Value |= (op & UINT64_C(511)) << 7;
2764
54
      // op: hint
2765
54
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
2766
54
      Value |= (op & UINT64_C(31)) << 16;
2767
54
      break;
2768
54
    }
2769
54
    case Mips::SYNCI: {
2770
8
      // op: addr
2771
8
      op = getMemEncoding(MI, 0, Fixups, STI);
2772
8
      Value |= (op & UINT64_C(2031616)) << 5;
2773
8
      Value |= op & UINT64_C(65535);
2774
8
      break;
2775
54
    }
2776
54
    case Mips::CACHE:
2777
21
    case Mips::PREF: {
2778
21
      // op: addr
2779
21
      op = getMemEncoding(MI, 0, Fixups, STI);
2780
21
      Value |= (op & UINT64_C(2031616)) << 5;
2781
21
      Value |= op & UINT64_C(65535);
2782
21
      // op: hint
2783
21
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
2784
21
      Value |= (op & UINT64_C(31)) << 16;
2785
21
      break;
2786
21
    }
2787
21
    case Mips::LD_B:
2788
3
    case Mips::ST_B: {
2789
3
      // op: addr
2790
3
      op = getMemEncoding(MI, 1, Fixups, STI);
2791
3
      Value |= (op & UINT64_C(1023)) << 16;
2792
3
      Value |= (op & UINT64_C(2031616)) >> 5;
2793
3
      // op: wd
2794
3
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2795
3
      Value |= (op & UINT64_C(31)) << 6;
2796
3
      break;
2797
3
    }
2798
303
    case Mips::LBE:
2799
303
    case Mips::LBuE:
2800
303
    case Mips::LHE:
2801
303
    case Mips::LHuE:
2802
303
    case Mips::LLE:
2803
303
    case Mips::LWE:
2804
303
    case Mips::LWLE:
2805
303
    case Mips::LWRE:
2806
303
    case Mips::SBE:
2807
303
    case Mips::SHE:
2808
303
    case Mips::SWE:
2809
303
    case Mips::SWLE:
2810
303
    case Mips::SWRE: {
2811
303
      // op: addr
2812
303
      op = getMemEncoding(MI, 1, Fixups, STI);
2813
303
      Value |= (op & UINT64_C(2031616)) << 5;
2814
303
      Value |= (op & UINT64_C(511)) << 7;
2815
303
      // op: hint
2816
303
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2817
303
      Value |= (op & UINT64_C(31)) << 16;
2818
303
      break;
2819
303
    }
2820
303
    case Mips::SCE: {
2821
25
      // op: addr
2822
25
      op = getMemEncoding(MI, 2, Fixups, STI);
2823
25
      Value |= (op & UINT64_C(2031616)) << 5;
2824
25
      Value |= (op & UINT64_C(511)) << 7;
2825
25
      // op: hint
2826
25
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2827
25
      Value |= (op & UINT64_C(31)) << 16;
2828
25
      break;
2829
303
    }
2830
303
    case Mips::LD_H:
2831
5
    case Mips::ST_H: {
2832
5
      // op: addr
2833
5
      op = getMemEncoding<1>(MI, 1, Fixups, STI);
2834
5
      Value |= (op & UINT64_C(1023)) << 16;
2835
5
      Value |= (op & UINT64_C(2031616)) >> 5;
2836
5
      // op: wd
2837
5
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2838
5
      Value |= (op & UINT64_C(31)) << 6;
2839
5
      break;
2840
5
    }
2841
6
    case Mips::LD_W:
2842
6
    case Mips::ST_W: {
2843
6
      // op: addr
2844
6
      op = getMemEncoding<2>(MI, 1, Fixups, STI);
2845
6
      Value |= (op & UINT64_C(1023)) << 16;
2846
6
      Value |= (op & UINT64_C(2031616)) >> 5;
2847
6
      // op: wd
2848
6
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2849
6
      Value |= (op & UINT64_C(31)) << 6;
2850
6
      break;
2851
6
    }
2852
9
    case Mips::LD_D:
2853
9
    case Mips::ST_D: {
2854
9
      // op: addr
2855
9
      op = getMemEncoding<3>(MI, 1, Fixups, STI);
2856
9
      Value |= (op & UINT64_C(1023)) << 16;
2857
9
      Value |= (op & UINT64_C(2031616)) >> 5;
2858
9
      // op: wd
2859
9
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2860
9
      Value |= (op & UINT64_C(31)) << 6;
2861
9
      break;
2862
9
    }
2863
9
    case Mips::CACHE_MM:
2864
8
    case Mips::CACHE_MMR6:
2865
8
    case Mips::PREF_MM:
2866
8
    case Mips::PREF_MMR6: {
2867
8
      // op: addr
2868
8
      op = getMemEncodingMMImm12(MI, 0, Fixups, STI);
2869
8
      Value |= op & UINT64_C(2031616);
2870
8
      Value |= op & UINT64_C(4095);
2871
8
      // op: hint
2872
8
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
2873
8
      Value |= (op & UINT64_C(31)) << 21;
2874
8
      break;
2875
8
    }
2876
8
    case Mips::SYNCI_MM:
2877
2
    case Mips::SYNCI_MMR6: {
2878
2
      // op: addr
2879
2
      op = getMemEncodingMMImm16(MI, 0, Fixups, STI);
2880
2
      Value |= op & UINT64_C(2097151);
2881
2
      break;
2882
2
    }
2883
2
    case Mips::LBU_MMR6:
2884
2
    case Mips::LB_MMR6: {
2885
2
      // op: addr
2886
2
      op = getMemEncodingMMImm16(MI, 1, Fixups, STI);
2887
2
      Value |= op & UINT64_C(2097151);
2888
2
      // op: rt
2889
2
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2890
2
      Value |= (op & UINT64_C(31)) << 21;
2891
2
      break;
2892
2
    }
2893
12
    case Mips::CACHEE_MM:
2894
12
    case Mips::PREFE_MM: {
2895
12
      // op: addr
2896
12
      op = getMemEncodingMMImm9(MI, 0, Fixups, STI);
2897
12
      Value |= op & UINT64_C(2031616);
2898
12
      Value |= op & UINT64_C(511);
2899
12
      // op: hint
2900
12
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
2901
12
      Value |= (op & UINT64_C(31)) << 21;
2902
12
      break;
2903
12
    }
2904
12
    case Mips::HYPCALL: {
2905
7
      // op: code_
2906
7
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2907
7
      Value |= (op & UINT64_C(1023)) << 11;
2908
7
      break;
2909
12
    }
2910
22
    case Mips::HYPCALL_MM:
2911
22
    case Mips::SDBBP_MM:
2912
22
    case Mips::SDBBP_MMR6:
2913
22
    case Mips::SYSCALL_MM:
2914
22
    case Mips::WAIT_MM:
2915
22
    case Mips::WAIT_MMR6: {
2916
22
      // op: code_
2917
22
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2918
22
      Value |= (op & UINT64_C(1023)) << 16;
2919
22
      break;
2920
22
    }
2921
53
    case Mips::SDBBP:
2922
53
    case Mips::SDBBP_R6:
2923
53
    case Mips::SYSCALL: {
2924
53
      // op: code_
2925
53
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2926
53
      Value |= (op & UINT64_C(1048575)) << 6;
2927
53
      break;
2928
53
    }
2929
53
    case Mips::BREAK16_MMR6:
2930
2
    case Mips::SDBBP16_MMR6: {
2931
2
      // op: code_
2932
2
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2933
2
      Value |= (op & UINT64_C(15)) << 6;
2934
2
      break;
2935
2
    }
2936
6
    case Mips::BREAK16_MM:
2937
6
    case Mips::SDBBP16_MM: {
2938
6
      // op: code_
2939
6
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2940
6
      Value |= op & UINT64_C(15);
2941
6
      break;
2942
6
    }
2943
142
    case Mips::BREAK:
2944
142
    case Mips::BREAK_MM:
2945
142
    case Mips::BREAK_MMR6: {
2946
142
      // op: code_1
2947
142
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2948
142
      Value |= (op & UINT64_C(1023)) << 16;
2949
142
      // op: code_2
2950
142
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
2951
142
      Value |= (op & UINT64_C(1023)) << 6;
2952
142
      break;
2953
142
    }
2954
142
    case Mips::BC2EQZ:
2955
8
    case Mips::BC2NEZ: {
2956
8
      // op: ct
2957
8
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2958
8
      Value |= (op & UINT64_C(31)) << 16;
2959
8
      // op: offset
2960
8
      op = getBranchTargetOpValue(MI, 1, Fixups, STI);
2961
8
      Value |= op & UINT64_C(65535);
2962
8
      break;
2963
8
    }
2964
8
    case Mips::MOVEP_MMR6: {
2965
1
      // op: dst_regs
2966
1
      op = getMovePRegPairOpValue(MI, 0, Fixups, STI);
2967
1
      Value |= (op & UINT64_C(7)) << 7;
2968
1
      // op: rt
2969
1
      op = getMovePRegSingleOpValue(MI, 3, Fixups, STI);
2970
1
      Value |= (op & UINT64_C(7)) << 4;
2971
1
      // op: rs
2972
1
      op = getMovePRegSingleOpValue(MI, 2, Fixups, STI);
2973
1
      Value |= (op & UINT64_C(4)) << 1;
2974
1
      Value |= op & UINT64_C(3);
2975
1
      break;
2976
8
    }
2977
8
    case Mips::MOVEP_MM: {
2978
3
      // op: dst_regs
2979
3
      op = getMovePRegPairOpValue(MI, 0, Fixups, STI);
2980
3
      Value |= (op & UINT64_C(7)) << 7;
2981
3
      // op: rt
2982
3
      op = getMovePRegSingleOpValue(MI, 3, Fixups, STI);
2983
3
      Value |= (op & UINT64_C(7)) << 4;
2984
3
      // op: rs
2985
3
      op = getMovePRegSingleOpValue(MI, 2, Fixups, STI);
2986
3
      Value |= (op & UINT64_C(7)) << 1;
2987
3
      break;
2988
8
    }
2989
146
    case Mips::BC1F:
2990
146
    case Mips::BC1FL:
2991
146
    case Mips::BC1T:
2992
146
    case Mips::BC1TL: {
2993
146
      // op: fcc
2994
146
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2995
146
      Value |= (op & UINT64_C(7)) << 18;
2996
146
      // op: offset
2997
146
      op = getBranchTargetOpValue(MI, 1, Fixups, STI);
2998
146
      Value |= op & UINT64_C(65535);
2999
146
      break;
3000
146
    }
3001
146
    case Mips::BC1F_MM:
3002
8
    case Mips::BC1T_MM: {
3003
8
      // op: fcc
3004
8
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3005
8
      Value |= (op & UINT64_C(7)) << 18;
3006
8
      // op: offset
3007
8
      op = getBranchTargetOpValueMM(MI, 1, Fixups, STI);
3008
8
      Value |= op & UINT64_C(65535);
3009
8
      break;
3010
8
    }
3011
8
    case Mips::LUXC1_MM:
3012
2
    case Mips::LWXC1_MM: {
3013
2
      // op: fd
3014
2
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3015
2
      Value |= (op & UINT64_C(31)) << 11;
3016
2
      // op: base
3017
2
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3018
2
      Value |= (op & UINT64_C(31)) << 16;
3019
2
      // op: index
3020
2
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3021
2
      Value |= (op & UINT64_C(31)) << 21;
3022
2
      break;
3023
2
    }
3024
8
    case Mips::MOVN_I_D32_MM:
3025
8
    case Mips::MOVN_I_S_MM:
3026
8
    case Mips::MOVZ_I_D32_MM:
3027
8
    case Mips::MOVZ_I_S_MM: {
3028
8
      // op: fd
3029
8
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3030
8
      Value |= (op & UINT64_C(31)) << 11;
3031
8
      // op: fs
3032
8
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3033
8
      Value |= (op & UINT64_C(31)) << 16;
3034
8
      // op: rt
3035
8
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3036
8
      Value |= (op & UINT64_C(31)) << 21;
3037
8
      break;
3038
8
    }
3039
87
    case Mips::CEIL_W_MM:
3040
87
    case Mips::CEIL_W_S_MM:
3041
87
    case Mips::CVT_D32_S_MM:
3042
87
    case Mips::CVT_D32_W_MM:
3043
87
    case Mips::CVT_D64_S_MM:
3044
87
    case Mips::CVT_D64_W_MM:
3045
87
    case Mips::CVT_L_D64_MM:
3046
87
    case Mips::CVT_L_S_MM:
3047
87
    case Mips::CVT_S_D32_MM:
3048
87
    case Mips::CVT_S_D64_MM:
3049
87
    case Mips::CVT_S_W_MM:
3050
87
    case Mips::CVT_W_D32_MM:
3051
87
    case Mips::CVT_W_D64_MM:
3052
87
    case Mips::CVT_W_S_MM:
3053
87
    case Mips::FABS_D32_MM:
3054
87
    case Mips::FABS_D64_MM:
3055
87
    case Mips::FABS_S_MM:
3056
87
    case Mips::FLOOR_W_MM:
3057
87
    case Mips::FLOOR_W_S_MM:
3058
87
    case Mips::FMOV_D32_MM:
3059
87
    case Mips::FMOV_D64_MM:
3060
87
    case Mips::FMOV_S_MM:
3061
87
    case Mips::FNEG_D32_MM:
3062
87
    case Mips::FNEG_D64_MM:
3063
87
    case Mips::FNEG_S_MM:
3064
87
    case Mips::FSQRT_D32_MM:
3065
87
    case Mips::FSQRT_D64_MM:
3066
87
    case Mips::FSQRT_S_MM:
3067
87
    case Mips::RECIP_D32_MM:
3068
87
    case Mips::RECIP_D64_MM:
3069
87
    case Mips::RECIP_S_MM:
3070
87
    case Mips::ROUND_W_MM:
3071
87
    case Mips::ROUND_W_S_MM:
3072
87
    case Mips::RSQRT_D32_MM:
3073
87
    case Mips::RSQRT_D64_MM:
3074
87
    case Mips::RSQRT_S_MM:
3075
87
    case Mips::TRUNC_W_MM:
3076
87
    case Mips::TRUNC_W_S_MM: {
3077
87
      // op: fd
3078
87
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3079
87
      Value |= (op & UINT64_C(31)) << 21;
3080
87
      // op: fs
3081
87
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3082
87
      Value |= (op & UINT64_C(31)) << 16;
3083
87
      break;
3084
87
    }
3085
87
    case Mips::MOVF_D32_MM:
3086
8
    case Mips::MOVF_S_MM:
3087
8
    case Mips::MOVT_D32_MM:
3088
8
    case Mips::MOVT_S_MM: {
3089
8
      // op: fd
3090
8
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3091
8
      Value |= (op & UINT64_C(31)) << 21;
3092
8
      // op: fs
3093
8
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3094
8
      Value |= (op & UINT64_C(31)) << 16;
3095
8
      // op: fcc
3096
8
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3097
8
      Value |= (op & UINT64_C(7)) << 13;
3098
8
      break;
3099
8
    }
3100
36
    case Mips::LDXC1:
3101
36
    case Mips::LDXC164:
3102
36
    case Mips::LUXC1:
3103
36
    case Mips::LUXC164:
3104
36
    case Mips::LWXC1: {
3105
36
      // op: fd
3106
36
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3107
36
      Value |= (op & UINT64_C(31)) << 6;
3108
36
      // op: base
3109
36
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3110
36
      Value |= (op & UINT64_C(31)) << 21;
3111
36
      // op: index
3112
36
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3113
36
      Value |= (op & UINT64_C(31)) << 16;
3114
36
      break;
3115
36
    }
3116
60
    case Mips::MADD_D32:
3117
60
    case Mips::MADD_D64:
3118
60
    case Mips::MADD_S:
3119
60
    case Mips::MSUB_D32:
3120
60
    case Mips::MSUB_D64:
3121
60
    case Mips::MSUB_S:
3122
60
    case Mips::NMADD_D32:
3123
60
    case Mips::NMADD_D64:
3124
60
    case Mips::NMADD_S:
3125
60
    case Mips::NMSUB_D32:
3126
60
    case Mips::NMSUB_D64:
3127
60
    case Mips::NMSUB_S: {
3128
60
      // op: fd
3129
60
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3130
60
      Value |= (op & UINT64_C(31)) << 6;
3131
60
      // op: fr
3132
60
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3133
60
      Value |= (op & UINT64_C(31)) << 21;
3134
60
      // op: fs
3135
60
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3136
60
      Value |= (op & UINT64_C(31)) << 11;
3137
60
      // op: ft
3138
60
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
3139
60
      Value |= (op & UINT64_C(31)) << 16;
3140
60
      break;
3141
60
    }
3142
545
    case Mips::CEIL_L_D64:
3143
545
    case Mips::CEIL_L_S:
3144
545
    case Mips::CEIL_W_D32:
3145
545
    case Mips::CEIL_W_D64:
3146
545
    case Mips::CEIL_W_S:
3147
545
    case Mips::CVT_D32_S:
3148
545
    case Mips::CVT_D32_W:
3149
545
    case Mips::CVT_D64_L:
3150
545
    case Mips::CVT_D64_S:
3151
545
    case Mips::CVT_D64_W:
3152
545
    case Mips::CVT_L_D64:
3153
545
    case Mips::CVT_L_S:
3154
545
    case Mips::CVT_S_D32:
3155
545
    case Mips::CVT_S_D64:
3156
545
    case Mips::CVT_S_L:
3157
545
    case Mips::CVT_S_W:
3158
545
    case Mips::CVT_W_D32:
3159
545
    case Mips::CVT_W_D64:
3160
545
    case Mips::CVT_W_S:
3161
545
    case Mips::FABS_D32:
3162
545
    case Mips::FABS_D64:
3163
545
    case Mips::FABS_S:
3164
545
    case Mips::FLOOR_L_D64:
3165
545
    case Mips::FLOOR_L_S:
3166
545
    case Mips::FLOOR_W_D32:
3167
545
    case Mips::FLOOR_W_D64:
3168
545
    case Mips::FLOOR_W_S:
3169
545
    case Mips::FMOV_D32:
3170
545
    case Mips::FMOV_D64:
3171
545
    case Mips::FMOV_S:
3172
545
    case Mips::FNEG_D32:
3173
545
    case Mips::FNEG_D64:
3174
545
    case Mips::FNEG_S:
3175
545
    case Mips::FSQRT_D32:
3176
545
    case Mips::FSQRT_D64:
3177
545
    case Mips::FSQRT_S:
3178
545
    case Mips::RECIP_D32:
3179
545
    case Mips::RECIP_D64:
3180
545
    case Mips::RECIP_S:
3181
545
    case Mips::ROUND_L_D64:
3182
545
    case Mips::ROUND_L_S:
3183
545
    case Mips::ROUND_W_D32:
3184
545
    case Mips::ROUND_W_D64:
3185
545
    case Mips::ROUND_W_S:
3186
545
    case Mips::RSQRT_D32:
3187
545
    case Mips::RSQRT_D64:
3188
545
    case Mips::RSQRT_S:
3189
545
    case Mips::TRUNC_L_D64:
3190
545
    case Mips::TRUNC_L_S:
3191
545
    case Mips::TRUNC_W_D32:
3192
545
    case Mips::TRUNC_W_D64:
3193
545
    case Mips::TRUNC_W_S: {
3194
545
      // op: fd
3195
545
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3196
545
      Value |= (op & UINT64_C(31)) << 6;
3197
545
      // op: fs
3198
545
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3199
545
      Value |= (op & UINT64_C(31)) << 11;
3200
545
      break;
3201
545
    }
3202
545
    case Mips::MOVF_D32:
3203
44
    case Mips::MOVF_D64:
3204
44
    case Mips::MOVF_S:
3205
44
    case Mips::MOVT_D32:
3206
44
    case Mips::MOVT_D64:
3207
44
    case Mips::MOVT_S: {
3208
44
      // op: fd
3209
44
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3210
44
      Value |= (op & UINT64_C(31)) << 6;
3211
44
      // op: fs
3212
44
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3213
44
      Value |= (op & UINT64_C(31)) << 11;
3214
44
      // op: fcc
3215
44
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3216
44
      Value |= (op & UINT64_C(7)) << 18;
3217
44
      break;
3218
44
    }
3219
196
    case Mips::CMP_EQ_D:
3220
196
    case Mips::CMP_EQ_S:
3221
196
    case Mips::CMP_F_D:
3222
196
    case Mips::CMP_F_S:
3223
196
    case Mips::CMP_LE_D:
3224
196
    case Mips::CMP_LE_S:
3225
196
    case Mips::CMP_LT_D:
3226
196
    case Mips::CMP_LT_S:
3227
196
    case Mips::CMP_SAF_D:
3228
196
    case Mips::CMP_SAF_S:
3229
196
    case Mips::CMP_SEQ_D:
3230
196
    case Mips::CMP_SEQ_S:
3231
196
    case Mips::CMP_SLE_D:
3232
196
    case Mips::CMP_SLE_S:
3233
196
    case Mips::CMP_SLT_D:
3234
196
    case Mips::CMP_SLT_S:
3235
196
    case Mips::CMP_SUEQ_D:
3236
196
    case Mips::CMP_SUEQ_S:
3237
196
    case Mips::CMP_SULE_D:
3238
196
    case Mips::CMP_SULE_S:
3239
196
    case Mips::CMP_SULT_D:
3240
196
    case Mips::CMP_SULT_S:
3241
196
    case Mips::CMP_SUN_D:
3242
196
    case Mips::CMP_SUN_S:
3243
196
    case Mips::CMP_UEQ_D:
3244
196
    case Mips::CMP_UEQ_S:
3245
196
    case Mips::CMP_ULE_D:
3246
196
    case Mips::CMP_ULE_S:
3247
196
    case Mips::CMP_ULT_D:
3248
196
    case Mips::CMP_ULT_S:
3249
196
    case Mips::CMP_UN_D:
3250
196
    case Mips::CMP_UN_S:
3251
196
    case Mips::FADD_D32:
3252
196
    case Mips::FADD_D64:
3253
196
    case Mips::FADD_S:
3254
196
    case Mips::FDIV_D32:
3255
196
    case Mips::FDIV_D64:
3256
196
    case Mips::FDIV_S:
3257
196
    case Mips::FMUL_D32:
3258
196
    case Mips::FMUL_D64:
3259
196
    case Mips::FMUL_S:
3260
196
    case Mips::FSUB_D32:
3261
196
    case Mips::FSUB_D64:
3262
196
    case Mips::FSUB_S: {
3263
196
      // op: fd
3264
196
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3265
196
      Value |= (op & UINT64_C(31)) << 6;
3266
196
      // op: fs
3267
196
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3268
196
      Value |= (op & UINT64_C(31)) << 11;
3269
196
      // op: ft
3270
196
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3271
196
      Value |= (op & UINT64_C(31)) << 16;
3272
196
      break;
3273
196
    }
3274
196
    case Mips::MOVN_I64_D64:
3275
40
    case Mips::MOVN_I64_S:
3276
40
    case Mips::MOVN_I_D32:
3277
40
    case Mips::MOVN_I_D64:
3278
40
    case Mips::MOVN_I_S:
3279
40
    case Mips::MOVZ_I64_D64:
3280
40
    case Mips::MOVZ_I64_S:
3281
40
    case Mips::MOVZ_I_D32:
3282
40
    case Mips::MOVZ_I_D64:
3283
40
    case Mips::MOVZ_I_S: {
3284
40
      // op: fd
3285
40
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3286
40
      Value |= (op & UINT64_C(31)) << 6;
3287
40
      // op: fs
3288
40
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3289
40
      Value |= (op & UINT64_C(31)) << 11;
3290
40
      // op: rt
3291
40
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3292
40
      Value |= (op & UINT64_C(31)) << 16;
3293
40
      break;
3294
40
    }
3295
40
    case Mips::SUXC1_MM:
3296
2
    case Mips::SWXC1_MM: {
3297
2
      // op: fs
3298
2
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3299
2
      Value |= (op & UINT64_C(31)) << 11;
3300
2
      // op: base
3301
2
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3302
2
      Value |= (op & UINT64_C(31)) << 16;
3303
2
      // op: index
3304
2
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3305
2
      Value |= (op & UINT64_C(31)) << 21;
3306
2
      break;
3307
2
    }
3308
31
    case Mips::SDXC1:
3309
31
    case Mips::SDXC164:
3310
31
    case Mips::SUXC1:
3311
31
    case Mips::SUXC164:
3312
31
    case Mips::SWXC1: {
3313
31
      // op: fs
3314
31
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3315
31
      Value |= (op & UINT64_C(31)) << 11;
3316
31
      // op: base
3317
31
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3318
31
      Value |= (op & UINT64_C(31)) << 21;
3319
31
      // op: index
3320
31
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3321
31
      Value |= (op & UINT64_C(31)) << 16;
3322
31
      break;
3323
31
    }
3324
31
    case Mips::FCMP_D32:
3325
0
    case Mips::FCMP_D64:
3326
0
    case Mips::FCMP_S32: {
3327
0
      // op: fs
3328
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3329
0
      Value |= (op & UINT64_C(31)) << 11;
3330
0
      // op: ft
3331
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3332
0
      Value |= (op & UINT64_C(31)) << 16;
3333
0
      // op: cond
3334
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3335
0
      Value |= op & UINT64_C(15);
3336
0
      break;
3337
0
    }
3338
0
    case Mips::FCMP_D32_MM:
3339
0
    case Mips::FCMP_S32_MM: {
3340
0
      // op: fs
3341
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3342
0
      Value |= (op & UINT64_C(31)) << 16;
3343
0
      // op: ft
3344
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3345
0
      Value |= (op & UINT64_C(31)) << 21;
3346
0
      // op: cond
3347
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3348
0
      Value |= (op & UINT64_C(15)) << 6;
3349
0
      break;
3350
0
    }
3351
8
    case Mips::CLASS_D:
3352
8
    case Mips::CLASS_S:
3353
8
    case Mips::RINT_D:
3354
8
    case Mips::RINT_S: {
3355
8
      // op: fs
3356
8
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3357
8
      Value |= (op & UINT64_C(31)) << 11;
3358
8
      // op: fd
3359
8
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3360
8
      Value |= (op & UINT64_C(31)) << 6;
3361
8
      break;
3362
8
    }
3363
396
    case Mips::C_EQ_D32:
3364
396
    case Mips::C_EQ_D64:
3365
396
    case Mips::C_EQ_S:
3366
396
    case Mips::C_F_D32:
3367
396
    case Mips::C_F_D64:
3368
396
    case Mips::C_F_S:
3369
396
    case Mips::C_LE_D32:
3370
396
    case Mips::C_LE_D64:
3371
396
    case Mips::C_LE_S:
3372
396
    case Mips::C_LT_D32:
3373
396
    case Mips::C_LT_D64:
3374
396
    case Mips::C_LT_S:
3375
396
    case Mips::C_NGE_D32:
3376
396
    case Mips::C_NGE_D64:
3377
396
    case Mips::C_NGE_S:
3378
396
    case Mips::C_NGLE_D32:
3379
396
    case Mips::C_NGLE_D64:
3380
396
    case Mips::C_NGLE_S:
3381
396
    case Mips::C_NGL_D32:
3382
396
    case Mips::C_NGL_D64:
3383
396
    case Mips::C_NGL_S:
3384
396
    case Mips::C_NGT_D32:
3385
396
    case Mips::C_NGT_D64:
3386
396
    case Mips::C_NGT_S:
3387
396
    case Mips::C_OLE_D32:
3388
396
    case Mips::C_OLE_D64:
3389
396
    case Mips::C_OLE_S:
3390
396
    case Mips::C_OLT_D32:
3391
396
    case Mips::C_OLT_D64:
3392
396
    case Mips::C_OLT_S:
3393
396
    case Mips::C_SEQ_D32:
3394
396
    case Mips::C_SEQ_D64:
3395
396
    case Mips::C_SEQ_S:
3396
396
    case Mips::C_SF_D32:
3397
396
    case Mips::C_SF_D64:
3398
396
    case Mips::C_SF_S:
3399
396
    case Mips::C_UEQ_D32:
3400
396
    case Mips::C_UEQ_D64:
3401
396
    case Mips::C_UEQ_S:
3402
396
    case Mips::C_ULE_D32:
3403
396
    case Mips::C_ULE_D64:
3404
396
    case Mips::C_ULE_S:
3405
396
    case Mips::C_ULT_D32:
3406
396
    case Mips::C_ULT_D64:
3407
396
    case Mips::C_ULT_S:
3408
396
    case Mips::C_UN_D32:
3409
396
    case Mips::C_UN_D64:
3410
396
    case Mips::C_UN_S: {
3411
396
      // op: fs
3412
396
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3413
396
      Value |= (op & UINT64_C(31)) << 11;
3414
396
      // op: ft
3415
396
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3416
396
      Value |= (op & UINT64_C(31)) << 16;
3417
396
      // op: fcc
3418
396
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3419
396
      Value |= (op & UINT64_C(7)) << 8;
3420
396
      break;
3421
396
    }
3422
396
    case Mips::C_EQ_D32_MM:
3423
96
    case Mips::C_EQ_D64_MM:
3424
96
    case Mips::C_EQ_S_MM:
3425
96
    case Mips::C_F_D32_MM:
3426
96
    case Mips::C_F_D64_MM:
3427
96
    case Mips::C_F_S_MM:
3428
96
    case Mips::C_LE_D32_MM:
3429
96
    case Mips::C_LE_D64_MM:
3430
96
    case Mips::C_LE_S_MM:
3431
96
    case Mips::C_LT_D32_MM:
3432
96
    case Mips::C_LT_D64_MM:
3433
96
    case Mips::C_LT_S_MM:
3434
96
    case Mips::C_NGE_D32_MM:
3435
96
    case Mips::C_NGE_D64_MM:
3436
96
    case Mips::C_NGE_S_MM:
3437
96
    case Mips::C_NGLE_D32_MM:
3438
96
    case Mips::C_NGLE_D64_MM:
3439
96
    case Mips::C_NGLE_S_MM:
3440
96
    case Mips::C_NGL_D32_MM:
3441
96
    case Mips::C_NGL_D64_MM:
3442
96
    case Mips::C_NGL_S_MM:
3443
96
    case Mips::C_NGT_D32_MM:
3444
96
    case Mips::C_NGT_D64_MM:
3445
96
    case Mips::C_NGT_S_MM:
3446
96
    case Mips::C_OLE_D32_MM:
3447
96
    case Mips::C_OLE_D64_MM:
3448
96
    case Mips::C_OLE_S_MM:
3449
96
    case Mips::C_OLT_D32_MM:
3450
96
    case Mips::C_OLT_D64_MM:
3451
96
    case Mips::C_OLT_S_MM:
3452
96
    case Mips::C_SEQ_D32_MM:
3453
96
    case Mips::C_SEQ_D64_MM:
3454
96
    case Mips::C_SEQ_S_MM:
3455
96
    case Mips::C_SF_D32_MM:
3456
96
    case Mips::C_SF_D64_MM:
3457
96
    case Mips::C_SF_S_MM:
3458
96
    case Mips::C_UEQ_D32_MM:
3459
96
    case Mips::C_UEQ_D64_MM:
3460
96
    case Mips::C_UEQ_S_MM:
3461
96
    case Mips::C_ULE_D32_MM:
3462
96
    case Mips::C_ULE_D64_MM:
3463
96
    case Mips::C_ULE_S_MM:
3464
96
    case Mips::C_ULT_D32_MM:
3465
96
    case Mips::C_ULT_D64_MM:
3466
96
    case Mips::C_ULT_S_MM:
3467
96
    case Mips::C_UN_D32_MM:
3468
96
    case Mips::C_UN_D64_MM:
3469
96
    case Mips::C_UN_S_MM: {
3470
96
      // op: fs
3471
96
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3472
96
      Value |= (op & UINT64_C(31)) << 16;
3473
96
      // op: ft
3474
96
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3475
96
      Value |= (op & UINT64_C(31)) << 21;
3476
96
      // op: fcc
3477
96
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3478
96
      Value |= (op & UINT64_C(7)) << 13;
3479
96
      break;
3480
96
    }
3481
96
    case Mips::CLASS_D_MMR6:
3482
4
    case Mips::CLASS_S_MMR6:
3483
4
    case Mips::RINT_D_MMR6:
3484
4
    case Mips::RINT_S_MMR6: {
3485
4
      // op: fs
3486
4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3487
4
      Value |= (op & UINT64_C(31)) << 21;
3488
4
      // op: fd
3489
4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3490
4
      Value |= (op & UINT64_C(31)) << 16;
3491
4
      break;
3492
4
    }
3493
8
    case Mips::BC1EQZ:
3494
8
    case Mips::BC1NEZ: {
3495
8
      // op: ft
3496
8
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3497
8
      Value |= (op & UINT64_C(31)) << 16;
3498
8
      // op: offset
3499
8
      op = getBranchTargetOpValue(MI, 1, Fixups, STI);
3500
8
      Value |= op & UINT64_C(65535);
3501
8
      break;
3502
8
    }
3503
16
    case Mips::LDC1_D64_MMR6:
3504
16
    case Mips::SDC1_D64_MMR6: {
3505
16
      // op: ft
3506
16
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3507
16
      Value |= (op & UINT64_C(31)) << 21;
3508
16
      // op: addr
3509
16
      op = getMemEncodingMMImm16(MI, 1, Fixups, STI);
3510
16
      Value |= op & UINT64_C(2097151);
3511
16
      break;
3512
16
    }
3513
22
    case Mips::CEIL_L_D_MMR6:
3514
22
    case Mips::CEIL_L_S_MMR6:
3515
22
    case Mips::CEIL_W_D_MMR6:
3516
22
    case Mips::CEIL_W_S_MMR6:
3517
22
    case Mips::CVT_D_L_MMR6:
3518
22
    case Mips::CVT_L_D_MMR6:
3519
22
    case Mips::CVT_L_S_MMR6:
3520
22
    case Mips::CVT_S_L_MMR6:
3521
22
    case Mips::CVT_S_W_MMR6:
3522
22
    case Mips::CVT_W_S_MMR6:
3523
22
    case Mips::FLOOR_L_D_MMR6:
3524
22
    case Mips::FLOOR_L_S_MMR6:
3525
22
    case Mips::FLOOR_W_D_MMR6:
3526
22
    case Mips::FLOOR_W_S_MMR6:
3527
22
    case Mips::FMOV_S_MMR6:
3528
22
    case Mips::FNEG_S_MMR6:
3529
22
    case Mips::ROUND_L_D_MMR6:
3530
22
    case Mips::ROUND_L_S_MMR6:
3531
22
    case Mips::ROUND_W_D_MMR6:
3532
22
    case Mips::ROUND_W_S_MMR6:
3533
22
    case Mips::TRUNC_L_D_MMR6:
3534
22
    case Mips::TRUNC_L_S_MMR6:
3535
22
    case Mips::TRUNC_W_D_MMR6:
3536
22
    case Mips::TRUNC_W_S_MMR6: {
3537
22
      // op: ft
3538
22
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3539
22
      Value |= (op & UINT64_C(31)) << 21;
3540
22
      // op: fs
3541
22
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3542
22
      Value |= (op & UINT64_C(31)) << 16;
3543
22
      break;
3544
22
    }
3545
22
    case Mips::FADD_S_MMR6:
3546
4
    case Mips::FDIV_S_MMR6:
3547
4
    case Mips::FMUL_S_MMR6:
3548
4
    case Mips::FSUB_S_MMR6: {
3549
4
      // op: ft
3550
4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3551
4
      Value |= (op & UINT64_C(31)) << 21;
3552
4
      // op: fs
3553
4
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3554
4
      Value |= (op & UINT64_C(31)) << 16;
3555
4
      // op: fd
3556
4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3557
4
      Value |= (op & UINT64_C(31)) << 11;
3558
4
      break;
3559
4
    }
3560
24
    case Mips::MAXA_D:
3561
24
    case Mips::MAXA_S:
3562
24
    case Mips::MAX_D:
3563
24
    case Mips::MAX_S:
3564
24
    case Mips::MINA_D:
3565
24
    case Mips::MINA_S:
3566
24
    case Mips::MIN_D:
3567
24
    case Mips::MIN_S:
3568
24
    case Mips::SELEQZ_D:
3569
24
    case Mips::SELEQZ_S:
3570
24
    case Mips::SELNEZ_D:
3571
24
    case Mips::SELNEZ_S: {
3572
24
      // op: ft
3573
24
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3574
24
      Value |= (op & UINT64_C(31)) << 16;
3575
24
      // op: fs
3576
24
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3577
24
      Value |= (op & UINT64_C(31)) << 11;
3578
24
      // op: fd
3579
24
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3580
24
      Value |= (op & UINT64_C(31)) << 6;
3581
24
      break;
3582
24
    }
3583
80
    case Mips::CMP_AF_D_MMR6:
3584
80
    case Mips::CMP_AF_S_MMR6:
3585
80
    case Mips::CMP_EQ_D_MMR6:
3586
80
    case Mips::CMP_EQ_S_MMR6:
3587
80
    case Mips::CMP_LE_D_MMR6:
3588
80
    case Mips::CMP_LE_S_MMR6:
3589
80
    case Mips::CMP_LT_D_MMR6:
3590
80
    case Mips::CMP_LT_S_MMR6:
3591
80
    case Mips::CMP_SAF_D_MMR6:
3592
80
    case Mips::CMP_SAF_S_MMR6:
3593
80
    case Mips::CMP_SEQ_D_MMR6:
3594
80
    case Mips::CMP_SEQ_S_MMR6:
3595
80
    case Mips::CMP_SLE_D_MMR6:
3596
80
    case Mips::CMP_SLE_S_MMR6:
3597
80
    case Mips::CMP_SLT_D_MMR6:
3598
80
    case Mips::CMP_SLT_S_MMR6:
3599
80
    case Mips::CMP_SUEQ_D_MMR6:
3600
80
    case Mips::CMP_SUEQ_S_MMR6:
3601
80
    case Mips::CMP_SULE_D_MMR6:
3602
80
    case Mips::CMP_SULE_S_MMR6:
3603
80
    case Mips::CMP_SULT_D_MMR6:
3604
80
    case Mips::CMP_SULT_S_MMR6:
3605
80
    case Mips::CMP_SUN_D_MMR6:
3606
80
    case Mips::CMP_SUN_S_MMR6:
3607
80
    case Mips::CMP_UEQ_D_MMR6:
3608
80
    case Mips::CMP_UEQ_S_MMR6:
3609
80
    case Mips::CMP_ULE_D_MMR6:
3610
80
    case Mips::CMP_ULE_S_MMR6:
3611
80
    case Mips::CMP_ULT_D_MMR6:
3612
80
    case Mips::CMP_ULT_S_MMR6:
3613
80
    case Mips::CMP_UN_D_MMR6:
3614
80
    case Mips::CMP_UN_S_MMR6:
3615
80
    case Mips::FADD_D32_MM:
3616
80
    case Mips::FADD_D64_MM:
3617
80
    case Mips::FADD_S_MM:
3618
80
    case Mips::FDIV_D32_MM:
3619
80
    case Mips::FDIV_D64_MM:
3620
80
    case Mips::FDIV_S_MM:
3621
80
    case Mips::FMUL_D32_MM:
3622
80
    case Mips::FMUL_D64_MM:
3623
80
    case Mips::FMUL_S_MM:
3624
80
    case Mips::FSUB_D32_MM:
3625
80
    case Mips::FSUB_D64_MM:
3626
80
    case Mips::FSUB_S_MM:
3627
80
    case Mips::MAXA_D_MMR6:
3628
80
    case Mips::MAXA_S_MMR6:
3629
80
    case Mips::MAX_D_MMR6:
3630
80
    case Mips::MAX_S_MMR6:
3631
80
    case Mips::MINA_D_MMR6:
3632
80
    case Mips::MINA_S_MMR6:
3633
80
    case Mips::MIN_D_MMR6:
3634
80
    case Mips::MIN_S_MMR6:
3635
80
    case Mips::SELEQZ_D_MMR6:
3636
80
    case Mips::SELEQZ_S_MMR6:
3637
80
    case Mips::SELNEZ_D_MMR6:
3638
80
    case Mips::SELNEZ_S_MMR6: {
3639
80
      // op: ft
3640
80
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3641
80
      Value |= (op & UINT64_C(31)) << 21;
3642
80
      // op: fs
3643
80
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3644
80
      Value |= (op & UINT64_C(31)) << 16;
3645
80
      // op: fd
3646
80
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3647
80
      Value |= (op & UINT64_C(31)) << 11;
3648
80
      break;
3649
80
    }
3650
80
    case Mips::MADDF_D:
3651
12
    case Mips::MADDF_S:
3652
12
    case Mips::MSUBF_D:
3653
12
    case Mips::MSUBF_S:
3654
12
    case Mips::SEL_D:
3655
12
    case Mips::SEL_S: {
3656
12
      // op: ft
3657
12
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
3658
12
      Value |= (op & UINT64_C(31)) << 16;
3659
12
      // op: fs
3660
12
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3661
12
      Value |= (op & UINT64_C(31)) << 11;
3662
12
      // op: fd
3663
12
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3664
12
      Value |= (op & UINT64_C(31)) << 6;
3665
12
      break;
3666
12
    }
3667
12
    case Mips::MADDF_D_MMR6:
3668
6
    case Mips::MADDF_S_MMR6:
3669
6
    case Mips::MSUBF_D_MMR6:
3670
6
    case Mips::MSUBF_S_MMR6:
3671
6
    case Mips::SEL_D_MMR6:
3672
6
    case Mips::SEL_S_MMR6: {
3673
6
      // op: ft
3674
6
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
3675
6
      Value |= (op & UINT64_C(31)) << 21;
3676
6
      // op: fs
3677
6
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3678
6
      Value |= (op & UINT64_C(31)) << 16;
3679
6
      // op: fd
3680
6
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3681
6
      Value |= (op & UINT64_C(31)) << 11;
3682
6
      break;
3683
6
    }
3684
16
    case Mips::MADD_D32_MM:
3685
16
    case Mips::MADD_S_MM:
3686
16
    case Mips::MSUB_D32_MM:
3687
16
    case Mips::MSUB_S_MM:
3688
16
    case Mips::NMADD_D32_MM:
3689
16
    case Mips::NMADD_S_MM:
3690
16
    case Mips::NMSUB_D32_MM:
3691
16
    case Mips::NMSUB_S_MM: {
3692
16
      // op: ft
3693
16
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
3694
16
      Value |= (op & UINT64_C(31)) << 21;
3695
16
      // op: fs
3696
16
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3697
16
      Value |= (op & UINT64_C(31)) << 16;
3698
16
      // op: fd
3699
16
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3700
16
      Value |= (op & UINT64_C(31)) << 11;
3701
16
      // op: fr
3702
16
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3703
16
      Value |= (op & UINT64_C(31)) << 6;
3704
16
      break;
3705
16
    }
3706
44
    case Mips::ADDVI_B:
3707
44
    case Mips::ADDVI_D:
3708
44
    case Mips::ADDVI_H:
3709
44
    case Mips::ADDVI_W:
3710
44
    case Mips::CEQI_B:
3711
44
    case Mips::CEQI_D:
3712
44
    case Mips::CEQI_H:
3713
44
    case Mips::CEQI_W:
3714
44
    case Mips::CLEI_S_B:
3715
44
    case Mips::CLEI_S_D:
3716
44
    case Mips::CLEI_S_H:
3717
44
    case Mips::CLEI_S_W:
3718
44
    case Mips::CLEI_U_B:
3719
44
    case Mips::CLEI_U_D:
3720
44
    case Mips::CLEI_U_H:
3721
44
    case Mips::CLEI_U_W:
3722
44
    case Mips::CLTI_S_B:
3723
44
    case Mips::CLTI_S_D:
3724
44
    case Mips::CLTI_S_H:
3725
44
    case Mips::CLTI_S_W:
3726
44
    case Mips::CLTI_U_B:
3727
44
    case Mips::CLTI_U_D:
3728
44
    case Mips::CLTI_U_H:
3729
44
    case Mips::CLTI_U_W:
3730
44
    case Mips::MAXI_S_B:
3731
44
    case Mips::MAXI_S_D:
3732
44
    case Mips::MAXI_S_H:
3733
44
    case Mips::MAXI_S_W:
3734
44
    case Mips::MAXI_U_B:
3735
44
    case Mips::MAXI_U_D:
3736
44
    case Mips::MAXI_U_H:
3737
44
    case Mips::MAXI_U_W:
3738
44
    case Mips::MINI_S_B:
3739
44
    case Mips::MINI_S_D:
3740
44
    case Mips::MINI_S_H:
3741
44
    case Mips::MINI_S_W:
3742
44
    case Mips::MINI_U_B:
3743
44
    case Mips::MINI_U_D:
3744
44
    case Mips::MINI_U_H:
3745
44
    case Mips::MINI_U_W:
3746
44
    case Mips::SUBVI_B:
3747
44
    case Mips::SUBVI_D:
3748
44
    case Mips::SUBVI_H:
3749
44
    case Mips::SUBVI_W: {
3750
44
      // op: imm
3751
44
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3752
44
      Value |= (op & UINT64_C(31)) << 16;
3753
44
      // op: ws
3754
44
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3755
44
      Value |= (op & UINT64_C(31)) << 11;
3756
44
      // op: wd
3757
44
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3758
44
      Value |= (op & UINT64_C(31)) << 6;
3759
44
      break;
3760
44
    }
3761
44
    case Mips::ADDIUSP_MM: {
3762
22
      // op: imm
3763
22
      op = getSImm9AddiuspValue(MI, 0, Fixups, STI);
3764
22
      Value |= (op & UINT64_C(511)) << 1;
3765
22
      break;
3766
44
    }
3767
44
    case Mips::JRCADDIUSP_MMR6: {
3768
1
      // op: imm
3769
1
      op = getUImm5Lsl2Encoding(MI, 0, Fixups, STI);
3770
1
      Value |= (op & UINT64_C(31)) << 5;
3771
1
      break;
3772
44
    }
3773
44
    case Mips::JRADDIUSP: {
3774
3
      // op: imm
3775
3
      op = getUImm5Lsl2Encoding(MI, 0, Fixups, STI);
3776
3
      Value |= op & UINT64_C(31);
3777
3
      break;
3778
44
    }
3779
44
    case Mips::Bimm16: {
3780
0
      // op: imm11
3781
0
      op = getBranchTargetOpValue(MI, 0, Fixups, STI);
3782
0
      Value |= op & UINT64_C(2047);
3783
0
      break;
3784
44
    }
3785
44
    case Mips::AddiuRxRyOffMemX16: {
3786
0
      // op: imm15
3787
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3788
0
      Value |= (op & UINT64_C(2032)) << 16;
3789
0
      Value |= (op & UINT64_C(30720)) << 5;
3790
0
      Value |= op & UINT64_C(15);
3791
0
      // op: rx
3792
0
      op = getMemEncoding(MI, 1, Fixups, STI);
3793
0
      Value |= (op & UINT64_C(7)) << 8;
3794
0
      // op: ry
3795
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3796
0
      Value |= (op & UINT64_C(7)) << 5;
3797
0
      break;
3798
44
    }
3799
44
    case Mips::BimmX16: {
3800
0
      // op: imm16
3801
0
      op = getBranchTargetOpValue(MI, 0, Fixups, STI);
3802
0
      Value |= (op & UINT64_C(2016)) << 16;
3803
0
      Value |= (op & UINT64_C(63488)) << 5;
3804
0
      Value |= op & UINT64_C(31);
3805
0
      break;
3806
44
    }
3807
44
    case Mips::AddiuSpImmX16:
3808
0
    case Mips::BteqzX16:
3809
0
    case Mips::BtnezX16: {
3810
0
      // op: imm16
3811
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3812
0
      Value |= (op & UINT64_C(2016)) << 16;
3813
0
      Value |= (op & UINT64_C(63488)) << 5;
3814
0
      Value |= op & UINT64_C(31);
3815
0
      break;
3816
0
    }
3817
0
    case Mips::AddiuRxImmX16:
3818
0
    case Mips::AddiuRxPcImmX16:
3819
0
    case Mips::AddiuRxRxImmX16:
3820
0
    case Mips::BeqzRxImmX16:
3821
0
    case Mips::BnezRxImmX16:
3822
0
    case Mips::CmpiRxImmX16:
3823
0
    case Mips::LiRxImmAlignX16:
3824
0
    case Mips::LiRxImmX16:
3825
0
    case Mips::LwRxPcTcpX16:
3826
0
    case Mips::SltiRxImmX16:
3827
0
    case Mips::SltiuRxImmX16: {
3828
0
      // op: imm16
3829
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3830
0
      Value |= (op & UINT64_C(2016)) << 16;
3831
0
      Value |= (op & UINT64_C(63488)) << 5;
3832
0
      Value |= op & UINT64_C(31);
3833
0
      // op: rx
3834
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3835
0
      Value |= (op & UINT64_C(7)) << 8;
3836
0
      break;
3837
0
    }
3838
0
    case Mips::LbRxRyOffMemX16:
3839
0
    case Mips::LbuRxRyOffMemX16:
3840
0
    case Mips::LhRxRyOffMemX16:
3841
0
    case Mips::LhuRxRyOffMemX16:
3842
0
    case Mips::LwRxRyOffMemX16:
3843
0
    case Mips::LwRxSpImmX16:
3844
0
    case Mips::SbRxRyOffMemX16:
3845
0
    case Mips::ShRxRyOffMemX16:
3846
0
    case Mips::SwRxRyOffMemX16:
3847
0
    case Mips::SwRxSpImmX16: {
3848
0
      // op: imm16
3849
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3850
0
      Value |= (op & UINT64_C(2016)) << 16;
3851
0
      Value |= (op & UINT64_C(63488)) << 5;
3852
0
      Value |= op & UINT64_C(31);
3853
0
      // op: rx
3854
0
      op = getMemEncoding(MI, 1, Fixups, STI);
3855
0
      Value |= (op & UINT64_C(7)) << 8;
3856
0
      // op: ry
3857
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3858
0
      Value |= (op & UINT64_C(7)) << 5;
3859
0
      break;
3860
0
    }
3861
0
    case Mips::Jal16:
3862
0
    case Mips::JalB16: {
3863
0
      // op: imm26
3864
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3865
0
      Value |= (op & UINT64_C(2031616)) << 5;
3866
0
      Value |= (op & UINT64_C(65011712)) >> 5;
3867
0
      Value |= op & UINT64_C(65535);
3868
0
      break;
3869
0
    }
3870
0
    case Mips::AddiuSpImm16:
3871
0
    case Mips::Bteqz16:
3872
0
    case Mips::Btnez16: {
3873
0
      // op: imm8
3874
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3875
0
      Value |= op & UINT64_C(255);
3876
0
      break;
3877
0
    }
3878
3
    case Mips::PREFX_MM: {
3879
3
      // op: index
3880
3
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3881
3
      Value |= (op & UINT64_C(31)) << 21;
3882
3
      // op: base
3883
3
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3884
3
      Value |= (op & UINT64_C(31)) << 16;
3885
3
      // op: hint
3886
3
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3887
3
      Value |= (op & UINT64_C(31)) << 11;
3888
3
      break;
3889
0
    }
3890
3
    case Mips::LBUX_MM:
3891
3
    case Mips::LHX_MM:
3892
3
    case Mips::LWX_MM: {
3893
3
      // op: index
3894
3
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3895
3
      Value |= (op & UINT64_C(31)) << 21;
3896
3
      // op: base
3897
3
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3898
3
      Value |= (op & UINT64_C(31)) << 16;
3899
3
      // op: rd
3900
3
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3901
3
      Value |= (op & UINT64_C(31)) << 11;
3902
3
      break;
3903
3
    }
3904
3
    case Mips::COPY_S_D: {
3905
1
      // op: n
3906
1
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3907
1
      Value |= (op & UINT64_C(1)) << 16;
3908
1
      // op: ws
3909
1
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3910
1
      Value |= (op & UINT64_C(31)) << 11;
3911
1
      // op: rd
3912
1
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3913
1
      Value |= (op & UINT64_C(31)) << 6;
3914
1
      break;
3915
3
    }
3916
3
    case Mips::SPLATI_D: {
3917
1
      // op: n
3918
1
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3919
1
      Value |= (op & UINT64_C(1)) << 16;
3920
1
      // op: ws
3921
1
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3922
1
      Value |= (op & UINT64_C(31)) << 11;
3923
1
      // op: wd
3924
1
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3925
1
      Value |= (op & UINT64_C(31)) << 6;
3926
1
      break;
3927
3
    }
3928
3
    case Mips::INSVE_D: {
3929
1
      // op: n
3930
1
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3931
1
      Value |= (op & UINT64_C(1)) << 16;
3932
1
      // op: ws
3933
1
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
3934
1
      Value |= (op & UINT64_C(31)) << 11;
3935
1
      // op: wd
3936
1
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3937
1
      Value |= (op & UINT64_C(31)) << 6;
3938
1
      break;
3939
3
    }
3940
3
    case Mips::COPY_S_B:
3941
2
    case Mips::COPY_U_B: {
3942
2
      // op: n
3943
2
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3944
2
      Value |= (op & UINT64_C(15)) << 16;
3945
2
      // op: ws
3946
2
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3947
2
      Value |= (op & UINT64_C(31)) << 11;
3948
2
      // op: rd
3949
2
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3950
2
      Value |= (op & UINT64_C(31)) << 6;
3951
2
      break;
3952
2
    }
3953
2
    case Mips::SPLATI_B: {
3954
1
      // op: n
3955
1
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3956
1
      Value |= (op & UINT64_C(15)) << 16;
3957
1
      // op: ws
3958
1
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3959
1
      Value |= (op & UINT64_C(31)) << 11;
3960
1
      // op: wd
3961
1
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3962
1
      Value |= (op & UINT64_C(31)) << 6;
3963
1
      break;
3964
2
    }
3965
2
    case Mips::INSVE_B: {
3966
1
      // op: n
3967
1
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3968
1
      Value |= (op & UINT64_C(15)) << 16;
3969
1
      // op: ws
3970
1
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
3971
1
      Value |= (op & UINT64_C(31)) << 11;
3972
1
      // op: wd
3973
1
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3974
1
      Value |= (op & UINT64_C(31)) << 6;
3975
1
      break;
3976
2
    }
3977
2
    case Mips::COPY_S_W:
3978
1
    case Mips::COPY_U_W: {
3979
1
      // op: n
3980
1
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3981
1
      Value |= (op & UINT64_C(3)) << 16;
3982
1
      // op: ws
3983
1
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3984
1
      Value |= (op & UINT64_C(31)) << 11;
3985
1
      // op: rd
3986
1
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3987
1
      Value |= (op & UINT64_C(31)) << 6;
3988
1
      break;
3989
1
    }
3990
1
    case Mips::SPLATI_W: {
3991
1
      // op: n
3992
1
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3993
1
      Value |= (op & UINT64_C(3)) << 16;
3994
1
      // op: ws
3995
1
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3996
1
      Value |= (op & UINT64_C(31)) << 11;
3997
1
      // op: wd
3998
1
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3999
1
      Value |= (op & UINT64_C(31)) << 6;
4000
1
      break;
4001
1
    }
4002
1
    case Mips::INSVE_W: {
4003
1
      // op: n
4004
1
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4005
1
      Value |= (op & UINT64_C(3)) << 16;
4006
1
      // op: ws
4007
1
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
4008
1
      Value |= (op & UINT64_C(31)) << 11;
4009
1
      // op: wd
4010
1
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4011
1
      Value |= (op & UINT64_C(31)) << 6;
4012
1
      break;
4013
1
    }
4014
2
    case Mips::COPY_S_H:
4015
2
    case Mips::COPY_U_H: {
4016
2
      // op: n
4017
2
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4018
2
      Value |= (op & UINT64_C(7)) << 16;
4019
2
      // op: ws
4020
2
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4021
2
      Value |= (op & UINT64_C(31)) << 11;
4022
2
      // op: rd
4023
2
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4024
2
      Value |= (op & UINT64_C(31)) << 6;
4025
2
      break;
4026
2
    }
4027
2
    case Mips::SPLATI_H: {
4028
1
      // op: n
4029
1
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4030
1
      Value |= (op & UINT64_C(7)) << 16;
4031
1
      // op: ws
4032
1
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4033
1
      Value |= (op & UINT64_C(31)) << 11;
4034
1
      // op: wd
4035
1
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4036
1
      Value |= (op & UINT64_C(31)) << 6;
4037
1
      break;
4038
2
    }
4039
2
    case Mips::INSVE_H: {
4040
1
      // op: n
4041
1
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4042
1
      Value |= (op & UINT64_C(7)) << 16;
4043
1
      // op: ws
4044
1
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
4045
1
      Value |= (op & UINT64_C(31)) << 11;
4046
1
      // op: wd
4047
1
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4048
1
      Value |= (op & UINT64_C(31)) << 6;
4049
1
      break;
4050
2
    }
4051
2
    case Mips::INSERT_D: {
4052
1
      // op: n
4053
1
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
4054
1
      Value |= (op & UINT64_C(1)) << 16;
4055
1
      // op: rs
4056
1
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4057
1
      Value |= (op & UINT64_C(31)) << 11;
4058
1
      // op: wd
4059
1
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4060
1
      Value |= (op & UINT64_C(31)) << 6;
4061
1
      break;
4062
2
    }
4063
2
    case Mips::SLDI_D: {
4064
1
      // op: n
4065
1
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
4066
1
      Value |= (op & UINT64_C(1)) << 16;
4067
1
      // op: ws
4068
1
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4069
1
      Value |= (op & UINT64_C(31)) << 11;
4070
1
      // op: wd
4071
1
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4072
1
      Value |= (op & UINT64_C(31)) << 6;
4073
1
      break;
4074
2
    }
4075
2
    case Mips::INSERT_B: {
4076
1
      // op: n
4077
1
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
4078
1
      Value |= (op & UINT64_C(15)) << 16;
4079
1
      // op: rs
4080
1
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4081
1
      Value |= (op & UINT64_C(31)) << 11;
4082
1
      // op: wd
4083
1
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4084
1
      Value |= (op & UINT64_C(31)) << 6;
4085
1
      break;
4086
2
    }
4087
2
    case Mips::SLDI_B: {
4088
1
      // op: n
4089
1
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
4090
1
      Value |= (op & UINT64_C(15)) << 16;
4091
1
      // op: ws
4092
1
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4093
1
      Value |= (op & UINT64_C(31)) << 11;
4094
1
      // op: wd
4095
1
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4096
1
      Value |= (op & UINT64_C(31)) << 6;
4097
1
      break;
4098
2
    }
4099
2
    case Mips::INSERT_W: {
4100
1
      // op: n
4101
1
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
4102
1
      Value |= (op & UINT64_C(3)) << 16;
4103
1
      // op: rs
4104
1
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4105
1
      Value |= (op & UINT64_C(31)) << 11;
4106
1
      // op: wd
4107
1
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4108
1
      Value |= (op & UINT64_C(31)) << 6;
4109
1
      break;
4110
2
    }
4111
2
    case Mips::SLDI_W: {
4112
1
      // op: n
4113
1
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
4114
1
      Value |= (op & UINT64_C(3)) << 16;
4115
1
      // op: ws
4116
1
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4117
1
      Value |= (op & UINT64_C(31)) << 11;
4118
1
      // op: wd
4119
1
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4120
1
      Value |= (op & UINT64_C(31)) << 6;
4121
1
      break;
4122
2
    }
4123
2
    case Mips::INSERT_H: {
4124
1
      // op: n
4125
1
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
4126
1
      Value |= (op & UINT64_C(7)) << 16;
4127
1
      // op: rs
4128
1
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4129
1
      Value |= (op & UINT64_C(31)) << 11;
4130
1
      // op: wd
4131
1
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4132
1
      Value |= (op & UINT64_C(31)) << 6;
4133
1
      break;
4134
2
    }
4135
2
    case Mips::SLDI_H: {
4136
1
      // op: n
4137
1
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
4138
1
      Value |= (op & UINT64_C(7)) << 16;
4139
1
      // op: ws
4140
1
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4141
1
      Value |= (op & UINT64_C(31)) << 11;
4142
1
      // op: wd
4143
1
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4144
1
      Value |= (op & UINT64_C(31)) << 6;
4145
1
      break;
4146
2
    }
4147
27
    case Mips::BALC:
4148
27
    case Mips::BC: {
4149
27
      // op: offset
4150
27
      op = getBranchTarget26OpValue(MI, 0, Fixups, STI);
4151
27
      Value |= op & UINT64_C(67108863);
4152
27
      break;
4153
27
    }
4154
27
    case Mips::BALC_MMR6:
4155
13
    case Mips::BC_MMR6: {
4156
13
      // op: offset
4157
13
      op = getBranchTarget26OpValueMM(MI, 0, Fixups, STI);
4158
13
      Value |= op & UINT64_C(67108863);
4159
13
      break;
4160
13
    }
4161
13
    case Mips::BAL:
4162
4
    case Mips::BPOSGE32: {
4163
4
      // op: offset
4164
4
      op = getBranchTargetOpValue(MI, 0, Fixups, STI);
4165
4
      Value |= op & UINT64_C(65535);
4166
4
      break;
4167
4
    }
4168
20
    case Mips::BNZ_B:
4169
20
    case Mips::BNZ_D:
4170
20
    case Mips::BNZ_H:
4171
20
    case Mips::BNZ_V:
4172
20
    case Mips::BNZ_W:
4173
20
    case Mips::BZ_B:
4174
20
    case Mips::BZ_D:
4175
20
    case Mips::BZ_H:
4176
20
    case Mips::BZ_V:
4177
20
    case Mips::BZ_W: {
4178
20
      // op: offset
4179
20
      op = getBranchTargetOpValue(MI, 1, Fixups, STI);
4180
20
      Value |= op & UINT64_C(65535);
4181
20
      // op: wt
4182
20
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4183
20
      Value |= (op & UINT64_C(31)) << 16;
4184
20
      break;
4185
20
    }
4186
20
    case Mips::BPOSGE32C_MMR3: {
4187
1
      // op: offset
4188
1
      op = getBranchTargetOpValue1SImm16(MI, 0, Fixups, STI);
4189
1
      Value |= op & UINT64_C(65535);
4190
1
      break;
4191
20
    }
4192
20
    case Mips::BPOSGE32_MM: {
4193
1
      // op: offset
4194
1
      op = getBranchTargetOpValueMM(MI, 0, Fixups, STI);
4195
1
      Value |= op & UINT64_C(65535);
4196
1
      break;
4197
20
    }
4198
20
    case Mips::B16_MM:
4199
12
    case Mips::BC16_MMR6: {
4200
12
      // op: offset
4201
12
      op = getBranchTargetOpValueMMPC10(MI, 0, Fixups, STI);
4202
12
      Value |= op & UINT64_C(1023);
4203
12
      break;
4204
12
    }
4205
12
    case Mips::Move32R16: {
4206
2
      // op: r32
4207
2
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4208
2
      Value |= (op & UINT64_C(7)) << 5;
4209
2
      Value |= op & UINT64_C(24);
4210
2
      // op: rz
4211
2
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4212
2
      Value |= op & UINT64_C(7);
4213
2
      break;
4214
12
    }
4215
467
    case Mips::MFHI:
4216
467
    case Mips::MFHI64:
4217
467
    case Mips::MFLO:
4218
467
    case Mips::MFLO64: {
4219
467
      // op: rd
4220
467
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4221
467
      Value |= (op & UINT64_C(31)) << 11;
4222
467
      break;
4223
467
    }
4224
467
    case Mips::MFHI_DSP:
4225
4
    case Mips::MFLO_DSP: {
4226
4
      // op: rd
4227
4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4228
4
      Value |= (op & UINT64_C(31)) << 11;
4229
4
      // op: ac
4230
4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4231
4
      Value |= (op & UINT64_C(3)) << 21;
4232
4
      break;
4233
4
    }
4234
4
    case Mips::LWXS_MM: {
4235
3
      // op: rd
4236
3
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4237
3
      Value |= (op & UINT64_C(31)) << 11;
4238
3
      // op: base
4239
3
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4240
3
      Value |= (op & UINT64_C(31)) << 16;
4241
3
      // op: index
4242
3
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4243
3
      Value |= (op & UINT64_C(31)) << 21;
4244
3
      break;
4245
4
    }
4246
8
    case Mips::LBUX:
4247
8
    case Mips::LHX:
4248
8
    case Mips::LWX: {
4249
8
      // op: rd
4250
8
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4251
8
      Value |= (op & UINT64_C(31)) << 11;
4252
8
      // op: base
4253
8
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4254
8
      Value |= (op & UINT64_C(31)) << 21;
4255
8
      // op: index
4256
8
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4257
8
      Value |= (op & UINT64_C(31)) << 16;
4258
8
      break;
4259
8
    }
4260
8
    case Mips::REPL_PH:
4261
5
    case Mips::REPL_PH_MM:
4262
5
    case Mips::REPL_QB: {
4263
5
      // op: rd
4264
5
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4265
5
      Value |= (op & UINT64_C(31)) << 11;
4266
5
      // op: imm
4267
5
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4268
5
      Value |= (op & UINT64_C(1023)) << 16;
4269
5
      break;
4270
5
    }
4271
5
    case Mips::RDDSP: {
4272
2
      // op: rd
4273
2
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4274
2
      Value |= (op & UINT64_C(31)) << 11;
4275
2
      // op: mask
4276
2
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4277
2
      Value |= (op & UINT64_C(1023)) << 16;
4278
2
      break;
4279
5
    }
4280
78
    case Mips::ADDQH_PH_MMR2:
4281
78
    case Mips::ADDQH_R_PH_MMR2:
4282
78
    case Mips::ADDQH_R_W_MMR2:
4283
78
    case Mips::ADDQH_W_MMR2:
4284
78
    case Mips::ADDQ_PH_MM:
4285
78
    case Mips::ADDQ_S_PH_MM:
4286
78
    case Mips::ADDQ_S_W_MM:
4287
78
    case Mips::ADDSC_MM:
4288
78
    case Mips::ADDUH_QB_MMR2:
4289
78
    case Mips::ADDUH_R_QB_MMR2:
4290
78
    case Mips::ADDU_PH_MMR2:
4291
78
    case Mips::ADDU_QB_MM:
4292
78
    case Mips::ADDU_S_PH_MMR2:
4293
78
    case Mips::ADDU_S_QB_MM:
4294
78
    case Mips::ADDWC_MM:
4295
78
    case Mips::CMPGDU_EQ_QB_MMR2:
4296
78
    case Mips::CMPGDU_LE_QB_MMR2:
4297
78
    case Mips::CMPGDU_LT_QB_MMR2:
4298
78
    case Mips::MODSUB_MM:
4299
78
    case Mips::MULEQ_S_W_PHL_MM:
4300
78
    case Mips::MULEQ_S_W_PHR_MM:
4301
78
    case Mips::MULEU_S_PH_QBL_MM:
4302
78
    case Mips::MULEU_S_PH_QBR_MM:
4303
78
    case Mips::MULQ_RS_PH_MM:
4304
78
    case Mips::MULQ_RS_W_MMR2:
4305
78
    case Mips::MULQ_S_PH_MMR2:
4306
78
    case Mips::MULQ_S_W_MMR2:
4307
78
    case Mips::MUL_PH_MMR2:
4308
78
    case Mips::MUL_S_PH_MMR2:
4309
78
    case Mips::PACKRL_PH_MM:
4310
78
    case Mips::PICK_PH_MM:
4311
78
    case Mips::PICK_QB_MM:
4312
78
    case Mips::PRECRQU_S_QB_PH_MM:
4313
78
    case Mips::PRECRQ_PH_W_MM:
4314
78
    case Mips::PRECRQ_QB_PH_MM:
4315
78
    case Mips::PRECRQ_RS_PH_W_MM:
4316
78
    case Mips::PRECR_QB_PH_MMR2:
4317
78
    case Mips::SELEQZ_MMR6:
4318
78
    case Mips::SELNEZ_MMR6:
4319
78
    case Mips::SUBQH_PH_MMR2:
4320
78
    case Mips::SUBQH_R_PH_MMR2:
4321
78
    case Mips::SUBQH_R_W_MMR2:
4322
78
    case Mips::SUBQH_W_MMR2:
4323
78
    case Mips::SUBQ_PH_MM:
4324
78
    case Mips::SUBQ_S_PH_MM:
4325
78
    case Mips::SUBQ_S_W_MM:
4326
78
    case Mips::SUBUH_QB_MMR2:
4327
78
    case Mips::SUBUH_R_QB_MMR2:
4328
78
    case Mips::SUBU_PH_MMR2:
4329
78
    case Mips::SUBU_QB_MM:
4330
78
    case Mips::SUBU_S_PH_MMR2:
4331
78
    case Mips::SUBU_S_QB_MM: {
4332
78
      // op: rd
4333
78
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4334
78
      Value |= (op & UINT64_C(31)) << 11;
4335
78
      // op: rs
4336
78
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4337
78
      Value |= (op & UINT64_C(31)) << 16;
4338
78
      // op: rt
4339
78
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4340
78
      Value |= (op & UINT64_C(31)) << 21;
4341
78
      break;
4342
78
    }
4343
78
    case Mips::LSA_MMR6: {
4344
1
      // op: rd
4345
1
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4346
1
      Value |= (op & UINT64_C(31)) << 11;
4347
1
      // op: rs
4348
1
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4349
1
      Value |= (op & UINT64_C(31)) << 16;
4350
1
      // op: rt
4351
1
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4352
1
      Value |= (op & UINT64_C(31)) << 21;
4353
1
      // op: imm2
4354
1
      op = getUImmWithOffsetEncoding<2, 1>(MI, 3, Fixups, STI);
4355
1
      Value |= (op & UINT64_C(3)) << 9;
4356
1
      break;
4357
78
    }
4358
150
    case Mips::CLO_R6:
4359
150
    case Mips::CLZ_R6:
4360
150
    case Mips::DCLO_R6:
4361
150
    case Mips::DCLZ_R6:
4362
150
    case Mips::DPOP:
4363
150
    case Mips::JALR:
4364
150
    case Mips::JALR64:
4365
150
    case Mips::JALR_HB:
4366
150
    case Mips::JALR_HB64:
4367
150
    case Mips::POP:
4368
150
    case Mips::RADDU_W_QB: {
4369
150
      // op: rd
4370
150
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4371
150
      Value |= (op & UINT64_C(31)) << 11;
4372
150
      // op: rs
4373
150
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4374
150
      Value |= (op & UINT64_C(31)) << 21;
4375
150
      break;
4376
150
    }
4377
150
    case Mips::MOVF_I:
4378
26
    case Mips::MOVF_I64:
4379
26
    case Mips::MOVT_I:
4380
26
    case Mips::MOVT_I64: {
4381
26
      // op: rd
4382
26
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4383
26
      Value |= (op & UINT64_C(31)) << 11;
4384
26
      // op: rs
4385
26
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4386
26
      Value |= (op & UINT64_C(31)) << 21;
4387
26
      // op: fcc
4388
26
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4389
26
      Value |= (op & UINT64_C(7)) << 18;
4390
26
      break;
4391
26
    }
4392
1.95k
    case Mips::ADD:
4393
1.95k
    case Mips::ADDQH_PH:
4394
1.95k
    case Mips::ADDQH_R_PH:
4395
1.95k
    case Mips::ADDQH_R_W:
4396
1.95k
    case Mips::ADDQH_W:
4397
1.95k
    case Mips::ADDQ_PH:
4398
1.95k
    case Mips::ADDQ_S_PH:
4399
1.95k
    case Mips::ADDQ_S_W:
4400
1.95k
    case Mips::ADDSC:
4401
1.95k
    case Mips::ADDUH_QB:
4402
1.95k
    case Mips::ADDUH_R_QB:
4403
1.95k
    case Mips::ADDU_PH:
4404
1.95k
    case Mips::ADDU_QB:
4405
1.95k
    case Mips::ADDU_S_PH:
4406
1.95k
    case Mips::ADDU_S_QB:
4407
1.95k
    case Mips::ADDWC:
4408
1.95k
    case Mips::ADDu:
4409
1.95k
    case Mips::AND:
4410
1.95k
    case Mips::AND64:
4411
1.95k
    case Mips::BADDu:
4412
1.95k
    case Mips::DADD:
4413
1.95k
    case Mips::DADDu:
4414
1.95k
    case Mips::DDIV:
4415
1.95k
    case Mips::DDIVU:
4416
1.95k
    case Mips::DIV:
4417
1.95k
    case Mips::DIVU:
4418
1.95k
    case Mips::DMOD:
4419
1.95k
    case Mips::DMODU:
4420
1.95k
    case Mips::DMUH:
4421
1.95k
    case Mips::DMUHU:
4422
1.95k
    case Mips::DMUL:
4423
1.95k
    case Mips::DMULU:
4424
1.95k
    case Mips::DMUL_R6:
4425
1.95k
    case Mips::DSUB:
4426
1.95k
    case Mips::DSUBu:
4427
1.95k
    case Mips::MOD:
4428
1.95k
    case Mips::MODSUB:
4429
1.95k
    case Mips::MODU:
4430
1.95k
    case Mips::MOVN_I64_I:
4431
1.95k
    case Mips::MOVN_I64_I64:
4432
1.95k
    case Mips::MOVN_I_I:
4433
1.95k
    case Mips::MOVN_I_I64:
4434
1.95k
    case Mips::MOVZ_I64_I:
4435
1.95k
    case Mips::MOVZ_I64_I64:
4436
1.95k
    case Mips::MOVZ_I_I:
4437
1.95k
    case Mips::MOVZ_I_I64:
4438
1.95k
    case Mips::MUH:
4439
1.95k
    case Mips::MUHU:
4440
1.95k
    case Mips::MUL:
4441
1.95k
    case Mips::MULEQ_S_W_PHL:
4442
1.95k
    case Mips::MULEQ_S_W_PHR:
4443
1.95k
    case Mips::MULEU_S_PH_QBL:
4444
1.95k
    case Mips::MULEU_S_PH_QBR:
4445
1.95k
    case Mips::MULQ_RS_PH:
4446
1.95k
    case Mips::MULQ_RS_W:
4447
1.95k
    case Mips::MULQ_S_PH:
4448
1.95k
    case Mips::MULQ_S_W:
4449
1.95k
    case Mips::MULU:
4450
1.95k
    case Mips::MUL_PH:
4451
1.95k
    case Mips::MUL_R6:
4452
1.95k
    case Mips::MUL_S_PH:
4453
1.95k
    case Mips::NOR:
4454
1.95k
    case Mips::NOR64:
4455
1.95k
    case Mips::OR:
4456
1.95k
    case Mips::OR64:
4457
1.95k
    case Mips::SELEQZ:
4458
1.95k
    case Mips::SELEQZ64:
4459
1.95k
    case Mips::SELNEZ:
4460
1.95k
    case Mips::SELNEZ64:
4461
1.95k
    case Mips::SEQ:
4462
1.95k
    case Mips::SLT:
4463
1.95k
    case Mips::SLT64:
4464
1.95k
    case Mips::SLTu:
4465
1.95k
    case Mips::SLTu64:
4466
1.95k
    case Mips::SNE:
4467
1.95k
    case Mips::SUB:
4468
1.95k
    case Mips::SUBQH_PH:
4469
1.95k
    case Mips::SUBQH_R_PH:
4470
1.95k
    case Mips::SUBQH_R_W:
4471
1.95k
    case Mips::SUBQH_W:
4472
1.95k
    case Mips::SUBQ_PH:
4473
1.95k
    case Mips::SUBQ_S_PH:
4474
1.95k
    case Mips::SUBQ_S_W:
4475
1.95k
    case Mips::SUBUH_QB:
4476
1.95k
    case Mips::SUBUH_R_QB:
4477
1.95k
    case Mips::SUBU_PH:
4478
1.95k
    case Mips::SUBU_QB:
4479
1.95k
    case Mips::SUBU_S_PH:
4480
1.95k
    case Mips::SUBU_S_QB:
4481
1.95k
    case Mips::SUBu:
4482
1.95k
    case Mips::V3MULU:
4483
1.95k
    case Mips::VMM0:
4484
1.95k
    case Mips::VMULU:
4485
1.95k
    case Mips::XOR:
4486
1.95k
    case Mips::XOR64: {
4487
1.95k
      // op: rd
4488
1.95k
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4489
1.95k
      Value |= (op & UINT64_C(31)) << 11;
4490
1.95k
      // op: rs
4491
1.95k
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4492
1.95k
      Value |= (op & UINT64_C(31)) << 21;
4493
1.95k
      // op: rt
4494
1.95k
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4495
1.95k
      Value |= (op & UINT64_C(31)) << 16;
4496
1.95k
      break;
4497
1.95k
    }
4498
1.95k
    case Mips::ALIGN: {
4499
3
      // op: rd
4500
3
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4501
3
      Value |= (op & UINT64_C(31)) << 11;
4502
3
      // op: rs
4503
3
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4504
3
      Value |= (op & UINT64_C(31)) << 21;
4505
3
      // op: rt
4506
3
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4507
3
      Value |= (op & UINT64_C(31)) << 16;
4508
3
      // op: bp
4509
3
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
4510
3
      Value |= (op & UINT64_C(3)) << 6;
4511
3
      break;
4512
1.95k
    }
4513
1.95k
    case Mips::ALIGN_MMR6: {
4514
1
      // op: rd
4515
1
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4516
1
      Value |= (op & UINT64_C(31)) << 11;
4517
1
      // op: rs
4518
1
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4519
1
      Value |= (op & UINT64_C(31)) << 21;
4520
1
      // op: rt
4521
1
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4522
1
      Value |= (op & UINT64_C(31)) << 16;
4523
1
      // op: bp
4524
1
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
4525
1
      Value |= (op & UINT64_C(3)) << 9;
4526
1
      break;
4527
1.95k
    }
4528
1.95k
    case Mips::DALIGN: {
4529
1
      // op: rd
4530
1
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4531
1
      Value |= (op & UINT64_C(31)) << 11;
4532
1
      // op: rs
4533
1
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4534
1
      Value |= (op & UINT64_C(31)) << 21;
4535
1
      // op: rt
4536
1
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4537
1
      Value |= (op & UINT64_C(31)) << 16;
4538
1
      // op: bp
4539
1
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
4540
1
      Value |= (op & UINT64_C(7)) << 6;
4541
1
      break;
4542
1.95k
    }
4543
1.95k
    case Mips::DLSA_R6:
4544
3
    case Mips::LSA_R6: {
4545
3
      // op: rd
4546
3
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4547
3
      Value |= (op & UINT64_C(31)) << 11;
4548
3
      // op: rs
4549
3
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4550
3
      Value |= (op & UINT64_C(31)) << 21;
4551
3
      // op: rt
4552
3
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4553
3
      Value |= (op & UINT64_C(31)) << 16;
4554
3
      // op: imm2
4555
3
      op = getUImmWithOffsetEncoding<2, 1>(MI, 3, Fixups, STI);
4556
3
      Value |= (op & UINT64_C(3)) << 6;
4557
3
      break;
4558
3
    }
4559
19
    case Mips::SHLLV_PH_MM:
4560
19
    case Mips::SHLLV_QB_MM:
4561
19
    case Mips::SHLLV_S_PH_MM:
4562
19
    case Mips::SHLLV_S_W_MM:
4563
19
    case Mips::SHRAV_PH_MM:
4564
19
    case Mips::SHRAV_QB_MMR2:
4565
19
    case Mips::SHRAV_R_PH_MM:
4566
19
    case Mips::SHRAV_R_QB_MMR2:
4567
19
    case Mips::SHRAV_R_W_MM:
4568
19
    case Mips::SHRLV_PH_MMR2:
4569
19
    case Mips::SHRLV_QB_MM: {
4570
19
      // op: rd
4571
19
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4572
19
      Value |= (op & UINT64_C(31)) << 11;
4573
19
      // op: rs
4574
19
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4575
19
      Value |= (op & UINT64_C(31)) << 16;
4576
19
      // op: rt
4577
19
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4578
19
      Value |= (op & UINT64_C(31)) << 21;
4579
19
      break;
4580
19
    }
4581
82
    case Mips::ABSQ_S_PH:
4582
82
    case Mips::ABSQ_S_QB:
4583
82
    case Mips::ABSQ_S_W:
4584
82
    case Mips::BITREV:
4585
82
    case Mips::BITSWAP:
4586
82
    case Mips::DBITSWAP:
4587
82
    case Mips::DSBH:
4588
82
    case Mips::DSHD:
4589
82
    case Mips::DSLL64_32:
4590
82
    case Mips::PRECEQU_PH_QBL:
4591
82
    case Mips::PRECEQU_PH_QBLA:
4592
82
    case Mips::PRECEQU_PH_QBR:
4593
82
    case Mips::PRECEQU_PH_QBRA:
4594
82
    case Mips::PRECEQ_W_PHL:
4595
82
    case Mips::PRECEQ_W_PHR:
4596
82
    case Mips::PRECEU_PH_QBL:
4597
82
    case Mips::PRECEU_PH_QBLA:
4598
82
    case Mips::PRECEU_PH_QBR:
4599
82
    case Mips::PRECEU_PH_QBRA:
4600
82
    case Mips::REPLV_PH:
4601
82
    case Mips::REPLV_QB:
4602
82
    case Mips::SEB:
4603
82
    case Mips::SEB64:
4604
82
    case Mips::SEH:
4605
82
    case Mips::SEH64:
4606
82
    case Mips::SLL64_32:
4607
82
    case Mips::SLL64_64:
4608
82
    case Mips::WSBH: {
4609
82
      // op: rd
4610
82
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4611
82
      Value |= (op & UINT64_C(31)) << 11;
4612
82
      // op: rt
4613
82
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4614
82
      Value |= (op & UINT64_C(31)) << 16;
4615
82
      break;
4616
82
    }
4617
306
    case Mips::DROTRV:
4618
306
    case Mips::DSLLV:
4619
306
    case Mips::DSRAV:
4620
306
    case Mips::DSRLV:
4621
306
    case Mips::ROTRV:
4622
306
    case Mips::SLLV:
4623
306
    case Mips::SRAV:
4624
306
    case Mips::SRLV: {
4625
306
      // op: rd
4626
306
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4627
306
      Value |= (op & UINT64_C(31)) << 11;
4628
306
      // op: rt
4629
306
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4630
306
      Value |= (op & UINT64_C(31)) << 16;
4631
306
      // op: rs
4632
306
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4633
306
      Value |= (op & UINT64_C(31)) << 21;
4634
306
      break;
4635
306
    }
4636
306
    case Mips::SHLLV_PH:
4637
38
    case Mips::SHLLV_QB:
4638
38
    case Mips::SHLLV_S_PH:
4639
38
    case Mips::SHLLV_S_W:
4640
38
    case Mips::SHLL_PH:
4641
38
    case Mips::SHLL_QB:
4642
38
    case Mips::SHLL_S_PH:
4643
38
    case Mips::SHLL_S_W:
4644
38
    case Mips::SHRAV_PH:
4645
38
    case Mips::SHRAV_QB:
4646
38
    case Mips::SHRAV_R_PH:
4647
38
    case Mips::SHRAV_R_QB:
4648
38
    case Mips::SHRAV_R_W:
4649
38
    case Mips::SHRA_PH:
4650
38
    case Mips::SHRA_QB:
4651
38
    case Mips::SHRA_R_PH:
4652
38
    case Mips::SHRA_R_QB:
4653
38
    case Mips::SHRA_R_W:
4654
38
    case Mips::SHRLV_PH:
4655
38
    case Mips::SHRLV_QB:
4656
38
    case Mips::SHRL_PH:
4657
38
    case Mips::SHRL_QB: {
4658
38
      // op: rd
4659
38
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4660
38
      Value |= (op & UINT64_C(31)) << 11;
4661
38
      // op: rt
4662
38
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4663
38
      Value |= (op & UINT64_C(31)) << 16;
4664
38
      // op: rs_sa
4665
38
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4666
38
      Value |= (op & UINT64_C(31)) << 21;
4667
38
      break;
4668
38
    }
4669
13.4k
    case Mips::DROTR:
4670
13.4k
    case Mips::DROTR32:
4671
13.4k
    case Mips::DSLL:
4672
13.4k
    case Mips::DSLL32:
4673
13.4k
    case Mips::DSRA:
4674
13.4k
    case Mips::DSRA32:
4675
13.4k
    case Mips::DSRL:
4676
13.4k
    case Mips::DSRL32:
4677
13.4k
    case Mips::ROTR:
4678
13.4k
    case Mips::SLL:
4679
13.4k
    case Mips::SRA:
4680
13.4k
    case Mips::SRL: {
4681
13.4k
      // op: rd
4682
13.4k
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4683
13.4k
      Value |= (op & UINT64_C(31)) << 11;
4684
13.4k
      // op: rt
4685
13.4k
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4686
13.4k
      Value |= (op & UINT64_C(31)) << 16;
4687
13.4k
      // op: shamt
4688
13.4k
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4689
13.4k
      Value |= (op & UINT64_C(31)) << 6;
4690
13.4k
      break;
4691
13.4k
    }
4692
13.4k
    case Mips::ROTRV_MM:
4693
44
    case Mips::SLLV_MM:
4694
44
    case Mips::SRAV_MM:
4695
44
    case Mips::SRLV_MM: {
4696
44
      // op: rd
4697
44
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4698
44
      Value |= (op & UINT64_C(31)) << 11;
4699
44
      // op: rt
4700
44
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4701
44
      Value |= (op & UINT64_C(31)) << 21;
4702
44
      // op: rs
4703
44
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4704
44
      Value |= (op & UINT64_C(31)) << 16;
4705
44
      break;
4706
44
    }
4707
44
    case Mips::ADDU_MMR6:
4708
22
    case Mips::ADD_MMR6:
4709
22
    case Mips::AND_MMR6:
4710
22
    case Mips::DIVU_MMR6:
4711
22
    case Mips::DIV_MMR6:
4712
22
    case Mips::MODU_MMR6:
4713
22
    case Mips::MOD_MMR6:
4714
22
    case Mips::MUHU_MMR6:
4715
22
    case Mips::MUH_MMR6:
4716
22
    case Mips::MULU_MMR6:
4717
22
    case Mips::MUL_MMR6:
4718
22
    case Mips::NOR_MMR6:
4719
22
    case Mips::OR_MMR6:
4720
22
    case Mips::SUBU_MMR6:
4721
22
    case Mips::SUB_MMR6:
4722
22
    case Mips::XOR_MMR6: {
4723
22
      // op: rd
4724
22
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4725
22
      Value |= (op & UINT64_C(31)) << 11;
4726
22
      // op: rt
4727
22
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4728
22
      Value |= (op & UINT64_C(31)) << 21;
4729
22
      // op: rs
4730
22
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4731
22
      Value |= (op & UINT64_C(31)) << 16;
4732
22
      break;
4733
22
    }
4734
22
    case Mips::MFHI_MM:
4735
2
    case Mips::MFLO_MM: {
4736
2
      // op: rd
4737
2
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4738
2
      Value |= (op & UINT64_C(31)) << 16;
4739
2
      break;
4740
2
    }
4741
2
    case Mips::BITSWAP_MMR6: {
4742
1
      // op: rd
4743
1
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4744
1
      Value |= (op & UINT64_C(31)) << 16;
4745
1
      // op: rt
4746
1
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4747
1
      Value |= (op & UINT64_C(31)) << 21;
4748
1
      break;
4749
2
    }
4750
29
    case Mips::CLO:
4751
29
    case Mips::CLZ:
4752
29
    case Mips::DCLO:
4753
29
    case Mips::DCLZ: {
4754
29
      // op: rd
4755
29
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4756
29
      Value |= (op & UINT64_C(31)) << 16;
4757
29
      Value |= (op & UINT64_C(31)) << 11;
4758
29
      // op: rs
4759
29
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4760
29
      Value |= (op & UINT64_C(31)) << 21;
4761
29
      break;
4762
29
    }
4763
29
    case Mips::CLO_MM:
4764
2
    case Mips::CLZ_MM: {
4765
2
      // op: rd
4766
2
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4767
2
      Value |= (op & UINT64_C(31)) << 21;
4768
2
      // op: rs
4769
2
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4770
2
      Value |= (op & UINT64_C(31)) << 16;
4771
2
      break;
4772
2
    }
4773
6
    case Mips::MOVF_I_MM:
4774
6
    case Mips::MOVT_I_MM: {
4775
6
      // op: rd
4776
6
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4777
6
      Value |= (op & UINT64_C(31)) << 21;
4778
6
      // op: rs
4779
6
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4780
6
      Value |= (op & UINT64_C(31)) << 16;
4781
6
      // op: fcc
4782
6
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4783
6
      Value |= (op & UINT64_C(7)) << 13;
4784
6
      break;
4785
6
    }
4786
9
    case Mips::SEB_MM:
4787
9
    case Mips::SEH_MM:
4788
9
    case Mips::WSBH_MM: {
4789
9
      // op: rd
4790
9
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4791
9
      Value |= (op & UINT64_C(31)) << 21;
4792
9
      // op: rt
4793
9
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4794
9
      Value |= (op & UINT64_C(31)) << 16;
4795
9
      break;
4796
9
    }
4797
209
    case Mips::ROTR_MM:
4798
209
    case Mips::SLL_MM:
4799
209
    case Mips::SLL_MMR6:
4800
209
    case Mips::SRA_MM:
4801
209
    case Mips::SRL_MM: {
4802
209
      // op: rd
4803
209
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4804
209
      Value |= (op & UINT64_C(31)) << 21;
4805
209
      // op: rt
4806
209
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4807
209
      Value |= (op & UINT64_C(31)) << 16;
4808
209
      // op: shamt
4809
209
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4810
209
      Value |= (op & UINT64_C(31)) << 11;
4811
209
      break;
4812
209
    }
4813
209
    case Mips::CFCMSA: {
4814
16
      // op: rd
4815
16
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4816
16
      Value |= (op & UINT64_C(31)) << 6;
4817
16
      // op: cs
4818
16
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4819
16
      Value |= (op & UINT64_C(31)) << 11;
4820
16
      break;
4821
209
    }
4822
209
    case Mips::LI16_MM:
4823
9
    case Mips::LI16_MMR6: {
4824
9
      // op: rd
4825
9
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4826
9
      Value |= (op & UINT64_C(7)) << 7;
4827
9
      // op: imm
4828
9
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4829
9
      Value |= op & UINT64_C(127);
4830
9
      break;
4831
9
    }
4832
9
    case Mips::ADDIUR1SP_MM: {
4833
4
      // op: rd
4834
4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4835
4
      Value |= (op & UINT64_C(7)) << 7;
4836
4
      // op: imm
4837
4
      op = getUImm6Lsl2Encoding(MI, 1, Fixups, STI);
4838
4
      Value |= (op & UINT64_C(63)) << 1;
4839
4
      break;
4840
9
    }
4841
9
    case Mips::ADDIUR2_MM: {
4842
8
      // op: rd
4843
8
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4844
8
      Value |= (op & UINT64_C(7)) << 7;
4845
8
      // op: rs
4846
8
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4847
8
      Value |= (op & UINT64_C(7)) << 4;
4848
8
      // op: imm
4849
8
      op = getSImm3Lsa2Value(MI, 2, Fixups, STI);
4850
8
      Value |= (op & UINT64_C(7)) << 1;
4851
8
      break;
4852
9
    }
4853
9
    case Mips::ANDI16_MM:
4854
4
    case Mips::ANDI16_MMR6: {
4855
4
      // op: rd
4856
4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4857
4
      Value |= (op & UINT64_C(7)) << 7;
4858
4
      // op: rs
4859
4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4860
4
      Value |= (op & UINT64_C(7)) << 4;
4861
4
      // op: imm
4862
4
      op = getUImm4AndValue(MI, 2, Fixups, STI);
4863
4
      Value |= op & UINT64_C(15);
4864
4
      break;
4865
4
    }
4866
8
    case Mips::SLL16_MM:
4867
8
    case Mips::SLL16_MMR6:
4868
8
    case Mips::SRL16_MM:
4869
8
    case Mips::SRL16_MMR6: {
4870
8
      // op: rd
4871
8
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4872
8
      Value |= (op & UINT64_C(7)) << 7;
4873
8
      // op: rt
4874
8
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4875
8
      Value |= (op & UINT64_C(7)) << 4;
4876
8
      // op: shamt
4877
8
      op = getUImm3Mod8Encoding(MI, 2, Fixups, STI);
4878
8
      Value |= (op & UINT64_C(7)) << 1;
4879
8
      break;
4880
8
    }
4881
8
    case Mips::ADDU16_MM:
4882
7
    case Mips::SUBU16_MM: {
4883
7
      // op: rd
4884
7
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4885
7
      Value |= (op & UINT64_C(7)) << 7;
4886
7
      // op: rt
4887
7
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4888
7
      Value |= (op & UINT64_C(7)) << 4;
4889
7
      // op: rs
4890
7
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4891
7
      Value |= (op & UINT64_C(7)) << 1;
4892
7
      break;
4893
7
    }
4894
7
    case Mips::MFHI16_MM:
4895
6
    case Mips::MFLO16_MM: {
4896
6
      // op: rd
4897
6
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4898
6
      Value |= op & UINT64_C(31);
4899
6
      break;
4900
6
    }
4901
6
    case Mips::ADDIUS5_MM: {
4902
4
      // op: rd
4903
4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4904
4
      Value |= (op & UINT64_C(31)) << 5;
4905
4
      // op: imm
4906
4
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4907
4
      Value |= (op & UINT64_C(15)) << 1;
4908
4
      break;
4909
6
    }
4910
14
    case Mips::DVP_MMR6:
4911
14
    case Mips::EVP_MMR6:
4912
14
    case Mips::JR_MM:
4913
14
    case Mips::MTHI_MM:
4914
14
    case Mips::MTLO_MM: {
4915
14
      // op: rs
4916
14
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4917
14
      Value |= (op & UINT64_C(31)) << 16;
4918
14
      break;
4919
14
    }
4920
14
    case Mips::MFHI_DSP_MM:
4921
2
    case Mips::MFLO_DSP_MM: {
4922
2
      // op: rs
4923
2
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4924
2
      Value |= (op & UINT64_C(31)) << 16;
4925
2
      // op: ac
4926
2
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4927
2
      Value |= (op & UINT64_C(3)) << 14;
4928
2
      break;
4929
2
    }
4930
18
    case Mips::TEQI_MM:
4931
18
    case Mips::TGEIU_MM:
4932
18
    case Mips::TGEI_MM:
4933
18
    case Mips::TLTIU_MM:
4934
18
    case Mips::TLTI_MM:
4935
18
    case Mips::TNEI_MM: {
4936
18
      // op: rs
4937
18
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4938
18
      Value |= (op & UINT64_C(31)) << 16;
4939
18
      // op: imm16
4940
18
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4941
18
      Value |= op & UINT64_C(65535);
4942
18
      break;
4943
18
    }
4944
44
    case Mips::BEQZC_MM:
4945
44
    case Mips::BGEZALS_MM:
4946
44
    case Mips::BGEZAL_MM:
4947
44
    case Mips::BGEZ_MM:
4948
44
    case Mips::BGTZ_MM:
4949
44
    case Mips::BLEZ_MM:
4950
44
    case Mips::BLTZALS_MM:
4951
44
    case Mips::BLTZAL_MM:
4952
44
    case Mips::BLTZ_MM:
4953
44
    case Mips::BNEZC_MM: {
4954
44
      // op: rs
4955
44
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4956
44
      Value |= (op & UINT64_C(31)) << 16;
4957
44
      // op: offset
4958
44
      op = getBranchTargetOpValueMM(MI, 1, Fixups, STI);
4959
44
      Value |= op & UINT64_C(65535);
4960
44
      break;
4961
44
    }
4962
44
    case Mips::MADDU_MM:
4963
24
    case Mips::MADD_MM:
4964
24
    case Mips::MSUBU_MM:
4965
24
    case Mips::MSUB_MM:
4966
24
    case Mips::MULT_MM:
4967
24
    case Mips::MULTu_MM:
4968
24
    case Mips::SDIV_MM:
4969
24
    case Mips::UDIV_MM: {
4970
24
      // op: rs
4971
24
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4972
24
      Value |= (op & UINT64_C(31)) << 16;
4973
24
      // op: rt
4974
24
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4975
24
      Value |= (op & UINT64_C(31)) << 21;
4976
24
      break;
4977
24
    }
4978
30
    case Mips::TEQ_MM:
4979
30
    case Mips::TGEU_MM:
4980
30
    case Mips::TGE_MM:
4981
30
    case Mips::TLTU_MM:
4982
30
    case Mips::TLT_MM:
4983
30
    case Mips::TNE_MM: {
4984
30
      // op: rs
4985
30
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4986
30
      Value |= (op & UINT64_C(31)) << 16;
4987
30
      // op: rt
4988
30
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4989
30
      Value |= (op & UINT64_C(31)) << 21;
4990
30
      // op: code_
4991
30
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4992
30
      Value |= (op & UINT64_C(15)) << 12;
4993
30
      break;
4994
30
    }
4995
30
    case Mips::BEQ_MM:
4996
28
    case Mips::BNE_MM: {
4997
28
      // op: rs
4998
28
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4999
28
      Value |= (op & UINT64_C(31)) << 16;
5000
28
      // op: rt
5001
28
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5002
28
      Value |= (op & UINT64_C(31)) << 21;
5003
28
      // op: offset
5004
28
      op = getBranchTargetOpValueMM(MI, 2, Fixups, STI);
5005
28
      Value |= op & UINT64_C(65535);
5006
28
      break;
5007
28
    }
5008
28
    case Mips::GINVI_MMR6: {
5009
1
      // op: rs
5010
1
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5011
1
      Value |= (op & UINT64_C(31)) << 16;
5012
1
      // op: type
5013
1
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5014
1
      Value |= (op & UINT64_C(3)) << 9;
5015
1
      break;
5016
28
    }
5017
28
    case Mips::GINVT_MMR6: {
5018
1
      // op: rs
5019
1
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5020
1
      Value |= (op & UINT64_C(31)) << 16;
5021
1
      // op: type
5022
1
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5023
1
      Value |= (op & UINT64_C(3)) << 9;
5024
1
      break;
5025
28
    }
5026
180
    case Mips::JR:
5027
180
    case Mips::JR64:
5028
180
    case Mips::JR_HB:
5029
180
    case Mips::JR_HB64:
5030
180
    case Mips::JR_HB64_R6:
5031
180
    case Mips::JR_HB_R6:
5032
180
    case Mips::MTHI:
5033
180
    case Mips::MTHI64:
5034
180
    case Mips::MTLO:
5035
180
    case Mips::MTLO64:
5036
180
    case Mips::MTM0:
5037
180
    case Mips::MTM1:
5038
180
    case Mips::MTM2:
5039
180
    case Mips::MTP0:
5040
180
    case Mips::MTP1:
5041
180
    case Mips::MTP2: {
5042
180
      // op: rs
5043
180
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5044
180
      Value |= (op & UINT64_C(31)) << 21;
5045
180
      break;
5046
180
    }
5047
180
    case Mips::ALUIPC:
5048
15
    case Mips::AUIPC: {
5049
15
      // op: rs
5050
15
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5051
15
      Value |= (op & UINT64_C(31)) << 21;
5052
15
      // op: imm
5053
15
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5054
15
      Value |= op & UINT64_C(65535);
5055
15
      break;
5056
15
    }
5057
15
    case Mips::DAHI:
5058
2
    case Mips::DATI: {
5059
2
      // op: rs
5060
2
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5061
2
      Value |= (op & UINT64_C(31)) << 21;
5062
2
      // op: imm
5063
2
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5064
2
      Value |= op & UINT64_C(65535);
5065
2
      break;
5066
2
    }
5067
9
    case Mips::LDPC: {
5068
9
      // op: rs
5069
9
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5070
9
      Value |= (op & UINT64_C(31)) << 21;
5071
9
      // op: imm
5072
9
      op = getSimm18Lsl3Encoding(MI, 1, Fixups, STI);
5073
9
      Value |= op & UINT64_C(262143);
5074
9
      break;
5075
2
    }
5076
46
    case Mips::ADDIUPC:
5077
46
    case Mips::LWPC:
5078
46
    case Mips::LWUPC: {
5079
46
      // op: rs
5080
46
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5081
46
      Value |= (op & UINT64_C(31)) << 21;
5082
46
      // op: imm
5083
46
      op = getSimm19Lsl2Encoding(MI, 1, Fixups, STI);
5084
46
      Value |= op & UINT64_C(524287);
5085
46
      break;
5086
46
    }
5087
84
    case Mips::TEQI:
5088
84
    case Mips::TGEI:
5089
84
    case Mips::TGEIU:
5090
84
    case Mips::TLTI:
5091
84
    case Mips::TNEI:
5092
84
    case Mips::TTLTIU: {
5093
84
      // op: rs
5094
84
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5095
84
      Value |= (op & UINT64_C(31)) << 21;
5096
84
      // op: imm16
5097
84
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5098
84
      Value |= op & UINT64_C(65535);
5099
84
      break;
5100
84
    }
5101
84
    case Mips::WRDSP: {
5102
8
      // op: rs
5103
8
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5104
8
      Value |= (op & UINT64_C(31)) << 21;
5105
8
      // op: mask
5106
8
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5107
8
      Value |= (op & UINT64_C(1023)) << 11;
5108
8
      break;
5109
84
    }
5110
84
    case Mips::BEQZC:
5111
26
    case Mips::BEQZC64:
5112
26
    case Mips::BNEZC:
5113
26
    case Mips::BNEZC64: {
5114
26
      // op: rs
5115
26
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5116
26
      Value |= (op & UINT64_C(31)) << 21;
5117
26
      // op: offset
5118
26
      op = getBranchTarget21OpValue(MI, 1, Fixups, STI);
5119
26
      Value |= op & UINT64_C(2097151);
5120
26
      break;
5121
26
    }
5122
26
    case Mips::BEQZC_MMR6:
5123
8
    case Mips::BNEZC_MMR6: {
5124
8
      // op: rs
5125
8
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5126
8
      Value |= (op & UINT64_C(31)) << 21;
5127
8
      // op: offset
5128
8
      op = getBranchTarget21OpValueMM(MI, 1, Fixups, STI);
5129
8
      Value |= op & UINT64_C(2097151);
5130
8
      break;
5131
8
    }
5132
168
    case Mips::BGEZ:
5133
168
    case Mips::BGEZ64:
5134
168
    case Mips::BGEZAL:
5135
168
    case Mips::BGEZALL:
5136
168
    case Mips::BGEZL:
5137
168
    case Mips::BGTZ:
5138
168
    case Mips::BGTZ64:
5139
168
    case Mips::BGTZL:
5140
168
    case Mips::BLEZ:
5141
168
    case Mips::BLEZ64:
5142
168
    case Mips::BLEZL:
5143
168
    case Mips::BLTZ:
5144
168
    case Mips::BLTZ64:
5145
168
    case Mips::BLTZAL:
5146
168
    case Mips::BLTZALL:
5147
168
    case Mips::BLTZL: {
5148
168
      // op: rs
5149
168
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5150
168
      Value |= (op & UINT64_C(31)) << 21;
5151
168
      // op: offset
5152
168
      op = getBranchTargetOpValue(MI, 1, Fixups, STI);
5153
168
      Value |= op & UINT64_C(65535);
5154
168
      break;
5155
168
    }
5156
168
    case Mips::BBIT0:
5157
6
    case Mips::BBIT032:
5158
6
    case Mips::BBIT1:
5159
6
    case Mips::BBIT132: {
5160
6
      // op: rs
5161
6
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5162
6
      Value |= (op & UINT64_C(31)) << 21;
5163
6
      // op: p
5164
6
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5165
6
      Value |= (op & UINT64_C(31)) << 16;
5166
6
      // op: offset
5167
6
      op = getBranchTargetOpValue(MI, 2, Fixups, STI);
5168
6
      Value |= op & UINT64_C(65535);
5169
6
      break;
5170
6
    }
5171
585
    case Mips::CMPU_EQ_QB:
5172
585
    case Mips::CMPU_LE_QB:
5173
585
    case Mips::CMPU_LT_QB:
5174
585
    case Mips::CMP_EQ_PH:
5175
585
    case Mips::CMP_LE_PH:
5176
585
    case Mips::CMP_LT_PH:
5177
585
    case Mips::DMULT:
5178
585
    case Mips::DMULTu:
5179
585
    case Mips::DSDIV:
5180
585
    case Mips::DUDIV:
5181
585
    case Mips::MADD:
5182
585
    case Mips::MADDU:
5183
585
    case Mips::MSUB:
5184
585
    case Mips::MSUBU:
5185
585
    case Mips::MULT:
5186
585
    case Mips::MULTu:
5187
585
    case Mips::SDIV:
5188
585
    case Mips::UDIV: {
5189
585
      // op: rs
5190
585
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5191
585
      Value |= (op & UINT64_C(31)) << 21;
5192
585
      // op: rt
5193
585
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5194
585
      Value |= (op & UINT64_C(31)) << 16;
5195
585
      break;
5196
585
    }
5197
585
    case Mips::TEQ:
5198
321
    case Mips::TGE:
5199
321
    case Mips::TGEU:
5200
321
    case Mips::TLT:
5201
321
    case Mips::TLTU:
5202
321
    case Mips::TNE: {
5203
321
      // op: rs
5204
321
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5205
321
      Value |= (op & UINT64_C(31)) << 21;
5206
321
      // op: rt
5207
321
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5208
321
      Value |= (op & UINT64_C(31)) << 16;
5209
321
      // op: code_
5210
321
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5211
321
      Value |= (op & UINT64_C(1023)) << 6;
5212
321
      break;
5213
321
    }
5214
360
    case Mips::BEQ:
5215
360
    case Mips::BEQ64:
5216
360
    case Mips::BEQC:
5217
360
    case Mips::BEQC64:
5218
360
    case Mips::BEQL:
5219
360
    case Mips::BGEC:
5220
360
    case Mips::BGEC64:
5221
360
    case Mips::BGEUC:
5222
360
    case Mips::BGEUC64:
5223
360
    case Mips::BLTC:
5224
360
    case Mips::BLTC64:
5225
360
    case Mips::BLTUC:
5226
360
    case Mips::BLTUC64:
5227
360
    case Mips::BNE:
5228
360
    case Mips::BNE64:
5229
360
    case Mips::BNEC:
5230
360
    case Mips::BNEC64:
5231
360
    case Mips::BNEL:
5232
360
    case Mips::BNVC:
5233
360
    case Mips::BOVC: {
5234
360
      // op: rs
5235
360
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5236
360
      Value |= (op & UINT64_C(31)) << 21;
5237
360
      // op: rt
5238
360
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5239
360
      Value |= (op & UINT64_C(31)) << 16;
5240
360
      // op: offset
5241
360
      op = getBranchTargetOpValue(MI, 2, Fixups, STI);
5242
360
      Value |= op & UINT64_C(65535);
5243
360
      break;
5244
360
    }
5245
360
    case Mips::FORK: {
5246
1
      // op: rs
5247
1
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5248
1
      Value |= (op & UINT64_C(31)) << 21;
5249
1
      // op: rt
5250
1
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5251
1
      Value |= (op & UINT64_C(31)) << 16;
5252
1
      // op: rd
5253
1
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5254
1
      Value |= (op & UINT64_C(31)) << 11;
5255
1
      break;
5256
360
    }
5257
360
    case Mips::GINVI: {
5258
5
      // op: rs
5259
5
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5260
5
      Value |= (op & UINT64_C(31)) << 21;
5261
5
      // op: type_
5262
5
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5263
5
      Value |= (op & UINT64_C(3)) << 8;
5264
5
      break;
5265
360
    }
5266
360
    case Mips::GINVT: {
5267
2
      // op: rs
5268
2
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5269
2
      Value |= (op & UINT64_C(31)) << 21;
5270
2
      // op: type_
5271
2
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5272
2
      Value |= (op & UINT64_C(3)) << 8;
5273
2
      break;
5274
360
    }
5275
360
    case Mips::JALRC16_MMR6:
5276
2
    case Mips::JRC16_MMR6: {
5277
2
      // op: rs
5278
2
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5279
2
      Value |= (op & UINT64_C(31)) << 5;
5280
2
      break;
5281
2
    }
5282
9
    case Mips::ADDIUPC_MM: {
5283
9
      // op: rs
5284
9
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5285
9
      Value |= (op & UINT64_C(7)) << 23;
5286
9
      // op: imm
5287
9
      op = getSimm23Lsl2Encoding(MI, 1, Fixups, STI);
5288
9
      Value |= op & UINT64_C(8388607);
5289
9
      break;
5290
2
    }
5291
15
    case Mips::BEQZ16_MM:
5292
15
    case Mips::BEQZC16_MMR6:
5293
15
    case Mips::BNEZ16_MM:
5294
15
    case Mips::BNEZC16_MMR6: {
5295
15
      // op: rs
5296
15
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5297
15
      Value |= (op & UINT64_C(7)) << 7;
5298
15
      // op: offset
5299
15
      op = getBranchTarget7OpValueMM(MI, 1, Fixups, STI);
5300
15
      Value |= op & UINT64_C(127);
5301
15
      break;
5302
15
    }
5303
30
    case Mips::JALR16_MM:
5304
30
    case Mips::JALRS16_MM:
5305
30
    case Mips::JR16_MM:
5306
30
    case Mips::JRC16_MM: {
5307
30
      // op: rs
5308
30
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5309
30
      Value |= op & UINT64_C(31);
5310
30
      break;
5311
30
    }
5312
30
    case Mips::CTCMSA: {
5313
16
      // op: rs
5314
16
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5315
16
      Value |= (op & UINT64_C(31)) << 11;
5316
16
      // op: cd
5317
16
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5318
16
      Value |= (op & UINT64_C(31)) << 6;
5319
16
      break;
5320
30
    }
5321
30
    case Mips::FILL_B:
5322
4
    case Mips::FILL_D:
5323
4
    case Mips::FILL_H:
5324
4
    case Mips::FILL_W: {
5325
4
      // op: rs
5326
4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5327
4
      Value |= (op & UINT64_C(31)) << 11;
5328
4
      // op: wd
5329
4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5330
4
      Value |= (op & UINT64_C(31)) << 6;
5331
4
      break;
5332
4
    }
5333
5
    case Mips::MTHI_DSP_MM:
5334
5
    case Mips::MTHLIP_MM:
5335
5
    case Mips::MTLO_DSP_MM:
5336
5
    case Mips::SHILOV_MM: {
5337
5
      // op: rs
5338
5
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5339
5
      Value |= (op & UINT64_C(31)) << 16;
5340
5
      // op: ac
5341
5
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5342
5
      Value |= (op & UINT64_C(3)) << 14;
5343
5
      break;
5344
5
    }
5345
18
    case Mips::JALRS_MM:
5346
18
    case Mips::JALR_MM: {
5347
18
      // op: rs
5348
18
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5349
18
      Value |= (op & UINT64_C(31)) << 16;
5350
18