Coverage Report

Created: 2018-09-23 22:08

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/clang-build/lib/Target/PowerPC/PPCGenCallingConv.inc
Line
Count
Source (jump to first uncovered line)
1
/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2
|*                                                                            *|
3
|* Calling Convention Implementation Fragment                                 *|
4
|*                                                                            *|
5
|* Automatically generated file, do not edit!                                 *|
6
|*                                                                            *|
7
\*===----------------------------------------------------------------------===*/
8
9
static bool CC_PPC32_SVR4(unsigned ValNo, MVT ValVT,
10
                          MVT LocVT, CCValAssign::LocInfo LocInfo,
11
                          ISD::ArgFlagsTy ArgFlags, CCState &State);
12
static bool CC_PPC32_SVR4_ByVal(unsigned ValNo, MVT ValVT,
13
                                MVT LocVT, CCValAssign::LocInfo LocInfo,
14
                                ISD::ArgFlagsTy ArgFlags, CCState &State);
15
static bool CC_PPC32_SVR4_Common(unsigned ValNo, MVT ValVT,
16
                                 MVT LocVT, CCValAssign::LocInfo LocInfo,
17
                                 ISD::ArgFlagsTy ArgFlags, CCState &State);
18
static bool CC_PPC32_SVR4_VarArg(unsigned ValNo, MVT ValVT,
19
                                 MVT LocVT, CCValAssign::LocInfo LocInfo,
20
                                 ISD::ArgFlagsTy ArgFlags, CCState &State);
21
static bool CC_PPC64_AnyReg(unsigned ValNo, MVT ValVT,
22
                            MVT LocVT, CCValAssign::LocInfo LocInfo,
23
                            ISD::ArgFlagsTy ArgFlags, CCState &State);
24
static bool CC_PPC64_ELF_FIS(unsigned ValNo, MVT ValVT,
25
                             MVT LocVT, CCValAssign::LocInfo LocInfo,
26
                             ISD::ArgFlagsTy ArgFlags, CCState &State);
27
static bool RetCC_PPC(unsigned ValNo, MVT ValVT,
28
                      MVT LocVT, CCValAssign::LocInfo LocInfo,
29
                      ISD::ArgFlagsTy ArgFlags, CCState &State);
30
static bool RetCC_PPC64_AnyReg(unsigned ValNo, MVT ValVT,
31
                               MVT LocVT, CCValAssign::LocInfo LocInfo,
32
                               ISD::ArgFlagsTy ArgFlags, CCState &State);
33
static bool RetCC_PPC64_ELF_FIS(unsigned ValNo, MVT ValVT,
34
                                MVT LocVT, CCValAssign::LocInfo LocInfo,
35
                                ISD::ArgFlagsTy ArgFlags, CCState &State);
36
static bool RetCC_PPC_Cold(unsigned ValNo, MVT ValVT,
37
                           MVT LocVT, CCValAssign::LocInfo LocInfo,
38
                           ISD::ArgFlagsTy ArgFlags, CCState &State);
39
40
41
static bool CC_PPC32_SVR4(unsigned ValNo, MVT ValVT,
42
                          MVT LocVT, CCValAssign::LocInfo LocInfo,
43
2.32k
                          ISD::ArgFlagsTy ArgFlags, CCState &State) {
44
2.32k
45
2.32k
  if (LocVT == MVT::v4f64 ||
46
2.32k
      LocVT == MVT::v4f32 ||
47
2.32k
      
LocVT == MVT::v4i12.31k
) {
48
9
    if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasQPX()) {
49
0
      static const MCPhysReg RegList1[] = {
50
0
        PPC::QF1, PPC::QF2, PPC::QF3, PPC::QF4, PPC::QF5, PPC::QF6, PPC::QF7, PPC::QF8
51
0
      };
52
0
      if (unsigned Reg = State.AllocateReg(RegList1)) {
53
0
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
54
0
        return false;
55
0
      }
56
2.32k
    }
57
9
  }
58
2.32k
59
2.32k
  if (LocVT == MVT::v16i8 ||
60
2.32k
      
LocVT == MVT::v8i162.32k
||
61
2.32k
      
LocVT == MVT::v4i322.32k
||
62
2.32k
      
LocVT == MVT::v2i642.31k
||
63
2.32k
      
LocVT == MVT::v1i1282.31k
||
64
2.32k
      
LocVT == MVT::v4f322.31k
||
65
2.32k
      
LocVT == MVT::v2f642.30k
) {
66
24
    if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasAltivec()) {
67
24
      static const MCPhysReg RegList2[] = {
68
24
        PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13
69
24
      };
70
24
      if (unsigned Reg = State.AllocateReg(RegList2)) {
71
24
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
72
24
        return false;
73
24
      }
74
2.30k
    }
75
24
  }
76
2.30k
77
2.30k
  if (LocVT == MVT::f128) {
78
0
    if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasP9Vector()) {
79
0
      static const MCPhysReg RegList3[] = {
80
0
        PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13
81
0
      };
82
0
      if (unsigned Reg = State.AllocateReg(RegList3)) {
83
0
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
84
0
        return false;
85
0
      }
86
2.30k
    }
87
0
  }
88
2.30k
89
2.30k
  if (!CC_PPC32_SVR4_Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
90
2.30k
    return false;
91
0
92
0
  return true;  // CC didn't match.
93
0
}
PPCISelLowering.cpp:CC_PPC32_SVR4(unsigned int, llvm::MVT, llvm::MVT, llvm::CCValAssign::LocInfo, llvm::ISD::ArgFlagsTy, llvm::CCState&)
Line
Count
Source
43
2.32k
                          ISD::ArgFlagsTy ArgFlags, CCState &State) {
44
2.32k
45
2.32k
  if (LocVT == MVT::v4f64 ||
46
2.32k
      LocVT == MVT::v4f32 ||
47
2.32k
      
LocVT == MVT::v4i12.31k
) {
48
9
    if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasQPX()) {
49
0
      static const MCPhysReg RegList1[] = {
50
0
        PPC::QF1, PPC::QF2, PPC::QF3, PPC::QF4, PPC::QF5, PPC::QF6, PPC::QF7, PPC::QF8
51
0
      };
52
0
      if (unsigned Reg = State.AllocateReg(RegList1)) {
53
0
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
54
0
        return false;
55
0
      }
56
2.32k
    }
57
9
  }
58
2.32k
59
2.32k
  if (LocVT == MVT::v16i8 ||
60
2.32k
      
LocVT == MVT::v8i162.32k
||
61
2.32k
      
LocVT == MVT::v4i322.32k
||
62
2.32k
      
LocVT == MVT::v2i642.31k
||
63
2.32k
      
LocVT == MVT::v1i1282.31k
||
64
2.32k
      
LocVT == MVT::v4f322.31k
||
65
2.32k
      
LocVT == MVT::v2f642.30k
) {
66
24
    if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasAltivec()) {
67
24
      static const MCPhysReg RegList2[] = {
68
24
        PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13
69
24
      };
70
24
      if (unsigned Reg = State.AllocateReg(RegList2)) {
71
24
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
72
24
        return false;
73
24
      }
74
2.30k
    }
75
24
  }
76
2.30k
77
2.30k
  if (LocVT == MVT::f128) {
78
0
    if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasP9Vector()) {
79
0
      static const MCPhysReg RegList3[] = {
80
0
        PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13
81
0
      };
82
0
      if (unsigned Reg = State.AllocateReg(RegList3)) {
83
0
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
84
0
        return false;
85
0
      }
86
2.30k
    }
87
0
  }
88
2.30k
89
2.30k
  if (!CC_PPC32_SVR4_Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
90
2.30k
    return false;
91
0
92
0
  return true;  // CC didn't match.
93
0
}
Unexecuted instantiation: PPCFastISel.cpp:CC_PPC32_SVR4(unsigned int, llvm::MVT, llvm::MVT, llvm::CCValAssign::LocInfo, llvm::ISD::ArgFlagsTy, llvm::CCState&)
94
95
96
static bool CC_PPC32_SVR4_ByVal(unsigned ValNo, MVT ValVT,
97
                                MVT LocVT, CCValAssign::LocInfo LocInfo,
98
2.46k
                                ISD::ArgFlagsTy ArgFlags, CCState &State) {
99
2.46k
100
2.46k
  if (ArgFlags.isByVal()) {
101
12
    State.HandleByVal(ValNo, ValVT, LocVT, LocInfo, 4, 4, ArgFlags);
102
12
    return false;
103
12
  }
104
2.45k
105
2.45k
  if (CC_PPC32_SVR4_Custom_Dummy(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
106
2.45k
    return false;
107
0
108
0
  return true;  // CC didn't match.
109
0
}
PPCISelLowering.cpp:CC_PPC32_SVR4_ByVal(unsigned int, llvm::MVT, llvm::MVT, llvm::CCValAssign::LocInfo, llvm::ISD::ArgFlagsTy, llvm::CCState&)
Line
Count
Source
98
2.46k
                                ISD::ArgFlagsTy ArgFlags, CCState &State) {
99
2.46k
100
2.46k
  if (ArgFlags.isByVal()) {
101
12
    State.HandleByVal(ValNo, ValVT, LocVT, LocInfo, 4, 4, ArgFlags);
102
12
    return false;
103
12
  }
104
2.45k
105
2.45k
  if (CC_PPC32_SVR4_Custom_Dummy(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
106
2.45k
    return false;
107
0
108
0
  return true;  // CC didn't match.
109
0
}
Unexecuted instantiation: PPCFastISel.cpp:CC_PPC32_SVR4_ByVal(unsigned int, llvm::MVT, llvm::MVT, llvm::CCValAssign::LocInfo, llvm::ISD::ArgFlagsTy, llvm::CCState&)
110
111
112
static bool CC_PPC32_SVR4_Common(unsigned ValNo, MVT ValVT,
113
                                 MVT LocVT, CCValAssign::LocInfo LocInfo,
114
2.44k
                                 ISD::ArgFlagsTy ArgFlags, CCState &State) {
115
2.44k
116
2.44k
  if (LocVT == MVT::i1) {
117
6
    LocVT = MVT::i32;
118
6
    if (ArgFlags.isSExt())
119
0
        LocInfo = CCValAssign::SExt;
120
6
    else if (ArgFlags.isZExt())
121
2
        LocInfo = CCValAssign::ZExt;
122
4
    else
123
4
        LocInfo = CCValAssign::AExt;
124
6
  }
125
2.44k
126
2.44k
  if (LocVT == MVT::i32) {
127
1.70k
    if (ArgFlags.isSplit()) {
128
232
      if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).useSoftFloat()) {
129
45
        if (!static_cast<PPCCCState *>(&State)->WasOriginalArgPPCF128(ValNo)) {
130
39
          if (CC_PPC32_SVR4_Custom_AlignArgRegs(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
131
0
                    return false;
132
2.44k
        }
133
45
      }
134
232
    }
135
1.70k
  }
136
2.44k
137
2.44k
  if (LocVT == MVT::i32) {
138
1.70k
    if (ArgFlags.isSplit()) {
139
232
      if (!static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).useSoftFloat()) {
140
187
        if (CC_PPC32_SVR4_Custom_AlignArgRegs(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
141
0
                return false;
142
2.44k
      }
143
232
    }
144
1.70k
  }
145
2.44k
146
2.44k
  if (ArgFlags.isSplit()) {
147
345
    if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).useSoftFloat()) {
148
45
      if (static_cast<PPCCCState *>(&State)->WasOriginalArgPPCF128(ValNo)) {
149
6
        if (CC_PPC32_SVR4_Custom_SkipLastArgRegsPPCF128(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
150
0
                return false;
151
2.44k
      }
152
45
    }
153
345
  }
154
2.44k
155
2.44k
  if (ArgFlags.isNest()) {
156
3
    if (unsigned Reg = State.AllocateReg(PPC::R11)) {
157
3
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
158
3
      return false;
159
3
    }
160
2.44k
  }
161
2.44k
162
2.44k
  if (LocVT == MVT::i32) {
163
1.70k
    static const MCPhysReg RegList1[] = {
164
1.70k
      PPC::R3, PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10
165
1.70k
    };
166
1.70k
    if (unsigned Reg = State.AllocateReg(RegList1)) {
167
1.68k
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
168
1.68k
      return false;
169
1.68k
    }
170
759
  }
171
759
172
759
  if (LocVT == MVT::f64) {
173
381
    if (ArgFlags.isSplit()) {
174
98
      if (CC_PPC32_SVR4_Custom_AlignFPArgRegs(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
175
0
            return false;
176
759
    }
177
381
  }
178
759
179
759
  if (LocVT == MVT::f32 ||
180
759
      
LocVT == MVT::f64399
) {
181
741
    if (!static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasSPE()) {
182
683
      static const MCPhysReg RegList2[] = {
183
683
        PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8
184
683
      };
185
683
      if (unsigned Reg = State.AllocateReg(RegList2)) {
186
667
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
187
667
        return false;
188
667
      }
189
92
    }
190
741
  }
191
92
192
92
  if (LocVT == MVT::f64) {
193
0
    if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasSPE()) {
194
0
      static const MCPhysReg RegList3[] = {
195
0
        PPC::S3, PPC::S4, PPC::S5, PPC::S6, PPC::S7, PPC::S8, PPC::S9, PPC::S10
196
0
      };
197
0
      if (unsigned Reg = State.AllocateReg(RegList3)) {
198
0
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
199
0
        return false;
200
0
      }
201
92
    }
202
0
  }
203
92
204
92
  if (LocVT == MVT::f32) {
205
74
    if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasSPE()) {
206
58
      static const MCPhysReg RegList4[] = {
207
58
        PPC::R3, PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10
208
58
      };
209
58
      if (unsigned Reg = State.AllocateReg(RegList4)) {
210
58
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
211
58
        return false;
212
58
      }
213
34
    }
214
74
  }
215
34
216
34
  if (LocVT == MVT::i32) {
217
18
    if (ArgFlags.isSplit()) {
218
3
      unsigned Offset5 = State.AllocateStack(4, 8);
219
3
      State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset5, LocVT, LocInfo));
220
3
      return false;
221
3
    }
222
31
  }
223
31
224
31
  if (LocVT == MVT::i32) {
225
15
    unsigned Offset6 = State.AllocateStack(4, 4);
226
15
    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset6, LocVT, LocInfo));
227
15
    return false;
228
15
  }
229
16
230
16
  if (LocVT == MVT::f32 ||
231
16
      
LocVT == MVT::f640
) {
232
16
    if (!static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasSPE()) {
233
16
      unsigned Offset7 = State.AllocateStack(8, 8);
234
16
      State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset7, LocVT, LocInfo));
235
16
      return false;
236
16
    }
237
0
  }
238
0
239
0
  if (LocVT == MVT::f32) {
240
0
    if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasSPE()) {
241
0
      unsigned Offset8 = State.AllocateStack(4, 4);
242
0
      State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset8, LocVT, LocInfo));
243
0
      return false;
244
0
    }
245
0
  }
246
0
247
0
  if (LocVT == MVT::f64) {
248
0
    if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasSPE()) {
249
0
      unsigned Offset9 = State.AllocateStack(8, 8);
250
0
      State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset9, LocVT, LocInfo));
251
0
      return false;
252
0
    }
253
0
  }
254
0
255
0
  if (LocVT == MVT::v4f64 ||
256
0
      LocVT == MVT::v4i1) {
257
0
    unsigned Offset10 = State.AllocateStack(32, 32);
258
0
    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset10, LocVT, LocInfo));
259
0
    return false;
260
0
  }
261
0
262
0
  if (LocVT == MVT::v16i8 ||
263
0
      LocVT == MVT::v8i16 ||
264
0
      LocVT == MVT::v4i32 ||
265
0
      LocVT == MVT::v4f32 ||
266
0
      LocVT == MVT::v2f64 ||
267
0
      LocVT == MVT::v2i64) {
268
0
    unsigned Offset11 = State.AllocateStack(16, 16);
269
0
    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset11, LocVT, LocInfo));
270
0
    return false;
271
0
  }
272
0
273
0
  if (LocVT == MVT::f128) {
274
0
    if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasP9Vector()) {
275
0
      unsigned Offset12 = State.AllocateStack(16, 16);
276
0
      State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset12, LocVT, LocInfo));
277
0
      return false;
278
0
    }
279
0
  }
280
0
281
0
  return true;  // CC didn't match.
282
0
}
PPCISelLowering.cpp:CC_PPC32_SVR4_Common(unsigned int, llvm::MVT, llvm::MVT, llvm::CCValAssign::LocInfo, llvm::ISD::ArgFlagsTy, llvm::CCState&)
Line
Count
Source
114
2.44k
                                 ISD::ArgFlagsTy ArgFlags, CCState &State) {
115
2.44k
116
2.44k
  if (LocVT == MVT::i1) {
117
6
    LocVT = MVT::i32;
118
6
    if (ArgFlags.isSExt())
119
0
        LocInfo = CCValAssign::SExt;
120
6
    else if (ArgFlags.isZExt())
121
2
        LocInfo = CCValAssign::ZExt;
122
4
    else
123
4
        LocInfo = CCValAssign::AExt;
124
6
  }
125
2.44k
126
2.44k
  if (LocVT == MVT::i32) {
127
1.70k
    if (ArgFlags.isSplit()) {
128
232
      if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).useSoftFloat()) {
129
45
        if (!static_cast<PPCCCState *>(&State)->WasOriginalArgPPCF128(ValNo)) {
130
39
          if (CC_PPC32_SVR4_Custom_AlignArgRegs(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
131
0
                    return false;
132
2.44k
        }
133
45
      }
134
232
    }
135
1.70k
  }
136
2.44k
137
2.44k
  if (LocVT == MVT::i32) {
138
1.70k
    if (ArgFlags.isSplit()) {
139
232
      if (!static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).useSoftFloat()) {
140
187
        if (CC_PPC32_SVR4_Custom_AlignArgRegs(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
141
0
                return false;
142
2.44k
      }
143
232
    }
144
1.70k
  }
145
2.44k
146
2.44k
  if (ArgFlags.isSplit()) {
147
345
    if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).useSoftFloat()) {
148
45
      if (static_cast<PPCCCState *>(&State)->WasOriginalArgPPCF128(ValNo)) {
149
6
        if (CC_PPC32_SVR4_Custom_SkipLastArgRegsPPCF128(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
150
0
                return false;
151
2.44k
      }
152
45
    }
153
345
  }
154
2.44k
155
2.44k
  if (ArgFlags.isNest()) {
156
3
    if (unsigned Reg = State.AllocateReg(PPC::R11)) {
157
3
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
158
3
      return false;
159
3
    }
160
2.44k
  }
161
2.44k
162
2.44k
  if (LocVT == MVT::i32) {
163
1.70k
    static const MCPhysReg RegList1[] = {
164
1.70k
      PPC::R3, PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10
165
1.70k
    };
166
1.70k
    if (unsigned Reg = State.AllocateReg(RegList1)) {
167
1.68k
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
168
1.68k
      return false;
169
1.68k
    }
170
759
  }
171
759
172
759
  if (LocVT == MVT::f64) {
173
381
    if (ArgFlags.isSplit()) {
174
98
      if (CC_PPC32_SVR4_Custom_AlignFPArgRegs(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
175
0
            return false;
176
759
    }
177
381
  }
178
759
179
759
  if (LocVT == MVT::f32 ||
180
759
      
LocVT == MVT::f64399
) {
181
741
    if (!static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasSPE()) {
182
683
      static const MCPhysReg RegList2[] = {
183
683
        PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8
184
683
      };
185
683
      if (unsigned Reg = State.AllocateReg(RegList2)) {
186
667
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
187
667
        return false;
188
667
      }
189
92
    }
190
741
  }
191
92
192
92
  if (LocVT == MVT::f64) {
193
0
    if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasSPE()) {
194
0
      static const MCPhysReg RegList3[] = {
195
0
        PPC::S3, PPC::S4, PPC::S5, PPC::S6, PPC::S7, PPC::S8, PPC::S9, PPC::S10
196
0
      };
197
0
      if (unsigned Reg = State.AllocateReg(RegList3)) {
198
0
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
199
0
        return false;
200
0
      }
201
92
    }
202
0
  }
203
92
204
92
  if (LocVT == MVT::f32) {
205
74
    if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasSPE()) {
206
58
      static const MCPhysReg RegList4[] = {
207
58
        PPC::R3, PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10
208
58
      };
209
58
      if (unsigned Reg = State.AllocateReg(RegList4)) {
210
58
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
211
58
        return false;
212
58
      }
213
34
    }
214
74
  }
215
34
216
34
  if (LocVT == MVT::i32) {
217
18
    if (ArgFlags.isSplit()) {
218
3
      unsigned Offset5 = State.AllocateStack(4, 8);
219
3
      State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset5, LocVT, LocInfo));
220
3
      return false;
221
3
    }
222
31
  }
223
31
224
31
  if (LocVT == MVT::i32) {
225
15
    unsigned Offset6 = State.AllocateStack(4, 4);
226
15
    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset6, LocVT, LocInfo));
227
15
    return false;
228
15
  }
229
16
230
16
  if (LocVT == MVT::f32 ||
231
16
      
LocVT == MVT::f640
) {
232
16
    if (!static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasSPE()) {
233
16
      unsigned Offset7 = State.AllocateStack(8, 8);
234
16
      State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset7, LocVT, LocInfo));
235
16
      return false;
236
16
    }
237
0
  }
238
0
239
0
  if (LocVT == MVT::f32) {
240
0
    if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasSPE()) {
241
0
      unsigned Offset8 = State.AllocateStack(4, 4);
242
0
      State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset8, LocVT, LocInfo));
243
0
      return false;
244
0
    }
245
0
  }
246
0
247
0
  if (LocVT == MVT::f64) {
248
0
    if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasSPE()) {
249
0
      unsigned Offset9 = State.AllocateStack(8, 8);
250
0
      State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset9, LocVT, LocInfo));
251
0
      return false;
252
0
    }
253
0
  }
254
0
255
0
  if (LocVT == MVT::v4f64 ||
256
0
      LocVT == MVT::v4i1) {
257
0
    unsigned Offset10 = State.AllocateStack(32, 32);
258
0
    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset10, LocVT, LocInfo));
259
0
    return false;
260
0
  }
261
0
262
0
  if (LocVT == MVT::v16i8 ||
263
0
      LocVT == MVT::v8i16 ||
264
0
      LocVT == MVT::v4i32 ||
265
0
      LocVT == MVT::v4f32 ||
266
0
      LocVT == MVT::v2f64 ||
267
0
      LocVT == MVT::v2i64) {
268
0
    unsigned Offset11 = State.AllocateStack(16, 16);
269
0
    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset11, LocVT, LocInfo));
270
0
    return false;
271
0
  }
272
0
273
0
  if (LocVT == MVT::f128) {
274
0
    if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasP9Vector()) {
275
0
      unsigned Offset12 = State.AllocateStack(16, 16);
276
0
      State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset12, LocVT, LocInfo));
277
0
      return false;
278
0
    }
279
0
  }
280
0
281
0
  return true;  // CC didn't match.
282
0
}
Unexecuted instantiation: PPCFastISel.cpp:CC_PPC32_SVR4_Common(unsigned int, llvm::MVT, llvm::MVT, llvm::CCValAssign::LocInfo, llvm::ISD::ArgFlagsTy, llvm::CCState&)
283
284
285
static bool CC_PPC32_SVR4_VarArg(unsigned ValNo, MVT ValVT,
286
                                 MVT LocVT, CCValAssign::LocInfo LocInfo,
287
143
                                 ISD::ArgFlagsTy ArgFlags, CCState &State) {
288
143
289
143
  if (!CC_PPC32_SVR4_Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
290
143
    return false;
291
0
292
0
  return true;  // CC didn't match.
293
0
}
PPCISelLowering.cpp:CC_PPC32_SVR4_VarArg(unsigned int, llvm::MVT, llvm::MVT, llvm::CCValAssign::LocInfo, llvm::ISD::ArgFlagsTy, llvm::CCState&)
Line
Count
Source
287
143
                                 ISD::ArgFlagsTy ArgFlags, CCState &State) {
288
143
289
143
  if (!CC_PPC32_SVR4_Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
290
143
    return false;
291
0
292
0
  return true;  // CC didn't match.
293
0
}
Unexecuted instantiation: PPCFastISel.cpp:CC_PPC32_SVR4_VarArg(unsigned int, llvm::MVT, llvm::MVT, llvm::CCValAssign::LocInfo, llvm::ISD::ArgFlagsTy, llvm::CCState&)
294
295
296
static bool CC_PPC64_AnyReg(unsigned ValNo, MVT ValVT,
297
                            MVT LocVT, CCValAssign::LocInfo LocInfo,
298
0
                            ISD::ArgFlagsTy ArgFlags, CCState &State) {
299
0
300
0
  if (CC_PPC_AnyReg_Error(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
301
0
    return false;
302
0
303
0
  return true;  // CC didn't match.
304
0
}
Unexecuted instantiation: PPCISelLowering.cpp:CC_PPC64_AnyReg(unsigned int, llvm::MVT, llvm::MVT, llvm::CCValAssign::LocInfo, llvm::ISD::ArgFlagsTy, llvm::CCState&)
Unexecuted instantiation: PPCFastISel.cpp:CC_PPC64_AnyReg(unsigned int, llvm::MVT, llvm::MVT, llvm::CCValAssign::LocInfo, llvm::ISD::ArgFlagsTy, llvm::CCState&)
305
306
307
static bool CC_PPC64_ELF_FIS(unsigned ValNo, MVT ValVT,
308
                             MVT LocVT, CCValAssign::LocInfo LocInfo,
309
81
                             ISD::ArgFlagsTy ArgFlags, CCState &State) {
310
81
311
81
  if (State.getCallingConv() == CallingConv::AnyReg) {
312
0
    if (!CC_PPC64_AnyReg(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
313
0
      return false;
314
81
  }
315
81
316
81
  if (LocVT == MVT::i1) {
317
0
    LocVT = MVT::i64;
318
0
    if (ArgFlags.isSExt())
319
0
        LocInfo = CCValAssign::SExt;
320
0
    else if (ArgFlags.isZExt())
321
0
        LocInfo = CCValAssign::ZExt;
322
0
    else
323
0
        LocInfo = CCValAssign::AExt;
324
0
  }
325
81
326
81
  if (LocVT == MVT::i8) {
327
10
    LocVT = MVT::i64;
328
10
    if (ArgFlags.isSExt())
329
1
        LocInfo = CCValAssign::SExt;
330
9
    else if (ArgFlags.isZExt())
331
9
        LocInfo = CCValAssign::ZExt;
332
0
    else
333
0
        LocInfo = CCValAssign::AExt;
334
10
  }
335
81
336
81
  if (LocVT == MVT::i16) {
337
4
    LocVT = MVT::i64;
338
4
    if (ArgFlags.isSExt())
339
1
        LocInfo = CCValAssign::SExt;
340
3
    else if (ArgFlags.isZExt())
341
3
        LocInfo = CCValAssign::ZExt;
342
0
    else
343
0
        LocInfo = CCValAssign::AExt;
344
4
  }
345
81
346
81
  if (LocVT == MVT::i32) {
347
5
    LocVT = MVT::i64;
348
5
    if (ArgFlags.isSExt())
349
0
        LocInfo = CCValAssign::SExt;
350
5
    else if (ArgFlags.isZExt())
351
1
        LocInfo = CCValAssign::ZExt;
352
4
    else
353
4
        LocInfo = CCValAssign::AExt;
354
5
  }
355
81
356
81
  if (LocVT == MVT::i64) {
357
63
    static const MCPhysReg RegList1[] = {
358
63
      PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10
359
63
    };
360
63
    if (unsigned Reg = State.AllocateReg(RegList1)) {
361
63
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
362
63
      return false;
363
63
    }
364
18
  }
365
18
366
18
  if (LocVT == MVT::f32 ||
367
18
      
LocVT == MVT::f6416
) {
368
18
    static const MCPhysReg RegList2[] = {
369
18
      PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8
370
18
    };
371
18
    if (unsigned Reg = State.AllocateReg(RegList2)) {
372
18
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
373
18
      return false;
374
18
    }
375
0
  }
376
0
377
0
  return true;  // CC didn't match.
378
0
}
Unexecuted instantiation: PPCISelLowering.cpp:CC_PPC64_ELF_FIS(unsigned int, llvm::MVT, llvm::MVT, llvm::CCValAssign::LocInfo, llvm::ISD::ArgFlagsTy, llvm::CCState&)
PPCFastISel.cpp:CC_PPC64_ELF_FIS(unsigned int, llvm::MVT, llvm::MVT, llvm::CCValAssign::LocInfo, llvm::ISD::ArgFlagsTy, llvm::CCState&)
Line
Count
Source
309
81
                             ISD::ArgFlagsTy ArgFlags, CCState &State) {
310
81
311
81
  if (State.getCallingConv() == CallingConv::AnyReg) {
312
0
    if (!CC_PPC64_AnyReg(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
313
0
      return false;
314
81
  }
315
81
316
81
  if (LocVT == MVT::i1) {
317
0
    LocVT = MVT::i64;
318
0
    if (ArgFlags.isSExt())
319
0
        LocInfo = CCValAssign::SExt;
320
0
    else if (ArgFlags.isZExt())
321
0
        LocInfo = CCValAssign::ZExt;
322
0
    else
323
0
        LocInfo = CCValAssign::AExt;
324
0
  }
325
81
326
81
  if (LocVT == MVT::i8) {
327
10
    LocVT = MVT::i64;
328
10
    if (ArgFlags.isSExt())
329
1
        LocInfo = CCValAssign::SExt;
330
9
    else if (ArgFlags.isZExt())
331
9
        LocInfo = CCValAssign::ZExt;
332
0
    else
333
0
        LocInfo = CCValAssign::AExt;
334
10
  }
335
81
336
81
  if (LocVT == MVT::i16) {
337
4
    LocVT = MVT::i64;
338
4
    if (ArgFlags.isSExt())
339
1
        LocInfo = CCValAssign::SExt;
340
3
    else if (ArgFlags.isZExt())
341
3
        LocInfo = CCValAssign::ZExt;
342
0
    else
343
0
        LocInfo = CCValAssign::AExt;
344
4
  }
345
81
346
81
  if (LocVT == MVT::i32) {
347
5
    LocVT = MVT::i64;
348
5
    if (ArgFlags.isSExt())
349
0
        LocInfo = CCValAssign::SExt;
350
5
    else if (ArgFlags.isZExt())
351
1
        LocInfo = CCValAssign::ZExt;
352
4
    else
353
4
        LocInfo = CCValAssign::AExt;
354
5
  }
355
81
356
81
  if (LocVT == MVT::i64) {
357
63
    static const MCPhysReg RegList1[] = {
358
63
      PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10
359
63
    };
360
63
    if (unsigned Reg = State.AllocateReg(RegList1)) {
361
63
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
362
63
      return false;
363
63
    }
364
18
  }
365
18
366
18
  if (LocVT == MVT::f32 ||
367
18
      
LocVT == MVT::f6416
) {
368
18
    static const MCPhysReg RegList2[] = {
369
18
      PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8
370
18
    };
371
18
    if (unsigned Reg = State.AllocateReg(RegList2)) {
372
18
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
373
18
      return false;
374
18
    }
375
0
  }
376
0
377
0
  return true;  // CC didn't match.
378
0
}
379
380
381
static bool RetCC_PPC(unsigned ValNo, MVT ValVT,
382
                      MVT LocVT, CCValAssign::LocInfo LocInfo,
383
15.7k
                      ISD::ArgFlagsTy ArgFlags, CCState &State) {
384
15.7k
385
15.7k
  if (State.getCallingConv() == CallingConv::AnyReg) {
386
0
    if (!RetCC_PPC64_AnyReg(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
387
0
      return false;
388
15.7k
  }
389
15.7k
390
15.7k
  if (LocVT == MVT::i32 ||
391
15.7k
      
LocVT == MVT::i110.3k
) {
392
5.49k
    if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).isPPC64()) {
393
3.80k
      LocVT = MVT::i64;
394
3.80k
      if (ArgFlags.isSExt())
395
1.72k
            LocInfo = CCValAssign::SExt;
396
2.08k
      else if (ArgFlags.isZExt())
397
412
            LocInfo = CCValAssign::ZExt;
398
1.67k
      else
399
1.67k
            LocInfo = CCValAssign::AExt;
400
3.80k
    }
401
5.49k
  }
402
15.7k
403
15.7k
  if (LocVT == MVT::i1) {
404
67
    if (!static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).isPPC64()) {
405
67
      LocVT = MVT::i32;
406
67
      if (ArgFlags.isSExt())
407
0
            LocInfo = CCValAssign::SExt;
408
67
      else if (ArgFlags.isZExt())
409
0
            LocInfo = CCValAssign::ZExt;
410
67
      else
411
67
            LocInfo = CCValAssign::AExt;
412
67
    }
413
67
  }
414
15.7k
415
15.7k
  if (LocVT == MVT::i32) {
416
1.69k
    static const MCPhysReg RegList1[] = {
417
1.69k
      PPC::R3, PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10
418
1.69k
    };
419
1.69k
    if (unsigned Reg = State.AllocateReg(RegList1)) {
420
1.69k
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
421
1.69k
      return false;
422
1.69k
    }
423
14.0k
  }
424
14.0k
425
14.0k
  if (LocVT == MVT::i64) {
426
6.22k
    static const MCPhysReg RegList2[] = {
427
6.22k
      PPC::X3, PPC::X4, PPC::X5, PPC::X6
428
6.22k
    };
429
6.22k
    if (unsigned Reg = State.AllocateReg(RegList2)) {
430
6.22k
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
431
6.22k
      return false;
432
6.22k
    }
433
7.81k
  }
434
7.81k
435
7.81k
  if (LocVT == MVT::i128) {
436
0
    static const MCPhysReg RegList3[] = {
437
0
      PPC::X3, PPC::X4, PPC::X5, PPC::X6
438
0
    };
439
0
    if (unsigned Reg = State.AllocateReg(RegList3)) {
440
0
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
441
0
      return false;
442
0
    }
443
7.81k
  }
444
7.81k
445
7.81k
  if (!static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasSPE()) {
446
7.79k
    if (LocVT == MVT::f32) {
447
819
      static const MCPhysReg RegList4[] = {
448
819
        PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8
449
819
      };
450
819
      if (unsigned Reg = State.AllocateReg(RegList4)) {
451
819
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
452
819
        return false;
453
819
      }
454
7.00k
    }
455
7.79k
  }
456
7.00k
457
7.00k
  if (!static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasSPE()) {
458
6.97k
    if (LocVT == MVT::f64) {
459
1.54k
      static const MCPhysReg RegList5[] = {
460
1.54k
        PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8
461
1.54k
      };
462
1.54k
      if (unsigned Reg = State.AllocateReg(RegList5)) {
463
1.54k
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
464
1.54k
        return false;
465
1.54k
      }
466
5.45k
    }
467
6.97k
  }
468
5.45k
469
5.45k
  if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasSPE()) {
470
26
    if (LocVT == MVT::f32) {
471
26
      static const MCPhysReg RegList6[] = {
472
26
        PPC::R3, PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10
473
26
      };
474
26
      if (unsigned Reg = State.AllocateReg(RegList6)) {
475
26
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
476
26
        return false;
477
26
      }
478
5.43k
    }
479
26
  }
480
5.43k
481
5.43k
  if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasSPE()) {
482
0
    if (LocVT == MVT::f64) {
483
0
      static const MCPhysReg RegList7[] = {
484
0
        PPC::S3, PPC::S4, PPC::S5, PPC::S6, PPC::S7, PPC::S8, PPC::S9, PPC::S10
485
0
      };
486
0
      if (unsigned Reg = State.AllocateReg(RegList7)) {
487
0
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
488
0
        return false;
489
0
      }
490
5.43k
    }
491
0
  }
492
5.43k
493
5.43k
  if (LocVT == MVT::f128) {
494
160
    if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasP9Vector()) {
495
160
      static const MCPhysReg RegList8[] = {
496
160
        PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9
497
160
      };
498
160
      if (unsigned Reg = State.AllocateReg(RegList8)) {
499
160
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
500
160
        return false;
501
160
      }
502
5.27k
    }
503
160
  }
504
5.27k
505
5.27k
  if (LocVT == MVT::v4f64 ||
506
5.27k
      
LocVT == MVT::v4f325.16k
||
507
5.27k
      
LocVT == MVT::v4i14.50k
) {
508
820
    if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasQPX()) {
509
254
      static const MCPhysReg RegList9[] = {
510
254
        PPC::QF1, PPC::QF2
511
254
      };
512
254
      if (unsigned Reg = State.AllocateReg(RegList9)) {
513
254
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
514
254
        return false;
515
254
      }
516
5.01k
    }
517
820
  }
518
5.01k
519
5.01k
  if (LocVT == MVT::v16i8 ||
520
5.01k
      
LocVT == MVT::v8i164.38k
||
521
5.01k
      
LocVT == MVT::v4i323.94k
||
522
5.01k
      
LocVT == MVT::v2i642.50k
||
523
5.01k
      
LocVT == MVT::v1i1281.24k
||
524
5.01k
      
LocVT == MVT::v4f321.07k
||
525
5.01k
      
LocVT == MVT::v2f64512
) {
526
5.01k
    if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasAltivec()) {
527
5.01k
      static const MCPhysReg RegList10[] = {
528
5.01k
        PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9
529
5.01k
      };
530
5.01k
      if (unsigned Reg = State.AllocateReg(RegList10)) {
531
5.01k
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
532
5.01k
        return false;
533
5.01k
      }
534
6
    }
535
5.01k
  }
536
6
537
6
  return true;  // CC didn't match.
538
6
}
PPCISelLowering.cpp:RetCC_PPC(unsigned int, llvm::MVT, llvm::MVT, llvm::CCValAssign::LocInfo, llvm::ISD::ArgFlagsTy, llvm::CCState&)
Line
Count
Source
383
15.7k
                      ISD::ArgFlagsTy ArgFlags, CCState &State) {
384
15.7k
385
15.7k
  if (State.getCallingConv() == CallingConv::AnyReg) {
386
0
    if (!RetCC_PPC64_AnyReg(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
387
0
      return false;
388
15.7k
  }
389
15.7k
390
15.7k
  if (LocVT == MVT::i32 ||
391
15.7k
      
LocVT == MVT::i110.3k
) {
392
5.49k
    if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).isPPC64()) {
393
3.80k
      LocVT = MVT::i64;
394
3.80k
      if (ArgFlags.isSExt())
395
1.72k
            LocInfo = CCValAssign::SExt;
396
2.08k
      else if (ArgFlags.isZExt())
397
412
            LocInfo = CCValAssign::ZExt;
398
1.67k
      else
399
1.67k
            LocInfo = CCValAssign::AExt;
400
3.80k
    }
401
5.49k
  }
402
15.7k
403
15.7k
  if (LocVT == MVT::i1) {
404
67
    if (!static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).isPPC64()) {
405
67
      LocVT = MVT::i32;
406
67
      if (ArgFlags.isSExt())
407
0
            LocInfo = CCValAssign::SExt;
408
67
      else if (ArgFlags.isZExt())
409
0
            LocInfo = CCValAssign::ZExt;
410
67
      else
411
67
            LocInfo = CCValAssign::AExt;
412
67
    }
413
67
  }
414
15.7k
415
15.7k
  if (LocVT == MVT::i32) {
416
1.69k
    static const MCPhysReg RegList1[] = {
417
1.69k
      PPC::R3, PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10
418
1.69k
    };
419
1.69k
    if (unsigned Reg = State.AllocateReg(RegList1)) {
420
1.69k
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
421
1.69k
      return false;
422
1.69k
    }
423
14.0k
  }
424
14.0k
425
14.0k
  if (LocVT == MVT::i64) {
426
6.22k
    static const MCPhysReg RegList2[] = {
427
6.22k
      PPC::X3, PPC::X4, PPC::X5, PPC::X6
428
6.22k
    };
429
6.22k
    if (unsigned Reg = State.AllocateReg(RegList2)) {
430
6.22k
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
431
6.22k
      return false;
432
6.22k
    }
433
7.81k
  }
434
7.81k
435
7.81k
  if (LocVT == MVT::i128) {
436
0
    static const MCPhysReg RegList3[] = {
437
0
      PPC::X3, PPC::X4, PPC::X5, PPC::X6
438
0
    };
439
0
    if (unsigned Reg = State.AllocateReg(RegList3)) {
440
0
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
441
0
      return false;
442
0
    }
443
7.81k
  }
444
7.81k
445
7.81k
  if (!static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasSPE()) {
446
7.79k
    if (LocVT == MVT::f32) {
447
819
      static const MCPhysReg RegList4[] = {
448
819
        PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8
449
819
      };
450
819
      if (unsigned Reg = State.AllocateReg(RegList4)) {
451
819
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
452
819
        return false;
453
819
      }
454
7.00k
    }
455
7.79k
  }
456
7.00k
457
7.00k
  if (!static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasSPE()) {
458
6.97k
    if (LocVT == MVT::f64) {
459
1.54k
      static const MCPhysReg RegList5[] = {
460
1.54k
        PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8
461
1.54k
      };
462
1.54k
      if (unsigned Reg = State.AllocateReg(RegList5)) {
463
1.54k
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
464
1.54k
        return false;
465
1.54k
      }
466
5.45k
    }
467
6.97k
  }
468
5.45k
469
5.45k
  if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasSPE()) {
470
26
    if (LocVT == MVT::f32) {
471
26
      static const MCPhysReg RegList6[] = {
472
26
        PPC::R3, PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10
473
26
      };
474
26
      if (unsigned Reg = State.AllocateReg(RegList6)) {
475
26
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
476
26
        return false;
477
26
      }
478
5.43k
    }
479
26
  }
480
5.43k
481
5.43k
  if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasSPE()) {
482
0
    if (LocVT == MVT::f64) {
483
0
      static const MCPhysReg RegList7[] = {
484
0
        PPC::S3, PPC::S4, PPC::S5, PPC::S6, PPC::S7, PPC::S8, PPC::S9, PPC::S10
485
0
      };
486
0
      if (unsigned Reg = State.AllocateReg(RegList7)) {
487
0
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
488
0
        return false;
489
0
      }
490
5.43k
    }
491
0
  }
492
5.43k
493
5.43k
  if (LocVT == MVT::f128) {
494
160
    if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasP9Vector()) {
495
160
      static const MCPhysReg RegList8[] = {
496
160
        PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9
497
160
      };
498
160
      if (unsigned Reg = State.AllocateReg(RegList8)) {
499
160
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
500
160
        return false;
501
160
      }
502
5.27k
    }
503
160
  }
504
5.27k
505
5.27k
  if (LocVT == MVT::v4f64 ||
506
5.27k
      
LocVT == MVT::v4f325.16k
||
507
5.27k
      
LocVT == MVT::v4i14.50k
) {
508
820
    if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasQPX()) {
509
254
      static const MCPhysReg RegList9[] = {
510
254
        PPC::QF1, PPC::QF2
511
254
      };
512
254
      if (unsigned Reg = State.AllocateReg(RegList9)) {
513
254
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
514
254
        return false;
515
254
      }
516
5.01k
    }
517
820
  }
518
5.01k
519
5.01k
  if (LocVT == MVT::v16i8 ||
520
5.01k
      
LocVT == MVT::v8i164.38k
||
521
5.01k
      
LocVT == MVT::v4i323.94k
||
522
5.01k
      
LocVT == MVT::v2i642.50k
||
523
5.01k
      
LocVT == MVT::v1i1281.24k
||
524
5.01k
      
LocVT == MVT::v4f321.07k
||
525
5.01k
      
LocVT == MVT::v2f64512
) {
526
5.01k
    if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasAltivec()) {
527
5.01k
      static const MCPhysReg RegList10[] = {
528
5.01k
        PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9
529
5.01k
      };
530
5.01k
      if (unsigned Reg = State.AllocateReg(RegList10)) {
531
5.01k
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
532
5.01k
        return false;
533
5.01k
      }
534
6
    }
535
5.01k
  }
536
6
537
6
  return true;  // CC didn't match.
538
6
}
Unexecuted instantiation: PPCFastISel.cpp:RetCC_PPC(unsigned int, llvm::MVT, llvm::MVT, llvm::CCValAssign::LocInfo, llvm::ISD::ArgFlagsTy, llvm::CCState&)
539
540
541
static bool RetCC_PPC64_AnyReg(unsigned ValNo, MVT ValVT,
542
                               MVT LocVT, CCValAssign::LocInfo LocInfo,
543
0
                               ISD::ArgFlagsTy ArgFlags, CCState &State) {
544
0
545
0
  if (CC_PPC_AnyReg_Error(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
546
0
    return false;
547
0
548
0
  return true;  // CC didn't match.
549
0
}
Unexecuted instantiation: PPCISelLowering.cpp:RetCC_PPC64_AnyReg(unsigned int, llvm::MVT, llvm::MVT, llvm::CCValAssign::LocInfo, llvm::ISD::ArgFlagsTy, llvm::CCState&)
Unexecuted instantiation: PPCFastISel.cpp:RetCC_PPC64_AnyReg(unsigned int, llvm::MVT, llvm::MVT, llvm::CCValAssign::LocInfo, llvm::ISD::ArgFlagsTy, llvm::CCState&)
550
551
552
static bool RetCC_PPC64_ELF_FIS(unsigned ValNo, MVT ValVT,
553
                                MVT LocVT, CCValAssign::LocInfo LocInfo,
554
510
                                ISD::ArgFlagsTy ArgFlags, CCState &State) {
555
510
556
510
  if (State.getCallingConv() == CallingConv::AnyReg) {
557
0
    if (!RetCC_PPC64_AnyReg(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
558
0
      return false;
559
510
  }
560
510
561
510
  if (LocVT == MVT::i1) {
562
0
    LocVT = MVT::i64;
563
0
    if (ArgFlags.isSExt())
564
0
        LocInfo = CCValAssign::SExt;
565
0
    else if (ArgFlags.isZExt())
566
0
        LocInfo = CCValAssign::ZExt;
567
0
    else
568
0
        LocInfo = CCValAssign::AExt;
569
0
  }
570
510
571
510
  if (LocVT == MVT::i8) {
572
2
    LocVT = MVT::i64;
573
2
    if (ArgFlags.isSExt())
574
0
        LocInfo = CCValAssign::SExt;
575
2
    else if (ArgFlags.isZExt())
576
0
        LocInfo = CCValAssign::ZExt;
577
2
    else
578
2
        LocInfo = CCValAssign::AExt;
579
2
  }
580
510
581
510
  if (LocVT == MVT::i16) {
582
2
    LocVT = MVT::i64;
583
2
    if (ArgFlags.isSExt())
584
0
        LocInfo = CCValAssign::SExt;
585
2
    else if (ArgFlags.isZExt())
586
0
        LocInfo = CCValAssign::ZExt;
587
2
    else
588
2
        LocInfo = CCValAssign::AExt;
589
2
  }
590
510
591
510
  if (LocVT == MVT::i32) {
592
128
    LocVT = MVT::i64;
593
128
    if (ArgFlags.isSExt())
594
34
        LocInfo = CCValAssign::SExt;
595
94
    else if (ArgFlags.isZExt())
596
17
        LocInfo = CCValAssign::ZExt;
597
77
    else
598
77
        LocInfo = CCValAssign::AExt;
599
128
  }
600
510
601
510
  if (LocVT == MVT::i64) {
602
190
    static const MCPhysReg RegList1[] = {
603
190
      PPC::X3, PPC::X4, PPC::X5, PPC::X6
604
190
    };
605
190
    if (unsigned Reg = State.AllocateReg(RegList1)) {
606
190
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
607
190
      return false;
608
190
    }
609
320
  }
610
320
611
320
  if (LocVT == MVT::i128) {
612
0
    static const MCPhysReg RegList2[] = {
613
0
      PPC::X3, PPC::X4, PPC::X5, PPC::X6
614
0
    };
615
0
    if (unsigned Reg = State.AllocateReg(RegList2)) {
616
0
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
617
0
      return false;
618
0
    }
619
320
  }
620
320
621
320
  if (LocVT == MVT::f32) {
622
11
    static const MCPhysReg RegList3[] = {
623
11
      PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8
624
11
    };
625
11
    if (unsigned Reg = State.AllocateReg(RegList3)) {
626
11
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
627
11
      return false;
628
11
    }
629
309
  }
630
309
631
309
  if (LocVT == MVT::f64) {
632
28
    static const MCPhysReg RegList4[] = {
633
28
      PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8
634
28
    };
635
28
    if (unsigned Reg = State.AllocateReg(RegList4)) {
636
28
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
637
28
      return false;
638
28
    }
639
281
  }
640
281
641
281
  if (LocVT == MVT::f128) {
642
0
    if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasP9Vector()) {
643
0
      static const MCPhysReg RegList5[] = {
644
0
        PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9
645
0
      };
646
0
      if (unsigned Reg = State.AllocateReg(RegList5)) {
647
0
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
648
0
        return false;
649
0
      }
650
281
    }
651
0
  }
652
281
653
281
  if (LocVT == MVT::v4f64 ||
654
281
      LocVT == MVT::v4f32 ||
655
281
      
LocVT == MVT::v4i1269
) {
656
12
    if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasQPX()) {
657
0
      static const MCPhysReg RegList6[] = {
658
0
        PPC::QF1, PPC::QF2
659
0
      };
660
0
      if (unsigned Reg = State.AllocateReg(RegList6)) {
661
0
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
662
0
        return false;
663
0
      }
664
281
    }
665
12
  }
666
281
667
281
  if (LocVT == MVT::v16i8 ||
668
281
      
LocVT == MVT::v8i16145
||
669
281
      
LocVT == MVT::v4i3271
||
670
281
      
LocVT == MVT::v2i6450
||
671
281
      
LocVT == MVT::v1i12834
||
672
281
      
LocVT == MVT::v4f3234
||
673
281
      
LocVT == MVT::v2f6422
) {
674
281
    if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasAltivec()) {
675
281
      static const MCPhysReg RegList7[] = {
676
281
        PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9
677
281
      };
678
281
      if (unsigned Reg = State.AllocateReg(RegList7)) {
679
281
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
680
281
        return false;
681
281
      }
682
0
    }
683
281
  }
684
0
685
0
  return true;  // CC didn't match.
686
0
}
Unexecuted instantiation: PPCISelLowering.cpp:RetCC_PPC64_ELF_FIS(unsigned int, llvm::MVT, llvm::MVT, llvm::CCValAssign::LocInfo, llvm::ISD::ArgFlagsTy, llvm::CCState&)
PPCFastISel.cpp:RetCC_PPC64_ELF_FIS(unsigned int, llvm::MVT, llvm::MVT, llvm::CCValAssign::LocInfo, llvm::ISD::ArgFlagsTy, llvm::CCState&)
Line
Count
Source
554
510
                                ISD::ArgFlagsTy ArgFlags, CCState &State) {
555
510
556
510
  if (State.getCallingConv() == CallingConv::AnyReg) {
557
0
    if (!RetCC_PPC64_AnyReg(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
558
0
      return false;
559
510
  }
560
510
561
510
  if (LocVT == MVT::i1) {
562
0
    LocVT = MVT::i64;
563
0
    if (ArgFlags.isSExt())
564
0
        LocInfo = CCValAssign::SExt;
565
0
    else if (ArgFlags.isZExt())
566
0
        LocInfo = CCValAssign::ZExt;
567
0
    else
568
0
        LocInfo = CCValAssign::AExt;
569
0
  }
570
510
571
510
  if (LocVT == MVT::i8) {
572
2
    LocVT = MVT::i64;
573
2
    if (ArgFlags.isSExt())
574
0
        LocInfo = CCValAssign::SExt;
575
2
    else if (ArgFlags.isZExt())
576
0
        LocInfo = CCValAssign::ZExt;
577
2
    else
578
2
        LocInfo = CCValAssign::AExt;
579
2
  }
580
510
581
510
  if (LocVT == MVT::i16) {
582
2
    LocVT = MVT::i64;
583
2
    if (ArgFlags.isSExt())
584
0
        LocInfo = CCValAssign::SExt;
585
2
    else if (ArgFlags.isZExt())
586
0
        LocInfo = CCValAssign::ZExt;
587
2
    else
588
2
        LocInfo = CCValAssign::AExt;
589
2
  }
590
510
591
510
  if (LocVT == MVT::i32) {
592
128
    LocVT = MVT::i64;
593
128
    if (ArgFlags.isSExt())
594
34
        LocInfo = CCValAssign::SExt;
595
94
    else if (ArgFlags.isZExt())
596
17
        LocInfo = CCValAssign::ZExt;
597
77
    else
598
77
        LocInfo = CCValAssign::AExt;
599
128
  }
600
510
601
510
  if (LocVT == MVT::i64) {
602
190
    static const MCPhysReg RegList1[] = {
603
190
      PPC::X3, PPC::X4, PPC::X5, PPC::X6
604
190
    };
605
190
    if (unsigned Reg = State.AllocateReg(RegList1)) {
606
190
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
607
190
      return false;
608
190
    }
609
320
  }
610
320
611
320
  if (LocVT == MVT::i128) {
612
0
    static const MCPhysReg RegList2[] = {
613
0
      PPC::X3, PPC::X4, PPC::X5, PPC::X6
614
0
    };
615
0
    if (unsigned Reg = State.AllocateReg(RegList2)) {
616
0
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
617
0
      return false;
618
0
    }
619
320
  }
620
320
621
320
  if (LocVT == MVT::f32) {
622
11
    static const MCPhysReg RegList3[] = {
623
11
      PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8
624
11
    };
625
11
    if (unsigned Reg = State.AllocateReg(RegList3)) {
626
11
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
627
11
      return false;
628
11
    }
629
309
  }
630
309
631
309
  if (LocVT == MVT::f64) {
632
28
    static const MCPhysReg RegList4[] = {
633
28
      PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8
634
28
    };
635
28
    if (unsigned Reg = State.AllocateReg(RegList4)) {
636
28
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
637
28
      return false;
638
28
    }
639
281
  }
640
281
641
281
  if (LocVT == MVT::f128) {
642
0
    if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasP9Vector()) {
643
0
      static const MCPhysReg RegList5[] = {
644
0
        PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9
645
0
      };
646
0
      if (unsigned Reg = State.AllocateReg(RegList5)) {
647
0
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
648
0
        return false;
649
0
      }
650
281
    }
651
0
  }
652
281
653
281
  if (LocVT == MVT::v4f64 ||
654
281
      LocVT == MVT::v4f32 ||
655
281
      
LocVT == MVT::v4i1269
) {
656
12
    if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasQPX()) {
657
0
      static const MCPhysReg RegList6[] = {
658
0
        PPC::QF1, PPC::QF2
659
0
      };
660
0
      if (unsigned Reg = State.AllocateReg(RegList6)) {
661
0
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
662
0
        return false;
663
0
      }
664
281
    }
665
12
  }
666
281
667
281
  if (LocVT == MVT::v16i8 ||
668
281
      
LocVT == MVT::v8i16145
||
669
281
      
LocVT == MVT::v4i3271
||
670
281
      
LocVT == MVT::v2i6450
||
671
281
      
LocVT == MVT::v1i12834
||
672
281
      
LocVT == MVT::v4f3234
||
673
281
      
LocVT == MVT::v2f6422
) {
674
281
    if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasAltivec()) {
675
281
      static const MCPhysReg RegList7[] = {
676
281
        PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9
677
281
      };
678
281
      if (unsigned Reg = State.AllocateReg(RegList7)) {
679
281
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
680
281
        return false;
681
281
      }
682
0
    }
683
281
  }
684
0
685
0
  return true;  // CC didn't match.
686
0
}
687
688
689
static bool RetCC_PPC_Cold(unsigned ValNo, MVT ValVT,
690
                           MVT LocVT, CCValAssign::LocInfo LocInfo,
691
8
                           ISD::ArgFlagsTy ArgFlags, CCState &State) {
692
8
693
8
  if (LocVT == MVT::i32 ||
694
8
      
LocVT == MVT::i14
) {
695
4
    if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).isPPC64()) {
696
4
      LocVT = MVT::i64;
697
4
      if (ArgFlags.isSExt())
698
4
            LocInfo = CCValAssign::SExt;
699
0
      else if (ArgFlags.isZExt())
700
0
            LocInfo = CCValAssign::ZExt;
701
0
      else
702
0
            LocInfo = CCValAssign::AExt;
703
4
    }
704
4
  }
705
8
706
8
  if (LocVT == MVT::i1) {
707
0
    if (!static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).isPPC64()) {
708
0
      LocVT = MVT::i32;
709
0
      if (ArgFlags.isSExt())
710
0
            LocInfo = CCValAssign::SExt;
711
0
      else if (ArgFlags.isZExt())
712
0
            LocInfo = CCValAssign::ZExt;
713
0
      else
714
0
            LocInfo = CCValAssign::AExt;
715
0
    }
716
0
  }
717
8
718
8
  if (LocVT == MVT::i32) {
719
0
    if (unsigned Reg = State.AllocateReg(PPC::R3)) {
720
0
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
721
0
      return false;
722
0
    }
723
8
  }
724
8
725
8
  if (LocVT == MVT::i64) {
726
8
    if (unsigned Reg = State.AllocateReg(PPC::X3)) {
727
6
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
728
6
      return false;
729
6
    }
730
2
  }
731
2
732
2
  if (LocVT == MVT::i128) {
733
0
    if (unsigned Reg = State.AllocateReg(PPC::X3)) {
734
0
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
735
0
      return false;
736
0
    }
737
2
  }
738
2
739
2
  if (LocVT == MVT::f32) {
740
0
    if (unsigned Reg = State.AllocateReg(PPC::F1)) {
741
0
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
742
0
      return false;
743
0
    }
744
2
  }
745
2
746
2
  if (LocVT == MVT::f64) {
747
0
    if (unsigned Reg = State.AllocateReg(PPC::F1)) {
748
0
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
749
0
      return false;
750
0
    }
751
2
  }
752
2
753
2
  if (LocVT == MVT::f128) {
754
0
    if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasP9Vector()) {
755
0
      if (unsigned Reg = State.AllocateReg(PPC::V2)) {
756
0
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
757
0
        return false;
758
0
      }
759
2
    }
760
0
  }
761
2
762
2
  if (LocVT == MVT::v4f64 ||
763
2
      LocVT == MVT::v4f32 ||
764
2
      LocVT == MVT::v4i1) {
765
0
    if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasQPX()) {
766
0
      if (unsigned Reg = State.AllocateReg(PPC::QF1)) {
767
0
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
768
0
        return false;
769
0
      }
770
2
    }
771
0
  }
772
2
773
2
  if (LocVT == MVT::v16i8 ||
774
2
      LocVT == MVT::v8i16 ||
775
2
      LocVT == MVT::v4i32 ||
776
2
      LocVT == MVT::v2i64 ||
777
2
      LocVT == MVT::v1i128 ||
778
2
      LocVT == MVT::v4f32 ||
779
2
      LocVT == MVT::v2f64) {
780
0
    if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasAltivec()) {
781
0
      if (unsigned Reg = State.AllocateReg(PPC::V2)) {
782
0
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
783
0
        return false;
784
0
      }
785
2
    }
786
0
  }
787
2
788
2
  return true;  // CC didn't match.
789
2
}
PPCISelLowering.cpp:RetCC_PPC_Cold(unsigned int, llvm::MVT, llvm::MVT, llvm::CCValAssign::LocInfo, llvm::ISD::ArgFlagsTy, llvm::CCState&)
Line
Count
Source
691
8
                           ISD::ArgFlagsTy ArgFlags, CCState &State) {
692
8
693
8
  if (LocVT == MVT::i32 ||
694
8
      
LocVT == MVT::i14
) {
695
4
    if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).isPPC64()) {
696
4
      LocVT = MVT::i64;
697
4
      if (ArgFlags.isSExt())
698
4
            LocInfo = CCValAssign::SExt;
699
0
      else if (ArgFlags.isZExt())
700
0
            LocInfo = CCValAssign::ZExt;
701
0
      else
702
0
            LocInfo = CCValAssign::AExt;
703
4
    }
704
4
  }
705
8
706
8
  if (LocVT == MVT::i1) {
707
0
    if (!static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).isPPC64()) {
708
0
      LocVT = MVT::i32;
709
0
      if (ArgFlags.isSExt())
710
0
            LocInfo = CCValAssign::SExt;
711
0
      else if (ArgFlags.isZExt())
712
0
            LocInfo = CCValAssign::ZExt;
713
0
      else
714
0
            LocInfo = CCValAssign::AExt;
715
0
    }
716
0
  }
717
8
718
8
  if (LocVT == MVT::i32) {
719
0
    if (unsigned Reg = State.AllocateReg(PPC::R3)) {
720
0
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
721
0
      return false;
722
0
    }
723
8
  }
724
8
725
8
  if (LocVT == MVT::i64) {
726
8
    if (unsigned Reg = State.AllocateReg(PPC::X3)) {
727
6
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
728
6
      return false;
729
6
    }
730
2
  }
731
2
732
2
  if (LocVT == MVT::i128) {
733
0
    if (unsigned Reg = State.AllocateReg(PPC::X3)) {
734
0
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
735
0
      return false;
736
0
    }
737
2
  }
738
2
739
2
  if (LocVT == MVT::f32) {
740
0
    if (unsigned Reg = State.AllocateReg(PPC::F1)) {
741
0
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
742
0
      return false;
743
0
    }
744
2
  }
745
2
746
2
  if (LocVT == MVT::f64) {
747
0
    if (unsigned Reg = State.AllocateReg(PPC::F1)) {
748
0
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
749
0
      return false;
750
0
    }
751
2
  }
752
2
753
2
  if (LocVT == MVT::f128) {
754
0
    if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasP9Vector()) {
755
0
      if (unsigned Reg = State.AllocateReg(PPC::V2)) {
756
0
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
757
0
        return false;
758
0
      }
759
2
    }
760
0
  }
761
2
762
2
  if (LocVT == MVT::v4f64 ||
763
2
      LocVT == MVT::v4f32 ||
764
2
      LocVT == MVT::v4i1) {
765
0
    if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasQPX()) {
766
0
      if (unsigned Reg = State.AllocateReg(PPC::QF1)) {
767
0
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
768
0
        return false;
769
0
      }
770
2
    }
771
0
  }
772
2
773
2
  if (LocVT == MVT::v16i8 ||
774
2
      LocVT == MVT::v8i16 ||
775
2
      LocVT == MVT::v4i32 ||
776
2
      LocVT == MVT::v2i64 ||
777
2
      LocVT == MVT::v1i128 ||
778
2
      LocVT == MVT::v4f32 ||
779
2
      LocVT == MVT::v2f64) {
780
0
    if (static_cast<const PPCSubtarget&>(State.getMachineFunction().getSubtarget()).hasAltivec()) {
781
0
      if (unsigned Reg = State.AllocateReg(PPC::V2)) {
782
0
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
783
0
        return false;
784
0
      }
785
2
    }
786
0
  }
787
2
788
2
  return true;  // CC didn't match.
789
2
}
Unexecuted instantiation: PPCFastISel.cpp:RetCC_PPC_Cold(unsigned int, llvm::MVT, llvm::MVT, llvm::CCValAssign::LocInfo, llvm::ISD::ArgFlagsTy, llvm::CCState&)