Coverage Report

Created: 2018-09-23 22:08

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/clang-build/lib/Target/PowerPC/PPCGenInstrInfo.inc
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1
/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2
|*                                                                            *|
3
|* Target Instruction Enum Values and Descriptors                             *|
4
|*                                                                            *|
5
|* Automatically generated file, do not edit!                                 *|
6
|*                                                                            *|
7
\*===----------------------------------------------------------------------===*/
8
9
#ifdef GET_INSTRINFO_ENUM
10
#undef GET_INSTRINFO_ENUM
11
namespace llvm {
12
13
namespace PPC {
14
  enum {
15
    PHI = 0,
16
    INLINEASM = 1,
17
    CFI_INSTRUCTION = 2,
18
    EH_LABEL  = 3,
19
    GC_LABEL  = 4,
20
    ANNOTATION_LABEL  = 5,
21
    KILL  = 6,
22
    EXTRACT_SUBREG  = 7,
23
    INSERT_SUBREG = 8,
24
    IMPLICIT_DEF  = 9,
25
    SUBREG_TO_REG = 10,
26
    COPY_TO_REGCLASS  = 11,
27
    DBG_VALUE = 12,
28
    DBG_LABEL = 13,
29
    REG_SEQUENCE  = 14,
30
    COPY  = 15,
31
    BUNDLE  = 16,
32
    LIFETIME_START  = 17,
33
    LIFETIME_END  = 18,
34
    STACKMAP  = 19,
35
    FENTRY_CALL = 20,
36
    PATCHPOINT  = 21,
37
    LOAD_STACK_GUARD  = 22,
38
    STATEPOINT  = 23,
39
    LOCAL_ESCAPE  = 24,
40
    FAULTING_OP = 25,
41
    PATCHABLE_OP  = 26,
42
    PATCHABLE_FUNCTION_ENTER  = 27,
43
    PATCHABLE_RET = 28,
44
    PATCHABLE_FUNCTION_EXIT = 29,
45
    PATCHABLE_TAIL_CALL = 30,
46
    PATCHABLE_EVENT_CALL  = 31,
47
    PATCHABLE_TYPED_EVENT_CALL  = 32,
48
    ICALL_BRANCH_FUNNEL = 33,
49
    G_ADD = 34,
50
    G_SUB = 35,
51
    G_MUL = 36,
52
    G_SDIV  = 37,
53
    G_UDIV  = 38,
54
    G_SREM  = 39,
55
    G_UREM  = 40,
56
    G_AND = 41,
57
    G_OR  = 42,
58
    G_XOR = 43,
59
    G_IMPLICIT_DEF  = 44,
60
    G_PHI = 45,
61
    G_FRAME_INDEX = 46,
62
    G_GLOBAL_VALUE  = 47,
63
    G_EXTRACT = 48,
64
    G_UNMERGE_VALUES  = 49,
65
    G_INSERT  = 50,
66
    G_MERGE_VALUES  = 51,
67
    G_PTRTOINT  = 52,
68
    G_INTTOPTR  = 53,
69
    G_BITCAST = 54,
70
    G_INTRINSIC_TRUNC = 55,
71
    G_INTRINSIC_ROUND = 56,
72
    G_LOAD  = 57,
73
    G_SEXTLOAD  = 58,
74
    G_ZEXTLOAD  = 59,
75
    G_STORE = 60,
76
    G_ATOMIC_CMPXCHG_WITH_SUCCESS = 61,
77
    G_ATOMIC_CMPXCHG  = 62,
78
    G_ATOMICRMW_XCHG  = 63,
79
    G_ATOMICRMW_ADD = 64,
80
    G_ATOMICRMW_SUB = 65,
81
    G_ATOMICRMW_AND = 66,
82
    G_ATOMICRMW_NAND  = 67,
83
    G_ATOMICRMW_OR  = 68,
84
    G_ATOMICRMW_XOR = 69,
85
    G_ATOMICRMW_MAX = 70,
86
    G_ATOMICRMW_MIN = 71,
87
    G_ATOMICRMW_UMAX  = 72,
88
    G_ATOMICRMW_UMIN  = 73,
89
    G_BRCOND  = 74,
90
    G_BRINDIRECT  = 75,
91
    G_INTRINSIC = 76,
92
    G_INTRINSIC_W_SIDE_EFFECTS  = 77,
93
    G_ANYEXT  = 78,
94
    G_TRUNC = 79,
95
    G_CONSTANT  = 80,
96
    G_FCONSTANT = 81,
97
    G_VASTART = 82,
98
    G_VAARG = 83,
99
    G_SEXT  = 84,
100
    G_ZEXT  = 85,
101
    G_SHL = 86,
102
    G_LSHR  = 87,
103
    G_ASHR  = 88,
104
    G_ICMP  = 89,
105
    G_FCMP  = 90,
106
    G_SELECT  = 91,
107
    G_UADDO = 92,
108
    G_UADDE = 93,
109
    G_USUBO = 94,
110
    G_USUBE = 95,
111
    G_SADDO = 96,
112
    G_SADDE = 97,
113
    G_SSUBO = 98,
114
    G_SSUBE = 99,
115
    G_UMULO = 100,
116
    G_SMULO = 101,
117
    G_UMULH = 102,
118
    G_SMULH = 103,
119
    G_FADD  = 104,
120
    G_FSUB  = 105,
121
    G_FMUL  = 106,
122
    G_FMA = 107,
123
    G_FDIV  = 108,
124
    G_FREM  = 109,
125
    G_FPOW  = 110,
126
    G_FEXP  = 111,
127
    G_FEXP2 = 112,
128
    G_FLOG  = 113,
129
    G_FLOG2 = 114,
130
    G_FNEG  = 115,
131
    G_FPEXT = 116,
132
    G_FPTRUNC = 117,
133
    G_FPTOSI  = 118,
134
    G_FPTOUI  = 119,
135
    G_SITOFP  = 120,
136
    G_UITOFP  = 121,
137
    G_FABS  = 122,
138
    G_GEP = 123,
139
    G_PTR_MASK  = 124,
140
    G_BR  = 125,
141
    G_INSERT_VECTOR_ELT = 126,
142
    G_EXTRACT_VECTOR_ELT  = 127,
143
    G_SHUFFLE_VECTOR  = 128,
144
    G_CTTZ  = 129,
145
    G_CTTZ_ZERO_UNDEF = 130,
146
    G_CTLZ  = 131,
147
    G_CTLZ_ZERO_UNDEF = 132,
148
    G_CTPOP = 133,
149
    G_BSWAP = 134,
150
    G_ADDRSPACE_CAST  = 135,
151
    G_BLOCK_ADDR  = 136,
152
    CFENCE8 = 137,
153
    CLRLSLDI  = 138,
154
    CLRLSLDIo = 139,
155
    CLRLSLWI  = 140,
156
    CLRLSLWIo = 141,
157
    CLRRDI  = 142,
158
    CLRRDIo = 143,
159
    CLRRWI  = 144,
160
    CLRRWIo = 145,
161
    CP_COPY_FIRST = 146,
162
    CP_COPYx  = 147,
163
    CP_PASTE_LAST = 148,
164
    CP_PASTEx = 149,
165
    DCBFL = 150,
166
    DCBFLP  = 151,
167
    DCBFx = 152,
168
    DCBTCT  = 153,
169
    DCBTDS  = 154,
170
    DCBTSTCT  = 155,
171
    DCBTSTDS  = 156,
172
    DCBTSTT = 157,
173
    DCBTSTx = 158,
174
    DCBTT = 159,
175
    DCBTx = 160,
176
    DFLOADf32 = 161,
177
    DFLOADf64 = 162,
178
    DFSTOREf32  = 163,
179
    DFSTOREf64  = 164,
180
    EXTLDI  = 165,
181
    EXTLDIo = 166,
182
    EXTLWI  = 167,
183
    EXTLWIo = 168,
184
    EXTRDI  = 169,
185
    EXTRDIo = 170,
186
    EXTRWI  = 171,
187
    EXTRWIo = 172,
188
    INSLWI  = 173,
189
    INSLWIo = 174,
190
    INSRDI  = 175,
191
    INSRDIo = 176,
192
    INSRWI  = 177,
193
    INSRWIo = 178,
194
    LAx = 179,
195
    LIWAX = 180,
196
    LIWZX = 181,
197
    RLWIMIbm  = 182,
198
    RLWIMIobm = 183,
199
    RLWINMbm  = 184,
200
    RLWINMobm = 185,
201
    RLWNMbm = 186,
202
    RLWNMobm  = 187,
203
    ROTRDI  = 188,
204
    ROTRDIo = 189,
205
    ROTRWI  = 190,
206
    ROTRWIo = 191,
207
    SLDI  = 192,
208
    SLDIo = 193,
209
    SLWI  = 194,
210
    SLWIo = 195,
211
    SPILLTOVSR_LD = 196,
212
    SPILLTOVSR_LDX  = 197,
213
    SPILLTOVSR_ST = 198,
214
    SPILLTOVSR_STX  = 199,
215
    SRDI  = 200,
216
    SRDIo = 201,
217
    SRWI  = 202,
218
    SRWIo = 203,
219
    STIWX = 204,
220
    SUBI  = 205,
221
    SUBIC = 206,
222
    SUBICo  = 207,
223
    SUBIS = 208,
224
    SUBPCIS = 209,
225
    XFLOADf32 = 210,
226
    XFLOADf64 = 211,
227
    XFSTOREf32  = 212,
228
    XFSTOREf64  = 213,
229
    ADD4  = 214,
230
    ADD4TLS = 215,
231
    ADD4o = 216,
232
    ADD8  = 217,
233
    ADD8TLS = 218,
234
    ADD8TLS_  = 219,
235
    ADD8o = 220,
236
    ADDC  = 221,
237
    ADDC8 = 222,
238
    ADDC8o  = 223,
239
    ADDCo = 224,
240
    ADDE  = 225,
241
    ADDE8 = 226,
242
    ADDE8o  = 227,
243
    ADDEo = 228,
244
    ADDI  = 229,
245
    ADDI8 = 230,
246
    ADDIC = 231,
247
    ADDIC8  = 232,
248
    ADDICo  = 233,
249
    ADDIS = 234,
250
    ADDIS8  = 235,
251
    ADDISdtprelHA = 236,
252
    ADDISdtprelHA32 = 237,
253
    ADDISgotTprelHA = 238,
254
    ADDIStlsgdHA  = 239,
255
    ADDIStlsldHA  = 240,
256
    ADDIStocHA  = 241,
257
    ADDIdtprelL = 242,
258
    ADDIdtprelL32 = 243,
259
    ADDItlsgdL  = 244,
260
    ADDItlsgdL32  = 245,
261
    ADDItlsgdLADDR  = 246,
262
    ADDItlsgdLADDR32  = 247,
263
    ADDItlsldL  = 248,
264
    ADDItlsldL32  = 249,
265
    ADDItlsldLADDR  = 250,
266
    ADDItlsldLADDR32  = 251,
267
    ADDItocL  = 252,
268
    ADDME = 253,
269
    ADDME8  = 254,
270
    ADDME8o = 255,
271
    ADDMEo  = 256,
272
    ADDPCIS = 257,
273
    ADDZE = 258,
274
    ADDZE8  = 259,
275
    ADDZE8o = 260,
276
    ADDZEo  = 261,
277
    ADJCALLSTACKDOWN  = 262,
278
    ADJCALLSTACKUP  = 263,
279
    AND = 264,
280
    AND8  = 265,
281
    AND8o = 266,
282
    ANDC  = 267,
283
    ANDC8 = 268,
284
    ANDC8o  = 269,
285
    ANDCo = 270,
286
    ANDISo  = 271,
287
    ANDISo8 = 272,
288
    ANDIo = 273,
289
    ANDIo8  = 274,
290
    ANDIo_1_EQ_BIT  = 275,
291
    ANDIo_1_EQ_BIT8 = 276,
292
    ANDIo_1_GT_BIT  = 277,
293
    ANDIo_1_GT_BIT8 = 278,
294
    ANDo  = 279,
295
    ATOMIC_CMP_SWAP_I16 = 280,
296
    ATOMIC_CMP_SWAP_I32 = 281,
297
    ATOMIC_CMP_SWAP_I64 = 282,
298
    ATOMIC_CMP_SWAP_I8  = 283,
299
    ATOMIC_LOAD_ADD_I16 = 284,
300
    ATOMIC_LOAD_ADD_I32 = 285,
301
    ATOMIC_LOAD_ADD_I64 = 286,
302
    ATOMIC_LOAD_ADD_I8  = 287,
303
    ATOMIC_LOAD_AND_I16 = 288,
304
    ATOMIC_LOAD_AND_I32 = 289,
305
    ATOMIC_LOAD_AND_I64 = 290,
306
    ATOMIC_LOAD_AND_I8  = 291,
307
    ATOMIC_LOAD_MAX_I16 = 292,
308
    ATOMIC_LOAD_MAX_I32 = 293,
309
    ATOMIC_LOAD_MAX_I64 = 294,
310
    ATOMIC_LOAD_MAX_I8  = 295,
311
    ATOMIC_LOAD_MIN_I16 = 296,
312
    ATOMIC_LOAD_MIN_I32 = 297,
313
    ATOMIC_LOAD_MIN_I64 = 298,
314
    ATOMIC_LOAD_MIN_I8  = 299,
315
    ATOMIC_LOAD_NAND_I16  = 300,
316
    ATOMIC_LOAD_NAND_I32  = 301,
317
    ATOMIC_LOAD_NAND_I64  = 302,
318
    ATOMIC_LOAD_NAND_I8 = 303,
319
    ATOMIC_LOAD_OR_I16  = 304,
320
    ATOMIC_LOAD_OR_I32  = 305,
321
    ATOMIC_LOAD_OR_I64  = 306,
322
    ATOMIC_LOAD_OR_I8 = 307,
323
    ATOMIC_LOAD_SUB_I16 = 308,
324
    ATOMIC_LOAD_SUB_I32 = 309,
325
    ATOMIC_LOAD_SUB_I64 = 310,
326
    ATOMIC_LOAD_SUB_I8  = 311,
327
    ATOMIC_LOAD_UMAX_I16  = 312,
328
    ATOMIC_LOAD_UMAX_I32  = 313,
329
    ATOMIC_LOAD_UMAX_I64  = 314,
330
    ATOMIC_LOAD_UMAX_I8 = 315,
331
    ATOMIC_LOAD_UMIN_I16  = 316,
332
    ATOMIC_LOAD_UMIN_I32  = 317,
333
    ATOMIC_LOAD_UMIN_I64  = 318,
334
    ATOMIC_LOAD_UMIN_I8 = 319,
335
    ATOMIC_LOAD_XOR_I16 = 320,
336
    ATOMIC_LOAD_XOR_I32 = 321,
337
    ATOMIC_LOAD_XOR_I64 = 322,
338
    ATOMIC_LOAD_XOR_I8  = 323,
339
    ATOMIC_SWAP_I16 = 324,
340
    ATOMIC_SWAP_I32 = 325,
341
    ATOMIC_SWAP_I64 = 326,
342
    ATOMIC_SWAP_I8  = 327,
343
    ATTN  = 328,
344
    B = 329,
345
    BA  = 330,
346
    BC  = 331,
347
    BCC = 332,
348
    BCCA  = 333,
349
    BCCCTR  = 334,
350
    BCCCTR8 = 335,
351
    BCCCTRL = 336,
352
    BCCCTRL8  = 337,
353
    BCCL  = 338,
354
    BCCLA = 339,
355
    BCCLR = 340,
356
    BCCLRL  = 341,
357
    BCCTR = 342,
358
    BCCTR8  = 343,
359
    BCCTR8n = 344,
360
    BCCTRL  = 345,
361
    BCCTRL8 = 346,
362
    BCCTRL8n  = 347,
363
    BCCTRLn = 348,
364
    BCCTRn  = 349,
365
    BCDCFNo = 350,
366
    BCDCFSQo  = 351,
367
    BCDCFZo = 352,
368
    BCDCPSGNo = 353,
369
    BCDCTNo = 354,
370
    BCDCTSQo  = 355,
371
    BCDCTZo = 356,
372
    BCDSETSGNo  = 357,
373
    BCDSRo  = 358,
374
    BCDSo = 359,
375
    BCDTRUNCo = 360,
376
    BCDUSo  = 361,
377
    BCDUTRUNCo  = 362,
378
    BCL = 363,
379
    BCLR  = 364,
380
    BCLRL = 365,
381
    BCLRLn  = 366,
382
    BCLRn = 367,
383
    BCLalways = 368,
384
    BCLn  = 369,
385
    BCTR  = 370,
386
    BCTR8 = 371,
387
    BCTRL = 372,
388
    BCTRL8  = 373,
389
    BCTRL8_LDinto_toc = 374,
390
    BCn = 375,
391
    BDNZ  = 376,
392
    BDNZ8 = 377,
393
    BDNZA = 378,
394
    BDNZAm  = 379,
395
    BDNZAp  = 380,
396
    BDNZL = 381,
397
    BDNZLA  = 382,
398
    BDNZLAm = 383,
399
    BDNZLAp = 384,
400
    BDNZLR  = 385,
401
    BDNZLR8 = 386,
402
    BDNZLRL = 387,
403
    BDNZLRLm  = 388,
404
    BDNZLRLp  = 389,
405
    BDNZLRm = 390,
406
    BDNZLRp = 391,
407
    BDNZLm  = 392,
408
    BDNZLp  = 393,
409
    BDNZm = 394,
410
    BDNZp = 395,
411
    BDZ = 396,
412
    BDZ8  = 397,
413
    BDZA  = 398,
414
    BDZAm = 399,
415
    BDZAp = 400,
416
    BDZL  = 401,
417
    BDZLA = 402,
418
    BDZLAm  = 403,
419
    BDZLAp  = 404,
420
    BDZLR = 405,
421
    BDZLR8  = 406,
422
    BDZLRL  = 407,
423
    BDZLRLm = 408,
424
    BDZLRLp = 409,
425
    BDZLRm  = 410,
426
    BDZLRp  = 411,
427
    BDZLm = 412,
428
    BDZLp = 413,
429
    BDZm  = 414,
430
    BDZp  = 415,
431
    BL  = 416,
432
    BL8 = 417,
433
    BL8_NOP = 418,
434
    BL8_NOP_TLS = 419,
435
    BL8_TLS = 420,
436
    BL8_TLS_  = 421,
437
    BLA = 422,
438
    BLA8  = 423,
439
    BLA8_NOP  = 424,
440
    BLR = 425,
441
    BLR8  = 426,
442
    BLRL  = 427,
443
    BL_TLS  = 428,
444
    BPERMD  = 429,
445
    BRINC = 430,
446
    CLRBHRB = 431,
447
    CMPB  = 432,
448
    CMPB8 = 433,
449
    CMPD  = 434,
450
    CMPDI = 435,
451
    CMPEQB  = 436,
452
    CMPLD = 437,
453
    CMPLDI  = 438,
454
    CMPLW = 439,
455
    CMPLWI  = 440,
456
    CMPRB = 441,
457
    CMPRB8  = 442,
458
    CMPW  = 443,
459
    CMPWI = 444,
460
    CNTLZD  = 445,
461
    CNTLZDo = 446,
462
    CNTLZW  = 447,
463
    CNTLZW8 = 448,
464
    CNTLZW8o  = 449,
465
    CNTLZWo = 450,
466
    CNTTZD  = 451,
467
    CNTTZDo = 452,
468
    CNTTZW  = 453,
469
    CNTTZW8 = 454,
470
    CNTTZW8o  = 455,
471
    CNTTZWo = 456,
472
    CP_ABORT  = 457,
473
    CP_COPY = 458,
474
    CP_COPY8  = 459,
475
    CP_PASTE  = 460,
476
    CP_PASTE8 = 461,
477
    CP_PASTE8o  = 462,
478
    CP_PASTEo = 463,
479
    CR6SET  = 464,
480
    CR6UNSET  = 465,
481
    CRAND = 466,
482
    CRANDC  = 467,
483
    CREQV = 468,
484
    CRNAND  = 469,
485
    CRNOR = 470,
486
    CROR  = 471,
487
    CRORC = 472,
488
    CRSET = 473,
489
    CRUNSET = 474,
490
    CRXOR = 475,
491
    CTRL_DEP  = 476,
492
    DARN  = 477,
493
    DCBA  = 478,
494
    DCBF  = 479,
495
    DCBFEP  = 480,
496
    DCBI  = 481,
497
    DCBST = 482,
498
    DCBSTEP = 483,
499
    DCBT  = 484,
500
    DCBTEP  = 485,
501
    DCBTST  = 486,
502
    DCBTSTEP  = 487,
503
    DCBZ  = 488,
504
    DCBZEP  = 489,
505
    DCBZL = 490,
506
    DCBZLEP = 491,
507
    DCCCI = 492,
508
    DIVD  = 493,
509
    DIVDE = 494,
510
    DIVDEU  = 495,
511
    DIVDEUo = 496,
512
    DIVDEo  = 497,
513
    DIVDU = 498,
514
    DIVDUo  = 499,
515
    DIVDo = 500,
516
    DIVW  = 501,
517
    DIVWE = 502,
518
    DIVWEU  = 503,
519
    DIVWEUo = 504,
520
    DIVWEo  = 505,
521
    DIVWU = 506,
522
    DIVWUo  = 507,
523
    DIVWo = 508,
524
    DSS = 509,
525
    DSSALL  = 510,
526
    DST = 511,
527
    DST64 = 512,
528
    DSTST = 513,
529
    DSTST64 = 514,
530
    DSTSTT  = 515,
531
    DSTSTT64  = 516,
532
    DSTT  = 517,
533
    DSTT64  = 518,
534
    DYNALLOC  = 519,
535
    DYNALLOC8 = 520,
536
    DYNAREAOFFSET = 521,
537
    DYNAREAOFFSET8  = 522,
538
    EFDABS  = 523,
539
    EFDADD  = 524,
540
    EFDCFS  = 525,
541
    EFDCFSF = 526,
542
    EFDCFSI = 527,
543
    EFDCFSID  = 528,
544
    EFDCFUF = 529,
545
    EFDCFUI = 530,
546
    EFDCFUID  = 531,
547
    EFDCMPEQ  = 532,
548
    EFDCMPGT  = 533,
549
    EFDCMPLT  = 534,
550
    EFDCTSF = 535,
551
    EFDCTSI = 536,
552
    EFDCTSIDZ = 537,
553
    EFDCTSIZ  = 538,
554
    EFDCTUF = 539,
555
    EFDCTUI = 540,
556
    EFDCTUIDZ = 541,
557
    EFDCTUIZ  = 542,
558
    EFDDIV  = 543,
559
    EFDMUL  = 544,
560
    EFDNABS = 545,
561
    EFDNEG  = 546,
562
    EFDSUB  = 547,
563
    EFDTSTEQ  = 548,
564
    EFDTSTGT  = 549,
565
    EFDTSTLT  = 550,
566
    EFSABS  = 551,
567
    EFSADD  = 552,
568
    EFSCFD  = 553,
569
    EFSCFSF = 554,
570
    EFSCFSI = 555,
571
    EFSCFUF = 556,
572
    EFSCFUI = 557,
573
    EFSCMPEQ  = 558,
574
    EFSCMPGT  = 559,
575
    EFSCMPLT  = 560,
576
    EFSCTSF = 561,
577
    EFSCTSI = 562,
578
    EFSCTSIZ  = 563,
579
    EFSCTUF = 564,
580
    EFSCTUI = 565,
581
    EFSCTUIZ  = 566,
582
    EFSDIV  = 567,
583
    EFSMUL  = 568,
584
    EFSNABS = 569,
585
    EFSNEG  = 570,
586
    EFSSUB  = 571,
587
    EFSTSTEQ  = 572,
588
    EFSTSTGT  = 573,
589
    EFSTSTLT  = 574,
590
    EH_SjLj_LongJmp32 = 575,
591
    EH_SjLj_LongJmp64 = 576,
592
    EH_SjLj_SetJmp32  = 577,
593
    EH_SjLj_SetJmp64  = 578,
594
    EH_SjLj_Setup = 579,
595
    EQV = 580,
596
    EQV8  = 581,
597
    EQV8o = 582,
598
    EQVo  = 583,
599
    EVABS = 584,
600
    EVADDIW = 585,
601
    EVADDSMIAAW = 586,
602
    EVADDSSIAAW = 587,
603
    EVADDUMIAAW = 588,
604
    EVADDUSIAAW = 589,
605
    EVADDW  = 590,
606
    EVAND = 591,
607
    EVANDC  = 592,
608
    EVCMPEQ = 593,
609
    EVCMPGTS  = 594,
610
    EVCMPGTU  = 595,
611
    EVCMPLTS  = 596,
612
    EVCMPLTU  = 597,
613
    EVCNTLSW  = 598,
614
    EVCNTLZW  = 599,
615
    EVDIVWS = 600,
616
    EVDIVWU = 601,
617
    EVEQV = 602,
618
    EVEXTSB = 603,
619
    EVEXTSH = 604,
620
    EVFSABS = 605,
621
    EVFSADD = 606,
622
    EVFSCFSF  = 607,
623
    EVFSCFSI  = 608,
624
    EVFSCFUF  = 609,
625
    EVFSCFUI  = 610,
626
    EVFSCMPEQ = 611,
627
    EVFSCMPGT = 612,
628
    EVFSCMPLT = 613,
629
    EVFSCTSF  = 614,
630
    EVFSCTSI  = 615,
631
    EVFSCTSIZ = 616,
632
    EVFSCTUF  = 617,
633
    EVFSCTUI  = 618,
634
    EVFSCTUIZ = 619,
635
    EVFSDIV = 620,
636
    EVFSMUL = 621,
637
    EVFSNABS  = 622,
638
    EVFSNEG = 623,
639
    EVFSSUB = 624,
640
    EVFSTSTEQ = 625,
641
    EVFSTSTGT = 626,
642
    EVFSTSTLT = 627,
643
    EVLDD = 628,
644
    EVLDDX  = 629,
645
    EVLDH = 630,
646
    EVLDHX  = 631,
647
    EVLDW = 632,
648
    EVLDWX  = 633,
649
    EVLHHESPLAT = 634,
650
    EVLHHESPLATX  = 635,
651
    EVLHHOSSPLAT  = 636,
652
    EVLHHOSSPLATX = 637,
653
    EVLHHOUSPLAT  = 638,
654
    EVLHHOUSPLATX = 639,
655
    EVLWHE  = 640,
656
    EVLWHEX = 641,
657
    EVLWHOS = 642,
658
    EVLWHOSX  = 643,
659
    EVLWHOU = 644,
660
    EVLWHOUX  = 645,
661
    EVLWHSPLAT  = 646,
662
    EVLWHSPLATX = 647,
663
    EVLWWSPLAT  = 648,
664
    EVLWWSPLATX = 649,
665
    EVMERGEHI = 650,
666
    EVMERGEHILO = 651,
667
    EVMERGELO = 652,
668
    EVMERGELOHI = 653,
669
    EVMHEGSMFAA = 654,
670
    EVMHEGSMFAN = 655,
671
    EVMHEGSMIAA = 656,
672
    EVMHEGSMIAN = 657,
673
    EVMHEGUMIAA = 658,
674
    EVMHEGUMIAN = 659,
675
    EVMHESMF  = 660,
676
    EVMHESMFA = 661,
677
    EVMHESMFAAW = 662,
678
    EVMHESMFANW = 663,
679
    EVMHESMI  = 664,
680
    EVMHESMIA = 665,
681
    EVMHESMIAAW = 666,
682
    EVMHESMIANW = 667,
683
    EVMHESSF  = 668,
684
    EVMHESSFA = 669,
685
    EVMHESSFAAW = 670,
686
    EVMHESSFANW = 671,
687
    EVMHESSIAAW = 672,
688
    EVMHESSIANW = 673,
689
    EVMHEUMI  = 674,
690
    EVMHEUMIA = 675,
691
    EVMHEUMIAAW = 676,
692
    EVMHEUMIANW = 677,
693
    EVMHEUSIAAW = 678,
694
    EVMHEUSIANW = 679,
695
    EVMHOGSMFAA = 680,
696
    EVMHOGSMFAN = 681,
697
    EVMHOGSMIAA = 682,
698
    EVMHOGSMIAN = 683,
699
    EVMHOGUMIAA = 684,
700
    EVMHOGUMIAN = 685,
701
    EVMHOSMF  = 686,
702
    EVMHOSMFA = 687,
703
    EVMHOSMFAAW = 688,
704
    EVMHOSMFANW = 689,
705
    EVMHOSMI  = 690,
706
    EVMHOSMIA = 691,
707
    EVMHOSMIAAW = 692,
708
    EVMHOSMIANW = 693,
709
    EVMHOSSF  = 694,
710
    EVMHOSSFA = 695,
711
    EVMHOSSFAAW = 696,
712
    EVMHOSSFANW = 697,
713
    EVMHOSSIAAW = 698,
714
    EVMHOSSIANW = 699,
715
    EVMHOUMI  = 700,
716
    EVMHOUMIA = 701,
717
    EVMHOUMIAAW = 702,
718
    EVMHOUMIANW = 703,
719
    EVMHOUSIAAW = 704,
720
    EVMHOUSIANW = 705,
721
    EVMRA = 706,
722
    EVMWHSMF  = 707,
723
    EVMWHSMFA = 708,
724
    EVMWHSMI  = 709,
725
    EVMWHSMIA = 710,
726
    EVMWHSSF  = 711,
727
    EVMWHSSFA = 712,
728
    EVMWHUMI  = 713,
729
    EVMWHUMIA = 714,
730
    EVMWLSMIAAW = 715,
731
    EVMWLSMIANW = 716,
732
    EVMWLSSIAAW = 717,
733
    EVMWLSSIANW = 718,
734
    EVMWLUMI  = 719,
735
    EVMWLUMIA = 720,
736
    EVMWLUMIAAW = 721,
737
    EVMWLUMIANW = 722,
738
    EVMWLUSIAAW = 723,
739
    EVMWLUSIANW = 724,
740
    EVMWSMF = 725,
741
    EVMWSMFA  = 726,
742
    EVMWSMFAA = 727,
743
    EVMWSMFAN = 728,
744
    EVMWSMI = 729,
745
    EVMWSMIA  = 730,
746
    EVMWSMIAA = 731,
747
    EVMWSMIAN = 732,
748
    EVMWSSF = 733,
749
    EVMWSSFA  = 734,
750
    EVMWSSFAA = 735,
751
    EVMWSSFAN = 736,
752
    EVMWUMI = 737,
753
    EVMWUMIA  = 738,
754
    EVMWUMIAA = 739,
755
    EVMWUMIAN = 740,
756
    EVNAND  = 741,
757
    EVNEG = 742,
758
    EVNOR = 743,
759
    EVOR  = 744,
760
    EVORC = 745,
761
    EVRLW = 746,
762
    EVRLWI  = 747,
763
    EVRNDW  = 748,
764
    EVSEL = 749,
765
    EVSLW = 750,
766
    EVSLWI  = 751,
767
    EVSPLATFI = 752,
768
    EVSPLATI  = 753,
769
    EVSRWIS = 754,
770
    EVSRWIU = 755,
771
    EVSRWS  = 756,
772
    EVSRWU  = 757,
773
    EVSTDD  = 758,
774
    EVSTDDX = 759,
775
    EVSTDH  = 760,
776
    EVSTDHX = 761,
777
    EVSTDW  = 762,
778
    EVSTDWX = 763,
779
    EVSTWHE = 764,
780
    EVSTWHEX  = 765,
781
    EVSTWHO = 766,
782
    EVSTWHOX  = 767,
783
    EVSTWWE = 768,
784
    EVSTWWEX  = 769,
785
    EVSTWWO = 770,
786
    EVSTWWOX  = 771,
787
    EVSUBFSMIAAW  = 772,
788
    EVSUBFSSIAAW  = 773,
789
    EVSUBFUMIAAW  = 774,
790
    EVSUBFUSIAAW  = 775,
791
    EVSUBFW = 776,
792
    EVSUBIFW  = 777,
793
    EVXOR = 778,
794
    EXTSB = 779,
795
    EXTSB8  = 780,
796
    EXTSB8_32_64  = 781,
797
    EXTSB8o = 782,
798
    EXTSBo  = 783,
799
    EXTSH = 784,
800
    EXTSH8  = 785,
801
    EXTSH8_32_64  = 786,
802
    EXTSH8o = 787,
803
    EXTSHo  = 788,
804
    EXTSW = 789,
805
    EXTSWSLI  = 790,
806
    EXTSWSLIo = 791,
807
    EXTSW_32  = 792,
808
    EXTSW_32_64 = 793,
809
    EXTSW_32_64o  = 794,
810
    EXTSWo  = 795,
811
    EnforceIEIO = 796,
812
    FABSD = 797,
813
    FABSDo  = 798,
814
    FABSS = 799,
815
    FABSSo  = 800,
816
    FADD  = 801,
817
    FADDS = 802,
818
    FADDSo  = 803,
819
    FADDo = 804,
820
    FADDrtz = 805,
821
    FCFID = 806,
822
    FCFIDS  = 807,
823
    FCFIDSo = 808,
824
    FCFIDU  = 809,
825
    FCFIDUS = 810,
826
    FCFIDUSo  = 811,
827
    FCFIDUo = 812,
828
    FCFIDo  = 813,
829
    FCMPUD  = 814,
830
    FCMPUS  = 815,
831
    FCPSGND = 816,
832
    FCPSGNDo  = 817,
833
    FCPSGNS = 818,
834
    FCPSGNSo  = 819,
835
    FCTID = 820,
836
    FCTIDU  = 821,
837
    FCTIDUZ = 822,
838
    FCTIDUZo  = 823,
839
    FCTIDUo = 824,
840
    FCTIDZ  = 825,
841
    FCTIDZo = 826,
842
    FCTIDo  = 827,
843
    FCTIW = 828,
844
    FCTIWU  = 829,
845
    FCTIWUZ = 830,
846
    FCTIWUZo  = 831,
847
    FCTIWUo = 832,
848
    FCTIWZ  = 833,
849
    FCTIWZo = 834,
850
    FCTIWo  = 835,
851
    FDIV  = 836,
852
    FDIVS = 837,
853
    FDIVSo  = 838,
854
    FDIVo = 839,
855
    FMADD = 840,
856
    FMADDS  = 841,
857
    FMADDSo = 842,
858
    FMADDo  = 843,
859
    FMR = 844,
860
    FMRo  = 845,
861
    FMSUB = 846,
862
    FMSUBS  = 847,
863
    FMSUBSo = 848,
864
    FMSUBo  = 849,
865
    FMUL  = 850,
866
    FMULS = 851,
867
    FMULSo  = 852,
868
    FMULo = 853,
869
    FNABSD  = 854,
870
    FNABSDo = 855,
871
    FNABSS  = 856,
872
    FNABSSo = 857,
873
    FNEGD = 858,
874
    FNEGDo  = 859,
875
    FNEGS = 860,
876
    FNEGSo  = 861,
877
    FNMADD  = 862,
878
    FNMADDS = 863,
879
    FNMADDSo  = 864,
880
    FNMADDo = 865,
881
    FNMSUB  = 866,
882
    FNMSUBS = 867,
883
    FNMSUBSo  = 868,
884
    FNMSUBo = 869,
885
    FRE = 870,
886
    FRES  = 871,
887
    FRESo = 872,
888
    FREo  = 873,
889
    FRIMD = 874,
890
    FRIMDo  = 875,
891
    FRIMS = 876,
892
    FRIMSo  = 877,
893
    FRIND = 878,
894
    FRINDo  = 879,
895
    FRINS = 880,
896
    FRINSo  = 881,
897
    FRIPD = 882,
898
    FRIPDo  = 883,
899
    FRIPS = 884,
900
    FRIPSo  = 885,
901
    FRIZD = 886,
902
    FRIZDo  = 887,
903
    FRIZS = 888,
904
    FRIZSo  = 889,
905
    FRSP  = 890,
906
    FRSPo = 891,
907
    FRSQRTE = 892,
908
    FRSQRTES  = 893,
909
    FRSQRTESo = 894,
910
    FRSQRTEo  = 895,
911
    FSELD = 896,
912
    FSELDo  = 897,
913
    FSELS = 898,
914
    FSELSo  = 899,
915
    FSQRT = 900,
916
    FSQRTS  = 901,
917
    FSQRTSo = 902,
918
    FSQRTo  = 903,
919
    FSUB  = 904,
920
    FSUBS = 905,
921
    FSUBSo  = 906,
922
    FSUBo = 907,
923
    FTDIV = 908,
924
    FTSQRT  = 909,
925
    GETtlsADDR  = 910,
926
    GETtlsADDR32  = 911,
927
    GETtlsldADDR  = 912,
928
    GETtlsldADDR32  = 913,
929
    HRFID = 914,
930
    ICBI  = 915,
931
    ICBIEP  = 916,
932
    ICBLC = 917,
933
    ICBLQ = 918,
934
    ICBT  = 919,
935
    ICBTLS  = 920,
936
    ICCCI = 921,
937
    ISEL  = 922,
938
    ISEL8 = 923,
939
    ISYNC = 924,
940
    LA  = 925,
941
    LBARX = 926,
942
    LBARXL  = 927,
943
    LBEPX = 928,
944
    LBZ = 929,
945
    LBZ8  = 930,
946
    LBZCIX  = 931,
947
    LBZU  = 932,
948
    LBZU8 = 933,
949
    LBZUX = 934,
950
    LBZUX8  = 935,
951
    LBZX  = 936,
952
    LBZX8 = 937,
953
    LBZXTLS = 938,
954
    LBZXTLS_  = 939,
955
    LBZXTLS_32  = 940,
956
    LD  = 941,
957
    LDARX = 942,
958
    LDARXL  = 943,
959
    LDAT  = 944,
960
    LDBRX = 945,
961
    LDCIX = 946,
962
    LDMX  = 947,
963
    LDU = 948,
964
    LDUX  = 949,
965
    LDX = 950,
966
    LDXTLS  = 951,
967
    LDXTLS_ = 952,
968
    LDgotTprelL = 953,
969
    LDgotTprelL32 = 954,
970
    LDtoc = 955,
971
    LDtocBA = 956,
972
    LDtocCPT  = 957,
973
    LDtocJTI  = 958,
974
    LDtocL  = 959,
975
    LFD = 960,
976
    LFDEPX  = 961,
977
    LFDU  = 962,
978
    LFDUX = 963,
979
    LFDX  = 964,
980
    LFIWAX  = 965,
981
    LFIWZX  = 966,
982
    LFS = 967,
983
    LFSU  = 968,
984
    LFSUX = 969,
985
    LFSX  = 970,
986
    LHA = 971,
987
    LHA8  = 972,
988
    LHARX = 973,
989
    LHARXL  = 974,
990
    LHAU  = 975,
991
    LHAU8 = 976,
992
    LHAUX = 977,
993
    LHAUX8  = 978,
994
    LHAX  = 979,
995
    LHAX8 = 980,
996
    LHBRX = 981,
997
    LHBRX8  = 982,
998
    LHEPX = 983,
999
    LHZ = 984,
1000
    LHZ8  = 985,
1001
    LHZCIX  = 986,
1002
    LHZU  = 987,
1003
    LHZU8 = 988,
1004
    LHZUX = 989,
1005
    LHZUX8  = 990,
1006
    LHZX  = 991,
1007
    LHZX8 = 992,
1008
    LHZXTLS = 993,
1009
    LHZXTLS_  = 994,
1010
    LHZXTLS_32  = 995,
1011
    LI  = 996,
1012
    LI8 = 997,
1013
    LIS = 998,
1014
    LIS8  = 999,
1015
    LMW = 1000,
1016
    LSWI  = 1001,
1017
    LVEBX = 1002,
1018
    LVEHX = 1003,
1019
    LVEWX = 1004,
1020
    LVSL  = 1005,
1021
    LVSR  = 1006,
1022
    LVX = 1007,
1023
    LVXL  = 1008,
1024
    LWA = 1009,
1025
    LWARX = 1010,
1026
    LWARXL  = 1011,
1027
    LWAT  = 1012,
1028
    LWAUX = 1013,
1029
    LWAX  = 1014,
1030
    LWAX_32 = 1015,
1031
    LWA_32  = 1016,
1032
    LWBRX = 1017,
1033
    LWBRX8  = 1018,
1034
    LWEPX = 1019,
1035
    LWZ = 1020,
1036
    LWZ8  = 1021,
1037
    LWZCIX  = 1022,
1038
    LWZU  = 1023,
1039
    LWZU8 = 1024,
1040
    LWZUX = 1025,
1041
    LWZUX8  = 1026,
1042
    LWZX  = 1027,
1043
    LWZX8 = 1028,
1044
    LWZXTLS = 1029,
1045
    LWZXTLS_  = 1030,
1046
    LWZXTLS_32  = 1031,
1047
    LWZtoc  = 1032,
1048
    LXSD  = 1033,
1049
    LXSDX = 1034,
1050
    LXSIBZX = 1035,
1051
    LXSIHZX = 1036,
1052
    LXSIWAX = 1037,
1053
    LXSIWZX = 1038,
1054
    LXSSP = 1039,
1055
    LXSSPX  = 1040,
1056
    LXV = 1041,
1057
    LXVB16X = 1042,
1058
    LXVD2X  = 1043,
1059
    LXVDSX  = 1044,
1060
    LXVH8X  = 1045,
1061
    LXVL  = 1046,
1062
    LXVLL = 1047,
1063
    LXVW4X  = 1048,
1064
    LXVWSX  = 1049,
1065
    LXVX  = 1050,
1066
    MADDHD  = 1051,
1067
    MADDHDU = 1052,
1068
    MADDLD  = 1053,
1069
    MBAR  = 1054,
1070
    MCRF  = 1055,
1071
    MCRFS = 1056,
1072
    MCRXRX  = 1057,
1073
    MFBHRBE = 1058,
1074
    MFCR  = 1059,
1075
    MFCR8 = 1060,
1076
    MFCTR = 1061,
1077
    MFCTR8  = 1062,
1078
    MFDCR = 1063,
1079
    MFFS  = 1064,
1080
    MFFSCDRN  = 1065,
1081
    MFFSCDRNI = 1066,
1082
    MFFSCE  = 1067,
1083
    MFFSCRN = 1068,
1084
    MFFSCRNI  = 1069,
1085
    MFFSL = 1070,
1086
    MFFSo = 1071,
1087
    MFLR  = 1072,
1088
    MFLR8 = 1073,
1089
    MFMSR = 1074,
1090
    MFOCRF  = 1075,
1091
    MFOCRF8 = 1076,
1092
    MFPMR = 1077,
1093
    MFSPR = 1078,
1094
    MFSPR8  = 1079,
1095
    MFSR  = 1080,
1096
    MFSRIN  = 1081,
1097
    MFTB  = 1082,
1098
    MFTB8 = 1083,
1099
    MFVRD = 1084,
1100
    MFVRSAVE  = 1085,
1101
    MFVRSAVEv = 1086,
1102
    MFVSCR  = 1087,
1103
    MFVSRD  = 1088,
1104
    MFVSRLD = 1089,
1105
    MFVSRWZ = 1090,
1106
    MODSD = 1091,
1107
    MODSW = 1092,
1108
    MODUD = 1093,
1109
    MODUW = 1094,
1110
    MSGSYNC = 1095,
1111
    MSYNC = 1096,
1112
    MTCRF = 1097,
1113
    MTCRF8  = 1098,
1114
    MTCTR = 1099,
1115
    MTCTR8  = 1100,
1116
    MTCTR8loop  = 1101,
1117
    MTCTRloop = 1102,
1118
    MTDCR = 1103,
1119
    MTFSB0  = 1104,
1120
    MTFSB1  = 1105,
1121
    MTFSF = 1106,
1122
    MTFSFI  = 1107,
1123
    MTFSFIo = 1108,
1124
    MTFSFb  = 1109,
1125
    MTFSFo  = 1110,
1126
    MTLR  = 1111,
1127
    MTLR8 = 1112,
1128
    MTMSR = 1113,
1129
    MTMSRD  = 1114,
1130
    MTOCRF  = 1115,
1131
    MTOCRF8 = 1116,
1132
    MTPMR = 1117,
1133
    MTSPR = 1118,
1134
    MTSPR8  = 1119,
1135
    MTSR  = 1120,
1136
    MTSRIN  = 1121,
1137
    MTVRSAVE  = 1122,
1138
    MTVRSAVEv = 1123,
1139
    MTVSCR  = 1124,
1140
    MTVSRD  = 1125,
1141
    MTVSRDD = 1126,
1142
    MTVSRWA = 1127,
1143
    MTVSRWS = 1128,
1144
    MTVSRWZ = 1129,
1145
    MULHD = 1130,
1146
    MULHDU  = 1131,
1147
    MULHDUo = 1132,
1148
    MULHDo  = 1133,
1149
    MULHW = 1134,
1150
    MULHWU  = 1135,
1151
    MULHWUo = 1136,
1152
    MULHWo  = 1137,
1153
    MULLD = 1138,
1154
    MULLDo  = 1139,
1155
    MULLI = 1140,
1156
    MULLI8  = 1141,
1157
    MULLW = 1142,
1158
    MULLWo  = 1143,
1159
    MoveGOTtoLR = 1144,
1160
    MovePCtoLR  = 1145,
1161
    MovePCtoLR8 = 1146,
1162
    NAND  = 1147,
1163
    NAND8 = 1148,
1164
    NAND8o  = 1149,
1165
    NANDo = 1150,
1166
    NAP = 1151,
1167
    NEG = 1152,
1168
    NEG8  = 1153,
1169
    NEG8o = 1154,
1170
    NEGo  = 1155,
1171
    NOP = 1156,
1172
    NOP_GT_PWR6 = 1157,
1173
    NOP_GT_PWR7 = 1158,
1174
    NOR = 1159,
1175
    NOR8  = 1160,
1176
    NOR8o = 1161,
1177
    NORo  = 1162,
1178
    OR  = 1163,
1179
    OR8 = 1164,
1180
    OR8o  = 1165,
1181
    ORC = 1166,
1182
    ORC8  = 1167,
1183
    ORC8o = 1168,
1184
    ORCo  = 1169,
1185
    ORI = 1170,
1186
    ORI8  = 1171,
1187
    ORIS  = 1172,
1188
    ORIS8 = 1173,
1189
    ORo = 1174,
1190
    POPCNTB = 1175,
1191
    POPCNTD = 1176,
1192
    POPCNTW = 1177,
1193
    PPC32GOT  = 1178,
1194
    PPC32PICGOT = 1179,
1195
    QVALIGNI  = 1180,
1196
    QVALIGNIb = 1181,
1197
    QVALIGNIs = 1182,
1198
    QVESPLATI = 1183,
1199
    QVESPLATIb  = 1184,
1200
    QVESPLATIs  = 1185,
1201
    QVFABS  = 1186,
1202
    QVFABSs = 1187,
1203
    QVFADD  = 1188,
1204
    QVFADDS = 1189,
1205
    QVFADDSs  = 1190,
1206
    QVFCFID = 1191,
1207
    QVFCFIDS  = 1192,
1208
    QVFCFIDU  = 1193,
1209
    QVFCFIDUS = 1194,
1210
    QVFCFIDb  = 1195,
1211
    QVFCMPEQ  = 1196,
1212
    QVFCMPEQb = 1197,
1213
    QVFCMPEQbs  = 1198,
1214
    QVFCMPGT  = 1199,
1215
    QVFCMPGTb = 1200,
1216
    QVFCMPGTbs  = 1201,
1217
    QVFCMPLT  = 1202,
1218
    QVFCMPLTb = 1203,
1219
    QVFCMPLTbs  = 1204,
1220
    QVFCPSGN  = 1205,
1221
    QVFCPSGNs = 1206,
1222
    QVFCTID = 1207,
1223
    QVFCTIDU  = 1208,
1224
    QVFCTIDUZ = 1209,
1225
    QVFCTIDZ  = 1210,
1226
    QVFCTIDb  = 1211,
1227
    QVFCTIW = 1212,
1228
    QVFCTIWU  = 1213,
1229
    QVFCTIWUZ = 1214,
1230
    QVFCTIWZ  = 1215,
1231
    QVFLOGICAL  = 1216,
1232
    QVFLOGICALb = 1217,
1233
    QVFLOGICALs = 1218,
1234
    QVFMADD = 1219,
1235
    QVFMADDS  = 1220,
1236
    QVFMADDSs = 1221,
1237
    QVFMR = 1222,
1238
    QVFMRb  = 1223,
1239
    QVFMRs  = 1224,
1240
    QVFMSUB = 1225,
1241
    QVFMSUBS  = 1226,
1242
    QVFMSUBSs = 1227,
1243
    QVFMUL  = 1228,
1244
    QVFMULS = 1229,
1245
    QVFMULSs  = 1230,
1246
    QVFNABS = 1231,
1247
    QVFNABSs  = 1232,
1248
    QVFNEG  = 1233,
1249
    QVFNEGs = 1234,
1250
    QVFNMADD  = 1235,
1251
    QVFNMADDS = 1236,
1252
    QVFNMADDSs  = 1237,
1253
    QVFNMSUB  = 1238,
1254
    QVFNMSUBS = 1239,
1255
    QVFNMSUBSs  = 1240,
1256
    QVFPERM = 1241,
1257
    QVFPERMs  = 1242,
1258
    QVFRE = 1243,
1259
    QVFRES  = 1244,
1260
    QVFRESs = 1245,
1261
    QVFRIM  = 1246,
1262
    QVFRIMs = 1247,
1263
    QVFRIN  = 1248,
1264
    QVFRINs = 1249,
1265
    QVFRIP  = 1250,
1266
    QVFRIPs = 1251,
1267
    QVFRIZ  = 1252,
1268
    QVFRIZs = 1253,
1269
    QVFRSP  = 1254,
1270
    QVFRSPs = 1255,
1271
    QVFRSQRTE = 1256,
1272
    QVFRSQRTES  = 1257,
1273
    QVFRSQRTESs = 1258,
1274
    QVFSEL  = 1259,
1275
    QVFSELb = 1260,
1276
    QVFSELbb  = 1261,
1277
    QVFSELbs  = 1262,
1278
    QVFSUB  = 1263,
1279
    QVFSUBS = 1264,
1280
    QVFSUBSs  = 1265,
1281
    QVFTSTNAN = 1266,
1282
    QVFTSTNANb  = 1267,
1283
    QVFTSTNANbs = 1268,
1284
    QVFXMADD  = 1269,
1285
    QVFXMADDS = 1270,
1286
    QVFXMUL = 1271,
1287
    QVFXMULS  = 1272,
1288
    QVFXXCPNMADD  = 1273,
1289
    QVFXXCPNMADDS = 1274,
1290
    QVFXXMADD = 1275,
1291
    QVFXXMADDS  = 1276,
1292
    QVFXXNPMADD = 1277,
1293
    QVFXXNPMADDS  = 1278,
1294
    QVGPCI  = 1279,
1295
    QVLFCDUX  = 1280,
1296
    QVLFCDUXA = 1281,
1297
    QVLFCDX = 1282,
1298
    QVLFCDXA  = 1283,
1299
    QVLFCSUX  = 1284,
1300
    QVLFCSUXA = 1285,
1301
    QVLFCSX = 1286,
1302
    QVLFCSXA  = 1287,
1303
    QVLFCSXs  = 1288,
1304
    QVLFDUX = 1289,
1305
    QVLFDUXA  = 1290,
1306
    QVLFDX  = 1291,
1307
    QVLFDXA = 1292,
1308
    QVLFDXb = 1293,
1309
    QVLFIWAX  = 1294,
1310
    QVLFIWAXA = 1295,
1311
    QVLFIWZX  = 1296,
1312
    QVLFIWZXA = 1297,
1313
    QVLFSUX = 1298,
1314
    QVLFSUXA  = 1299,
1315
    QVLFSX  = 1300,
1316
    QVLFSXA = 1301,
1317
    QVLFSXb = 1302,
1318
    QVLFSXs = 1303,
1319
    QVLPCLDX  = 1304,
1320
    QVLPCLSX  = 1305,
1321
    QVLPCLSXint = 1306,
1322
    QVLPCRDX  = 1307,
1323
    QVLPCRSX  = 1308,
1324
    QVSTFCDUX = 1309,
1325
    QVSTFCDUXA  = 1310,
1326
    QVSTFCDUXI  = 1311,
1327
    QVSTFCDUXIA = 1312,
1328
    QVSTFCDX  = 1313,
1329
    QVSTFCDXA = 1314,
1330
    QVSTFCDXI = 1315,
1331
    QVSTFCDXIA  = 1316,
1332
    QVSTFCSUX = 1317,
1333
    QVSTFCSUXA  = 1318,
1334
    QVSTFCSUXI  = 1319,
1335
    QVSTFCSUXIA = 1320,
1336
    QVSTFCSX  = 1321,
1337
    QVSTFCSXA = 1322,
1338
    QVSTFCSXI = 1323,
1339
    QVSTFCSXIA  = 1324,
1340
    QVSTFCSXs = 1325,
1341
    QVSTFDUX  = 1326,
1342
    QVSTFDUXA = 1327,
1343
    QVSTFDUXI = 1328,
1344
    QVSTFDUXIA  = 1329,
1345
    QVSTFDX = 1330,
1346
    QVSTFDXA  = 1331,
1347
    QVSTFDXI  = 1332,
1348
    QVSTFDXIA = 1333,
1349
    QVSTFDXb  = 1334,
1350
    QVSTFIWX  = 1335,
1351
    QVSTFIWXA = 1336,
1352
    QVSTFSUX  = 1337,
1353
    QVSTFSUXA = 1338,
1354
    QVSTFSUXI = 1339,
1355
    QVSTFSUXIA  = 1340,
1356
    QVSTFSUXs = 1341,
1357
    QVSTFSX = 1342,
1358
    QVSTFSXA  = 1343,
1359
    QVSTFSXI  = 1344,
1360
    QVSTFSXIA = 1345,
1361
    QVSTFSXs  = 1346,
1362
    RESTORE_CR  = 1347,
1363
    RESTORE_CRBIT = 1348,
1364
    RESTORE_VRSAVE  = 1349,
1365
    RFCI  = 1350,
1366
    RFDI  = 1351,
1367
    RFEBB = 1352,
1368
    RFI = 1353,
1369
    RFID  = 1354,
1370
    RFMCI = 1355,
1371
    RLDCL = 1356,
1372
    RLDCLo  = 1357,
1373
    RLDCR = 1358,
1374
    RLDCRo  = 1359,
1375
    RLDIC = 1360,
1376
    RLDICL  = 1361,
1377
    RLDICL_32 = 1362,
1378
    RLDICL_32_64  = 1363,
1379
    RLDICL_32o  = 1364,
1380
    RLDICLo = 1365,
1381
    RLDICR  = 1366,
1382
    RLDICR_32 = 1367,
1383
    RLDICRo = 1368,
1384
    RLDICo  = 1369,
1385
    RLDIMI  = 1370,
1386
    RLDIMIo = 1371,
1387
    RLWIMI  = 1372,
1388
    RLWIMI8 = 1373,
1389
    RLWIMI8o  = 1374,
1390
    RLWIMIo = 1375,
1391
    RLWINM  = 1376,
1392
    RLWINM8 = 1377,
1393
    RLWINM8o  = 1378,
1394
    RLWINMo = 1379,
1395
    RLWNM = 1380,
1396
    RLWNM8  = 1381,
1397
    RLWNM8o = 1382,
1398
    RLWNMo  = 1383,
1399
    ReadTB  = 1384,
1400
    SC  = 1385,
1401
    SELECT_CC_F16 = 1386,
1402
    SELECT_CC_F4  = 1387,
1403
    SELECT_CC_F8  = 1388,
1404
    SELECT_CC_I4  = 1389,
1405
    SELECT_CC_I8  = 1390,
1406
    SELECT_CC_QBRC  = 1391,
1407
    SELECT_CC_QFRC  = 1392,
1408
    SELECT_CC_QSRC  = 1393,
1409
    SELECT_CC_SPE = 1394,
1410
    SELECT_CC_SPE4  = 1395,
1411
    SELECT_CC_VRRC  = 1396,
1412
    SELECT_CC_VSFRC = 1397,
1413
    SELECT_CC_VSRC  = 1398,
1414
    SELECT_CC_VSSRC = 1399,
1415
    SELECT_F16  = 1400,
1416
    SELECT_F4 = 1401,
1417
    SELECT_F8 = 1402,
1418
    SELECT_I4 = 1403,
1419
    SELECT_I8 = 1404,
1420
    SELECT_QBRC = 1405,
1421
    SELECT_QFRC = 1406,
1422
    SELECT_QSRC = 1407,
1423
    SELECT_SPE  = 1408,
1424
    SELECT_SPE4 = 1409,
1425
    SELECT_VRRC = 1410,
1426
    SELECT_VSFRC  = 1411,
1427
    SELECT_VSRC = 1412,
1428
    SELECT_VSSRC  = 1413,
1429
    SETB  = 1414,
1430
    SLBIA = 1415,
1431
    SLBIE = 1416,
1432
    SLBIEG  = 1417,
1433
    SLBMFEE = 1418,
1434
    SLBMFEV = 1419,
1435
    SLBMTE  = 1420,
1436
    SLBSYNC = 1421,
1437
    SLD = 1422,
1438
    SLDo  = 1423,
1439
    SLW = 1424,
1440
    SLW8  = 1425,
1441
    SLW8o = 1426,
1442
    SLWo  = 1427,
1443
    SPELWZ  = 1428,
1444
    SPELWZX = 1429,
1445
    SPESTW  = 1430,
1446
    SPESTWX = 1431,
1447
    SPILL_CR  = 1432,
1448
    SPILL_CRBIT = 1433,
1449
    SPILL_VRSAVE  = 1434,
1450
    SRAD  = 1435,
1451
    SRADI = 1436,
1452
    SRADI_32  = 1437,
1453
    SRADIo  = 1438,
1454
    SRADo = 1439,
1455
    SRAW  = 1440,
1456
    SRAWI = 1441,
1457
    SRAWIo  = 1442,
1458
    SRAWo = 1443,
1459
    SRD = 1444,
1460
    SRDo  = 1445,
1461
    SRW = 1446,
1462
    SRW8  = 1447,
1463
    SRW8o = 1448,
1464
    SRWo  = 1449,
1465
    STB = 1450,
1466
    STB8  = 1451,
1467
    STBCIX  = 1452,
1468
    STBCX = 1453,
1469
    STBEPX  = 1454,
1470
    STBU  = 1455,
1471
    STBU8 = 1456,
1472
    STBUX = 1457,
1473
    STBUX8  = 1458,
1474
    STBX  = 1459,
1475
    STBX8 = 1460,
1476
    STBXTLS = 1461,
1477
    STBXTLS_  = 1462,
1478
    STBXTLS_32  = 1463,
1479
    STD = 1464,
1480
    STDAT = 1465,
1481
    STDBRX  = 1466,
1482
    STDCIX  = 1467,
1483
    STDCX = 1468,
1484
    STDU  = 1469,
1485
    STDUX = 1470,
1486
    STDX  = 1471,
1487
    STDXTLS = 1472,
1488
    STDXTLS_  = 1473,
1489
    STFD  = 1474,
1490
    STFDEPX = 1475,
1491
    STFDU = 1476,
1492
    STFDUX  = 1477,
1493
    STFDX = 1478,
1494
    STFIWX  = 1479,
1495
    STFS  = 1480,
1496
    STFSU = 1481,
1497
    STFSUX  = 1482,
1498
    STFSX = 1483,
1499
    STH = 1484,
1500
    STH8  = 1485,
1501
    STHBRX  = 1486,
1502
    STHCIX  = 1487,
1503
    STHCX = 1488,
1504
    STHEPX  = 1489,
1505
    STHU  = 1490,
1506
    STHU8 = 1491,
1507
    STHUX = 1492,
1508
    STHUX8  = 1493,
1509
    STHX  = 1494,
1510
    STHX8 = 1495,
1511
    STHXTLS = 1496,
1512
    STHXTLS_  = 1497,
1513
    STHXTLS_32  = 1498,
1514
    STMW  = 1499,
1515
    STOP  = 1500,
1516
    STSWI = 1501,
1517
    STVEBX  = 1502,
1518
    STVEHX  = 1503,
1519
    STVEWX  = 1504,
1520
    STVX  = 1505,
1521
    STVXL = 1506,
1522
    STW = 1507,
1523
    STW8  = 1508,
1524
    STWAT = 1509,
1525
    STWBRX  = 1510,
1526
    STWCIX  = 1511,
1527
    STWCX = 1512,
1528
    STWEPX  = 1513,
1529
    STWU  = 1514,
1530
    STWU8 = 1515,
1531
    STWUX = 1516,
1532
    STWUX8  = 1517,
1533
    STWX  = 1518,
1534
    STWX8 = 1519,
1535
    STWXTLS = 1520,
1536
    STWXTLS_  = 1521,
1537
    STWXTLS_32  = 1522,
1538
    STXSD = 1523,
1539
    STXSDX  = 1524,
1540
    STXSIBX = 1525,
1541
    STXSIBXv  = 1526,
1542
    STXSIHX = 1527,
1543
    STXSIHXv  = 1528,
1544
    STXSIWX = 1529,
1545
    STXSSP  = 1530,
1546
    STXSSPX = 1531,
1547
    STXV  = 1532,
1548
    STXVB16X  = 1533,
1549
    STXVD2X = 1534,
1550
    STXVH8X = 1535,
1551
    STXVL = 1536,
1552
    STXVLL  = 1537,
1553
    STXVW4X = 1538,
1554
    STXVX = 1539,
1555
    SUBF  = 1540,
1556
    SUBF8 = 1541,
1557
    SUBF8o  = 1542,
1558
    SUBFC = 1543,
1559
    SUBFC8  = 1544,
1560
    SUBFC8o = 1545,
1561
    SUBFCo  = 1546,
1562
    SUBFE = 1547,
1563
    SUBFE8  = 1548,
1564
    SUBFE8o = 1549,
1565
    SUBFEo  = 1550,
1566
    SUBFIC  = 1551,
1567
    SUBFIC8 = 1552,
1568
    SUBFME  = 1553,
1569
    SUBFME8 = 1554,
1570
    SUBFME8o  = 1555,
1571
    SUBFMEo = 1556,
1572
    SUBFZE  = 1557,
1573
    SUBFZE8 = 1558,
1574
    SUBFZE8o  = 1559,
1575
    SUBFZEo = 1560,
1576
    SUBFo = 1561,
1577
    SYNC  = 1562,
1578
    TABORT  = 1563,
1579
    TABORTDC  = 1564,
1580
    TABORTDCI = 1565,
1581
    TABORTWC  = 1566,
1582
    TABORTWCI = 1567,
1583
    TAILB = 1568,
1584
    TAILB8  = 1569,
1585
    TAILBA  = 1570,
1586
    TAILBA8 = 1571,
1587
    TAILBCTR  = 1572,
1588
    TAILBCTR8 = 1573,
1589
    TBEGIN  = 1574,
1590
    TCHECK  = 1575,
1591
    TCHECK_RET  = 1576,
1592
    TCRETURNai  = 1577,
1593
    TCRETURNai8 = 1578,
1594
    TCRETURNdi  = 1579,
1595
    TCRETURNdi8 = 1580,
1596
    TCRETURNri  = 1581,
1597
    TCRETURNri8 = 1582,
1598
    TD  = 1583,
1599
    TDI = 1584,
1600
    TEND  = 1585,
1601
    TLBIA = 1586,
1602
    TLBIE = 1587,
1603
    TLBIEL  = 1588,
1604
    TLBIVAX = 1589,
1605
    TLBLD = 1590,
1606
    TLBLI = 1591,
1607
    TLBRE = 1592,
1608
    TLBRE2  = 1593,
1609
    TLBSX = 1594,
1610
    TLBSX2  = 1595,
1611
    TLBSX2D = 1596,
1612
    TLBSYNC = 1597,
1613
    TLBWE = 1598,
1614
    TLBWE2  = 1599,
1615
    TRAP  = 1600,
1616
    TRECHKPT  = 1601,
1617
    TRECLAIM  = 1602,
1618
    TSR = 1603,
1619
    TW  = 1604,
1620
    TWI = 1605,
1621
    UPDATE_VRSAVE = 1606,
1622
    UpdateGBR = 1607,
1623
    VABSDUB = 1608,
1624
    VABSDUH = 1609,
1625
    VABSDUW = 1610,
1626
    VADDCUQ = 1611,
1627
    VADDCUW = 1612,
1628
    VADDECUQ  = 1613,
1629
    VADDEUQM  = 1614,
1630
    VADDFP  = 1615,
1631
    VADDSBS = 1616,
1632
    VADDSHS = 1617,
1633
    VADDSWS = 1618,
1634
    VADDUBM = 1619,
1635
    VADDUBS = 1620,
1636
    VADDUDM = 1621,
1637
    VADDUHM = 1622,
1638
    VADDUHS = 1623,
1639
    VADDUQM = 1624,
1640
    VADDUWM = 1625,
1641
    VADDUWS = 1626,
1642
    VAND  = 1627,
1643
    VANDC = 1628,
1644
    VAVGSB  = 1629,
1645
    VAVGSH  = 1630,
1646
    VAVGSW  = 1631,
1647
    VAVGUB  = 1632,
1648
    VAVGUH  = 1633,
1649
    VAVGUW  = 1634,
1650
    VBPERMD = 1635,
1651
    VBPERMQ = 1636,
1652
    VCFSX = 1637,
1653
    VCFSX_0 = 1638,
1654
    VCFUX = 1639,
1655
    VCFUX_0 = 1640,
1656
    VCIPHER = 1641,
1657
    VCIPHERLAST = 1642,
1658
    VCLZB = 1643,
1659
    VCLZD = 1644,
1660
    VCLZH = 1645,
1661
    VCLZLSBB  = 1646,
1662
    VCLZW = 1647,
1663
    VCMPBFP = 1648,
1664
    VCMPBFPo  = 1649,
1665
    VCMPEQFP  = 1650,
1666
    VCMPEQFPo = 1651,
1667
    VCMPEQUB  = 1652,
1668
    VCMPEQUBo = 1653,
1669
    VCMPEQUD  = 1654,
1670
    VCMPEQUDo = 1655,
1671
    VCMPEQUH  = 1656,
1672
    VCMPEQUHo = 1657,
1673
    VCMPEQUW  = 1658,
1674
    VCMPEQUWo = 1659,
1675
    VCMPGEFP  = 1660,
1676
    VCMPGEFPo = 1661,
1677
    VCMPGTFP  = 1662,
1678
    VCMPGTFPo = 1663,
1679
    VCMPGTSB  = 1664,
1680
    VCMPGTSBo = 1665,
1681
    VCMPGTSD  = 1666,
1682
    VCMPGTSDo = 1667,
1683
    VCMPGTSH  = 1668,
1684
    VCMPGTSHo = 1669,
1685
    VCMPGTSW  = 1670,
1686
    VCMPGTSWo = 1671,
1687
    VCMPGTUB  = 1672,
1688
    VCMPGTUBo = 1673,
1689
    VCMPGTUD  = 1674,
1690
    VCMPGTUDo = 1675,
1691
    VCMPGTUH  = 1676,
1692
    VCMPGTUHo = 1677,
1693
    VCMPGTUW  = 1678,
1694
    VCMPGTUWo = 1679,
1695
    VCMPNEB = 1680,
1696
    VCMPNEBo  = 1681,
1697
    VCMPNEH = 1682,
1698
    VCMPNEHo  = 1683,
1699
    VCMPNEW = 1684,
1700
    VCMPNEWo  = 1685,
1701
    VCMPNEZB  = 1686,
1702
    VCMPNEZBo = 1687,
1703
    VCMPNEZH  = 1688,
1704
    VCMPNEZHo = 1689,
1705
    VCMPNEZW  = 1690,
1706
    VCMPNEZWo = 1691,
1707
    VCTSXS  = 1692,
1708
    VCTSXS_0  = 1693,
1709
    VCTUXS  = 1694,
1710
    VCTUXS_0  = 1695,
1711
    VCTZB = 1696,
1712
    VCTZD = 1697,
1713
    VCTZH = 1698,
1714
    VCTZLSBB  = 1699,
1715
    VCTZW = 1700,
1716
    VEQV  = 1701,
1717
    VEXPTEFP  = 1702,
1718
    VEXTRACTD = 1703,
1719
    VEXTRACTUB  = 1704,
1720
    VEXTRACTUH  = 1705,
1721
    VEXTRACTUW  = 1706,
1722
    VEXTSB2D  = 1707,
1723
    VEXTSB2Ds = 1708,
1724
    VEXTSB2W  = 1709,
1725
    VEXTSB2Ws = 1710,
1726
    VEXTSH2D  = 1711,
1727
    VEXTSH2Ds = 1712,
1728
    VEXTSH2W  = 1713,
1729
    VEXTSH2Ws = 1714,
1730
    VEXTSW2D  = 1715,
1731
    VEXTSW2Ds = 1716,
1732
    VEXTUBLX  = 1717,
1733
    VEXTUBRX  = 1718,
1734
    VEXTUHLX  = 1719,
1735
    VEXTUHRX  = 1720,
1736
    VEXTUWLX  = 1721,
1737
    VEXTUWRX  = 1722,
1738
    VGBBD = 1723,
1739
    VINSERTB  = 1724,
1740
    VINSERTD  = 1725,
1741
    VINSERTH  = 1726,
1742
    VINSERTW  = 1727,
1743
    VLOGEFP = 1728,
1744
    VMADDFP = 1729,
1745
    VMAXFP  = 1730,
1746
    VMAXSB  = 1731,
1747
    VMAXSD  = 1732,
1748
    VMAXSH  = 1733,
1749
    VMAXSW  = 1734,
1750
    VMAXUB  = 1735,
1751
    VMAXUD  = 1736,
1752
    VMAXUH  = 1737,
1753
    VMAXUW  = 1738,
1754
    VMHADDSHS = 1739,
1755
    VMHRADDSHS  = 1740,
1756
    VMINFP  = 1741,
1757
    VMINSB  = 1742,
1758
    VMINSD  = 1743,
1759
    VMINSH  = 1744,
1760
    VMINSW  = 1745,
1761
    VMINUB  = 1746,
1762
    VMINUD  = 1747,
1763
    VMINUH  = 1748,
1764
    VMINUW  = 1749,
1765
    VMLADDUHM = 1750,
1766
    VMRGEW  = 1751,
1767
    VMRGHB  = 1752,
1768
    VMRGHH  = 1753,
1769
    VMRGHW  = 1754,
1770
    VMRGLB  = 1755,
1771
    VMRGLH  = 1756,
1772
    VMRGLW  = 1757,
1773
    VMRGOW  = 1758,
1774
    VMSUMMBM  = 1759,
1775
    VMSUMSHM  = 1760,
1776
    VMSUMSHS  = 1761,
1777
    VMSUMUBM  = 1762,
1778
    VMSUMUHM  = 1763,
1779
    VMSUMUHS  = 1764,
1780
    VMUL10CUQ = 1765,
1781
    VMUL10ECUQ  = 1766,
1782
    VMUL10EUQ = 1767,
1783
    VMUL10UQ  = 1768,
1784
    VMULESB = 1769,
1785
    VMULESH = 1770,
1786
    VMULESW = 1771,
1787
    VMULEUB = 1772,
1788
    VMULEUH = 1773,
1789
    VMULEUW = 1774,
1790
    VMULOSB = 1775,
1791
    VMULOSH = 1776,
1792
    VMULOSW = 1777,
1793
    VMULOUB = 1778,
1794
    VMULOUH = 1779,
1795
    VMULOUW = 1780,
1796
    VMULUWM = 1781,
1797
    VNAND = 1782,
1798
    VNCIPHER  = 1783,
1799
    VNCIPHERLAST  = 1784,
1800
    VNEGD = 1785,
1801
    VNEGW = 1786,
1802
    VNMSUBFP  = 1787,
1803
    VNOR  = 1788,
1804
    VOR = 1789,
1805
    VORC  = 1790,
1806
    VPERM = 1791,
1807
    VPERMR  = 1792,
1808
    VPERMXOR  = 1793,
1809
    VPKPX = 1794,
1810
    VPKSDSS = 1795,
1811
    VPKSDUS = 1796,
1812
    VPKSHSS = 1797,
1813
    VPKSHUS = 1798,
1814
    VPKSWSS = 1799,
1815
    VPKSWUS = 1800,
1816
    VPKUDUM = 1801,
1817
    VPKUDUS = 1802,
1818
    VPKUHUM = 1803,
1819
    VPKUHUS = 1804,
1820
    VPKUWUM = 1805,
1821
    VPKUWUS = 1806,
1822
    VPMSUMB = 1807,
1823
    VPMSUMD = 1808,
1824
    VPMSUMH = 1809,
1825
    VPMSUMW = 1810,
1826
    VPOPCNTB  = 1811,
1827
    VPOPCNTD  = 1812,
1828
    VPOPCNTH  = 1813,
1829
    VPOPCNTW  = 1814,
1830
    VPRTYBD = 1815,
1831
    VPRTYBQ = 1816,
1832
    VPRTYBW = 1817,
1833
    VREFP = 1818,
1834
    VRFIM = 1819,
1835
    VRFIN = 1820,
1836
    VRFIP = 1821,
1837
    VRFIZ = 1822,
1838
    VRLB  = 1823,
1839
    VRLD  = 1824,
1840
    VRLDMI  = 1825,
1841
    VRLDNM  = 1826,
1842
    VRLH  = 1827,
1843
    VRLW  = 1828,
1844
    VRLWMI  = 1829,
1845
    VRLWNM  = 1830,
1846
    VRSQRTEFP = 1831,
1847
    VSBOX = 1832,
1848
    VSEL  = 1833,
1849
    VSHASIGMAD  = 1834,
1850
    VSHASIGMAW  = 1835,
1851
    VSL = 1836,
1852
    VSLB  = 1837,
1853
    VSLD  = 1838,
1854
    VSLDOI  = 1839,
1855
    VSLH  = 1840,
1856
    VSLO  = 1841,
1857
    VSLV  = 1842,
1858
    VSLW  = 1843,
1859
    VSPLTB  = 1844,
1860
    VSPLTBs = 1845,
1861
    VSPLTH  = 1846,
1862
    VSPLTHs = 1847,
1863
    VSPLTISB  = 1848,
1864
    VSPLTISH  = 1849,
1865
    VSPLTISW  = 1850,
1866
    VSPLTW  = 1851,
1867
    VSR = 1852,
1868
    VSRAB = 1853,
1869
    VSRAD = 1854,
1870
    VSRAH = 1855,
1871
    VSRAW = 1856,
1872
    VSRB  = 1857,
1873
    VSRD  = 1858,
1874
    VSRH  = 1859,
1875
    VSRO  = 1860,
1876
    VSRV  = 1861,
1877
    VSRW  = 1862,
1878
    VSUBCUQ = 1863,
1879
    VSUBCUW = 1864,
1880
    VSUBECUQ  = 1865,
1881
    VSUBEUQM  = 1866,
1882
    VSUBFP  = 1867,
1883
    VSUBSBS = 1868,
1884
    VSUBSHS = 1869,
1885
    VSUBSWS = 1870,
1886
    VSUBUBM = 1871,
1887
    VSUBUBS = 1872,
1888
    VSUBUDM = 1873,
1889
    VSUBUHM = 1874,
1890
    VSUBUHS = 1875,
1891
    VSUBUQM = 1876,
1892
    VSUBUWM = 1877,
1893
    VSUBUWS = 1878,
1894
    VSUM2SWS  = 1879,
1895
    VSUM4SBS  = 1880,
1896
    VSUM4SHS  = 1881,
1897
    VSUM4UBS  = 1882,
1898
    VSUMSWS = 1883,
1899
    VUPKHPX = 1884,
1900
    VUPKHSB = 1885,
1901
    VUPKHSH = 1886,
1902
    VUPKHSW = 1887,
1903
    VUPKLPX = 1888,
1904
    VUPKLSB = 1889,
1905
    VUPKLSH = 1890,
1906
    VUPKLSW = 1891,
1907
    VXOR  = 1892,
1908
    V_SET0  = 1893,
1909
    V_SET0B = 1894,
1910
    V_SET0H = 1895,
1911
    V_SETALLONES  = 1896,
1912
    V_SETALLONESB = 1897,
1913
    V_SETALLONESH = 1898,
1914
    WAIT  = 1899,
1915
    WRTEE = 1900,
1916
    WRTEEI  = 1901,
1917
    XOR = 1902,
1918
    XOR8  = 1903,
1919
    XOR8o = 1904,
1920
    XORI  = 1905,
1921
    XORI8 = 1906,
1922
    XORIS = 1907,
1923
    XORIS8  = 1908,
1924
    XORo  = 1909,
1925
    XSABSDP = 1910,
1926
    XSABSQP = 1911,
1927
    XSADDDP = 1912,
1928
    XSADDQP = 1913,
1929
    XSADDQPO  = 1914,
1930
    XSADDSP = 1915,
1931
    XSCMPEQDP = 1916,
1932
    XSCMPEXPDP  = 1917,
1933
    XSCMPEXPQP  = 1918,
1934
    XSCMPGEDP = 1919,
1935
    XSCMPGTDP = 1920,
1936
    XSCMPODP  = 1921,
1937
    XSCMPOQP  = 1922,
1938
    XSCMPUDP  = 1923,
1939
    XSCMPUQP  = 1924,
1940
    XSCPSGNDP = 1925,
1941
    XSCPSGNQP = 1926,
1942
    XSCVDPHP  = 1927,
1943
    XSCVDPQP  = 1928,
1944
    XSCVDPSP  = 1929,
1945
    XSCVDPSPN = 1930,
1946
    XSCVDPSXDS  = 1931,
1947
    XSCVDPSXDSs = 1932,
1948
    XSCVDPSXWS  = 1933,
1949
    XSCVDPSXWSs = 1934,
1950
    XSCVDPUXDS  = 1935,
1951
    XSCVDPUXDSs = 1936,
1952
    XSCVDPUXWS  = 1937,
1953
    XSCVDPUXWSs = 1938,
1954
    XSCVHPDP  = 1939,
1955
    XSCVQPDP  = 1940,
1956
    XSCVQPDPO = 1941,
1957
    XSCVQPSDZ = 1942,
1958
    XSCVQPSWZ = 1943,
1959
    XSCVQPUDZ = 1944,
1960
    XSCVQPUWZ = 1945,
1961
    XSCVSDQP  = 1946,
1962
    XSCVSPDP  = 1947,
1963
    XSCVSPDPN = 1948,
1964
    XSCVSXDDP = 1949,
1965
    XSCVSXDSP = 1950,
1966
    XSCVUDQP  = 1951,
1967
    XSCVUXDDP = 1952,
1968
    XSCVUXDSP = 1953,
1969
    XSDIVDP = 1954,
1970
    XSDIVQP = 1955,
1971
    XSDIVQPO  = 1956,
1972
    XSDIVSP = 1957,
1973
    XSIEXPDP  = 1958,
1974
    XSIEXPQP  = 1959,
1975
    XSMADDADP = 1960,
1976
    XSMADDASP = 1961,
1977
    XSMADDMDP = 1962,
1978
    XSMADDMSP = 1963,
1979
    XSMADDQP  = 1964,
1980
    XSMADDQPO = 1965,
1981
    XSMAXCDP  = 1966,
1982
    XSMAXDP = 1967,
1983
    XSMAXJDP  = 1968,
1984
    XSMINCDP  = 1969,
1985
    XSMINDP = 1970,
1986
    XSMINJDP  = 1971,
1987
    XSMSUBADP = 1972,
1988
    XSMSUBASP = 1973,
1989
    XSMSUBMDP = 1974,
1990
    XSMSUBMSP = 1975,
1991
    XSMSUBQP  = 1976,
1992
    XSMSUBQPO = 1977,
1993
    XSMULDP = 1978,
1994
    XSMULQP = 1979,
1995
    XSMULQPO  = 1980,
1996
    XSMULSP = 1981,
1997
    XSNABSDP  = 1982,
1998
    XSNABSQP  = 1983,
1999
    XSNEGDP = 1984,
2000
    XSNEGQP = 1985,
2001
    XSNMADDADP  = 1986,
2002
    XSNMADDASP  = 1987,
2003
    XSNMADDMDP  = 1988,
2004
    XSNMADDMSP  = 1989,
2005
    XSNMADDQP = 1990,
2006
    XSNMADDQPO  = 1991,
2007
    XSNMSUBADP  = 1992,
2008
    XSNMSUBASP  = 1993,
2009
    XSNMSUBMDP  = 1994,
2010
    XSNMSUBMSP  = 1995,
2011
    XSNMSUBQP = 1996,
2012
    XSNMSUBQPO  = 1997,
2013
    XSRDPI  = 1998,
2014
    XSRDPIC = 1999,
2015
    XSRDPIM = 2000,
2016
    XSRDPIP = 2001,
2017
    XSRDPIZ = 2002,
2018
    XSREDP  = 2003,
2019
    XSRESP  = 2004,
2020
    XSRQPI  = 2005,
2021
    XSRQPIX = 2006,
2022
    XSRQPXP = 2007,
2023
    XSRSP = 2008,
2024
    XSRSQRTEDP  = 2009,
2025
    XSRSQRTESP  = 2010,
2026
    XSSQRTDP  = 2011,
2027
    XSSQRTQP  = 2012,
2028
    XSSQRTQPO = 2013,
2029
    XSSQRTSP  = 2014,
2030
    XSSUBDP = 2015,
2031
    XSSUBQP = 2016,
2032
    XSSUBQPO  = 2017,
2033
    XSSUBSP = 2018,
2034
    XSTDIVDP  = 2019,
2035
    XSTSQRTDP = 2020,
2036
    XSTSTDCDP = 2021,
2037
    XSTSTDCQP = 2022,
2038
    XSTSTDCSP = 2023,
2039
    XSXEXPDP  = 2024,
2040
    XSXEXPQP  = 2025,
2041
    XSXSIGDP  = 2026,
2042
    XSXSIGQP  = 2027,
2043
    XVABSDP = 2028,
2044
    XVABSSP = 2029,
2045
    XVADDDP = 2030,
2046
    XVADDSP = 2031,
2047
    XVCMPEQDP = 2032,
2048
    XVCMPEQDPo  = 2033,
2049
    XVCMPEQSP = 2034,
2050
    XVCMPEQSPo  = 2035,
2051
    XVCMPGEDP = 2036,
2052
    XVCMPGEDPo  = 2037,
2053
    XVCMPGESP = 2038,
2054
    XVCMPGESPo  = 2039,
2055
    XVCMPGTDP = 2040,
2056
    XVCMPGTDPo  = 2041,
2057
    XVCMPGTSP = 2042,
2058
    XVCMPGTSPo  = 2043,
2059
    XVCPSGNDP = 2044,
2060
    XVCPSGNSP = 2045,
2061
    XVCVDPSP  = 2046,
2062
    XVCVDPSXDS  = 2047,
2063
    XVCVDPSXWS  = 2048,
2064
    XVCVDPUXDS  = 2049,
2065
    XVCVDPUXWS  = 2050,
2066
    XVCVHPSP  = 2051,
2067
    XVCVSPDP  = 2052,
2068
    XVCVSPHP  = 2053,
2069
    XVCVSPSXDS  = 2054,
2070
    XVCVSPSXWS  = 2055,
2071
    XVCVSPUXDS  = 2056,
2072
    XVCVSPUXWS  = 2057,
2073
    XVCVSXDDP = 2058,
2074
    XVCVSXDSP = 2059,
2075
    XVCVSXWDP = 2060,
2076
    XVCVSXWSP = 2061,
2077
    XVCVUXDDP = 2062,
2078
    XVCVUXDSP = 2063,
2079
    XVCVUXWDP = 2064,
2080
    XVCVUXWSP = 2065,
2081
    XVDIVDP = 2066,
2082
    XVDIVSP = 2067,
2083
    XVIEXPDP  = 2068,
2084
    XVIEXPSP  = 2069,
2085
    XVMADDADP = 2070,
2086
    XVMADDASP = 2071,
2087
    XVMADDMDP = 2072,
2088
    XVMADDMSP = 2073,
2089
    XVMAXDP = 2074,
2090
    XVMAXSP = 2075,
2091
    XVMINDP = 2076,
2092
    XVMINSP = 2077,
2093
    XVMSUBADP = 2078,
2094
    XVMSUBASP = 2079,
2095
    XVMSUBMDP = 2080,
2096
    XVMSUBMSP = 2081,
2097
    XVMULDP = 2082,
2098
    XVMULSP = 2083,
2099
    XVNABSDP  = 2084,
2100
    XVNABSSP  = 2085,
2101
    XVNEGDP = 2086,
2102
    XVNEGSP = 2087,
2103
    XVNMADDADP  = 2088,
2104
    XVNMADDASP  = 2089,
2105
    XVNMADDMDP  = 2090,
2106
    XVNMADDMSP  = 2091,
2107
    XVNMSUBADP  = 2092,
2108
    XVNMSUBASP  = 2093,
2109
    XVNMSUBMDP  = 2094,
2110
    XVNMSUBMSP  = 2095,
2111
    XVRDPI  = 2096,
2112
    XVRDPIC = 2097,
2113
    XVRDPIM = 2098,
2114
    XVRDPIP = 2099,
2115
    XVRDPIZ = 2100,
2116
    XVREDP  = 2101,
2117
    XVRESP  = 2102,
2118
    XVRSPI  = 2103,
2119
    XVRSPIC = 2104,
2120
    XVRSPIM = 2105,
2121
    XVRSPIP = 2106,
2122
    XVRSPIZ = 2107,
2123
    XVRSQRTEDP  = 2108,
2124
    XVRSQRTESP  = 2109,
2125
    XVSQRTDP  = 2110,
2126
    XVSQRTSP  = 2111,
2127
    XVSUBDP = 2112,
2128
    XVSUBSP = 2113,
2129
    XVTDIVDP  = 2114,
2130
    XVTDIVSP  = 2115,
2131
    XVTSQRTDP = 2116,
2132
    XVTSQRTSP = 2117,
2133
    XVTSTDCDP = 2118,
2134
    XVTSTDCSP = 2119,
2135
    XVXEXPDP  = 2120,
2136
    XVXEXPSP  = 2121,
2137
    XVXSIGDP  = 2122,
2138
    XVXSIGSP  = 2123,
2139
    XXBRD = 2124,
2140
    XXBRH = 2125,
2141
    XXBRQ = 2126,
2142
    XXBRW = 2127,
2143
    XXEXTRACTUW = 2128,
2144
    XXINSERTW = 2129,
2145
    XXLAND  = 2130,
2146
    XXLANDC = 2131,
2147
    XXLEQV  = 2132,
2148
    XXLNAND = 2133,
2149
    XXLNOR  = 2134,
2150
    XXLOR = 2135,
2151
    XXLORC  = 2136,
2152
    XXLORf  = 2137,
2153
    XXLXOR  = 2138,
2154
    XXLXORdpz = 2139,
2155
    XXLXORspz = 2140,
2156
    XXLXORz = 2141,
2157
    XXMRGHW = 2142,
2158
    XXMRGLW = 2143,
2159
    XXPERM  = 2144,
2160
    XXPERMDI  = 2145,
2161
    XXPERMDIs = 2146,
2162
    XXPERMR = 2147,
2163
    XXSEL = 2148,
2164
    XXSLDWI = 2149,
2165
    XXSLDWIs  = 2150,
2166
    XXSPLTIB  = 2151,
2167
    XXSPLTW = 2152,
2168
    XXSPLTWs  = 2153,
2169
    gBC = 2154,
2170
    gBCA  = 2155,
2171
    gBCAat  = 2156,
2172
    gBCCTR  = 2157,
2173
    gBCCTRL = 2158,
2174
    gBCL  = 2159,
2175
    gBCLA = 2160,
2176
    gBCLAat = 2161,
2177
    gBCLR = 2162,
2178
    gBCLRL  = 2163,
2179
    gBCLat  = 2164,
2180
    gBCat = 2165,
2181
    INSTRUCTION_LIST_END = 2166
2182
  };
2183
2184
} // end PPC namespace
2185
} // end llvm namespace
2186
#endif // GET_INSTRINFO_ENUM
2187
2188
#ifdef GET_INSTRINFO_SCHED_ENUM
2189
#undef GET_INSTRINFO_SCHED_ENUM
2190
namespace llvm {
2191
2192
namespace PPC {
2193
namespace Sched {
2194
  enum {
2195
    NoInstrModel  = 0,
2196
    IIC_LdStSync  = 1,
2197
    IIC_IntSimple = 2,
2198
    IIC_IntGeneral  = 3,
2199
    IIC_BrB = 4,
2200
    IIC_VecFP = 5,
2201
    IIC_IntCompare  = 6,
2202
    IIC_SprABORT  = 7,
2203
    IIC_LdStCOPY  = 8,
2204
    IIC_LdStPASTE = 9,
2205
    IIC_BrCR  = 10,
2206
    IIC_LdStLD  = 11,
2207
    IIC_LdStDCBF  = 12,
2208
    IIC_LdStLoad  = 13,
2209
    IIC_IntDivD = 14,
2210
    IIC_IntDivW = 15,
2211
    IIC_FPDGeneral  = 16,
2212
    IIC_FPAddSub  = 17,
2213
    IIC_FPDivD  = 18,
2214
    IIC_FPSGeneral  = 19,
2215
    IIC_FPCompare = 20,
2216
    IIC_FPGeneral = 21,
2217
    IIC_VecGeneral  = 22,
2218
    IIC_VecComplex  = 23,
2219
    IIC_LdStStore = 24,
2220
    IIC_IntRotateDI = 25,
2221
    IIC_FPDivS  = 26,
2222
    IIC_FPFused = 27,
2223
    IIC_FPSqrtD = 28,
2224
    IIC_FPSqrtS = 29,
2225
    IIC_LdStICBI  = 30,
2226
    IIC_IntISEL = 31,
2227
    IIC_SprISYNC  = 32,
2228
    IIC_LdStLWARX = 33,
2229
    IIC_LdStLoadUpd = 34,
2230
    IIC_LdStLoadUpdX  = 35,
2231
    IIC_LdStLDARX = 36,
2232
    IIC_LdStLDU = 37,
2233
    IIC_LdStLDUX  = 38,
2234
    IIC_LdStLFD = 39,
2235
    IIC_LdStLFDU  = 40,
2236
    IIC_LdStLFDUX = 41,
2237
    IIC_LdStLHA = 42,
2238
    IIC_LdStLHAU  = 43,
2239
    IIC_LdStLHAUX = 44,
2240
    IIC_LdStLMW = 45,
2241
    IIC_LdStLWA = 46,
2242
    IIC_IntMulHD  = 47,
2243
    IIC_BrMCR = 48,
2244
    IIC_BrMCRX  = 49,
2245
    IIC_SprMFCR = 50,
2246
    IIC_SprMFSPR  = 51,
2247
    IIC_IntMFFS = 52,
2248
    IIC_SprMFMSR  = 53,
2249
    IIC_SprMFCRF  = 54,
2250
    IIC_SprMFPMR  = 55,
2251
    IIC_SprMFSR = 56,
2252
    IIC_SprMFTB = 57,
2253
    IIC_SprMSGSYNC  = 58,
2254
    IIC_SprMTSPR  = 59,
2255
    IIC_IntMTFSB0 = 60,
2256
    IIC_SprMTMSR  = 61,
2257
    IIC_SprMTMSRD = 62,
2258
    IIC_SprMTPMR  = 63,
2259
    IIC_SprMTSR = 64,
2260
    IIC_IntMulHW  = 65,
2261
    IIC_IntMulHWU = 66,
2262
    IIC_IntMulLI  = 67,
2263
    IIC_VecPerm = 68,
2264
    IIC_LdStSTFD  = 69,
2265
    IIC_LdStSTFDU = 70,
2266
    IIC_SprRFI  = 71,
2267
    IIC_IntRFID = 72,
2268
    IIC_IntRotateD  = 73,
2269
    IIC_IntRotate = 74,
2270
    IIC_SprSLBIA  = 75,
2271
    IIC_SprSLBIE  = 76,
2272
    IIC_SprSLBIEG = 77,
2273
    IIC_SprSLBMFEE  = 78,
2274
    IIC_SprSLBMFEV  = 79,
2275
    IIC_SprSLBMTE = 80,
2276
    IIC_SprSLBSYNC  = 81,
2277
    IIC_IntShift  = 82,
2278
    IIC_LdStSTWCX = 83,
2279
    IIC_LdStStoreUpd  = 84,
2280
    IIC_LdStSTD = 85,
2281
    IIC_LdStSTDCX = 86,
2282
    IIC_LdStSTDU  = 87,
2283
    IIC_LdStSTDUX = 88,
2284
    IIC_SprSTOP = 89,
2285
    IIC_IntTrapD  = 90,
2286
    IIC_SprTLBIA  = 91,
2287
    IIC_SprTLBIE  = 92,
2288
    IIC_SprTLBIEL = 93,
2289
    IIC_SprTLBSYNC  = 94,
2290
    IIC_IntTrapW  = 95,
2291
    IIC_VecFPCompare  = 96,
2292
    VADDUBM_VADDUDM_VADDUHM_VADDUWM_VEXTSB2D_VEXTSB2Ds_VEXTSB2W_VEXTSB2Ws_VEXTSH2D_VEXTSH2Ds_VEXTSH2W_VEXTSH2Ws_VEXTSW2D_VEXTSW2Ds_VSLD_VSRD_VSUBUBM_VSUBUDM_VSUBUHM_VSUBUWM_VPOPCNTB_VPOPCNTH_VSRAD_MTVSRDD_VEQV_VNAND_VNEGD_VNEGW_VORC_XXLAND_XXLANDC_XXLEQV_XXLNAND_XXLNOR_XXLOR_XXLORf_XXLORC_XXLXOR_XXLXORdpz_XXLXORspz_XXLXORz  = 97,
2293
    VAND_VANDC_V_SET0_V_SET0B_V_SET0H_VSLB_VSLH_VSLW_VSRB_VSRH_VSRW_VRLB_VRLD_VRLH_VRLW_VSRAB_VSRAH_VSRAW_XVABSDP_XVABSSP_XVNABSDP_XVNABSSP_XVCPSGNDP_XVCPSGNSP_XVIEXPDP_XVIEXPSP_XVXEXPDP_XVXEXPSP_VRLDMI_VRLDNM_VRLWMI_VRLWNM_VMRGEW_VMRGOW_VNOR_VOR_VSEL_VXOR_XVNEGDP_XVNEGSP_XSABSQP_XSCPSGNQP_XSIEXPQP_XSNABSQP_XSNEGQP_XSXEXPQP = 98,
2294
    XXSEL = 99,
2295
    TABORTDC_TABORTDCI_TABORTWC_TABORTWCI = 100,
2296
    MTFSB0_MTFSB1 = 101,
2297
    MFFSCDRN_MFFSCDRNI_MFFSCRN_MFFSCRNI = 102,
2298
    CMPRB_CMPRB8_CMPEQB = 103,
2299
    TD_TDI  = 104,
2300
    TW_TWI  = 105,
2301
    FCMPUD_FCMPUS_FTDIV_FTSQRT  = 106,
2302
    XSTSTDCDP_XSTSTDCSP = 107,
2303
    XSMAXCDP_XSMAXDP_XSMAXJDP_XSMINCDP_XSMINDP_XSMINJDP_XSXSIGDP_XSCVSPDPN  = 108,
2304
    XSCMPEQDP_XSCMPEXPDP_XSCMPGEDP_XSCMPGTDP_XSCMPODP_XSCMPUDP_XSTDIVDP_XSTSQRTDP = 109,
2305
    CNTLZD_CNTLZDo_CNTLZW_CNTLZW8_CNTLZW8o_CNTLZWo_CNTTZD_CNTTZDo_CNTTZW_CNTTZW8_CNTTZW8o_CNTTZWo_POPCNTD_POPCNTW_CMPB_CMPB8_SETB_BPERMD  = 110,
2306
    SLD_SRD_SRAD  = 111,
2307
    SRADI_EXTSWSLI_SRADI_32_RLDIC = 112,
2308
    MFVRD_MFVSRD_MTVSRD_MTVSRWA_MTVSRWZ_MFVSRWZ = 113,
2309
    CMPLW_CMPLWI_CMPW_CMPWI_CMPD_CMPDI_CMPLD_CMPLDI = 114,
2310
    SUBFC_SUBFC8_SUBFIC_SUBFIC8_ANDISo_ANDISo8_ANDIo_ANDIo8_ADDC_ADDC8_ADDIC_ADDIC8_ADDICo_ADDE_ADDE8_ADDE8o_ADDEo_ADDME_ADDME8_ADDME8o_ADDMEo_ADDZE_ADDZE8_ADDZE8o_ADDZEo_SUBF_SUBF8_SUBF8o_SUBFE_SUBFE8_SUBFE8o_SUBFEo_SUBFME_SUBFME8_SUBFME8o_SUBFMEo_SUBFZE_SUBFZE8_SUBFZE8o_SUBFZEo_SUBFo_POPCNTB_LA = 115,
2311
    ADD4_ADD4o_ADD8_ADD8o_NEG_NEG8_NEG8o_NEGo_ADDI_ADDI8_ADDIS_ADDIS8_LI_LI8_LIS_LIS8_OR_OR8_OR8o_ORI_ORI8_ORIS_ORIS8_ORo_XOR_XOR8_XOR8o_XORI_XORI8_XORIS_XORIS8_XORo_NAND_NAND8_NAND8o_NANDo_AND_AND8_AND8o_ANDC_ANDC8_ANDC8o_ANDCo_ANDo_NOR_NOR8_NOR8o_NORo_ORC_ORC8_ORC8o_ORCo_EQV_EQV8_EQV8o_EQVo_EXTSB_EXTSB8_EXTSB8_32_64_EXTSB8o_EXTSBo_EXTSH_EXTSH8_EXTSH8_32_64_EXTSH8o_EXTSHo_EXTSW_EXTSW_32_EXTSW_32_64_EXTSW_32_64o_EXTSWo_ADD4TLS_ADD8TLS_ADD8TLS__NOP = 116,
2312
    ADDIStocHA_ADDItocL_COPY  = 117,
2313
    MCRF  = 118,
2314
    MCRXRX  = 119,
2315
    XSNABSDP_XSXEXPDP_XSABSDP_XSNEGDP_XSCPSGNDP = 120,
2316
    RFEBB = 121,
2317
    TBEGIN_TRECHKPT = 122,
2318
    WAIT  = 123,
2319
    RLDCL_RLDCR = 124,
2320
    RLWIMI_RLWIMI8  = 125,
2321
    RLDICL_RLDICL_32_RLDICL_32_64_RLDICR_RLDICR_32_RLDIMI = 126,
2322
    MFOCRF_MFOCRF8  = 127,
2323
    MTOCRF_MTOCRF8  = 128,
2324
    CR6SET_CR6UNSET_CRSET_CRUNSET_CRAND_CRANDC_CRNAND_CRNOR_CROR_CRORC_CREQV_CRXOR  = 129,
2325
    SLW_SLW8_SRW_SRW8_RLWINM_RLWINM8_RLWNM_RLWNM8 = 130,
2326
    FABSD_FABSS_FNABSD_FNABSS_FNEGD_FNEGS_FCPSGND_FCPSGNS_FMR = 131,
2327
    SRAW_SRAWI  = 132,
2328
    ISEL_ISEL8  = 133,
2329
    XSIEXPDP  = 134,
2330
    TRECLAIM_TSR_TABORT = 135,
2331
    MFVSCR  = 136,
2332
    MTVSCR  = 137,
2333
    VCMPNEZB_VCMPNEZH_VCMPNEZW_VCMPEQUB_VCMPEQUD_VCMPEQUH_VCMPEQUW_VCMPNEB_VCMPNEH_VCMPNEW_VCMPEQFP_VCMPEQFPo_VCMPGEFP_VCMPGEFPo_VCMPGTFP_VCMPGTFPo_VCMPBFP_VCMPBFPo_VCMPGTSB_VCMPGTSBo_VCMPGTSD_VCMPGTSDo_VCMPGTSH_VCMPGTSHo_VCMPGTSW_VCMPGTSWo_VCMPGTUB_VCMPGTUBo_VCMPGTUD_VCMPGTUDo_VCMPGTUH_VCMPGTUHo_VCMPGTUW_VCMPGTUWo_VCMPNEBo_VCMPNEHo_VCMPNEWo_VCMPNEZBo_VCMPNEZHo_VCMPNEZWo_VCMPEQUBo_VCMPEQUDo_VCMPEQUHo_VCMPEQUWo_XVCMPEQDP_XVCMPEQDPo_XVCMPEQSP_XVCMPEQSPo_XVCMPGEDP_XVCMPGEDPo_XVCMPGESP_XVCMPGESPo_XVCMPGTDP_XVCMPGTDPo_XVCMPGTSP_XVCMPGTSPo = 138,
2334
    VABSDUB_VABSDUH_VABSDUW_VCLZB_VCLZD_VCLZH_VCLZW_VCTZB_VCTZD_VCTZH_VCTZW_VPOPCNTW_VPOPCNTD_VPRTYBD_VPRTYBW = 139,
2335
    VADDUBS_VADDUHS_VADDUWS_VAVGSB_VAVGSH_VAVGSW_VAVGUB_VAVGUH_VAVGUW_VADDSBS_VADDSHS_VADDSWS_VMAXFP_VMINFP_VMAXSB_VMAXSD_VMAXSH_VMAXSW_VMAXUB_VMAXUD_VMAXUH_VMAXUW_VMINSB_VMINSD_VMINSH_VMINSW_VMINUB_VMINUD_VMINUH_VMINUW_VBPERMD_VADDCUW_VSHASIGMAD_VSHASIGMAW_VSUBSBS_VSUBSHS_VSUBSWS_VSUBUBS_VSUBUHS_VSUBUWS_VSUBCUW_XVMAXDP_XVMAXSP_XVMINDP_XVMINSP_XVTSTDCDP_XVTSTDCSP_XVXSIGDP_XVXSIGSP = 140,
2336
    XVTDIVDP_XVTDIVSP_XVTSQRTDP_XVTSQRTSP = 141,
2337
    VADDFP_VCTSXS_VCTSXS_0_VCTUXS_VCTUXS_0_VEXPTEFP_VLOGEFP_VMADDFP_VMHADDSHS_VNMSUBFP_VREFP_VRFIM_VRFIN_VRFIP_VRFIZ_VRSQRTEFP_XVADDDP_XVADDSP_XVCVDPSP_XVCVDPSXDS_XVCVDPSXWS_XVCVDPUXDS_XVCVDPUXWS_XVCVHPSP_XVCVSPDP_XVCVSPHP_XVCVSPSXDS_XVCVSPSXWS_XVCVSPUXDS_XVCVSPUXWS_XVCVSXDDP_XVCVSXDSP_XVCVSXWDP_XVCVSXWSP_XVCVUXDDP_XVCVUXDSP_XVCVUXWDP_XVCVUXWSP_XVMADDADP_XVMADDASP_XVMADDMDP_XVMADDMSP_XVMSUBADP_XVMSUBASP_XVMSUBMDP_XVMSUBMSP_XVMULDP_XVMULSP_XVNMADDADP_XVNMADDASP_XVNMADDMDP_XVNMADDMSP_XVNMSUBADP_XVNMSUBASP_XVNMSUBMDP_XVNMSUBMSP_XVRDPI_XVRDPIC_XVRDPIM_XVRDPIP_XVRDPIZ_XVREDP_XVRESP_XVRSPI_XVRSPIC_XVRSPIM_XVRSPIP_XVRSPIZ_XVRSQRTEDP_XVRSQRTESP_XVSUBDP_XVSUBSP_VCFSX_VCFSX_0_VCFUX_VCFUX_0_VMHRADDSHS_VMLADDUHM_VMSUMMBM_VMSUMSHM_VMSUMSHS_VMSUMUBM_VMSUMUHM_VMSUMUHS_VMULESB_VMULESH_VMULESW_VMULEUB_VMULEUH_VMULEUW_VMULOSB_VMULOSH_VMULOSW_VMULOUB_VMULOUH_VMULOUW_VSUM2SWS_VSUM4SBS_VSUM4SHS_VSUM4UBS_VSUMSWS = 142,
2338
    VSUBFP_VMULUWM  = 143,
2339
    MADDHD_MADDHDU_MADDLD_MULLD = 144,
2340
    MULHD_MULHW_MULLW = 145,
2341
    MULHDU_MULHWU = 146,
2342
    MULLI_MULLI8  = 147,
2343
    FRSP_FRIMD_FRIMS_FRIND_FRINS_FRIPD_FRIPS_FRIZD_FRIZS_FRE_FRES_FADDS_FMSUBS_FMADDS_FSUBS_FCFID_FCFIDS_FCFIDU_FCFIDUS_FCTID_FCTIDU_FCTIDUZ_FCTIDZ_FCTIW_FCTIWU_FCTIWUZ_FCTIWZ_FRSQRTE_FRSQRTES_FNMADDS_FNMSUBS_FSELD_FSELS_FMULS  = 148,
2344
    FADD_FSUB = 149,
2345
    FMSUB_FMADD_FNMADD_FNMSUB_FMUL  = 150,
2346
    XSMADDADP_XSMADDASP_XSMADDMDP_XSMADDMSP_XSMSUBADP_XSMSUBASP_XSMSUBMDP_XSMSUBMSP_XSMULDP_XSMULSP_XSNMADDADP_XSNMADDASP_XSNMADDMDP_XSNMADDMSP_XSNMSUBADP_XSNMSUBASP_XSNMSUBMDP_XSNMSUBMSP = 151,
2347
    FSELDo_FSELSo = 152,
2348
    MULHDUo_MULHWUo = 153,
2349
    MULHDo_MULHWo_MULLWo  = 154,
2350
    MULLDo  = 155,
2351
    FRIMDo_FRIMSo_FRINDo_FRINSo_FRIPDo_FRIPSo_FRIZDo_FRIZSo_FRESo_FREo_FADDSo_FSUBSo_FMSUBSo_FNMSUBSo_FMADDSo_FNMADDSo_FCFIDSo_FCFIDUSo_FCFIDUo_FCFIDo_FCTIDUZo_FCTIDUo_FCTIDZo_FCTIDo_FCTIWUZo_FCTIWUo_FCTIWZo_FCTIWo_FMULSo_FRSQRTESo_FRSQRTEo_FRSPo  = 156,
2352
    FADDo_FSUBo = 157,
2353
    FMSUBo_FNMSUBo_FMADDo_FNMADDo_FMULo = 158,
2354
    XSADDDP_XSADDSP_XSCVDPHP_XSCVDPSP_XSCVDPSXDS_XSCVDPSXDSs_XSCVDPSXWS_XSCVDPUXDS_XSCVDPUXDSs_XSCVDPUXWS_XSCVDPSXWSs_XSCVDPUXWSs_XSCVHPDP_XSCVSPDP_XSCVSXDDP_XSCVSXDSP_XSCVUXDDP_XSCVUXDSP_XSRDPI_XSRDPIC_XSRDPIM_XSRDPIP_XSRDPIZ_XSREDP_XSRESP_XSRSQRTEDP_XSRSQRTESP_XSSUBDP_XSSUBSP_XSCVDPSPN_XSRSP  = 159,
2355
    LVSL_LVSR = 160,
2356
    VSPLTISB_VSPLTISH_VSPLTISW_VSPLTB_VSPLTBs_VSPLTH_VSPLTHs_VSPLTW_XXMRGHW_XXMRGLW_XXPERM_XXPERMR_XXSLDWI_XXSLDWIs_XXSPLTIB_XXSPLTW_XXSPLTWs_XXPERMDI_XXPERMDIs  = 161,
2357
    V_SETALLONES_V_SETALLONESB_V_SETALLONESH_VBPERMQ_VGBBD_VMRGHB_VMRGHH_VMRGHW_VMRGLB_VMRGLH_VMRGLW_VPERM_VPERMR_VPERMXOR_VPKPX_VPKSDSS_VPKSDUS_VPKSHSS_VPKSHUS_VPKSWSS_VPKSWUS_VPKUDUM_VPKUDUS_VPKUHUM_VPKUHUS_VPKUWUM_VPKUWUS_VSL_VSLDOI_VSLO_VSLV_VSR_VSRO_VSRV_VUPKHPX_VUPKHSB_VUPKHSH_VUPKHSW_VUPKLPX_VUPKLSB_VUPKLSH_VUPKLSW_XXBRD_XXBRH_XXBRQ_XXBRW_XXEXTRACTUW_XXINSERTW_VADDCUQ_VADDECUQ_VADDEUQM_VMUL10CUQ_VMUL10ECUQ_VMUL10EUQ_VMUL10UQ_VSUBCUQ_VSUBECUQ_VSUBEUQM_XSTSTDCQP_XSXSIGQP_BCDCFNo_BCDCFZo_BCDCPSGNo_BCDCTNo_BCDCTZo_BCDSETSGNo_BCDSo_BCDTRUNCo_BCDUSo_BCDUTRUNCo = 162,
2358
    VEXTRACTUB_VEXTRACTUH_VEXTRACTUW_VINSERTB_VINSERTD_VINSERTH_VINSERTW_MFVSRLD_MTVSRWS_VCLZLSBB_VCTZLSBB_VEXTRACTD_VEXTUBLX_VEXTUBRX_VEXTUHLX_VEXTUHRX_VEXTUWLX_VEXTUWRX_VPRTYBQ_VADDUQM_VSUBUQM  = 163,
2359
    XSCMPEXPQP_XSCMPOQP_XSCMPUQP  = 164,
2360
    BCDSRo_XSADDQP_XSADDQPO_XSCVDPQP_XSCVQPDP_XSCVQPDPO_XSCVQPSDZ_XSCVQPSWZ_XSCVQPUDZ_XSCVQPUWZ_XSCVSDQP_XSCVUDQP_XSRQPI_XSRQPIX_XSRQPXP_XSSUBQP_XSSUBQPO = 165,
2361
    BCDCTSQo  = 166,
2362
    XSMADDQP_XSMADDQPO_XSMSUBQP_XSMSUBQPO_XSMULQP_XSMULQPO_XSNMADDQP_XSNMADDQPO_XSNMSUBQP_XSNMSUBQPO  = 167,
2363
    BCDCFSQo  = 168,
2364
    XSDIVQP_XSDIVQPO  = 169,
2365
    XSSQRTQP_XSSQRTQPO  = 170,
2366
    LXVL_LXVLL  = 171,
2367
    LVEBX_LVEHX_LVEWX_LVX_LVXL  = 172,
2368
    LXSIBZX_LXSIHZX_LXSDX_LXVB16X_LXVD2X_LXVWSX_LXSIWZX_LXV_LXVX_LXSD = 173,
2369
    DFLOADf64_XFLOADf64_LIWZX = 174,
2370
    DCBF_DCBFEP_DCBST_DCBSTEP_DCBT_DCBTEP_DCBZ_DCBZEP_DCBZL_DCBZLEP_DCBTST_DCBTSTEP = 175,
2371
    CP_COPY_CP_COPY8  = 176,
2372
    CP_PASTE_CP_PASTE8  = 177,
2373
    ICBI_ICBIEP = 178,
2374
    ICBT_ICBTLS_LBZ_LBZ8_LBZCIX_LBZX_LBZX8_LBZXTLS_LBZXTLS__LBZXTLS_32_LDBRX_LDCIX_LHBRX_LHBRX8_LHZ_LHZ8_LHZCIX_LHZX_LHZX8_LHZXTLS_LHZXTLS__LHZXTLS_32_LWBRX_LWBRX8_LWZ_LWZ8_LWZCIX_LWZX_LWZX8_LWZXTLS_LWZXTLS__LWZXTLS_32_EnforceIEIO_LSWI = 179,
2375
    LBARX_LBARXL_LHARX_LHARXL_LWARX_LWARXL  = 180,
2376
    LD_LDX_LDXTLS_LDXTLS__DARN  = 181,
2377
    LDARX_LDARXL  = 182,
2378
    CP_ABORT  = 183,
2379
    ISYNC = 184,
2380
    MSGSYNC = 185,
2381
    TLBSYNC = 186,
2382
    SYNC  = 187,
2383
    LMW = 188,
2384
    LFIWZX_LFDX_LFD = 189,
2385
    SLBIA = 190,
2386
    SLBIE = 191,
2387
    SLBMFEE = 192,
2388
    SLBMFEV = 193,
2389
    SLBMTE  = 194,
2390
    TLBIEL  = 195,
2391
    LHZU_LHZU8_LWZU_LWZU8 = 196,
2392
    LHZUX_LHZUX8_LWZUX_LWZUX8 = 197,
2393
    TEND  = 198,
2394
    STBCX_STHCX_STWCX = 199,
2395
    STDCX = 200,
2396
    LDMX  = 201,
2397
    LHA_LHA8_LHAX_LHAX8_LWAX_LWAX_32  = 202,
2398
    CP_PASTE8o_CP_PASTEo  = 203,
2399
    LWA_LWA_32  = 204,
2400
    TCHECK  = 205,
2401
    LFIWAX  = 206,
2402
    LXSIWAX = 207,
2403
    LIWAX = 208,
2404
    LFSX_LFS  = 209,
2405
    LXSSP_LXSSPX  = 210,
2406
    XFLOADf32_DFLOADf32 = 211,
2407
    LHAU_LHAU8  = 212,
2408
    LHAUX_LHAUX8_LWAUX  = 213,
2409
    LXVH8X_LXVDSX_LXVW4X  = 214,
2410
    STFD_STFDX_STFIWX_STFS_STFSX_STXSD_STXSDX_STXSIBX_STXSIBXv_STXSIHX_STXSIHXv_STXSIWX_STXSSP_STXSSPX  = 215,
2411
    STW_STW8_STDBRX_STHBRX_STWBRX_STB_STB8_STH_STH8_STBX_STBX8_STBXTLS_STBXTLS__STBXTLS_32_STHX_STHX8_STHXTLS_STHXTLS__STHXTLS_32_STWX_STWX8_STWXTLS_STWXTLS__STWXTLS_32  = 216,
2412
    DFSTOREf32_DFSTOREf64_XFSTOREf32_XFSTOREf64_STIWX = 217,
2413
    STD_STDX_STDXTLS_STDXTLS_ = 218,
2414
    STBCIX_STDCIX_STHCIX_STWCIX_STSWI = 219,
2415
    SLBIEG  = 220,
2416
    STMW  = 221,
2417
    TLBIE = 222,
2418
    STVEBX_STVEHX_STVEWX_STVX_STVXL = 223,
2419
    STXV_STXVB16X_STXVD2X_STXVH8X_STXVW4X_STXVX = 224,
2420
    STXVL_STXVLL  = 225,
2421
    MTCTR_MTCTR8_MTCTR8loop_MTCTRloop_MTLR_MTLR8  = 226,
2422
    MFVRSAVE_MFVRSAVEv_MTVRSAVE_MTVRSAVEv = 227,
2423
    MFPMR = 228,
2424
    MTPMR = 229,
2425
    MFTB_MFTB8  = 230,
2426
    MFCTR_MFCTR8_MFLR_MFLR8_MFSPR_MFSPR8  = 231,
2427
    MFMSR = 232,
2428
    MTMSR = 233,
2429
    MTMSRD  = 234,
2430
    MTSPR_MTSPR8  = 235,
2431
    DIVW_DIVWU_MODSW  = 236,
2432
    DIVWE_DIVWEU_MODSD_MODUD_MODUW  = 237,
2433
    DIVD_DIVDU  = 238,
2434
    DIVDE_DIVDEU  = 239,
2435
    DIVWUo_DIVWo  = 240,
2436
    DIVDo_DIVDUo  = 241,
2437
    DIVWEo_DIVWEUo  = 242,
2438
    DIVDEo_DIVDEUo  = 243,
2439
    MTCRF_MTCRF8  = 244,
2440
    ADDC8o_ADDCo_SUBFC8o_SUBFCo = 245,
2441
    FABSDo_FABSSo_FNABSDo_FNABSSo_FCPSGNDo_FCPSGNSo_FNEGDo_FNEGSo_FMRo  = 246,
2442
    MCRFS = 247,
2443
    MTFSF_MTFSFo_MTFSFI_MTFSFIo = 248,
2444
    MTFSFb  = 249,
2445
    RLDCLo_RLDCRo = 250,
2446
    RLDICLo_RLDICRo_RLDICL_32o_RLDIMIo  = 251,
2447
    RLWIMI8o_RLWIMIo  = 252,
2448
    RLWINM8o_RLWINMo_RLWNM8o_RLWNMo_SLW8o_SLWo_SRW8o_SRWo = 253,
2449
    SRAWIo_SRAWo  = 254,
2450
    MFFS_MFFSCE_MFFSL_MFFSo = 255,
2451
    MFCR_MFCR8  = 256,
2452
    EXTSWSLIo_SRADIo_RLDICo = 257,
2453
    SRADo_SLDo_SRDo = 258,
2454
    FDIV  = 259,
2455
    FDIVo = 260,
2456
    XSSQRTDP  = 261,
2457
    FSQRT = 262,
2458
    XVSQRTDP  = 263,
2459
    XVSQRTSP  = 264,
2460
    FSQRTo  = 265,
2461
    XSSQRTSP  = 266,
2462
    FSQRTS  = 267,
2463
    FSQRTSo = 268,
2464
    XSDIVDP = 269,
2465
    FDIVS = 270,
2466
    FDIVSo  = 271,
2467
    XSDIVSP = 272,
2468
    XVDIVSP = 273,
2469
    XVDIVDP = 274,
2470
    LFSU  = 275,
2471
    LFSUX = 276,
2472
    STFDU_STFDUX_STFSU_STFSUX = 277,
2473
    STBU_STBU8_STBUX_STBUX8_STHU_STHU8_STHUX_STHUX8_STWU_STWU8_STWUX_STWUX8 = 278,
2474
    STDU  = 279,
2475
    STDUX = 280,
2476
    LBZU_LBZU8  = 281,
2477
    LBZUX_LBZUX8  = 282,
2478
    LDU = 283,
2479
    LDUX  = 284,
2480
    LFDU  = 285,
2481
    LFDUX = 286,
2482
    VPMSUMB_VPMSUMD_VPMSUMH_VPMSUMW_VCIPHER_VCIPHERLAST_VNCIPHER_VNCIPHERLAST_VSBOX = 287,
2483
    BCCCTR_BCCCTR8_BCCCTRL_BCCCTRL8_BCCL_BCCLA_BCCLR_BCCLRL_BCCTR_BCCTR8_BCCTR8n_BCCTRL_BCCTRL8_BCCTRL8n_BCCTRLn_BCCTRn_BDNZ_BDNZ8_BDNZA_BDNZAm_BDNZAp_BDNZm_BDNZp_BDZ_BDZ8_BDZA_BDZAm_BDZAp_BDZm_BDZp_BDNZL_BDNZLA_BDNZLAm_BDNZLAp_BDNZLR_BDNZLR8_BDNZLRL_BDNZLRLm_BDNZLRLp_BDNZLRm_BDNZLRp_BDNZLm_BDNZLp_BDZL_BDZLA_BDZLAm_BDZLAp_BDZLR_BDZLR8_BDZLRL_BDZLRLm_BDZLRLp_BDZLRm_BDZLRp_BDZLm_BDZLp_BL_BL_TLS_BL8_BL8_NOP_BL8_NOP_TLS_BL8_TLS_BL8_TLS__BLA_BLA8_BLA8_NOP_BLR_BLR8_BLRL_TAILB_TAILB8_TAILBA_TAILBA8_TAILBCTR_TAILBCTR8_gBC_gBCA_gBCAat_gBCCTR_gBCCTRL_gBCL_gBCLA_gBCLAat_gBCLR_gBCLRL_gBCLat_gBCat_BCLR_BCLRL_BCLRLn_BCLRn_BCTR_BCTR8_BCTRL_BCTRL8_B_BA_BC_BCC_BCCA_BCL_BCLalways_BCLn_BCTRL8_LDinto_toc_BCn_CTRL_DEP  = 288,
2484
    ADDPCIS = 289,
2485
    LDAT_LWAT = 290,
2486
    STDAT_STWAT = 291,
2487
    BRINC = 292,
2488
    EVABS_EVEQV_EVNAND_EVNEG_EVADDIW_EVADDW_EVAND_EVANDC_EVCMPEQ_EVCMPGTS_EVCMPGTU_EVCMPLTS_EVCMPLTU_EVCNTLSW_EVCNTLZW_EVEXTSB_EVEXTSH_EVMERGEHI_EVMERGEHILO_EVMERGELO_EVMERGELOHI_EVNOR_EVOR_EVORC_EVXOR_EVRLW_EVRLWI_EVRNDW_EVSLW_EVSLWI_EVSPLATFI_EVSPLATI_EVSRWIS_EVSRWIU_EVSRWS_EVSRWU_EVSUBFW_EVSUBIFW  = 293,
2489
    EVMRA_EVADDSMIAAW_EVADDSSIAAW_EVADDUMIAAW_EVADDUSIAAW_EVDIVWS_EVDIVWU_EVMHEGSMFAA_EVMHEGSMFAN_EVMHEGSMIAA_EVMHEGSMIAN_EVMHEGUMIAA_EVMHEGUMIAN_EVMHESMF_EVMHESMFA_EVMHESMFAAW_EVMHESMFANW_EVMHESMI_EVMHESMIA_EVMHESMIAAW_EVMHESMIANW_EVMHESSF_EVMHESSFA_EVMHESSFAAW_EVMHESSFANW_EVMHESSIAAW_EVMHESSIANW_EVMHEUMI_EVMHEUMIA_EVMHEUMIAAW_EVMHEUMIANW_EVMHEUSIAAW_EVMHEUSIANW_EVMHOGSMFAA_EVMHOGSMFAN_EVMHOGSMIAA_EVMHOGSMIAN_EVMHOGUMIAA_EVMHOGUMIAN_EVMHOSMF_EVMHOSMFA_EVMHOSMFAAW_EVMHOSMFANW_EVMHOSMI_EVMHOSMIA_EVMHOSMIAAW_EVMHOSMIANW_EVMHOSSF_EVMHOSSFA_EVMHOSSFAAW_EVMHOSSFANW_EVMHOSSIAAW_EVMHOSSIANW_EVMHOUMI_EVMHOUMIA_EVMHOUMIAAW_EVMHOUMIANW_EVMHOUSIAAW_EVMHOUSIANW_EVMWHSMF_EVMWHSMFA_EVMWHSMI_EVMWHSMIA_EVMWHSSF_EVMWHSSFA_EVMWHUMI_EVMWHUMIA_EVMWLSMIAAW_EVMWLSMIANW_EVMWLSSIAAW_EVMWLSSIANW_EVMWLUMI_EVMWLUMIA_EVMWLUMIAAW_EVMWLUMIANW_EVMWLUSIAAW_EVMWLUSIANW_EVMWSMF_EVMWSMFA_EVMWSMFAA_EVMWSMFAN_EVMWSMI_EVMWSMIA_EVMWSMIAA_EVMWSMIAN_EVMWSSF_EVMWSSFA_EVMWSSFAA_EVMWSSFAN_EVMWUMI_EVMWUMIA_EVMWUMIAA_EVMWUMIAN_EVSUBFSMIAAW_EVSUBFSSIAAW_EVSUBFUMIAAW_EVSUBFUSIAAW  = 294,
2490
    EVLDD_EVLDDX_EVLDH_EVLDHX_EVLDW_EVLDWX_EVLHHESPLAT_EVLHHESPLATX_EVLHHOSSPLAT_EVLHHOSSPLATX_EVLHHOUSPLAT_EVLHHOUSPLATX_EVLWHE_EVLWHEX_EVLWHOS_EVLWHOSX_EVLWHOU_EVLWHOUX_EVLWHSPLAT_EVLWHSPLATX_EVLWWSPLAT_EVLWWSPLATX  = 295,
2491
    EVSTDD_EVSTDDX_EVSTDH_EVSTDHX_EVSTDW_EVSTDWX_EVSTWHE_EVSTWHEX_EVSTWHO_EVSTWHOX_EVSTWWE_EVSTWWEX_EVSTWWO_EVSTWWOX  = 296,
2492
    HRFID_ATTN_CLRBHRB_MFBHRBE_NAP_RFCI_RFDI_RFMCI_SC = 297,
2493
    RFI = 298,
2494
    RFID  = 299,
2495
    DSS_DSSALL_DST_DST64_DSTST_DSTST64_DSTSTT_DSTSTT64_DSTT_DSTT64_ICBLQ_LBEPX_LHEPX_LWEPX_TLBIVAX_TLBLD_TLBLI_TLBRE_TLBRE2_TLBSX_TLBSX2_TLBSX2D_TLBWE_TLBWE2_MBAR_TRAP_DCCCI_ICCCI = 300,
2496
    ICBLC_STBEPX_STHEPX_STWEPX  = 301,
2497
    LFDEPX  = 302,
2498
    STFDEPX = 303,
2499
    MFSR_MFSRIN = 304,
2500
    MTSR_MTSRIN = 305,
2501
    MFDCR = 306,
2502
    MTDCR = 307,
2503
    NOP_GT_PWR6_NOP_GT_PWR7 = 308,
2504
    TLBIA = 309,
2505
    WRTEE_WRTEEI  = 310,
2506
    MSYNC = 311,
2507
    SLBSYNC = 312,
2508
    STOP  = 313,
2509
    DCBA_DCBI = 314,
2510
    SCHED_LIST_END = 315
2511
  };
2512
} // end Sched namespace
2513
} // end PPC namespace
2514
} // end llvm namespace
2515
#endif // GET_INSTRINFO_SCHED_ENUM
2516
2517
#ifdef GET_INSTRINFO_MC_DESC
2518
#undef GET_INSTRINFO_MC_DESC
2519
namespace llvm {
2520
2521
static const MCPhysReg ImplicitList1[] = { PPC::CR7, 0 };
2522
static const MCPhysReg ImplicitList2[] = { PPC::RM, 0 };
2523
static const MCPhysReg ImplicitList3[] = { PPC::CR0, 0 };
2524
static const MCPhysReg ImplicitList4[] = { PPC::CARRY, 0 };
2525
static const MCPhysReg ImplicitList5[] = { PPC::CARRY, PPC::CR0, 0 };
2526
static const MCPhysReg ImplicitList6[] = { PPC::X0, PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X11, PPC::X12, PPC::LR8, PPC::CTR8, PPC::CR0, PPC::CR1, PPC::CR5, PPC::CR6, PPC::CR7, 0 };
2527
static const MCPhysReg ImplicitList7[] = { PPC::R0, PPC::R3, PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10, PPC::R11, PPC::R12, PPC::LR, PPC::CTR, PPC::CR0, PPC::CR1, PPC::CR5, PPC::CR6, PPC::CR7, 0 };
2528
static const MCPhysReg ImplicitList8[] = { PPC::R1, 0 };
2529
static const MCPhysReg ImplicitList9[] = { PPC::CTR, 0 };
2530
static const MCPhysReg ImplicitList10[] = { PPC::CTR8, 0 };
2531
static const MCPhysReg ImplicitList11[] = { PPC::CTR, PPC::RM, 0 };
2532
static const MCPhysReg ImplicitList12[] = { PPC::LR, 0 };
2533
static const MCPhysReg ImplicitList13[] = { PPC::CTR8, PPC::RM, 0 };
2534
static const MCPhysReg ImplicitList14[] = { PPC::LR8, 0 };
2535
static const MCPhysReg ImplicitList15[] = { PPC::LR, PPC::RM, 0 };
2536
static const MCPhysReg ImplicitList16[] = { PPC::CR6, 0 };
2537
static const MCPhysReg ImplicitList17[] = { PPC::LR8, PPC::X2, 0 };
2538
static const MCPhysReg ImplicitList18[] = { PPC::CTR, PPC::LR, PPC::RM, 0 };
2539
static const MCPhysReg ImplicitList19[] = { PPC::CTR8, PPC::LR8, PPC::RM, 0 };
2540
static const MCPhysReg ImplicitList20[] = { PPC::LR8, PPC::RM, 0 };
2541
static const MCPhysReg ImplicitList21[] = { PPC::CR1EQ, 0 };
2542
static const MCPhysReg ImplicitList22[] = { PPC::X1, 0 };
2543
static const MCPhysReg ImplicitList23[] = { PPC::CR1, 0 };
2544
static const MCPhysReg ImplicitList24[] = { PPC::X0, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X11, PPC::X12, PPC::LR8, PPC::CTR8, PPC::CR0, PPC::CR1, PPC::CR5, PPC::CR6, PPC::CR7, 0 };
2545
static const MCPhysReg ImplicitList25[] = { PPC::R0, PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10, PPC::R11, PPC::R12, PPC::LR, PPC::CTR, PPC::CR0, PPC::CR1, PPC::CR5, PPC::CR6, PPC::CR7, 0 };
2546
static const MCPhysReg ImplicitList26[] = { PPC::LR, PPC::CTR, 0 };
2547
2548
static const MCOperandInfo OperandInfo2[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2549
static const MCOperandInfo OperandInfo3[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
2550
static const MCOperandInfo OperandInfo4[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
2551
static const MCOperandInfo OperandInfo5[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
2552
static const MCOperandInfo OperandInfo6[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
2553
static const MCOperandInfo OperandInfo7[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2554
static const MCOperandInfo OperandInfo8[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
2555
static const MCOperandInfo OperandInfo9[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
2556
static const MCOperandInfo OperandInfo10[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
2557
static const MCOperandInfo OperandInfo11[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
2558
static const MCOperandInfo OperandInfo12[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
2559
static const MCOperandInfo OperandInfo13[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, };
2560
static const MCOperandInfo OperandInfo14[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, };
2561
static const MCOperandInfo OperandInfo15[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2562
static const MCOperandInfo OperandInfo16[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2563
static const MCOperandInfo OperandInfo17[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, };
2564
static const MCOperandInfo OperandInfo18[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2565
static const MCOperandInfo OperandInfo19[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, };
2566
static const MCOperandInfo OperandInfo20[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, };
2567
static const MCOperandInfo OperandInfo21[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, };
2568
static const MCOperandInfo OperandInfo22[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, };
2569
static const MCOperandInfo OperandInfo23[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, };
2570
static const MCOperandInfo OperandInfo24[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, };
2571
static const MCOperandInfo OperandInfo25[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, };
2572
static const MCOperandInfo OperandInfo26[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, };
2573
static const MCOperandInfo OperandInfo27[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2574
static const MCOperandInfo OperandInfo28[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, };
2575
static const MCOperandInfo OperandInfo29[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, };
2576
static const MCOperandInfo OperandInfo30[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, };
2577
static const MCOperandInfo OperandInfo31[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2578
static const MCOperandInfo OperandInfo32[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2579
static const MCOperandInfo OperandInfo33[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2580
static const MCOperandInfo OperandInfo34[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2581
static const MCOperandInfo OperandInfo35[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2582
static const MCOperandInfo OperandInfo36[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2583
static const MCOperandInfo OperandInfo37[] = { { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
2584
static const MCOperandInfo OperandInfo38[] = { { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2585
static const MCOperandInfo OperandInfo39[] = { { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
2586
static const MCOperandInfo OperandInfo40[] = { { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
2587
static const MCOperandInfo OperandInfo41[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
2588
static const MCOperandInfo OperandInfo42[] = { { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
2589
static const MCOperandInfo OperandInfo43[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
2590
static const MCOperandInfo OperandInfo44[] = { { PPC::SPILLTOVSRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
2591
static const MCOperandInfo OperandInfo45[] = { { PPC::SPILLTOVSRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
2592
static const MCOperandInfo OperandInfo46[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2593
static const MCOperandInfo OperandInfo47[] = { { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
2594
static const MCOperandInfo OperandInfo48[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2595
static const MCOperandInfo OperandInfo49[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2596
static const MCOperandInfo OperandInfo50[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RC_NOX0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2597
static const MCOperandInfo OperandInfo51[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRC_NOR0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2598
static const MCOperandInfo OperandInfo52[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RC_NOX0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2599
static const MCOperandInfo OperandInfo53[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRC_NOR0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2600
static const MCOperandInfo OperandInfo54[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2601
static const MCOperandInfo OperandInfo55[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
2602
static const MCOperandInfo OperandInfo56[] = { { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2603
static const MCOperandInfo OperandInfo57[] = { { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2604
static const MCOperandInfo OperandInfo58[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2605
static const MCOperandInfo OperandInfo59[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2606
static const MCOperandInfo OperandInfo60[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2607
static const MCOperandInfo OperandInfo61[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2608
static const MCOperandInfo OperandInfo62[] = { { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2609
static const MCOperandInfo OperandInfo63[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { PPC::CRRCRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2610
static const MCOperandInfo OperandInfo64[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { PPC::CRRCRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2611
static const MCOperandInfo OperandInfo65[] = { { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2612
static const MCOperandInfo OperandInfo66[] = { { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2613
static const MCOperandInfo OperandInfo67[] = { { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2614
static const MCOperandInfo OperandInfo68[] = { { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2615
static const MCOperandInfo OperandInfo69[] = { { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2616
static const MCOperandInfo OperandInfo70[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
2617
static const MCOperandInfo OperandInfo71[] = { { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2618
static const MCOperandInfo OperandInfo72[] = { { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2619
static const MCOperandInfo OperandInfo73[] = { { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2620
static const MCOperandInfo OperandInfo74[] = { { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2621
static const MCOperandInfo OperandInfo75[] = { { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2622
static const MCOperandInfo OperandInfo76[] = { { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2623
static const MCOperandInfo OperandInfo77[] = { { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2624
static const MCOperandInfo OperandInfo78[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
2625
static const MCOperandInfo OperandInfo79[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2626
static const MCOperandInfo OperandInfo80[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2627
static const MCOperandInfo OperandInfo81[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
2628
static const MCOperandInfo OperandInfo82[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
2629
static const MCOperandInfo OperandInfo83[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
2630
static const MCOperandInfo OperandInfo84[] = { { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2631
static const MCOperandInfo OperandInfo85[] = { { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2632
static const MCOperandInfo OperandInfo86[] = { { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPE4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2633
static const MCOperandInfo OperandInfo87[] = { { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2634
static const MCOperandInfo OperandInfo88[] = { { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2635
static const MCOperandInfo OperandInfo89[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2636
static const MCOperandInfo OperandInfo90[] = { { PPC::SPE4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPE4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2637
static const MCOperandInfo OperandInfo91[] = { { PPC::SPE4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPE4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPE4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2638
static const MCOperandInfo OperandInfo92[] = { { PPC::SPE4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2639
static const MCOperandInfo OperandInfo93[] = { { PPC::SPE4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2640
static const MCOperandInfo OperandInfo94[] = { { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPE4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPE4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2641
static const MCOperandInfo OperandInfo95[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPE4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2642
static const MCOperandInfo OperandInfo96[] = { { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
2643
static const MCOperandInfo OperandInfo97[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
2644
static const MCOperandInfo OperandInfo98[] = { { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2645
static const MCOperandInfo OperandInfo99[] = { { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
2646
static const MCOperandInfo OperandInfo100[] = { { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
2647
static const MCOperandInfo OperandInfo101[] = { { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2648
static const MCOperandInfo OperandInfo102[] = { { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2649
static const MCOperandInfo OperandInfo103[] = { { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2650
static const MCOperandInfo OperandInfo104[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2651
static const MCOperandInfo OperandInfo105[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2652
static const MCOperandInfo OperandInfo106[] = { { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2653
static const MCOperandInfo OperandInfo107[] = { { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2654
static const MCOperandInfo OperandInfo108[] = { { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2655
static const MCOperandInfo OperandInfo109[] = { { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2656
static const MCOperandInfo OperandInfo110[] = { { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2657
static const MCOperandInfo OperandInfo111[] = { { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2658
static const MCOperandInfo OperandInfo112[] = { { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2659
static const MCOperandInfo OperandInfo113[] = { { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2660
static const MCOperandInfo OperandInfo114[] = { { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2661
static const MCOperandInfo OperandInfo115[] = { { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2662
static const MCOperandInfo OperandInfo116[] = { { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2663
static const MCOperandInfo OperandInfo117[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRC_NOR0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2664
static const MCOperandInfo OperandInfo118[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RC_NOX0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2665
static const MCOperandInfo OperandInfo119[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
2666
static const MCOperandInfo OperandInfo120[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
2667
static const MCOperandInfo OperandInfo121[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, ((1 << 16) | (1 << MCOI::TIED_TO)) }, };
2668
static const MCOperandInfo OperandInfo122[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, ((1 << 16) | (1 << MCOI::TIED_TO)) }, };
2669
static const MCOperandInfo OperandInfo123[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, ((1 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
2670
static const MCOperandInfo OperandInfo124[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, ((1 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
2671
static const MCOperandInfo OperandInfo125[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
2672
static const MCOperandInfo OperandInfo126[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2673
static const MCOperandInfo OperandInfo127[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2674
static const MCOperandInfo OperandInfo128[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { PPC::G8RC_NOX0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2675
static const MCOperandInfo OperandInfo129[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { PPC::GPRC_NOR0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2676
static const MCOperandInfo OperandInfo130[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2677
static const MCOperandInfo OperandInfo131[] = { { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
2678
static const MCOperandInfo OperandInfo132[] = { { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
2679
static const MCOperandInfo OperandInfo133[] = { { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, ((1 << 16) | (1 << MCOI::TIED_TO)) }, };
2680
static const MCOperandInfo OperandInfo134[] = { { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, ((1 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
2681
static const MCOperandInfo OperandInfo135[] = { { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
2682
static const MCOperandInfo OperandInfo136[] = { { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, ((1 << 16) | (1 << MCOI::TIED_TO)) }, };
2683
static const MCOperandInfo OperandInfo137[] = { { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, ((1 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
2684
static const MCOperandInfo OperandInfo138[] = { { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
2685
static const MCOperandInfo OperandInfo139[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2686
static const MCOperandInfo OperandInfo140[] = { { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
2687
static const MCOperandInfo OperandInfo141[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2688
static const MCOperandInfo OperandInfo142[] = { { PPC::VFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
2689
static const MCOperandInfo OperandInfo143[] = { { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
2690
static const MCOperandInfo OperandInfo144[] = { { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
2691
static const MCOperandInfo OperandInfo145[] = { { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2692
static const MCOperandInfo OperandInfo146[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2693
static const MCOperandInfo OperandInfo147[] = { { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2694
static const MCOperandInfo OperandInfo148[] = { { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2695
static const MCOperandInfo OperandInfo149[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2696
static const MCOperandInfo OperandInfo150[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2697
static const MCOperandInfo OperandInfo151[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
2698
static const MCOperandInfo OperandInfo152[] = { { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2699
static const MCOperandInfo OperandInfo153[] = { { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2700
static const MCOperandInfo OperandInfo154[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2701
static const MCOperandInfo OperandInfo155[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRSAVERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2702
static const MCOperandInfo OperandInfo156[] = { { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2703
static const MCOperandInfo OperandInfo157[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2704
static const MCOperandInfo OperandInfo158[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2705
static const MCOperandInfo OperandInfo159[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2706
static const MCOperandInfo OperandInfo160[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2707
static const MCOperandInfo OperandInfo161[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2708
static const MCOperandInfo OperandInfo162[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
2709
static const MCOperandInfo OperandInfo163[] = { { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
2710
static const MCOperandInfo OperandInfo164[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2711
static const MCOperandInfo OperandInfo165[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2712
static const MCOperandInfo OperandInfo166[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2713
static const MCOperandInfo OperandInfo167[] = { { PPC::VRSAVERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2714
static const MCOperandInfo OperandInfo168[] = { { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2715
static const MCOperandInfo OperandInfo169[] = { { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RC_NOX0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2716
static const MCOperandInfo OperandInfo170[] = { { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2717
static const MCOperandInfo OperandInfo171[] = { { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2718
static const MCOperandInfo OperandInfo172[] = { { PPC::QFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::QFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::QFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2719
static const MCOperandInfo OperandInfo173[] = { { PPC::QBRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::QBRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::QBRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2720
static const MCOperandInfo OperandInfo174[] = { { PPC::QSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::QSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::QSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2721
static const MCOperandInfo OperandInfo175[] = { { PPC::QFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::QFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2722
static const MCOperandInfo OperandInfo176[] = { { PPC::QBRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::QBRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2723
static const MCOperandInfo OperandInfo177[] = { { PPC::QSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::QSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2724
static const MCOperandInfo OperandInfo178[] = { { PPC::QFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::QFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2725
static const MCOperandInfo OperandInfo179[] = { { PPC::QSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::QSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2726
static const MCOperandInfo OperandInfo180[] = { { PPC::QFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::QFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::QFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2727
static const MCOperandInfo OperandInfo181[] = { { PPC::QSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::QSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::QSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2728
static const MCOperandInfo OperandInfo182[] = { { PPC::QBRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::QBRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2729
static const MCOperandInfo OperandInfo183[] = { { PPC::QBRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::QFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::QFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2730
static const MCOperandInfo OperandInfo184[] = { { PPC::QBRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::QSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::QSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2731
static const MCOperandInfo OperandInfo185[] = { { PPC::QFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::QFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::QFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::QFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2732
static const MCOperandInfo OperandInfo186[] = { { PPC::QSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::QSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::QSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::QSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2733
static const MCOperandInfo OperandInfo187[] = { { PPC::QSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::QSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::QSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::QFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2734
static const MCOperandInfo OperandInfo188[] = { { PPC::QSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::QFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2735
static const MCOperandInfo OperandInfo189[] = { { PPC::QFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::QBRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::QFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::QFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2736
static const MCOperandInfo OperandInfo190[] = { { PPC::QBRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::QBRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::QBRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::QBRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2737
static const MCOperandInfo OperandInfo191[] = { { PPC::QSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::QBRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::QSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::QSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2738
static const MCOperandInfo OperandInfo192[] = { { PPC::QFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2739
static const MCOperandInfo OperandInfo193[] = { { PPC::QFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
2740
static const MCOperandInfo OperandInfo194[] = { { PPC::QSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
2741
static const MCOperandInfo OperandInfo195[] = { { PPC::QFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, ((1 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
2742
static const MCOperandInfo OperandInfo196[] = { { PPC::QBRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
2743
static const MCOperandInfo OperandInfo197[] = { { PPC::QSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, ((1 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
2744
static const MCOperandInfo OperandInfo198[] = { { PPC::QFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2745
static const MCOperandInfo OperandInfo199[] = { { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { PPC::QFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
2746
static const MCOperandInfo OperandInfo200[] = { { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { PPC::QSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
2747
static const MCOperandInfo OperandInfo201[] = { { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
2748
static const MCOperandInfo OperandInfo202[] = { { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
2749
static const MCOperandInfo OperandInfo203[] = { { PPC::VRSAVERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
2750
static const MCOperandInfo OperandInfo204[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2751
static const MCOperandInfo OperandInfo205[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2752
static const MCOperandInfo OperandInfo206[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2753
static const MCOperandInfo OperandInfo207[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2754
static const MCOperandInfo OperandInfo208[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2755
static const MCOperandInfo OperandInfo209[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2756
static const MCOperandInfo OperandInfo210[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2757
static const MCOperandInfo OperandInfo211[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2758
static const MCOperandInfo OperandInfo212[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2759
static const MCOperandInfo OperandInfo213[] = { { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
2760
static const MCOperandInfo OperandInfo214[] = { { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
2761
static const MCOperandInfo OperandInfo215[] = { { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
2762
static const MCOperandInfo OperandInfo216[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRC_NOR0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRC_NOR0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
2763
static const MCOperandInfo OperandInfo217[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RC_NOX0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RC_NOX0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
2764
static const MCOperandInfo OperandInfo218[] = { { PPC::QBRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::QBRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::QBRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
2765
static const MCOperandInfo OperandInfo219[] = { { PPC::QFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::QFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::QFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
2766
static const MCOperandInfo OperandInfo220[] = { { PPC::QSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::QSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::QSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
2767
static const MCOperandInfo OperandInfo221[] = { { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
2768
static const MCOperandInfo OperandInfo222[] = { { PPC::SPE4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPE4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPE4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
2769
static const MCOperandInfo OperandInfo223[] = { { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
2770
static const MCOperandInfo OperandInfo224[] = { { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2771
static const MCOperandInfo OperandInfo225[] = { { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2772
static const MCOperandInfo OperandInfo226[] = { { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2773
static const MCOperandInfo OperandInfo227[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRC_NOR0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRC_NOR0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2774
static const MCOperandInfo OperandInfo228[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RC_NOX0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RC_NOX0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2775
static const MCOperandInfo OperandInfo229[] = { { PPC::QBRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::QBRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::QBRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2776
static const MCOperandInfo OperandInfo230[] = { { PPC::QFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::QFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::QFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2777
static const MCOperandInfo OperandInfo231[] = { { PPC::QSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::QSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::QSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2778
static const MCOperandInfo OperandInfo232[] = { { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2779
static const MCOperandInfo OperandInfo233[] = { { PPC::SPE4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPE4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPE4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2780
static const MCOperandInfo OperandInfo234[] = { { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2781
static const MCOperandInfo OperandInfo235[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2782
static const MCOperandInfo OperandInfo236[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2783
static const MCOperandInfo OperandInfo237[] = { { PPC::SPE4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
2784
static const MCOperandInfo OperandInfo238[] = { { PPC::SPE4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
2785
static const MCOperandInfo OperandInfo239[] = { { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
2786
static const MCOperandInfo OperandInfo240[] = { { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
2787
static const MCOperandInfo OperandInfo241[] = { { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
2788
static const MCOperandInfo OperandInfo242[] = { { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
2789
static const MCOperandInfo OperandInfo243[] = { { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
2790
static const MCOperandInfo OperandInfo244[] = { { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
2791
static const MCOperandInfo OperandInfo245[] = { { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
2792
static const MCOperandInfo OperandInfo246[] = { { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
2793
static const MCOperandInfo OperandInfo247[] = { { PPC::CRRC0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2794
static const MCOperandInfo OperandInfo248[] = { { PPC::CRRC0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2795
static const MCOperandInfo OperandInfo249[] = { { PPC::CRRC0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2796
static const MCOperandInfo OperandInfo250[] = { { PPC::CRRC0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2797
static const MCOperandInfo OperandInfo251[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
2798
static const MCOperandInfo OperandInfo252[] = { { PPC::CTRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
2799
static const MCOperandInfo OperandInfo253[] = { { PPC::CTRRC8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
2800
static const MCOperandInfo OperandInfo254[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2801
static const MCOperandInfo OperandInfo255[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2802
static const MCOperandInfo OperandInfo256[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
2803
static const MCOperandInfo OperandInfo257[] = { { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2804
static const MCOperandInfo OperandInfo258[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2805
static const MCOperandInfo OperandInfo259[] = { { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2806
static const MCOperandInfo OperandInfo260[] = { { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2807
static const MCOperandInfo OperandInfo261[] = { { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2808
static const MCOperandInfo OperandInfo262[] = { { PPC::VFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2809
static const MCOperandInfo OperandInfo263[] = { { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2810
static const MCOperandInfo OperandInfo264[] = { { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2811
static const MCOperandInfo OperandInfo265[] = { { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
2812
static const MCOperandInfo OperandInfo266[] = { { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2813
static const MCOperandInfo OperandInfo267[] = { { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { PPC::VFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2814
static const MCOperandInfo OperandInfo268[] = { { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2815
static const MCOperandInfo OperandInfo269[] = { { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2816
static const MCOperandInfo OperandInfo270[] = { { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2817
static const MCOperandInfo OperandInfo271[] = { { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2818
static const MCOperandInfo OperandInfo272[] = { { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2819
static const MCOperandInfo OperandInfo273[] = { { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2820
static const MCOperandInfo OperandInfo274[] = { { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2821
static const MCOperandInfo OperandInfo275[] = { { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2822
static const MCOperandInfo OperandInfo276[] = { { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2823
static const MCOperandInfo OperandInfo277[] = { { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2824
static const MCOperandInfo OperandInfo278[] = { { PPC::VFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2825
static const MCOperandInfo OperandInfo279[] = { { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2826
static const MCOperandInfo OperandInfo280[] = { { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2827
static const MCOperandInfo OperandInfo281[] = { { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2828
static const MCOperandInfo OperandInfo282[] = { { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2829
static const MCOperandInfo OperandInfo283[] = { { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2830
static const MCOperandInfo OperandInfo284[] = { { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2831
static const MCOperandInfo OperandInfo285[] = { { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2832
static const MCOperandInfo OperandInfo286[] = { { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2833
static const MCOperandInfo OperandInfo287[] = { { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2834
static const MCOperandInfo OperandInfo288[] = { { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2835
static const MCOperandInfo OperandInfo289[] = { { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2836
static const MCOperandInfo OperandInfo290[] = { { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2837
static const MCOperandInfo OperandInfo291[] = { { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2838
static const MCOperandInfo OperandInfo292[] = { { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2839
static const MCOperandInfo OperandInfo293[] = { { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2840
static const MCOperandInfo OperandInfo294[] = { { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2841
static const MCOperandInfo OperandInfo295[] = { { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2842
static const MCOperandInfo OperandInfo296[] = { { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2843
static const MCOperandInfo OperandInfo297[] = { { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2844
static const MCOperandInfo OperandInfo298[] = { { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2845
static const MCOperandInfo OperandInfo299[] = { { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2846
static const MCOperandInfo OperandInfo300[] = { { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2847
static const MCOperandInfo OperandInfo301[] = { { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2848
static const MCOperandInfo OperandInfo302[] = { { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2849
static const MCOperandInfo OperandInfo303[] = { { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
2850
static const MCOperandInfo OperandInfo304[] = { { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2851
static const MCOperandInfo OperandInfo305[] = { { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2852
static const MCOperandInfo OperandInfo306[] = { { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2853
static const MCOperandInfo OperandInfo307[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2854
static const MCOperandInfo OperandInfo308[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
2855
static const MCOperandInfo OperandInfo309[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
2856
2857
extern const MCInstrDesc PPCInsts[] = {
2858
  { 0,  1,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #0 = PHI
2859
  { 1,  0,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #1 = INLINEASM
2860
  { 2,  1,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr },  // Inst #2 = CFI_INSTRUCTION
2861
  { 3,  1,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr },  // Inst #3 = EH_LABEL
2862
  { 4,  1,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr },  // Inst #4 = GC_LABEL
2863
  { 5,  1,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr },  // Inst #5 = ANNOTATION_LABEL
2864
  { 6,  0,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #6 = KILL
2865
  { 7,  3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo4, -1 ,nullptr },  // Inst #7 = EXTRACT_SUBREG
2866
  { 8,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo5, -1 ,nullptr },  // Inst #8 = INSERT_SUBREG
2867
  { 9,  1,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #9 = IMPLICIT_DEF
2868
  { 10, 4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo6, -1 ,nullptr },  // Inst #10 = SUBREG_TO_REG
2869
  { 11, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo4, -1 ,nullptr },  // Inst #11 = COPY_TO_REGCLASS
2870
  { 12, 0,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #12 = DBG_VALUE
2871
  { 13, 1,  0,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #13 = DBG_LABEL
2872
  { 14, 2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo7, -1 ,nullptr },  // Inst #14 = REG_SEQUENCE
2873
  { 15, 2,  1,  0,  117,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo7, -1 ,nullptr },  // Inst #15 = COPY
2874
  { 16, 0,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #16 = BUNDLE
2875
  { 17, 1,  0,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr },  // Inst #17 = LIFETIME_START
2876
  { 18, 1,  0,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr },  // Inst #18 = LIFETIME_END
2877
  { 19, 2,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo8, -1 ,nullptr },  // Inst #19 = STACKMAP
2878
  { 20, 1,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #20 = FENTRY_CALL
2879
  { 21, 6,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo9, -1 ,nullptr },  // Inst #21 = PATCHPOINT
2880
  { 22, 1,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x0ULL, nullptr, nullptr, OperandInfo10, -1 ,nullptr },  // Inst #22 = LOAD_STACK_GUARD
2881
  { 23, 0,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #23 = STATEPOINT
2882
  { 24, 2,  0,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo11, -1 ,nullptr },  // Inst #24 = LOCAL_ESCAPE
2883
  { 25, 1,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #25 = FAULTING_OP
2884
  { 26, 1,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #26 = PATCHABLE_OP
2885
  { 27, 0,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #27 = PATCHABLE_FUNCTION_ENTER
2886
  { 28, 0,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #28 = PATCHABLE_RET
2887
  { 29, 0,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #29 = PATCHABLE_FUNCTION_EXIT
2888
  { 30, 0,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #30 = PATCHABLE_TAIL_CALL
2889
  { 31, 2,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo11, -1 ,nullptr },  // Inst #31 = PATCHABLE_EVENT_CALL
2890
  { 32, 3,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr },  // Inst #32 = PATCHABLE_TYPED_EVENT_CALL
2891
  { 33, 1,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #33 = ICALL_BRANCH_FUNNEL
2892
  { 34, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #34 = G_ADD
2893
  { 35, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #35 = G_SUB
2894
  { 36, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #36 = G_MUL
2895
  { 37, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #37 = G_SDIV
2896
  { 38, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #38 = G_UDIV
2897
  { 39, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #39 = G_SREM
2898
  { 40, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #40 = G_UREM
2899
  { 41, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #41 = G_AND
2900
  { 42, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #42 = G_OR
2901
  { 43, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #43 = G_XOR
2902
  { 44, 1,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo14, -1 ,nullptr },  // Inst #44 = G_IMPLICIT_DEF
2903
  { 45, 1,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, OperandInfo14, -1 ,nullptr },  // Inst #45 = G_PHI
2904
  { 46, 2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo15, -1 ,nullptr },  // Inst #46 = G_FRAME_INDEX
2905
  { 47, 2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo15, -1 ,nullptr },  // Inst #47 = G_GLOBAL_VALUE
2906
  { 48, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo16, -1 ,nullptr },  // Inst #48 = G_EXTRACT
2907
  { 49, 2,  2,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #49 = G_UNMERGE_VALUES
2908
  { 50, 4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr },  // Inst #50 = G_INSERT
2909
  { 51, 2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #51 = G_MERGE_VALUES
2910
  { 52, 2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #52 = G_PTRTOINT
2911
  { 53, 2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #53 = G_INTTOPTR
2912
  { 54, 2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #54 = G_BITCAST
2913
  { 55, 2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr },  // Inst #55 = G_INTRINSIC_TRUNC
2914
  { 56, 2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr },  // Inst #56 = G_INTRINSIC_ROUND
2915
  { 57, 2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #57 = G_LOAD
2916
  { 58, 2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #58 = G_SEXTLOAD
2917
  { 59, 2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #59 = G_ZEXTLOAD
2918
  { 60, 2,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #60 = G_STORE
2919
  { 61, 5,  2,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo20, -1 ,nullptr },  // Inst #61 = G_ATOMIC_CMPXCHG_WITH_SUCCESS
2920
  { 62, 4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo21, -1 ,nullptr },  // Inst #62 = G_ATOMIC_CMPXCHG
2921
  { 63, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo22, -1 ,nullptr },  // Inst #63 = G_ATOMICRMW_XCHG
2922
  { 64, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo22, -1 ,nullptr },  // Inst #64 = G_ATOMICRMW_ADD
2923
  { 65, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo22, -1 ,nullptr },  // Inst #65 = G_ATOMICRMW_SUB
2924
  { 66, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo22, -1 ,nullptr },  // Inst #66 = G_ATOMICRMW_AND
2925
  { 67, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo22, -1 ,nullptr },  // Inst #67 = G_ATOMICRMW_NAND
2926
  { 68, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo22, -1 ,nullptr },  // Inst #68 = G_ATOMICRMW_OR
2927
  { 69, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo22, -1 ,nullptr },  // Inst #69 = G_ATOMICRMW_XOR
2928
  { 70, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo22, -1 ,nullptr },  // Inst #70 = G_ATOMICRMW_MAX
2929
  { 71, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo22, -1 ,nullptr },  // Inst #71 = G_ATOMICRMW_MIN
2930
  { 72, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo22, -1 ,nullptr },  // Inst #72 = G_ATOMICRMW_UMAX
2931
  { 73, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo22, -1 ,nullptr },  // Inst #73 = G_ATOMICRMW_UMIN
2932
  { 74, 2,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo15, -1 ,nullptr },  // Inst #74 = G_BRCOND
2933
  { 75, 1,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo14, -1 ,nullptr },  // Inst #75 = G_BRINDIRECT
2934
  { 76, 1,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #76 = G_INTRINSIC
2935
  { 77, 1,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #77 = G_INTRINSIC_W_SIDE_EFFECTS
2936
  { 78, 2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #78 = G_ANYEXT
2937
  { 79, 2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #79 = G_TRUNC
2938
  { 80, 2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo15, -1 ,nullptr },  // Inst #80 = G_CONSTANT
2939
  { 81, 2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo15, -1 ,nullptr },  // Inst #81 = G_FCONSTANT
2940
  { 82, 1,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo14, -1 ,nullptr },  // Inst #82 = G_VASTART
2941
  { 83, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo16, -1 ,nullptr },  // Inst #83 = G_VAARG
2942
  { 84, 2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #84 = G_SEXT
2943
  { 85, 2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #85 = G_ZEXT
2944
  { 86, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #86 = G_SHL
2945
  { 87, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #87 = G_LSHR
2946
  { 88, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #88 = G_ASHR
2947
  { 89, 4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo23, -1 ,nullptr },  // Inst #89 = G_ICMP
2948
  { 90, 4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo23, -1 ,nullptr },  // Inst #90 = G_FCMP
2949
  { 91, 4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo21, -1 ,nullptr },  // Inst #91 = G_SELECT
2950
  { 92, 4,  2,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo21, -1 ,nullptr },  // Inst #92 = G_UADDO
2951
  { 93, 5,  2,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo24, -1 ,nullptr },  // Inst #93 = G_UADDE
2952
  { 94, 4,  2,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo21, -1 ,nullptr },  // Inst #94 = G_USUBO
2953
  { 95, 5,  2,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo24, -1 ,nullptr },  // Inst #95 = G_USUBE
2954
  { 96, 4,  2,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo21, -1 ,nullptr },  // Inst #96 = G_SADDO
2955
  { 97, 5,  2,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo24, -1 ,nullptr },  // Inst #97 = G_SADDE
2956
  { 98, 4,  2,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo21, -1 ,nullptr },  // Inst #98 = G_SSUBO
2957
  { 99, 5,  2,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo24, -1 ,nullptr },  // Inst #99 = G_SSUBE
2958
  { 100,  4,  2,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo21, -1 ,nullptr },  // Inst #100 = G_UMULO
2959
  { 101,  4,  2,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo21, -1 ,nullptr },  // Inst #101 = G_SMULO
2960
  { 102,  3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #102 = G_UMULH
2961
  { 103,  3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #103 = G_SMULH
2962
  { 104,  3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #104 = G_FADD
2963
  { 105,  3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #105 = G_FSUB
2964
  { 106,  3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #106 = G_FMUL
2965
  { 107,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo25, -1 ,nullptr },  // Inst #107 = G_FMA
2966
  { 108,  3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #108 = G_FDIV
2967
  { 109,  3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #109 = G_FREM
2968
  { 110,  3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #110 = G_FPOW
2969
  { 111,  2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr },  // Inst #111 = G_FEXP
2970
  { 112,  2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr },  // Inst #112 = G_FEXP2
2971
  { 113,  2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr },  // Inst #113 = G_FLOG
2972
  { 114,  2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr },  // Inst #114 = G_FLOG2
2973
  { 115,  2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr },  // Inst #115 = G_FNEG
2974
  { 116,  2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #116 = G_FPEXT
2975
  { 117,  2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #117 = G_FPTRUNC
2976
  { 118,  2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #118 = G_FPTOSI
2977
  { 119,  2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #119 = G_FPTOUI
2978
  { 120,  2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #120 = G_SITOFP
2979
  { 121,  2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #121 = G_UITOFP
2980
  { 122,  2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr },  // Inst #122 = G_FABS
2981
  { 123,  3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo26, -1 ,nullptr },  // Inst #123 = G_GEP
2982
  { 124,  3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo27, -1 ,nullptr },  // Inst #124 = G_PTR_MASK
2983
  { 125,  1,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #125 = G_BR
2984
  { 126,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo28, -1 ,nullptr },  // Inst #126 = G_INSERT_VECTOR_ELT
2985
  { 127,  3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo29, -1 ,nullptr },  // Inst #127 = G_EXTRACT_VECTOR_ELT
2986
  { 128,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo30, -1 ,nullptr },  // Inst #128 = G_SHUFFLE_VECTOR
2987
  { 129,  2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr },  // Inst #129 = G_CTTZ
2988
  { 130,  2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr },  // Inst #130 = G_CTTZ_ZERO_UNDEF
2989
  { 131,  2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr },  // Inst #131 = G_CTLZ
2990
  { 132,  2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr },  // Inst #132 = G_CTLZ_ZERO_UNDEF
2991
  { 133,  2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr },  // Inst #133 = G_CTPOP
2992
  { 134,  2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr },  // Inst #134 = G_BSWAP
2993
  { 135,  2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #135 = G_ADDRSPACE_CAST
2994
  { 136,  2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo15, -1 ,nullptr },  // Inst #136 = G_BLOCK_ADDR
2995
  { 137,  1,  0,  4,  1,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo31, -1 ,nullptr },  // Inst #137 = CFENCE8
2996
  { 138,  4,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr },  // Inst #138 = CLRLSLDI
2997
  { 139,  4,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr },  // Inst #139 = CLRLSLDIo
2998
  { 140,  4,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo33, -1 ,nullptr },  // Inst #140 = CLRLSLWI
2999
  { 141,  4,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo33, -1 ,nullptr },  // Inst #141 = CLRLSLWIo
3000
  { 142,  3,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo34, -1 ,nullptr },  // Inst #142 = CLRRDI
3001
  { 143,  3,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo34, -1 ,nullptr },  // Inst #143 = CLRRDIo
3002
  { 144,  3,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo35, -1 ,nullptr },  // Inst #144 = CLRRWI
3003
  { 145,  3,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo35, -1 ,nullptr },  // Inst #145 = CLRRWIo
3004
  { 146,  2,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #146 = CP_COPY_FIRST
3005
  { 147,  2,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #147 = CP_COPYx
3006
  { 148,  2,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #148 = CP_PASTE_LAST
3007
  { 149,  2,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #149 = CP_PASTEx
3008
  { 150,  2,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #150 = DCBFL
3009
  { 151,  2,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #151 = DCBFLP
3010
  { 152,  2,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #152 = DCBFx
3011
  { 153,  3,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #153 = DCBTCT
3012
  { 154,  3,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #154 = DCBTDS
3013
  { 155,  3,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #155 = DCBTSTCT
3014
  { 156,  3,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #156 = DCBTSTDS
3015
  { 157,  2,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #157 = DCBTSTT
3016
  { 158,  2,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #158 = DCBTSTx
3017
  { 159,  2,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #159 = DCBTT
3018
  { 160,  2,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #160 = DCBTx
3019
  { 161,  3,  1,  4,  211,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo39, -1 ,nullptr },  // Inst #161 = DFLOADf32
3020
  { 162,  3,  1,  4,  174,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr },  // Inst #162 = DFLOADf64
3021
  { 163,  3,  0,  4,  217,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo39, -1 ,nullptr },  // Inst #163 = DFSTOREf32
3022
  { 164,  3,  0,  4,  217,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr },  // Inst #164 = DFSTOREf64
3023
  { 165,  4,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr },  // Inst #165 = EXTLDI
3024
  { 166,  4,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr },  // Inst #166 = EXTLDIo
3025
  { 167,  4,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo33, -1 ,nullptr },  // Inst #167 = EXTLWI
3026
  { 168,  4,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo33, -1 ,nullptr },  // Inst #168 = EXTLWIo
3027
  { 169,  4,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr },  // Inst #169 = EXTRDI
3028
  { 170,  4,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr },  // Inst #170 = EXTRDIo
3029
  { 171,  4,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo33, -1 ,nullptr },  // Inst #171 = EXTRWI
3030
  { 172,  4,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo33, -1 ,nullptr },  // Inst #172 = EXTRWIo
3031
  { 173,  4,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo33, -1 ,nullptr },  // Inst #173 = INSLWI
3032
  { 174,  4,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo33, -1 ,nullptr },  // Inst #174 = INSLWIo
3033
  { 175,  4,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr },  // Inst #175 = INSRDI
3034
  { 176,  4,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr },  // Inst #176 = INSRDIo
3035
  { 177,  4,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo33, -1 ,nullptr },  // Inst #177 = INSRWI
3036
  { 178,  4,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo33, -1 ,nullptr },  // Inst #178 = INSRWIo
3037
  { 179,  3,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo41, -1 ,nullptr },  // Inst #179 = LAx
3038
  { 180,  3,  1,  4,  208,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0xc0ULL, nullptr, nullptr, OperandInfo42, -1 ,nullptr },  // Inst #180 = LIWAX
3039
  { 181,  3,  1,  4,  174,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0xc0ULL, nullptr, nullptr, OperandInfo42, -1 ,nullptr },  // Inst #181 = LIWZX
3040
  { 182,  4,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #182 = RLWIMIbm
3041
  { 183,  4,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #183 = RLWIMIobm
3042
  { 184,  4,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #184 = RLWINMbm
3043
  { 185,  4,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #185 = RLWINMobm
3044
  { 186,  4,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #186 = RLWNMbm
3045
  { 187,  4,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #187 = RLWNMobm
3046
  { 188,  3,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo34, -1 ,nullptr },  // Inst #188 = ROTRDI
3047
  { 189,  3,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo34, -1 ,nullptr },  // Inst #189 = ROTRDIo
3048
  { 190,  3,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo35, -1 ,nullptr },  // Inst #190 = ROTRWI
3049
  { 191,  3,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo35, -1 ,nullptr },  // Inst #191 = ROTRWIo
3050
  { 192,  3,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo34, -1 ,nullptr },  // Inst #192 = SLDI
3051
  { 193,  3,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo34, -1 ,nullptr },  // Inst #193 = SLDIo
3052
  { 194,  3,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo35, -1 ,nullptr },  // Inst #194 = SLWI
3053
  { 195,  3,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo35, -1 ,nullptr },  // Inst #195 = SLWIo
3054
  { 196,  3,  1,  4,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #196 = SPILLTOVSR_LD
3055
  { 197,  3,  1,  4,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, nullptr, OperandInfo45, -1 ,nullptr },  // Inst #197 = SPILLTOVSR_LDX
3056
  { 198,  3,  0,  4,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #198 = SPILLTOVSR_ST
3057
  { 199,  3,  0,  4,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, nullptr, OperandInfo45, -1 ,nullptr },  // Inst #199 = SPILLTOVSR_STX
3058
  { 200,  3,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo34, -1 ,nullptr },  // Inst #200 = SRDI
3059
  { 201,  3,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo34, -1 ,nullptr },  // Inst #201 = SRDIo
3060
  { 202,  3,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo35, -1 ,nullptr },  // Inst #202 = SRWI
3061
  { 203,  3,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo35, -1 ,nullptr },  // Inst #203 = SRWIo
3062
  { 204,  3,  0,  4,  217,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0xc0ULL, nullptr, nullptr, OperandInfo42, -1 ,nullptr },  // Inst #204 = STIWX
3063
  { 205,  3,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo35, -1 ,nullptr },  // Inst #205 = SUBI
3064
  { 206,  3,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo35, -1 ,nullptr },  // Inst #206 = SUBIC
3065
  { 207,  3,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo35, -1 ,nullptr },  // Inst #207 = SUBICo
3066
  { 208,  3,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo35, -1 ,nullptr },  // Inst #208 = SUBIS
3067
  { 209,  2,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr },  // Inst #209 = SUBPCIS
3068
  { 210,  3,  1,  4,  211,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0xc0ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr },  // Inst #210 = XFLOADf32
3069
  { 211,  3,  1,  4,  174,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0xc0ULL, ImplicitList2, nullptr, OperandInfo42, -1 ,nullptr },  // Inst #211 = XFLOADf64
3070
  { 212,  3,  0,  4,  217,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0xc0ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr },  // Inst #212 = XFSTOREf32
3071
  { 213,  3,  0,  4,  217,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0xc0ULL, ImplicitList2, nullptr, OperandInfo42, -1 ,nullptr },  // Inst #213 = XFSTOREf64
3072
  { 214,  3,  1,  4,  116,  0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, nullptr, OperandInfo48, -1 ,nullptr },  // Inst #214 = ADD4
3073
  { 215,  3,  1,  4,  116,  0, 0x8ULL, nullptr, nullptr, OperandInfo35, -1 ,nullptr },  // Inst #215 = ADD4TLS
3074
  { 216,  3,  1,  4,  116,  0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, ImplicitList3, OperandInfo48, -1 ,nullptr },  // Inst #216 = ADD4o
3075
  { 217,  3,  1,  4,  116,  0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, nullptr, OperandInfo49, -1 ,nullptr },  // Inst #217 = ADD8
3076
  { 218,  3,  1,  4,  116,  0, 0x8ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr },  // Inst #218 = ADD8TLS
3077
  { 219,  3,  1,  4,  116,  0, 0x8ULL, nullptr, nullptr, OperandInfo34, -1 ,nullptr },  // Inst #219 = ADD8TLS_
3078
  { 220,  3,  1,  4,  116,  0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, ImplicitList3, OperandInfo49, -1 ,nullptr },  // Inst #220 = ADD8o
3079
  { 221,  3,  1,  4,  115,  0|(1ULL<<MCID::Commutable), 0xcULL, nullptr, ImplicitList4, OperandInfo48, -1 ,nullptr },  // Inst #221 = ADDC
3080
  { 222,  3,  1,  4,  115,  0|(1ULL<<MCID::Commutable), 0xcULL, nullptr, ImplicitList4, OperandInfo49, -1 ,nullptr },  // Inst #222 = ADDC8
3081
  { 223,  3,  1,  4,  245,  0|(1ULL<<MCID::Commutable), 0xcULL, nullptr, ImplicitList5, OperandInfo49, -1 ,nullptr },  // Inst #223 = ADDC8o
3082
  { 224,  3,  1,  4,  245,  0|(1ULL<<MCID::Commutable), 0xcULL, nullptr, ImplicitList5, OperandInfo48, -1 ,nullptr },  // Inst #224 = ADDCo
3083
  { 225,  3,  1,  4,  115,  0|(1ULL<<MCID::Commutable), 0x8ULL, ImplicitList4, ImplicitList4, OperandInfo48, -1 ,nullptr },  // Inst #225 = ADDE
3084
  { 226,  3,  1,  4,  115,  0|(1ULL<<MCID::Commutable), 0x8ULL, ImplicitList4, ImplicitList4, OperandInfo49, -1 ,nullptr },  // Inst #226 = ADDE8
3085
  { 227,  3,  1,  4,  115,  0|(1ULL<<MCID::Commutable), 0x8ULL, ImplicitList4, ImplicitList5, OperandInfo49, -1 ,nullptr },  // Inst #227 = ADDE8o
3086
  { 228,  3,  1,  4,  115,  0|(1ULL<<MCID::Commutable), 0x8ULL, ImplicitList4, ImplicitList5, OperandInfo48, -1 ,nullptr },  // Inst #228 = ADDEo
3087
  { 229,  3,  1,  4,  116,  0, 0x8ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #229 = ADDI
3088
  { 230,  3,  1,  4,  116,  0, 0x8ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr },  // Inst #230 = ADDI8
3089
  { 231,  3,  1,  4,  115,  0, 0xcULL, nullptr, ImplicitList4, OperandInfo35, -1 ,nullptr },  // Inst #231 = ADDIC
3090
  { 232,  3,  1,  4,  115,  0, 0x8ULL, nullptr, ImplicitList4, OperandInfo34, -1 ,nullptr },  // Inst #232 = ADDIC8
3091
  { 233,  3,  1,  4,  115,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL, nullptr, ImplicitList5, OperandInfo35, -1 ,nullptr },  // Inst #233 = ADDICo
3092
  { 234,  3,  1,  4,  116,  0, 0x8ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #234 = ADDIS
3093
  { 235,  3,  1,  4,  116,  0, 0x8ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr },  // Inst #235 = ADDIS8
3094
  { 236,  3,  1,  4,  0,  0, 0x0ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr },  // Inst #236 = ADDISdtprelHA
3095
  { 237,  3,  1,  4,  0,  0, 0x0ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #237 = ADDISdtprelHA32
3096
  { 238,  3,  1,  4,  0,  0, 0x0ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr },  // Inst #238 = ADDISgotTprelHA
3097
  { 239,  3,  1,  4,  0,  0, 0x0ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr },  // Inst #239 = ADDIStlsgdHA
3098
  { 240,  3,  1,  4,  0,  0, 0x0ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr },  // Inst #240 = ADDIStlsldHA
3099
  { 241,  3,  1,  4,  117,  0|(1ULL<<MCID::Rematerializable), 0x0ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr },  // Inst #241 = ADDIStocHA
3100
  { 242,  3,  1,  4,  0,  0, 0x0ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr },  // Inst #242 = ADDIdtprelL
3101
  { 243,  3,  1,  4,  0,  0, 0x0ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #243 = ADDIdtprelL32
3102
  { 244,  3,  1,  4,  0,  0, 0x0ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr },  // Inst #244 = ADDItlsgdL
3103
  { 245,  3,  1,  4,  0,  0, 0x0ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #245 = ADDItlsgdL32
3104
  { 246,  4,  1,  4,  0,  0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL, nullptr, ImplicitList6, OperandInfo52, -1 ,nullptr },  // Inst #246 = ADDItlsgdLADDR
3105
  { 247,  4,  1,  4,  0,  0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL, nullptr, ImplicitList7, OperandInfo53, -1 ,nullptr },  // Inst #247 = ADDItlsgdLADDR32
3106
  { 248,  3,  1,  4,  0,  0, 0x0ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr },  // Inst #248 = ADDItlsldL
3107
  { 249,  3,  1,  4,  0,  0, 0x0ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #249 = ADDItlsldL32
3108
  { 250,  4,  1,  4,  0,  0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL, nullptr, ImplicitList6, OperandInfo52, -1 ,nullptr },  // Inst #250 = ADDItlsldLADDR
3109
  { 251,  4,  1,  4,  0,  0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL, nullptr, ImplicitList7, OperandInfo53, -1 ,nullptr },  // Inst #251 = ADDItlsldLADDR32
3110
  { 252,  3,  1,  4,  117,  0|(1ULL<<MCID::Rematerializable), 0x0ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr },  // Inst #252 = ADDItocL
3111
  { 253,  2,  1,  4,  115,  0, 0x8ULL, ImplicitList4, ImplicitList4, OperandInfo36, -1 ,nullptr },  // Inst #253 = ADDME
3112
  { 254,  2,  1,  4,  115,  0, 0x8ULL, ImplicitList4, ImplicitList4, OperandInfo54, -1 ,nullptr },  // Inst #254 = ADDME8
3113
  { 255,  2,  1,  4,  115,  0, 0x8ULL, ImplicitList4, ImplicitList5, OperandInfo54, -1 ,nullptr },  // Inst #255 = ADDME8o
3114
  { 256,  2,  1,  4,  115,  0, 0x8ULL, ImplicitList4, ImplicitList5, OperandInfo36, -1 ,nullptr },  // Inst #256 = ADDMEo
3115
  { 257,  2,  1,  4,  289,  0, 0x8ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr },  // Inst #257 = ADDPCIS
3116
  { 258,  2,  1,  4,  115,  0, 0x8ULL, ImplicitList4, ImplicitList4, OperandInfo36, -1 ,nullptr },  // Inst #258 = ADDZE
3117
  { 259,  2,  1,  4,  115,  0, 0x8ULL, ImplicitList4, ImplicitList4, OperandInfo54, -1 ,nullptr },  // Inst #259 = ADDZE8
3118
  { 260,  2,  1,  4,  115,  0, 0x8ULL, ImplicitList4, ImplicitList5, OperandInfo54, -1 ,nullptr },  // Inst #260 = ADDZE8o
3119
  { 261,  2,  1,  4,  115,  0, 0x8ULL, ImplicitList4, ImplicitList5, OperandInfo36, -1 ,nullptr },  // Inst #261 = ADDZEo
3120
  { 262,  2,  0,  4,  0,  0, 0x0ULL, ImplicitList8, ImplicitList8, OperandInfo7, -1 ,nullptr },  // Inst #262 = ADJCALLSTACKDOWN
3121
  { 263,  2,  0,  4,  0,  0, 0x0ULL, ImplicitList8, ImplicitList8, OperandInfo7, -1 ,nullptr },  // Inst #263 = ADJCALLSTACKUP
3122
  { 264,  3,  1,  4,  116,  0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, nullptr, OperandInfo48, -1 ,nullptr },  // Inst #264 = AND
3123
  { 265,  3,  1,  4,  116,  0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, nullptr, OperandInfo49, -1 ,nullptr },  // Inst #265 = AND8
3124
  { 266,  3,  1,  4,  116,  0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, ImplicitList3, OperandInfo49, -1 ,nullptr },  // Inst #266 = AND8o
3125
  { 267,  3,  1,  4,  116,  0, 0x8ULL, nullptr, nullptr, OperandInfo48, -1 ,nullptr },  // Inst #267 = ANDC
3126
  { 268,  3,  1,  4,  116,  0, 0x8ULL, nullptr, nullptr, OperandInfo49, -1 ,nullptr },  // Inst #268 = ANDC8
3127
  { 269,  3,  1,  4,  116,  0, 0x8ULL, nullptr, ImplicitList3, OperandInfo49, -1 ,nullptr },  // Inst #269 = ANDC8o
3128
  { 270,  3,  1,  4,  116,  0, 0x8ULL, nullptr, ImplicitList3, OperandInfo48, -1 ,nullptr },  // Inst #270 = ANDCo
3129
  { 271,  3,  1,  4,  115,  0, 0x8ULL, nullptr, ImplicitList3, OperandInfo35, -1 ,nullptr },  // Inst #271 = ANDISo
3130
  { 272,  3,  1,  4,  115,  0, 0x8ULL, nullptr, ImplicitList3, OperandInfo34, -1 ,nullptr },  // Inst #272 = ANDISo8
3131
  { 273,  3,  1,  4,  115,  0, 0x8ULL, nullptr, ImplicitList3, OperandInfo35, -1 ,nullptr },  // Inst #273 = ANDIo
3132
  { 274,  3,  1,  4,  115,  0, 0x8ULL, nullptr, ImplicitList3, OperandInfo34, -1 ,nullptr },  // Inst #274 = ANDIo8
3133
  { 275,  2,  1,  4,  0,  0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr },  // Inst #275 = ANDIo_1_EQ_BIT
3134
  { 276,  2,  1,  4,  0,  0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, nullptr, OperandInfo57, -1 ,nullptr },  // Inst #276 = ANDIo_1_EQ_BIT8
3135
  { 277,  2,  1,  4,  0,  0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr },  // Inst #277 = ANDIo_1_GT_BIT
3136
  { 278,  2,  1,  4,  0,  0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, nullptr, OperandInfo57, -1 ,nullptr },  // Inst #278 = ANDIo_1_GT_BIT8
3137
  { 279,  3,  1,  4,  116,  0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, ImplicitList3, OperandInfo48, -1 ,nullptr },  // Inst #279 = ANDo
3138
  { 280,  5,  1,  4,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo58, -1 ,nullptr },  // Inst #280 = ATOMIC_CMP_SWAP_I16
3139
  { 281,  5,  1,  4,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo58, -1 ,nullptr },  // Inst #281 = ATOMIC_CMP_SWAP_I32
3140
  { 282,  5,  1,  4,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo59, -1 ,nullptr },  // Inst #282 = ATOMIC_CMP_SWAP_I64
3141
  { 283,  5,  1,  4,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo58, -1 ,nullptr },  // Inst #283 = ATOMIC_CMP_SWAP_I8
3142
  { 284,  4,  1,  4,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo60, -1 ,nullptr },  // Inst #284 = ATOMIC_LOAD_ADD_I16
3143
  { 285,  4,  1,  4,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo60, -1 ,nullptr },  // Inst #285 = ATOMIC_LOAD_ADD_I32
3144
  { 286,  4,  1,  4,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo61, -1 ,nullptr },  // Inst #286 = ATOMIC_LOAD_ADD_I64
3145
  { 287,  4,  1,  4,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo60, -1 ,nullptr },  // Inst #287 = ATOMIC_LOAD_ADD_I8
3146
  { 288,  4,  1,  4,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo60, -1 ,nullptr },  // Inst #288 = ATOMIC_LOAD_AND_I16
3147
  { 289,  4,  1,  4,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo60, -1 ,nullptr },  // Inst #289 = ATOMIC_LOAD_AND_I32
3148
  { 290,  4,  1,  4,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo61, -1 ,nullptr },  // Inst #290 = ATOMIC_LOAD_AND_I64
3149
  { 291,  4,  1,  4,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo60, -1 ,nullptr },  // Inst #291 = ATOMIC_LOAD_AND_I8
3150
  { 292,  4,  1,  4,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo60, -1 ,nullptr },  // Inst #292 = ATOMIC_LOAD_MAX_I16
3151
  { 293,  4,  1,  4,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo60, -1 ,nullptr },  // Inst #293 = ATOMIC_LOAD_MAX_I32
3152
  { 294,  4,  1,  4,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo61, -1 ,nullptr },  // Inst #294 = ATOMIC_LOAD_MAX_I64
3153
  { 295,  4,  1,  4,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo60, -1 ,nullptr },  // Inst #295 = ATOMIC_LOAD_MAX_I8
3154
  { 296,  4,  1,  4,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo60, -1 ,nullptr },  // Inst #296 = ATOMIC_LOAD_MIN_I16
3155
  { 297,  4,  1,  4,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo60, -1 ,nullptr },  // Inst #297 = ATOMIC_LOAD_MIN_I32
3156
  { 298,  4,  1,  4,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo61, -1 ,nullptr },  // Inst #298 = ATOMIC_LOAD_MIN_I64
3157
  { 299,  4,  1,  4,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo60, -1 ,nullptr },  // Inst #299 = ATOMIC_LOAD_MIN_I8
3158
  { 300,  4,  1,  4,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo60, -1 ,nullptr },  // Inst #300 = ATOMIC_LOAD_NAND_I16
3159
  { 301,  4,  1,  4,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo60, -1 ,nullptr },  // Inst #301 = ATOMIC_LOAD_NAND_I32
3160
  { 302,  4,  1,  4,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo61, -1 ,nullptr },  // Inst #302 = ATOMIC_LOAD_NAND_I64
3161
  { 303,  4,  1,  4,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo60, -1 ,nullptr },  // Inst #303 = ATOMIC_LOAD_NAND_I8
3162
  { 304,  4,  1,  4,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo60, -1 ,nullptr },  // Inst #304 = ATOMIC_LOAD_OR_I16
3163
  { 305,  4,  1,  4,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo60, -1 ,nullptr },  // Inst #305 = ATOMIC_LOAD_OR_I32
3164
  { 306,  4,  1,  4,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo61, -1 ,nullptr },  // Inst #306 = ATOMIC_LOAD_OR_I64
3165
  { 307,  4,  1,  4,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo60, -1 ,nullptr },  // Inst #307 = ATOMIC_LOAD_OR_I8
3166
  { 308,  4,  1,  4,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo60, -1 ,nullptr },  // Inst #308 = ATOMIC_LOAD_SUB_I16
3167
  { 309,  4,  1,  4,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo60, -1 ,nullptr },  // Inst #309 = ATOMIC_LOAD_SUB_I32
3168
  { 310,  4,  1,  4,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo61, -1 ,nullptr },  // Inst #310 = ATOMIC_LOAD_SUB_I64
3169
  { 311,  4,  1,  4,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo60, -1 ,nullptr },  // Inst #311 = ATOMIC_LOAD_SUB_I8
3170
  { 312,  4,  1,  4,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo60, -1 ,nullptr },  // Inst #312 = ATOMIC_LOAD_UMAX_I16
3171
  { 313,  4,  1,  4,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo60, -1 ,nullptr },  // Inst #313 = ATOMIC_LOAD_UMAX_I32
3172
  { 314,  4,  1,  4,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo61, -1 ,nullptr },  // Inst #314 = ATOMIC_LOAD_UMAX_I64
3173
  { 315,  4,  1,  4,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo60, -1 ,nullptr },  // Inst #315 = ATOMIC_LOAD_UMAX_I8
3174
  { 316,  4,  1,  4,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo60, -1 ,nullptr },  // Inst #316 = ATOMIC_LOAD_UMIN_I16
3175
  { 317,  4,  1,  4,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo60, -1 ,nullptr },  // Inst #317 = ATOMIC_LOAD_UMIN_I32
3176
  { 318,  4,  1,  4,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo61, -1 ,nullptr },  // Inst #318 = ATOMIC_LOAD_UMIN_I64
3177
  { 319,  4,  1,  4,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo60, -1 ,nullptr },  // Inst #319 = ATOMIC_LOAD_UMIN_I8
3178
  { 320,  4,  1,  4,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo60, -1 ,nullptr },  // Inst #320 = ATOMIC_LOAD_XOR_I16
3179
  { 321,  4,  1,  4,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo60, -1 ,nullptr },  // Inst #321 = ATOMIC_LOAD_XOR_I32
3180
  { 322,  4,  1,  4,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo61, -1 ,nullptr },  // Inst #322 = ATOMIC_LOAD_XOR_I64
3181
  { 323,  4,  1,  4,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo60, -1 ,nullptr },  // Inst #323 = ATOMIC_LOAD_XOR_I8
3182
  { 324,  4,  1,  4,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo60, -1 ,nullptr },  // Inst #324 = ATOMIC_SWAP_I16
3183
  { 325,  4,  1,  4,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo60, -1 ,nullptr },  // Inst #325 = ATOMIC_SWAP_I32
3184
  { 326,  4,  1,  4,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo61, -1 ,nullptr },  // Inst #326 = ATOMIC_SWAP_I64
3185
  { 327,  4,  1,  4,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList3, OperandInfo60, -1 ,nullptr },  // Inst #327 = ATOMIC_SWAP_I8
3186
  { 328,  0,  0,  4,  297,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #328 = ATTN
3187
  { 329,  1,  0,  4,  288,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x38ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #329 = B
3188
  { 330,  1,  0,  4,  288,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #330 = BA
3189
  { 331,  2,  0,  4,  288,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL, nullptr, nullptr, OperandInfo62, -1 ,nullptr },  // Inst #331 = BC
3190
  { 332,  3,  0,  4,  288,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, nullptr, nullptr, OperandInfo63, -1 ,nullptr },  // Inst #332 = BCC
3191
  { 333,  3,  0,  4,  288,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, nullptr, nullptr, OperandInfo63, -1 ,nullptr },  // Inst #333 = BCCA
3192
  { 334,  2,  0,  4,  288,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList9, nullptr, OperandInfo64, -1 ,nullptr },  // Inst #334 = BCCCTR
3193
  { 335,  2,  0,  4,  288,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList10, nullptr, OperandInfo64, -1 ,nullptr },  // Inst #335 = BCCCTR8
3194
  { 336,  2,  0,  4,  288,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList11, ImplicitList12, OperandInfo64, -1 ,nullptr },  // Inst #336 = BCCCTRL
3195
  { 337,  2,  0,  4,  288,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList13, ImplicitList14, OperandInfo64, -1 ,nullptr },  // Inst #337 = BCCCTRL8
3196
  { 338,  3,  0,  4,  288,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList2, ImplicitList12, OperandInfo63, -1 ,nullptr },  // Inst #338 = BCCL
3197
  { 339,  3,  0,  4,  288,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList2, ImplicitList12, OperandInfo63, -1 ,nullptr },  // Inst #339 = BCCLA
3198
  { 340,  2,  0,  4,  288,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList15, nullptr, OperandInfo64, -1 ,nullptr },  // Inst #340 = BCCLR
3199
  { 341,  2,  0,  4,  288,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList15, ImplicitList12, OperandInfo64, -1 ,nullptr },  // Inst #341 = BCCLRL
3200
  { 342,  1,  0,  4,  288,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList9, nullptr, OperandInfo65, -1 ,nullptr },  // Inst #342 = BCCTR
3201
  { 343,  1,  0,  4,  288,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList10, nullptr, OperandInfo65, -1 ,nullptr },  // Inst #343 = BCCTR8
3202
  { 344,  1,  0,  4,  288,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList10, nullptr, OperandInfo65, -1 ,nullptr },  // Inst #344 = BCCTR8n
3203
  { 345,  1,  0,  4,  288,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList11, ImplicitList12, OperandInfo65, -1 ,nullptr },  // Inst #345 = BCCTRL
3204
  { 346,  1,  0,  4,  288,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList13, ImplicitList14, OperandInfo65, -1 ,nullptr },  // Inst #346 = BCCTRL8
3205
  { 347,  1,  0,  4,  288,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList13, ImplicitList14, OperandInfo65, -1 ,nullptr },  // Inst #347 = BCCTRL8n
3206
  { 348,  1,  0,  4,  288,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList11, ImplicitList12, OperandInfo65, -1 ,nullptr },  // Inst #348 = BCCTRLn
3207
  { 349,  1,  0,  4,  288,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList9, nullptr, OperandInfo65, -1 ,nullptr },  // Inst #349 = BCCTRn
3208
  { 350,  3,  1,  4,  162,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList16, OperandInfo66, -1 ,nullptr },  // Inst #350 = BCDCFNo
3209
  { 351,  3,  1,  4,  168,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList16, OperandInfo66, -1 ,nullptr },  // Inst #351 = BCDCFSQo
3210
  { 352,  3,  1,  4,  162,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList16, OperandInfo66, -1 ,nullptr },  // Inst #352 = BCDCFZo
3211
  { 353,  3,  1,  4,  162,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList16, OperandInfo67, -1 ,nullptr },  // Inst #353 = BCDCPSGNo
3212
  { 354,  2,  1,  4,  162,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList16, OperandInfo68, -1 ,nullptr },  // Inst #354 = BCDCTNo
3213
  { 355,  2,  1,  4,  166,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList16, OperandInfo68, -1 ,nullptr },  // Inst #355 = BCDCTSQo
3214
  { 356,  3,  1,  4,  162,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList16, OperandInfo66, -1 ,nullptr },  // Inst #356 = BCDCTZo
3215
  { 357,  3,  1,  4,  162,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList16, OperandInfo66, -1 ,nullptr },  // Inst #357 = BCDSETSGNo
3216
  { 358,  4,  1,  4,  165,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList16, OperandInfo69, -1 ,nullptr },  // Inst #358 = BCDSRo
3217
  { 359,  4,  1,  4,  162,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList16, OperandInfo69, -1 ,nullptr },  // Inst #359 = BCDSo
3218
  { 360,  4,  1,  4,  162,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList16, OperandInfo69, -1 ,nullptr },  // Inst #360 = BCDTRUNCo
3219
  { 361,  3,  1,  4,  162,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList16, OperandInfo67, -1 ,nullptr },  // Inst #361 = BCDUSo
3220
  { 362,  3,  1,  4,  162,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList16, OperandInfo67, -1 ,nullptr },  // Inst #362 = BCDUTRUNCo
3221
  { 363,  2,  0,  4,  288,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList2, ImplicitList12, OperandInfo62, -1 ,nullptr },  // Inst #363 = BCL
3222
  { 364,  1,  0,  4,  288,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList15, nullptr, OperandInfo65, -1 ,nullptr },  // Inst #364 = BCLR
3223
  { 365,  1,  0,  4,  288,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList15, ImplicitList12, OperandInfo65, -1 ,nullptr },  // Inst #365 = BCLRL
3224
  { 366,  1,  0,  4,  288,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList15, ImplicitList12, OperandInfo65, -1 ,nullptr },  // Inst #366 = BCLRLn
3225
  { 367,  1,  0,  4,  288,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, nullptr, nullptr, OperandInfo65, -1 ,nullptr },  // Inst #367 = BCLRn
3226
  { 368,  1,  0,  4,  288,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList2, ImplicitList12, OperandInfo2, -1 ,nullptr },  // Inst #368 = BCLalways
3227
  { 369,  2,  0,  4,  288,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList2, ImplicitList12, OperandInfo62, -1 ,nullptr },  // Inst #369 = BCLn
3228
  { 370,  0,  0,  4,  288,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList9, nullptr, nullptr, -1 ,nullptr },  // Inst #370 = BCTR
3229
  { 371,  0,  0,  4,  288,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList10, nullptr, nullptr, -1 ,nullptr },  // Inst #371 = BCTR8
3230
  { 372,  0,  0,  4,  288,  0|(1ULL<<MCID::Call), 0x38ULL, ImplicitList11, ImplicitList12, nullptr, -1 ,nullptr },  // Inst #372 = BCTRL
3231
  { 373,  0,  0,  4,  288,  0|(1ULL<<MCID::Call), 0x38ULL, ImplicitList13, ImplicitList14, nullptr, -1 ,nullptr },  // Inst #373 = BCTRL8
3232
  { 374,  2,  0,  8,  288,  0|(1ULL<<MCID::Call), 0x38ULL, ImplicitList13, ImplicitList17, OperandInfo70, -1 ,nullptr },  // Inst #374 = BCTRL8_LDinto_toc
3233
  { 375,  2,  0,  4,  288,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL, nullptr, nullptr, OperandInfo62, -1 ,nullptr },  // Inst #375 = BCn
3234
  { 376,  1,  0,  4,  288,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList9, ImplicitList9, OperandInfo2, -1 ,nullptr },  // Inst #376 = BDNZ
3235
  { 377,  1,  0,  4,  288,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList10, ImplicitList10, OperandInfo2, -1 ,nullptr },  // Inst #377 = BDNZ8
3236
  { 378,  1,  0,  4,  288,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList9, ImplicitList9, OperandInfo2, -1 ,nullptr },  // Inst #378 = BDNZA
3237
  { 379,  1,  0,  4,  288,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList9, ImplicitList9, OperandInfo2, -1 ,nullptr },  // Inst #379 = BDNZAm
3238
  { 380,  1,  0,  4,  288,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList9, ImplicitList9, OperandInfo2, -1 ,nullptr },  // Inst #380 = BDNZAp
3239
  { 381,  1,  0,  4,  288,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList11, ImplicitList9, OperandInfo2, -1 ,nullptr },  // Inst #381 = BDNZL
3240
  { 382,  1,  0,  4,  288,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList11, ImplicitList9, OperandInfo2, -1 ,nullptr },  // Inst #382 = BDNZLA
3241
  { 383,  1,  0,  4,  288,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList11, ImplicitList9, OperandInfo2, -1 ,nullptr },  // Inst #383 = BDNZLAm
3242
  { 384,  1,  0,  4,  288,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList11, ImplicitList9, OperandInfo2, -1 ,nullptr },  // Inst #384 = BDNZLAp
3243
  { 385,  0,  0,  4,  288,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList18, ImplicitList9, nullptr, -1 ,nullptr },  // Inst #385 = BDNZLR
3244
  { 386,  0,  0,  4,  288,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList19, ImplicitList10, nullptr, -1 ,nullptr },  // Inst #386 = BDNZLR8
3245
  { 387,  0,  0,  4,  288,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList18, ImplicitList9, nullptr, -1 ,nullptr },  // Inst #387 = BDNZLRL
3246
  { 388,  0,  0,  4,  288,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList18, ImplicitList9, nullptr, -1 ,nullptr },  // Inst #388 = BDNZLRLm
3247
  { 389,  0,  0,  4,  288,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList18, ImplicitList9, nullptr, -1 ,nullptr },  // Inst #389 = BDNZLRLp
3248
  { 390,  0,  0,  4,  288,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList18, ImplicitList9, nullptr, -1 ,nullptr },  // Inst #390 = BDNZLRm
3249
  { 391,  0,  0,  4,  288,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList18, ImplicitList9, nullptr, -1 ,nullptr },  // Inst #391 = BDNZLRp
3250
  { 392,  1,  0,  4,  288,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList11, ImplicitList9, OperandInfo2, -1 ,nullptr },  // Inst #392 = BDNZLm
3251
  { 393,  1,  0,  4,  288,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList11, ImplicitList9, OperandInfo2, -1 ,nullptr },  // Inst #393 = BDNZLp
3252
  { 394,  1,  0,  4,  288,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList9, ImplicitList9, OperandInfo2, -1 ,nullptr },  // Inst #394 = BDNZm
3253
  { 395,  1,  0,  4,  288,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList9, ImplicitList9, OperandInfo2, -1 ,nullptr },  // Inst #395 = BDNZp
3254
  { 396,  1,  0,  4,  288,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList9, ImplicitList9, OperandInfo2, -1 ,nullptr },  // Inst #396 = BDZ
3255
  { 397,  1,  0,  4,  288,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList10, ImplicitList10, OperandInfo2, -1 ,nullptr },  // Inst #397 = BDZ8
3256
  { 398,  1,  0,  4,  288,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList9, ImplicitList9, OperandInfo2, -1 ,nullptr },  // Inst #398 = BDZA
3257
  { 399,  1,  0,  4,  288,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList9, ImplicitList9, OperandInfo2, -1 ,nullptr },  // Inst #399 = BDZAm
3258
  { 400,  1,  0,  4,  288,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList9, ImplicitList9, OperandInfo2, -1 ,nullptr },  // Inst #400 = BDZAp
3259
  { 401,  1,  0,  4,  288,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList11, ImplicitList9, OperandInfo2, -1 ,nullptr },  // Inst #401 = BDZL
3260
  { 402,  1,  0,  4,  288,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList11, ImplicitList9, OperandInfo2, -1 ,nullptr },  // Inst #402 = BDZLA
3261
  { 403,  1,  0,  4,  288,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList11, ImplicitList9, OperandInfo2, -1 ,nullptr },  // Inst #403 = BDZLAm
3262
  { 404,  1,  0,  4,  288,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList11, ImplicitList9, OperandInfo2, -1 ,nullptr },  // Inst #404 = BDZLAp
3263
  { 405,  0,  0,  4,  288,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList18, ImplicitList9, nullptr, -1 ,nullptr },  // Inst #405 = BDZLR
3264
  { 406,  0,  0,  4,  288,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList19, ImplicitList10, nullptr, -1 ,nullptr },  // Inst #406 = BDZLR8
3265
  { 407,  0,  0,  4,  288,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList18, ImplicitList9, nullptr, -1 ,nullptr },  // Inst #407 = BDZLRL
3266
  { 408,  0,  0,  4,  288,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList18, ImplicitList9, nullptr, -1 ,nullptr },  // Inst #408 = BDZLRLm
3267
  { 409,  0,  0,  4,  288,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList18, ImplicitList9, nullptr, -1 ,nullptr },  // Inst #409 = BDZLRLp
3268
  { 410,  0,  0,  4,  288,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList18, ImplicitList9, nullptr, -1 ,nullptr },  // Inst #410 = BDZLRm
3269
  { 411,  0,  0,  4,  288,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList18, ImplicitList9, nullptr, -1 ,nullptr },  // Inst #411 = BDZLRp
3270
  { 412,  1,  0,  4,  288,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList11, ImplicitList9, OperandInfo2, -1 ,nullptr },  // Inst #412 = BDZLm
3271
  { 413,  1,  0,  4,  288,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList11, ImplicitList9, OperandInfo2, -1 ,nullptr },  // Inst #413 = BDZLp
3272
  { 414,  1,  0,  4,  288,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList9, ImplicitList9, OperandInfo2, -1 ,nullptr },  // Inst #414 = BDZm
3273
  { 415,  1,  0,  4,  288,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList9, ImplicitList9, OperandInfo2, -1 ,nullptr },  // Inst #415 = BDZp
3274
  { 416,  1,  0,  4,  288,  0|(1ULL<<MCID::Call), 0x38ULL, ImplicitList2, ImplicitList12, OperandInfo2, -1 ,nullptr },  // Inst #416 = BL
3275
  { 417,  1,  0,  4,  288,  0|(1ULL<<MCID::Call), 0x38ULL, ImplicitList2, ImplicitList14, OperandInfo2, -1 ,nullptr },  // Inst #417 = BL8
3276
  { 418,  1,  0,  8,  288,  0|(1ULL<<MCID::Call), 0x38ULL, ImplicitList2, ImplicitList14, OperandInfo2, -1 ,nullptr },  // Inst #418 = BL8_NOP
3277
  { 419,  2,  0,  8,  288,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList2, ImplicitList14, OperandInfo7, -1 ,nullptr },  // Inst #419 = BL8_NOP_TLS
3278
  { 420,  2,  0,  4,  288,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList2, ImplicitList14, OperandInfo7, -1 ,nullptr },  // Inst #420 = BL8_TLS
3279
  { 421,  2,  0,  4,  288,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList2, ImplicitList14, OperandInfo7, -1 ,nullptr },  // Inst #421 = BL8_TLS_
3280
  { 422,  1,  0,  4,  288,  0|(1ULL<<MCID::Call), 0x38ULL, ImplicitList2, ImplicitList12, OperandInfo2, -1 ,nullptr },  // Inst #422 = BLA
3281
  { 423,  1,  0,  4,  288,  0|(1ULL<<MCID::Call), 0x38ULL, ImplicitList2, ImplicitList14, OperandInfo2, -1 ,nullptr },  // Inst #423 = BLA8
3282
  { 424,  1,  0,  8,  288,  0|(1ULL<<MCID::Call), 0x38ULL, ImplicitList2, ImplicitList14, OperandInfo2, -1 ,nullptr },  // Inst #424 = BLA8_NOP
3283
  { 425,  0,  0,  4,  288,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x38ULL, ImplicitList15, nullptr, nullptr, -1 ,nullptr },  // Inst #425 = BLR
3284
  { 426,  0,  0,  4,  288,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x38ULL, ImplicitList20, nullptr, nullptr, -1 ,nullptr },  // Inst #426 = BLR8
3285
  { 427,  0,  0,  4,  288,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList15, ImplicitList12, nullptr, -1 ,nullptr },  // Inst #427 = BLRL
3286
  { 428,  2,  0,  4,  288,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList2, ImplicitList12, OperandInfo7, -1 ,nullptr },  // Inst #428 = BL_TLS
3287
  { 429,  3,  1,  4,  110,  0, 0x8ULL, nullptr, nullptr, OperandInfo49, -1 ,nullptr },  // Inst #429 = BPERMD
3288
  { 430,  3,  1,  4,  292,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo48, -1 ,nullptr },  // Inst #430 = BRINC
3289
  { 431,  0,  0,  4,  297,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #431 = CLRBHRB
3290
  { 432,  3,  1,  4,  110,  0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, nullptr, OperandInfo48, -1 ,nullptr },  // Inst #432 = CMPB
3291
  { 433,  3,  1,  4,  110,  0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, nullptr, OperandInfo49, -1 ,nullptr },  // Inst #433 = CMPB8
3292
  { 434,  3,  1,  4,  114,  0|(1ULL<<MCID::Compare), 0x8ULL, nullptr, nullptr, OperandInfo71, -1 ,nullptr },  // Inst #434 = CMPD
3293
  { 435,  3,  1,  4,  114,  0|(1ULL<<MCID::Compare), 0x8ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr },  // Inst #435 = CMPDI
3294
  { 436,  3,  1,  4,  103,  0|(1ULL<<MCID::Compare), 0x8ULL, nullptr, nullptr, OperandInfo73, -1 ,nullptr },  // Inst #436 = CMPEQB
3295
  { 437,  3,  1,  4,  114,  0|(1ULL<<MCID::Compare), 0x8ULL, nullptr, nullptr, OperandInfo71, -1 ,nullptr },  // Inst #437 = CMPLD
3296
  { 438,  3,  1,  4,  114,  0|(1ULL<<MCID::Compare), 0x8ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr },  // Inst #438 = CMPLDI
3297
  { 439,  3,  1,  4,  114,  0|(1ULL<<MCID::Compare), 0x8ULL, nullptr, nullptr, OperandInfo74, -1 ,nullptr },  // Inst #439 = CMPLW
3298
  { 440,  3,  1,  4,  114,  0|(1ULL<<MCID::Compare), 0x8ULL, nullptr, nullptr, OperandInfo75, -1 ,nullptr },  // Inst #440 = CMPLWI
3299
  { 441,  4,  1,  4,  103,  0|(1ULL<<MCID::Compare), 0x8ULL, nullptr, nullptr, OperandInfo76, -1 ,nullptr },  // Inst #441 = CMPRB
3300
  { 442,  4,  1,  4,  103,  0|(1ULL<<MCID::Compare), 0x8ULL, nullptr, nullptr, OperandInfo76, -1 ,nullptr },  // Inst #442 = CMPRB8
3301
  { 443,  3,  1,  4,  114,  0|(1ULL<<MCID::Compare), 0x8ULL, nullptr, nullptr, OperandInfo74, -1 ,nullptr },  // Inst #443 = CMPW
3302
  { 444,  3,  1,  4,  114,  0|(1ULL<<MCID::Compare), 0x8ULL, nullptr, nullptr, OperandInfo75, -1 ,nullptr },  // Inst #444 = CMPWI
3303
  { 445,  2,  1,  4,  110,  0, 0x8ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #445 = CNTLZD
3304
  { 446,  2,  1,  4,  110,  0, 0x8ULL, nullptr, ImplicitList3, OperandInfo54, -1 ,nullptr },  // Inst #446 = CNTLZDo
3305
  { 447,  2,  1,  4,  110,  0, 0x8ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #447 = CNTLZW
3306
  { 448,  2,  1,  4,  110,  0, 0x8ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #448 = CNTLZW8
3307
  { 449,  2,  1,  4,  110,  0, 0x8ULL, nullptr, ImplicitList3, OperandInfo54, -1 ,nullptr },  // Inst #449 = CNTLZW8o
3308
  { 450,  2,  1,  4,  110,  0, 0x8ULL, nullptr, ImplicitList3, OperandInfo36, -1 ,nullptr },  // Inst #450 = CNTLZWo
3309
  { 451,  2,  1,  4,  110,  0, 0x8ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #451 = CNTTZD
3310
  { 452,  2,  1,  4,  110,  0, 0x8ULL, nullptr, ImplicitList3, OperandInfo54, -1 ,nullptr },  // Inst #452 = CNTTZDo
3311
  { 453,  2,  1,  4,  110,  0, 0x8ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #453 = CNTTZW
3312
  { 454,  2,  1,  4,  110,  0, 0x8ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #454 = CNTTZW8
3313
  { 455,  2,  1,  4,  110,  0, 0x8ULL, nullptr, ImplicitList3, OperandInfo54, -1 ,nullptr },  // Inst #455 = CNTTZW8o
3314
  { 456,  2,  1,  4,  110,  0, 0x8ULL, nullptr, ImplicitList3, OperandInfo36, -1 ,nullptr },  // Inst #456 = CNTTZWo
3315
  { 457,  0,  0,  4,  183,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #457 = CP_ABORT
3316
  { 458,  3,  0,  4,  176,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo35, -1 ,nullptr },  // Inst #458 = CP_COPY
3317
  { 459,  3,  0,  4,  176,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo34, -1 ,nullptr },  // Inst #459 = CP_COPY8
3318
  { 460,  3,  0,  4,  177,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo35, -1 ,nullptr },  // Inst #460 = CP_PASTE
3319
  { 461,  3,  0,  4,  177,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo34, -1 ,nullptr },  // Inst #461 = CP_PASTE8
3320
  { 462,  3,  0,  4,  203,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo34, -1 ,nullptr },  // Inst #462 = CP_PASTE8o
3321
  { 463,  3,  0,  4,  203,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList3, OperandInfo35, -1 ,nullptr },  // Inst #463 = CP_PASTEo
3322
  { 464,  0,  0,  4,  129,  0, 0x0ULL, nullptr, ImplicitList21, nullptr, -1 ,nullptr },  // Inst #464 = CR6SET
3323
  { 465,  0,  0,  4,  129,  0, 0x0ULL, nullptr, ImplicitList21, nullptr, -1 ,nullptr },  // Inst #465 = CR6UNSET
3324
  { 466,  3,  1,  4,  129,  0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo77, -1 ,nullptr },  // Inst #466 = CRAND
3325
  { 467,  3,  1,  4,  129,  0, 0x0ULL, nullptr, nullptr, OperandInfo77, -1 ,nullptr },  // Inst #467 = CRANDC
3326
  { 468,  3,  1,  4,  129,  0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo77, -1 ,nullptr },  // Inst #468 = CREQV
3327
  { 469,  3,  1,  4,  129,  0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo77, -1 ,nullptr },  // Inst #469 = CRNAND
3328
  { 470,  3,  1,  4,  129,  0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo77, -1 ,nullptr },  // Inst #470 = CRNOR
3329
  { 471,  3,  1,  4,  129,  0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo77, -1 ,nullptr },  // Inst #471 = CROR
3330
  { 472,  3,  1,  4,  129,  0, 0x0ULL, nullptr, nullptr, OperandInfo77, -1 ,nullptr },  // Inst #472 = CRORC
3331
  { 473,  1,  1,  4,  129,  0, 0x0ULL, nullptr, nullptr, OperandInfo65, -1 ,nullptr },  // Inst #473 = CRSET
3332
  { 474,  1,  1,  4,  129,  0, 0x0ULL, nullptr, nullptr, OperandInfo65, -1 ,nullptr },  // Inst #474 = CRUNSET
3333
  { 475,  3,  1,  4,  129,  0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo77, -1 ,nullptr },  // Inst #475 = CRXOR
3334
  { 476,  3,  0,  4,  288,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, nullptr, nullptr, OperandInfo63, -1 ,nullptr },  // Inst #476 = CTRL_DEP
3335
  { 477,  2,  1,  4,  181,  0, 0x8ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr },  // Inst #477 = DARN
3336
  { 478,  2,  0,  4,  314,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #478 = DCBA
3337
  { 479,  3,  0,  4,  175,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL, nullptr, nullptr, OperandInfo78, -1 ,nullptr },  // Inst #479 = DCBF
3338
  { 480,  2,  0,  4,  175,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #480 = DCBFEP
3339
  { 481,  2,  0,  4,  314,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #481 = DCBI
3340
  { 482,  2,  0,  4,  175,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #482 = DCBST
3341
  { 483,  2,  0,  4,  175,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #483 = DCBSTEP
3342
  { 484,  3,  0,  4,  175,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x2ULL, nullptr, nullptr, OperandInfo78, -1 ,nullptr },  // Inst #484 = DCBT
3343
  { 485,  3,  0,  4,  175,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #485 = DCBTEP
3344
  { 486,  3,  0,  4,  175,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x2ULL, nullptr, nullptr, OperandInfo78, -1 ,nullptr },  // Inst #486 = DCBTST
3345
  { 487,  3,  0,  4,  175,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #487 = DCBTSTEP
3346
  { 488,  2,  0,  4,  175,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #488 = DCBZ
3347
  { 489,  2,  0,  4,  175,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #489 = DCBZEP
3348
  { 490,  2,  0,  4,  175,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #490 = DCBZL
3349
  { 491,  2,  0,  4,  175,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #491 = DCBZLEP
3350
  { 492,  2,  0,  4,  300,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #492 = DCCCI
3351
  { 493,  3,  1,  4,  238,  0, 0x8ULL, nullptr, nullptr, OperandInfo49, -1 ,nullptr },  // Inst #493 = DIVD
3352
  { 494,  3,  1,  4,  239,  0, 0x8ULL, nullptr, nullptr, OperandInfo49, -1 ,nullptr },  // Inst #494 = DIVDE
3353
  { 495,  3,  1,  4,  239,  0, 0x8ULL, nullptr, nullptr, OperandInfo49, -1 ,nullptr },  // Inst #495 = DIVDEU
3354
  { 496,  3,  1,  4,  243,  0, 0xdULL, nullptr, ImplicitList3, OperandInfo49, -1 ,nullptr },  // Inst #496 = DIVDEUo
3355
  { 497,  3,  1,  4,  243,  0, 0xdULL, nullptr, ImplicitList3, OperandInfo49, -1 ,nullptr },  // Inst #497 = DIVDEo
3356
  { 498,  3,  1,  4,  238,  0, 0x8ULL, nullptr, nullptr, OperandInfo49, -1 ,nullptr },  // Inst #498 = DIVDU
3357
  { 499,  3,  1,  4,  241,  0, 0xdULL, nullptr, ImplicitList3, OperandInfo49, -1 ,nullptr },  // Inst #499 = DIVDUo
3358
  { 500,  3,  1,  4,  241,  0, 0xdULL, nullptr, ImplicitList3, OperandInfo49, -1 ,nullptr },  // Inst #500 = DIVDo
3359
  { 501,  3,  1,  4,  236,  0, 0x8ULL, nullptr, nullptr, OperandInfo48, -1 ,nullptr },  // Inst #501 = DIVW
3360
  { 502,  3,  1,  4,  237,  0, 0x8ULL, nullptr, nullptr, OperandInfo48, -1 ,nullptr },  // Inst #502 = DIVWE
3361
  { 503,  3,  1,  4,  237,  0, 0x8ULL, nullptr, nullptr, OperandInfo48, -1 ,nullptr },  // Inst #503 = DIVWEU
3362
  { 504,  3,  1,  4,  242,  0, 0xdULL, nullptr, ImplicitList3, OperandInfo48, -1 ,nullptr },  // Inst #504 = DIVWEUo
3363
  { 505,  3,  1,  4,  242,  0, 0xdULL, nullptr, ImplicitList3, OperandInfo48, -1 ,nullptr },  // Inst #505 = DIVWEo
3364
  { 506,  3,  1,  4,  236,  0, 0x8ULL, nullptr, nullptr, OperandInfo48, -1 ,nullptr },  // Inst #506 = DIVWU
3365
  { 507,  3,  1,  4,  240,  0, 0xdULL, nullptr, ImplicitList3, OperandInfo48, -1 ,nullptr },  // Inst #507 = DIVWUo
3366
  { 508,  3,  1,  4,  240,  0, 0xdULL, nullptr, ImplicitList3, OperandInfo48, -1 ,nullptr },  // Inst #508 = DIVWo
3367
  { 509,  1,  0,  4,  300,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, PPC::DeprecatedDST ,nullptr },  // Inst #509 = DSS
3368
  { 510,  0,  0,  4,  300,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, PPC::DeprecatedDST ,nullptr },  // Inst #510 = DSSALL
3369
  { 511,  3,  0,  4,  300,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo79, PPC::DeprecatedDST ,nullptr },  // Inst #511 = DST
3370
  { 512,  3,  0,  4,  300,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo80, PPC::DeprecatedDST ,nullptr },  // Inst #512 = DST64
3371
  { 513,  3,  0,  4,  300,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo79, PPC::DeprecatedDST ,nullptr },  // Inst #513 = DSTST
3372
  { 514,  3,  0,  4,  300,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo80, PPC::DeprecatedDST ,nullptr },  // Inst #514 = DSTST64
3373
  { 515,  3,  0,  4,  300,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo79, PPC::DeprecatedDST ,nullptr },  // Inst #515 = DSTSTT
3374
  { 516,  3,  0,  4,  300,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo80, PPC::DeprecatedDST ,nullptr },  // Inst #516 = DSTSTT64
3375
  { 517,  3,  0,  4,  300,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo79, PPC::DeprecatedDST ,nullptr },  // Inst #517 = DSTT
3376
  { 518,  3,  0,  4,  300,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo80, PPC::DeprecatedDST ,nullptr },  // Inst #518 = DSTT64
3377
  { 519,  4,  1,  4,  0,  0, 0x0ULL, ImplicitList8, ImplicitList8, OperandInfo81, -1 ,nullptr },  // Inst #519 = DYNALLOC
3378
  { 520,  4,  1,  4,  0,  0, 0x0ULL, ImplicitList22, ImplicitList22, OperandInfo82, -1 ,nullptr },  // Inst #520 = DYNALLOC8
3379
  { 521,  3,  1,  4,  0,  0, 0x0ULL, nullptr, nullptr, OperandInfo83, -1 ,nullptr },  // Inst #521 = DYNAREAOFFSET
3380
  { 522,  3,  1,  4,  0,  0, 0x0ULL, nullptr, nullptr, OperandInfo83, -1 ,nullptr },  // Inst #522 = DYNAREAOFFSET8
3381
  { 523,  2,  1,  4,  16, 0, 0x0ULL, nullptr, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #523 = EFDABS
3382
  { 524,  3,  1,  4,  17, 0, 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #524 = EFDADD
3383
  { 525,  2,  1,  4,  16, 0, 0x0ULL, nullptr, nullptr, OperandInfo86, -1 ,nullptr },  // Inst #525 = EFDCFS
3384
  { 526,  2,  1,  4,  16, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo86, -1 ,nullptr },  // Inst #526 = EFDCFSF
3385
  { 527,  2,  1,  4,  16, 0, 0x0ULL, nullptr, nullptr, OperandInfo87, -1 ,nullptr },  // Inst #527 = EFDCFSI
3386
  { 528,  2,  1,  4,  16, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo87, -1 ,nullptr },  // Inst #528 = EFDCFSID
3387
  { 529,  2,  1,  4,  16, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo86, -1 ,nullptr },  // Inst #529 = EFDCFUF
3388
  { 530,  2,  1,  4,  16, 0, 0x0ULL, nullptr, nullptr, OperandInfo87, -1 ,nullptr },  // Inst #530 = EFDCFUI
3389
  { 531,  2,  1,  4,  16, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo87, -1 ,nullptr },  // Inst #531 = EFDCFUID
3390
  { 532,  3,  1,  4,  16, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo88, -1 ,nullptr },  // Inst #532 = EFDCMPEQ
3391
  { 533,  3,  1,  4,  16, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo88, -1 ,nullptr },  // Inst #533 = EFDCMPGT
3392
  { 534,  3,  1,  4,  16, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo88, -1 ,nullptr },  // Inst #534 = EFDCMPLT
3393
  { 535,  2,  1,  4,  16, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo86, -1 ,nullptr },  // Inst #535 = EFDCTSF
3394
  { 536,  2,  1,  4,  16, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo89, -1 ,nullptr },  // Inst #536 = EFDCTSI
3395
  { 537,  2,  1,  4,  16, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo89, -1 ,nullptr },  // Inst #537 = EFDCTSIDZ
3396
  { 538,  2,  1,  4,  16, 0, 0x0ULL, nullptr, nullptr, OperandInfo89, -1 ,nullptr },  // Inst #538 = EFDCTSIZ
3397
  { 539,  2,  1,  4,  16, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo86, -1 ,nullptr },  // Inst #539 = EFDCTUF
3398
  { 540,  2,  1,  4,  16, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo89, -1 ,nullptr },  // Inst #540 = EFDCTUI
3399
  { 541,  2,  1,  4,  16, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo89, -1 ,nullptr },  // Inst #541 = EFDCTUIDZ
3400
  { 542,  2,  1,  4,  16, 0, 0x0ULL, nullptr, nullptr, OperandInfo89, -1 ,nullptr },  // Inst #542 = EFDCTUIZ
3401
  { 543,  3,  1,  4,  18, 0, 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #543 = EFDDIV
3402
  { 544,  3,  1,  4,  16, 0, 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #544 = EFDMUL
3403
  { 545,  2,  1,  4,  16, 0, 0x0ULL, nullptr, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #545 = EFDNABS
3404
  { 546,  2,  1,  4,  16, 0, 0x0ULL, nullptr, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #546 = EFDNEG
3405
  { 547,  3,  1,  4,  16, 0, 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #547 = EFDSUB
3406
  { 548,  3,  1,  4,  16, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo88, -1 ,nullptr },  // Inst #548 = EFDTSTEQ
3407
  { 549,  3,  1,  4,  16, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo88, -1 ,nullptr },  // Inst #549 = EFDTSTGT
3408
  { 550,  3,  1,  4,  16, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo88, -1 ,nullptr },  // Inst #550 = EFDTSTLT
3409
  { 551,  2,  1,  4,  19, 0, 0x0ULL, nullptr, nullptr, OperandInfo90, -1 ,nullptr },  // Inst #551 = EFSABS
3410
  { 552,  3,  1,  4,  17, 0, 0x0ULL, nullptr, nullptr, OperandInfo91, -1 ,nullptr },  // Inst #552 = EFSADD
3411
  { 553,  2,  1,  4,  19, 0, 0x0ULL, nullptr, nullptr, OperandInfo92, -1 ,nullptr },  // Inst #553 = EFSCFD
3412
  { 554,  2,  1,  4,  19, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo90, -1 ,nullptr },  // Inst #554 = EFSCFSF
3413
  { 555,  2,  1,  4,  19, 0, 0x0ULL, nullptr, nullptr, OperandInfo93, -1 ,nullptr },  // Inst #555 = EFSCFSI
3414
  { 556,  2,  1,  4,  19, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo90, -1 ,nullptr },  // Inst #556 = EFSCFUF
3415
  { 557,  2,  1,  4,  19, 0, 0x0ULL, nullptr, nullptr, OperandInfo93, -1 ,nullptr },  // Inst #557 = EFSCFUI
3416
  { 558,  3,  1,  4,  20, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo94, -1 ,nullptr },  // Inst #558 = EFSCMPEQ
3417
  { 559,  3,  1,  4,  20, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo94, -1 ,nullptr },  // Inst #559 = EFSCMPGT
3418
  { 560,  3,  1,  4,  20, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo94, -1 ,nullptr },  // Inst #560 = EFSCMPLT
3419
  { 561,  2,  1,  4,  19, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo90, -1 ,nullptr },  // Inst #561 = EFSCTSF
3420
  { 562,  2,  1,  4,  19, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo95, -1 ,nullptr },  // Inst #562 = EFSCTSI
3421
  { 563,  2,  1,  4,  19, 0, 0x0ULL, nullptr, nullptr, OperandInfo95, -1 ,nullptr },  // Inst #563 = EFSCTSIZ
3422
  { 564,  2,  1,  4,  19, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo86, -1 ,nullptr },  // Inst #564 = EFSCTUF
3423
  { 565,  2,  1,  4,  19, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo95, -1 ,nullptr },  // Inst #565 = EFSCTUI
3424
  { 566,  2,  1,  4,  19, 0, 0x0ULL, nullptr, nullptr, OperandInfo95, -1 ,nullptr },  // Inst #566 = EFSCTUIZ
3425
  { 567,  3,  1,  4,  18, 0, 0x0ULL, nullptr, nullptr, OperandInfo91, -1 ,nullptr },  // Inst #567 = EFSDIV
3426
  { 568,  3,  1,  4,  21, 0, 0x0ULL, nullptr, nullptr, OperandInfo91, -1 ,nullptr },  // Inst #568 = EFSMUL
3427
  { 569,  2,  1,  4,  21, 0, 0x0ULL, nullptr, nullptr, OperandInfo90, -1 ,nullptr },  // Inst #569 = EFSNABS
3428
  { 570,  2,  1,  4,  21, 0, 0x0ULL, nullptr, nullptr, OperandInfo90, -1 ,nullptr },  // Inst #570 = EFSNEG
3429
  { 571,  3,  1,  4,  19, 0, 0x0ULL, nullptr, nullptr, OperandInfo91, -1 ,nullptr },  // Inst #571 = EFSSUB
3430
  { 572,  3,  1,  4,  20, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo88, -1 ,nullptr },  // Inst #572 = EFSTSTEQ
3431
  { 573,  3,  1,  4,  20, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo88, -1 ,nullptr },  // Inst #573 = EFSTSTGT
3432
  { 574,  3,  1,  4,  20, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo88, -1 ,nullptr },  // Inst #574 = EFSTSTLT
3433
  { 575,  1,  0,  4,  0,  0|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo96, -1 ,nullptr },  // Inst #575 = EH_SjLj_LongJmp32
3434
  { 576,  1,  0,  4,  0,  0|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo96, -1 ,nullptr },  // Inst #576 = EH_SjLj_LongJmp64
3435
  { 577,  2,  1,  4,  0,  0|(1ULL<<MCID::Barrier)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList9, OperandInfo97, -1 ,nullptr },  // Inst #577 = EH_SjLj_SetJmp32
3436
  { 578,  2,  1,  4,  0,  0|(1ULL<<MCID::Barrier)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList10, OperandInfo97, -1 ,nullptr },  // Inst #578 = EH_SjLj_SetJmp64
3437
  { 579,  1,  0,  0,  0,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #579 = EH_SjLj_Setup
3438
  { 580,  3,  1,  4,  116,  0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, nullptr, OperandInfo48, -1 ,nullptr },  // Inst #580 = EQV
3439
  { 581,  3,  1,  4,  116,  0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, nullptr, OperandInfo49, -1 ,nullptr },  // Inst #581 = EQV8
3440
  { 582,  3,  1,  4,  116,  0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, ImplicitList3, OperandInfo49, -1 ,nullptr },  // Inst #582 = EQV8o
3441
  { 583,  3,  1,  4,  116,  0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, ImplicitList3, OperandInfo48, -1 ,nullptr },  // Inst #583 = EQVo
3442
  { 584,  2,  1,  4,  293,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #584 = EVABS
3443
  { 585,  3,  1,  4,  293,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo98, -1 ,nullptr },  // Inst #585 = EVADDIW
3444
  { 586,  2,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #586 = EVADDSMIAAW
3445
  { 587,  2,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #587 = EVADDSSIAAW
3446
  { 588,  2,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #588 = EVADDUMIAAW
3447
  { 589,  2,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #589 = EVADDUSIAAW
3448
  { 590,  3,  1,  4,  293,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #590 = EVADDW
3449
  { 591,  3,  1,  4,  293,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #591 = EVAND
3450
  { 592,  3,  1,  4,  293,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #592 = EVANDC
3451
  { 593,  3,  1,  4,  293,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo88, -1 ,nullptr },  // Inst #593 = EVCMPEQ
3452
  { 594,  3,  1,  4,  293,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo88, -1 ,nullptr },  // Inst #594 = EVCMPGTS
3453
  { 595,  3,  1,  4,  293,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo88, -1 ,nullptr },  // Inst #595 = EVCMPGTU
3454
  { 596,  3,  1,  4,  293,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo88, -1 ,nullptr },  // Inst #596 = EVCMPLTS
3455
  { 597,  3,  1,  4,  293,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo88, -1 ,nullptr },  // Inst #597 = EVCMPLTU
3456
  { 598,  2,  1,  4,  293,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #598 = EVCNTLSW
3457
  { 599,  2,  1,  4,  293,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #599 = EVCNTLZW
3458
  { 600,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #600 = EVDIVWS
3459
  { 601,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #601 = EVDIVWU
3460
  { 602,  3,  1,  4,  293,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #602 = EVEQV
3461
  { 603,  2,  1,  4,  293,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #603 = EVEXTSB
3462
  { 604,  2,  1,  4,  293,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #604 = EVEXTSH
3463
  { 605,  2,  1,  4,  22, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #605 = EVFSABS
3464
  { 606,  3,  1,  4,  23, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #606 = EVFSADD
3465
  { 607,  2,  1,  4,  23, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #607 = EVFSCFSF
3466
  { 608,  2,  1,  4,  23, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #608 = EVFSCFSI
3467
  { 609,  2,  1,  4,  23, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #609 = EVFSCFUF
3468
  { 610,  2,  1,  4,  23, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #610 = EVFSCFUI
3469
  { 611,  3,  1,  4,  19, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo88, -1 ,nullptr },  // Inst #611 = EVFSCMPEQ
3470
  { 612,  3,  1,  4,  19, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo88, -1 ,nullptr },  // Inst #612 = EVFSCMPGT
3471
  { 613,  3,  1,  4,  19, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo88, -1 ,nullptr },  // Inst #613 = EVFSCMPLT
3472
  { 614,  2,  1,  4,  23, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #614 = EVFSCTSF
3473
  { 615,  2,  1,  4,  23, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #615 = EVFSCTSI
3474
  { 616,  2,  1,  4,  23, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #616 = EVFSCTSIZ
3475
  { 617,  2,  1,  4,  23, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #617 = EVFSCTUF
3476
  { 618,  2,  1,  4,  23, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #618 = EVFSCTUI
3477
  { 619,  2,  1,  4,  23, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #619 = EVFSCTUIZ
3478
  { 620,  3,  1,  4,  18, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #620 = EVFSDIV
3479
  { 621,  3,  1,  4,  23, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #621 = EVFSMUL
3480
  { 622,  2,  1,  4,  22, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #622 = EVFSNABS
3481
  { 623,  2,  1,  4,  22, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #623 = EVFSNEG
3482
  { 624,  3,  1,  4,  23, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #624 = EVFSSUB
3483
  { 625,  3,  1,  4,  22, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo88, -1 ,nullptr },  // Inst #625 = EVFSTSTEQ
3484
  { 626,  3,  1,  4,  22, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo88, -1 ,nullptr },  // Inst #626 = EVFSTSTGT
3485
  { 627,  3,  1,  4,  22, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo88, -1 ,nullptr },  // Inst #627 = EVFSTSTLT
3486
  { 628,  3,  1,  4,  295,  0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr },  // Inst #628 = EVLDD
3487
  { 629,  3,  1,  4,  295,  0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo100, -1 ,nullptr },  // Inst #629 = EVLDDX
3488
  { 630,  3,  1,  4,  295,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr },  // Inst #630 = EVLDH
3489
  { 631,  3,  1,  4,  295,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo100, -1 ,nullptr },  // Inst #631 = EVLDHX
3490
  { 632,  3,  1,  4,  295,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr },  // Inst #632 = EVLDW
3491
  { 633,  3,  1,  4,  295,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo100, -1 ,nullptr },  // Inst #633 = EVLDWX
3492
  { 634,  3,  1,  4,  295,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr },  // Inst #634 = EVLHHESPLAT
3493
  { 635,  3,  1,  4,  295,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo100, -1 ,nullptr },  // Inst #635 = EVLHHESPLATX
3494
  { 636,  3,  1,  4,  295,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr },  // Inst #636 = EVLHHOSSPLAT
3495
  { 637,  3,  1,  4,  295,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo100, -1 ,nullptr },  // Inst #637 = EVLHHOSSPLATX
3496
  { 638,  3,  1,  4,  295,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr },  // Inst #638 = EVLHHOUSPLAT
3497
  { 639,  3,  1,  4,  295,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo100, -1 ,nullptr },  // Inst #639 = EVLHHOUSPLATX
3498
  { 640,  3,  1,  4,  295,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr },  // Inst #640 = EVLWHE
3499
  { 641,  3,  1,  4,  295,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo100, -1 ,nullptr },  // Inst #641 = EVLWHEX
3500
  { 642,  3,  1,  4,  295,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr },  // Inst #642 = EVLWHOS
3501
  { 643,  3,  1,  4,  295,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo100, -1 ,nullptr },  // Inst #643 = EVLWHOSX
3502
  { 644,  3,  1,  4,  295,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr },  // Inst #644 = EVLWHOU
3503
  { 645,  3,  1,  4,  295,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo100, -1 ,nullptr },  // Inst #645 = EVLWHOUX
3504
  { 646,  3,  1,  4,  295,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr },  // Inst #646 = EVLWHSPLAT
3505
  { 647,  3,  1,  4,  295,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo100, -1 ,nullptr },  // Inst #647 = EVLWHSPLATX
3506
  { 648,  3,  1,  4,  295,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr },  // Inst #648 = EVLWWSPLAT
3507
  { 649,  3,  1,  4,  295,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo100, -1 ,nullptr },  // Inst #649 = EVLWWSPLATX
3508
  { 650,  3,  1,  4,  293,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #650 = EVMERGEHI
3509
  { 651,  3,  1,  4,  293,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #651 = EVMERGEHILO
3510
  { 652,  3,  1,  4,  293,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #652 = EVMERGELO
3511
  { 653,  3,  1,  4,  293,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #653 = EVMERGELOHI
3512
  { 654,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #654 = EVMHEGSMFAA
3513
  { 655,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #655 = EVMHEGSMFAN
3514
  { 656,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #656 = EVMHEGSMIAA
3515
  { 657,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #657 = EVMHEGSMIAN
3516
  { 658,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #658 = EVMHEGUMIAA
3517
  { 659,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #659 = EVMHEGUMIAN
3518
  { 660,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #660 = EVMHESMF
3519
  { 661,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #661 = EVMHESMFA
3520
  { 662,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #662 = EVMHESMFAAW
3521
  { 663,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #663 = EVMHESMFANW
3522
  { 664,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #664 = EVMHESMI
3523
  { 665,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #665 = EVMHESMIA
3524
  { 666,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #666 = EVMHESMIAAW
3525
  { 667,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #667 = EVMHESMIANW
3526
  { 668,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #668 = EVMHESSF
3527
  { 669,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #669 = EVMHESSFA
3528
  { 670,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #670 = EVMHESSFAAW
3529
  { 671,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #671 = EVMHESSFANW
3530
  { 672,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #672 = EVMHESSIAAW
3531
  { 673,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #673 = EVMHESSIANW
3532
  { 674,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #674 = EVMHEUMI
3533
  { 675,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #675 = EVMHEUMIA
3534
  { 676,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #676 = EVMHEUMIAAW
3535
  { 677,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #677 = EVMHEUMIANW
3536
  { 678,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #678 = EVMHEUSIAAW
3537
  { 679,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #679 = EVMHEUSIANW
3538
  { 680,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #680 = EVMHOGSMFAA
3539
  { 681,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #681 = EVMHOGSMFAN
3540
  { 682,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #682 = EVMHOGSMIAA
3541
  { 683,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #683 = EVMHOGSMIAN
3542
  { 684,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #684 = EVMHOGUMIAA
3543
  { 685,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #685 = EVMHOGUMIAN
3544
  { 686,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #686 = EVMHOSMF
3545
  { 687,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #687 = EVMHOSMFA
3546
  { 688,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #688 = EVMHOSMFAAW
3547
  { 689,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #689 = EVMHOSMFANW
3548
  { 690,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #690 = EVMHOSMI
3549
  { 691,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #691 = EVMHOSMIA
3550
  { 692,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #692 = EVMHOSMIAAW
3551
  { 693,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #693 = EVMHOSMIANW
3552
  { 694,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #694 = EVMHOSSF
3553
  { 695,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #695 = EVMHOSSFA
3554
  { 696,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #696 = EVMHOSSFAAW
3555
  { 697,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #697 = EVMHOSSFANW
3556
  { 698,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #698 = EVMHOSSIAAW
3557
  { 699,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #699 = EVMHOSSIANW
3558
  { 700,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #700 = EVMHOUMI
3559
  { 701,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #701 = EVMHOUMIA
3560
  { 702,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #702 = EVMHOUMIAAW
3561
  { 703,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #703 = EVMHOUMIANW
3562
  { 704,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #704 = EVMHOUSIAAW
3563
  { 705,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #705 = EVMHOUSIANW
3564
  { 706,  2,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #706 = EVMRA
3565
  { 707,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #707 = EVMWHSMF
3566
  { 708,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #708 = EVMWHSMFA
3567
  { 709,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #709 = EVMWHSMI
3568
  { 710,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #710 = EVMWHSMIA
3569
  { 711,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #711 = EVMWHSSF
3570
  { 712,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #712 = EVMWHSSFA
3571
  { 713,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #713 = EVMWHUMI
3572
  { 714,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #714 = EVMWHUMIA
3573
  { 715,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #715 = EVMWLSMIAAW
3574
  { 716,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #716 = EVMWLSMIANW
3575
  { 717,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #717 = EVMWLSSIAAW
3576
  { 718,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #718 = EVMWLSSIANW
3577
  { 719,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #719 = EVMWLUMI
3578
  { 720,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #720 = EVMWLUMIA
3579
  { 721,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #721 = EVMWLUMIAAW
3580
  { 722,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #722 = EVMWLUMIANW
3581
  { 723,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #723 = EVMWLUSIAAW
3582
  { 724,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #724 = EVMWLUSIANW
3583
  { 725,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #725 = EVMWSMF
3584
  { 726,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #726 = EVMWSMFA
3585
  { 727,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #727 = EVMWSMFAA
3586
  { 728,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #728 = EVMWSMFAN
3587
  { 729,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #729 = EVMWSMI
3588
  { 730,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #730 = EVMWSMIA
3589
  { 731,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #731 = EVMWSMIAA
3590
  { 732,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #732 = EVMWSMIAN
3591
  { 733,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #733 = EVMWSSF
3592
  { 734,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #734 = EVMWSSFA
3593
  { 735,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #735 = EVMWSSFAA
3594
  { 736,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #736 = EVMWSSFAN
3595
  { 737,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #737 = EVMWUMI
3596
  { 738,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #738 = EVMWUMIA
3597
  { 739,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #739 = EVMWUMIAA
3598
  { 740,  3,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #740 = EVMWUMIAN
3599
  { 741,  3,  1,  4,  293,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #741 = EVNAND
3600
  { 742,  2,  1,  4,  293,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #742 = EVNEG
3601
  { 743,  3,  1,  4,  293,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #743 = EVNOR
3602
  { 744,  3,  1,  4,  293,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #744 = EVOR
3603
  { 745,  3,  1,  4,  293,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #745 = EVORC
3604
  { 746,  3,  1,  4,  293,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #746 = EVRLW
3605
  { 747,  3,  1,  4,  293,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo98, -1 ,nullptr },  // Inst #747 = EVRLWI
3606
  { 748,  2,  1,  4,  293,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #748 = EVRNDW
3607
  { 749,  4,  1,  4,  22, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr },  // Inst #749 = EVSEL
3608
  { 750,  3,  1,  4,  293,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #750 = EVSLW
3609
  { 751,  3,  1,  4,  293,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo98, -1 ,nullptr },  // Inst #751 = EVSLWI
3610
  { 752,  2,  1,  4,  293,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo102, -1 ,nullptr },  // Inst #752 = EVSPLATFI
3611
  { 753,  2,  1,  4,  293,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo102, -1 ,nullptr },  // Inst #753 = EVSPLATI
3612
  { 754,  3,  1,  4,  293,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo98, -1 ,nullptr },  // Inst #754 = EVSRWIS
3613
  { 755,  3,  1,  4,  293,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo98, -1 ,nullptr },  // Inst #755 = EVSRWIU
3614
  { 756,  3,  1,  4,  293,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #756 = EVSRWS
3615
  { 757,  3,  1,  4,  293,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #757 = EVSRWU
3616
  { 758,  3,  0,  4,  296,  0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr },  // Inst #758 = EVSTDD
3617
  { 759,  3,  0,  4,  296,  0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo100, -1 ,nullptr },  // Inst #759 = EVSTDDX
3618
  { 760,  3,  0,  4,  296,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr },  // Inst #760 = EVSTDH
3619
  { 761,  3,  0,  4,  296,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo100, -1 ,nullptr },  // Inst #761 = EVSTDHX
3620
  { 762,  3,  0,  4,  296,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr },  // Inst #762 = EVSTDW
3621
  { 763,  3,  0,  4,  296,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo100, -1 ,nullptr },  // Inst #763 = EVSTDWX
3622
  { 764,  3,  0,  4,  296,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr },  // Inst #764 = EVSTWHE
3623
  { 765,  3,  0,  4,  296,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo100, -1 ,nullptr },  // Inst #765 = EVSTWHEX
3624
  { 766,  3,  0,  4,  296,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr },  // Inst #766 = EVSTWHO
3625
  { 767,  3,  0,  4,  296,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo100, -1 ,nullptr },  // Inst #767 = EVSTWHOX
3626
  { 768,  3,  0,  4,  296,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr },  // Inst #768 = EVSTWWE
3627
  { 769,  3,  0,  4,  296,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo100, -1 ,nullptr },  // Inst #769 = EVSTWWEX
3628
  { 770,  3,  0,  4,  296,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr },  // Inst #770 = EVSTWWO
3629
  { 771,  3,  0,  4,  296,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo100, -1 ,nullptr },  // Inst #771 = EVSTWWOX
3630
  { 772,  2,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #772 = EVSUBFSMIAAW
3631
  { 773,  2,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #773 = EVSUBFSSIAAW
3632
  { 774,  2,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #774 = EVSUBFUMIAAW
3633
  { 775,  2,  1,  4,  294,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #775 = EVSUBFUSIAAW
3634
  { 776,  3,  1,  4,  293,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #776 = EVSUBFW
3635
  { 777,  3,  1,  4,  293,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr },  // Inst #777 = EVSUBIFW
3636
  { 778,  3,  1,  4,  293,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #778 = EVXOR
3637
  { 779,  2,  1,  4,  116,  0, 0x8ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #779 = EXTSB
3638
  { 780,  2,  1,  4,  116,  0, 0x8ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #780 = EXTSB8
3639
  { 781,  2,  1,  4,  116,  0, 0x8ULL, nullptr, nullptr, OperandInfo104, -1 ,nullptr },  // Inst #781 = EXTSB8_32_64
3640
  { 782,  2,  1,  4,  116,  0, 0x8ULL, nullptr, ImplicitList3, OperandInfo54, -1 ,nullptr },  // Inst #782 = EXTSB8o
3641
  { 783,  2,  1,  4,  116,  0, 0x8ULL, nullptr, ImplicitList3, OperandInfo36, -1 ,nullptr },  // Inst #783 = EXTSBo
3642
  { 784,  2,  1,  4,  116,  0, 0x8ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #784 = EXTSH
3643
  { 785,  2,  1,  4,  116,  0, 0x8ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #785 = EXTSH8
3644
  { 786,  2,  1,  4,  116,  0, 0x8ULL, nullptr, nullptr, OperandInfo104, -1 ,nullptr },  // Inst #786 = EXTSH8_32_64
3645
  { 787,  2,  1,  4,  116,  0, 0x8ULL, nullptr, ImplicitList3, OperandInfo54, -1 ,nullptr },  // Inst #787 = EXTSH8o
3646
  { 788,  2,  1,  4,  116,  0, 0x8ULL, nullptr, ImplicitList3, OperandInfo36, -1 ,nullptr },  // Inst #788 = EXTSHo
3647
  { 789,  2,  1,  4,  116,  0, 0x8ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #789 = EXTSW
3648
  { 790,  3,  1,  4,  112,  0, 0x8ULL, nullptr, nullptr, OperandInfo105, -1 ,nullptr },  // Inst #790 = EXTSWSLI
3649
  { 791,  3,  1,  4,  257,  0, 0x8ULL, nullptr, ImplicitList3, OperandInfo105, -1 ,nullptr },  // Inst #791 = EXTSWSLIo
3650
  { 792,  2,  1,  4,  116,  0, 0x8ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #792 = EXTSW_32
3651
  { 793,  2,  1,  4,  116,  0, 0x8ULL, nullptr, nullptr, OperandInfo104, -1 ,nullptr },  // Inst #793 = EXTSW_32_64
3652
  { 794,  2,  1,  4,  116,  0, 0x8ULL, nullptr, ImplicitList3, OperandInfo104, -1 ,nullptr },  // Inst #794 = EXTSW_32_64o
3653
  { 795,  2,  1,  4,  116,  0, 0x8ULL, nullptr, ImplicitList3, OperandInfo54, -1 ,nullptr },  // Inst #795 = EXTSWo
3654
  { 796,  0,  0,  4,  179,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #796 = EnforceIEIO
3655
  { 797,  2,  1,  4,  131,  0, 0x18ULL, nullptr, nullptr, OperandInfo106, -1 ,nullptr },  // Inst #797 = FABSD
3656
  { 798,  2,  1,  4,  246,  0, 0x18ULL, nullptr, ImplicitList23, OperandInfo106, -1 ,nullptr },  // Inst #798 = FABSDo
3657
  { 799,  2,  1,  4,  131,  0, 0x18ULL, nullptr, nullptr, OperandInfo107, -1 ,nullptr },  // Inst #799 = FABSS
3658
  { 800,  2,  1,  4,  246,  0, 0x18ULL, nullptr, ImplicitList23, OperandInfo107, -1 ,nullptr },  // Inst #800 = FABSSo
3659
  { 801,  3,  1,  4,  149,  0|(1ULL<<MCID::Commutable), 0x18ULL, ImplicitList2, nullptr, OperandInfo108, -1 ,nullptr },  // Inst #801 = FADD
3660
  { 802,  3,  1,  4,  148,  0|(1ULL<<MCID::Commutable), 0x18ULL, ImplicitList2, nullptr, OperandInfo109, -1 ,nullptr },  // Inst #802 = FADDS
3661
  { 803,  3,  1,  4,  156,  0|(1ULL<<MCID::Commutable), 0x18ULL, ImplicitList2, ImplicitList23, OperandInfo109, -1 ,nullptr },  // Inst #803 = FADDSo
3662
  { 804,  3,  1,  4,  157,  0|(1ULL<<MCID::Commutable), 0x18ULL, ImplicitList2, ImplicitList23, OperandInfo108, -1 ,nullptr },  // Inst #804 = FADDo
3663
  { 805,  3,  1,  4,  0,  0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList2, nullptr, OperandInfo108, -1 ,nullptr },  // Inst #805 = FADDrtz
3664
  { 806,  2,  1,  4,  148,  0, 0x18ULL, ImplicitList2, nullptr, OperandInfo106, -1 ,nullptr },  // Inst #806 = FCFID
3665
  { 807,  2,  1,  4,  148,  0, 0x18ULL, ImplicitList2, nullptr, OperandInfo110, -1 ,nullptr },  // Inst #807 = FCFIDS
3666
  { 808,  2,  1,  4,  156,  0, 0x18ULL, ImplicitList2, ImplicitList23, OperandInfo110, -1 ,nullptr },  // Inst #808 = FCFIDSo
3667
  { 809,  2,  1,  4,  148,  0, 0x18ULL, ImplicitList2, nullptr, OperandInfo106, -1 ,nullptr },  // Inst #809 = FCFIDU
3668
  { 810,  2,  1,  4,  148,  0, 0x18ULL, ImplicitList2, nullptr, OperandInfo110, -1 ,nullptr },  // Inst #810 = FCFIDUS
3669
  { 811,  2,  1,  4,  156,  0, 0x18ULL, ImplicitList2, ImplicitList23, OperandInfo110, -1 ,nullptr },  // Inst #811 = FCFIDUSo
3670
  { 812,  2,  1,  4,  156,  0, 0x18ULL, ImplicitList2, ImplicitList23, OperandInfo106, -1 ,nullptr },  // Inst #812 = FCFIDUo
3671
  { 813,  2,  1,  4,  156,  0, 0x18ULL, ImplicitList2, ImplicitList23, OperandInfo106, -1 ,nullptr },  // Inst #813 = FCFIDo
3672
  { 814,  3,  1,  4,  106,  0|(1ULL<<MCID::Compare), 0x18ULL, nullptr, nullptr, OperandInfo111, -1 ,nullptr },  // Inst #814 = FCMPUD
3673
  { 815,  3,  1,  4,  106,  0|(1ULL<<MCID::Compare), 0x18ULL, nullptr, nullptr, OperandInfo112, -1 ,nullptr },  // Inst #815 = FCMPUS
3674
  { 816,  3,  1,  4,  131,  0, 0x18ULL, nullptr, nullptr, OperandInfo108, -1 ,nullptr },  // Inst #816 = FCPSGND
3675
  { 817,  3,  1,  4,  246,  0, 0x18ULL, nullptr, ImplicitList23, OperandInfo108, -1 ,nullptr },  // Inst #817 = FCPSGNDo
3676
  { 818,  3,  1,  4,  131,  0, 0x18ULL, nullptr, nullptr, OperandInfo109, -1 ,nullptr },  // Inst #818 = FCPSGNS
3677
  { 819,  3,  1,  4,  246,  0, 0x18ULL, nullptr, ImplicitList23, OperandInfo109, -1 ,nullptr },  // Inst #819 = FCPSGNSo
3678
  { 820,  2,  1,  4,  148,  0, 0x18ULL, ImplicitList2, nullptr, OperandInfo106, -1 ,nullptr },  // Inst #820 = FCTID
3679
  { 821,  2,  1,  4,  148,  0, 0x18ULL, ImplicitList2, nullptr, OperandInfo106, -1 ,nullptr },  // Inst #821 = FCTIDU
3680
  { 822,  2,  1,  4,  148,  0, 0x18ULL, ImplicitList2, nullptr, OperandInfo106, -1 ,nullptr },  // Inst #822 = FCTIDUZ
3681
  { 823,  2,  1,  4,  156,  0, 0x18ULL, ImplicitList2, ImplicitList23, OperandInfo106, -1 ,nullptr },  // Inst #823 = FCTIDUZo
3682
  { 824,  2,  1,  4,  156,  0, 0x18ULL, ImplicitList2, ImplicitList23, OperandInfo106, -1 ,nullptr },  // Inst #824 = FCTIDUo
3683
  { 825,  2,  1,  4,  148,  0, 0x18ULL, ImplicitList2, nullptr, OperandInfo106, -1 ,nullptr },  // Inst #825 = FCTIDZ
3684
  { 826,  2,  1,  4,  156,  0, 0x18ULL, ImplicitList2, ImplicitList23, OperandInfo106, -1 ,nullptr },  // Inst #826 = FCTIDZo
3685
  { 827,  2,  1,  4,  156,  0, 0x18ULL, ImplicitList2, ImplicitList23, OperandInfo106, -1 ,nullptr },  // Inst #827 = FCTIDo
3686
  { 828,  2,  1,  4,  148,  0, 0x18ULL, ImplicitList2, nullptr, OperandInfo106, -1 ,nullptr },  // Inst #828 = FCTIW
3687
  { 829,  2,  1,  4,  148,  0, 0x18ULL, ImplicitList2, nullptr, OperandInfo106, -1 ,nullptr },  // Inst #829 = FCTIWU
3688
  { 830,  2,  1,  4,  148,  0, 0x18ULL, ImplicitList2, nullptr, OperandInfo106, -1 ,nullptr },  // Inst #830 = FCTIWUZ
3689
  { 831,  2,  1,  4,  156,  0, 0x18ULL, ImplicitList2, ImplicitList23, OperandInfo106, -1 ,nullptr },  // Inst #831 = FCTIWUZo
3690
  { 832,  2,  1,  4,  156,  0, 0x18ULL, ImplicitList2, ImplicitList23, OperandInfo106, -1 ,nullptr },  // Inst #832 = FCTIWUo
3691
  { 833,  2,  1,  4,  148,  0, 0x18ULL, ImplicitList2, nullptr, OperandInfo106, -1 ,nullptr },  // Inst #833 = FCTIWZ
3692
  { 834,  2,  1,  4,  156,  0, 0x18ULL, ImplicitList2, ImplicitList23, OperandInfo106, -1 ,nullptr },  // Inst #834 = FCTIWZo
3693
  { 835,  2,  1,  4,  156,  0, 0x18ULL, ImplicitList2, ImplicitList23, OperandInfo106, -1 ,nullptr },  // Inst #835 = FCTIWo
3694
  { 836,  3,  1,  4,  259,  0, 0x18ULL, ImplicitList2, nullptr, OperandInfo108, -1 ,nullptr },  // Inst #836 = FDIV
3695
  { 837,  3,  1,  4,  270,  0, 0x18ULL, ImplicitList2, nullptr, OperandInfo109, -1 ,nullptr },  // Inst #837 = FDIVS
3696
  { 838,  3,  1,  4,  271,  0, 0x18ULL, ImplicitList2, ImplicitList23, OperandInfo109, -1 ,nullptr },  // Inst #838 = FDIVSo
3697
  { 839,  3,  1,  4,  260,  0, 0x18ULL, ImplicitList2, ImplicitList23, OperandInfo108, -1 ,nullptr },  // Inst #839 = FDIVo
3698
  { 840,  4,  1,  4,  150,  0|(1ULL<<MCID::Commutable), 0x18ULL, ImplicitList2, nullptr, OperandInfo113, -1 ,nullptr },  // Inst #840 = FMADD
3699
  { 841,  4,  1,  4,  148,  0|(1ULL<<MCID::Commutable), 0x18ULL, ImplicitList2, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #841 = FMADDS
3700
  { 842,  4,  1,  4,  156,  0|(1ULL<<MCID::Commutable), 0x18ULL, ImplicitList2, ImplicitList23, OperandInfo114, -1 ,nullptr },  // Inst #842 = FMADDSo
3701
  { 843,  4,  1,  4,  158,  0|(1ULL<<MCID::Commutable), 0x18ULL, ImplicitList2, ImplicitList23, OperandInfo113, -1 ,nullptr },  // Inst #843 = FMADDo
3702
  { 844,  2,  1,  4,  131,  0, 0x0ULL, nullptr, nullptr, OperandInfo107, -1 ,nullptr },  // Inst #844 = FMR
3703
  { 845,  2,  1,  4,  246,  0, 0x0ULL, nullptr, ImplicitList23, OperandInfo107, -1 ,nullptr },  // Inst #845 = FMRo
3704
  { 846,  4,  1,  4,  150,  0|(1ULL<<MCID::Commutable), 0x18ULL, ImplicitList2, nullptr, OperandInfo113, -1 ,nullptr },  // Inst #846 = FMSUB
3705
  { 847,  4,  1,  4,  148,  0|(1ULL<<MCID::Commutable), 0x18ULL, ImplicitList2, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #847 = FMSUBS
3706
  { 848,  4,  1,  4,  156,  0|(1ULL<<MCID::Commutable), 0x18ULL, ImplicitList2, ImplicitList23, OperandInfo114, -1 ,nullptr },  // Inst #848 = FMSUBSo
3707
  { 849,  4,  1,  4,  158,  0|(1ULL<<MCID::Commutable), 0x18ULL, ImplicitList2, ImplicitList23, OperandInfo113, -1 ,nullptr },  // Inst #849 = FMSUBo
3708
  { 850,  3,  1,  4,  150,  0|(1ULL<<MCID::Commutable), 0x18ULL, ImplicitList2, nullptr, OperandInfo108, -1 ,nullptr },  // Inst #850 = FMUL
3709
  { 851,  3,  1,  4,  148,  0|(1ULL<<MCID::Commutable), 0x18ULL, ImplicitList2, nullptr, OperandInfo109, -1 ,nullptr },  // Inst #851 = FMULS
3710
  { 852,  3,  1,  4,  156,  0|(1ULL<<MCID::Commutable), 0x18ULL, ImplicitList2, ImplicitList23, OperandInfo109, -1 ,nullptr },  // Inst #852 = FMULSo
3711
  { 853,  3,  1,  4,  158,  0|(1ULL<<MCID::Commutable), 0x18ULL, ImplicitList2, ImplicitList23, OperandInfo108, -1 ,nullptr },  // Inst #853 = FMULo
3712
  { 854,  2,  1,  4,  131,  0, 0x18ULL, nullptr, nullptr, OperandInfo106, -1 ,nullptr },  // Inst #854 = FNABSD
3713
  { 855,  2,  1,  4,  246,  0, 0x18ULL, nullptr, ImplicitList23, OperandInfo106, -1 ,nullptr },  // Inst #855 = FNABSDo
3714
  { 856,  2,  1,  4,  131,  0, 0x18ULL, nullptr, nullptr, OperandInfo107, -1 ,nullptr },  // Inst #856 = FNABSS
3715
  { 857,  2,  1,  4,  246,  0, 0x18ULL, nullptr, ImplicitList23, OperandInfo107, -1 ,nullptr },  // Inst #857 = FNABSSo
3716
  { 858,  2,  1,  4,  131,  0, 0x18ULL, nullptr, nullptr, OperandInfo106, -1 ,nullptr },  // Inst #858 = FNEGD
3717
  { 859,  2,  1,  4,  246,  0, 0x18ULL, nullptr, ImplicitList23, OperandInfo106, -1 ,nullptr },  // Inst #859 = FNEGDo
3718
  { 860,  2,  1,  4,  131,  0, 0x18ULL, nullptr, nullptr, OperandInfo107, -1 ,nullptr },  // Inst #860 = FNEGS
3719
  { 861,  2,  1,  4,  246,  0, 0x18ULL, nullptr, ImplicitList23, OperandInfo107, -1 ,nullptr },  // Inst #861 = FNEGSo
3720
  { 862,  4,  1,  4,  150,  0|(1ULL<<MCID::Commutable), 0x18ULL, ImplicitList2, nullptr, OperandInfo113, -1 ,nullptr },  // Inst #862 = FNMADD
3721
  { 863,  4,  1,  4,  148,  0|(1ULL<<MCID::Commutable), 0x18ULL, ImplicitList2, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #863 = FNMADDS
3722
  { 864,  4,  1,  4,  156,  0|(1ULL<<MCID::Commutable), 0x18ULL, ImplicitList2, ImplicitList23, OperandInfo114, -1 ,nullptr },  // Inst #864 = FNMADDSo
3723
  { 865,  4,  1,  4,  158,  0|(1ULL<<MCID::Commutable), 0x18ULL, ImplicitList2, ImplicitList23, OperandInfo113, -1 ,nullptr },  // Inst #865 = FNMADDo
3724
  { 866,  4,  1,  4,  150,  0|(1ULL<<MCID::Commutable), 0x18ULL, ImplicitList2, nullptr, OperandInfo113, -1 ,nullptr },  // Inst #866 = FNMSUB
3725
  { 867,  4,  1,  4,  148,  0|(1ULL<<MCID::Commutable), 0x18ULL, ImplicitList2, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #867 = FNMSUBS
3726
  { 868,  4,  1,  4,  156,  0|(1ULL<<MCID::Commutable), 0x18ULL, ImplicitList2, ImplicitList23, OperandInfo114, -1 ,nullptr },  // Inst #868 = FNMSUBSo
3727
  { 869,  4,  1,  4,  158,  0|(1ULL<<MCID::Commutable), 0x18ULL, ImplicitList2, ImplicitList23, OperandInfo113, -1 ,nullptr },  // Inst #869 = FNMSUBo
3728
  { 870,  2,  1,  4,  148,  0, 0x18ULL, nullptr, nullptr, OperandInfo106, -1 ,nullptr },  // Inst #870 = FRE
3729
  { 871,  2,  1,  4,  148,  0, 0x18ULL, nullptr, nullptr, OperandInfo107, -1 ,nullptr },  // Inst #871 = FRES
3730
  { 872,  2,  1,  4,  156,  0, 0x18ULL, nullptr, ImplicitList23, OperandInfo107, -1 ,nullptr },  // Inst #872 = FRESo
3731
  { 873,  2,  1,  4,  156,  0, 0x18ULL, nullptr, ImplicitList23, OperandInfo106, -1 ,nullptr },  // Inst #873 = FREo
3732
  { 874,  2,  1,  4,  148,  0, 0x18ULL, ImplicitList2, nullptr, OperandInfo106, -1 ,nullptr },  // Inst #874 = FRIMD
3733
  { 875,  2,  1,  4,  156,  0, 0x18ULL, ImplicitList2, ImplicitList23, OperandInfo106, -1 ,nullptr },  // Inst #875 = FRIMDo
3734
  { 876,  2,  1,  4,  148,  0, 0x18ULL, ImplicitList2, nullptr, OperandInfo107, -1 ,nullptr },  // Inst #876 = FRIMS
3735
  { 877,  2,  1,  4,  156,  0, 0x18ULL, ImplicitList2, ImplicitList23, OperandInfo107, -1 ,nullptr },  // Inst #877 = FRIMSo
3736
  { 878,  2,  1,  4,  148,  0, 0x18ULL, ImplicitList2, nullptr, OperandInfo106, -1 ,nullptr },  // Inst #878 = FRIND
3737
  { 879,  2,  1,  4,  156,  0, 0x18ULL, ImplicitList2, ImplicitList23, OperandInfo106, -1 ,nullptr },  // Inst #879 = FRINDo
3738
  { 880,  2,  1,  4,  148,  0, 0x18ULL, ImplicitList2, nullptr, OperandInfo107, -1 ,nullptr },  // Inst #880 = FRINS
3739
  { 881,  2,  1,  4,  156,  0, 0x18ULL, ImplicitList2, ImplicitList23, OperandInfo107, -1 ,nullptr },  // Inst #881 = FRINSo
3740
  { 882,  2,  1,  4,  148,  0, 0x18ULL, ImplicitList2, nullptr, OperandInfo106, -1 ,nullptr },  // Inst #882 = FRIPD
3741
  { 883,  2,  1,  4,  156,  0, 0x18ULL, ImplicitList2, ImplicitList23, OperandInfo106, -1 ,nullptr },  // Inst #883 = FRIPDo
3742
  { 884,  2,  1,  4,  148,  0, 0x18ULL, ImplicitList2, nullptr, OperandInfo107, -1 ,nullptr },  // Inst #884 = FRIPS
3743
  { 885,  2,  1,  4,  156,  0, 0x18ULL, ImplicitList2, ImplicitList23, OperandInfo107, -1 ,nullptr },  // Inst #885 = FRIPSo
3744
  { 886,  2,  1,  4,  148,  0, 0x18ULL, ImplicitList2, nullptr, OperandInfo106, -1 ,nullptr },  // Inst #886 = FRIZD
3745
  { 887,  2,  1,  4,  156,  0, 0x18ULL, ImplicitList2, ImplicitList23, OperandInfo106, -1 ,nullptr },  // Inst #887 = FRIZDo
3746
  { 888,  2,  1,  4,  148,  0, 0x18ULL, ImplicitList2, nullptr, OperandInfo107, -1 ,nullptr },  // Inst #888 = FRIZS
3747
  { 889,  2,  1,  4,  156,  0, 0x18ULL, ImplicitList2, ImplicitList23, OperandInfo107, -1 ,nullptr },  // Inst #889 = FRIZSo
3748
  { 890,  2,  1,  4,  148,  0, 0x18ULL, ImplicitList2, nullptr, OperandInfo110, -1 ,nullptr },  // Inst #890 = FRSP
3749
  { 891,  2,  1,  4,  156,  0, 0x18ULL, ImplicitList2, ImplicitList23, OperandInfo110, -1 ,nullptr },  // Inst #891 = FRSPo
3750
  { 892,  2,  1,  4,  148,  0, 0x18ULL, nullptr, nullptr, OperandInfo106, -1 ,nullptr },  // Inst #892 = FRSQRTE
3751
  { 893,  2,  1,  4,  148,  0, 0x18ULL, nullptr, nullptr, OperandInfo107, -1 ,nullptr },  // Inst #893 = FRSQRTES
3752
  { 894,  2,  1,  4,  156,  0, 0x18ULL, nullptr, ImplicitList23, OperandInfo107, -1 ,nullptr },  // Inst #894 = FRSQRTESo
3753
  { 895,  2,  1,  4,  156,  0, 0x18ULL, nullptr, ImplicitList23, OperandInfo106, -1 ,nullptr },  // Inst #895 = FRSQRTEo
3754
  { 896,  4,  1,  4,  148,  0, 0x18ULL, nullptr, nullptr, OperandInfo113, -1 ,nullptr },  // Inst #896 = FSELD
3755
  { 897,  4,  1,  4,  152,  0, 0x18ULL, nullptr, ImplicitList23, OperandInfo113, -1 ,nullptr },  // Inst #897 = FSELDo
3756
  { 898,  4,  1,  4,  148,  0, 0x18ULL, nullptr, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #898 = FSELS
3757
  { 899,  4,  1,  4,  152,  0, 0x18ULL, nullptr, ImplicitList23, OperandInfo115, -1 ,nullptr },  // Inst #899 = FSELSo
3758
  { 900,  2,  1,  4,  262,  0, 0x18ULL, ImplicitList2, nullptr, OperandInfo106, -1 ,nullptr },  // Inst #900 = FSQRT
3759
  { 901,  2,  1,  4,  267,  0, 0x18ULL, ImplicitList2, nullptr, OperandInfo107, -1 ,nullptr },  // Inst #901 = FSQRTS
3760
  { 902,  2,  1,  4,  268,  0, 0x18ULL, ImplicitList2, ImplicitList23, OperandInfo107, -1 ,nullptr },  // Inst #902 = FSQRTSo
3761
  { 903,  2,  1,  4,  265,  0, 0x18ULL, ImplicitList2, ImplicitList23, OperandInfo106, -1 ,nullptr },  // Inst #903 = FSQRTo
3762
  { 904,  3,  1,  4,  149,  0, 0x18ULL, ImplicitList2, nullptr, OperandInfo108, -1 ,nullptr },  // Inst #904 = FSUB
3763
  { 905,  3,  1,  4,  148,  0, 0x18ULL, ImplicitList2, nullptr, OperandInfo109, -1 ,nullptr },  // Inst #905 = FSUBS
3764
  { 906,  3,  1,  4,  156,  0, 0x18ULL, ImplicitList2, ImplicitList23, OperandInfo109, -1 ,nullptr },  // Inst #906 = FSUBSo
3765
  { 907,  3,  1,  4,  157,  0, 0x18ULL, ImplicitList2, ImplicitList23, OperandInfo108, -1 ,nullptr },  // Inst #907 = FSUBo
3766
  { 908,  3,  1,  4,  106,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x18ULL, nullptr, nullptr, OperandInfo111, -1 ,nullptr },  // Inst #908 = FTDIV
3767
  { 909,  2,  1,  4,  106,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x18ULL, nullptr, nullptr, OperandInfo116, -1 ,nullptr },  // Inst #909 = FTSQRT
3768
  { 910,  3,  1,  8,  0,  0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL, nullptr, ImplicitList24, OperandInfo34, -1 ,nullptr },  // Inst #910 = GETtlsADDR
3769
  { 911,  3,  1,  4,  0,  0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL, nullptr, ImplicitList25, OperandInfo35, -1 ,nullptr },  // Inst #911 = GETtlsADDR32
3770
  { 912,  3,  1,  4,  0,  0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL, nullptr, ImplicitList24, OperandInfo34, -1 ,nullptr },  // Inst #912 = GETtlsldADDR
3771
  { 913,  3,  1,  4,  0,  0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL, nullptr, ImplicitList25, OperandInfo35, -1 ,nullptr },  // Inst #913 = GETtlsldADDR32
3772
  { 914,  0,  0,  4,  297,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #914 = HRFID
3773
  { 915,  2,  0,  4,  178,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #915 = ICBI
3774
  { 916,  2,  0,  4,  178,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #916 = ICBIEP
3775
  { 917,  3,  0,  4,  301,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo78, -1 ,nullptr },  // Inst #917 = ICBLC
3776
  { 918,  3,  0,  4,  300,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo78, -1 ,nullptr },  // Inst #918 = ICBLQ
3777
  { 919,  3,  0,  4,  179,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo78, -1 ,nullptr },  // Inst #919 = ICBT
3778
  { 920,  3,  0,  4,  179,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo78, -1 ,nullptr },  // Inst #920 = ICBTLS
3779
  { 921,  2,  0,  4,  300,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #921 = ICCCI
3780
  { 922,  4,  1,  4,  133,  0|(1ULL<<MCID::Select), 0x8ULL, nullptr, nullptr, OperandInfo117, -1 ,nullptr },  // Inst #922 = ISEL
3781
  { 923,  4,  1,  4,  133,  0|(1ULL<<MCID::Select), 0x8ULL, nullptr, nullptr, OperandInfo118, -1 ,nullptr },  // Inst #923 = ISEL8
3782
  { 924,  0,  0,  4,  184,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #924 = ISYNC
3783
  { 925,  3,  1,  4,  115,  0, 0x8ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #925 = LA
3784
  { 926,  3,  1,  4,  180,  0|(1ULL<<MCID::MayLoad), 0x80ULL, nullptr, nullptr, OperandInfo119, -1 ,nullptr },  // Inst #926 = LBARX
3785
  { 927,  3,  1,  4,  180,  0|(1ULL<<MCID::MayLoad), 0x80ULL, nullptr, nullptr, OperandInfo119, -1 ,nullptr },  // Inst #927 = LBARXL
3786
  { 928,  3,  1,  4,  300,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo119, -1 ,nullptr },  // Inst #928 = LBEPX
3787
  { 929,  3,  1,  4,  179,  0|(1ULL<<MCID::MayLoad), 0x10ULL, nullptr, nullptr, OperandInfo41, -1 ,nullptr },  // Inst #929 = LBZ
3788
  { 930,  3,  1,  4,  179,  0|(1ULL<<MCID::MayLoad), 0x10ULL, nullptr, nullptr, OperandInfo120, -1 ,nullptr },  // Inst #930 = LBZ8
3789
  { 931,  3,  1,  4,  179,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, nullptr, OperandInfo48, -1 ,nullptr },  // Inst #931 = LBZCIX
3790
  { 932,  4,  2,  4,  281,  0|(1ULL<<MCID::MayLoad), 0x10ULL, nullptr, nullptr, OperandInfo121, -1 ,nullptr },  // Inst #932 = LBZU
3791
  { 933,  4,  2,  4,  281,  0|(1ULL<<MCID::MayLoad), 0x10ULL, nullptr, nullptr, OperandInfo122, -1 ,nullptr },  // Inst #933 = LBZU8
3792
  { 934,  4,  2,  4,  282,  0|(1ULL<<MCID::MayLoad), 0x90ULL, nullptr, nullptr, OperandInfo123, -1 ,nullptr },  // Inst #934 = LBZUX
3793
  { 935,  4,  2,  4,  282,  0|(1ULL<<MCID::MayLoad), 0x90ULL, nullptr, nullptr, OperandInfo124, -1 ,nullptr },  // Inst #935 = LBZUX8
3794
  { 936,  3,  1,  4,  179,  0|(1ULL<<MCID::MayLoad), 0x90ULL, nullptr, nullptr, OperandInfo119, -1 ,nullptr },  // Inst #936 = LBZX
3795
  { 937,  3,  1,  4,  179,  0|(1ULL<<MCID::MayLoad), 0x90ULL, nullptr, nullptr, OperandInfo125, -1 ,nullptr },  // Inst #937 = LBZX8
3796
  { 938,  3,  1,  4,  179,  0|(1ULL<<MCID::MayLoad), 0x8ULL, nullptr, nullptr, OperandInfo126, -1 ,nullptr },  // Inst #938 = LBZXTLS
3797
  { 939,  3,  1,  4,  179,  0|(1ULL<<MCID::MayLoad), 0x8ULL, nullptr, nullptr, OperandInfo126, -1 ,nullptr },  // Inst #939 = LBZXTLS_
3798
  { 940,  3,  1,  4,  179,  0|(1ULL<<MCID::MayLoad), 0x8ULL, nullptr, nullptr, OperandInfo127, -1 ,nullptr },  // Inst #940 = LBZXTLS_32
3799
  { 941,  3,  1,  4,  181,  0|(1ULL<<MCID::MayLoad), 0x10ULL, nullptr, nullptr, OperandInfo120, -1 ,nullptr },  // Inst #941 = LD
3800
  { 942,  3,  1,  4,  182,  0|(1ULL<<MCID::MayLoad), 0x80ULL, nullptr, nullptr, OperandInfo125, -1 ,nullptr },  // Inst #942 = LDARX
3801
  { 943,  3,  1,  4,  182,  0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo125, -1 ,nullptr },  // Inst #943 = LDARXL
3802
  { 944,  3,  1,  4,  290,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x80ULL, nullptr, nullptr, OperandInfo34, -1 ,nullptr },  // Inst #944 = LDAT
3803
  { 945,  3,  1,  4,  179,  0|(1ULL<<MCID::MayLoad), 0x90ULL, nullptr, nullptr, OperandInfo125, -1 ,nullptr },  // Inst #945 = LDBRX
3804
  { 946,  3,  1,  4,  179,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, nullptr, OperandInfo48, -1 ,nullptr },  // Inst #946 = LDCIX
3805
  { 947,  3,  1,  4,  201,  0|(1ULL<<MCID::MayLoad), 0x10ULL, nullptr, nullptr, OperandInfo125, -1 ,nullptr },  // Inst #947 = LDMX
3806
  { 948,  4,  2,  4,  283,  0|(1ULL<<MCID::MayLoad), 0x10ULL, nullptr, nullptr, OperandInfo122, -1 ,nullptr },  // Inst #948 = LDU
3807
  { 949,  4,  2,  4,  284,  0|(1ULL<<MCID::MayLoad), 0x90ULL, nullptr, nullptr, OperandInfo124, -1 ,nullptr },  // Inst #949 = LDUX
3808
  { 950,  3,  1,  4,  181,  0|(1ULL<<MCID::MayLoad), 0x90ULL, nullptr, nullptr, OperandInfo125, -1 ,nullptr },  // Inst #950 = LDX
3809
  { 951,  3,  1,  4,  181,  0|(1ULL<<MCID::MayLoad), 0x8ULL, nullptr, nullptr, OperandInfo126, -1 ,nullptr },  // Inst #951 = LDXTLS
3810
  { 952,  3,  1,  4,  181,  0|(1ULL<<MCID::MayLoad), 0x8ULL, nullptr, nullptr, OperandInfo126, -1 ,nullptr },  // Inst #952 = LDXTLS_
3811
  { 953,  3,  1,  4,  0,  0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo128, -1 ,nullptr },  // Inst #953 = LDgotTprelL
3812
  { 954,  3,  1,  4,  0,  0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo129, -1 ,nullptr },  // Inst #954 = LDgotTprelL32
3813
  { 955,  3,  1,  4,  0,  0|(1ULL<<MCID::MayLoad), 0x10ULL, nullptr, nullptr, OperandInfo130, -1 ,nullptr },  // Inst #955 = LDtoc
3814
  { 956,  3,  1,  4,  0,  0|(1ULL<<MCID::MayLoad), 0x10ULL, nullptr, nullptr, OperandInfo130, -1 ,nullptr },  // Inst #956 = LDtocBA
3815
  { 957,  3,  1,  4,  0,  0|(1ULL<<MCID::MayLoad), 0x10ULL, nullptr, nullptr, OperandInfo130, -1 ,nullptr },  // Inst #957 = LDtocCPT
3816
  { 958,  3,  1,  4,  0,  0|(1ULL<<MCID::MayLoad), 0x10ULL, nullptr, nullptr, OperandInfo130, -1 ,nullptr },  // Inst #958 = LDtocJTI
3817
  { 959,  3,  1,  4,  0,  0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo128, -1 ,nullptr },  // Inst #959 = LDtocL
3818
  { 960,  3,  1,  4,  189,  0|(1ULL<<MCID::MayLoad), 0x10ULL, nullptr, nullptr, OperandInfo131, -1 ,nullptr },  // Inst #960 = LFD
3819
  { 961,  3,  1,  4,  302,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo132, -1 ,nullptr },  // Inst #961 = LFDEPX
3820
  { 962,  4,  2,  4,  285,  0|(1ULL<<MCID::MayLoad), 0x10ULL, nullptr, nullptr, OperandInfo133, -1 ,nullptr },  // Inst #962 = LFDU
3821
  { 963,  4,  2,  4,  286,  0|(1ULL<<MCID::MayLoad), 0x90ULL, nullptr, nullptr, OperandInfo134, -1 ,nullptr },  // Inst #963 = LFDUX
3822
  { 964,  3,  1,  4,  189,  0|(1ULL<<MCID::MayLoad), 0x90ULL, nullptr, nullptr, OperandInfo132, -1 ,nullptr },  // Inst #964 = LFDX
3823
  { 965,  3,  1,  4,  206,  0|(1ULL<<MCID::MayLoad), 0x90ULL, nullptr, nullptr, OperandInfo132, -1 ,nullptr },  // Inst #965 = LFIWAX
3824
  { 966,  3,  1,  4,  189,  0|(1ULL<<MCID::MayLoad), 0x90ULL, nullptr, nullptr, OperandInfo132, -1 ,nullptr },  // Inst #966 = LFIWZX
3825
  { 967,  3,  1,  4,  209,  0|(1ULL<<MCID::MayLoad), 0x10ULL, nullptr, nullptr, OperandInfo135, -1 ,nullptr },  // Inst #967 = LFS
3826
  { 968,  4,  2,  4,  275,  0|(1ULL<<MCID::MayLoad), 0x10ULL, nullptr, nullptr, OperandInfo136, -1 ,nullptr },  // Inst #968 = LFSU
3827
  { 969,  4,  2,  4,  276,  0|(1ULL<<MCID::MayLoad), 0x90ULL, nullptr, nullptr, OperandInfo137, -1 ,nullptr },  // Inst #969 = LFSUX
3828
  { 970,  3,  1,  4,  209,  0|(1ULL<<MCID::MayLoad), 0x90ULL, nullptr, nullptr, OperandInfo138, -1 ,nullptr },  // Inst #970 = LFSX
3829
  { 971,  3,  1,  4,  202,  0|(1ULL<<MCID::MayLoad), 0x14ULL, nullptr, nullptr, OperandInfo41, -1 ,nullptr },  // Inst #971 = LHA
3830
  { 972,  3,  1,  4,  202,  0|(1ULL<<MCID::MayLoad), 0x14ULL, nullptr, nullptr, OperandInfo120, -1 ,nullptr },  // Inst #972 = LHA8
3831
  { 973,  3,  1,  4,  180,  0|(1ULL<<MCID::MayLoad), 0x80ULL, nullptr, nullptr, OperandInfo119, -1 ,nullptr },  // Inst #973 = LHARX
3832
  { 974,  3,  1,  4,  180,  0|(1ULL<<MCID::MayLoad), 0x80ULL, nullptr, nullptr, OperandInfo119, -1 ,nullptr },  // Inst #974 = LHARXL
3833
  { 975,  4,  2,  4,  212,  0|(1ULL<<MCID::MayLoad), 0x10ULL, nullptr, nullptr, OperandInfo121, -1 ,nullptr },  // Inst #975 = LHAU
3834
  { 976,  4,  2,  4,  212,  0|(1ULL<<MCID::MayLoad), 0x10ULL, nullptr, nullptr, OperandInfo122, -1 ,nullptr },  // Inst #976 = LHAU8
3835
  { 977,  4,  2,  4,  213,  0|(1ULL<<MCID::MayLoad), 0x90ULL, nullptr, nullptr, OperandInfo123, -1 ,nullptr },  // Inst #977 = LHAUX
3836
  { 978,  4,  2,  4,  213,  0|(1ULL<<MCID::MayLoad), 0x90ULL, nullptr, nullptr, OperandInfo124, -1 ,nullptr },  // Inst #978 = LHAUX8
3837
  { 979,  3,  1,  4,  202,  0|(1ULL<<MCID::MayLoad), 0x94ULL, nullptr, nullptr, OperandInfo119, -1 ,nullptr },  // Inst #979 = LHAX
3838
  { 980,  3,  1,  4,  202,  0|(1ULL<<MCID::MayLoad), 0x94ULL, nullptr, nullptr, OperandInfo125, -1 ,nullptr },  // Inst #980 = LHAX8
3839
  { 981,  3,  1,  4,  179,  0|(1ULL<<MCID::MayLoad), 0x90ULL, nullptr, nullptr, OperandInfo119, -1 ,nullptr },  // Inst #981 = LHBRX
3840
  { 982,  3,  1,  4,  179,  0|(1ULL<<MCID::MayLoad), 0x90ULL, nullptr, nullptr, OperandInfo125, -1 ,nullptr },  // Inst #982 = LHBRX8
3841
  { 983,  3,  1,  4,  300,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo119, -1 ,nullptr },  // Inst #983 = LHEPX
3842
  { 984,  3,  1,  4,  179,  0|(1ULL<<MCID::MayLoad), 0x10ULL, nullptr, nullptr, OperandInfo41, -1 ,nullptr },  // Inst #984 = LHZ
3843
  { 985,  3,  1,  4,  179,  0|(1ULL<<MCID::MayLoad), 0x10ULL, nullptr, nullptr, OperandInfo120, -1 ,nullptr },  // Inst #985 = LHZ8
3844
  { 986,  3,  1,  4,  179,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, nullptr, OperandInfo48, -1 ,nullptr },  // Inst #986 = LHZCIX
3845
  { 987,  4,  2,  4,  196,  0|(1ULL<<MCID::MayLoad), 0x10ULL, nullptr, nullptr, OperandInfo121, -1 ,nullptr },  // Inst #987 = LHZU
3846
  { 988,  4,  2,  4,  196,  0|(1ULL<<MCID::MayLoad), 0x10ULL, nullptr, nullptr, OperandInfo122, -1 ,nullptr },  // Inst #988 = LHZU8
3847
  { 989,  4,  2,  4,  197,  0|(1ULL<<MCID::MayLoad), 0x90ULL, nullptr, nullptr, OperandInfo123, -1 ,nullptr },  // Inst #989 = LHZUX
3848
  { 990,  4,  2,  4,  197,  0|(1ULL<<MCID::MayLoad), 0x90ULL, nullptr, nullptr, OperandInfo124, -1 ,nullptr },  // Inst #990 = LHZUX8
3849
  { 991,  3,  1,  4,  179,  0|(1ULL<<MCID::MayLoad), 0x90ULL, nullptr, nullptr, OperandInfo119, -1 ,nullptr },  // Inst #991 = LHZX
3850
  { 992,  3,  1,  4,  179,  0|(1ULL<<MCID::MayLoad), 0x90ULL, nullptr, nullptr, OperandInfo125, -1 ,nullptr },  // Inst #992 = LHZX8
3851
  { 993,  3,  1,  4,  179,  0|(1ULL<<MCID::MayLoad), 0x8ULL, nullptr, nullptr, OperandInfo126, -1 ,nullptr },  // Inst #993 = LHZXTLS
3852
  { 994,  3,  1,  4,  179,  0|(1ULL<<MCID::MayLoad), 0x8ULL, nullptr, nullptr, OperandInfo126, -1 ,nullptr },  // Inst #994 = LHZXTLS_
3853
  { 995,  3,  1,  4,  179,  0|(1ULL<<MCID::MayLoad), 0x8ULL, nullptr, nullptr, OperandInfo127, -1 ,nullptr },  // Inst #995 = LHZXTLS_32
3854
  { 996,  2,  1,  4,  116,  0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x8ULL, nullptr, nullptr, OperandInfo139, -1 ,nullptr },  // Inst #996 = LI
3855
  { 997,  2,  1,  4,  116,  0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x8ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr },  // Inst #997 = LI8
3856
  { 998,  2,  1,  4,  116,  0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x8ULL, nullptr, nullptr, OperandInfo139, -1 ,nullptr },  // Inst #998 = LIS
3857
  { 999,  2,  1,  4,  116,  0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x8ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr },  // Inst #999 = LIS8
3858
  { 1000, 3,  1,  4,  188,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo41, -1 ,nullptr },  // Inst #1000 = LMW
3859
  { 1001, 3,  1,  4,  179,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, nullptr, OperandInfo35, -1 ,nullptr },  // Inst #1001 = LSWI
3860
  { 1002, 3,  1,  4,  172,  0|(1ULL<<MCID::MayLoad), 0x90ULL, nullptr, nullptr, OperandInfo140, -1 ,nullptr },  // Inst #1002 = LVEBX
3861
  { 1003, 3,  1,  4,  172,  0|(1ULL<<MCID::MayLoad), 0x90ULL, nullptr, nullptr, OperandInfo140, -1 ,nullptr },  // Inst #1003 = LVEHX
3862
  { 1004, 3,  1,  4,  172,  0|(1ULL<<MCID::MayLoad), 0x90ULL, nullptr, nullptr, OperandInfo140, -1 ,nullptr },  // Inst #1004 = LVEWX
3863
  { 1005, 3,  1,  4,  160,  0, 0x90ULL, nullptr, nullptr, OperandInfo140, -1 ,nullptr },  // Inst #1005 = LVSL
3864
  { 1006, 3,  1,  4,  160,  0, 0x90ULL, nullptr, nullptr, OperandInfo140, -1 ,nullptr },  // Inst #1006 = LVSR
3865
  { 1007, 3,  1,  4,  172,  0|(1ULL<<MCID::MayLoad), 0x90ULL, nullptr, nullptr, OperandInfo140, -1 ,nullptr },  // Inst #1007 = LVX
3866
  { 1008, 3,  1,  4,  172,  0|(1ULL<<MCID::MayLoad), 0x90ULL, nullptr, nullptr, OperandInfo140, -1 ,nullptr },  // Inst #1008 = LVXL
3867
  { 1009, 3,  1,  4,  204,  0|(1ULL<<MCID::MayLoad), 0x14ULL, nullptr, nullptr, OperandInfo120, -1 ,nullptr },  // Inst #1009 = LWA
3868
  { 1010, 3,  1,  4,  180,  0|(1ULL<<MCID::MayLoad), 0x80ULL, nullptr, nullptr, OperandInfo119, -1 ,nullptr },  // Inst #1010 = LWARX
3869
  { 1011, 3,  1,  4,  180,  0|(1ULL<<MCID::MayLoad), 0x80ULL, nullptr, nullptr, OperandInfo119, -1 ,nullptr },  // Inst #1011 = LWARXL
3870
  { 1012, 3,  1,  4,  290,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x80ULL, nullptr, nullptr, OperandInfo35, -1 ,nullptr },  // Inst #1012 = LWAT
3871
  { 1013, 4,  2,  4,  213,  0|(1ULL<<MCID::MayLoad), 0x90ULL, nullptr, nullptr, OperandInfo124, -1 ,nullptr },  // Inst #1013 = LWAUX
3872
  { 1014, 3,  1,  4,  202,  0|(1ULL<<MCID::MayLoad), 0x94ULL, nullptr, nullptr, OperandInfo125, -1 ,nullptr },  // Inst #1014 = LWAX
3873
  { 1015, 3,  1,  4,  202,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x94ULL, nullptr, nullptr, OperandInfo119, -1 ,nullptr },  // Inst #1015 = LWAX_32
3874
  { 1016, 3,  1,  4,  204,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x14ULL, nullptr, nullptr, OperandInfo41, -1 ,nullptr },  // Inst #1016 = LWA_32
3875
  { 1017, 3,  1,  4,  179,  0|(1ULL<<MCID::MayLoad), 0x90ULL, nullptr, nullptr, OperandInfo119, -1 ,nullptr },  // Inst #1017 = LWBRX
3876
  { 1018, 3,  1,  4,  179,  0|(1ULL<<MCID::MayLoad), 0x90ULL, nullptr, nullptr, OperandInfo125, -1 ,nullptr },  // Inst #1018 = LWBRX8
3877
  { 1019, 3,  1,  4,  300,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo119, -1 ,nullptr },  // Inst #1019 = LWEPX
3878
  { 1020, 3,  1,  4,  179,  0|(1ULL<<MCID::MayLoad), 0x10ULL, nullptr, nullptr, OperandInfo41, -1 ,nullptr },  // Inst #1020 = LWZ
3879
  { 1021, 3,  1,  4,  179,  0|(1ULL<<MCID::MayLoad), 0x10ULL, nullptr, nullptr, OperandInfo120, -1 ,nullptr },  // Inst #1021 = LWZ8
3880
  { 1022, 3,  1,  4,  179,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, nullptr, OperandInfo48, -1 ,nullptr },  // Inst #1022 = LWZCIX
3881
  { 1023, 4,  2,  4,  196,  0|(1ULL<<MCID::MayLoad), 0x10ULL, nullptr, nullptr, OperandInfo121, -1 ,nullptr },  // Inst #1023 = LWZU
3882
  { 1024, 4,  2,  4,  196,  0|(1ULL<<MCID::MayLoad), 0x10ULL, nullptr, nullptr, OperandInfo122, -1 ,nullptr },  // Inst #1024 = LWZU8
3883
  { 1025, 4,  2,  4,  197,  0|(1ULL<<MCID::MayLoad), 0x90ULL, nullptr, nullptr, OperandInfo123, -1 ,nullptr },  // Inst #1025 = LWZUX
3884
  { 1026, 4,  2,  4,  197,  0|(1ULL<<MCID::MayLoad), 0x90ULL, nullptr, nullptr, OperandInfo124, -1 ,nullptr },  // Inst #1026 = LWZUX8
3885
  { 1027, 3,  1,  4,  179,  0|(1ULL<<MCID::MayLoad), 0x90ULL, nullptr, nullptr, OperandInfo119, -1 ,nullptr },  // Inst #1027 = LWZX
3886
  { 1028, 3,  1,  4,  179,  0|(1ULL<<MCID::MayLoad), 0x90ULL, nullptr, nullptr, OperandInfo125, -1 ,nullptr },  // Inst #1028 = LWZX8
3887
  { 1029, 3,  1,  4,  179,  0|(1ULL<<MCID::MayLoad), 0x8ULL, nullptr, nullptr, OperandInfo126, -1 ,nullptr },  // Inst #1029 = LWZXTLS
3888
  { 1030, 3,  1,  4,  179,  0|(1ULL<<MCID::MayLoad), 0x8ULL, nullptr, nullptr, OperandInfo126, -1 ,nullptr },  // Inst #1030 = LWZXTLS_
3889
  { 1031, 3,  1,  4,  179,  0|(1ULL<<MCID::MayLoad), 0x8ULL, nullptr, nullptr, OperandInfo127, -1 ,nullptr },  // Inst #1031 = LWZXTLS_32
3890
  { 1032, 3,  1,  4,  0,  0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo141, -1 ,nullptr },  // Inst #1032 = LWZtoc
3891
  { 1033, 3,  1,  4,  173,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo142, -1 ,nullptr },  // Inst #1033 = LXSD
3892
  { 1034, 3,  1,  4,  173,  0|(1ULL<<MCID::MayLoad), 0xc0ULL, ImplicitList2, nullptr, OperandInfo42, -1 ,nullptr },  // Inst #1034 = LXSDX
3893
  { 1035, 3,  1,  4,  173,  0|(1ULL<<MCID::MayLoad), 0xc0ULL, nullptr, nullptr, OperandInfo42, -1 ,nullptr },  // Inst #1035 = LXSIBZX
3894
  { 1036, 3,  1,  4,  173,  0|(1ULL<<MCID::MayLoad), 0xc0ULL, nullptr, nullptr, OperandInfo42, -1 ,nullptr },  // Inst #1036 = LXSIHZX
3895
  { 1037, 3,  1,  4,  207,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0xc0ULL, nullptr, nullptr, OperandInfo42, -1 ,nullptr },  // Inst #1037 = LXSIWAX
3896
  { 1038, 3,  1,  4,  173,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0xc0ULL, nullptr, nullptr, OperandInfo42, -1 ,nullptr },  // Inst #1038 = LXSIWZX
3897
  { 1039, 3,  1,  4,  210,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo142, -1 ,nullptr },  // Inst #1039 = LXSSP
3898
  { 1040, 3,  1,  4,  210,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0xc0ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr },  // Inst #1040 = LXSSPX
3899
  { 1041, 3,  1,  4,  173,  0|(1ULL<<MCID::MayLoad), 0x40ULL, nullptr, nullptr, OperandInfo143, -1 ,nullptr },  // Inst #1041 = LXV
3900
  { 1042, 3,  1,  4,  173,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0xc0ULL, nullptr, nullptr, OperandInfo144, -1 ,nullptr },  // Inst #1042 = LXVB16X
3901
  { 1043, 3,  1,  4,  173,  0|(1ULL<<MCID::MayLoad), 0xc0ULL, ImplicitList2, nullptr, OperandInfo144, -1 ,nullptr },  // Inst #1043 = LXVD2X
3902
  { 1044, 3,  1,  4,  214,  0|(1ULL<<MCID::MayLoad), 0xc0ULL, ImplicitList2, nullptr, OperandInfo144, -1 ,nullptr },  // Inst #1044 = LXVDSX
3903
  { 1045, 3,  1,  4,  214,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0xc0ULL, nullptr, nullptr, OperandInfo144, -1 ,nullptr },  // Inst #1045 = LXVH8X
3904
  { 1046, 3,  1,  4,  171,  0|(1ULL<<MCID::MayLoad), 0xc0ULL, nullptr, nullptr, OperandInfo145, -1 ,nullptr },  // Inst #1046 = LXVL
3905
  { 1047, 3,  1,  4,  171,  0|(1ULL<<MCID::MayLoad), 0xc0ULL, nullptr, nullptr, OperandInfo145, -1 ,nullptr },  // Inst #1047 = LXVLL
3906
  { 1048, 3,  1,  4,  214,  0|(1ULL<<MCID::MayLoad), 0xc0ULL, ImplicitList2, nullptr, OperandInfo144, -1 ,nullptr },  // Inst #1048 = LXVW4X
3907
  { 1049, 3,  1,  4,  173,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0xc0ULL, nullptr, nullptr, OperandInfo144, -1 ,nullptr },  // Inst #1049 = LXVWSX
3908
  { 1050, 3,  1,  4,  173,  0|(1ULL<<MCID::MayLoad), 0xc0ULL, nullptr, nullptr, OperandInfo144, -1 ,nullptr },  // Inst #1050 = LXVX
3909
  { 1051, 4,  1,  4,  144,  0, 0x8ULL, nullptr, nullptr, OperandInfo146, -1 ,nullptr },  // Inst #1051 = MADDHD
3910
  { 1052, 4,  1,  4,  144,  0, 0x8ULL, nullptr, nullptr, OperandInfo146, -1 ,nullptr },  // Inst #1052 = MADDHDU
3911
  { 1053, 4,  1,  4,  144,  0, 0x8ULL, nullptr, nullptr, OperandInfo146, -1 ,nullptr },  // Inst #1053 = MADDLD
3912
  { 1054, 1,  0,  4,  300,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #1054 = MBAR
3913
  { 1055, 2,  1,  4,  118,  0, 0x21ULL, nullptr, nullptr, OperandInfo147, -1 ,nullptr },  // Inst #1055 = MCRF
3914
  { 1056, 2,  1,  4,  247,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo147, -1 ,nullptr },  // Inst #1056 = MCRFS
3915
  { 1057, 1,  1,  4,  119,  0, 0x0ULL, nullptr, nullptr, OperandInfo148, -1 ,nullptr },  // Inst #1057 = MCRXRX
3916
  { 1058, 3,  1,  4,  297,  0, 0x1ULL, nullptr, nullptr, OperandInfo149, -1 ,nullptr },  // Inst #1058 = MFBHRBE
3917
  { 1059, 1,  1,  4,  256,  0|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x20ULL, nullptr, nullptr, OperandInfo150, -1 ,nullptr },  // Inst #1059 = MFCR
3918
  { 1060, 1,  1,  4,  256,  0|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x20ULL, nullptr, nullptr, OperandInfo31, -1 ,nullptr },  // Inst #1060 = MFCR8
3919
  { 1061, 1,  1,  4,  231,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x9ULL, ImplicitList9, nullptr, OperandInfo150, -1 ,nullptr },  // Inst #1061 = MFCTR
3920
  { 1062, 1,  1,  4,  231,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x9ULL, ImplicitList10, nullptr, OperandInfo31, -1 ,nullptr },  // Inst #1062 = MFCTR8
3921
  { 1063, 2,  1,  4,  306,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo151, -1 ,nullptr },  // Inst #1063 = MFDCR
3922
  { 1064, 1,  1,  4,  255,  0, 0x1aULL, ImplicitList2, nullptr, OperandInfo152, -1 ,nullptr },  // Inst #1064 = MFFS
3923
  { 1065, 2,  1,  4,  102,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x1aULL, ImplicitList2, nullptr, OperandInfo106, -1 ,nullptr },  // Inst #1065 = MFFSCDRN
3924
  { 1066, 2,  1,  4,  102,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x1aULL, ImplicitList2, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #1066 = MFFSCDRNI
3925
  { 1067, 1,  1,  4,  255,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x1aULL, ImplicitList2, nullptr, OperandInfo152, -1 ,nullptr },  // Inst #1067 = MFFSCE
3926
  { 1068, 2,  1,  4,  102,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x1aULL, ImplicitList2, nullptr, OperandInfo106, -1 ,nullptr },  // Inst #1068 = MFFSCRN
3927
  { 1069, 2,  1,  4,  102,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x1aULL, ImplicitList2, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #1069 = MFFSCRNI
3928
  { 1070, 1,  1,  4,  255,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x1aULL, ImplicitList2, nullptr, OperandInfo152, -1 ,nullptr },  // Inst #1070 = MFFSL
3929
  { 1071, 1,  1,  4,  255,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList2, ImplicitList23, OperandInfo152, -1 ,nullptr },  // Inst #1071 = MFFSo
3930
  { 1072, 1,  1,  4,  231,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x9ULL, ImplicitList12, nullptr, OperandInfo150, -1 ,nullptr },  // Inst #1072 = MFLR
3931
  { 1073, 1,  1,  4,  231,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x9ULL, ImplicitList14, nullptr, OperandInfo31, -1 ,nullptr },  // Inst #1073 = MFLR8
3932
  { 1074, 1,  1,  4,  232,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo150, -1 ,nullptr },  // Inst #1074 = MFMSR
3933
  { 1075, 2,  1,  4,  127,  0|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x21ULL, nullptr, nullptr, OperandInfo139, -1 ,nullptr },  // Inst #1075 = MFOCRF
3934
  { 1076, 2,  1,  4,  127,  0|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x21ULL, nullptr, nullptr, OperandInfo46, -1 ,nullptr },  // Inst #1076 = MFOCRF8
3935
  { 1077, 2,  1,  4,  228,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo151, -1 ,nullptr },  // Inst #1077 = MFPMR
3936
  { 1078, 2,  1,  4,  231,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo151, -1 ,nullptr },  // Inst #1078 = MFSPR
3937
  { 1079, 2,  1,  4,  231,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr },  // Inst #1079 = MFSPR8
3938
  { 1080, 2,  1,  4,  304,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo139, -1 ,nullptr },  // Inst #1080 = MFSR
3939
  { 1081, 2,  1,  4,  304,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #1081 = MFSRIN
3940
  { 1082, 2,  1,  4,  230,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo151, -1 ,nullptr },  // Inst #1082 = MFTB
3941
  { 1083, 1,  1,  4,  230,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x9ULL, nullptr, nullptr, OperandInfo31, -1 ,nullptr },  // Inst #1083 = MFTB8
3942
  { 1084, 2,  1,  4,  113,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x40ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #1084 = MFVRD
3943
  { 1085, 1,  1,  4,  227,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x9ULL, nullptr, nullptr, OperandInfo150, -1 ,nullptr },  // Inst #1085 = MFVRSAVE
3944
  { 1086, 2,  1,  4,  227,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x9ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #1086 = MFVRSAVEv
3945
  { 1087, 1,  1,  4,  136,  0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #1087 = MFVSCR
3946
  { 1088, 2,  1,  4,  113,  0, 0x40ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #1088 = MFVSRD
3947
  { 1089, 2,  1,  4,  163,  0, 0x40ULL, nullptr, nullptr, OperandInfo158, -1 ,nullptr },  // Inst #1089 = MFVSRLD
3948
  { 1090, 2,  1,  4,  113,  0, 0x40ULL, nullptr, nullptr, OperandInfo159, -1 ,nullptr },  // Inst #1090 = MFVSRWZ
3949
  { 1091, 3,  1,  4,  237,  0, 0x8ULL, nullptr, nullptr, OperandInfo49, -1 ,nullptr },  // Inst #1091 = MODSD
3950
  { 1092, 3,  1,  4,  236,  0, 0x0ULL, nullptr, nullptr, OperandInfo48, -1 ,nullptr },  // Inst #1092 = MODSW
3951
  { 1093, 3,  1,  4,  237,  0, 0x8ULL, nullptr, nullptr, OperandInfo49, -1 ,nullptr },  // Inst #1093 = MODUD
3952
  { 1094, 3,  1,  4,  237,  0, 0x0ULL, nullptr, nullptr, OperandInfo48, -1 ,nullptr },  // Inst #1094 = MODUW
3953
  { 1095, 0,  0,  4,  185,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #1095 = MSGSYNC
3954
  { 1096, 0,  0,  4,  311,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #1096 = MSYNC
3955
  { 1097, 2,  0,  4,  244,  0|(1ULL<<MCID::ExtraDefRegAllocReq), 0x20ULL, nullptr, nullptr, OperandInfo160, -1 ,nullptr },  // Inst #1097 = MTCRF
3956
  { 1098, 2,  0,  4,  244,  0|(1ULL<<MCID::ExtraDefRegAllocReq), 0x20ULL, nullptr, nullptr, OperandInfo161, -1 ,nullptr },  // Inst #1098 = MTCRF8
3957
  { 1099, 1,  0,  4,  226,  0, 0x9ULL, nullptr, ImplicitList9, OperandInfo150, -1 ,nullptr },  // Inst #1099 = MTCTR
3958
  { 1100, 1,  0,  4,  226,  0, 0x9ULL, nullptr, ImplicitList10, OperandInfo31, -1 ,nullptr },  // Inst #1100 = MTCTR8
3959
  { 1101, 1,  0,  4,  226,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x9ULL, nullptr, ImplicitList10, OperandInfo31, -1 ,nullptr },  // Inst #1101 = MTCTR8loop
3960
  { 1102, 1,  0,  4,  226,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x9ULL, nullptr, ImplicitList9, OperandInfo150, -1 ,nullptr },  // Inst #1102 = MTCTRloop
3961
  { 1103, 2,  0,  4,  307,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo151, -1 ,nullptr },  // Inst #1103 = MTDCR
3962
  { 1104, 1,  0,  4,  101,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x1aULL, ImplicitList2, ImplicitList2, OperandInfo2, -1 ,nullptr },  // Inst #1104 = MTFSB0
3963
  { 1105, 1,  0,  4,  101,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x1aULL, ImplicitList2, ImplicitList2, OperandInfo2, -1 ,nullptr },  // Inst #1105 = MTFSB1
3964
  { 1106, 4,  0,  4,  248,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr },  // Inst #1106 = MTFSF
3965
  { 1107, 3,  1,  4,  248,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo163, -1 ,nullptr },  // Inst #1107 = MTFSFI
3966
  { 1108, 3,  1,  4,  248,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo163, -1 ,nullptr },  // Inst #1108 = MTFSFIo
3967
  { 1109, 2,  0,  4,  249,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x1aULL, ImplicitList2, ImplicitList2, OperandInfo164, -1 ,nullptr },  // Inst #1109 = MTFSFb
3968
  { 1110, 4,  0,  4,  248,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr },  // Inst #1110 = MTFSFo
3969
  { 1111, 1,  0,  4,  226,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x9ULL, nullptr, ImplicitList12, OperandInfo150, -1 ,nullptr },  // Inst #1111 = MTLR
3970
  { 1112, 1,  0,  4,  226,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x9ULL, nullptr, ImplicitList14, OperandInfo31, -1 ,nullptr },  // Inst #1112 = MTLR8
3971
  { 1113, 2,  0,  4,  233,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo151, -1 ,nullptr },  // Inst #1113 = MTMSR
3972
  { 1114, 2,  0,  4,  234,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo151, -1 ,nullptr },  // Inst #1114 = MTMSRD
3973
  { 1115, 2,  1,  4,  128,  0|(1ULL<<MCID::ExtraDefRegAllocReq), 0x21ULL, nullptr, nullptr, OperandInfo165, -1 ,nullptr },  // Inst #1115 = MTOCRF
3974
  { 1116, 2,  1,  4,  128,  0|(1ULL<<MCID::ExtraDefRegAllocReq), 0x21ULL, nullptr, nullptr, OperandInfo166, -1 ,nullptr },  // Inst #1116 = MTOCRF8
3975
  { 1117, 2,  0,  4,  229,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo160, -1 ,nullptr },  // Inst #1117 = MTPMR
3976
  { 1118, 2,  0,  4,  235,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo160, -1 ,nullptr },  // Inst #1118 = MTSPR
3977
  { 1119, 2,  0,  4,  235,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo161, -1 ,nullptr },  // Inst #1119 = MTSPR8
3978
  { 1120, 2,  0,  4,  305,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo139, -1 ,nullptr },  // Inst #1120 = MTSR
3979
  { 1121, 2,  0,  4,  305,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #1121 = MTSRIN
3980
  { 1122, 1,  0,  4,  227,  0|(1ULL<<MCID::UnmodeledSideEffects), 0xaULL, nullptr, nullptr, OperandInfo150, -1 ,nullptr },  // Inst #1122 = MTVRSAVE
3981
  { 1123, 2,  1,  4,  227,  0|(1ULL<<MCID::UnmodeledSideEffects), 0xaULL, nullptr, nullptr, OperandInfo167, -1 ,nullptr },  // Inst #1123 = MTVRSAVEv
3982
  { 1124, 1,  0,  4,  137,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #1124 = MTVSCR
3983
  { 1125, 2,  1,  4,  113,  0, 0x40ULL, nullptr, nullptr, OperandInfo168, -1 ,nullptr },  // Inst #1125 = MTVSRD
3984
  { 1126, 3,  1,  4,  97, 0, 0x40ULL, nullptr, nullptr, OperandInfo169, -1 ,nullptr },  // Inst #1126 = MTVSRDD
3985
  { 1127, 2,  1,  4,  113,  0, 0x40ULL, nullptr, nullptr, OperandInfo170, -1 ,nullptr },  // Inst #1127 = MTVSRWA
3986
  { 1128, 2,  1,  4,  163,  0, 0x40ULL, nullptr, nullptr, OperandInfo171, -1 ,nullptr },  // Inst #1128 = MTVSRWS
3987
  { 1129, 2,  1,  4,  113,  0, 0x40ULL, nullptr, nullptr, OperandInfo170, -1 ,nullptr },  // Inst #1129 = MTVSRWZ
3988
  { 1130, 3,  1,  4,  145,  0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, nullptr, OperandInfo49, -1 ,nullptr },  // Inst #1130 = MULHD
3989
  { 1131, 3,  1,  4,  146,  0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, nullptr, OperandInfo49, -1 ,nullptr },  // Inst #1131 = MULHDU
3990
  { 1132, 3,  1,  4,  153,  0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, ImplicitList3, OperandInfo49, -1 ,nullptr },  // Inst #1132 = MULHDUo
3991
  { 1133, 3,  1,  4,  154,  0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, ImplicitList3, OperandInfo49, -1 ,nullptr },  // Inst #1133 = MULHDo
3992
  { 1134, 3,  1,  4,  145,  0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, nullptr, OperandInfo48, -1 ,nullptr },  // Inst #1134 = MULHW
3993
  { 1135, 3,  1,  4,  146,  0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, nullptr, OperandInfo48, -1 ,nullptr },  // Inst #1135 = MULHWU
3994
  { 1136, 3,  1,  4,  153,  0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, ImplicitList3, OperandInfo48, -1 ,nullptr },  // Inst #1136 = MULHWUo
3995
  { 1137, 3,  1,  4,  154,  0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, ImplicitList3, OperandInfo48, -1 ,nullptr },  // Inst #1137 = MULHWo
3996
  { 1138, 3,  1,  4,  144,  0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, nullptr, OperandInfo49, -1 ,nullptr },  // Inst #1138 = MULLD
3997
  { 1139, 3,  1,  4,  155,  0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, ImplicitList3, OperandInfo49, -1 ,nullptr },  // Inst #1139 = MULLDo
3998
  { 1140, 3,  1,  4,  147,  0, 0x8ULL, nullptr, nullptr, OperandInfo35, -1 ,nullptr },  // Inst #1140 = MULLI
3999
  { 1141, 3,  1,  4,  147,  0, 0x8ULL, nullptr, nullptr, OperandInfo34, -1 ,nullptr },  // Inst #1141 = MULLI8
4000
  { 1142, 3,  1,  4,  145,  0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, nullptr, OperandInfo48, -1 ,nullptr },  // Inst #1142 = MULLW
4001
  { 1143, 3,  1,  4,  154,  0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, ImplicitList3, OperandInfo48, -1 ,nullptr },  // Inst #1143 = MULLWo
4002
  { 1144, 0,  0,  4,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, nullptr, ImplicitList12, nullptr, -1 ,nullptr },  // Inst #1144 = MoveGOTtoLR
4003
  { 1145, 0,  0,  4,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, nullptr, ImplicitList12, nullptr, -1 ,nullptr },  // Inst #1145 = MovePCtoLR
4004
  { 1146, 0,  0,  4,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, nullptr, ImplicitList14, nullptr, -1 ,nullptr },  // Inst #1146 = MovePCtoLR8
4005
  { 1147, 3,  1,  4,  116,  0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, nullptr, OperandInfo48, -1 ,nullptr },  // Inst #1147 = NAND
4006
  { 1148, 3,  1,  4,  116,  0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, nullptr, OperandInfo49, -1 ,nullptr },  // Inst #1148 = NAND8
4007
  { 1149, 3,  1,  4,  116,  0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, ImplicitList3, OperandInfo49, -1 ,nullptr },  // Inst #1149 = NAND8o
4008
  { 1150, 3,  1,  4,  116,  0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, ImplicitList3, OperandInfo48, -1 ,nullptr },  // Inst #1150 = NANDo
4009
  { 1151, 0,  0,  4,  297,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #1151 = NAP
4010
  { 1152, 2,  1,  4,  116,  0, 0x8ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #1152 = NEG
4011
  { 1153, 2,  1,  4,  116,  0, 0x8ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #1153 = NEG8
4012
  { 1154, 2,  1,  4,  116,  0, 0x8ULL, nullptr, ImplicitList3, OperandInfo54, -1 ,nullptr },  // Inst #1154 = NEG8o
4013
  { 1155, 2,  1,  4,  116,  0, 0x8ULL, nullptr, ImplicitList3, OperandInfo36, -1 ,nullptr },  // Inst #1155 = NEGo
4014
  { 1156, 0,  0,  4,  116,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #1156 = NOP
4015
  { 1157, 0,  0,  4,  308,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #1157 = NOP_GT_PWR6
4016
  { 1158, 0,  0,  4,  308,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #1158 = NOP_GT_PWR7
4017
  { 1159, 3,  1,  4,  116,  0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, nullptr, OperandInfo48, -1 ,nullptr },  // Inst #1159 = NOR
4018
  { 1160, 3,  1,  4,  116,  0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, nullptr, OperandInfo49, -1 ,nullptr },  // Inst #1160 = NOR8
4019
  { 1161, 3,  1,  4,  116,  0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, ImplicitList3, OperandInfo49, -1 ,nullptr },  // Inst #1161 = NOR8o
4020
  { 1162, 3,  1,  4,  116,  0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, ImplicitList3, OperandInfo48, -1 ,nullptr },  // Inst #1162 = NORo
4021
  { 1163, 3,  1,  4,  116,  0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, nullptr, OperandInfo48, -1 ,nullptr },  // Inst #1163 = OR
4022
  { 1164, 3,  1,  4,  116,  0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, nullptr, OperandInfo49, -1 ,nullptr },  // Inst #1164 = OR8
4023
  { 1165, 3,  1,  4,  116,  0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, ImplicitList3, OperandInfo49, -1 ,nullptr },  // Inst #1165 = OR8o
4024
  { 1166, 3,  1,  4,  116,  0, 0x8ULL, nullptr, nullptr, OperandInfo48, -1 ,nullptr },  // Inst #1166 = ORC
4025
  { 1167, 3,  1,  4,  116,  0, 0x8ULL, nullptr, nullptr, OperandInfo49, -1 ,nullptr },  // Inst #1167 = ORC8
4026
  { 1168, 3,  1,  4,  116,  0, 0x8ULL, nullptr, ImplicitList3, OperandInfo49, -1 ,nullptr },  // Inst #1168 = ORC8o
4027
  { 1169, 3,  1,  4,  116,  0, 0x8ULL, nullptr, ImplicitList3, OperandInfo48, -1 ,nullptr },  // Inst #1169 = ORCo
4028
  { 1170, 3,  1,  4,  116,  0, 0x8ULL, nullptr, nullptr, OperandInfo35, -1 ,nullptr },  // Inst #1170 = ORI
4029
  { 1171, 3,  1,  4,  116,  0, 0x8ULL, nullptr, nullptr, OperandInfo34, -1 ,nullptr },  // Inst #1171 = ORI8
4030
  { 1172, 3,  1,  4,  116,  0, 0x8ULL, nullptr, nullptr, OperandInfo35, -1 ,nullptr },  // Inst #1172 = ORIS
4031
  { 1173, 3,  1,  4,  116,  0, 0x8ULL, nullptr, nullptr, OperandInfo34, -1 ,nullptr },  // Inst #1173 = ORIS8
4032
  { 1174, 3,  1,  4,  116,  0|(1ULL<<MCID::Commutable), 0x8ULL, nullptr, ImplicitList3, OperandInfo48, -1 ,nullptr },  // Inst #1174 = ORo
4033
  { 1175, 2,  1,  4,  115,  0, 0x8ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #1175 = POPCNTB
4034
  { 1176, 2,  1,  4,  110,  0, 0x8ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #1176 = POPCNTD
4035
  { 1177, 2,  1,  4,  110,  0, 0x8ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #1177 = POPCNTW
4036
  { 1178, 1,  1,  4,  0,  0, 0x0ULL, nullptr, nullptr, OperandInfo150, -1 ,nullptr },  // Inst #1178 = PPC32GOT
4037
  { 1179, 2,  2,  4,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #1179 = PPC32PICGOT
4038
  { 1180, 4,  1,  4,  68, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo172, -1 ,nullptr },  // Inst #1180 = QVALIGNI
4039
  { 1181, 4,  1,  4,  68, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo173, -1 ,nullptr },  // Inst #1181 = QVALIGNIb
4040
  { 1182, 4,  1,  4,  68, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo174, -1 ,nullptr },  // Inst #1182 = QVALIGNIs
4041
  { 1183, 3,  1,  4,  68, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo175, -1 ,nullptr },  // Inst #1183 = QVESPLATI
4042
  { 1184, 3,  1,  4,  68, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo176, -1 ,nullptr },  // Inst #1184 = QVESPLATIb
4043
  { 1185, 3,  1,  4,  68, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo177, -1 ,nullptr },  // Inst #1185 = QVESPLATIs
4044
  { 1186, 2,  1,  4,  68, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo178, -1 ,nullptr },  // Inst #1186 = QVFABS
4045
  { 1187, 2,  1,  4,  68, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo179, -1 ,nullptr },  // Inst #1187 = QVFABSs
4046
  { 1188, 3,  1,  4,  21, 0|(1ULL<<MCID::Commutable), 0x0ULL, ImplicitList2, nullptr, OperandInfo180, -1 ,nullptr },  // Inst #1188 = QVFADD
4047
  { 1189, 3,  1,  4,  21, 0|(1ULL<<MCID::Commutable), 0x0ULL, ImplicitList2, nullptr, OperandInfo180, -1 ,nullptr },  // Inst #1189 = QVFADDS
4048
  { 1190, 3,  1,  4,  21, 0|(1ULL<<MCID::Commutable), 0x0ULL, ImplicitList2, nullptr, OperandInfo181, -1 ,nullptr },  // Inst #1190 = QVFADDSs
4049
  { 1191, 2,  1,  4,  21, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo178, -1 ,nullptr },  // Inst #1191 = QVFCFID
4050
  { 1192, 2,  1,  4,  21, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo178, -1 ,nullptr },  // Inst #1192 = QVFCFIDS
4051
  { 1193, 2,  1,  4,  21, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo178, -1 ,nullptr },  // Inst #1193 = QVFCFIDU
4052
  { 1194, 2,  1,  4,  21, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo178, -1 ,nullptr },  // Inst #1194 = QVFCFIDUS
4053
  { 1195, 2,  1,  4,  21, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo182, -1 ,nullptr },  // Inst #1195 = QVFCFIDb
4054
  { 1196, 3,  1,  4,  20, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo180, -1 ,nullptr },  // Inst #1196 = QVFCMPEQ
4055
  { 1197, 3,  1,  4,  20, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo183, -1 ,nullptr },  // Inst #1197 = QVFCMPEQb
4056
  { 1198, 3,  1,  4,  20, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo184, -1 ,nullptr },  // Inst #1198 = QVFCMPEQbs
4057
  { 1199, 3,  1,  4,  20, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo180, -1 ,nullptr },  // Inst #1199 = QVFCMPGT
4058
  { 1200, 3,  1,  4,  20, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo183, -1 ,nullptr },  // Inst #1200 = QVFCMPGTb
4059
  { 1201, 3,  1,  4,  20, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo184, -1 ,nullptr },  // Inst #1201 = QVFCMPGTbs
4060
  { 1202, 3,  1,  4,  20, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo180, -1 ,nullptr },  // Inst #1202 = QVFCMPLT
4061
  { 1203, 3,  1,  4,  20, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo183, -1 ,nullptr },  // Inst #1203 = QVFCMPLTb
4062
  { 1204, 3,  1,  4,  20, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo184, -1 ,nullptr },  // Inst #1204 = QVFCMPLTbs
4063
  { 1205, 3,  1,  4,  68, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo180, -1 ,nullptr },  // Inst #1205 = QVFCPSGN
4064
  { 1206, 3,  1,  4,  68, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo181, -1 ,nullptr },  // Inst #1206 = QVFCPSGNs
4065
  { 1207, 2,  1,  4,  21, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo178, -1 ,nullptr },  // Inst #1207 = QVFCTID
4066
  { 1208, 2,  1,  4,  21, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo178, -1 ,nullptr },  // Inst #1208 = QVFCTIDU
4067
  { 1209, 2,  1,  4,  21, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo178, -1 ,nullptr },  // Inst #1209 = QVFCTIDUZ
4068
  { 1210, 2,  1,  4,  21, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo178, -1 ,nullptr },  // Inst #1210 = QVFCTIDZ
4069
  { 1211, 2,  1,  4,  21, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo182, -1 ,nullptr },  // Inst #1211 = QVFCTIDb
4070
  { 1212, 2,  1,  4,  21, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo178, -1 ,nullptr },  // Inst #1212 = QVFCTIW
4071
  { 1213, 2,  1,  4,  21, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo178, -1 ,nullptr },  // Inst #1213 = QVFCTIWU
4072
  { 1214, 2,  1,  4,  21, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo178, -1 ,nullptr },  // Inst #1214 = QVFCTIWUZ
4073
  { 1215, 2,  1,  4,  21, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo178, -1 ,nullptr },  // Inst #1215 = QVFCTIWZ
4074
  { 1216, 4,  1,  4,  68, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo172, -1 ,nullptr },  // Inst #1216 = QVFLOGICAL
4075
  { 1217, 4,  1,  4,  68, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo173, -1 ,nullptr },  // Inst #1217 = QVFLOGICALb
4076
  { 1218, 4,  1,  4,  68, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo173, -1 ,nullptr },  // Inst #1218 = QVFLOGICALs
4077
  { 1219, 4,  1,  4,  27, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo185, -1 ,nullptr },  // Inst #1219 = QVFMADD
4078
  { 1220, 4,  1,  4,  27, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo185, -1 ,nullptr },  // Inst #1220 = QVFMADDS
4079
  { 1221, 4,  1,  4,  27, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo186, -1 ,nullptr },  // Inst #1221 = QVFMADDSs
4080
  { 1222, 2,  1,  4,  68, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo178, -1 ,nullptr },  // Inst #1222 = QVFMR
4081
  { 1223, 2,  1,  4,  68, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo182, -1 ,nullptr },  // Inst #1223 = QVFMRb
4082
  { 1224, 2,  1,  4,  68, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo179, -1 ,nullptr },  // Inst #1224 = QVFMRs
4083
  { 1225, 4,  1,  4,  27, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo185, -1 ,nullptr },  // Inst #1225 = QVFMSUB
4084
  { 1226, 4,  1,  4,  27, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo185, -1 ,nullptr },  // Inst #1226 = QVFMSUBS
4085
  { 1227, 4,  1,  4,  27, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo186, -1 ,nullptr },  // Inst #1227 = QVFMSUBSs
4086
  { 1228, 3,  1,  4,  21, 0|(1ULL<<MCID::Commutable), 0x0ULL, ImplicitList2, nullptr, OperandInfo180, -1 ,nullptr },  // Inst #1228 = QVFMUL
4087
  { 1229, 3,  1,  4,  21, 0|(1ULL<<MCID::Commutable), 0x0ULL, ImplicitList2, nullptr, OperandInfo180, -1 ,nullptr },  // Inst #1229 = QVFMULS
4088
  { 1230, 3,  1,  4,  21, 0|(1ULL<<MCID::Commutable), 0x0ULL, ImplicitList2, nullptr, OperandInfo181, -1 ,nullptr },  // Inst #1230 = QVFMULSs
4089
  { 1231, 2,  1,  4,  68, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo178, -1 ,nullptr },  // Inst #1231 = QVFNABS
4090
  { 1232, 2,  1,  4,  68, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo179, -1 ,nullptr },  // Inst #1232 = QVFNABSs
4091
  { 1233, 2,  1,  4,  68, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo178, -1 ,nullptr },  // Inst #1233 = QVFNEG
4092
  { 1234, 2,  1,  4,  68, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo179, -1 ,nullptr },  // Inst #1234 = QVFNEGs
4093
  { 1235, 4,  1,  4,  27, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo185, -1 ,nullptr },  // Inst #1235 = QVFNMADD
4094
  { 1236, 4,  1,  4,  27, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo185, -1 ,nullptr },  // Inst #1236 = QVFNMADDS
4095
  { 1237, 4,  1,  4,  27, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo186, -1 ,nullptr },  // Inst #1237 = QVFNMADDSs
4096
  { 1238, 4,  1,  4,  27, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo185, -1 ,nullptr },  // Inst #1238 = QVFNMSUB
4097
  { 1239, 4,  1,  4,  27, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo185, -1 ,nullptr },  // Inst #1239 = QVFNMSUBS
4098
  { 1240, 4,  1,  4,  27, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo186, -1 ,nullptr },  // Inst #1240 = QVFNMSUBSs
4099
  { 1241, 4,  1,  4,  68, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo185, -1 ,nullptr },  // Inst #1241 = QVFPERM
4100
  { 1242, 4,  1,  4,  68, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo187, -1 ,nullptr },  // Inst #1242 = QVFPERMs
4101
  { 1243, 2,  1,  4,  21, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo178, -1 ,nullptr },  // Inst #1243 = QVFRE
4102
  { 1244, 2,  1,  4,  21, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo178, -1 ,nullptr },  // Inst #1244 = QVFRES
4103
  { 1245, 2,  1,  4,  21, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo179, -1 ,nullptr },  // Inst #1245 = QVFRESs
4104
  { 1246, 2,  1,  4,  21, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo178, -1 ,nullptr },  // Inst #1246 = QVFRIM
4105
  { 1247, 2,  1,  4,  21, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo179, -1 ,nullptr },  // Inst #1247 = QVFRIMs
4106
  { 1248, 2,  1,  4,  21, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo178, -1 ,nullptr },  // Inst #1248 = QVFRIN
4107
  { 1249, 2,  1,  4,  21, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo179, -1 ,nullptr },  // Inst #1249 = QVFRINs
4108
  { 1250, 2,  1,  4,  21, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo178, -1 ,nullptr },  // Inst #1250 = QVFRIP
4109
  { 1251, 2,  1,  4,  21, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo179, -1 ,nullptr },  // Inst #1251 = QVFRIPs
4110
  { 1252, 2,  1,  4,  21, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo178, -1 ,nullptr },  // Inst #1252 = QVFRIZ
4111
  { 1253, 2,  1,  4,  21, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo179, -1 ,nullptr },  // Inst #1253 = QVFRIZs
4112
  { 1254, 2,  1,  4,  21, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo178, -1 ,nullptr },  // Inst #1254 = QVFRSP
4113
  { 1255, 2,  1,  4,  21, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo188, -1 ,nullptr },  // Inst #1255 = QVFRSPs
4114
  { 1256, 2,  1,  4,  21, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo178, -1 ,nullptr },  // Inst #1256 = QVFRSQRTE
4115
  { 1257, 2,  1,  4,  21, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo178, -1 ,nullptr },  // Inst #1257 = QVFRSQRTES
4116
  { 1258, 2,  1,  4,  21, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo179, -1 ,nullptr },  // Inst #1258 = QVFRSQRTESs
4117
  { 1259, 4,  1,  4,  68, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo185, -1 ,nullptr },  // Inst #1259 = QVFSEL
4118
  { 1260, 4,  1,  4,  68, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo189, -1 ,nullptr },  // Inst #1260 = QVFSELb
4119
  { 1261, 4,  1,  4,  68, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo190, -1 ,nullptr },  // Inst #1261 = QVFSELbb
4120
  { 1262, 4,  1,  4,  68, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo191, -1 ,nullptr },  // Inst #1262 = QVFSELbs
4121
  { 1263, 3,  1,  4,  21, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo180, -1 ,nullptr },  // Inst #1263 = QVFSUB
4122
  { 1264, 3,  1,  4,  21, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo180, -1 ,nullptr },  // Inst #1264 = QVFSUBS
4123
  { 1265, 3,  1,  4,  21, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo181, -1 ,nullptr },  // Inst #1265 = QVFSUBSs
4124
  { 1266, 3,  1,  4,  20, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo180, -1 ,nullptr },  // Inst #1266 = QVFTSTNAN
4125
  { 1267, 3,  1,  4,  20, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo183, -1 ,nullptr },  // Inst #1267 = QVFTSTNANb
4126
  { 1268, 3,  1,  4,  20, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo184, -1 ,nullptr },  // Inst #1268 = QVFTSTNANbs
4127
  { 1269, 4,  1,  4,  27, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo185, -1 ,nullptr },  // Inst #1269 = QVFXMADD
4128
  { 1270, 4,  1,  4,  27, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo185, -1 ,nullptr },  // Inst #1270 = QVFXMADDS
4129
  { 1271, 3,  1,  4,  21, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo180, -1 ,nullptr },  // Inst #1271 = QVFXMUL
4130
  { 1272, 3,  1,  4,  21, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo180, -1 ,nullptr },  // Inst #1272 = QVFXMULS
4131
  { 1273, 4,  1,  4,  27, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo185, -1 ,nullptr },  // Inst #1273 = QVFXXCPNMADD
4132
  { 1274, 4,  1,  4,  27, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo185, -1 ,nullptr },  // Inst #1274 = QVFXXCPNMADDS
4133
  { 1275, 4,  1,  4,  27, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo185, -1 ,nullptr },  // Inst #1275 = QVFXXMADD
4134
  { 1276, 4,  1,  4,  27, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo185, -1 ,nullptr },  // Inst #1276 = QVFXXMADDS
4135
  { 1277, 4,  1,  4,  27, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo185, -1 ,nullptr },  // Inst #1277 = QVFXXNPMADD
4136
  { 1278, 4,  1,  4,  27, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo185, -1 ,nullptr },  // Inst #1278 = QVFXXNPMADDS
4137
  { 1279, 2,  1,  4,  68, 0|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, ImplicitList2, nullptr, OperandInfo192, -1 ,nullptr },  // Inst #1279 = QVGPCI
4138
  { 1280, 3,  1,  4,  39, 0|(1ULL<<MCID::MayLoad), 0x0ULL, ImplicitList2, nullptr, OperandInfo193, -1 ,nullptr },  // Inst #1280 = QVLFCDUX
4139
  { 1281, 3,  1,  4,  39, 0|(1ULL<<MCID::MayLoad), 0x0ULL, ImplicitList2, nullptr, OperandInfo193, -1 ,nullptr },  // Inst #1281 = QVLFCDUXA
4140
  { 1282, 3,  1,  4,  39, 0|(1ULL<<MCID::MayLoad), 0x0ULL, ImplicitList2, nullptr, OperandInfo193, -1 ,nullptr },  // Inst #1282 = QVLFCDX
4141
  { 1283, 3,  1,  4,  39, 0|(1ULL<<MCID::MayLoad), 0x0ULL, ImplicitList2, nullptr, OperandInfo193, -1 ,nullptr },  // Inst #1283 = QVLFCDXA
4142
  { 1284, 3,  1,  4,  39, 0|(1ULL<<MCID::MayLoad), 0x0ULL, ImplicitList2, nullptr, OperandInfo193, -1 ,nullptr },  // Inst #1284 = QVLFCSUX
4143
  { 1285, 3,  1,  4,  39, 0|(1ULL<<MCID::MayLoad), 0x0ULL, ImplicitList2, nullptr, OperandInfo193, -1 ,nullptr },  // Inst #1285 = QVLFCSUXA
4144
  { 1286, 3,  1,  4,  39, 0|(1ULL<<MCID::MayLoad), 0x0ULL, ImplicitList2, nullptr, OperandInfo193, -1 ,nullptr },  // Inst #1286 = QVLFCSX
4145
  { 1287, 3,  1,  4,  39, 0|(1ULL<<MCID::MayLoad), 0x0ULL, ImplicitList2, nullptr, OperandInfo193, -1 ,nullptr },  // Inst #1287 = QVLFCSXA
4146
  { 1288, 3,  1,  4,  39, 0|(1ULL<<MCID::MayLoad), 0x0ULL, ImplicitList2, nullptr, OperandInfo194, -1 ,nullptr },  // Inst #1288 = QVLFCSXs
4147
  { 1289, 4,  2,  4,  40, 0|(1ULL<<MCID::MayLoad), 0x0ULL, ImplicitList2, nullptr, OperandInfo195, -1 ,nullptr },  // Inst #1289 = QVLFDUX
4148
  { 1290, 3,  1,  4,  39, 0|(1ULL<<MCID::MayLoad), 0x0ULL, ImplicitList2, nullptr, OperandInfo193, -1 ,nullptr },  // Inst #1290 = QVLFDUXA
4149
  { 1291, 3,  1,  4,  39, 0|(1ULL<<MCID::MayLoad), 0x80ULL, ImplicitList2, nullptr, OperandInfo193, -1 ,nullptr },  // Inst #1291 = QVLFDX
4150
  { 1292, 3,  1,  4,  39, 0|(1ULL<<MCID::MayLoad), 0x0ULL, ImplicitList2, nullptr, OperandInfo193, -1 ,nullptr },  // Inst #1292 = QVLFDXA
4151
  { 1293, 3,  1,  4,  39, 0|(1ULL<<MCID::MayLoad), 0x80ULL, ImplicitList2, nullptr, OperandInfo196, -1 ,nullptr },  // Inst #1293 = QVLFDXb
4152
  { 1294, 3,  1,  4,  39, 0|(1ULL<<MCID::MayLoad), 0x0ULL, ImplicitList2, nullptr, OperandInfo193, -1 ,nullptr },  // Inst #1294 = QVLFIWAX
4153
  { 1295, 3,  1,  4,  39, 0|(1ULL<<MCID::MayLoad), 0x0ULL, ImplicitList2, nullptr, OperandInfo193, -1 ,nullptr },  // Inst #1295 = QVLFIWAXA
4154
  { 1296, 3,  1,  4,  39, 0|(1ULL<<MCID::MayLoad), 0x0ULL, ImplicitList2, nullptr, OperandInfo193, -1 ,nullptr },  // Inst #1296 = QVLFIWZX
4155
  { 1297, 3,  1,  4,  39, 0|(1ULL<<MCID::MayLoad), 0x0ULL, ImplicitList2, nullptr, OperandInfo193, -1 ,nullptr },  // Inst #1297 = QVLFIWZXA
4156
  { 1298, 4,  2,  4,  40, 0|(1ULL<<MCID::MayLoad), 0x0ULL, ImplicitList2, nullptr, OperandInfo197, -1 ,nullptr },  // Inst #1298 = QVLFSUX
4157
  { 1299, 3,  1,  4,  39, 0|(1ULL<<MCID::MayLoad), 0x0ULL, ImplicitList2, nullptr, OperandInfo193, -1 ,nullptr },  // Inst #1299 = QVLFSUXA
4158
  { 1300, 3,  1,  4,  39, 0|(1ULL<<MCID::MayLoad), 0x80ULL, ImplicitList2, nullptr, OperandInfo193, -1 ,nullptr },  // Inst #1300 = QVLFSX
4159
  { 1301, 3,  1,  4,  39, 0|(1ULL<<MCID::MayLoad), 0x0ULL, ImplicitList2, nullptr, OperandInfo193, -1 ,nullptr },  // Inst #1301 = QVLFSXA
4160
  { 1302, 3,  1,  4,  39, 0|(1ULL<<MCID::MayLoad), 0x0ULL, ImplicitList2, nullptr, OperandInfo196, -1 ,nullptr },  // Inst #1302 = QVLFSXb
4161
  { 1303, 3,  1,  4,  39, 0|(1ULL<<MCID::MayLoad), 0x80ULL, ImplicitList2, nullptr, OperandInfo194, -1 ,nullptr },  // Inst #1303 = QVLFSXs
4162
  { 1304, 3,  1,  4,  39, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo193, -1 ,nullptr },  // Inst #1304 = QVLPCLDX
4163
  { 1305, 3,  1,  4,  39, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo193, -1 ,nullptr },  // Inst #1305 = QVLPCLSX
4164
  { 1306, 2,  1,  4,  39, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo198, -1 ,nullptr },  // Inst #1306 = QVLPCLSXint
4165
  { 1307, 3,  1,  4,  39, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo193, -1 ,nullptr },  // Inst #1307 = QVLPCRDX
4166
  { 1308, 3,  1,  4,  39, 0, 0x0ULL, ImplicitList2, nullptr, OperandInfo193, -1 ,nullptr },  // Inst #1308 = QVLPCRSX
4167
  { 1309, 3,  0,  4,  69, 0|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList2, nullptr, OperandInfo193, -1 ,nullptr },  // Inst #1309 = QVSTFCDUX
4168
  { 1310, 3,  0,  4,  69, 0|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList2, nullptr, OperandInfo193, -1 ,nullptr },  // Inst #1310 = QVSTFCDUXA
4169
  { 1311, 3,  0,  4,  69, 0|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList2, nullptr, OperandInfo193, -1 ,nullptr },  // Inst #1311 = QVSTFCDUXI
4170
  { 1312, 3,  0,  4,  69, 0|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList2, nullptr, OperandInfo193, -1 ,nullptr },  // Inst #1312 = QVSTFCDUXIA
4171
  { 1313, 3,  0,  4,  69, 0|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList2, nullptr, OperandInfo193, -1 ,nullptr },  // Inst #1313 = QVSTFCDX
4172
  { 1314, 3,  0,  4,  69, 0|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList2, nullptr, OperandInfo193, -1 ,nullptr },  // Inst #1314 = QVSTFCDXA
4173
  { 1315, 3,  0,  4,  69, 0|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList2, nullptr, OperandInfo193, -1 ,nullptr },  // Inst #1315 = QVSTFCDXI
4174
  { 1316, 3,  0,  4,  69, 0|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList2, nullptr, OperandInfo193, -1 ,nullptr },  // Inst #1316 = QVSTFCDXIA
4175
  { 1317, 3,  0,  4,  69, 0|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList2, nullptr, OperandInfo193, -1 ,nullptr },  // Inst #1317 = QVSTFCSUX
4176
  { 1318, 3,  0,  4,  69, 0|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList2, nullptr, OperandInfo193, -1 ,nullptr },  // Inst #1318 = QVSTFCSUXA
4177
  { 1319, 3,  0,  4,  69, 0|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList2, nullptr, OperandInfo193, -1 ,nullptr },  // Inst #1319 = QVSTFCSUXI
4178
  { 1320, 3,  0,  4,  69, 0|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList2, nullptr, OperandInfo193, -1 ,nullptr },  // Inst #1320 = QVSTFCSUXIA
4179
  { 1321, 3,  0,  4,  69, 0|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList2, nullptr, OperandInfo193, -1 ,nullptr },  // Inst #1321 = QVSTFCSX
4180
  { 1322, 3,  0,  4,  69, 0|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList2, nullptr, OperandInfo193, -1 ,nullptr },  // Inst #1322 = QVSTFCSXA
4181
  { 1323, 3,  0,  4,  69, 0|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList2, nullptr, OperandInfo193, -1 ,nullptr },  // Inst #1323 = QVSTFCSXI
4182
  { 1324, 3,  0,  4,  69, 0|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList2, nullptr, OperandInfo193, -1 ,nullptr },  // Inst #1324 = QVSTFCSXIA
4183
  { 1325, 3,  0,  4,  69, 0|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList2, nullptr, OperandInfo194, -1 ,nullptr },  // Inst #1325 = QVSTFCSXs
4184
  { 1326, 4,  1,  4,  70, 0|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList2, nullptr, OperandInfo199, -1 ,nullptr },  // Inst #1326 = QVSTFDUX
4185
  { 1327, 3,  0,  4,  69, 0|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList2, nullptr, OperandInfo193, -1 ,nullptr },  // Inst #1327 = QVSTFDUXA
4186
  { 1328, 3,  0,  4,  69, 0|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList2, nullptr, OperandInfo193, -1 ,nullptr },  // Inst #1328 = QVSTFDUXI
4187
  { 1329, 3,  0,  4,  69, 0|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList2, nullptr, OperandInfo193, -1 ,nullptr },  // Inst #1329 = QVSTFDUXIA
4188
  { 1330, 3,  0,  4,  69, 0|(1ULL<<MCID::MayStore), 0x80ULL, ImplicitList2, nullptr, OperandInfo193, -1 ,nullptr },  // Inst #1330 = QVSTFDX
4189
  { 1331, 3,  0,  4,  69, 0|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList2, nullptr, OperandInfo193, -1 ,nullptr },  // Inst #1331 = QVSTFDXA
4190
  { 1332, 3,  0,  4,  69, 0|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList2, nullptr, OperandInfo193, -1 ,nullptr },  // Inst #1332 = QVSTFDXI
4191
  { 1333, 3,  0,  4,  69, 0|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList2, nullptr, OperandInfo193, -1 ,nullptr },  // Inst #1333 = QVSTFDXIA
4192
  { 1334, 3,  0,  4,  69, 0|(1ULL<<MCID::MayStore), 0x80ULL, ImplicitList2, nullptr, OperandInfo196, -1 ,nullptr },  // Inst #1334 = QVSTFDXb
4193
  { 1335, 3,  0,  4,  69, 0|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList2, nullptr, OperandInfo193, -1 ,nullptr },  // Inst #1335 = QVSTFIWX
4194
  { 1336, 3,  0,  4,  69, 0|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList2, nullptr, OperandInfo193, -1 ,nullptr },  // Inst #1336 = QVSTFIWXA
4195
  { 1337, 4,  1,  4,  70, 0|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList2, nullptr, OperandInfo200, -1 ,nullptr },  // Inst #1337 = QVSTFSUX
4196
  { 1338, 3,  0,  4,  69, 0|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList2, nullptr, OperandInfo193, -1 ,nullptr },  // Inst #1338 = QVSTFSUXA
4197
  { 1339, 3,  0,  4,  69, 0|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList2, nullptr, OperandInfo193, -1 ,nullptr },  // Inst #1339 = QVSTFSUXI
4198
  { 1340, 3,  0,  4,  69, 0|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList2, nullptr, OperandInfo193, -1 ,nullptr },  // Inst #1340 = QVSTFSUXIA
4199
  { 1341, 4,  1,  4,  70, 0|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList2, nullptr, OperandInfo199, -1 ,nullptr },  // Inst #1341 = QVSTFSUXs
4200
  { 1342, 3,  0,  4,  69, 0|(1ULL<<MCID::MayStore), 0x80ULL, ImplicitList2, nullptr, OperandInfo193, -1 ,nullptr },  // Inst #1342 = QVSTFSX
4201
  { 1343, 3,  0,  4,  69, 0|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList2, nullptr, OperandInfo193, -1 ,nullptr },  // Inst #1343 = QVSTFSXA
4202
  { 1344, 3,  0,  4,  69, 0|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList2, nullptr, OperandInfo193, -1 ,nullptr },  // Inst #1344 = QVSTFSXI
4203
  { 1345, 3,  0,  4,  69, 0|(1ULL<<MCID::MayStore), 0x0ULL, ImplicitList2, nullptr, OperandInfo193, -1 ,nullptr },  // Inst #1345 = QVSTFSXIA
4204
  { 1346, 3,  0,  4,  69, 0|(1ULL<<MCID::MayStore), 0x80ULL, ImplicitList2, nullptr, OperandInfo194, -1 ,nullptr },  // Inst #1346 = QVSTFSXs
4205
  { 1347, 3,  1,  4,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo201, -1 ,nullptr },  // Inst #1347 = RESTORE_CR
4206
  { 1348, 3,  1,  4,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo202, -1 ,nullptr },  // Inst #1348 = RESTORE_CRBIT
4207
  { 1349, 3,  1,  4,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo203, -1 ,nullptr },  // Inst #1349 = RESTORE_VRSAVE
4208
  { 1350, 0,  0,  4,  297,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #1350 = RFCI
4209
  { 1351, 0,  0,  4,  297,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #1351 = RFDI
4210
  { 1352, 1,  0,  4,  121,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #1352 = RFEBB
4211
  { 1353, 0,  0,  4,  298,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #1353 = RFI
4212
  { 1354, 0,  0,  4,  299,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #1354 = RFID
4213
  { 1355, 0,  0,  4,  297,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #1355 = RFMCI
4214
  { 1356, 4,  1,  4,  124,  0, 0x8ULL, nullptr, nullptr, OperandInfo204, -1 ,nullptr },  // Inst #1356 = RLDCL
4215
  { 1357, 4,  1,  4,  250,  0, 0x8ULL, nullptr, ImplicitList3, OperandInfo204, -1 ,nullptr },  // Inst #1357 = RLDCLo
4216
  { 1358, 4,  1,  4,  124,  0, 0x8ULL, nullptr, nullptr, OperandInfo204, -1 ,nullptr },  // Inst #1358 = RLDCR
4217
  { 1359, 4,  1,  4,  250,  0, 0x8ULL, nullptr, ImplicitList3, OperandInfo204, -1 ,nullptr },  // Inst #1359 = RLDCRo
4218
  { 1360, 4,  1,  4,  112,  0, 0x8ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr },  // Inst #1360 = RLDIC
4219
  { 1361, 4,  1,  4,  126,  0, 0x8ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr },  // Inst #1361 = RLDICL
4220
  { 1362, 4,  1,  4,  126,  0, 0x8ULL, nullptr, nullptr, OperandInfo33, -1 ,nullptr },  // Inst #1362 = RLDICL_32
4221
  { 1363, 4,  1,  4,  126,  0, 0x8ULL, nullptr, nullptr, OperandInfo205, -1 ,nullptr },  // Inst #1363 = RLDICL_32_64
4222
  { 1364, 4,  1,  4,  251,  0, 0x8ULL, nullptr, ImplicitList3, OperandInfo33, -1 ,nullptr },  // Inst #1364 = RLDICL_32o
4223
  { 1365, 4,  1,  4,  251,  0, 0x8ULL, nullptr, ImplicitList3, OperandInfo32, -1 ,nullptr },  // Inst #1365 = RLDICLo
4224
  { 1366, 4,  1,  4,  126,  0, 0x8ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr },  // Inst #1366 = RLDICR
4225
  { 1367, 4,  1,  4,  126,  0, 0x8ULL, nullptr, nullptr, OperandInfo33, -1 ,nullptr },  // Inst #1367 = RLDICR_32
4226
  { 1368, 4,  1,  4,  251,  0, 0x8ULL, nullptr, ImplicitList3, OperandInfo32, -1 ,nullptr },  // Inst #1368 = RLDICRo
4227
  { 1369, 4,  1,  4,  257,  0, 0x8ULL, nullptr, ImplicitList3, OperandInfo32, -1 ,nullptr },  // Inst #1369 = RLDICo
4228
  { 1370, 5,  1,  4,  126,  0, 0x8ULL, nullptr, nullptr, OperandInfo206, -1 ,nullptr },  // Inst #1370 = RLDIMI
4229
  { 1371, 5,  1,  4,  251,  0, 0x8ULL, nullptr, ImplicitList3, OperandInfo206, -1 ,nullptr },  // Inst #1371 = RLDIMIo
4230
  { 1372, 6,  1,  4,  125,  0|(1ULL<<MCID::Commutable), 0xcULL, nullptr, nullptr, OperandInfo207, -1 ,nullptr },  // Inst #1372 = RLWIMI
4231
  { 1373, 6,  1,  4,  125,  0, 0xcULL, nullptr, nullptr, OperandInfo208, -1 ,nullptr },  // Inst #1373 = RLWIMI8
4232
  { 1374, 6,  1,  4,  252,  0, 0xcULL, nullptr, ImplicitList3, OperandInfo208, -1 ,nullptr },  // Inst #1374 = RLWIMI8o
4233
  { 1375, 6,  1,  4,  252,  0|(1ULL<<MCID::Commutable), 0xcULL, nullptr, ImplicitList3, OperandInfo207, -1 ,nullptr },  // Inst #1375 = RLWIMIo
4234
  { 1376, 5,  1,  4,  130,  0, 0x8ULL, nullptr, nullptr, OperandInfo209, -1 ,nullptr },  // Inst #1376 = RLWINM
4235
  { 1377, 5,  1,  4,  130,  0, 0x8ULL, nullptr, nullptr, OperandInfo210, -1 ,nullptr },  // Inst #1377 = RLWINM8
4236
  { 1378, 5,  1,  4,  253,  0, 0x8ULL, nullptr, ImplicitList3, OperandInfo210, -1 ,nullptr },  // Inst #1378 = RLWINM8o
4237
  { 1379, 5,  1,  4,  253,  0, 0xcULL, nullptr, ImplicitList3, OperandInfo209, -1 ,nullptr },  // Inst #1379 = RLWINMo
4238
  { 1380, 5,  1,  4,  130,  0, 0x8ULL, nullptr, nullptr, OperandInfo211, -1 ,nullptr },  // Inst #1380 = RLWNM
4239
  { 1381, 5,  1,  4,  130,  0, 0x8ULL, nullptr, nullptr, OperandInfo212, -1 ,nullptr },  // Inst #1381 = RLWNM8
4240
  { 1382, 5,  1,  4,  253,  0, 0x8ULL, nullptr, ImplicitList3, OperandInfo212, -1 ,nullptr },  // Inst #1382 = RLWNM8o
4241
  { 1383, 5,  1,  4,  253,  0, 0x8ULL, nullptr, ImplicitList3, OperandInfo211, -1 ,nullptr },  // Inst #1383 = RLWNMo
4242
  { 1384, 2,  2,  4,  0,  0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #1384 = ReadTB
4243
  { 1385, 1,  0,  4,  297,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr },  // Inst #1385 = SC
4244
  { 1386, 5,  1,  4,  0,  0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1386 = SELECT_CC_F16
4245
  { 1387, 5,  1,  4,  0,  0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1387 = SELECT_CC_F4
4246
  { 1388, 5,  1,  4,  0,  0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL, nullptr, nullptr, OperandInfo215, -1 ,nullptr },  // Inst #1388 = SELECT_CC_F8
4247
  { 1389, 5,  1,  4,  0,  0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL, nullptr, nullptr, OperandInfo216, -1 ,nullptr },  // Inst #1389 = SELECT_CC_I4
4248
  { 1390, 5,  1,  4,  0,  0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL, nullptr, nullptr, OperandInfo217, -1 ,nullptr },  // Inst #1390 = SELECT_CC_I8
4249
  { 1391, 5,  1,  4,  0,  0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList2, nullptr, OperandInfo218, -1 ,nullptr },  // Inst #1391 = SELECT_CC_QBRC
4250
  { 1392, 5,  1,  4,  0,  0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList2, nullptr, OperandInfo219, -1 ,nullptr },  // Inst #1392 = SELECT_CC_QFRC
4251
  { 1393, 5,  1,  4,  0,  0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList2, nullptr, OperandInfo220, -1 ,nullptr },  // Inst #1393 = SELECT_CC_QSRC
4252
  { 1394, 5,  1,  4,  0,  0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo221, -1 ,nullptr },  // Inst #1394 = SELECT_CC_SPE
4253
  { 1395, 5,  1,  4,  0,  0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo222, -1 ,nullptr },  // Inst #1395 = SELECT_CC_SPE4
4254
  { 1396, 5,  1,  4,  0,  0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1396 = SELECT_CC_VRRC
4255
  { 1397, 5,  1,  4,  0,  0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL, nullptr, nullptr, OperandInfo215, -1 ,nullptr },  // Inst #1397 = SELECT_CC_VSFRC
4256
  { 1398, 5,  1,  4,  0,  0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL, nullptr, nullptr, OperandInfo223, -1 ,nullptr },  // Inst #1398 = SELECT_CC_VSRC
4257
  { 1399, 5,  1,  4,  0,  0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1399 = SELECT_CC_VSSRC
4258
  { 1400, 4,  1,  4,  0,  0|(1ULL<<MCID::UsesCustomInserter), 0x2ULL, nullptr, nullptr, OperandInfo224, -1 ,nullptr },  // Inst #1400 = SELECT_F16
4259
  { 1401, 4,  1,  4,  0,  0|(1ULL<<MCID::UsesCustomInserter), 0x2ULL, nullptr, nullptr, OperandInfo225, -1 ,nullptr },  // Inst #1401 = SELECT_F4
4260
  { 1402, 4,  1,  4,  0,  0|(1ULL<<MCID::UsesCustomInserter), 0x2ULL, nullptr, nullptr, OperandInfo226, -1 ,nullptr },  // Inst #1402 = SELECT_F8
4261
  { 1403, 4,  1,  4,  0,  0|(1ULL<<MCID::UsesCustomInserter), 0x2ULL, nullptr, nullptr, OperandInfo227, -1 ,nullptr },  // Inst #1403 = SELECT_I4
4262
  { 1404, 4,  1,  4,  0,  0|(1ULL<<MCID::UsesCustomInserter), 0x2ULL, nullptr, nullptr, OperandInfo228, -1 ,nullptr },  // Inst #1404 = SELECT_I8
4263
  { 1405, 4,  1,  4,  0,  0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList2, nullptr, OperandInfo229, -1 ,nullptr },  // Inst #1405 = SELECT_QBRC
4264
  { 1406, 4,  1,  4,  0,  0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList2, nullptr, OperandInfo230, -1 ,nullptr },  // Inst #1406 = SELECT_QFRC
4265
  { 1407, 4,  1,  4,  0,  0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList2, nullptr, OperandInfo231, -1 ,nullptr },  // Inst #1407 = SELECT_QSRC
4266
  { 1408, 4,  1,  4,  0,  0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, nullptr, OperandInfo232, -1 ,nullptr },  // Inst #1408 = SELECT_SPE
4267
  { 1409, 4,  1,  4,  0,  0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, nullptr, OperandInfo233, -1 ,nullptr },  // Inst #1409 = SELECT_SPE4
4268
  { 1410, 4,  1,  4,  0,  0|(1ULL<<MCID::UsesCustomInserter), 0x2ULL, nullptr, nullptr, OperandInfo224, -1 ,nullptr },  // Inst #1410 = SELECT_VRRC
4269
  { 1411, 4,  1,  4,  0,  0|(1ULL<<MCID::UsesCustomInserter), 0x2ULL, nullptr, nullptr, OperandInfo226, -1 ,nullptr },  // Inst #1411 = SELECT_VSFRC
4270
  { 1412, 4,  1,  4,  0,  0|(1ULL<<MCID::UsesCustomInserter), 0x2ULL, nullptr, nullptr, OperandInfo234, -1 ,nullptr },  // Inst #1412 = SELECT_VSRC
4271
  { 1413, 4,  1,  4,  0,  0|(1ULL<<MCID::UsesCustomInserter), 0x2ULL, nullptr, nullptr, OperandInfo225, -1 ,nullptr },  // Inst #1413 = SELECT_VSSRC
4272
  { 1414, 2,  1,  4,  110,  0, 0x8ULL, nullptr, nullptr, OperandInfo235, -1 ,nullptr },  // Inst #1414 = SETB
4273
  { 1415, 0,  0,  4,  190,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #1415 = SLBIA
4274
  { 1416, 1,  0,  4,  191,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo150, -1 ,nullptr },  // Inst #1416 = SLBIE
4275
  { 1417, 2,  0,  4,  220,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #1417 = SLBIEG
4276
  { 1418, 2,  1,  4,  192,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #1418 = SLBMFEE
4277
  { 1419, 2,  1,  4,  193,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #1419 = SLBMFEV
4278
  { 1420, 2,  0,  4,  194,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #1420 = SLBMTE
4279
  { 1421, 0,  0,  4,  312,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #1421 = SLBSYNC
4280
  { 1422, 3,  1,  4,  111,  0, 0x8ULL, nullptr, nullptr, OperandInfo236, -1 ,nullptr },  // Inst #1422 = SLD
4281
  { 1423, 3,  1,  4,  258,  0, 0x8ULL, nullptr, ImplicitList3, OperandInfo236, -1 ,nullptr },  // Inst #1423 = SLDo
4282
  { 1424, 3,  1,  4,  130,  0, 0x8ULL, nullptr, nullptr, OperandInfo48, -1 ,nullptr },  // Inst #1424 = SLW
4283
  { 1425, 3,  1,  4,  130,  0, 0x8ULL, nullptr, nullptr, OperandInfo49, -1 ,nullptr },  // Inst #1425 = SLW8
4284
  { 1426, 3,  1,  4,  253,  0, 0x8ULL, nullptr, ImplicitList3, OperandInfo49, -1 ,nullptr },  // Inst #1426 = SLW8o
4285
  { 1427, 3,  1,  4,  253,  0, 0x8ULL, nullptr, ImplicitList3, OperandInfo48, -1 ,nullptr },  // Inst #1427 = SLWo
4286
  { 1428, 3,  1,  4,  13, 0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo237, -1 ,nullptr },  // Inst #1428 = SPELWZ
4287
  { 1429, 3,  1,  4,  13, 0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo238, -1 ,nullptr },  // Inst #1429 = SPELWZX
4288
  { 1430, 3,  0,  4,  24, 0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo237, -1 ,nullptr },  // Inst #1430 = SPESTW
4289
  { 1431, 3,  0,  4,  24, 0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo238, -1 ,nullptr },  // Inst #1431 = SPESTWX
4290
  { 1432, 3,  0,  4,  0,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo201, -1 ,nullptr },  // Inst #1432 = SPILL_CR
4291
  { 1433, 3,  0,  4,  0,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo202, -1 ,nullptr },  // Inst #1433 = SPILL_CRBIT
4292
  { 1434, 3,  0,  4,  0,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo203, -1 ,nullptr },  // Inst #1434 = SPILL_VRSAVE
4293
  { 1435, 3,  1,  4,  111,  0, 0x8ULL, nullptr, ImplicitList4, OperandInfo236, -1 ,nullptr },  // Inst #1435 = SRAD
4294
  { 1436, 3,  1,  4,  112,  0, 0x8ULL, nullptr, ImplicitList4, OperandInfo34, -1 ,nullptr },  // Inst #1436 = SRADI
4295
  { 1437, 3,  1,  4,  112,  0, 0x8ULL, nullptr, ImplicitList4, OperandInfo35, -1 ,nullptr },  // Inst #1437 = SRADI_32
4296
  { 1438, 3,  1,  4,  257,  0, 0x8ULL, nullptr, ImplicitList5, OperandInfo34, -1 ,nullptr },  // Inst #1438 = SRADIo
4297
  { 1439, 3,  1,  4,  258,  0, 0x8ULL, nullptr, ImplicitList5, OperandInfo236, -1 ,nullptr },  // Inst #1439 = SRADo
4298
  { 1440, 3,  1,  4,  132,  0, 0x8ULL, nullptr, ImplicitList4, OperandInfo48, -1 ,nullptr },  // Inst #1440 = SRAW
4299
  { 1441, 3,  1,  4,  132,  0, 0x8ULL, nullptr, ImplicitList4, OperandInfo35, -1 ,nullptr },  // Inst #1441 = SRAWI
4300
  { 1442, 3,  1,  4,  254,  0, 0x8ULL, nullptr, ImplicitList5, OperandInfo35, -1 ,nullptr },  // Inst #1442 = SRAWIo
4301
  { 1443, 3,  1,  4,  254,  0, 0x8ULL, nullptr, ImplicitList5, OperandInfo48, -1 ,nullptr },  // Inst #1443 = SRAWo
4302
  { 1444, 3,  1,  4,  111,  0, 0x8ULL, nullptr, nullptr, OperandInfo236, -1 ,nullptr },  // Inst #1444 = SRD
4303
  { 1445, 3,  1,  4,  258,  0, 0x8ULL, nullptr, ImplicitList3, OperandInfo236, -1 ,nullptr },  // Inst #1445 = SRDo
4304
  { 1446, 3,  1,  4,  130,  0, 0x8ULL, nullptr, nullptr, OperandInfo48, -1 ,nullptr },  // Inst #1446 = SRW
4305
  { 1447, 3,  1,  4,  130,  0, 0x8ULL, nullptr, nullptr, OperandInfo49, -1 ,nullptr },  // Inst #1447 = SRW8
4306
  { 1448, 3,  1,  4,  253,  0, 0x8ULL, nullptr, ImplicitList3, OperandInfo49, -1 ,nullptr },  // Inst #1448 = SRW8o
4307
  { 1449, 3,  1,  4,  253,  0, 0x8ULL, nullptr, ImplicitList3, OperandInfo48, -1 ,nullptr },  // Inst #1449 = SRWo
4308
  { 1450, 3,  0,  4,  216,  0|(1ULL<<MCID::MayStore), 0x10ULL, nullptr, nullptr, OperandInfo41, -1 ,nullptr },  // Inst #1450 = STB
4309
  { 1451, 3,  0,  4,  216,  0|(1ULL<<MCID::MayStore), 0x10ULL, nullptr, nullptr, OperandInfo120, -1 ,nullptr },  // Inst #1451 = STB8
4310
  { 1452, 3,  0,  4,  219,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, nullptr, OperandInfo48, -1 ,nullptr },  // Inst #1452 = STBCIX
4311
  { 1453, 3,  0,  4,  199,  0|(1ULL<<MCID::MayStore), 0x80ULL, nullptr, ImplicitList3, OperandInfo119, -1 ,nullptr },  // Inst #1453 = STBCX
4312
  { 1454, 3,  0,  4,  301,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo119, -1 ,nullptr },  // Inst #1454 = STBEPX
4313
  { 1455, 4,  1,  4,  278,  0|(1ULL<<MCID::MayStore), 0x10ULL, nullptr, nullptr, OperandInfo239, -1 ,nullptr },  // Inst #1455 = STBU
4314
  { 1456, 4,  1,  4,  278,  0|(1ULL<<MCID::MayStore), 0x10ULL, nullptr, nullptr, OperandInfo240, -1 ,nullptr },  // Inst #1456 = STBU8
4315
  { 1457, 4,  1,  4,  278,  0|(1ULL<<MCID::MayStore), 0x94ULL, nullptr, nullptr, OperandInfo241, -1 ,nullptr },  // Inst #1457 = STBUX
4316
  { 1458, 4,  1,  4,  278,  0|(1ULL<<MCID::MayStore), 0x94ULL, nullptr, nullptr, OperandInfo242, -1 ,nullptr },  // Inst #1458 = STBUX8
4317
  { 1459, 3,  0,  4,  216,  0|(1ULL<<MCID::MayStore), 0x94ULL, nullptr, nullptr, OperandInfo119, -1 ,nullptr },  // Inst #1459 = STBX
4318
  { 1460, 3,  0,  4,  216,  0|(1ULL<<MCID::MayStore), 0x94ULL, nullptr, nullptr, OperandInfo125, -1 ,nullptr },  // Inst #1460 = STBX8
4319
  { 1461, 3,  0,  4,  216,  0|(1ULL<<MCID::MayStore), 0xcULL, nullptr, nullptr, OperandInfo126, -1 ,nullptr },  // Inst #1461 = STBXTLS
4320
  { 1462, 3,  0,  4,  216,  0|(1ULL<<MCID::MayStore), 0xcULL, nullptr, nullptr, OperandInfo126, -1 ,nullptr },  // Inst #1462 = STBXTLS_
4321
  { 1463, 3,  0,  4,  216,  0|(1ULL<<MCID::MayStore), 0xcULL, nullptr, nullptr, OperandInfo127, -1 ,nullptr },  // Inst #1463 = STBXTLS_32
4322
  { 1464, 3,  0,  4,  218,  0|(1ULL<<MCID::MayStore), 0x10ULL, nullptr, nullptr, OperandInfo120, -1 ,nullptr },  // Inst #1464 = STD
4323
  { 1465, 3,  0,  4,  291,  0|(1ULL<<MCID::MayStore), 0x80ULL, nullptr, nullptr, OperandInfo34, -1 ,nullptr },  // Inst #1465 = STDAT
4324
  { 1466, 3,  0,  4,  216,  0|(1ULL<<MCID::MayStore), 0x94ULL, nullptr, nullptr, OperandInfo125, -1 ,nullptr },  // Inst #1466 = STDBRX
4325
  { 1467, 3,  0,  4,  219,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, nullptr, OperandInfo48, -1 ,nullptr },  // Inst #1467 = STDCIX
4326
  { 1468, 3,  0,  4,  200,  0|(1ULL<<MCID::MayStore), 0x80ULL, nullptr, ImplicitList3, OperandInfo125, -1 ,nullptr },  // Inst #1468 = STDCX
4327
  { 1469, 4,  1,  4,  279,  0|(1ULL<<MCID::MayStore), 0x10ULL, nullptr, nullptr, OperandInfo240, -1 ,nullptr },  // Inst #1469 = STDU
4328
  { 1470, 4,  1,  4,  280,  0|(1ULL<<MCID::MayStore), 0x94ULL, nullptr, nullptr, OperandInfo242, -1 ,nullptr },  // Inst #1470 = STDUX
4329
  { 1471, 3,  0,  4,  218,  0|(1ULL<<MCID::MayStore), 0x94ULL, nullptr, nullptr, OperandInfo125, -1 ,nullptr },  // Inst #1471 = STDX
4330
  { 1472, 3,  0,  4,  218,  0|(1ULL<<MCID::MayStore), 0xcULL, nullptr, nullptr, OperandInfo126, -1 ,nullptr },  // Inst #1472 = STDXTLS
4331
  { 1473, 3,  0,  4,  218,  0|(1ULL<<MCID::MayStore), 0xcULL, nullptr, nullptr, OperandInfo126, -1 ,nullptr },  // Inst #1473 = STDXTLS_
4332
  { 1474, 3,  0,  4,  215,  0|(1ULL<<MCID::MayStore), 0x10ULL, nullptr, nullptr, OperandInfo131, -1 ,nullptr },  // Inst #1474 = STFD
4333
  { 1475, 3,  0,  4,  303,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, nullptr, OperandInfo132, -1 ,nullptr },  // Inst #1475 = STFDEPX
4334
  { 1476, 4,  1,  4,  277,  0|(1ULL<<MCID::MayStore), 0x10ULL, nullptr, nullptr, OperandInfo243, -1 ,nullptr },  // Inst #1476 = STFDU
4335
  { 1477, 4,  1,  4,  277,  0|(1ULL<<MCID::MayStore), 0x94ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr },  // Inst #1477 = STFDUX
4336
  { 1478, 3,  0,  4,  215,  0|(1ULL<<MCID::MayStore), 0x90ULL, nullptr, nullptr, OperandInfo132, -1 ,nullptr },  // Inst #1478 = STFDX
4337
  { 1479, 3,  0,  4,  215,  0|(1ULL<<MCID::MayStore), 0x90ULL, nullptr, nullptr, OperandInfo132, -1 ,nullptr },  // Inst #1479 = STFIWX
4338
  { 1480, 3,  0,  4,  215,  0|(1ULL<<MCID::MayStore), 0x10ULL, nullptr, nullptr, OperandInfo135, -1 ,nullptr },  // Inst #1480 = STFS
4339
  { 1481, 4,  1,  4,  277,  0|(1ULL<<MCID::MayStore), 0x10ULL, nullptr, nullptr, OperandInfo245, -1 ,nullptr },  // Inst #1481 = STFSU
4340
  { 1482, 4,  1,  4,  277,  0|(1ULL<<MCID::MayStore), 0x94ULL, nullptr, nullptr, OperandInfo246, -1 ,nullptr },  // Inst #1482 = STFSUX
4341
  { 1483, 3,  0,  4,  215,  0|(1ULL<<MCID::MayStore), 0x90ULL, nullptr, nullptr, OperandInfo138, -1 ,nullptr },  // Inst #1483 = STFSX
4342
  { 1484, 3,  0,  4,  216,  0|(1ULL<<MCID::MayStore), 0x10ULL, nullptr, nullptr, OperandInfo41, -1 ,nullptr },  // Inst #1484 = STH
4343
  { 1485, 3,  0,  4,  216,  0|(1ULL<<MCID::MayStore), 0x10ULL, nullptr, nullptr, OperandInfo120, -1 ,nullptr },  // Inst #1485 = STH8
4344
  { 1486, 3,  0,  4,  216,  0|(1ULL<<MCID::MayStore), 0x94ULL, nullptr, nullptr, OperandInfo119, -1 ,nullptr },  // Inst #1486 = STHBRX
4345
  { 1487, 3,  0,  4,  219,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, nullptr, OperandInfo48, -1 ,nullptr },  // Inst #1487 = STHCIX
4346
  { 1488, 3,  0,  4,  199,  0|(1ULL<<MCID::MayStore), 0x80ULL, nullptr, ImplicitList3, OperandInfo119, -1 ,nullptr },  // Inst #1488 = STHCX
4347
  { 1489, 3,  0,  4,  301,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo119, -1 ,nullptr },  // Inst #1489 = STHEPX
4348
  { 1490, 4,  1,  4,  278,  0|(1ULL<<MCID::MayStore), 0x10ULL, nullptr, nullptr, OperandInfo239, -1 ,nullptr },  // Inst #1490 = STHU
4349
  { 1491, 4,  1,  4,  278,  0|(1ULL<<MCID::MayStore), 0x10ULL, nullptr, nullptr, OperandInfo240, -1 ,nullptr },  // Inst #1491 = STHU8
4350
  { 1492, 4,  1,  4,  278,  0|(1ULL<<MCID::MayStore), 0x94ULL, nullptr, nullptr, OperandInfo241, -1 ,nullptr },  // Inst #1492 = STHUX
4351
  { 1493, 4,  1,  4,  278,  0|(1ULL<<MCID::MayStore), 0x94ULL, nullptr, nullptr, OperandInfo242, -1 ,nullptr },  // Inst #1493 = STHUX8
4352
  { 1494, 3,  0,  4,  216,  0|(1ULL<<MCID::MayStore), 0x94ULL, nullptr, nullptr, OperandInfo119, -1 ,nullptr },  // Inst #1494 = STHX
4353
  { 1495, 3,  0,  4,  216,  0|(1ULL<<MCID::MayStore), 0x94ULL, nullptr, nullptr, OperandInfo125, -1 ,nullptr },  // Inst #1495 = STHX8
4354
  { 1496, 3,  0,  4,  216,  0|(1ULL<<MCID::MayStore), 0xcULL, nullptr, nullptr, OperandInfo126, -1 ,nullptr },  // Inst #1496 = STHXTLS
4355
  { 1497, 3,  0,  4,  216,  0|(1ULL<<MCID::MayStore), 0xcULL, nullptr, nullptr, OperandInfo126, -1 ,nullptr },  // Inst #1497 = STHXTLS_
4356
  { 1498, 3,  0,  4,  216,  0|(1ULL<<MCID::MayStore), 0xcULL, nullptr, nullptr, OperandInfo127, -1 ,nullptr },  // Inst #1498 = STHXTLS_32
4357
  { 1499, 3,  0,  4,  221,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo41, -1 ,nullptr },  // Inst #1499 = STMW
4358
  { 1500, 0,  0,  4,  313,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #1500 = STOP
4359
  { 1501, 3,  0,  4,  219,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, nullptr, OperandInfo35, -1 ,nullptr },  // Inst #1501 = STSWI
4360
  { 1502, 3,  0,  4,  223,  0|(1ULL<<MCID::MayStore), 0x90ULL, nullptr, nullptr, OperandInfo140, -1 ,nullptr },  // Inst #1502 = STVEBX
4361
  { 1503, 3,  0,  4,  223,  0|(1ULL<<MCID::MayStore), 0x90ULL, nullptr, nullptr, OperandInfo140, -1 ,nullptr },  // Inst #1503 = STVEHX
4362
  { 1504, 3,  0,  4,  223,  0|(1ULL<<MCID::MayStore), 0x90ULL, nullptr, nullptr, OperandInfo140, -1 ,nullptr },  // Inst #1504 = STVEWX
4363
  { 1505, 3,  0,  4,  223,  0|(1ULL<<MCID::MayStore), 0x90ULL, nullptr, nullptr, OperandInfo140, -1 ,nullptr },  // Inst #1505 = STVX
4364
  { 1506, 3,  0,  4,  223,  0|(1ULL<<MCID::MayStore), 0x90ULL, nullptr, nullptr, OperandInfo140, -1 ,nullptr },  // Inst #1506 = STVXL
4365
  { 1507, 3,  0,  4,  216,  0|(1ULL<<MCID::MayStore), 0x10ULL, nullptr, nullptr, OperandInfo41, -1 ,nullptr },  // Inst #1507 = STW
4366
  { 1508, 3,  0,  4,  216,  0|(1ULL<<MCID::MayStore), 0x10ULL, nullptr, nullptr, OperandInfo120, -1 ,nullptr },  // Inst #1508 = STW8
4367
  { 1509, 3,  0,  4,  291,  0|(1ULL<<MCID::MayStore), 0x80ULL, nullptr, nullptr, OperandInfo35, -1 ,nullptr },  // Inst #1509 = STWAT
4368
  { 1510, 3,  0,  4,  216,  0|(1ULL<<MCID::MayStore), 0x94ULL, nullptr, nullptr, OperandInfo119, -1 ,nullptr },  // Inst #1510 = STWBRX
4369
  { 1511, 3,  0,  4,  219,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, nullptr, OperandInfo48, -1 ,nullptr },  // Inst #1511 = STWCIX
4370
  { 1512, 3,  0,  4,  199,  0|(1ULL<<MCID::MayStore), 0x80ULL, nullptr, ImplicitList3, OperandInfo119, -1 ,nullptr },  // Inst #1512 = STWCX
4371
  { 1513, 3,  0,  4,  301,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo119, -1 ,nullptr },  // Inst #1513 = STWEPX
4372
  { 1514, 4,  1,  4,  278,  0|(1ULL<<MCID::MayStore), 0x10ULL, nullptr, nullptr, OperandInfo239, -1 ,nullptr },  // Inst #1514 = STWU
4373
  { 1515, 4,  1,  4,  278,  0|(1ULL<<MCID::MayStore), 0x10ULL, nullptr, nullptr, OperandInfo240, -1 ,nullptr },  // Inst #1515 = STWU8
4374
  { 1516, 4,  1,  4,  278,  0|(1ULL<<MCID::MayStore), 0x94ULL, nullptr, nullptr, OperandInfo241, -1 ,nullptr },  // Inst #1516 = STWUX
4375
  { 1517, 4,  1,  4,  278,  0|(1ULL<<MCID::MayStore), 0x94ULL, nullptr, nullptr, OperandInfo242, -1 ,nullptr },  // Inst #1517 = STWUX8
4376
  { 1518, 3,  0,  4,  216,  0|(1ULL<<MCID::MayStore), 0x94ULL, nullptr, nullptr, OperandInfo119, -1 ,nullptr },  // Inst #1518 = STWX
4377
  { 1519, 3,  0,  4,  216,  0|(1ULL<<MCID::MayStore), 0x94ULL, nullptr, nullptr, OperandInfo125, -1 ,nullptr },  // Inst #1519 = STWX8
4378
  { 1520, 3,  0,  4,  216,  0|(1ULL<<MCID::MayStore), 0xcULL, nullptr, nullptr, OperandInfo126, -1 ,nullptr },  // Inst #1520 = STWXTLS
4379
  { 1521, 3,  0,  4,  216,  0|(1ULL<<MCID::MayStore), 0xcULL, nullptr, nullptr, OperandInfo126, -1 ,nullptr },  // Inst #1521 = STWXTLS_
4380
  { 1522, 3,  0,  4,  216,  0|(1ULL<<MCID::MayStore), 0xcULL, nullptr, nullptr, OperandInfo127, -1 ,nullptr },  // Inst #1522 = STWXTLS_32
4381
  { 1523, 3,  0,  4,  215,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo142, -1 ,nullptr },  // Inst #1523 = STXSD
4382
  { 1524, 3,  0,  4,  215,  0|(1ULL<<MCID::MayStore), 0xc0ULL, ImplicitList2, nullptr, OperandInfo42, -1 ,nullptr },  // Inst #1524 = STXSDX
4383
  { 1525, 3,  0,  4,  215,  0|(1ULL<<MCID::MayStore), 0xc0ULL, nullptr, nullptr, OperandInfo42, -1 ,nullptr },  // Inst #1525 = STXSIBX
4384
  { 1526, 3,  0,  4,  215,  0|(1ULL<<MCID::MayStore), 0xc0ULL, nullptr, nullptr, OperandInfo140, -1 ,nullptr },  // Inst #1526 = STXSIBXv
4385
  { 1527, 3,  0,  4,  215,  0|(1ULL<<MCID::MayStore), 0xc0ULL, nullptr, nullptr, OperandInfo42, -1 ,nullptr },  // Inst #1527 = STXSIHX
4386
  { 1528, 3,  0,  4,  215,  0|(1ULL<<MCID::MayStore), 0xc0ULL, nullptr, nullptr, OperandInfo140, -1 ,nullptr },  // Inst #1528 = STXSIHXv
4387
  { 1529, 3,  0,  4,  215,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0xc0ULL, nullptr, nullptr, OperandInfo42, -1 ,nullptr },  // Inst #1529 = STXSIWX
4388
  { 1530, 3,  0,  4,  215,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo142, -1 ,nullptr },  // Inst #1530 = STXSSP
4389
  { 1531, 3,  0,  4,  215,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0xc0ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr },  // Inst #1531 = STXSSPX
4390
  { 1532, 3,  0,  4,  224,  0|(1ULL<<MCID::MayStore), 0x40ULL, nullptr, nullptr, OperandInfo143, -1 ,nullptr },  // Inst #1532 = STXV
4391
  { 1533, 3,  0,  4,  224,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0xc0ULL, nullptr, nullptr, OperandInfo144, -1 ,nullptr },  // Inst #1533 = STXVB16X
4392
  { 1534, 3,  0,  4,  224,  0|(1ULL<<MCID::MayStore), 0xc0ULL, ImplicitList2, nullptr, OperandInfo144, -1 ,nullptr },  // Inst #1534 = STXVD2X
4393
  { 1535, 3,  0,  4,  224,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0xc0ULL, nullptr, nullptr, OperandInfo144, -1 ,nullptr },  // Inst #1535 = STXVH8X
4394
  { 1536, 3,  0,  4,  225,  0|(1ULL<<MCID::MayStore), 0xc0ULL, nullptr, nullptr, OperandInfo145, -1 ,nullptr },  // Inst #1536 = STXVL
4395
  { 1537, 3,  0,  4,  225,  0|(1ULL<<MCID::MayStore), 0xc0ULL, nullptr, nullptr, OperandInfo145, -1 ,nullptr },  // Inst #1537 = STXVLL
4396
  { 1538, 3,  0,  4,  224,  0|(1ULL<<MCID::MayStore), 0xc0ULL, ImplicitList2, nullptr, OperandInfo144, -1 ,nullptr },  // Inst #1538 = STXVW4X
4397
  { 1539, 3,  0,  4,  224,  0|(1ULL<<MCID::MayStore), 0xc0ULL, nullptr, nullptr, OperandInfo144, -1 ,nullptr },  // Inst #1539 = STXVX
4398
  { 1540, 3,  1,  4,  115,  0, 0x8ULL, nullptr, nullptr, OperandInfo48, -1 ,nullptr },  // Inst #1540 = SUBF
4399
  { 1541, 3,  1,  4,  115,  0, 0x8ULL, nullptr, nullptr, OperandInfo49, -1 ,nullptr },  // Inst #1541 = SUBF8
4400
  { 1542, 3,  1,  4,  115,  0, 0x8ULL, nullptr, ImplicitList3, OperandInfo49, -1 ,nullptr },  // Inst #1542 = SUBF8o
4401
  { 1543, 3,  1,  4,  115,  0, 0xcULL, nullptr, ImplicitList4, OperandInfo48, -1 ,nullptr },  // Inst #1543 = SUBFC
4402
  { 1544, 3,  1,  4,  115,  0, 0xcULL, nullptr, ImplicitList4, OperandInfo49, -1 ,nullptr },  // Inst #1544 = SUBFC8
4403
  { 1545, 3,  1,  4,  245,  0, 0xcULL, nullptr, ImplicitList5, OperandInfo49, -1 ,nullptr },  // Inst #1545 = SUBFC8o
4404
  { 1546, 3,  1,  4,  245,  0, 0xcULL, nullptr, ImplicitList5, OperandInfo48, -1 ,nullptr },  // Inst #1546 = SUBFCo
4405
  { 1547, 3,  1,  4,  115,  0, 0x8ULL, ImplicitList4, ImplicitList4, OperandInfo48, -1 ,nullptr },  // Inst #1547 = SUBFE
4406
  { 1548, 3,  1,  4,  115,  0, 0x8ULL, ImplicitList4, ImplicitList4, OperandInfo49, -1 ,nullptr },  // Inst #1548 = SUBFE8
4407
  { 1549, 3,  1,  4,  115,  0, 0x8ULL, ImplicitList4, ImplicitList5, OperandInfo49, -1 ,nullptr },  // Inst #1549 = SUBFE8o
4408
  { 1550, 3,  1,  4,  115,  0, 0x8ULL, ImplicitList4, ImplicitList5, OperandInfo48, -1 ,nullptr },  // Inst #1550 = SUBFEo
4409
  { 1551, 3,  1,  4,  115,  0, 0x8ULL, nullptr, ImplicitList4, OperandInfo35, -1 ,nullptr },  // Inst #1551 = SUBFIC
4410
  { 1552, 3,  1,  4,  115,  0, 0x8ULL, nullptr, ImplicitList4, OperandInfo34, -1 ,nullptr },  // Inst #1552 = SUBFIC8
4411
  { 1553, 2,  1,  4,  115,  0, 0x8ULL, ImplicitList4, ImplicitList4, OperandInfo36, -1 ,nullptr },  // Inst #1553 = SUBFME
4412
  { 1554, 2,  1,  4,  115,  0, 0x8ULL, ImplicitList4, ImplicitList4, OperandInfo54, -1 ,nullptr },  // Inst #1554 = SUBFME8
4413
  { 1555, 2,  1,  4,  115,  0, 0x8ULL, ImplicitList4, ImplicitList5, OperandInfo54, -1 ,nullptr },  // Inst #1555 = SUBFME8o
4414
  { 1556, 2,  1,  4,  115,  0, 0x8ULL, ImplicitList4, ImplicitList5, OperandInfo36, -1 ,nullptr },  // Inst #1556 = SUBFMEo
4415
  { 1557, 2,  1,  4,  115,  0, 0x8ULL, ImplicitList4, ImplicitList4, OperandInfo36, -1 ,nullptr },  // Inst #1557 = SUBFZE
4416
  { 1558, 2,  1,  4,  115,  0, 0x8ULL, ImplicitList4, ImplicitList4, OperandInfo54, -1 ,nullptr },  // Inst #1558 = SUBFZE8
4417
  { 1559, 2,  1,  4,  115,  0, 0x8ULL, ImplicitList4, ImplicitList5, OperandInfo54, -1 ,nullptr },  // Inst #1559 = SUBFZE8o
4418
  { 1560, 2,  1,  4,  115,  0, 0x8ULL, ImplicitList4, ImplicitList5, OperandInfo36, -1 ,nullptr },  // Inst #1560 = SUBFZEo
4419
  { 1561, 3,  1,  4,  115,  0, 0x8ULL, nullptr, ImplicitList3, OperandInfo48, -1 ,nullptr },  // Inst #1561 = SUBFo
4420
  { 1562, 1,  0,  4,  187,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr },  // Inst #1562 = SYNC
4421
  { 1563, 2,  1,  4,  135,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo247, -1 ,nullptr },  // Inst #1563 = TABORT
4422
  { 1564, 4,  1,  4,  100,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo248, -1 ,nullptr },  // Inst #1564 = TABORTDC
4423
  { 1565, 4,  1,  4,  100,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo249, -1 ,nullptr },  // Inst #1565 = TABORTDCI
4424
  { 1566, 4,  1,  4,  100,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo248, -1 ,nullptr },  // Inst #1566 = TABORTWC
4425
  { 1567, 4,  1,  4,  100,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo249, -1 ,nullptr },  // Inst #1567 = TABORTWCI
4426
  { 1568, 1,  0,  4,  288,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList2, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #1568 = TAILB
4427
  { 1569, 1,  0,  4,  288,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList2, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #1569 = TAILB8
4428
  { 1570, 1,  0,  4,  288,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList2, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #1570 = TAILBA
4429
  { 1571, 1,  0,  4,  288,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList2, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #1571 = TAILBA8
4430
  { 1572, 0,  0,  4,  288,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList11, nullptr, nullptr, -1 ,nullptr },  // Inst #1572 = TAILBCTR
4431
  { 1573, 0,  0,  4,  288,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL, ImplicitList13, nullptr, nullptr, -1 ,nullptr },  // Inst #1573 = TAILBCTR8
4432
  { 1574, 2,  1,  4,  122,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo250, -1 ,nullptr },  // Inst #1574 = TBEGIN
4433
  { 1575, 1,  0,  4,  205,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo148, -1 ,nullptr },  // Inst #1575 = TCHECK
4434
  { 1576, 1,  1,  4,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo148, -1 ,nullptr },  // Inst #1576 = TCHECK_RET
4435
  { 1577, 2,  0,  4,  0,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList2, nullptr, OperandInfo251, -1 ,nullptr },  // Inst #1577 = TCRETURNai
4436
  { 1578, 2,  0,  4,  0,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList2, nullptr, OperandInfo251, -1 ,nullptr },  // Inst #1578 = TCRETURNai8
4437
  { 1579, 2,  0,  4,  0,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList2, nullptr, OperandInfo251, -1 ,nullptr },  // Inst #1579 = TCRETURNdi
4438
  { 1580, 2,  0,  4,  0,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList2, nullptr, OperandInfo251, -1 ,nullptr },  // Inst #1580 = TCRETURNdi8
4439
  { 1581, 2,  0,  4,  0,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList2, nullptr, OperandInfo252, -1 ,nullptr },  // Inst #1581 = TCRETURNri
4440
  { 1582, 2,  0,  4,  0,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList2, nullptr, OperandInfo253, -1 ,nullptr },  // Inst #1582 = TCRETURNri8
4441
  { 1583, 3,  0,  4,  104,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo254, -1 ,nullptr },  // Inst #1583 = TD
4442
  { 1584, 3,  0,  4,  104,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo255, -1 ,nullptr },  // Inst #1584 = TDI
4443
  { 1585, 2,  1,  4,  198,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo250, -1 ,nullptr },  // Inst #1585 = TEND
4444
  { 1586, 0,  0,  4,  309,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #1586 = TLBIA
4445
  { 1587, 2,  0,  4,  222,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #1587 = TLBIE
4446
  { 1588, 1,  0,  4,  195,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo150, -1 ,nullptr },  // Inst #1588 = TLBIEL
4447
  { 1589, 2,  0,  4,  300,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #1589 = TLBIVAX
4448
  { 1590, 1,  0,  4,  300,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo150, -1 ,nullptr },  // Inst #1590 = TLBLD
4449
  { 1591, 1,  0,  4,  300,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo150, -1 ,nullptr },  // Inst #1591 = TLBLI
4450
  { 1592, 0,  0,  4,  300,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #1592 = TLBRE
4451
  { 1593, 3,  1,  4,  300,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo256, -1 ,nullptr },  // Inst #1593 = TLBRE2
4452
  { 1594, 2,  0,  4,  300,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #1594 = TLBSX
4453
  { 1595, 3,  0,  4,  300,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo48, -1 ,nullptr },  // Inst #1595 = TLBSX2
4454
  { 1596, 3,  0,  4,  300,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo48, -1 ,nullptr },  // Inst #1596 = TLBSX2D
4455
  { 1597, 0,  0,  4,  186,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #1597 = TLBSYNC
4456
  { 1598, 0,  0,  4,  300,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #1598 = TLBWE
4457
  { 1599, 3,  0,  4,  300,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo256, -1 ,nullptr },  // Inst #1599 = TLBWE2
4458
  { 1600, 0,  0,  4,  300,  0|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #1600 = TRAP
4459
  { 1601, 1,  1,  4,  122,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo148, -1 ,nullptr },  // Inst #1601 = TRECHKPT
4460
  { 1602, 2,  1,  4,  135,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo257, -1 ,nullptr },  // Inst #1602 = TRECLAIM
4461
  { 1603, 2,  1,  4,  135,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo250, -1 ,nullptr },  // Inst #1603 = TSR
4462
  { 1604, 3,  0,  4,  105,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo79, -1 ,nullptr },  // Inst #1604 = TW
4463
  { 1605, 3,  0,  4,  105,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, Operan