Coverage Report

Created: 2018-09-17 19:50

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/clang-build/lib/Target/Sparc/SparcGenAsmMatcher.inc
Line
Count
Source (jump to first uncovered line)
1
/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2
|*                                                                            *|
3
|* Assembly Matcher Source Fragment                                           *|
4
|*                                                                            *|
5
|* Automatically generated file, do not edit!                                 *|
6
|*                                                                            *|
7
\*===----------------------------------------------------------------------===*/
8
9
10
#ifdef GET_ASSEMBLER_HEADER
11
#undef GET_ASSEMBLER_HEADER
12
  // This should be included into the middle of the declaration of
13
  // your subclasses implementation of MCTargetAsmParser.
14
  uint64_t ComputeAvailableFeatures(const FeatureBitset& FB) const;
15
  void convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode,
16
                       const OperandVector &Operands);
17
  void convertToMapAndConstraints(unsigned Kind,
18
                           const OperandVector &Operands) override;
19
  unsigned MatchInstructionImpl(const OperandVector &Operands,
20
                                MCInst &Inst,
21
                                uint64_t &ErrorInfo,
22
                                bool matchingInlineAsm,
23
                                unsigned VariantID = 0);
24
  OperandMatchResultTy MatchOperandParserImpl(
25
    OperandVector &Operands,
26
    StringRef Mnemonic,
27
    bool ParseForAllFeatures = false);
28
  OperandMatchResultTy tryCustomParseOperand(
29
    OperandVector &Operands,
30
    unsigned MCK);
31
32
#endif // GET_ASSEMBLER_HEADER_INFO
33
34
35
#ifdef GET_OPERAND_DIAGNOSTIC_TYPES
36
#undef GET_OPERAND_DIAGNOSTIC_TYPES
37
38
#endif // GET_OPERAND_DIAGNOSTIC_TYPES
39
40
41
#ifdef GET_REGISTER_MATCHER
42
#undef GET_REGISTER_MATCHER
43
44
// Flags for subtarget features that participate in instruction matching.
45
enum SubtargetFeatureFlag : uint8_t {
46
  Feature_UseSoftMulDiv = (1ULL << 4),
47
  Feature_HasV9 = (1ULL << 0),
48
  Feature_HasVIS = (1ULL << 1),
49
  Feature_HasVIS2 = (1ULL << 2),
50
  Feature_HasVIS3 = (1ULL << 3),
51
  Feature_None = 0
52
};
53
54
#endif // GET_REGISTER_MATCHER
55
56
57
#ifdef GET_SUBTARGET_FEATURE_NAME
58
#undef GET_SUBTARGET_FEATURE_NAME
59
60
// User-level names for subtarget features that participate in
61
// instruction matching.
62
static const char *getSubtargetFeatureName(uint64_t Val) {
63
  switch(Val) {
64
  case Feature_UseSoftMulDiv: return "";
65
  case Feature_HasV9: return "";
66
  case Feature_HasVIS: return "";
67
  case Feature_HasVIS2: return "";
68
  case Feature_HasVIS3: return "";
69
  default: return "(unknown)";
70
  }
71
}
72
73
#endif // GET_SUBTARGET_FEATURE_NAME
74
75
76
#ifdef GET_MATCHER_IMPLEMENTATION
77
#undef GET_MATCHER_IMPLEMENTATION
78
79
3.69k
static void applyMnemonicAliases(StringRef &Mnemonic, uint64_t Features, unsigned VariantID) {
80
3.69k
  switch (VariantID) {
81
3.69k
    case 0:
82
3.69k
      switch (Mnemonic.size()) {
83
3.69k
      
default: break2.03k
;
84
3.69k
      case 4:  // 7 strings to match.
85
1.02k
        switch (Mnemonic[0]) {
86
1.02k
        
default: break832
;
87
1.02k
        case 'a':  // 1 string to match.
88
12
          if (memcmp(Mnemonic.data()+1, "ddc", 3) != 0)
89
8
            break;
90
4
          if ((Features & Feature_HasV9) == Feature_HasV9)   // "addc"
91
2
            Mnemonic = "addx";
92
4
          return;
93
76
        case 'l':  // 1 string to match.
94
76
          if (memcmp(Mnemonic.data()+1, "duw", 3) != 0)
95
64
            break;
96
12
          if ((Features & Feature_HasV9) == Feature_HasV9)   // "lduw"
97
6
            Mnemonic = "ld";
98
12
          return;
99
104
        case 's':  // 5 strings to match.
100
104
          switch (Mnemonic[1]) {
101
104
          
default: break60
;
102
104
          case 't':  // 4 strings to match.
103
36
            switch (Mnemonic[2]) {
104
36
            
default: break20
;
105
36
            case 's':  // 2 strings to match.
106
8
              switch (Mnemonic[3]) {
107
8
              
default: break0
;
108
8
              case 'b':  // 1 string to match.
109
4
                Mnemonic = "stb";  // "stsb"
110
4
                return;
111
8
              case 'h':  // 1 string to match.
112
4
                Mnemonic = "sth";  // "stsh"
113
4
                return;
114
0
              }
115
0
              break;
116
8
            case 'u':  // 2 strings to match.
117
8
              switch (Mnemonic[3]) {
118
8
              
default: break0
;
119
8
              case 'b':  // 1 string to match.
120
4
                Mnemonic = "stb";  // "stub"
121
4
                return;
122
8
              case 'h':  // 1 string to match.
123
4
                Mnemonic = "sth";  // "stuh"
124
4
                return;
125
0
              }
126
0
              break;
127
20
            }
128
20
            break;
129
20
          case 'u':  // 1 string to match.
130
8
            if (memcmp(Mnemonic.data()+2, "bc", 2) != 0)
131
4
              break;
132
4
            if ((Features & Feature_HasV9) == Feature_HasV9)   // "subc"
133
2
              Mnemonic = "subx";
134
4
            return;
135
84
          }
136
84
          break;
137
988
        }
138
988
        break;
139
988
      case 5:  // 5 strings to match.
140
484
        switch (Mnemonic[0]) {
141
484
        
default: break328
;
142
484
        case 'l':  // 1 string to match.
143
20
          if (memcmp(Mnemonic.data()+1, "duwa", 4) != 0)
144
16
            break;
145
4
          if ((Features & Feature_HasV9) == Feature_HasV9)   // "lduwa"
146
2
            Mnemonic = "lda";
147
4
          return;
148
136
        case 's':  // 4 strings to match.
149
136
          if (Mnemonic[1] != 't')
150
116
            break;
151
20
          switch (Mnemonic[2]) {
152
20
          
default: break4
;
153
20
          case 's':  // 2 strings to match.
154
8
            switch (Mnemonic[3]) {
155
8
            
default: break0
;
156
8
            case 'b':  // 1 string to match.
157
4
              if (Mnemonic[4] != 'a')
158
0
                break;
159
4
              Mnemonic = "stba";   // "stsba"
160
4
              return;
161
4
            case 'h':  // 1 string to match.
162
4
              if (Mnemonic[4] != 'a')
163
0
                break;
164
4
              Mnemonic = "stha";   // "stsha"
165
4
              return;
166
0
            }
167
0
            break;
168
8
          case 'u':  // 2 strings to match.
169
8
            switch (Mnemonic[3]) {
170
8
            
default: break0
;
171
8
            case 'b':  // 1 string to match.
172
4
              if (Mnemonic[4] != 'a')
173
0
                break;
174
4
              Mnemonic = "stba";   // "stuba"
175
4
              return;
176
4
            case 'h':  // 1 string to match.
177
4
              if (Mnemonic[4] != 'a')
178
0
                break;
179
4
              Mnemonic = "stha";   // "stuha"
180
4
              return;
181
0
            }
182
0
            break;
183
4
          }
184
4
          break;
185
464
        }
186
464
        break;
187
464
      case 6:  // 4 strings to match.
188
148
        switch (Mnemonic[0]) {
189
148
        
default: break114
;
190
148
        case 'a':  // 1 string to match.
191
12
          if (memcmp(Mnemonic.data()+1, "ddccc", 5) != 0)
192
8
            break;
193
4
          if ((Features & Feature_HasV9) == Feature_HasV9)   // "addccc"
194
2
            Mnemonic = "addxcc";
195
4
          return;
196
4
        case 'i':  // 1 string to match.
197
4
          if (memcmp(Mnemonic.data()+1, "flush", 5) != 0)
198
0
            break;
199
4
          Mnemonic = "flush";  // "iflush"
200
4
          return;
201
4
        case 'r':  // 1 string to match.
202
2
          if (memcmp(Mnemonic.data()+1, "eturn", 5) != 0)
203
0
            break;
204
2
          if ((Features & Feature_HasV9) == Feature_HasV9)  // "return"
205
2
            Mnemonic = "rett";
206
2
          return;
207
16
        case 's':  // 1 string to match.
208
16
          if (memcmp(Mnemonic.data()+1, "ubccc", 5) != 0)
209
12
            break;
210
4
          if ((Features & Feature_HasV9) == Feature_HasV9)   // "subccc"
211
2
            Mnemonic = "subxcc";
212
4
          return;
213
134
        }
214
134
        break;
215
3.62k
      }
216
3.62k
    break;
217
3.62k
  }
218
3.62k
  switch (Mnemonic.size()) {
219
3.62k
  
default: break2.03k
;
220
3.62k
  case 4:  // 7 strings to match.
221
988
    switch (Mnemonic[0]) {
222
988
    
default: break832
;
223
988
    case 'a':  // 1 string to match.
224
8
      if (memcmp(Mnemonic.data()+1, "ddc", 3) != 0)
225
8
        break;
226
0
      if ((Features & Feature_HasV9) == Feature_HasV9)  // "addc"
227
0
        Mnemonic = "addx";
228
0
      return;
229
64
    case 'l':  // 1 string to match.
230
64
      if (memcmp(Mnemonic.data()+1, "duw", 3) != 0)
231
64
        break;
232
0
      if ((Features & Feature_HasV9) == Feature_HasV9)  // "lduw"
233
0
        Mnemonic = "ld";
234
0
      return;
235
84
    case 's':  // 5 strings to match.
236
84
      switch (Mnemonic[1]) {
237
84
      
default: break60
;
238
84
      case 't':  // 4 strings to match.
239
20
        switch (Mnemonic[2]) {
240
20
        default: break;
241
20
        case 's':  // 2 strings to match.
242
0
          switch (Mnemonic[3]) {
243
0
          default: break;
244
0
          case 'b':  // 1 string to match.
245
0
            Mnemonic = "stb";  // "stsb"
246
0
            return;
247
0
          case 'h':  // 1 string to match.
248
0
            Mnemonic = "sth";  // "stsh"
249
0
            return;
250
0
          }
251
0
          break;
252
0
        case 'u':  // 2 strings to match.
253
0
          switch (Mnemonic[3]) {
254
0
          default: break;
255
0
          case 'b':  // 1 string to match.
256
0
            Mnemonic = "stb";  // "stub"
257
0
            return;
258
0
          case 'h':  // 1 string to match.
259
0
            Mnemonic = "sth";  // "stuh"
260
0
            return;
261
0
          }
262
0
          break;
263
20
        }
264
20
        break;
265
20
      case 'u':  // 1 string to match.
266
4
        if (memcmp(Mnemonic.data()+2, "bc", 2) != 0)
267
4
          break;
268
0
        if ((Features & Feature_HasV9) == Feature_HasV9)  // "subc"
269
0
          Mnemonic = "subx";
270
0
        return;
271
84
      }
272
84
      break;
273
988
    }
274
988
    break;
275
988
  case 5:  // 5 strings to match.
276
464
    switch (Mnemonic[0]) {
277
464
    
default: break328
;
278
464
    case 'l':  // 1 string to match.
279
16
      if (memcmp(Mnemonic.data()+1, "duwa", 4) != 0)
280
16
        break;
281
0
      if ((Features & Feature_HasV9) == Feature_HasV9)  // "lduwa"
282
0
        Mnemonic = "lda";
283
0
      return;
284
120
    case 's':  // 4 strings to match.
285
120
      if (Mnemonic[1] != 't')
286
116
        break;
287
4
      switch (Mnemonic[2]) {
288
4
      default: break;
289
4
      case 's':  // 2 strings to match.
290
0
        switch (Mnemonic[3]) {
291
0
        default: break;
292
0
        case 'b':  // 1 string to match.
293
0
          if (Mnemonic[4] != 'a')
294
0
            break;
295
0
          Mnemonic = "stba";   // "stsba"
296
0
          return;
297
0
        case 'h':  // 1 string to match.
298
0
          if (Mnemonic[4] != 'a')
299
0
            break;
300
0
          Mnemonic = "stha";   // "stsha"
301
0
          return;
302
0
        }
303
0
        break;
304
0
      case 'u':  // 2 strings to match.
305
0
        switch (Mnemonic[3]) {
306
0
        default: break;
307
0
        case 'b':  // 1 string to match.
308
0
          if (Mnemonic[4] != 'a')
309
0
            break;
310
0
          Mnemonic = "stba";   // "stuba"
311
0
          return;
312
0
        case 'h':  // 1 string to match.
313
0
          if (Mnemonic[4] != 'a')
314
0
            break;
315
0
          Mnemonic = "stha";   // "stuha"
316
0
          return;
317
0
        }
318
0
        break;
319
4
      }
320
4
      break;
321
464
    }
322
464
    break;
323
464
  case 6:  // 4 strings to match.
324
134
    switch (Mnemonic[0]) {
325
134
    
default: break114
;
326
134
    case 'a':  // 1 string to match.
327
8
      if (memcmp(Mnemonic.data()+1, "ddccc", 5) != 0)
328
8
        break;
329
0
      if ((Features & Feature_HasV9) == Feature_HasV9)  // "addccc"
330
0
        Mnemonic = "addxcc";
331
0
      return;
332
0
    case 'i':  // 1 string to match.
333
0
      if (memcmp(Mnemonic.data()+1, "flush", 5) != 0)
334
0
        break;
335
0
      Mnemonic = "flush";  // "iflush"
336
0
      return;
337
0
    case 'r':  // 1 string to match.
338
0
      if (memcmp(Mnemonic.data()+1, "eturn", 5) != 0)
339
0
        break;
340
0
      if ((Features & Feature_HasV9) == Feature_HasV9)  // "return"
341
0
        Mnemonic = "rett";
342
0
      return;
343
12
    case 's':  // 1 string to match.
344
12
      if (memcmp(Mnemonic.data()+1, "ubccc", 5) != 0)
345
12
        break;
346
0
      if ((Features & Feature_HasV9) == Feature_HasV9)  // "subccc"
347
0
        Mnemonic = "subxcc";
348
0
      return;
349
134
    }
350
134
    break;
351
3.62k
  }
352
3.62k
}
353
354
enum {
355
  Tie0_1_1,
356
  Tie0_3_3,
357
};
358
359
static const uint8_t TiedAsmOperandTable[][3] = {
360
  /* Tie0_1_1 */ { 0, 1, 1 },
361
  /* Tie0_3_3 */ { 0, 3, 3 },
362
};
363
364
namespace {
365
enum OperatorConversionKind {
366
  CVT_Done,
367
  CVT_Reg,
368
  CVT_Tied,
369
  CVT_95_Reg,
370
  CVT_95_addImmOperands,
371
  CVT_imm_95_8,
372
  CVT_imm_95_13,
373
  CVT_imm_95_5,
374
  CVT_imm_95_1,
375
  CVT_imm_95_10,
376
  CVT_imm_95_11,
377
  CVT_imm_95_12,
378
  CVT_imm_95_3,
379
  CVT_imm_95_2,
380
  CVT_imm_95_4,
381
  CVT_imm_95_0,
382
  CVT_imm_95_9,
383
  CVT_imm_95_6,
384
  CVT_imm_95_14,
385
  CVT_regG0,
386
  CVT_imm_95_15,
387
  CVT_imm_95_7,
388
  CVT_regO7,
389
  CVT_95_addMEMriOperands,
390
  CVT_95_addMEMrrOperands,
391
  CVT_regFCC0,
392
  CVT_NUM_CONVERTERS
393
};
394
395
enum InstructionConversionKind {
396
  Convert__Reg1_2__Reg1_0__Reg1_1,
397
  Convert__Reg1_2__Reg1_0__Imm1_1,
398
  Convert__Reg1_2__Reg1_0__Reg1_1__Imm1_3,
399
  Convert__Imm1_0__imm_95_8,
400
  Convert__Imm1_1__imm_95_8,
401
  Convert__Imm1_1__Imm1_0,
402
  Convert__Imm1_2__imm_95_8,
403
  Convert__Imm1_2__Imm1_0,
404
  Convert__Imm1_3__imm_95_8,
405
  Convert__Imm1_3__Imm1_0,
406
  Convert__Imm1_4__Imm1_0,
407
  Convert__Imm1_0,
408
  Convert__Imm1_0__imm_95_13,
409
  Convert__Imm1_1__imm_95_13,
410
  Convert__Imm1_2__imm_95_13,
411
  Convert__Imm1_3__imm_95_13,
412
  Convert__Reg1_1__Reg1_1__Reg1_0,
413
  Convert__Reg1_1__Reg1_1__Imm1_0,
414
  Convert__Imm1_0__imm_95_5,
415
  Convert__Imm1_1__imm_95_5,
416
  Convert__Imm1_2__imm_95_5,
417
  Convert__Imm1_3__imm_95_5,
418
  Convert__Imm1_0__imm_95_1,
419
  Convert__Imm1_1__imm_95_1,
420
  Convert__Imm1_2__imm_95_1,
421
  Convert__Imm1_3__imm_95_1,
422
  Convert__Imm1_0__imm_95_10,
423
  Convert__Imm1_1__imm_95_10,
424
  Convert__Imm1_2__imm_95_10,
425
  Convert__Imm1_3__imm_95_10,
426
  Convert__Imm1_0__imm_95_11,
427
  Convert__Imm1_1__imm_95_11,
428
  Convert__Imm1_2__imm_95_11,
429
  Convert__Imm1_3__imm_95_11,
430
  Convert__Imm1_0__imm_95_12,
431
  Convert__Imm1_1__imm_95_12,
432
  Convert__Imm1_2__imm_95_12,
433
  Convert__Imm1_3__imm_95_12,
434
  Convert__Imm1_0__imm_95_3,
435
  Convert__Imm1_1__imm_95_3,
436
  Convert__Imm1_2__imm_95_3,
437
  Convert__Imm1_3__imm_95_3,
438
  Convert__Imm1_0__imm_95_2,
439
  Convert__Imm1_1__imm_95_2,
440
  Convert__Imm1_2__imm_95_2,
441
  Convert__Imm1_3__imm_95_2,
442
  Convert__Imm1_0__imm_95_4,
443
  Convert__Imm1_1__imm_95_4,
444
  Convert__Imm1_2__imm_95_4,
445
  Convert__Imm1_3__imm_95_4,
446
  Convert__Imm1_0__imm_95_0,
447
  Convert__Imm1_1__imm_95_0,
448
  Convert__Imm1_2__imm_95_0,
449
  Convert__Imm1_3__imm_95_0,
450
  Convert__Imm1_0__imm_95_9,
451
  Convert__Imm1_1__imm_95_9,
452
  Convert__Imm1_2__imm_95_9,
453
  Convert__Imm1_3__imm_95_9,
454
  Convert__Imm1_0__imm_95_6,
455
  Convert__Imm1_1__imm_95_6,
456
  Convert__Imm1_2__imm_95_6,
457
  Convert__Imm1_3__imm_95_6,
458
  Convert__Imm1_0__imm_95_14,
459
  Convert__Imm1_1__imm_95_14,
460
  Convert__Imm1_2__imm_95_14,
461
  Convert__Imm1_3__imm_95_14,
462
  Convert__Reg1_0__Imm1_1,
463
  Convert__Reg1_1__Imm1_2,
464
  Convert__Reg1_2__Imm1_3,
465
  Convert__regG0__Reg1_1__Reg1_0,
466
  Convert__regG0__Reg1_1__Imm1_0,
467
  Convert__Imm1_0__imm_95_15,
468
  Convert__Imm1_1__imm_95_15,
469
  Convert__Imm1_2__imm_95_15,
470
  Convert__Imm1_3__imm_95_15,
471
  Convert__Imm1_0__imm_95_7,
472
  Convert__Imm1_1__imm_95_7,
473
  Convert__Imm1_2__imm_95_7,
474
  Convert__Imm1_3__imm_95_7,
475
  Convert__regO7__MEMri2_0,
476
  Convert__regO7__MEMrr2_0,
477
  Convert__Imm1_0__Imm1_1,
478
  Convert__Reg1_4__Reg1_1__Reg1_3__Tie0_1_1,
479
  Convert__Reg1_5__Reg1_1__Reg1_4__Tie0_1_1,
480
  Convert__Reg1_5__Reg1_1__Reg1_4__Tie0_1_1__Imm1_3,
481
  Convert__Reg1_0__regG0__regG0,
482
  Convert__MEMri2_1__regG0,
483
  Convert__MEMrr2_1__regG0,
484
  Convert__Reg1_0,
485
  Convert__Reg1_0__Reg1_1,
486
  Convert__Reg1_0__Reg1_0__imm_95_1,
487
  Convert__Reg1_1__Reg1_0,
488
  Convert__Imm1_1__imm_95_8__Reg1_0,
489
  Convert__Imm1_2__imm_95_8__Reg1_1,
490
  Convert__Imm1_2__Imm1_0__Reg1_1,
491
  Convert__Imm1_3__imm_95_8__Reg1_2,
492
  Convert__Imm1_3__Imm1_0__Reg1_2,
493
  Convert__Imm1_4__Imm1_0__Reg1_3,
494
  Convert__Imm1_1__imm_95_9__Reg1_0,
495
  Convert__Imm1_2__imm_95_9__Reg1_1,
496
  Convert__Imm1_3__imm_95_9__Reg1_2,
497
  Convert__Imm1_1__imm_95_6__Reg1_0,
498
  Convert__Imm1_2__imm_95_6__Reg1_1,
499
  Convert__Imm1_3__imm_95_6__Reg1_2,
500
  Convert__Imm1_1__imm_95_11__Reg1_0,
501
  Convert__Imm1_2__imm_95_11__Reg1_1,
502
  Convert__Imm1_3__imm_95_11__Reg1_2,
503
  Convert__Imm1_1__imm_95_4__Reg1_0,
504
  Convert__Imm1_2__imm_95_4__Reg1_1,
505
  Convert__Imm1_3__imm_95_4__Reg1_2,
506
  Convert__Imm1_1__imm_95_13__Reg1_0,
507
  Convert__Imm1_2__imm_95_13__Reg1_1,
508
  Convert__Imm1_3__imm_95_13__Reg1_2,
509
  Convert__Imm1_1__imm_95_2__Reg1_0,
510
  Convert__Imm1_2__imm_95_2__Reg1_1,
511
  Convert__Imm1_3__imm_95_2__Reg1_2,
512
  Convert__Imm1_1__imm_95_0__Reg1_0,
513
  Convert__Imm1_2__imm_95_0__Reg1_1,
514
  Convert__Imm1_3__imm_95_0__Reg1_2,
515
  Convert__Imm1_1__imm_95_1__Reg1_0,
516
  Convert__Imm1_2__imm_95_1__Reg1_1,
517
  Convert__Imm1_3__imm_95_1__Reg1_2,
518
  Convert__Imm1_1__imm_95_15__Reg1_0,
519
  Convert__Imm1_2__imm_95_15__Reg1_1,
520
  Convert__Imm1_3__imm_95_15__Reg1_2,
521
  Convert__Imm1_1__imm_95_7__Reg1_0,
522
  Convert__Imm1_2__imm_95_7__Reg1_1,
523
  Convert__Imm1_3__imm_95_7__Reg1_2,
524
  Convert__Imm1_1__imm_95_10__Reg1_0,
525
  Convert__Imm1_2__imm_95_10__Reg1_1,
526
  Convert__Imm1_3__imm_95_10__Reg1_2,
527
  Convert__Imm1_1__imm_95_5__Reg1_0,
528
  Convert__Imm1_2__imm_95_5__Reg1_1,
529
  Convert__Imm1_3__imm_95_5__Reg1_2,
530
  Convert__Imm1_1__imm_95_12__Reg1_0,
531
  Convert__Imm1_2__imm_95_12__Reg1_1,
532
  Convert__Imm1_3__imm_95_12__Reg1_2,
533
  Convert__Imm1_1__imm_95_3__Reg1_0,
534
  Convert__Imm1_2__imm_95_3__Reg1_1,
535
  Convert__Imm1_3__imm_95_3__Reg1_2,
536
  Convert__Imm1_1__imm_95_14__Reg1_0,
537
  Convert__Imm1_2__imm_95_14__Reg1_1,
538
  Convert__Imm1_3__imm_95_14__Reg1_2,
539
  Convert__regFCC0__Reg1_0__Reg1_1,
540
  Convert__Reg1_0__Reg1_1__Reg1_2,
541
  Convert_NoOperands,
542
  Convert__MEMri2_0,
543
  Convert__MEMrr2_0,
544
  Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8,
545
  Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_8,
546
  Convert__Reg1_3__Reg1_2__Tie0_1_1__Imm1_0,
547
  Convert__Reg1_3__Reg1_1__Reg1_2__Tie0_1_1__Imm1_0,
548
  Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13,
549
  Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5,
550
  Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1,
551
  Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_9,
552
  Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_10,
553
  Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_6,
554
  Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_11,
555
  Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_11,
556
  Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_12,
557
  Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_3,
558
  Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_4,
559
  Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_2,
560
  Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_13,
561
  Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_4,
562
  Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_2,
563
  Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_0,
564
  Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_0,
565
  Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9,
566
  Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_1,
567
  Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_6,
568
  Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_15,
569
  Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_14,
570
  Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_7,
571
  Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_10,
572
  Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_5,
573
  Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_12,
574
  Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_3,
575
  Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_14,
576
  Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_15,
577
  Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_7,
578
  Convert__Reg1_0__Tie0_1_1,
579
  Convert__regG0__MEMri2_0,
580
  Convert__regG0__MEMrr2_0,
581
  Convert__Reg1_1__MEMri2_0,
582
  Convert__Reg1_1__MEMrr2_0,
583
  Convert__MEMri2_1,
584
  Convert__Reg1_3__MEMri2_1,
585
  Convert__MEMrr2_1,
586
  Convert__Reg1_3__MEMrr2_1,
587
  Convert__Reg1_3__MEMrr2_1__Imm1_4,
588
  Convert__Reg1_4__MEMrr2_1__Imm1_3,
589
  Convert__Reg1_1,
590
  Convert__regG0__Reg1_0,
591
  Convert__Reg1_1__regG0__Reg1_0,
592
  Convert__regG0__Imm1_0,
593
  Convert__Reg1_1__regG0__Imm1_0,
594
  Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_8,
595
  Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_8,
596
  Convert__Reg1_3__Imm1_2__Tie0_1_1__Imm1_0,
597
  Convert__Reg1_3__Reg1_1__Imm1_2__Tie0_1_1__Imm1_0,
598
  Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_13,
599
  Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_5,
600
  Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_1,
601
  Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_9,
602
  Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_10,
603
  Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_6,
604
  Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_11,
605
  Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_11,
606
  Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_12,
607
  Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_3,
608
  Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_4,
609
  Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_2,
610
  Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_13,
611
  Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_4,
612
  Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_2,
613
  Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_0,
614
  Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_0,
615
  Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_9,
616
  Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_1,
617
  Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_6,
618
  Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_15,
619
  Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_14,
620
  Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_7,
621
  Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_10,
622
  Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_5,
623
  Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_12,
624
  Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_3,
625
  Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_14,
626
  Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_15,
627
  Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_7,
628
  Convert__Reg1_0__regG0__Reg1_0,
629
  Convert__Reg1_0__Reg1_0__regG0,
630
  Convert__Reg1_1__Reg1_0__regG0,
631
  Convert__regG0__regG0__regG0,
632
  Convert__imm_95_8,
633
  Convert__Reg1_1__Imm1_0,
634
  Convert__Reg1_2__Reg1_0__Reg1_1__imm_95_0,
635
  Convert__Reg1_2__Reg1_0__Imm1_1__imm_95_0,
636
  Convert__MEMri2_2,
637
  Convert__MEMrr2_2,
638
  Convert__MEMri2_2__Reg1_0,
639
  Convert__MEMrr2_2__Reg1_0,
640
  Convert__MEMrr2_2__Reg1_0__Imm1_4,
641
  Convert__Reg1_3__MEMri2_1__Tie0_1_1,
642
  Convert__Reg1_3__MEMrr2_1__Tie0_1_1,
643
  Convert__Reg1_4__MEMrr2_1__Imm1_3__Tie0_1_1,
644
  Convert__regG0__Reg1_0__imm_95_8,
645
  Convert__regG0__Imm1_0__imm_95_8,
646
  Convert__regG0__Reg1_1__imm_95_8,
647
  Convert__regG0__Imm1_1__imm_95_8,
648
  Convert__Reg1_0__Reg1_2__imm_95_8,
649
  Convert__Reg1_0__Imm1_2__imm_95_8,
650
  Convert__Reg1_1__Reg1_3__imm_95_8,
651
  Convert__Reg1_1__Imm1_3__imm_95_8,
652
  Convert__Reg1_1__Reg1_3__Imm1_0,
653
  Convert__Reg1_1__Imm1_3__Imm1_0,
654
  Convert__Reg1_2__Reg1_4__Imm1_0,
655
  Convert__Reg1_2__Imm1_4__Imm1_0,
656
  Convert__regG0__Reg1_0__imm_95_13,
657
  Convert__regG0__Imm1_0__imm_95_13,
658
  Convert__regG0__Reg1_1__imm_95_13,
659
  Convert__regG0__Imm1_1__imm_95_13,
660
  Convert__Reg1_0__Reg1_2__imm_95_13,
661
  Convert__Reg1_0__Imm1_2__imm_95_13,
662
  Convert__Reg1_1__Reg1_3__imm_95_13,
663
  Convert__Reg1_1__Imm1_3__imm_95_13,
664
  Convert__regG0__Reg1_0__imm_95_5,
665
  Convert__regG0__Imm1_0__imm_95_5,
666
  Convert__regG0__Reg1_1__imm_95_5,
667
  Convert__regG0__Imm1_1__imm_95_5,
668
  Convert__Reg1_0__Reg1_2__imm_95_5,
669
  Convert__Reg1_0__Imm1_2__imm_95_5,
670
  Convert__Reg1_1__Reg1_3__imm_95_5,
671
  Convert__Reg1_1__Imm1_3__imm_95_5,
672
  Convert__regG0__Reg1_0__imm_95_1,
673
  Convert__regG0__Imm1_0__imm_95_1,
674
  Convert__regG0__Reg1_1__imm_95_1,
675
  Convert__regG0__Imm1_1__imm_95_1,
676
  Convert__Reg1_0__Reg1_2__imm_95_1,
677
  Convert__Reg1_0__Imm1_2__imm_95_1,
678
  Convert__Reg1_1__Reg1_3__imm_95_1,
679
  Convert__Reg1_1__Imm1_3__imm_95_1,
680
  Convert__regG0__Reg1_0__imm_95_10,
681
  Convert__regG0__Imm1_0__imm_95_10,
682
  Convert__regG0__Reg1_1__imm_95_10,
683
  Convert__regG0__Imm1_1__imm_95_10,
684
  Convert__Reg1_0__Reg1_2__imm_95_10,
685
  Convert__Reg1_0__Imm1_2__imm_95_10,
686
  Convert__Reg1_1__Reg1_3__imm_95_10,
687
  Convert__Reg1_1__Imm1_3__imm_95_10,
688
  Convert__regG0__Reg1_0__imm_95_11,
689
  Convert__regG0__Imm1_0__imm_95_11,
690
  Convert__regG0__Reg1_1__imm_95_11,
691
  Convert__regG0__Imm1_1__imm_95_11,
692
  Convert__Reg1_0__Reg1_2__imm_95_11,
693
  Convert__Reg1_0__Imm1_2__imm_95_11,
694
  Convert__Reg1_1__Reg1_3__imm_95_11,
695
  Convert__Reg1_1__Imm1_3__imm_95_11,
696
  Convert__regG0__Reg1_0__imm_95_12,
697
  Convert__regG0__Imm1_0__imm_95_12,
698
  Convert__regG0__Reg1_1__imm_95_12,
699
  Convert__regG0__Imm1_1__imm_95_12,
700
  Convert__Reg1_0__Reg1_2__imm_95_12,
701
  Convert__Reg1_0__Imm1_2__imm_95_12,
702
  Convert__Reg1_1__Reg1_3__imm_95_12,
703
  Convert__Reg1_1__Imm1_3__imm_95_12,
704
  Convert__regG0__Reg1_0__imm_95_3,
705
  Convert__regG0__Imm1_0__imm_95_3,
706
  Convert__regG0__Reg1_1__imm_95_3,
707
  Convert__regG0__Imm1_1__imm_95_3,
708
  Convert__Reg1_0__Reg1_2__imm_95_3,
709
  Convert__Reg1_0__Imm1_2__imm_95_3,
710
  Convert__Reg1_1__Reg1_3__imm_95_3,
711
  Convert__Reg1_1__Imm1_3__imm_95_3,
712
  Convert__regG0__Reg1_0__imm_95_2,
713
  Convert__regG0__Imm1_0__imm_95_2,
714
  Convert__regG0__Reg1_1__imm_95_2,
715
  Convert__regG0__Imm1_1__imm_95_2,
716
  Convert__Reg1_0__Reg1_2__imm_95_2,
717
  Convert__Reg1_0__Imm1_2__imm_95_2,
718
  Convert__Reg1_1__Reg1_3__imm_95_2,
719
  Convert__Reg1_1__Imm1_3__imm_95_2,
720
  Convert__regG0__Reg1_0__imm_95_4,
721
  Convert__regG0__Imm1_0__imm_95_4,
722
  Convert__regG0__Reg1_1__imm_95_4,
723
  Convert__regG0__Imm1_1__imm_95_4,
724
  Convert__Reg1_0__Reg1_2__imm_95_4,
725
  Convert__Reg1_0__Imm1_2__imm_95_4,
726
  Convert__Reg1_1__Reg1_3__imm_95_4,
727
  Convert__Reg1_1__Imm1_3__imm_95_4,
728
  Convert__regG0__Reg1_0__imm_95_0,
729
  Convert__regG0__Imm1_0__imm_95_0,
730
  Convert__regG0__Reg1_1__imm_95_0,
731
  Convert__regG0__Imm1_1__imm_95_0,
732
  Convert__Reg1_0__Reg1_2__imm_95_0,
733
  Convert__Reg1_0__Imm1_2__imm_95_0,
734
  Convert__Reg1_1__Reg1_3__imm_95_0,
735
  Convert__Reg1_1__Imm1_3__imm_95_0,
736
  Convert__regG0__Reg1_0__imm_95_9,
737
  Convert__regG0__Imm1_0__imm_95_9,
738
  Convert__regG0__Reg1_1__imm_95_9,
739
  Convert__regG0__Imm1_1__imm_95_9,
740
  Convert__Reg1_0__Reg1_2__imm_95_9,
741
  Convert__Reg1_0__Imm1_2__imm_95_9,
742
  Convert__Reg1_1__Reg1_3__imm_95_9,
743
  Convert__Reg1_1__Imm1_3__imm_95_9,
744
  Convert__regG0__Reg1_0__imm_95_6,
745
  Convert__regG0__Imm1_0__imm_95_6,
746
  Convert__regG0__Reg1_1__imm_95_6,
747
  Convert__regG0__Imm1_1__imm_95_6,
748
  Convert__Reg1_0__Reg1_2__imm_95_6,
749
  Convert__Reg1_0__Imm1_2__imm_95_6,
750
  Convert__Reg1_1__Reg1_3__imm_95_6,
751
  Convert__Reg1_1__Imm1_3__imm_95_6,
752
  Convert__regG0__Reg1_0__imm_95_14,
753
  Convert__regG0__Imm1_0__imm_95_14,
754
  Convert__regG0__Reg1_1__imm_95_14,
755
  Convert__regG0__Imm1_1__imm_95_14,
756
  Convert__Reg1_0__Reg1_2__imm_95_14,
757
  Convert__Reg1_0__Imm1_2__imm_95_14,
758
  Convert__Reg1_1__Reg1_3__imm_95_14,
759
  Convert__Reg1_1__Imm1_3__imm_95_14,
760
  Convert__regG0__Reg1_0__regG0,
761
  Convert__regG0__Reg1_0__imm_95_15,
762
  Convert__regG0__Imm1_0__imm_95_15,
763
  Convert__regG0__Reg1_1__imm_95_15,
764
  Convert__regG0__Imm1_1__imm_95_15,
765
  Convert__Reg1_0__Reg1_2__imm_95_15,
766
  Convert__Reg1_0__Imm1_2__imm_95_15,
767
  Convert__Reg1_1__Reg1_3__imm_95_15,
768
  Convert__Reg1_1__Imm1_3__imm_95_15,
769
  Convert__regG0__Reg1_0__imm_95_7,
770
  Convert__regG0__Imm1_0__imm_95_7,
771
  Convert__regG0__Reg1_1__imm_95_7,
772
  Convert__regG0__Imm1_1__imm_95_7,
773
  Convert__Reg1_0__Reg1_2__imm_95_7,
774
  Convert__Reg1_0__Imm1_2__imm_95_7,
775
  Convert__Reg1_1__Reg1_3__imm_95_7,
776
  Convert__Reg1_1__Imm1_3__imm_95_7,
777
  CVT_NUM_SIGNATURES
778
};
779
780
} // end anonymous namespace
781
782
static const uint8_t ConversionTable[CVT_NUM_SIGNATURES][11] = {
783
  // Convert__Reg1_2__Reg1_0__Reg1_1
784
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Done },
785
  // Convert__Reg1_2__Reg1_0__Imm1_1
786
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
787
  // Convert__Reg1_2__Reg1_0__Reg1_1__Imm1_3
788
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_Done },
789
  // Convert__Imm1_0__imm_95_8
790
  { CVT_95_addImmOperands, 1, CVT_imm_95_8, 0, CVT_Done },
791
  // Convert__Imm1_1__imm_95_8
792
  { CVT_95_addImmOperands, 2, CVT_imm_95_8, 0, CVT_Done },
793
  // Convert__Imm1_1__Imm1_0
794
  { CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
795
  // Convert__Imm1_2__imm_95_8
796
  { CVT_95_addImmOperands, 3, CVT_imm_95_8, 0, CVT_Done },
797
  // Convert__Imm1_2__Imm1_0
798
  { CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
799
  // Convert__Imm1_3__imm_95_8
800
  { CVT_95_addImmOperands, 4, CVT_imm_95_8, 0, CVT_Done },
801
  // Convert__Imm1_3__Imm1_0
802
  { CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 1, CVT_Done },
803
  // Convert__Imm1_4__Imm1_0
804
  { CVT_95_addImmOperands, 5, CVT_95_addImmOperands, 1, CVT_Done },
805
  // Convert__Imm1_0
806
  { CVT_95_addImmOperands, 1, CVT_Done },
807
  // Convert__Imm1_0__imm_95_13
808
  { CVT_95_addImmOperands, 1, CVT_imm_95_13, 0, CVT_Done },
809
  // Convert__Imm1_1__imm_95_13
810
  { CVT_95_addImmOperands, 2, CVT_imm_95_13, 0, CVT_Done },
811
  // Convert__Imm1_2__imm_95_13
812
  { CVT_95_addImmOperands, 3, CVT_imm_95_13, 0, CVT_Done },
813
  // Convert__Imm1_3__imm_95_13
814
  { CVT_95_addImmOperands, 4, CVT_imm_95_13, 0, CVT_Done },
815
  // Convert__Reg1_1__Reg1_1__Reg1_0
816
  { CVT_95_Reg, 2, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
817
  // Convert__Reg1_1__Reg1_1__Imm1_0
818
  { CVT_95_Reg, 2, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
819
  // Convert__Imm1_0__imm_95_5
820
  { CVT_95_addImmOperands, 1, CVT_imm_95_5, 0, CVT_Done },
821
  // Convert__Imm1_1__imm_95_5
822
  { CVT_95_addImmOperands, 2, CVT_imm_95_5, 0, CVT_Done },
823
  // Convert__Imm1_2__imm_95_5
824
  { CVT_95_addImmOperands, 3, CVT_imm_95_5, 0, CVT_Done },
825
  // Convert__Imm1_3__imm_95_5
826
  { CVT_95_addImmOperands, 4, CVT_imm_95_5, 0, CVT_Done },
827
  // Convert__Imm1_0__imm_95_1
828
  { CVT_95_addImmOperands, 1, CVT_imm_95_1, 0, CVT_Done },
829
  // Convert__Imm1_1__imm_95_1
830
  { CVT_95_addImmOperands, 2, CVT_imm_95_1, 0, CVT_Done },
831
  // Convert__Imm1_2__imm_95_1
832
  { CVT_95_addImmOperands, 3, CVT_imm_95_1, 0, CVT_Done },
833
  // Convert__Imm1_3__imm_95_1
834
  { CVT_95_addImmOperands, 4, CVT_imm_95_1, 0, CVT_Done },
835
  // Convert__Imm1_0__imm_95_10
836
  { CVT_95_addImmOperands, 1, CVT_imm_95_10, 0, CVT_Done },
837
  // Convert__Imm1_1__imm_95_10
838
  { CVT_95_addImmOperands, 2, CVT_imm_95_10, 0, CVT_Done },
839
  // Convert__Imm1_2__imm_95_10
840
  { CVT_95_addImmOperands, 3, CVT_imm_95_10, 0, CVT_Done },
841
  // Convert__Imm1_3__imm_95_10
842
  { CVT_95_addImmOperands, 4, CVT_imm_95_10, 0, CVT_Done },
843
  // Convert__Imm1_0__imm_95_11
844
  { CVT_95_addImmOperands, 1, CVT_imm_95_11, 0, CVT_Done },
845
  // Convert__Imm1_1__imm_95_11
846
  { CVT_95_addImmOperands, 2, CVT_imm_95_11, 0, CVT_Done },
847
  // Convert__Imm1_2__imm_95_11
848
  { CVT_95_addImmOperands, 3, CVT_imm_95_11, 0, CVT_Done },
849
  // Convert__Imm1_3__imm_95_11
850
  { CVT_95_addImmOperands, 4, CVT_imm_95_11, 0, CVT_Done },
851
  // Convert__Imm1_0__imm_95_12
852
  { CVT_95_addImmOperands, 1, CVT_imm_95_12, 0, CVT_Done },
853
  // Convert__Imm1_1__imm_95_12
854
  { CVT_95_addImmOperands, 2, CVT_imm_95_12, 0, CVT_Done },
855
  // Convert__Imm1_2__imm_95_12
856
  { CVT_95_addImmOperands, 3, CVT_imm_95_12, 0, CVT_Done },
857
  // Convert__Imm1_3__imm_95_12
858
  { CVT_95_addImmOperands, 4, CVT_imm_95_12, 0, CVT_Done },
859
  // Convert__Imm1_0__imm_95_3
860
  { CVT_95_addImmOperands, 1, CVT_imm_95_3, 0, CVT_Done },
861
  // Convert__Imm1_1__imm_95_3
862
  { CVT_95_addImmOperands, 2, CVT_imm_95_3, 0, CVT_Done },
863
  // Convert__Imm1_2__imm_95_3
864
  { CVT_95_addImmOperands, 3, CVT_imm_95_3, 0, CVT_Done },
865
  // Convert__Imm1_3__imm_95_3
866
  { CVT_95_addImmOperands, 4, CVT_imm_95_3, 0, CVT_Done },
867
  // Convert__Imm1_0__imm_95_2
868
  { CVT_95_addImmOperands, 1, CVT_imm_95_2, 0, CVT_Done },
869
  // Convert__Imm1_1__imm_95_2
870
  { CVT_95_addImmOperands, 2, CVT_imm_95_2, 0, CVT_Done },
871
  // Convert__Imm1_2__imm_95_2
872
  { CVT_95_addImmOperands, 3, CVT_imm_95_2, 0, CVT_Done },
873
  // Convert__Imm1_3__imm_95_2
874
  { CVT_95_addImmOperands, 4, CVT_imm_95_2, 0, CVT_Done },
875
  // Convert__Imm1_0__imm_95_4
876
  { CVT_95_addImmOperands, 1, CVT_imm_95_4, 0, CVT_Done },
877
  // Convert__Imm1_1__imm_95_4
878
  { CVT_95_addImmOperands, 2, CVT_imm_95_4, 0, CVT_Done },
879
  // Convert__Imm1_2__imm_95_4
880
  { CVT_95_addImmOperands, 3, CVT_imm_95_4, 0, CVT_Done },
881
  // Convert__Imm1_3__imm_95_4
882
  { CVT_95_addImmOperands, 4, CVT_imm_95_4, 0, CVT_Done },
883
  // Convert__Imm1_0__imm_95_0
884
  { CVT_95_addImmOperands, 1, CVT_imm_95_0, 0, CVT_Done },
885
  // Convert__Imm1_1__imm_95_0
886
  { CVT_95_addImmOperands, 2, CVT_imm_95_0, 0, CVT_Done },
887
  // Convert__Imm1_2__imm_95_0
888
  { CVT_95_addImmOperands, 3, CVT_imm_95_0, 0, CVT_Done },
889
  // Convert__Imm1_3__imm_95_0
890
  { CVT_95_addImmOperands, 4, CVT_imm_95_0, 0, CVT_Done },
891
  // Convert__Imm1_0__imm_95_9
892
  { CVT_95_addImmOperands, 1, CVT_imm_95_9, 0, CVT_Done },
893
  // Convert__Imm1_1__imm_95_9
894
  { CVT_95_addImmOperands, 2, CVT_imm_95_9, 0, CVT_Done },
895
  // Convert__Imm1_2__imm_95_9
896
  { CVT_95_addImmOperands, 3, CVT_imm_95_9, 0, CVT_Done },
897
  // Convert__Imm1_3__imm_95_9
898
  { CVT_95_addImmOperands, 4, CVT_imm_95_9, 0, CVT_Done },
899
  // Convert__Imm1_0__imm_95_6
900
  { CVT_95_addImmOperands, 1, CVT_imm_95_6, 0, CVT_Done },
901
  // Convert__Imm1_1__imm_95_6
902
  { CVT_95_addImmOperands, 2, CVT_imm_95_6, 0, CVT_Done },
903
  // Convert__Imm1_2__imm_95_6
904
  { CVT_95_addImmOperands, 3, CVT_imm_95_6, 0, CVT_Done },
905
  // Convert__Imm1_3__imm_95_6
906
  { CVT_95_addImmOperands, 4, CVT_imm_95_6, 0, CVT_Done },
907
  // Convert__Imm1_0__imm_95_14
908
  { CVT_95_addImmOperands, 1, CVT_imm_95_14, 0, CVT_Done },
909
  // Convert__Imm1_1__imm_95_14
910
  { CVT_95_addImmOperands, 2, CVT_imm_95_14, 0, CVT_Done },
911
  // Convert__Imm1_2__imm_95_14
912
  { CVT_95_addImmOperands, 3, CVT_imm_95_14, 0, CVT_Done },
913
  // Convert__Imm1_3__imm_95_14
914
  { CVT_95_addImmOperands, 4, CVT_imm_95_14, 0, CVT_Done },
915
  // Convert__Reg1_0__Imm1_1
916
  { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
917
  // Convert__Reg1_1__Imm1_2
918
  { CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
919
  // Convert__Reg1_2__Imm1_3
920
  { CVT_95_Reg, 3, CVT_95_addImmOperands, 4, CVT_Done },
921
  // Convert__regG0__Reg1_1__Reg1_0
922
  { CVT_regG0, 0, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
923
  // Convert__regG0__Reg1_1__Imm1_0
924
  { CVT_regG0, 0, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
925
  // Convert__Imm1_0__imm_95_15
926
  { CVT_95_addImmOperands, 1, CVT_imm_95_15, 0, CVT_Done },
927
  // Convert__Imm1_1__imm_95_15
928
  { CVT_95_addImmOperands, 2, CVT_imm_95_15, 0, CVT_Done },
929
  // Convert__Imm1_2__imm_95_15
930
  { CVT_95_addImmOperands, 3, CVT_imm_95_15, 0, CVT_Done },
931
  // Convert__Imm1_3__imm_95_15
932
  { CVT_95_addImmOperands, 4, CVT_imm_95_15, 0, CVT_Done },
933
  // Convert__Imm1_0__imm_95_7
934
  { CVT_95_addImmOperands, 1, CVT_imm_95_7, 0, CVT_Done },
935
  // Convert__Imm1_1__imm_95_7
936
  { CVT_95_addImmOperands, 2, CVT_imm_95_7, 0, CVT_Done },
937
  // Convert__Imm1_2__imm_95_7
938
  { CVT_95_addImmOperands, 3, CVT_imm_95_7, 0, CVT_Done },
939
  // Convert__Imm1_3__imm_95_7
940
  { CVT_95_addImmOperands, 4, CVT_imm_95_7, 0, CVT_Done },
941
  // Convert__regO7__MEMri2_0
942
  { CVT_regO7, 0, CVT_95_addMEMriOperands, 1, CVT_Done },
943
  // Convert__regO7__MEMrr2_0
944
  { CVT_regO7, 0, CVT_95_addMEMrrOperands, 1, CVT_Done },
945
  // Convert__Imm1_0__Imm1_1
946
  { CVT_95_addImmOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
947
  // Convert__Reg1_4__Reg1_1__Reg1_3__Tie0_1_1
948
  { CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_Done },
949
  // Convert__Reg1_5__Reg1_1__Reg1_4__Tie0_1_1
950
  { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_95_Reg, 5, CVT_Tied, Tie0_1_1, CVT_Done },
951
  // Convert__Reg1_5__Reg1_1__Reg1_4__Tie0_1_1__Imm1_3
952
  { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_95_Reg, 5, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 4, CVT_Done },
953
  // Convert__Reg1_0__regG0__regG0
954
  { CVT_95_Reg, 1, CVT_regG0, 0, CVT_regG0, 0, CVT_Done },
955
  // Convert__MEMri2_1__regG0
956
  { CVT_95_addMEMriOperands, 2, CVT_regG0, 0, CVT_Done },
957
  // Convert__MEMrr2_1__regG0
958
  { CVT_95_addMEMrrOperands, 2, CVT_regG0, 0, CVT_Done },
959
  // Convert__Reg1_0
960
  { CVT_95_Reg, 1, CVT_Done },
961
  // Convert__Reg1_0__Reg1_1
962
  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Done },
963
  // Convert__Reg1_0__Reg1_0__imm_95_1
964
  { CVT_95_Reg, 1, CVT_95_Reg, 1, CVT_imm_95_1, 0, CVT_Done },
965
  // Convert__Reg1_1__Reg1_0
966
  { CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
967
  // Convert__Imm1_1__imm_95_8__Reg1_0
968
  { CVT_95_addImmOperands, 2, CVT_imm_95_8, 0, CVT_95_Reg, 1, CVT_Done },
969
  // Convert__Imm1_2__imm_95_8__Reg1_1
970
  { CVT_95_addImmOperands, 3, CVT_imm_95_8, 0, CVT_95_Reg, 2, CVT_Done },
971
  // Convert__Imm1_2__Imm1_0__Reg1_1
972
  { CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 1, CVT_95_Reg, 2, CVT_Done },
973
  // Convert__Imm1_3__imm_95_8__Reg1_2
974
  { CVT_95_addImmOperands, 4, CVT_imm_95_8, 0, CVT_95_Reg, 3, CVT_Done },
975
  // Convert__Imm1_3__Imm1_0__Reg1_2
976
  { CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 1, CVT_95_Reg, 3, CVT_Done },
977
  // Convert__Imm1_4__Imm1_0__Reg1_3
978
  { CVT_95_addImmOperands, 5, CVT_95_addImmOperands, 1, CVT_95_Reg, 4, CVT_Done },
979
  // Convert__Imm1_1__imm_95_9__Reg1_0
980
  { CVT_95_addImmOperands, 2, CVT_imm_95_9, 0, CVT_95_Reg, 1, CVT_Done },
981
  // Convert__Imm1_2__imm_95_9__Reg1_1
982
  { CVT_95_addImmOperands, 3, CVT_imm_95_9, 0, CVT_95_Reg, 2, CVT_Done },
983
  // Convert__Imm1_3__imm_95_9__Reg1_2
984
  { CVT_95_addImmOperands, 4, CVT_imm_95_9, 0, CVT_95_Reg, 3, CVT_Done },
985
  // Convert__Imm1_1__imm_95_6__Reg1_0
986
  { CVT_95_addImmOperands, 2, CVT_imm_95_6, 0, CVT_95_Reg, 1, CVT_Done },
987
  // Convert__Imm1_2__imm_95_6__Reg1_1
988
  { CVT_95_addImmOperands, 3, CVT_imm_95_6, 0, CVT_95_Reg, 2, CVT_Done },
989
  // Convert__Imm1_3__imm_95_6__Reg1_2
990
  { CVT_95_addImmOperands, 4, CVT_imm_95_6, 0, CVT_95_Reg, 3, CVT_Done },
991
  // Convert__Imm1_1__imm_95_11__Reg1_0
992
  { CVT_95_addImmOperands, 2, CVT_imm_95_11, 0, CVT_95_Reg, 1, CVT_Done },
993
  // Convert__Imm1_2__imm_95_11__Reg1_1
994
  { CVT_95_addImmOperands, 3, CVT_imm_95_11, 0, CVT_95_Reg, 2, CVT_Done },
995
  // Convert__Imm1_3__imm_95_11__Reg1_2
996
  { CVT_95_addImmOperands, 4, CVT_imm_95_11, 0, CVT_95_Reg, 3, CVT_Done },
997
  // Convert__Imm1_1__imm_95_4__Reg1_0
998
  { CVT_95_addImmOperands, 2, CVT_imm_95_4, 0, CVT_95_Reg, 1, CVT_Done },
999
  // Convert__Imm1_2__imm_95_4__Reg1_1
1000
  { CVT_95_addImmOperands, 3, CVT_imm_95_4, 0, CVT_95_Reg, 2, CVT_Done },
1001
  // Convert__Imm1_3__imm_95_4__Reg1_2
1002
  { CVT_95_addImmOperands, 4, CVT_imm_95_4, 0, CVT_95_Reg, 3, CVT_Done },
1003
  // Convert__Imm1_1__imm_95_13__Reg1_0
1004
  { CVT_95_addImmOperands, 2, CVT_imm_95_13, 0, CVT_95_Reg, 1, CVT_Done },
1005
  // Convert__Imm1_2__imm_95_13__Reg1_1
1006
  { CVT_95_addImmOperands, 3, CVT_imm_95_13, 0, CVT_95_Reg, 2, CVT_Done },
1007
  // Convert__Imm1_3__imm_95_13__Reg1_2
1008
  { CVT_95_addImmOperands, 4, CVT_imm_95_13, 0, CVT_95_Reg, 3, CVT_Done },
1009
  // Convert__Imm1_1__imm_95_2__Reg1_0
1010
  { CVT_95_addImmOperands, 2, CVT_imm_95_2, 0, CVT_95_Reg, 1, CVT_Done },
1011
  // Convert__Imm1_2__imm_95_2__Reg1_1
1012
  { CVT_95_addImmOperands, 3, CVT_imm_95_2, 0, CVT_95_Reg, 2, CVT_Done },
1013
  // Convert__Imm1_3__imm_95_2__Reg1_2
1014
  { CVT_95_addImmOperands, 4, CVT_imm_95_2, 0, CVT_95_Reg, 3, CVT_Done },
1015
  // Convert__Imm1_1__imm_95_0__Reg1_0
1016
  { CVT_95_addImmOperands, 2, CVT_imm_95_0, 0, CVT_95_Reg, 1, CVT_Done },
1017
  // Convert__Imm1_2__imm_95_0__Reg1_1
1018
  { CVT_95_addImmOperands, 3, CVT_imm_95_0, 0, CVT_95_Reg, 2, CVT_Done },
1019
  // Convert__Imm1_3__imm_95_0__Reg1_2
1020
  { CVT_95_addImmOperands, 4, CVT_imm_95_0, 0, CVT_95_Reg, 3, CVT_Done },
1021
  // Convert__Imm1_1__imm_95_1__Reg1_0
1022
  { CVT_95_addImmOperands, 2, CVT_imm_95_1, 0, CVT_95_Reg, 1, CVT_Done },
1023
  // Convert__Imm1_2__imm_95_1__Reg1_1
1024
  { CVT_95_addImmOperands, 3, CVT_imm_95_1, 0, CVT_95_Reg, 2, CVT_Done },
1025
  // Convert__Imm1_3__imm_95_1__Reg1_2
1026
  { CVT_95_addImmOperands, 4, CVT_imm_95_1, 0, CVT_95_Reg, 3, CVT_Done },
1027
  // Convert__Imm1_1__imm_95_15__Reg1_0
1028
  { CVT_95_addImmOperands, 2, CVT_imm_95_15, 0, CVT_95_Reg, 1, CVT_Done },
1029
  // Convert__Imm1_2__imm_95_15__Reg1_1
1030
  { CVT_95_addImmOperands, 3, CVT_imm_95_15, 0, CVT_95_Reg, 2, CVT_Done },
1031
  // Convert__Imm1_3__imm_95_15__Reg1_2
1032
  { CVT_95_addImmOperands, 4, CVT_imm_95_15, 0, CVT_95_Reg, 3, CVT_Done },
1033
  // Convert__Imm1_1__imm_95_7__Reg1_0
1034
  { CVT_95_addImmOperands, 2, CVT_imm_95_7, 0, CVT_95_Reg, 1, CVT_Done },
1035
  // Convert__Imm1_2__imm_95_7__Reg1_1
1036
  { CVT_95_addImmOperands, 3, CVT_imm_95_7, 0, CVT_95_Reg, 2, CVT_Done },
1037
  // Convert__Imm1_3__imm_95_7__Reg1_2
1038
  { CVT_95_addImmOperands, 4, CVT_imm_95_7, 0, CVT_95_Reg, 3, CVT_Done },
1039
  // Convert__Imm1_1__imm_95_10__Reg1_0
1040
  { CVT_95_addImmOperands, 2, CVT_imm_95_10, 0, CVT_95_Reg, 1, CVT_Done },
1041
  // Convert__Imm1_2__imm_95_10__Reg1_1
1042
  { CVT_95_addImmOperands, 3, CVT_imm_95_10, 0, CVT_95_Reg, 2, CVT_Done },
1043
  // Convert__Imm1_3__imm_95_10__Reg1_2
1044
  { CVT_95_addImmOperands, 4, CVT_imm_95_10, 0, CVT_95_Reg, 3, CVT_Done },
1045
  // Convert__Imm1_1__imm_95_5__Reg1_0
1046
  { CVT_95_addImmOperands, 2, CVT_imm_95_5, 0, CVT_95_Reg, 1, CVT_Done },
1047
  // Convert__Imm1_2__imm_95_5__Reg1_1
1048
  { CVT_95_addImmOperands, 3, CVT_imm_95_5, 0, CVT_95_Reg, 2, CVT_Done },
1049
  // Convert__Imm1_3__imm_95_5__Reg1_2
1050
  { CVT_95_addImmOperands, 4, CVT_imm_95_5, 0, CVT_95_Reg, 3, CVT_Done },
1051
  // Convert__Imm1_1__imm_95_12__Reg1_0
1052
  { CVT_95_addImmOperands, 2, CVT_imm_95_12, 0, CVT_95_Reg, 1, CVT_Done },
1053
  // Convert__Imm1_2__imm_95_12__Reg1_1
1054
  { CVT_95_addImmOperands, 3, CVT_imm_95_12, 0, CVT_95_Reg, 2, CVT_Done },
1055
  // Convert__Imm1_3__imm_95_12__Reg1_2
1056
  { CVT_95_addImmOperands, 4, CVT_imm_95_12, 0, CVT_95_Reg, 3, CVT_Done },
1057
  // Convert__Imm1_1__imm_95_3__Reg1_0
1058
  { CVT_95_addImmOperands, 2, CVT_imm_95_3, 0, CVT_95_Reg, 1, CVT_Done },
1059
  // Convert__Imm1_2__imm_95_3__Reg1_1
1060
  { CVT_95_addImmOperands, 3, CVT_imm_95_3, 0, CVT_95_Reg, 2, CVT_Done },
1061
  // Convert__Imm1_3__imm_95_3__Reg1_2
1062
  { CVT_95_addImmOperands, 4, CVT_imm_95_3, 0, CVT_95_Reg, 3, CVT_Done },
1063
  // Convert__Imm1_1__imm_95_14__Reg1_0
1064
  { CVT_95_addImmOperands, 2, CVT_imm_95_14, 0, CVT_95_Reg, 1, CVT_Done },
1065
  // Convert__Imm1_2__imm_95_14__Reg1_1
1066
  { CVT_95_addImmOperands, 3, CVT_imm_95_14, 0, CVT_95_Reg, 2, CVT_Done },
1067
  // Convert__Imm1_3__imm_95_14__Reg1_2
1068
  { CVT_95_addImmOperands, 4, CVT_imm_95_14, 0, CVT_95_Reg, 3, CVT_Done },
1069
  // Convert__regFCC0__Reg1_0__Reg1_1
1070
  { CVT_regFCC0, 0, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Done },
1071
  // Convert__Reg1_0__Reg1_1__Reg1_2
1072
  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done },
1073
  // Convert_NoOperands
1074
  { CVT_Done },
1075
  // Convert__MEMri2_0
1076
  { CVT_95_addMEMriOperands, 1, CVT_Done },
1077
  // Convert__MEMrr2_0
1078
  { CVT_95_addMEMrrOperands, 1, CVT_Done },
1079
  // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8
1080
  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_8, 0, CVT_Done },
1081
  // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_8
1082
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_8, 0, CVT_Done },
1083
  // Convert__Reg1_3__Reg1_2__Tie0_1_1__Imm1_0
1084
  { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 1, CVT_Done },
1085
  // Convert__Reg1_3__Reg1_1__Reg1_2__Tie0_1_1__Imm1_0
1086
  { CVT_95_Reg, 4, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 1, CVT_Done },
1087
  // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13
1088
  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_13, 0, CVT_Done },
1089
  // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5
1090
  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_5, 0, CVT_Done },
1091
  // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1
1092
  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_1, 0, CVT_Done },
1093
  // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_9
1094
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_9, 0, CVT_Done },
1095
  // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_10
1096
  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_10, 0, CVT_Done },
1097
  // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_6
1098
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_6, 0, CVT_Done },
1099
  // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_11
1100
  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_11, 0, CVT_Done },
1101
  // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_11
1102
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_11, 0, CVT_Done },
1103
  // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_12
1104
  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_12, 0, CVT_Done },
1105
  // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_3
1106
  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_3, 0, CVT_Done },
1107
  // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_4
1108
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_4, 0, CVT_Done },
1109
  // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_2
1110
  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_2, 0, CVT_Done },
1111
  // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_13
1112
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_13, 0, CVT_Done },
1113
  // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_4
1114
  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_4, 0, CVT_Done },
1115
  // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_2
1116
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_2, 0, CVT_Done },
1117
  // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_0
1118
  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_0, 0, CVT_Done },
1119
  // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_0
1120
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_0, 0, CVT_Done },
1121
  // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9
1122
  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_9, 0, CVT_Done },
1123
  // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_1
1124
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_1, 0, CVT_Done },
1125
  // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_6
1126
  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_6, 0, CVT_Done },
1127
  // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_15
1128
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_15, 0, CVT_Done },
1129
  // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_14
1130
  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_14, 0, CVT_Done },
1131
  // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_7
1132
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_7, 0, CVT_Done },
1133
  // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_10
1134
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_10, 0, CVT_Done },
1135
  // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_5
1136
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_5, 0, CVT_Done },
1137
  // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_12
1138
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_12, 0, CVT_Done },
1139
  // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_3
1140
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_3, 0, CVT_Done },
1141
  // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_14
1142
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_14, 0, CVT_Done },
1143
  // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_15
1144
  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_15, 0, CVT_Done },
1145
  // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_7
1146
  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_7, 0, CVT_Done },
1147
  // Convert__Reg1_0__Tie0_1_1
1148
  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_Done },
1149
  // Convert__regG0__MEMri2_0
1150
  { CVT_regG0, 0, CVT_95_addMEMriOperands, 1, CVT_Done },
1151
  // Convert__regG0__MEMrr2_0
1152
  { CVT_regG0, 0, CVT_95_addMEMrrOperands, 1, CVT_Done },
1153
  // Convert__Reg1_1__MEMri2_0
1154
  { CVT_95_Reg, 2, CVT_95_addMEMriOperands, 1, CVT_Done },
1155
  // Convert__Reg1_1__MEMrr2_0
1156
  { CVT_95_Reg, 2, CVT_95_addMEMrrOperands, 1, CVT_Done },
1157
  // Convert__MEMri2_1
1158
  { CVT_95_addMEMriOperands, 2, CVT_Done },
1159
  // Convert__Reg1_3__MEMri2_1
1160
  { CVT_95_Reg, 4, CVT_95_addMEMriOperands, 2, CVT_Done },
1161
  // Convert__MEMrr2_1
1162
  { CVT_95_addMEMrrOperands, 2, CVT_Done },
1163
  // Convert__Reg1_3__MEMrr2_1
1164
  { CVT_95_Reg, 4, CVT_95_addMEMrrOperands, 2, CVT_Done },
1165
  // Convert__Reg1_3__MEMrr2_1__Imm1_4
1166
  { CVT_95_Reg, 4, CVT_95_addMEMrrOperands, 2, CVT_95_addImmOperands, 5, CVT_Done },
1167
  // Convert__Reg1_4__MEMrr2_1__Imm1_3
1168
  { CVT_95_Reg, 5, CVT_95_addMEMrrOperands, 2, CVT_95_addImmOperands, 4, CVT_Done },
1169
  // Convert__Reg1_1
1170
  { CVT_95_Reg, 2, CVT_Done },
1171
  // Convert__regG0__Reg1_0
1172
  { CVT_regG0, 0, CVT_95_Reg, 1, CVT_Done },
1173
  // Convert__Reg1_1__regG0__Reg1_0
1174
  { CVT_95_Reg, 2, CVT_regG0, 0, CVT_95_Reg, 1, CVT_Done },
1175
  // Convert__regG0__Imm1_0
1176
  { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_Done },
1177
  // Convert__Reg1_1__regG0__Imm1_0
1178
  { CVT_95_Reg, 2, CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_Done },
1179
  // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_8
1180
  { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_8, 0, CVT_Done },
1181
  // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_8
1182
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_8, 0, CVT_Done },
1183
  // Convert__Reg1_3__Imm1_2__Tie0_1_1__Imm1_0
1184
  { CVT_95_Reg, 4, CVT_95_addImmOperands, 3, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 1, CVT_Done },
1185
  // Convert__Reg1_3__Reg1_1__Imm1_2__Tie0_1_1__Imm1_0
1186
  { CVT_95_Reg, 4, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 1, CVT_Done },
1187
  // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_13
1188
  { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_13, 0, CVT_Done },
1189
  // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_5
1190
  { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_5, 0, CVT_Done },
1191
  // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_1
1192
  { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_1, 0, CVT_Done },
1193
  // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_9
1194
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_9, 0, CVT_Done },
1195
  // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_10
1196
  { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_10, 0, CVT_Done },
1197
  // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_6
1198
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_6, 0, CVT_Done },
1199
  // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_11
1200
  { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_11, 0, CVT_Done },
1201
  // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_11
1202
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_11, 0, CVT_Done },
1203
  // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_12
1204
  { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_12, 0, CVT_Done },
1205
  // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_3
1206
  { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_3, 0, CVT_Done },
1207
  // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_4
1208
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_4, 0, CVT_Done },
1209
  // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_2
1210
  { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_2, 0, CVT_Done },
1211
  // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_13
1212
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_13, 0, CVT_Done },
1213
  // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_4
1214
  { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_4, 0, CVT_Done },
1215
  // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_2
1216
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_2, 0, CVT_Done },
1217
  // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_0
1218
  { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_0, 0, CVT_Done },
1219
  // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_0
1220
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_0, 0, CVT_Done },
1221
  // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_9
1222
  { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_9, 0, CVT_Done },
1223
  // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_1
1224
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_1, 0, CVT_Done },
1225
  // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_6
1226
  { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_6, 0, CVT_Done },
1227
  // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_15
1228
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_15, 0, CVT_Done },
1229
  // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_14
1230
  { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_14, 0, CVT_Done },
1231
  // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_7
1232
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_7, 0, CVT_Done },
1233
  // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_10
1234
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_10, 0, CVT_Done },
1235
  // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_5
1236
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_5, 0, CVT_Done },
1237
  // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_12
1238
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_12, 0, CVT_Done },
1239
  // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_3
1240
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_3, 0, CVT_Done },
1241
  // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_14
1242
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_14, 0, CVT_Done },
1243
  // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_15
1244
  { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_15, 0, CVT_Done },
1245
  // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_7
1246
  { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_7, 0, CVT_Done },
1247
  // Convert__Reg1_0__regG0__Reg1_0
1248
  { CVT_95_Reg, 1, CVT_regG0, 0, CVT_95_Reg, 1, CVT_Done },
1249
  // Convert__Reg1_0__Reg1_0__regG0
1250
  { CVT_95_Reg, 1, CVT_95_Reg, 1, CVT_regG0, 0, CVT_Done },
1251
  // Convert__Reg1_1__Reg1_0__regG0
1252
  { CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_regG0, 0, CVT_Done },
1253
  // Convert__regG0__regG0__regG0
1254
  { CVT_regG0, 0, CVT_regG0, 0, CVT_regG0, 0, CVT_Done },
1255
  // Convert__imm_95_8
1256
  { CVT_imm_95_8, 0, CVT_Done },
1257
  // Convert__Reg1_1__Imm1_0
1258
  { CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
1259
  // Convert__Reg1_2__Reg1_0__Reg1_1__imm_95_0
1260
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_imm_95_0, 0, CVT_Done },
1261
  // Convert__Reg1_2__Reg1_0__Imm1_1__imm_95_0
1262
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_imm_95_0, 0, CVT_Done },
1263
  // Convert__MEMri2_2
1264
  { CVT_95_addMEMriOperands, 3, CVT_Done },
1265
  // Convert__MEMrr2_2
1266
  { CVT_95_addMEMrrOperands, 3, CVT_Done },
1267
  // Convert__MEMri2_2__Reg1_0
1268
  { CVT_95_addMEMriOperands, 3, CVT_95_Reg, 1, CVT_Done },
1269
  // Convert__MEMrr2_2__Reg1_0
1270
  { CVT_95_addMEMrrOperands, 3, CVT_95_Reg, 1, CVT_Done },
1271
  // Convert__MEMrr2_2__Reg1_0__Imm1_4
1272
  { CVT_95_addMEMrrOperands, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 5, CVT_Done },
1273
  // Convert__Reg1_3__MEMri2_1__Tie0_1_1
1274
  { CVT_95_Reg, 4, CVT_95_addMEMriOperands, 2, CVT_Tied, Tie0_1_1, CVT_Done },
1275
  // Convert__Reg1_3__MEMrr2_1__Tie0_1_1
1276
  { CVT_95_Reg, 4, CVT_95_addMEMrrOperands, 2, CVT_Tied, Tie0_1_1, CVT_Done },
1277
  // Convert__Reg1_4__MEMrr2_1__Imm1_3__Tie0_1_1
1278
  { CVT_95_Reg, 5, CVT_95_addMEMrrOperands, 2, CVT_95_addImmOperands, 4, CVT_Tied, Tie0_1_1, CVT_Done },
1279
  // Convert__regG0__Reg1_0__imm_95_8
1280
  { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_8, 0, CVT_Done },
1281
  // Convert__regG0__Imm1_0__imm_95_8
1282
  { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_8, 0, CVT_Done },
1283
  // Convert__regG0__Reg1_1__imm_95_8
1284
  { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_8, 0, CVT_Done },
1285
  // Convert__regG0__Imm1_1__imm_95_8
1286
  { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_8, 0, CVT_Done },
1287
  // Convert__Reg1_0__Reg1_2__imm_95_8
1288
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_8, 0, CVT_Done },
1289
  // Convert__Reg1_0__Imm1_2__imm_95_8
1290
  { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_8, 0, CVT_Done },
1291
  // Convert__Reg1_1__Reg1_3__imm_95_8
1292
  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_8, 0, CVT_Done },
1293
  // Convert__Reg1_1__Imm1_3__imm_95_8
1294
  { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_8, 0, CVT_Done },
1295
  // Convert__Reg1_1__Reg1_3__Imm1_0
1296
  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addImmOperands, 1, CVT_Done },
1297
  // Convert__Reg1_1__Imm1_3__Imm1_0
1298
  { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 1, CVT_Done },
1299
  // Convert__Reg1_2__Reg1_4__Imm1_0
1300
  { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addImmOperands, 1, CVT_Done },
1301
  // Convert__Reg1_2__Imm1_4__Imm1_0
1302
  { CVT_95_Reg, 3, CVT_95_addImmOperands, 5, CVT_95_addImmOperands, 1, CVT_Done },
1303
  // Convert__regG0__Reg1_0__imm_95_13
1304
  { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_13, 0, CVT_Done },
1305
  // Convert__regG0__Imm1_0__imm_95_13
1306
  { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_13, 0, CVT_Done },
1307
  // Convert__regG0__Reg1_1__imm_95_13
1308
  { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_13, 0, CVT_Done },
1309
  // Convert__regG0__Imm1_1__imm_95_13
1310
  { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_13, 0, CVT_Done },
1311
  // Convert__Reg1_0__Reg1_2__imm_95_13
1312
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_13, 0, CVT_Done },
1313
  // Convert__Reg1_0__Imm1_2__imm_95_13
1314
  { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_13, 0, CVT_Done },
1315
  // Convert__Reg1_1__Reg1_3__imm_95_13
1316
  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_13, 0, CVT_Done },
1317
  // Convert__Reg1_1__Imm1_3__imm_95_13
1318
  { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_13, 0, CVT_Done },
1319
  // Convert__regG0__Reg1_0__imm_95_5
1320
  { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_5, 0, CVT_Done },
1321
  // Convert__regG0__Imm1_0__imm_95_5
1322
  { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_5, 0, CVT_Done },
1323
  // Convert__regG0__Reg1_1__imm_95_5
1324
  { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_5, 0, CVT_Done },
1325
  // Convert__regG0__Imm1_1__imm_95_5
1326
  { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_5, 0, CVT_Done },
1327
  // Convert__Reg1_0__Reg1_2__imm_95_5
1328
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_5, 0, CVT_Done },
1329
  // Convert__Reg1_0__Imm1_2__imm_95_5
1330
  { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_5, 0, CVT_Done },
1331
  // Convert__Reg1_1__Reg1_3__imm_95_5
1332
  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_5, 0, CVT_Done },
1333
  // Convert__Reg1_1__Imm1_3__imm_95_5
1334
  { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_5, 0, CVT_Done },
1335
  // Convert__regG0__Reg1_0__imm_95_1
1336
  { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_1, 0, CVT_Done },
1337
  // Convert__regG0__Imm1_0__imm_95_1
1338
  { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_1, 0, CVT_Done },
1339
  // Convert__regG0__Reg1_1__imm_95_1
1340
  { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_1, 0, CVT_Done },
1341
  // Convert__regG0__Imm1_1__imm_95_1
1342
  { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_1, 0, CVT_Done },
1343
  // Convert__Reg1_0__Reg1_2__imm_95_1
1344
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_1, 0, CVT_Done },
1345
  // Convert__Reg1_0__Imm1_2__imm_95_1
1346
  { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_1, 0, CVT_Done },
1347
  // Convert__Reg1_1__Reg1_3__imm_95_1
1348
  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_1, 0, CVT_Done },
1349
  // Convert__Reg1_1__Imm1_3__imm_95_1
1350
  { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_1, 0, CVT_Done },
1351
  // Convert__regG0__Reg1_0__imm_95_10
1352
  { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_10, 0, CVT_Done },
1353
  // Convert__regG0__Imm1_0__imm_95_10
1354
  { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_10, 0, CVT_Done },
1355
  // Convert__regG0__Reg1_1__imm_95_10
1356
  { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_10, 0, CVT_Done },
1357
  // Convert__regG0__Imm1_1__imm_95_10
1358
  { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_10, 0, CVT_Done },
1359
  // Convert__Reg1_0__Reg1_2__imm_95_10
1360
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_10, 0, CVT_Done },
1361
  // Convert__Reg1_0__Imm1_2__imm_95_10
1362
  { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_10, 0, CVT_Done },
1363
  // Convert__Reg1_1__Reg1_3__imm_95_10
1364
  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_10, 0, CVT_Done },
1365
  // Convert__Reg1_1__Imm1_3__imm_95_10
1366
  { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_10, 0, CVT_Done },
1367
  // Convert__regG0__Reg1_0__imm_95_11
1368
  { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_11, 0, CVT_Done },
1369
  // Convert__regG0__Imm1_0__imm_95_11
1370
  { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_11, 0, CVT_Done },
1371
  // Convert__regG0__Reg1_1__imm_95_11
1372
  { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_11, 0, CVT_Done },
1373
  // Convert__regG0__Imm1_1__imm_95_11
1374
  { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_11, 0, CVT_Done },
1375
  // Convert__Reg1_0__Reg1_2__imm_95_11
1376
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_11, 0, CVT_Done },
1377
  // Convert__Reg1_0__Imm1_2__imm_95_11
1378
  { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_11, 0, CVT_Done },
1379
  // Convert__Reg1_1__Reg1_3__imm_95_11
1380
  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_11, 0, CVT_Done },
1381
  // Convert__Reg1_1__Imm1_3__imm_95_11
1382
  { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_11, 0, CVT_Done },
1383
  // Convert__regG0__Reg1_0__imm_95_12
1384
  { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_12, 0, CVT_Done },
1385
  // Convert__regG0__Imm1_0__imm_95_12
1386
  { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_12, 0, CVT_Done },
1387
  // Convert__regG0__Reg1_1__imm_95_12
1388
  { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_12, 0, CVT_Done },
1389
  // Convert__regG0__Imm1_1__imm_95_12
1390
  { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_12, 0, CVT_Done },
1391
  // Convert__Reg1_0__Reg1_2__imm_95_12
1392
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_12, 0, CVT_Done },
1393
  // Convert__Reg1_0__Imm1_2__imm_95_12
1394
  { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_12, 0, CVT_Done },
1395
  // Convert__Reg1_1__Reg1_3__imm_95_12
1396
  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_12, 0, CVT_Done },
1397
  // Convert__Reg1_1__Imm1_3__imm_95_12
1398
  { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_12, 0, CVT_Done },
1399
  // Convert__regG0__Reg1_0__imm_95_3
1400
  { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_3, 0, CVT_Done },
1401
  // Convert__regG0__Imm1_0__imm_95_3
1402
  { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_3, 0, CVT_Done },
1403
  // Convert__regG0__Reg1_1__imm_95_3
1404
  { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_3, 0, CVT_Done },
1405
  // Convert__regG0__Imm1_1__imm_95_3
1406
  { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_3, 0, CVT_Done },
1407
  // Convert__Reg1_0__Reg1_2__imm_95_3
1408
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_3, 0, CVT_Done },
1409
  // Convert__Reg1_0__Imm1_2__imm_95_3
1410
  { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_3, 0, CVT_Done },
1411
  // Convert__Reg1_1__Reg1_3__imm_95_3
1412
  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_3, 0, CVT_Done },
1413
  // Convert__Reg1_1__Imm1_3__imm_95_3
1414
  { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_3, 0, CVT_Done },
1415
  // Convert__regG0__Reg1_0__imm_95_2
1416
  { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_2, 0, CVT_Done },
1417
  // Convert__regG0__Imm1_0__imm_95_2
1418
  { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_2, 0, CVT_Done },
1419
  // Convert__regG0__Reg1_1__imm_95_2
1420
  { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_2, 0, CVT_Done },
1421
  // Convert__regG0__Imm1_1__imm_95_2
1422
  { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_2, 0, CVT_Done },
1423
  // Convert__Reg1_0__Reg1_2__imm_95_2
1424
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_2, 0, CVT_Done },
1425
  // Convert__Reg1_0__Imm1_2__imm_95_2
1426
  { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_2, 0, CVT_Done },
1427
  // Convert__Reg1_1__Reg1_3__imm_95_2
1428
  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_2, 0, CVT_Done },
1429
  // Convert__Reg1_1__Imm1_3__imm_95_2
1430
  { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_2, 0, CVT_Done },
1431
  // Convert__regG0__Reg1_0__imm_95_4
1432
  { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_4, 0, CVT_Done },
1433
  // Convert__regG0__Imm1_0__imm_95_4
1434
  { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_4, 0, CVT_Done },
1435
  // Convert__regG0__Reg1_1__imm_95_4
1436
  { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_4, 0, CVT_Done },
1437
  // Convert__regG0__Imm1_1__imm_95_4
1438
  { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_4, 0, CVT_Done },
1439
  // Convert__Reg1_0__Reg1_2__imm_95_4
1440
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_4, 0, CVT_Done },
1441
  // Convert__Reg1_0__Imm1_2__imm_95_4
1442
  { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_4, 0, CVT_Done },
1443
  // Convert__Reg1_1__Reg1_3__imm_95_4
1444
  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_4, 0, CVT_Done },
1445
  // Convert__Reg1_1__Imm1_3__imm_95_4
1446
  { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_4, 0, CVT_Done },
1447
  // Convert__regG0__Reg1_0__imm_95_0
1448
  { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_0, 0, CVT_Done },
1449
  // Convert__regG0__Imm1_0__imm_95_0
1450
  { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_0, 0, CVT_Done },
1451
  // Convert__regG0__Reg1_1__imm_95_0
1452
  { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_0, 0, CVT_Done },
1453
  // Convert__regG0__Imm1_1__imm_95_0
1454
  { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_0, 0, CVT_Done },
1455
  // Convert__Reg1_0__Reg1_2__imm_95_0
1456
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_0, 0, CVT_Done },
1457
  // Convert__Reg1_0__Imm1_2__imm_95_0
1458
  { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_0, 0, CVT_Done },
1459
  // Convert__Reg1_1__Reg1_3__imm_95_0
1460
  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_0, 0, CVT_Done },
1461
  // Convert__Reg1_1__Imm1_3__imm_95_0
1462
  { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_0, 0, CVT_Done },
1463
  // Convert__regG0__Reg1_0__imm_95_9
1464
  { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_9, 0, CVT_Done },
1465
  // Convert__regG0__Imm1_0__imm_95_9
1466
  { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_9, 0, CVT_Done },
1467
  // Convert__regG0__Reg1_1__imm_95_9
1468
  { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_9, 0, CVT_Done },
1469
  // Convert__regG0__Imm1_1__imm_95_9
1470
  { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_9, 0, CVT_Done },
1471
  // Convert__Reg1_0__Reg1_2__imm_95_9
1472
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_9, 0, CVT_Done },
1473
  // Convert__Reg1_0__Imm1_2__imm_95_9
1474
  { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_9, 0, CVT_Done },
1475
  // Convert__Reg1_1__Reg1_3__imm_95_9
1476
  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_9, 0, CVT_Done },
1477
  // Convert__Reg1_1__Imm1_3__imm_95_9
1478
  { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_9, 0, CVT_Done },
1479
  // Convert__regG0__Reg1_0__imm_95_6
1480
  { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_6, 0, CVT_Done },
1481
  // Convert__regG0__Imm1_0__imm_95_6
1482
  { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_6, 0, CVT_Done },
1483
  // Convert__regG0__Reg1_1__imm_95_6
1484
  { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_6, 0, CVT_Done },
1485
  // Convert__regG0__Imm1_1__imm_95_6
1486
  { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_6, 0, CVT_Done },
1487
  // Convert__Reg1_0__Reg1_2__imm_95_6
1488
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_6, 0, CVT_Done },
1489
  // Convert__Reg1_0__Imm1_2__imm_95_6
1490
  { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_6, 0, CVT_Done },
1491
  // Convert__Reg1_1__Reg1_3__imm_95_6
1492
  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_6, 0, CVT_Done },
1493
  // Convert__Reg1_1__Imm1_3__imm_95_6
1494
  { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_6, 0, CVT_Done },
1495
  // Convert__regG0__Reg1_0__imm_95_14
1496
  { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_14, 0, CVT_Done },
1497
  // Convert__regG0__Imm1_0__imm_95_14
1498
  { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_14, 0, CVT_Done },
1499
  // Convert__regG0__Reg1_1__imm_95_14
1500
  { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_14, 0, CVT_Done },
1501
  // Convert__regG0__Imm1_1__imm_95_14
1502
  { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_14, 0, CVT_Done },
1503
  // Convert__Reg1_0__Reg1_2__imm_95_14
1504
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_14, 0, CVT_Done },
1505
  // Convert__Reg1_0__Imm1_2__imm_95_14
1506
  { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_14, 0, CVT_Done },
1507
  // Convert__Reg1_1__Reg1_3__imm_95_14
1508
  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_14, 0, CVT_Done },
1509
  // Convert__Reg1_1__Imm1_3__imm_95_14
1510
  { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_14, 0, CVT_Done },
1511
  // Convert__regG0__Reg1_0__regG0
1512
  { CVT_regG0, 0, CVT_95_Reg, 1, CVT_regG0, 0, CVT_Done },
1513
  // Convert__regG0__Reg1_0__imm_95_15
1514
  { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_15, 0, CVT_Done },
1515
  // Convert__regG0__Imm1_0__imm_95_15
1516
  { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_15, 0, CVT_Done },
1517
  // Convert__regG0__Reg1_1__imm_95_15
1518
  { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_15, 0, CVT_Done },
1519
  // Convert__regG0__Imm1_1__imm_95_15
1520
  { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_15, 0, CVT_Done },
1521
  // Convert__Reg1_0__Reg1_2__imm_95_15
1522
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_15, 0, CVT_Done },
1523
  // Convert__Reg1_0__Imm1_2__imm_95_15
1524
  { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_15, 0, CVT_Done },
1525
  // Convert__Reg1_1__Reg1_3__imm_95_15
1526
  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_15, 0, CVT_Done },
1527
  // Convert__Reg1_1__Imm1_3__imm_95_15
1528
  { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_15, 0, CVT_Done },
1529
  // Convert__regG0__Reg1_0__imm_95_7
1530
  { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_7, 0, CVT_Done },
1531
  // Convert__regG0__Imm1_0__imm_95_7
1532
  { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_7, 0, CVT_Done },
1533
  // Convert__regG0__Reg1_1__imm_95_7
1534
  { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_7, 0, CVT_Done },
1535
  // Convert__regG0__Imm1_1__imm_95_7
1536
  { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_7, 0, CVT_Done },
1537
  // Convert__Reg1_0__Reg1_2__imm_95_7
1538
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_7, 0, CVT_Done },
1539
  // Convert__Reg1_0__Imm1_2__imm_95_7
1540
  { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_7, 0, CVT_Done },
1541
  // Convert__Reg1_1__Reg1_3__imm_95_7
1542
  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_7, 0, CVT_Done },
1543
  // Convert__Reg1_1__Imm1_3__imm_95_7
1544
  { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_7, 0, CVT_Done },
1545
};
1546
1547
void SparcAsmParser::
1548
convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode,
1549
1.77k
                const OperandVector &Operands) {
1550
1.77k
  assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!");
1551
1.77k
  const uint8_t *Converter = ConversionTable[Kind];
1552
1.77k
  unsigned OpIdx;
1553
1.77k
  Inst.setOpcode(Opcode);
1554
6.30k
  for (const uint8_t *p = Converter; *p; 
p+= 24.52k
) {
1555
4.52k
    OpIdx = *(p + 1);
1556
4.52k
    switch (*p) {
1557
4.52k
    
default: 0
llvm_unreachable0
("invalid conversion entry!");
1558
4.52k
    case CVT_Reg:
1559
0
      static_cast<SparcOperand&>(*Operands[OpIdx]).addRegOperands(Inst, 1);
1560
0
      break;
1561
4.52k
    case CVT_Tied: {
1562
105
      assert(OpIdx < (size_t)(std::end(TiedAsmOperandTable) -
1563
105
                          std::begin(TiedAsmOperandTable)) &&
1564
105
             "Tied operand not found");
1565
105
      unsigned TiedResOpnd = TiedAsmOperandTable[OpIdx][0];
1566
105
      if (TiedResOpnd != (uint8_t) -1)
1567
105
        Inst.addOperand(Inst.getOperand(TiedResOpnd));
1568
105
      break;
1569
4.52k
    }
1570
4.52k
    case CVT_95_Reg:
1571
2.07k
      static_cast<SparcOperand&>(*Operands[OpIdx]).addRegOperands(Inst, 1);
1572
2.07k
      break;
1573
4.52k
    case CVT_95_addImmOperands:
1574
992
      static_cast<SparcOperand&>(*Operands[OpIdx]).addImmOperands(Inst, 1);
1575
992
      break;
1576
4.52k
    case CVT_imm_95_8:
1577
42
      Inst.addOperand(MCOperand::createImm(8));
1578
42
      break;
1579
4.52k
    case CVT_imm_95_13:
1580
51
      Inst.addOperand(MCOperand::createImm(13));
1581
51
      break;
1582
4.52k
    case CVT_imm_95_5:
1583
52
      Inst.addOperand(MCOperand::createImm(5));
1584
52
      break;
1585
4.52k
    case CVT_imm_95_1:
1586
75
      Inst.addOperand(MCOperand::createImm(1));
1587
75
      break;
1588
4.52k
    case CVT_imm_95_10:
1589
50
      Inst.addOperand(MCOperand::createImm(10));
1590
50
      break;
1591
4.52k
    case CVT_imm_95_11:
1592
49
      Inst.addOperand(MCOperand::createImm(11));
1593
49
      break;
1594
4.52k
    case CVT_imm_95_12:
1595
49
      Inst.addOperand(MCOperand::createImm(12));
1596
49
      break;
1597
4.52k
    case CVT_imm_95_3:
1598
49
      Inst.addOperand(MCOperand::createImm(3));
1599
49
      break;
1600
4.52k
    case CVT_imm_95_2:
1601
49
      Inst.addOperand(MCOperand::createImm(2));
1602
49
      break;
1603
4.52k
    case CVT_imm_95_4:
1604
50
      Inst.addOperand(MCOperand::createImm(4));
1605
50
      break;
1606
4.52k
    case CVT_imm_95_0:
1607
33
      Inst.addOperand(MCOperand::createImm(0));
1608
33
      break;
1609
4.52k
    case CVT_imm_95_9:
1610
56
      Inst.addOperand(MCOperand::createImm(9));
1611
56
      break;
1612
4.52k
    case CVT_imm_95_6:
1613
48
      Inst.addOperand(MCOperand::createImm(6));
1614
48
      break;
1615
4.52k
    case CVT_imm_95_14:
1616
49
      Inst.addOperand(MCOperand::createImm(14));
1617
49
      break;
1618
4.52k
    case CVT_regG0:
1619
288
      Inst.addOperand(MCOperand::createReg(SP::G0));
1620
288
      break;
1621
4.52k
    case CVT_imm_95_15:
1622
49
      Inst.addOperand(MCOperand::createImm(15));
1623
49
      break;
1624
4.52k
    case CVT_imm_95_7:
1625
49
      Inst.addOperand(MCOperand::createImm(7));
1626
49
      break;
1627
4.52k
    case CVT_regO7:
1628
10
      Inst.addOperand(MCOperand::createReg(SP::O7));
1629
10
      break;
1630
4.52k
    case CVT_95_addMEMriOperands:
1631
60
      static_cast<SparcOperand&>(*Operands[OpIdx]).addMEMriOperands(Inst, 2);
1632
60
      break;
1633
4.52k
    case CVT_95_addMEMrrOperands:
1634
186
      static_cast<SparcOperand&>(*Operands[OpIdx]).addMEMrrOperands(Inst, 2);
1635
186
      break;
1636
4.52k
    case CVT_regFCC0:
1637
12
      Inst.addOperand(MCOperand::createReg(SP::FCC0));
1638
12
      break;
1639
4.52k
    }
1640
4.52k
  }
1641
1.77k
}
1642
1643
void SparcAsmParser::
1644
convertToMapAndConstraints(unsigned Kind,
1645
0
                           const OperandVector &Operands) {
1646
0
  assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!");
1647
0
  unsigned NumMCOperands = 0;
1648
0
  const uint8_t *Converter = ConversionTable[Kind];
1649
0
  for (const uint8_t *p = Converter; *p; p+= 2) {
1650
0
    switch (*p) {
1651
0
    default: llvm_unreachable("invalid conversion entry!");
1652
0
    case CVT_Reg:
1653
0
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
1654
0
      Operands[*(p + 1)]->setConstraint("r");
1655
0
      ++NumMCOperands;
1656
0
      break;
1657
0
    case CVT_Tied:
1658
0
      ++NumMCOperands;
1659
0
      break;
1660
0
    case CVT_95_Reg:
1661
0
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
1662
0
      Operands[*(p + 1)]->setConstraint("r");
1663
0
      NumMCOperands += 1;
1664
0
      break;
1665
0
    case CVT_95_addImmOperands:
1666
0
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
1667
0
      Operands[*(p + 1)]->setConstraint("m");
1668
0
      NumMCOperands += 1;
1669
0
      break;
1670
0
    case CVT_imm_95_8:
1671
0
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
1672
0
      Operands[*(p + 1)]->setConstraint("");
1673
0
      ++NumMCOperands;
1674
0
      break;
1675
0
    case CVT_imm_95_13:
1676
0
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
1677
0
      Operands[*(p + 1)]->setConstraint("");
1678
0
      ++NumMCOperands;
1679
0
      break;
1680
0
    case CVT_imm_95_5:
1681
0
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
1682
0
      Operands[*(p + 1)]->setConstraint("");
1683
0
      ++NumMCOperands;
1684
0
      break;
1685
0
    case CVT_imm_95_1:
1686
0
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
1687
0
      Operands[*(p + 1)]->setConstraint("");
1688
0
      ++NumMCOperands;
1689
0
      break;
1690
0
    case CVT_imm_95_10:
1691
0
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
1692
0
      Operands[*(p + 1)]->setConstraint("");
1693
0
      ++NumMCOperands;
1694
0
      break;
1695
0
    case CVT_imm_95_11:
1696
0
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
1697
0
      Operands[*(p + 1)]->setConstraint("");
1698
0
      ++NumMCOperands;
1699
0
      break;
1700
0
    case CVT_imm_95_12:
1701
0
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
1702
0
      Operands[*(p + 1)]->setConstraint("");
1703
0
      ++NumMCOperands;
1704
0
      break;
1705
0
    case CVT_imm_95_3:
1706
0
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
1707
0
      Operands[*(p + 1)]->setConstraint("");
1708
0
      ++NumMCOperands;
1709
0
      break;
1710
0
    case CVT_imm_95_2:
1711
0
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
1712
0
      Operands[*(p + 1)]->setConstraint("");
1713
0
      ++NumMCOperands;
1714
0
      break;
1715
0
    case CVT_imm_95_4:
1716
0
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
1717
0
      Operands[*(p + 1)]->setConstraint("");
1718
0
      ++NumMCOperands;
1719
0
      break;
1720
0
    case CVT_imm_95_0:
1721
0
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
1722
0
      Operands[*(p + 1)]->setConstraint("");
1723
0
      ++NumMCOperands;
1724
0
      break;
1725
0
    case CVT_imm_95_9:
1726
0
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
1727
0
      Operands[*(p + 1)]->setConstraint("");
1728
0
      ++NumMCOperands;
1729
0
      break;
1730
0
    case CVT_imm_95_6:
1731
0
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
1732
0
      Operands[*(p + 1)]->setConstraint("");
1733
0
      ++NumMCOperands;
1734
0
      break;
1735
0
    case CVT_imm_95_14:
1736
0
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
1737
0
      Operands[*(p + 1)]->setConstraint("");
1738
0
      ++NumMCOperands;
1739
0
      break;
1740
0
    case CVT_regG0:
1741
0
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
1742
0
      Operands[*(p + 1)]->setConstraint("m");
1743
0
      ++NumMCOperands;
1744
0
      break;
1745
0
    case CVT_imm_95_15:
1746
0
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
1747
0
      Operands[*(p + 1)]->setConstraint("");
1748
0
      ++NumMCOperands;
1749
0
      break;
1750
0
    case CVT_imm_95_7:
1751
0
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
1752
0
      Operands[*(p + 1)]->setConstraint("");
1753
0
      ++NumMCOperands;
1754
0
      break;
1755
0
    case CVT_regO7:
1756
0
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
1757
0
      Operands[*(p + 1)]->setConstraint("m");
1758
0
      ++NumMCOperands;
1759
0
      break;
1760
0
    case CVT_95_addMEMriOperands:
1761
0
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
1762
0
      Operands[*(p + 1)]->setConstraint("m");
1763
0
      NumMCOperands += 2;
1764
0
      break;
1765
0
    case CVT_95_addMEMrrOperands:
1766
0
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
1767
0
      Operands[*(p + 1)]->setConstraint("m");
1768
0
      NumMCOperands += 2;
1769
0
      break;
1770
0
    case CVT_regFCC0:
1771
0
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
1772
0
      Operands[*(p + 1)]->setConstraint("m");
1773
0
      ++NumMCOperands;
1774
0
      break;
1775
0
    }
1776
0
  }
1777
0
}
1778
1779
namespace {
1780
1781
/// MatchClassKind - The kinds of classes which participate in
1782
/// instruction matching.
1783
enum MatchClassKind {
1784
  InvalidMatchClass = 0,
1785
  OptionalMatchClass = 1,
1786
  MCK__PCT_cq, // '%cq'
1787
  MCK__PCT_csr, // '%csr'
1788
  MCK__PCT_fcc0, // '%fcc0'
1789
  MCK__PCT_fq, // '%fq'
1790
  MCK__PCT_fsr, // '%fsr'
1791
  MCK__PCT_g0, // '%g0'
1792
  MCK__PCT_icc, // '%icc'
1793
  MCK__PCT_psr, // '%psr'
1794
  MCK__PCT_tbr, // '%tbr'
1795
  MCK__PCT_wim, // '%wim'
1796
  MCK__PCT_xcc, // '%xcc'
1797
  MCK__43_, // '+'
1798
  MCK_1, // '1'
1799
  MCK_10, // '10'
1800
  MCK_3, // '3'
1801
  MCK_5, // '5'
1802
  MCK__91_, // '['
1803
  MCK__93_, // ']'
1804
  MCK_a, // 'a'
1805
  MCK_pn, // 'pn'
1806
  MCK_pt, // 'pt'
1807
  MCK_LAST_TOKEN = MCK_pt,
1808
  MCK_FCCRegs, // register class 'FCCRegs'
1809
  MCK_LowQFPRegs, // register class 'LowQFPRegs'
1810
  MCK_PRRegs, // register class 'PRRegs'
1811
  MCK_CoprocPair, // register class 'CoprocPair'
1812
  MCK_IntPair, // register class 'IntPair'
1813
  MCK_LowDFPRegs, // register class 'LowDFPRegs'
1814
  MCK_QFPRegs, // register class 'QFPRegs'
1815
  MCK_ASRRegs, // register class 'ASRRegs'
1816
  MCK_CoprocRegs, // register class 'CoprocRegs'
1817
  MCK_DFPRegs, // register class 'DFPRegs'
1818
  MCK_FPRegs, // register class 'FPRegs'
1819
  MCK_IntRegs, // register class 'IntRegs,I64Regs'
1820
  MCK_LAST_REGISTER = MCK_IntRegs,
1821
  MCK_Imm, // user defined class 'ImmAsmOperand'
1822
  MCK_MEMri, // user defined class 'SparcMEMriAsmOperand'
1823
  MCK_MEMrr, // user defined class 'SparcMEMrrAsmOperand'
1824
  NumMatchClassKinds
1825
};
1826
1827
}
1828
1829
2.05k
static unsigned getDiagKindFromRegisterClass(MatchClassKind RegisterClass) {
1830
2.05k
  return MCTargetAsmParser::Match_InvalidOperand;
1831
2.05k
}
1832
1833
4.15k
static MatchClassKind matchTokenString(StringRef Name) {
1834
4.15k
  switch (Name.size()) {
1835
4.15k
  
default: break0
;
1836
4.15k
  case 1:  // 7 strings to match.
1837
2.21k
    switch (Name[0]) {
1838
2.21k
    
default: break0
;
1839
2.21k
    case '+':  // 1 string to match.
1840
144
      return MCK__43_;  // "+"
1841
2.21k
    case '1':  // 1 string to match.
1842
0
      return MCK_1;  // "1"
1843
2.21k
    case '3':  // 1 string to match.
1844
0
      return MCK_3;  // "3"
1845
2.21k
    case '5':  // 1 string to match.
1846
0
      return MCK_5;  // "5"
1847
2.21k
    case '[':  // 1 string to match.
1848
630
      return MCK__91_;  // "["
1849
2.21k
    case ']':  // 1 string to match.
1850
371
      return MCK__93_;  // "]"
1851
2.21k
    case 'a':  // 1 string to match.
1852
1.07k
      return MCK_a;  // "a"
1853
0
    }
1854
0
    break;
1855
795
  case 2:  // 3 strings to match.
1856
795
    switch (Name[0]) {
1857
795
    
default: break0
;
1858
795
    case '1':  // 1 string to match.
1859
0
      if (Name[1] != '0')
1860
0
        break;
1861
0
      return MCK_10;   // "10"
1862
795
    case 'p':  // 2 strings to match.
1863
795
      switch (Name[1]) {
1864
795
      
default: break0
;
1865
795
      case 'n':  // 1 string to match.
1866
343
        return MCK_pn;  // "pn"
1867
795
      case 't':  // 1 string to match.
1868
452
        return MCK_pt;  // "pt"
1869
0
      }
1870
0
      break;
1871
0
    }
1872
0
    break;
1873
24
  case 3:  // 3 strings to match.
1874
24
    if (Name[0] != '%')
1875
0
      break;
1876
24
    switch (Name[1]) {
1877
24
    
default: break0
;
1878
24
    case 'c':  // 1 string to match.
1879
5
      if (Name[2] != 'q')
1880
0
        break;
1881
5
      return MCK__PCT_cq;  // "%cq"
1882
19
    case 'f':  // 1 string to match.
1883
19
      if (Name[2] != 'q')
1884
0
        break;
1885
19
      return MCK__PCT_fq;  // "%fq"
1886
19
    case 'g':  // 1 string to match.
1887
0
      if (Name[2] != '0')
1888
0
        break;
1889
0
      return MCK__PCT_g0;  // "%g0"
1890
0
    }
1891
0
    break;
1892
1.12k
  case 4:  // 7 strings to match.
1893
1.12k
    if (Name[0] != '%')
1894
0
      break;
1895
1.12k
    switch (Name[1]) {
1896
1.12k
    
default: break0
;
1897
1.12k
    case 'c':  // 1 string to match.
1898
8
      if (memcmp(Name.data()+2, "sr", 2) != 0)
1899
0
        break;
1900
8
      return MCK__PCT_csr;   // "%csr"
1901
33
    case 'f':  // 1 string to match.
1902
33
      if (memcmp(Name.data()+2, "sr", 2) != 0)
1903
0
        break;
1904
33
      return MCK__PCT_fsr;   // "%fsr"
1905
333
    case 'i':  // 1 string to match.
1906
333
      if (memcmp(Name.data()+2, "cc", 2) != 0)
1907
0
        break;
1908
333
      return MCK__PCT_icc;   // "%icc"
1909
333
    case 'p':  // 1 string to match.
1910
24
      if (memcmp(Name.data()+2, "sr", 2) != 0)
1911
0
        break;
1912
24
      return MCK__PCT_psr;   // "%psr"
1913
48
    case 't':  // 1 string to match.
1914
48
      if (memcmp(Name.data()+2, "br", 2) != 0)
1915
0
        break;
1916
48
      return MCK__PCT_tbr;   // "%tbr"
1917
72
    case 'w':  // 1 string to match.
1918
72
      if (memcmp(Name.data()+2, "im", 2) != 0)
1919
0
        break;
1920
72
      return MCK__PCT_wim;   // "%wim"
1921
602
    case 'x':  // 1 string to match.
1922
602
      if (memcmp(Name.data()+2, "cc", 2) != 0)
1923
0
        break;
1924
602
      return MCK__PCT_xcc;  // "%xcc"
1925
0
    }
1926
0
    break;
1927
0
  case 5:  // 1 string to match.
1928
0
    if (memcmp(Name.data()+0, "%fcc0", 5) != 0)
1929
0
      break;
1930
0
    return MCK__PCT_fcc0;  // "%fcc0"
1931
0
  }
1932
0
  return InvalidMatchClass;
1933
0
}
1934
1935
/// isSubclass - Compute whether \p A is a subclass of \p B.
1936
12.5k
static bool isSubclass(MatchClassKind A, MatchClassKind B) {
1937
12.5k
  if (A == B)
1938
5.20k
    return true;
1939
7.34k
1940
7.34k
  switch (A) {
1941
7.34k
  default:
1942
7.34k
    return false;
1943
7.34k
1944
7.34k
  case MCK_LowQFPRegs:
1945
0
    return B == MCK_QFPRegs;
1946
7.34k
1947
7.34k
  case MCK_LowDFPRegs:
1948
0
    return B == MCK_DFPRegs;
1949
7.34k
  }
1950
7.34k
}
1951
1952
11.5k
static unsigned validateOperandClass(MCParsedAsmOperand &GOp, MatchClassKind Kind) {
1953
11.5k
  SparcOperand &Operand = (SparcOperand&)GOp;
1954
11.5k
  if (Kind == InvalidMatchClass)
1955
168
    return MCTargetAsmParser::Match_InvalidOperand;
1956
11.3k
1957
11.3k
  if (Operand.isToken() && 
Kind <= MCK_LAST_TOKEN5.11k
)
1958
4.15k
    return isSubclass(matchTokenString(Operand.getToken()), Kind) ?
1959
2.60k
             MCTargetAsmParser::Match_Success :
1960
4.15k
             
MCTargetAsmParser::Match_InvalidOperand1.55k
;
1961
7.23k
1962
7.23k
  switch (Kind) {
1963
7.23k
  
default: break4.58k
;
1964
7.23k
  // 'Imm' class
1965
7.23k
  case MCK_Imm: {
1966
1.96k
    DiagnosticPredicate DP(Operand.isImm());
1967
1.96k
    if (DP.isMatch())
1968
1.15k
      return MCTargetAsmParser::Match_Success;
1969
807
    break;
1970
807
    }
1971
807
  // 'MEMri' class
1972
807
  case MCK_MEMri: {
1973
368
    DiagnosticPredicate DP(Operand.isMEMri());
1974
368
    if (DP.isMatch())
1975
83
      return MCTargetAsmParser::Match_Success;
1976
285
    break;
1977
285
    }
1978
285
  // 'MEMrr' class
1979
319
  case MCK_MEMrr: {
1980
319
    DiagnosticPredicate DP(Operand.isMEMrr());
1981
319
    if (DP.isMatch())
1982
303
      return MCTargetAsmParser::Match_Success;
1983
16
    break;
1984
16
    }
1985
5.69k
  } // end switch (Kind)
1986
5.69k
1987
5.69k
  if (Operand.isReg()) {
1988
3.74k
    MatchClassKind OpKind;
1989
3.74k
    switch (Operand.getReg()) {
1990
3.74k
    
default: OpKind = InvalidMatchClass; break0
;
1991
3.74k
    
case SP::FCC0: OpKind = MCK_FCCRegs; break203
;
1992
3.74k
    
case SP::FCC1: OpKind = MCK_FCCRegs; break1
;
1993
3.74k
    
case SP::FCC2: OpKind = MCK_FCCRegs; break15
;
1994
3.74k
    
case SP::FCC3: OpKind = MCK_FCCRegs; break8
;
1995
3.74k
    
case SP::Y: OpKind = MCK_ASRRegs; break96
;
1996
3.74k
    
case SP::ASR1: OpKind = MCK_ASRRegs; break24
;
1997
3.74k
    
case SP::ASR2: OpKind = MCK_ASRRegs; break0
;
1998
3.74k
    
case SP::ASR3: OpKind = MCK_ASRRegs; break0
;
1999
3.74k
    
case SP::ASR4: OpKind = MCK_ASRRegs; break0
;
2000
3.74k
    
case SP::ASR5: OpKind = MCK_ASRRegs; break0
;
2001
3.74k
    
case SP::ASR6: OpKind = MCK_ASRRegs; break16
;
2002
3.74k
    
case SP::ASR7: OpKind = MCK_ASRRegs; break0
;
2003
3.74k
    
case SP::ASR8: OpKind = MCK_ASRRegs; break0
;
2004
3.74k
    
case SP::ASR9: OpKind = MCK_ASRRegs; break0
;
2005
3.74k
    
case SP::ASR10: OpKind = MCK_ASRRegs; break0
;
2006
3.74k
    
case SP::ASR11: OpKind = MCK_ASRRegs; break0
;
2007
3.74k
    
case SP::ASR12: OpKind = MCK_ASRRegs; break0
;
2008
3.74k
    
case SP::ASR13: OpKind = MCK_ASRRegs; break0
;
2009
3.74k
    
case SP::ASR14: OpKind = MCK_ASRRegs; break0
;
2010
3.74k
    
case SP::ASR15: OpKind = MCK_ASRRegs; break80
;
2011
3.74k
    
case SP::ASR16: OpKind = MCK_ASRRegs; break0
;
2012
3.74k
    
case SP::ASR17: OpKind = MCK_ASRRegs; break0
;
2013
3.74k
    
case SP::ASR18: OpKind = MCK_ASRRegs; break0
;
2014
3.74k
    
case SP::ASR19: OpKind = MCK_ASRRegs; break0
;
2015
3.74k
    
case SP::ASR20: OpKind = MCK_ASRRegs; break0
;
2016
3.74k
    
case SP::ASR21: OpKind = MCK_ASRRegs; break0
;
2017
3.74k
    
case SP::ASR22: OpKind = MCK_ASRRegs; break0
;
2018
3.74k
    
case SP::ASR23: OpKind = MCK_ASRRegs; break0
;
2019
3.74k
    
case SP::ASR24: OpKind = MCK_ASRRegs; break0
;
2020
3.74k
    
case SP::ASR25: OpKind = MCK_ASRRegs; break0
;
2021
3.74k
    
case SP::ASR26: OpKind = MCK_ASRRegs; break0
;
2022
3.74k
    
case SP::ASR27: OpKind = MCK_ASRRegs; break0
;
2023
3.74k
    
case SP::ASR28: OpKind = MCK_ASRRegs; break0
;
2024
3.74k
    
case SP::ASR29: OpKind = MCK_ASRRegs; break0
;
2025
3.74k
    
case SP::ASR30: OpKind = MCK_ASRRegs; break0
;
2026
3.74k
    
case SP::ASR31: OpKind = MCK_ASRRegs; break0
;
2027
3.74k
    
case SP::TPC: OpKind = MCK_PRRegs; break6
;
2028
3.74k
    
case SP::TNPC: OpKind = MCK_PRRegs; break6
;
2029
3.74k
    
case SP::TSTATE: OpKind = MCK_PRRegs; break6
;
2030
3.74k
    
case SP::TT: OpKind = MCK_PRRegs; break6
;
2031
3.74k
    
case SP::TICK: OpKind = MCK_PRRegs; break6
;
2032
3.74k
    
case SP::TBA: OpKind = MCK_PRRegs; break6
;
2033
3.74k
    
case SP::PSTATE: OpKind = MCK_PRRegs; break6
;
2034
3.74k
    
case SP::TL: OpKind = MCK_PRRegs; break6
;
2035
3.74k
    
case SP::PIL: OpKind = MCK_PRRegs; break6
;
2036
3.74k
    
case SP::CWP: OpKind = MCK_PRRegs; break6
;
2037
3.74k
    
case SP::CANSAVE: OpKind = MCK_PRRegs; break6
;
2038
3.74k
    
case SP::CANRESTORE: OpKind = MCK_PRRegs; break6
;
2039
3.74k
    
case SP::CLEANWIN: OpKind = MCK_PRRegs; break6
;
2040
3.74k
    
case SP::OTHERWIN: OpKind = MCK_PRRegs; break6
;
2041
3.74k
    
case SP::WSTATE: OpKind = MCK_PRRegs; break6
;
2042
3.74k
    
case SP::G0: OpKind = MCK_IntRegs; break19
;
2043
3.74k
    
case SP::G1: OpKind = MCK_IntRegs; break547
;
2044
3.74k
    
case SP::G2: OpKind = MCK_IntRegs; break186
;
2045
3.74k
    
case SP::G3: OpKind = MCK_IntRegs; break120
;
2046
3.74k
    
case SP::G4: OpKind = MCK_IntRegs; break1
;
2047
3.74k
    
case SP::G5: OpKind = MCK_IntRegs; break0
;
2048
3.74k
    
case SP::G6: OpKind = MCK_IntRegs; break105
;
2049
3.74k
    
case SP::G7: OpKind = MCK_IntRegs; break18
;
2050
3.74k
    
case SP::O0: OpKind = MCK_IntRegs; break109
;
2051
3.74k
    
case SP::O1: OpKind = MCK_IntRegs; break64
;
2052
3.74k
    
case SP::O2: OpKind = MCK_IntRegs; break287
;
2053
3.74k
    
case SP::O3: OpKind = MCK_IntRegs; break0
;
2054
3.74k
    
case SP::O4: OpKind = MCK_IntRegs; break11
;
2055
3.74k
    
case SP::O5: OpKind = MCK_IntRegs; break0
;
2056
3.74k
    
case SP::O6: OpKind = MCK_IntRegs; break12
;
2057
3.74k
    
case SP::O7: OpKind = MCK_IntRegs; break4
;
2058
3.74k
    
case SP::L0: OpKind = MCK_IntRegs; break19
;
2059
3.74k
    
case SP::L1: OpKind = MCK_IntRegs; break0
;
2060
3.74k
    
case SP::L2: OpKind = MCK_IntRegs; break0
;
2061
3.74k
    
case SP::L3: OpKind = MCK_IntRegs; break0
;
2062
3.74k
    
case SP::L4: OpKind = MCK_IntRegs; break0
;
2063
3.74k
    
case SP::L5: OpKind = MCK_IntRegs; break0
;
2064
3.74k
    
case SP::L6: OpKind = MCK_IntRegs; break22
;
2065
3.74k
    
case SP::L7: OpKind = MCK_IntRegs; break0
;
2066
3.74k
    
case SP::I0: OpKind = MCK_IntRegs; break624
;
2067
3.74k
    
case SP::I1: OpKind = MCK_IntRegs; break116
;
2068
3.74k
    
case SP::I2: OpKind = MCK_IntRegs; break114
;
2069
3.74k
    
case SP::I3: OpKind = MCK_IntRegs; break8
;
2070
3.74k
    
case SP::I4: OpKind = MCK_IntRegs; break11
;
2071
3.74k
    
case SP::I5: OpKind = MCK_IntRegs; break358
;
2072
3.74k
    
case SP::I6: OpKind = MCK_IntRegs; break45
;
2073
3.74k
    
case SP::I7: OpKind = MCK_IntRegs; break0
;
2074
3.74k
    
case SP::F0: OpKind = MCK_FPRegs; break70
;
2075
3.74k
    
case SP::F1: OpKind = MCK_FPRegs; break44
;
2076
3.74k
    
case SP::F2: OpKind = MCK_FPRegs; break53
;
2077
3.74k
    
case SP::F3: OpKind = MCK_FPRegs; break6
;
2078
3.74k
    
case SP::F4: OpKind = MCK_FPRegs; break63
;
2079
3.74k
    
case SP::F5: OpKind = MCK_FPRegs; break0
;
2080
3.74k
    
case SP::F6: OpKind = MCK_FPRegs; break0
;
2081
3.74k
    
case SP::F7: OpKind = MCK_FPRegs; break0
;
2082
3.74k
    
case SP::F8: OpKind = MCK_FPRegs; break14
;
2083
3.74k
    
case SP::F9: OpKind = MCK_FPRegs; break0
;
2084
3.74k
    
case SP::F10: OpKind = MCK_FPRegs; break0
;
2085
3.74k
    
case SP::F11: OpKind = MCK_FPRegs; break0
;
2086
3.74k
    
case SP::F12: OpKind = MCK_FPRegs; break0
;
2087
3.74k
    
case SP::F13: OpKind = MCK_FPRegs; break0
;
2088
3.74k
    
case SP::F14: OpKind = MCK_FPRegs; break0
;
2089
3.74k
    
case SP::F15: OpKind = MCK_FPRegs; break0
;
2090
3.74k
    
case SP::F16: OpKind = MCK_FPRegs; break0
;
2091
3.74k
    
case SP::F17: OpKind = MCK_FPRegs; break0
;
2092
3.74k
    
case SP::F18: OpKind = MCK_FPRegs; break0
;
2093
3.74k
    
case SP::F19: OpKind = MCK_FPRegs; break0
;
2094
3.74k
    
case SP::F20: OpKind = MCK_FPRegs; break12
;
2095
3.74k
    
case SP::F21: OpKind = MCK_FPRegs; break0
;
2096
3.74k
    
case SP::F22: OpKind = MCK_FPRegs; break0
;
2097
3.74k
    
case SP::F23: OpKind = MCK_FPRegs; break0
;
2098
3.74k
    
case SP::F24: OpKind = MCK_FPRegs; break0
;
2099
3.74k
    
case SP::F25: OpKind = MCK_FPRegs; break0
;
2100
3.74k
    
case SP::F26: OpKind = MCK_FPRegs; break0
;
2101
3.74k
    
case SP::F27: OpKind = MCK_FPRegs; break0
;
2102
3.74k
    
case SP::F28: OpKind = MCK_FPRegs; break0
;
2103
3.74k
    
case SP::F29: OpKind = MCK_FPRegs; break18
;
2104
3.74k
    
case SP::F30: OpKind = MCK_FPRegs; break0
;
2105
3.74k
    
case SP::F31: OpKind = MCK_FPRegs; break1
;
2106
3.74k
    
case SP::D0: OpKind = MCK_LowDFPRegs; break0
;
2107
3.74k
    
case SP::D1: OpKind = MCK_LowDFPRegs; break0
;
2108
3.74k
    
case SP::D2: OpKind = MCK_LowDFPRegs; break0
;
2109
3.74k
    
case SP::D3: OpKind = MCK_LowDFPRegs; break0
;
2110
3.74k
    
case SP::D4: OpKind = MCK_LowDFPRegs; break0
;
2111
3.74k
    
case SP::D5: OpKind = MCK_LowDFPRegs; break0
;
2112
3.74k
    
case SP::D6: OpKind = MCK_LowDFPRegs; break0
;
2113
3.74k
    
case SP::D7: OpKind = MCK_LowDFPRegs; break0
;
2114
3.74k
    
case SP::D8: OpKind = MCK_LowDFPRegs; break0
;
2115
3.74k
    
case SP::D9: OpKind = MCK_LowDFPRegs; break0
;
2116
3.74k
    
case SP::D10: OpKind = MCK_LowDFPRegs; break0
;
2117
3.74k
    
case SP::D11: OpKind = MCK_LowDFPRegs; break0
;
2118
3.74k
    
case SP::D12: OpKind = MCK_LowDFPRegs; break0
;
2119
3.74k
    
case SP::D13: OpKind = MCK_LowDFPRegs; break0
;
2120
3.74k
    
case SP::D14: OpKind = MCK_LowDFPRegs; break0
;
2121
3.74k
    
case SP::D15: OpKind = MCK_LowDFPRegs; break0
;
2122
3.74k
    
case SP::C0: OpKind = MCK_CoprocRegs; break0
;
2123
3.74k
    
case SP::C1: OpKind = MCK_CoprocRegs; break0
;
2124
3.74k
    
case SP::C2: OpKind = MCK_CoprocRegs; break0
;
2125
3.74k
    
case SP::C3: OpKind = MCK_CoprocRegs; break0
;
2126
3.74k
    
case SP::C4: OpKind = MCK_CoprocRegs; break59
;
2127
3.74k
    
case SP::C5: OpKind = MCK_CoprocRegs; break0
;
2128
3.74k
    
case SP::C6: OpKind = MCK_CoprocRegs; break0
;
2129
3.74k
    
case SP::C7: OpKind = MCK_CoprocRegs; break0
;
2130
3.74k
    
case SP::C8: OpKind = MCK_CoprocRegs; break0
;
2131
3.74k
    
case SP::C9: OpKind = MCK_CoprocRegs; break0
;
2132
3.74k
    
case SP::C10: OpKind = MCK_CoprocRegs; break0
;
2133
3.74k
    
case SP::C11: OpKind = MCK_CoprocRegs; break0
;
2134
3.74k
    
case SP::C12: OpKind = MCK_CoprocRegs; break0
;
2135
3.74k
    
case SP::C13: OpKind = MCK_CoprocRegs; break0
;
2136
3.74k
    
case SP::C14: OpKind = MCK_CoprocRegs; break0
;
2137
3.74k
    
case SP::C15: OpKind = MCK_CoprocRegs; break0
;
2138
3.74k
    
case SP::C16: OpKind = MCK_CoprocRegs; break0
;
2139
3.74k
    
case SP::C17: OpKind = MCK_CoprocRegs; break0
;
2140
3.74k
    
case SP::C18: OpKind = MCK_CoprocRegs; break0
;
2141
3.74k
    
case SP::C19: OpKind = MCK_CoprocRegs; break9
;
2142
3.74k
    
case SP::C20: OpKind = MCK_CoprocRegs; break0
;
2143
3.74k
    
case SP::C21: OpKind = MCK_CoprocRegs; break0
;
2144
3.74k
    
case SP::C22: OpKind = MCK_CoprocRegs; break0
;
2145
3.74k
    
case SP::C23: OpKind = MCK_CoprocRegs; break0
;
2146
3.74k
    
case SP::C24: OpKind = MCK_CoprocRegs; break0
;
2147
3.74k
    
case SP::C25: OpKind = MCK_CoprocRegs; break0
;
2148
3.74k
    
case SP::C26: OpKind = MCK_CoprocRegs; break0
;
2149
3.74k
    
case SP::C27: OpKind = MCK_CoprocRegs; break0
;
2150
3.74k
    
case SP::C28: OpKind = MCK_CoprocRegs; break0
;
2151
3.74k
    
case SP::C29: OpKind = MCK_CoprocRegs; break0
;
2152
3.74k
    
case SP::C30: OpKind = MCK_CoprocRegs; break6
;
2153
3.74k
    
case SP::C31: OpKind = MCK_CoprocRegs; break0
;
2154
3.74k
    
case SP::D16: OpKind = MCK_DFPRegs; break3
;
2155
3.74k
    
case SP::D17: OpKind = MCK_DFPRegs; break1
;
2156
3.74k
    
case SP::D18: OpKind = MCK_DFPRegs; break1
;
2157
3.74k
    
case SP::D19: OpKind = MCK_DFPRegs; break0
;
2158
3.74k
    
case SP::D20: OpKind = MCK_DFPRegs; break3
;
2159
3.74k
    
case SP::D21: OpKind = MCK_DFPRegs; break0
;
2160
3.74k
    
case SP::D22: OpKind = MCK_DFPRegs; break0
;
2161
3.74k
    
case SP::D23: OpKind = MCK_DFPRegs; break0
;
2162
3.74k
    
case SP::D24: OpKind = MCK_DFPRegs; break29
;
2163
3.74k
    
case SP::D25: OpKind = MCK_DFPRegs; break0
;
2164
3.74k
    
case SP::D26: OpKind = MCK_DFPRegs; break0
;
2165
3.74k
    
case SP::D27: OpKind = MCK_DFPRegs; break0
;
2166
3.74k
    
case SP::D28: OpKind = MCK_DFPRegs; break0
;
2167
3.74k
    
case SP::D29: OpKind = MCK_DFPRegs; break0
;
2168
3.74k
    
case SP::D30: OpKind = MCK_DFPRegs; break1
;
2169
3.74k
    
case SP::D31: OpKind = MCK_DFPRegs; break1
;
2170
3.74k
    
case SP::Q0: OpKind = MCK_LowQFPRegs; break0
;
2171
3.74k
    
case SP::Q1: OpKind = MCK_LowQFPRegs; break0
;
2172
3.74k
    
case SP::Q2: OpKind = MCK_LowQFPRegs; break0
;
2173
3.74k
    
case SP::Q3: OpKind = MCK_LowQFPRegs; break0
;
2174
3.74k
    
case SP::Q4: OpKind = MCK_LowQFPRegs; break0
;
2175
3.74k
    
case SP::Q5: OpKind = MCK_LowQFPRegs; break0
;
2176
3.74k
    
case SP::Q6: OpKind = MCK_LowQFPRegs; break0
;
2177
3.74k
    
case SP::Q7: OpKind = MCK_LowQFPRegs; break0
;
2178
3.74k
    
case SP::Q8: OpKind = MCK_QFPRegs; break0
;
2179
3.74k
    
case SP::Q9: OpKind = MCK_QFPRegs; break0
;
2180
3.74k
    
case SP::Q10: OpKind = MCK_QFPRegs; break0
;
2181
3.74k
    
case SP::Q11: OpKind = MCK_QFPRegs; break0
;
2182
3.74k
    
case SP::Q12: OpKind = MCK_QFPRegs; break2
;
2183
3.74k
    
case SP::Q13: OpKind = MCK_QFPRegs; break0
;
2184
3.74k
    
case SP::Q14: OpKind = MCK_QFPRegs; break0
;
2185
3.74k
    
case SP::Q15: OpKind = MCK_QFPRegs; break0
;
2186
3.74k
    
case SP::G0_G1: OpKind = MCK_IntPair; break0
;
2187
3.74k
    
case SP::G2_G3: OpKind = MCK_IntPair; break0
;
2188
3.74k
    
case SP::G4_G5: OpKind = MCK_IntPair; break0
;
2189
3.74k
    
case SP::G6_G7: OpKind = MCK_IntPair; break0
;
2190
3.74k
    
case SP::O0_O1: OpKind = MCK_IntPair; break0
;
2191
3.74k
    
case SP::O2_O3: OpKind = MCK_IntPair; break4
;
2192
3.74k
    
case SP::O4_O5: OpKind = MCK_IntPair; break1
;
2193
3.74k
    
case SP::O6_O7: OpKind = MCK_IntPair; break0
;
2194
3.74k
    
case SP::L0_L1: OpKind = MCK_IntPair; break1
;
2195
3.74k
    
case SP::L2_L3: OpKind = MCK_IntPair; break0
;
2196
3.74k
    
case SP::L4_L5: OpKind = MCK_IntPair; break0
;
2197
3.74k
    
case SP::L6_L7: OpKind = MCK_IntPair; break0
;
2198
3.74k
    
case SP::I0_I1: OpKind = MCK_IntPair; break0
;
2199
3.74k
    
case SP::I2_I3: OpKind = MCK_IntPair; break0
;
2200
3.74k
    
case SP::I4_I5: OpKind = MCK_IntPair; break1
;
2201
3.74k
    
case SP::I6_I7: OpKind = MCK_IntPair; break0
;
2202
3.74k
    
case SP::C0_C1: OpKind = MCK_CoprocPair; break0
;
2203
3.74k
    
case SP::C2_C3: OpKind = MCK_CoprocPair; break0
;
2204
3.74k
    
case SP::C4_C5: OpKind = MCK_CoprocPair; break3
;
2205
3.74k
    
case SP::C6_C7: OpKind = MCK_CoprocPair; break0
;
2206
3.74k
    
case SP::C8_C9: OpKind = MCK_CoprocPair; break0
;
2207
3.74k
    
case SP::C10_C11: OpKind = MCK_CoprocPair; break0
;
2208
3.74k
    
case SP::C12_C13: OpKind = MCK_CoprocPair; break0
;
2209
3.74k
    
case SP::C14_C15: OpKind = MCK_CoprocPair; break0
;
2210
3.74k
    
case SP::C16_C17: OpKind = MCK_CoprocPair; break0
;
2211
3.74k
    
case SP::C18_C19: OpKind = MCK_CoprocPair; break0
;
2212
3.74k
    
case SP::C20_C21: OpKind = MCK_CoprocPair; break0
;
2213
3.74k
    
case SP::C22_C23: OpKind = MCK_CoprocPair; break0
;
2214
3.74k
    
case SP::C24_C25: OpKind = MCK_CoprocPair; break0
;
2215
3.74k
    
case SP::C26_C27: OpKind = MCK_CoprocPair; break0
;
2216
3.74k
    
case SP::C28_C29: OpKind = MCK_CoprocPair; break0
;
2217
3.74k
    
case SP::C30_C31: OpKind = MCK_CoprocPair; break1
;
2218
3.74k
    }
2219
3.74k
    return isSubclass(OpKind, Kind) ? 
(unsigned)MCTargetAsmParser::Match_Success2.60k
:
2220
3.74k
                                      
getDiagKindFromRegisterClass(Kind)1.13k
;
2221
3.74k
  }
2222
1.95k
2223
1.95k
  if (Kind > MCK_LAST_TOKEN && 
Kind <= MCK_LAST_REGISTER1.80k
)
2224
917
    return getDiagKindFromRegisterClass(Kind);
2225
1.03k
2226
1.03k
  return MCTargetAsmParser::Match_InvalidOperand;
2227
1.03k
}
2228
2229
#ifndef NDEBUG
2230
const char *getMatchClassName(MatchClassKind Kind) {
2231
  switch (Kind) {
2232
  case InvalidMatchClass: return "InvalidMatchClass";
2233
  case OptionalMatchClass: return "OptionalMatchClass";
2234
  case MCK__PCT_cq: return "MCK__PCT_cq";
2235
  case MCK__PCT_csr: return "MCK__PCT_csr";
2236
  case MCK__PCT_fcc0: return "MCK__PCT_fcc0";
2237
  case MCK__PCT_fq: return "MCK__PCT_fq";
2238
  case MCK__PCT_fsr: return "MCK__PCT_fsr";
2239
  case MCK__PCT_g0: return "MCK__PCT_g0";
2240
  case MCK__PCT_icc: return "MCK__PCT_icc";
2241
  case MCK__PCT_psr: return "MCK__PCT_psr";
2242
  case MCK__PCT_tbr: return "MCK__PCT_tbr";
2243
  case MCK__PCT_wim: return "MCK__PCT_wim";
2244
  case MCK__PCT_xcc: return "MCK__PCT_xcc";
2245
  case MCK__43_: return "MCK__43_";
2246
  case MCK_1: return "MCK_1";
2247
  case MCK_10: return "MCK_10";
2248
  case MCK_3: return "MCK_3";
2249
  case MCK_5: return "MCK_5";
2250
  case MCK__91_: return "MCK__91_";
2251
  case MCK__93_: return "MCK__93_";
2252
  case MCK_a: return "MCK_a";
2253
  case MCK_pn: return "MCK_pn";
2254
  case MCK_pt: return "MCK_pt";
2255
  case MCK_FCCRegs: return "MCK_FCCRegs";
2256
  case MCK_LowQFPRegs: return "MCK_LowQFPRegs";
2257
  case MCK_PRRegs: return "MCK_PRRegs";
2258
  case MCK_CoprocPair: return "MCK_CoprocPair";
2259
  case MCK_IntPair: return "MCK_IntPair";
2260
  case MCK_LowDFPRegs: return "MCK_LowDFPRegs";
2261
  case MCK_QFPRegs: return "MCK_QFPRegs";
2262
  case MCK_ASRRegs: return "MCK_ASRRegs";
2263
  case MCK_CoprocRegs: return "MCK_CoprocRegs";
2264
  case MCK_DFPRegs: return "MCK_DFPRegs";
2265
  case MCK_FPRegs: return "MCK_FPRegs";
2266
  case MCK_IntRegs: return "MCK_IntRegs";
2267
  case MCK_Imm: return "MCK_Imm";
2268
  case MCK_MEMri: return "MCK_MEMri";
2269
  case MCK_MEMrr: return "MCK_MEMrr";
2270
  case NumMatchClassKinds: return "NumMatchClassKinds";
2271
  }
2272
  llvm_unreachable("unhandled MatchClassKind!");
2273
}
2274
2275
#endif // NDEBUG
2276
uint64_t SparcAsmParser::
2277
100
ComputeAvailableFeatures(const FeatureBitset& FB) const {
2278
100
  uint64_t Features = 0;
2279
100
  if ((FB[Sparc::FeatureSoftMulDiv]))
2280
0
    Features |= Feature_UseSoftMulDiv;
2281
100
  if ((FB[Sparc::FeatureV9]))
2282
44
    Features |= Feature_HasV9;
2283
100
  if ((FB[Sparc::FeatureVIS]))
2284
1
    Features |= Feature_HasVIS;
2285
100
  if ((FB[Sparc::FeatureVIS2]))
2286
1
    Features |= Feature_HasVIS2;
2287
100
  if ((FB[Sparc::FeatureVIS3]))
2288
0
    Features |= Feature_HasVIS3;
2289
100
  return Features;
2290
100
}
2291
2292
static bool checkAsmTiedOperandConstraints(const SparcAsmParser&AsmParser,
2293
                               unsigned Kind,
2294
                               const OperandVector &Operands,
2295
1.77k
                               uint64_t &ErrorInfo) {
2296
1.77k
  assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!");
2297
1.77k
  const uint8_t *Converter = ConversionTable[Kind];
2298
6.30k
  for (const uint8_t *p = Converter; *p; 
p+= 24.52k
) {
2299
4.52k
    switch (*p) {
2300
4.52k
    case CVT_Tied: {
2301
105
      unsigned OpIdx = *(p+1);
2302
105
      assert(OpIdx < (size_t)(std::end(TiedAsmOperandTable) -
2303
105
                              std::begin(TiedAsmOperandTable)) &&
2304
105
             "Tied operand not found");
2305
105
      unsigned OpndNum1 = TiedAsmOperandTable[OpIdx][1];
2306
105
      unsigned OpndNum2 = TiedAsmOperandTable[OpIdx][2];
2307
105
      if (OpndNum1 != OpndNum2) {
2308
0
        auto &SrcOp1 = Operands[OpndNum1];
2309
0
        auto &SrcOp2 = Operands[OpndNum2];
2310
0
        if (SrcOp1->isReg() && SrcOp2->isReg()) {
2311
0
          if (!AsmParser.regsEqual(*SrcOp1, *SrcOp2)) {
2312
0
            ErrorInfo = OpndNum2;
2313
0
            return false;
2314
0
          }
2315
105
        }
2316
0
      }
2317
105
      break;
2318
105
    }
2319
4.42k
    default:
2320
4.42k
      break;
2321
4.52k
    }
2322
4.52k
  }
2323
1.77k
  return true;
2324
1.77k
}
2325
2326
static const char *const MnemonicTable =
2327
    "\003add\005addcc\004addx\005addxc\006addxcc\007addxccc\talignaddr\nalig"
2328
    "naddrl\003and\005andcc\004andn\006andncc\007array16\007array32\006array"
2329
    "8\001b\002ba\003bcc\004bclr\003bcs\002be\003beq\002bg\003bge\004bgeu\003"
2330
    "bgu\002bl\003ble\004bleu\003blu\005bmask\002bn\003bne\004bneg\003bnz\004"
2331
    "bpos\005brgez\004brgz\005brlez\004brlz\004brnz\003brz\004bset\010bshuff"
2332
    "le\004btog\004btst\003bvc\003bvs\002bz\004call\003cas\004casa\004casx\002"
2333
    "cb\003cb0\004cb01\005cb012\005cb013\004cb02\005cb023\004cb03\003cb1\004"
2334
    "cb12\005cb123\004cb13\003cb2\004cb23\003cb3\003cba\003cbn\003clr\004clr"
2335
    "b\004clrh\007cmask16\007cmask32\006cmask8\003cmp\003dec\005deccc\006edg"
2336
    "e16\007edge16l\010edge16ln\007edge16n\006edge32\007edge32l\010edge32ln\007"
2337
    "edge32n\005edge8\006edge8l\007edge8ln\006edge8n\005fabsd\005fabsq\005fa"
2338
    "bss\005faddd\005faddq\005fadds\nfaligndata\004fand\010fandnot1\tfandnot"
2339
    "1s\010fandnot2\tfandnot2s\005fands\002fb\003fba\003fbe\003fbg\004fbge\003"
2340
    "fbl\004fble\004fblg\003fbn\004fbne\004fbnz\003fbo\003fbu\004fbue\004fbu"
2341
    "g\005fbuge\004fbul\005fbule\003fbz\010fchksm16\005fcmpd\006fcmped\006fc"
2342
    "mpeq\010fcmpeq16\010fcmpeq32\006fcmpes\010fcmpgt16\010fcmpgt32\010fcmpl"
2343
    "e16\010fcmple32\010fcmpne16\010fcmpne32\005fcmpq\005fcmps\005fdivd\005f"
2344
    "divq\005fdivs\006fdmulq\005fdtoi\005fdtoq\005fdtos\005fdtox\007fexpand\006"
2345
    "fhaddd\006fhadds\006fhsubd\006fhsubs\005fitod\005fitoq\005fitos\006flcm"
2346
    "pd\006flcmps\005flush\006flushw\007fmean16\005fmovd\006fmovda\007fmovdc"
2347
    "c\007fmovdcs\006fmovde\007fmovdeq\006fmovdg\007fmovdge\010fmovdgeu\007f"
2348
    "movdgu\006fmovdl\007fmovdle\010fmovdleu\007fmovdlg\007fmovdlu\006fmovdn"
2349
    "\007fmovdne\010fmovdneg\007fmovdnz\006fmovdo\010fmovdpos\006fmovdu\007f"
2350
    "movdue\007fmovdug\010fmovduge\007fmovdul\010fmovdule\007fmovdvc\007fmov"
2351
    "dvs\006fmovdz\005fmovq\006fmovqa\007fmovqcc\007fmovqcs\006fmovqe\007fmo"
2352
    "vqeq\006fmovqg\007fmovqge\010fmovqgeu\007fmovqgu\006fmovql\007fmovqle\010"
2353
    "fmovqleu\007fmovqlg\007fmovqlu\006fmovqn\007fmovqne\010fmovqneg\007fmov"
2354
    "qnz\006fmovqo\010fmovqpos\006fmovqu\007fmovque\007fmovqug\010fmovquge\007"
2355
    "fmovqul\010fmovqule\007fmovqvc\007fmovqvs\006fmovqz\tfmovrdgez\010fmovr"
2356
    "dgz\tfmovrdlez\010fmovrdlz\010fmovrdnz\007fmovrdz\tfmovrqgez\010fmovrqg"
2357
    "z\tfmovrqlez\010fmovrqlz\010fmovrqnz\007fmovrqz\tfmovrsgez\010fmovrsgz\t"
2358
    "fmovrslez\010fmovrslz\010fmovrsnz\007fmovrsz\005fmovs\006fmovsa\007fmov"
2359
    "scc\007fmovscs\006fmovse\007fmovseq\006fmovsg\007fmovsge\010fmovsgeu\007"
2360
    "fmovsgu\006fmovsl\007fmovsle\010fmovsleu\007fmovslg\007fmovslu\006fmovs"
2361
    "n\007fmovsne\010fmovsneg\007fmovsnz\006fmovso\010fmovspos\006fmovsu\007"
2362
    "fmovsue\007fmovsug\010fmovsuge\007fmovsul\010fmovsule\007fmovsvc\007fmo"
2363
    "vsvs\006fmovsz\nfmul8sux16\nfmul8ulx16\010fmul8x16\nfmul8x16al\nfmul8x1"
2364
    "6au\005fmuld\013fmuld8sux16\013fmuld8ulx16\005fmulq\005fmuls\006fnaddd\006"
2365
    "fnadds\005fnand\006fnands\005fnegd\005fnegq\005fnegs\007fnhaddd\007fnha"
2366
    "dds\004fnor\005fnors\005fnot1\006fnot1s\005fnot2\006fnot2s\004fone\005f"
2367
    "ones\003for\007fornot1\010fornot1s\007fornot2\010fornot2s\004fors\007fp"
2368
    "ack16\007fpack32\010fpackfix\007fpadd16\010fpadd16s\007fpadd32\010fpadd"
2369
    "32s\007fpadd64\007fpmerge\007fpsub16\010fpsub16S\007fpsub32\010fpsub32S"
2370
    "\005fqtod\005fqtoi\005fqtos\005fqtox\007fslas16\007fslas32\006fsll16\006"
2371
    "fsll32\006fsmuld\006fsqrtd\006fsqrtq\006fsqrts\006fsra16\006fsra32\005f"
2372
    "src1\006fsrc1s\005fsrc2\006fsrc2s\006fsrl16\006fsrl32\005fstod\005fstoi"
2373
    "\005fstoq\005fstox\005fsubd\005fsubq\005fsubs\005fxnor\006fxnors\004fxo"
2374
    "r\005fxors\005fxtod\005fxtoq\005fxtos\005fzero\006fzeros\003inc\005incc"
2375
    "c\003jmp\004jmpl\002ld\003lda\003ldd\004ldda\003ldq\004ldqa\004ldsb\005"
2376
    "ldsba\004ldsh\005ldsha\006ldstub\007ldstuba\004ldsw\004ldub\005lduba\004"
2377
    "lduh\005lduha\003ldx\005lzcnt\006membar\003mov\004mova\005movcc\005movc"
2378
    "s\007movdtox\004move\005moveq\004movg\005movge\006movgeu\005movgu\004mo"
2379
    "vl\005movle\006movleu\005movlg\005movlu\004movn\005movne\006movneg\005m"
2380
    "ovnz\004movo\006movpos\007movrgez\006movrgz\007movrlez\006movrlz\006mov"
2381
    "rnz\005movrz\010movstosw\010movstouw\004movu\005movue\005movug\006movug"
2382
    "e\005movul\006movule\005movvc\005movvs\004movz\006mulscc\004mulx\003neg"
2383
    "\003nop\003not\002or\004orcc\003orn\005orncc\005pdist\006pdistn\004popc"
2384
    "\002rd\004rdpr\007restore\003ret\004retl\004rett\004save\004sdiv\006sdi"
2385
    "vcc\005sdivx\003set\005sethi\010shutdown\004siam\005signx\003sll\004sll"
2386
    "x\004smac\004smul\006smulcc\003sra\004srax\003srl\004srlx\002st\003sta\003"
2387
    "stb\004stba\005stbar\003std\004stda\003sth\004stha\003stq\004stqa\003st"
2388
    "x\003sub\005subcc\004subx\006subxcc\004swap\005swapa\001t\002ta\006tadd"
2389
    "cc\010taddcctv\003tcc\003tcs\002te\003teq\002tg\003tge\004tgeu\003tgu\002"
2390
    "tl\003tle\004tleu\003tlu\002tn\003tne\004tneg\003tnz\004tpos\003tst\006"
2391
    "tsubcc\010tsubcctv\003tvc\003tvs\002tz\004udiv\006udivcc\005udivx\004um"
2392
    "ac\004umul\006umulcc\007umulxhi\005unimp\002wr\004wrpr\005xmulx\007xmul"
2393
    "xhi\004xnor\006xnorcc\003xor\005xorcc";
2394
2395
namespace {
2396
  struct MatchEntry {
2397
    uint16_t Mnemonic;
2398
    uint16_t Opcode;
2399
    uint16_t ConvertFn;
2400
    uint8_t RequiredFeatures;
2401
    uint8_t Classes[6];
2402
33.4k
    StringRef getMnemonic() const {
2403
33.4k
      return StringRef(MnemonicTable + Mnemonic + 1,
2404
33.4k
                       MnemonicTable[Mnemonic]);
2405
33.4k
    }
2406
  };
2407
2408
  // Predicate for searching for an opcode.
2409
  struct LessOpcode {
2410
19.7k
    bool operator()(const MatchEntry &LHS, StringRef RHS) {
2411
19.7k
      return LHS.getMnemonic() < RHS;
2412
19.7k
    }
2413
13.7k
    bool operator()(StringRef LHS, const MatchEntry &RHS) {
2414
13.7k
      return LHS < RHS.getMnemonic();
2415
13.7k
    }
2416
0
    bool operator()(const MatchEntry &LHS, const MatchEntry &RHS) {
2417
0
      return LHS.getMnemonic() < RHS.getMnemonic();
2418
0
    }
2419
  };
2420
} // end anonymous namespace.
2421
2422
static const MatchEntry MatchTable0[] = {
2423
  { 0 /* add */, SP::ADDrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
2424
  { 0 /* add */, SP::ADDri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
2425
  { 0 /* add */, SP::TLS_ADDrr, Convert__Reg1_2__Reg1_0__Reg1_1__Imm1_3, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs, MCK_Imm }, },
2426
  { 4 /* addcc */, SP::ADDCCrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
2427
  { 4 /* addcc */, SP::ADDCCri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
2428
  { 10 /* addx */, SP::ADDCrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
2429
  { 10 /* addx */, SP::ADDCri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
2430
  { 15 /* addxc */, SP::ADDXC, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
2431
  { 21 /* addxcc */, SP::ADDErr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
2432
  { 21 /* addxcc */, SP::ADDEri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
2433
  { 28 /* addxccc */, SP::ADDXCCC, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
2434
  { 36 /* alignaddr */, SP::ALIGNADDR, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
2435
  { 46 /* alignaddrl */, SP::ALIGNADDRL, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
2436
  { 57 /* and */, SP::ANDrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
2437
  { 57 /* and */, SP::ANDri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
2438
  { 61 /* andcc */, SP::ANDCCrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
2439
  { 61 /* andcc */, SP::ANDCCri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
2440
  { 67 /* andn */, SP::ANDNrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
2441
  { 67 /* andn */, SP::ANDNri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
2442
  { 72 /* andncc */, SP::ANDNCCrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
2443
  { 72 /* andncc */, SP::ANDNCCri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
2444
  { 79 /* array16 */, SP::ARRAY16, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
2445
  { 87 /* array32 */, SP::ARRAY32, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
2446
  { 95 /* array8 */, SP::ARRAY8, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
2447
  { 102 /* b */, SP::BCOND, Convert__Imm1_0__imm_95_8, 0, { MCK_Imm }, },
2448
  { 102 /* b */, SP::BPICC, Convert__Imm1_1__imm_95_8, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
2449
  { 102 /* b */, SP::BPXCC, Convert__Imm1_1__imm_95_8, 0, { MCK__PCT_xcc, MCK_Imm }, },
2450
  { 102 /* b */, SP::BCONDA, Convert__Imm1_1__imm_95_8, 0, { MCK_a, MCK_Imm }, },
2451
  { 102 /* b */, SP::BCOND, Convert__Imm1_1__Imm1_0, 0, { MCK_Imm, MCK_Imm }, },
2452
  { 102 /* b */, SP::BPICCA, Convert__Imm1_2__imm_95_8, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
2453
  { 102 /* b */, SP::BPXCCA, Convert__Imm1_2__imm_95_8, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
2454
  { 102 /* b */, SP::BPICCNT, Convert__Imm1_2__imm_95_8, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2455
  { 102 /* b */, SP::BPXCCNT, Convert__Imm1_2__imm_95_8, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2456
  { 102 /* b */, SP::BPICC, Convert__Imm1_2__imm_95_8, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2457
  { 102 /* b */, SP::BPXCC, Convert__Imm1_2__imm_95_8, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2458
  { 102 /* b */, SP::BPICC, Convert__Imm1_2__Imm1_0, Feature_HasV9, { MCK_Imm, MCK__PCT_icc, MCK_Imm }, },
2459
  { 102 /* b */, SP::BPXCC, Convert__Imm1_2__Imm1_0, 0, { MCK_Imm, MCK__PCT_xcc, MCK_Imm }, },
2460
  { 102 /* b */, SP::BCONDA, Convert__Imm1_2__Imm1_0, 0, { MCK_Imm, MCK_a, MCK_Imm }, },
2461
  { 102 /* b */, SP::BPICCANT, Convert__Imm1_3__imm_95_8, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2462
  { 102 /* b */, SP::BPXCCANT, Convert__Imm1_3__imm_95_8, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2463
  { 102 /* b */, SP::BPICCA, Convert__Imm1_3__imm_95_8, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2464
  { 102 /* b */, SP::BPXCCA, Convert__Imm1_3__imm_95_8, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2465
  { 102 /* b */, SP::BPICCA, Convert__Imm1_3__Imm1_0, Feature_HasV9, { MCK_Imm, MCK_a, MCK__PCT_icc, MCK_Imm }, },
2466
  { 102 /* b */, SP::BPXCCA, Convert__Imm1_3__Imm1_0, 0, { MCK_Imm, MCK_a, MCK__PCT_xcc, MCK_Imm }, },
2467
  { 102 /* b */, SP::BPICCNT, Convert__Imm1_3__Imm1_0, Feature_HasV9, { MCK_Imm, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2468
  { 102 /* b */, SP::BPXCCNT, Convert__Imm1_3__Imm1_0, 0, { MCK_Imm, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2469
  { 102 /* b */, SP::BPICCANT, Convert__Imm1_4__Imm1_0, Feature_HasV9, { MCK_Imm, MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2470
  { 102 /* b */, SP::BPXCCANT, Convert__Imm1_4__Imm1_0, 0, { MCK_Imm, MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2471
  { 104 /* ba */, SP::BA, Convert__Imm1_0, 0, { MCK_Imm }, },
2472
  { 104 /* ba */, SP::BCOND, Convert__Imm1_0__imm_95_8, 0, { MCK_Imm }, },
2473
  { 104 /* ba */, SP::BPICC, Convert__Imm1_1__imm_95_8, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
2474
  { 104 /* ba */, SP::BPXCC, Convert__Imm1_1__imm_95_8, 0, { MCK__PCT_xcc, MCK_Imm }, },
2475
  { 104 /* ba */, SP::BCONDA, Convert__Imm1_1__imm_95_8, 0, { MCK_a, MCK_Imm }, },
2476
  { 104 /* ba */, SP::BPICCA, Convert__Imm1_2__imm_95_8, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
2477
  { 104 /* ba */, SP::BPXCCA, Convert__Imm1_2__imm_95_8, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
2478
  { 104 /* ba */, SP::BPICCNT, Convert__Imm1_2__imm_95_8, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2479
  { 104 /* ba */, SP::BPXCCNT, Convert__Imm1_2__imm_95_8, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2480
  { 104 /* ba */, SP::BPICC, Convert__Imm1_2__imm_95_8, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2481
  { 104 /* ba */, SP::BPXCC, Convert__Imm1_2__imm_95_8, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2482
  { 104 /* ba */, SP::BPICCANT, Convert__Imm1_3__imm_95_8, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2483
  { 104 /* ba */, SP::BPXCCANT, Convert__Imm1_3__imm_95_8, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2484
  { 104 /* ba */, SP::BPICCA, Convert__Imm1_3__imm_95_8, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2485
  { 104 /* ba */, SP::BPXCCA, Convert__Imm1_3__imm_95_8, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2486
  { 107 /* bcc */, SP::BCOND, Convert__Imm1_0__imm_95_13, 0, { MCK_Imm }, },
2487
  { 107 /* bcc */, SP::BPICC, Convert__Imm1_1__imm_95_13, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
2488
  { 107 /* bcc */, SP::BPXCC, Convert__Imm1_1__imm_95_13, 0, { MCK__PCT_xcc, MCK_Imm }, },
2489
  { 107 /* bcc */, SP::BCONDA, Convert__Imm1_1__imm_95_13, 0, { MCK_a, MCK_Imm }, },
2490
  { 107 /* bcc */, SP::BPICCA, Convert__Imm1_2__imm_95_13, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
2491
  { 107 /* bcc */, SP::BPXCCA, Convert__Imm1_2__imm_95_13, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
2492
  { 107 /* bcc */, SP::BPICCNT, Convert__Imm1_2__imm_95_13, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2493
  { 107 /* bcc */, SP::BPXCCNT, Convert__Imm1_2__imm_95_13, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2494
  { 107 /* bcc */, SP::BPICC, Convert__Imm1_2__imm_95_13, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2495
  { 107 /* bcc */, SP::BPXCC, Convert__Imm1_2__imm_95_13, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2496
  { 107 /* bcc */, SP::BPICCANT, Convert__Imm1_3__imm_95_13, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2497
  { 107 /* bcc */, SP::BPXCCANT, Convert__Imm1_3__imm_95_13, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2498
  { 107 /* bcc */, SP::BPICCA, Convert__Imm1_3__imm_95_13, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2499
  { 107 /* bcc */, SP::BPXCCA, Convert__Imm1_3__imm_95_13, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2500
  { 111 /* bclr */, SP::ANDNrr, Convert__Reg1_1__Reg1_1__Reg1_0, 0, { MCK_IntRegs, MCK_IntRegs }, },
2501
  { 111 /* bclr */, SP::ANDNri, Convert__Reg1_1__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_IntRegs }, },
2502
  { 116 /* bcs */, SP::BCOND, Convert__Imm1_0__imm_95_5, 0, { MCK_Imm }, },
2503
  { 116 /* bcs */, SP::BPICC, Convert__Imm1_1__imm_95_5, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
2504
  { 116 /* bcs */, SP::BPXCC, Convert__Imm1_1__imm_95_5, 0, { MCK__PCT_xcc, MCK_Imm }, },
2505
  { 116 /* bcs */, SP::BCONDA, Convert__Imm1_1__imm_95_5, 0, { MCK_a, MCK_Imm }, },
2506
  { 116 /* bcs */, SP::BPICCA, Convert__Imm1_2__imm_95_5, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
2507
  { 116 /* bcs */, SP::BPXCCA, Convert__Imm1_2__imm_95_5, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
2508
  { 116 /* bcs */, SP::BPICCNT, Convert__Imm1_2__imm_95_5, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2509
  { 116 /* bcs */, SP::BPXCCNT, Convert__Imm1_2__imm_95_5, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2510
  { 116 /* bcs */, SP::BPICC, Convert__Imm1_2__imm_95_5, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2511
  { 116 /* bcs */, SP::BPXCC, Convert__Imm1_2__imm_95_5, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2512
  { 116 /* bcs */, SP::BPICCANT, Convert__Imm1_3__imm_95_5, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2513
  { 116 /* bcs */, SP::BPXCCANT, Convert__Imm1_3__imm_95_5, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2514
  { 116 /* bcs */, SP::BPICCA, Convert__Imm1_3__imm_95_5, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2515
  { 116 /* bcs */, SP::BPXCCA, Convert__Imm1_3__imm_95_5, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2516
  { 120 /* be */, SP::BCOND, Convert__Imm1_0__imm_95_1, 0, { MCK_Imm }, },
2517
  { 120 /* be */, SP::BPICC, Convert__Imm1_1__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
2518
  { 120 /* be */, SP::BPXCC, Convert__Imm1_1__imm_95_1, 0, { MCK__PCT_xcc, MCK_Imm }, },
2519
  { 120 /* be */, SP::BCONDA, Convert__Imm1_1__imm_95_1, 0, { MCK_a, MCK_Imm }, },
2520
  { 120 /* be */, SP::BPICCA, Convert__Imm1_2__imm_95_1, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
2521
  { 120 /* be */, SP::BPXCCA, Convert__Imm1_2__imm_95_1, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
2522
  { 120 /* be */, SP::BPICCNT, Convert__Imm1_2__imm_95_1, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2523
  { 120 /* be */, SP::BPXCCNT, Convert__Imm1_2__imm_95_1, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2524
  { 120 /* be */, SP::BPICC, Convert__Imm1_2__imm_95_1, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2525
  { 120 /* be */, SP::BPXCC, Convert__Imm1_2__imm_95_1, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2526
  { 120 /* be */, SP::BPICCANT, Convert__Imm1_3__imm_95_1, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2527
  { 120 /* be */, SP::BPXCCANT, Convert__Imm1_3__imm_95_1, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2528
  { 120 /* be */, SP::BPICCA, Convert__Imm1_3__imm_95_1, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2529
  { 120 /* be */, SP::BPXCCA, Convert__Imm1_3__imm_95_1, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2530
  { 123 /* beq */, SP::BCOND, Convert__Imm1_0__imm_95_1, 0, { MCK_Imm }, },
2531
  { 123 /* beq */, SP::BPICC, Convert__Imm1_1__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
2532
  { 123 /* beq */, SP::BPXCC, Convert__Imm1_1__imm_95_1, 0, { MCK__PCT_xcc, MCK_Imm }, },
2533
  { 123 /* beq */, SP::BCONDA, Convert__Imm1_1__imm_95_1, 0, { MCK_a, MCK_Imm }, },
2534
  { 123 /* beq */, SP::BPICCA, Convert__Imm1_2__imm_95_1, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
2535
  { 123 /* beq */, SP::BPXCCA, Convert__Imm1_2__imm_95_1, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
2536
  { 123 /* beq */, SP::BPICCNT, Convert__Imm1_2__imm_95_1, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2537
  { 123 /* beq */, SP::BPXCCNT, Convert__Imm1_2__imm_95_1, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2538
  { 123 /* beq */, SP::BPICC, Convert__Imm1_2__imm_95_1, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2539
  { 123 /* beq */, SP::BPXCC, Convert__Imm1_2__imm_95_1, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2540
  { 123 /* beq */, SP::BPICCANT, Convert__Imm1_3__imm_95_1, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2541
  { 123 /* beq */, SP::BPXCCANT, Convert__Imm1_3__imm_95_1, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2542
  { 123 /* beq */, SP::BPICCA, Convert__Imm1_3__imm_95_1, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2543
  { 123 /* beq */, SP::BPXCCA, Convert__Imm1_3__imm_95_1, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2544
  { 127 /* bg */, SP::BCOND, Convert__Imm1_0__imm_95_10, 0, { MCK_Imm }, },
2545
  { 127 /* bg */, SP::BPICC, Convert__Imm1_1__imm_95_10, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
2546
  { 127 /* bg */, SP::BPXCC, Convert__Imm1_1__imm_95_10, 0, { MCK__PCT_xcc, MCK_Imm }, },
2547
  { 127 /* bg */, SP::BCONDA, Convert__Imm1_1__imm_95_10, 0, { MCK_a, MCK_Imm }, },
2548
  { 127 /* bg */, SP::BPICCA, Convert__Imm1_2__imm_95_10, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
2549
  { 127 /* bg */, SP::BPXCCA, Convert__Imm1_2__imm_95_10, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
2550
  { 127 /* bg */, SP::BPICCNT, Convert__Imm1_2__imm_95_10, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2551
  { 127 /* bg */, SP::BPXCCNT, Convert__Imm1_2__imm_95_10, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2552
  { 127 /* bg */, SP::BPICC, Convert__Imm1_2__imm_95_10, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2553
  { 127 /* bg */, SP::BPXCC, Convert__Imm1_2__imm_95_10, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2554
  { 127 /* bg */, SP::BPICCANT, Convert__Imm1_3__imm_95_10, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2555
  { 127 /* bg */, SP::BPXCCANT, Convert__Imm1_3__imm_95_10, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2556
  { 127 /* bg */, SP::BPICCA, Convert__Imm1_3__imm_95_10, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2557
  { 127 /* bg */, SP::BPXCCA, Convert__Imm1_3__imm_95_10, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2558
  { 130 /* bge */, SP::BCOND, Convert__Imm1_0__imm_95_11, 0, { MCK_Imm }, },
2559
  { 130 /* bge */, SP::BPICC, Convert__Imm1_1__imm_95_11, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
2560
  { 130 /* bge */, SP::BPXCC, Convert__Imm1_1__imm_95_11, 0, { MCK__PCT_xcc, MCK_Imm }, },
2561
  { 130 /* bge */, SP::BCONDA, Convert__Imm1_1__imm_95_11, 0, { MCK_a, MCK_Imm }, },
2562
  { 130 /* bge */, SP::BPICCA, Convert__Imm1_2__imm_95_11, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
2563
  { 130 /* bge */, SP::BPXCCA, Convert__Imm1_2__imm_95_11, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
2564
  { 130 /* bge */, SP::BPICCNT, Convert__Imm1_2__imm_95_11, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2565
  { 130 /* bge */, SP::BPXCCNT, Convert__Imm1_2__imm_95_11, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2566
  { 130 /* bge */, SP::BPICC, Convert__Imm1_2__imm_95_11, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2567
  { 130 /* bge */, SP::BPXCC, Convert__Imm1_2__imm_95_11, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2568
  { 130 /* bge */, SP::BPICCANT, Convert__Imm1_3__imm_95_11, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2569
  { 130 /* bge */, SP::BPXCCANT, Convert__Imm1_3__imm_95_11, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2570
  { 130 /* bge */, SP::BPICCA, Convert__Imm1_3__imm_95_11, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2571
  { 130 /* bge */, SP::BPXCCA, Convert__Imm1_3__imm_95_11, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2572
  { 134 /* bgeu */, SP::BCOND, Convert__Imm1_0__imm_95_13, 0, { MCK_Imm }, },
2573
  { 134 /* bgeu */, SP::BPICC, Convert__Imm1_1__imm_95_13, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
2574
  { 134 /* bgeu */, SP::BPXCC, Convert__Imm1_1__imm_95_13, 0, { MCK__PCT_xcc, MCK_Imm }, },
2575
  { 134 /* bgeu */, SP::BCONDA, Convert__Imm1_1__imm_95_13, 0, { MCK_a, MCK_Imm }, },
2576
  { 134 /* bgeu */, SP::BPICCA, Convert__Imm1_2__imm_95_13, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
2577
  { 134 /* bgeu */, SP::BPXCCA, Convert__Imm1_2__imm_95_13, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
2578
  { 134 /* bgeu */, SP::BPICCNT, Convert__Imm1_2__imm_95_13, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2579
  { 134 /* bgeu */, SP::BPXCCNT, Convert__Imm1_2__imm_95_13, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2580
  { 134 /* bgeu */, SP::BPICC, Convert__Imm1_2__imm_95_13, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2581
  { 134 /* bgeu */, SP::BPXCC, Convert__Imm1_2__imm_95_13, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2582
  { 134 /* bgeu */, SP::BPICCANT, Convert__Imm1_3__imm_95_13, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2583
  { 134 /* bgeu */, SP::BPXCCANT, Convert__Imm1_3__imm_95_13, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2584
  { 134 /* bgeu */, SP::BPICCA, Convert__Imm1_3__imm_95_13, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2585
  { 134 /* bgeu */, SP::BPXCCA, Convert__Imm1_3__imm_95_13, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2586
  { 139 /* bgu */, SP::BCOND, Convert__Imm1_0__imm_95_12, 0, { MCK_Imm }, },
2587
  { 139 /* bgu */, SP::BPICC, Convert__Imm1_1__imm_95_12, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
2588
  { 139 /* bgu */, SP::BPXCC, Convert__Imm1_1__imm_95_12, 0, { MCK__PCT_xcc, MCK_Imm }, },
2589
  { 139 /* bgu */, SP::BCONDA, Convert__Imm1_1__imm_95_12, 0, { MCK_a, MCK_Imm }, },
2590
  { 139 /* bgu */, SP::BPICCA, Convert__Imm1_2__imm_95_12, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
2591
  { 139 /* bgu */, SP::BPXCCA, Convert__Imm1_2__imm_95_12, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
2592
  { 139 /* bgu */, SP::BPICCNT, Convert__Imm1_2__imm_95_12, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2593
  { 139 /* bgu */, SP::BPXCCNT, Convert__Imm1_2__imm_95_12, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2594
  { 139 /* bgu */, SP::BPICC, Convert__Imm1_2__imm_95_12, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2595
  { 139 /* bgu */, SP::BPXCC, Convert__Imm1_2__imm_95_12, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2596
  { 139 /* bgu */, SP::BPICCANT, Convert__Imm1_3__imm_95_12, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2597
  { 139 /* bgu */, SP::BPXCCANT, Convert__Imm1_3__imm_95_12, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2598
  { 139 /* bgu */, SP::BPICCA, Convert__Imm1_3__imm_95_12, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2599
  { 139 /* bgu */, SP::BPXCCA, Convert__Imm1_3__imm_95_12, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2600
  { 143 /* bl */, SP::BCOND, Convert__Imm1_0__imm_95_3, 0, { MCK_Imm }, },
2601
  { 143 /* bl */, SP::BPICC, Convert__Imm1_1__imm_95_3, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
2602
  { 143 /* bl */, SP::BPXCC, Convert__Imm1_1__imm_95_3, 0, { MCK__PCT_xcc, MCK_Imm }, },
2603
  { 143 /* bl */, SP::BCONDA, Convert__Imm1_1__imm_95_3, 0, { MCK_a, MCK_Imm }, },
2604
  { 143 /* bl */, SP::BPICCA, Convert__Imm1_2__imm_95_3, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
2605
  { 143 /* bl */, SP::BPXCCA, Convert__Imm1_2__imm_95_3, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
2606
  { 143 /* bl */, SP::BPICCNT, Convert__Imm1_2__imm_95_3, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2607
  { 143 /* bl */, SP::BPXCCNT, Convert__Imm1_2__imm_95_3, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2608
  { 143 /* bl */, SP::BPICC, Convert__Imm1_2__imm_95_3, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2609
  { 143 /* bl */, SP::BPXCC, Convert__Imm1_2__imm_95_3, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2610
  { 143 /* bl */, SP::BPICCANT, Convert__Imm1_3__imm_95_3, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2611
  { 143 /* bl */, SP::BPXCCANT, Convert__Imm1_3__imm_95_3, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2612
  { 143 /* bl */, SP::BPICCA, Convert__Imm1_3__imm_95_3, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2613
  { 143 /* bl */, SP::BPXCCA, Convert__Imm1_3__imm_95_3, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2614
  { 146 /* ble */, SP::BCOND, Convert__Imm1_0__imm_95_2, 0, { MCK_Imm }, },
2615
  { 146 /* ble */, SP::BPICC, Convert__Imm1_1__imm_95_2, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
2616
  { 146 /* ble */, SP::BPXCC, Convert__Imm1_1__imm_95_2, 0, { MCK__PCT_xcc, MCK_Imm }, },
2617
  { 146 /* ble */, SP::BCONDA, Convert__Imm1_1__imm_95_2, 0, { MCK_a, MCK_Imm }, },
2618
  { 146 /* ble */, SP::BPICCA, Convert__Imm1_2__imm_95_2, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
2619
  { 146 /* ble */, SP::BPXCCA, Convert__Imm1_2__imm_95_2, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
2620
  { 146 /* ble */, SP::BPICCNT, Convert__Imm1_2__imm_95_2, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2621
  { 146 /* ble */, SP::BPXCCNT, Convert__Imm1_2__imm_95_2, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2622
  { 146 /* ble */, SP::BPICC, Convert__Imm1_2__imm_95_2, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2623
  { 146 /* ble */, SP::BPXCC, Convert__Imm1_2__imm_95_2, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2624
  { 146 /* ble */, SP::BPICCANT, Convert__Imm1_3__imm_95_2, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2625
  { 146 /* ble */, SP::BPXCCANT, Convert__Imm1_3__imm_95_2, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2626
  { 146 /* ble */, SP::BPICCA, Convert__Imm1_3__imm_95_2, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2627
  { 146 /* ble */, SP::BPXCCA, Convert__Imm1_3__imm_95_2, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2628
  { 150 /* bleu */, SP::BCOND, Convert__Imm1_0__imm_95_4, 0, { MCK_Imm }, },
2629
  { 150 /* bleu */, SP::BPICC, Convert__Imm1_1__imm_95_4, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
2630
  { 150 /* bleu */, SP::BPXCC, Convert__Imm1_1__imm_95_4, 0, { MCK__PCT_xcc, MCK_Imm }, },
2631
  { 150 /* bleu */, SP::BCONDA, Convert__Imm1_1__imm_95_4, 0, { MCK_a, MCK_Imm }, },
2632
  { 150 /* bleu */, SP::BPICCA, Convert__Imm1_2__imm_95_4, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
2633
  { 150 /* bleu */, SP::BPXCCA, Convert__Imm1_2__imm_95_4, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
2634
  { 150 /* bleu */, SP::BPICCNT, Convert__Imm1_2__imm_95_4, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2635
  { 150 /* bleu */, SP::BPXCCNT, Convert__Imm1_2__imm_95_4, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2636
  { 150 /* bleu */, SP::BPICC, Convert__Imm1_2__imm_95_4, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2637
  { 150 /* bleu */, SP::BPXCC, Convert__Imm1_2__imm_95_4, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2638
  { 150 /* bleu */, SP::BPICCANT, Convert__Imm1_3__imm_95_4, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2639
  { 150 /* bleu */, SP::BPXCCANT, Convert__Imm1_3__imm_95_4, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2640
  { 150 /* bleu */, SP::BPICCA, Convert__Imm1_3__imm_95_4, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2641
  { 150 /* bleu */, SP::BPXCCA, Convert__Imm1_3__imm_95_4, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2642
  { 155 /* blu */, SP::BCOND, Convert__Imm1_0__imm_95_5, 0, { MCK_Imm }, },
2643
  { 155 /* blu */, SP::BPICC, Convert__Imm1_1__imm_95_5, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
2644
  { 155 /* blu */, SP::BPXCC, Convert__Imm1_1__imm_95_5, 0, { MCK__PCT_xcc, MCK_Imm }, },
2645
  { 155 /* blu */, SP::BCONDA, Convert__Imm1_1__imm_95_5, 0, { MCK_a, MCK_Imm }, },
2646
  { 155 /* blu */, SP::BPICCA, Convert__Imm1_2__imm_95_5, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
2647
  { 155 /* blu */, SP::BPXCCA, Convert__Imm1_2__imm_95_5, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
2648
  { 155 /* blu */, SP::BPICCNT, Convert__Imm1_2__imm_95_5, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2649
  { 155 /* blu */, SP::BPXCCNT, Convert__Imm1_2__imm_95_5, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2650
  { 155 /* blu */, SP::BPICC, Convert__Imm1_2__imm_95_5, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2651
  { 155 /* blu */, SP::BPXCC, Convert__Imm1_2__imm_95_5, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2652
  { 155 /* blu */, SP::BPICCANT, Convert__Imm1_3__imm_95_5, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2653
  { 155 /* blu */, SP::BPXCCANT, Convert__Imm1_3__imm_95_5, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2654
  { 155 /* blu */, SP::BPICCA, Convert__Imm1_3__imm_95_5, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2655
  { 155 /* blu */, SP::BPXCCA, Convert__Imm1_3__imm_95_5, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2656
  { 159 /* bmask */, SP::BMASK, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS2, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
2657
  { 165 /* bn */, SP::BCOND, Convert__Imm1_0__imm_95_0, 0, { MCK_Imm }, },
2658
  { 165 /* bn */, SP::BPICC, Convert__Imm1_1__imm_95_0, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
2659
  { 165 /* bn */, SP::BPXCC, Convert__Imm1_1__imm_95_0, 0, { MCK__PCT_xcc, MCK_Imm }, },
2660
  { 165 /* bn */, SP::BCONDA, Convert__Imm1_1__imm_95_0, 0, { MCK_a, MCK_Imm }, },
2661
  { 165 /* bn */, SP::BPICCA, Convert__Imm1_2__imm_95_0, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
2662
  { 165 /* bn */, SP::BPXCCA, Convert__Imm1_2__imm_95_0, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
2663
  { 165 /* bn */, SP::BPICCNT, Convert__Imm1_2__imm_95_0, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2664
  { 165 /* bn */, SP::BPXCCNT, Convert__Imm1_2__imm_95_0, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2665
  { 165 /* bn */, SP::BPICC, Convert__Imm1_2__imm_95_0, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2666
  { 165 /* bn */, SP::BPXCC, Convert__Imm1_2__imm_95_0, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2667
  { 165 /* bn */, SP::BPICCANT, Convert__Imm1_3__imm_95_0, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2668
  { 165 /* bn */, SP::BPXCCANT, Convert__Imm1_3__imm_95_0, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2669
  { 165 /* bn */, SP::BPICCA, Convert__Imm1_3__imm_95_0, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2670
  { 165 /* bn */, SP::BPXCCA, Convert__Imm1_3__imm_95_0, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2671
  { 168 /* bne */, SP::BCOND, Convert__Imm1_0__imm_95_9, 0, { MCK_Imm }, },
2672
  { 168 /* bne */, SP::BPICC, Convert__Imm1_1__imm_95_9, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
2673
  { 168 /* bne */, SP::BPXCC, Convert__Imm1_1__imm_95_9, 0, { MCK__PCT_xcc, MCK_Imm }, },
2674
  { 168 /* bne */, SP::BCONDA, Convert__Imm1_1__imm_95_9, 0, { MCK_a, MCK_Imm }, },
2675
  { 168 /* bne */, SP::BPICCA, Convert__Imm1_2__imm_95_9, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
2676
  { 168 /* bne */, SP::BPXCCA, Convert__Imm1_2__imm_95_9, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
2677
  { 168 /* bne */, SP::BPICCNT, Convert__Imm1_2__imm_95_9, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2678
  { 168 /* bne */, SP::BPXCCNT, Convert__Imm1_2__imm_95_9, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2679
  { 168 /* bne */, SP::BPICC, Convert__Imm1_2__imm_95_9, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2680
  { 168 /* bne */, SP::BPXCC, Convert__Imm1_2__imm_95_9, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2681
  { 168 /* bne */, SP::BPICCANT, Convert__Imm1_3__imm_95_9, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2682
  { 168 /* bne */, SP::BPXCCANT, Convert__Imm1_3__imm_95_9, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2683
  { 168 /* bne */, SP::BPICCA, Convert__Imm1_3__imm_95_9, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2684
  { 168 /* bne */, SP::BPXCCA, Convert__Imm1_3__imm_95_9, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2685
  { 172 /* bneg */, SP::BCOND, Convert__Imm1_0__imm_95_6, 0, { MCK_Imm }, },
2686
  { 172 /* bneg */, SP::BPICC, Convert__Imm1_1__imm_95_6, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
2687
  { 172 /* bneg */, SP::BPXCC, Convert__Imm1_1__imm_95_6, 0, { MCK__PCT_xcc, MCK_Imm }, },
2688
  { 172 /* bneg */, SP::BCONDA, Convert__Imm1_1__imm_95_6, 0, { MCK_a, MCK_Imm }, },
2689
  { 172 /* bneg */, SP::BPICCA, Convert__Imm1_2__imm_95_6, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
2690
  { 172 /* bneg */, SP::BPXCCA, Convert__Imm1_2__imm_95_6, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
2691
  { 172 /* bneg */, SP::BPICCNT, Convert__Imm1_2__imm_95_6, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2692
  { 172 /* bneg */, SP::BPXCCNT, Convert__Imm1_2__imm_95_6, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2693
  { 172 /* bneg */, SP::BPICC, Convert__Imm1_2__imm_95_6, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2694
  { 172 /* bneg */, SP::BPXCC, Convert__Imm1_2__imm_95_6, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2695
  { 172 /* bneg */, SP::BPICCANT, Convert__Imm1_3__imm_95_6, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2696
  { 172 /* bneg */, SP::BPXCCANT, Convert__Imm1_3__imm_95_6, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2697
  { 172 /* bneg */, SP::BPICCA, Convert__Imm1_3__imm_95_6, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2698
  { 172 /* bneg */, SP::BPXCCA, Convert__Imm1_3__imm_95_6, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2699
  { 177 /* bnz */, SP::BCOND, Convert__Imm1_0__imm_95_9, 0, { MCK_Imm }, },
2700
  { 177 /* bnz */, SP::BPICC, Convert__Imm1_1__imm_95_9, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
2701
  { 177 /* bnz */, SP::BPXCC, Convert__Imm1_1__imm_95_9, 0, { MCK__PCT_xcc, MCK_Imm }, },
2702
  { 177 /* bnz */, SP::BCONDA, Convert__Imm1_1__imm_95_9, 0, { MCK_a, MCK_Imm }, },
2703
  { 177 /* bnz */, SP::BPICCA, Convert__Imm1_2__imm_95_9, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
2704
  { 177 /* bnz */, SP::BPXCCA, Convert__Imm1_2__imm_95_9, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
2705
  { 177 /* bnz */, SP::BPICCNT, Convert__Imm1_2__imm_95_9, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2706
  { 177 /* bnz */, SP::BPXCCNT, Convert__Imm1_2__imm_95_9, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2707
  { 177 /* bnz */, SP::BPICC, Convert__Imm1_2__imm_95_9, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2708
  { 177 /* bnz */, SP::BPXCC, Convert__Imm1_2__imm_95_9, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2709
  { 177 /* bnz */, SP::BPICCANT, Convert__Imm1_3__imm_95_9, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2710
  { 177 /* bnz */, SP::BPXCCANT, Convert__Imm1_3__imm_95_9, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2711
  { 177 /* bnz */, SP::BPICCA, Convert__Imm1_3__imm_95_9, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2712
  { 177 /* bnz */, SP::BPXCCA, Convert__Imm1_3__imm_95_9, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2713
  { 181 /* bpos */, SP::BCOND, Convert__Imm1_0__imm_95_14, 0, { MCK_Imm }, },
2714
  { 181 /* bpos */, SP::BPICC, Convert__Imm1_1__imm_95_14, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
2715
  { 181 /* bpos */, SP::BPXCC, Convert__Imm1_1__imm_95_14, 0, { MCK__PCT_xcc, MCK_Imm }, },
2716
  { 181 /* bpos */, SP::BCONDA, Convert__Imm1_1__imm_95_14, 0, { MCK_a, MCK_Imm }, },
2717
  { 181 /* bpos */, SP::BPICCA, Convert__Imm1_2__imm_95_14, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
2718
  { 181 /* bpos */, SP::BPXCCA, Convert__Imm1_2__imm_95_14, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
2719
  { 181 /* bpos */, SP::BPICCNT, Convert__Imm1_2__imm_95_14, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2720
  { 181 /* bpos */, SP::BPXCCNT, Convert__Imm1_2__imm_95_14, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2721
  { 181 /* bpos */, SP::BPICC, Convert__Imm1_2__imm_95_14, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2722
  { 181 /* bpos */, SP::BPXCC, Convert__Imm1_2__imm_95_14, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2723
  { 181 /* bpos */, SP::BPICCANT, Convert__Imm1_3__imm_95_14, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2724
  { 181 /* bpos */, SP::BPXCCANT, Convert__Imm1_3__imm_95_14, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2725
  { 181 /* bpos */, SP::BPICCA, Convert__Imm1_3__imm_95_14, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2726
  { 181 /* bpos */, SP::BPXCCA, Convert__Imm1_3__imm_95_14, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2727
  { 186 /* brgez */, SP::BPGEZnapt, Convert__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm }, },
2728
  { 186 /* brgez */, SP::BPGEZapt, Convert__Reg1_1__Imm1_2, 0, { MCK_a, MCK_IntRegs, MCK_Imm }, },
2729
  { 186 /* brgez */, SP::BPGEZnapn, Convert__Reg1_1__Imm1_2, 0, { MCK_pn, MCK_IntRegs, MCK_Imm }, },
2730
  { 186 /* brgez */, SP::BPGEZnapt, Convert__Reg1_1__Imm1_2, 0, { MCK_pt, MCK_IntRegs, MCK_Imm }, },
2731
  { 186 /* brgez */, SP::BPGEZapn, Convert__Reg1_2__Imm1_3, 0, { MCK_a, MCK_pn, MCK_IntRegs, MCK_Imm }, },
2732
  { 186 /* brgez */, SP::BPGEZapt, Convert__Reg1_2__Imm1_3, 0, { MCK_a, MCK_pt, MCK_IntRegs, MCK_Imm }, },
2733
  { 192 /* brgz */, SP::BPGZnapt, Convert__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm }, },
2734
  { 192 /* brgz */, SP::BPGZapt, Convert__Reg1_1__Imm1_2, 0, { MCK_a, MCK_IntRegs, MCK_Imm }, },
2735
  { 192 /* brgz */, SP::BPGZnapn, Convert__Reg1_1__Imm1_2, 0, { MCK_pn, MCK_IntRegs, MCK_Imm }, },
2736
  { 192 /* brgz */, SP::BPGZnapt, Convert__Reg1_1__Imm1_2, 0, { MCK_pt, MCK_IntRegs, MCK_Imm }, },
2737
  { 192 /* brgz */, SP::BPGZapn, Convert__Reg1_2__Imm1_3, 0, { MCK_a, MCK_pn, MCK_IntRegs, MCK_Imm }, },
2738
  { 192 /* brgz */, SP::BPGZapt, Convert__Reg1_2__Imm1_3, 0, { MCK_a, MCK_pt, MCK_IntRegs, MCK_Imm }, },
2739
  { 197 /* brlez */, SP::BPLEZnapt, Convert__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm }, },
2740
  { 197 /* brlez */, SP::BPLEZapt, Convert__Reg1_1__Imm1_2, 0, { MCK_a, MCK_IntRegs, MCK_Imm }, },
2741
  { 197 /* brlez */, SP::BPLEZnapn, Convert__Reg1_1__Imm1_2, 0, { MCK_pn, MCK_IntRegs, MCK_Imm }, },
2742
  { 197 /* brlez */, SP::BPLEZnapt, Convert__Reg1_1__Imm1_2, 0, { MCK_pt, MCK_IntRegs, MCK_Imm }, },
2743
  { 197 /* brlez */, SP::BPLEZapn, Convert__Reg1_2__Imm1_3, 0, { MCK_a, MCK_pn, MCK_IntRegs, MCK_Imm }, },
2744
  { 197 /* brlez */, SP::BPLEZapt, Convert__Reg1_2__Imm1_3, 0, { MCK_a, MCK_pt, MCK_IntRegs, MCK_Imm }, },
2745
  { 203 /* brlz */, SP::BPLZnapt, Convert__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm }, },
2746
  { 203 /* brlz */, SP::BPLZapt, Convert__Reg1_1__Imm1_2, 0, { MCK_a, MCK_IntRegs, MCK_Imm }, },
2747
  { 203 /* brlz */, SP::BPLZnapn, Convert__Reg1_1__Imm1_2, 0, { MCK_pn, MCK_IntRegs, MCK_Imm }, },
2748
  { 203 /* brlz */, SP::BPLZnapt, Convert__Reg1_1__Imm1_2, 0, { MCK_pt, MCK_IntRegs, MCK_Imm }, },
2749
  { 203 /* brlz */, SP::BPLZapn, Convert__Reg1_2__Imm1_3, 0, { MCK_a, MCK_pn, MCK_IntRegs, MCK_Imm }, },
2750
  { 203 /* brlz */, SP::BPLZapt, Convert__Reg1_2__Imm1_3, 0, { MCK_a, MCK_pt, MCK_IntRegs, MCK_Imm }, },
2751
  { 208 /* brnz */, SP::BPNZnapt, Convert__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm }, },
2752
  { 208 /* brnz */, SP::BPNZapt, Convert__Reg1_1__Imm1_2, 0, { MCK_a, MCK_IntRegs, MCK_Imm }, },
2753
  { 208 /* brnz */, SP::BPNZnapn, Convert__Reg1_1__Imm1_2, 0, { MCK_pn, MCK_IntRegs, MCK_Imm }, },
2754
  { 208 /* brnz */, SP::BPNZnapt, Convert__Reg1_1__Imm1_2, 0, { MCK_pt, MCK_IntRegs, MCK_Imm }, },
2755
  { 208 /* brnz */, SP::BPNZapn, Convert__Reg1_2__Imm1_3, 0, { MCK_a, MCK_pn, MCK_IntRegs, MCK_Imm }, },
2756
  { 208 /* brnz */, SP::BPNZapt, Convert__Reg1_2__Imm1_3, 0, { MCK_a, MCK_pt, MCK_IntRegs, MCK_Imm }, },
2757
  { 213 /* brz */, SP::BPZnapt, Convert__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm }, },
2758
  { 213 /* brz */, SP::BPZapt, Convert__Reg1_1__Imm1_2, 0, { MCK_a, MCK_IntRegs, MCK_Imm }, },
2759
  { 213 /* brz */, SP::BPZnapn, Convert__Reg1_1__Imm1_2, 0, { MCK_pn, MCK_IntRegs, MCK_Imm }, },
2760
  { 213 /* brz */, SP::BPZnapt, Convert__Reg1_1__Imm1_2, 0, { MCK_pt, MCK_IntRegs, MCK_Imm }, },
2761
  { 213 /* brz */, SP::BPZapn, Convert__Reg1_2__Imm1_3, 0, { MCK_a, MCK_pn, MCK_IntRegs, MCK_Imm }, },
2762
  { 213 /* brz */, SP::BPZapt, Convert__Reg1_2__Imm1_3, 0, { MCK_a, MCK_pt, MCK_IntRegs, MCK_Imm }, },
2763
  { 217 /* bset */, SP::ORrr, Convert__Reg1_1__Reg1_1__Reg1_0, 0, { MCK_IntRegs, MCK_IntRegs }, },
2764
  { 217 /* bset */, SP::ORri, Convert__Reg1_1__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_IntRegs }, },
2765
  { 222 /* bshuffle */, SP::BSHUFFLE, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS2, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
2766
  { 231 /* btog */, SP::XORrr, Convert__Reg1_1__Reg1_1__Reg1_0, 0, { MCK_IntRegs, MCK_IntRegs }, },
2767
  { 231 /* btog */, SP::XORri, Convert__Reg1_1__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_IntRegs }, },
2768
  { 236 /* btst */, SP::ANDCCrr, Convert__regG0__Reg1_1__Reg1_0, 0, { MCK_IntRegs, MCK_IntRegs }, },
2769
  { 236 /* btst */, SP::ANDCCri, Convert__regG0__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_IntRegs }, },
2770
  { 241 /* bvc */, SP::BCOND, Convert__Imm1_0__imm_95_15, 0, { MCK_Imm }, },
2771
  { 241 /* bvc */, SP::BPICC, Convert__Imm1_1__imm_95_15, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
2772
  { 241 /* bvc */, SP::BPXCC, Convert__Imm1_1__imm_95_15, 0, { MCK__PCT_xcc, MCK_Imm }, },
2773
  { 241 /* bvc */, SP::BCONDA, Convert__Imm1_1__imm_95_15, 0, { MCK_a, MCK_Imm }, },
2774
  { 241 /* bvc */, SP::BPICCA, Convert__Imm1_2__imm_95_15, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
2775
  { 241 /* bvc */, SP::BPXCCA, Convert__Imm1_2__imm_95_15, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
2776
  { 241 /* bvc */, SP::BPICCNT, Convert__Imm1_2__imm_95_15, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2777
  { 241 /* bvc */, SP::BPXCCNT, Convert__Imm1_2__imm_95_15, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2778
  { 241 /* bvc */, SP::BPICC, Convert__Imm1_2__imm_95_15, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2779
  { 241 /* bvc */, SP::BPXCC, Convert__Imm1_2__imm_95_15, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2780
  { 241 /* bvc */, SP::BPICCANT, Convert__Imm1_3__imm_95_15, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2781
  { 241 /* bvc */, SP::BPXCCANT, Convert__Imm1_3__imm_95_15, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2782
  { 241 /* bvc */, SP::BPICCA, Convert__Imm1_3__imm_95_15, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2783
  { 241 /* bvc */, SP::BPXCCA, Convert__Imm1_3__imm_95_15, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2784
  { 245 /* bvs */, SP::BCOND, Convert__Imm1_0__imm_95_7, 0, { MCK_Imm }, },
2785
  { 245 /* bvs */, SP::BPICC, Convert__Imm1_1__imm_95_7, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
2786
  { 245 /* bvs */, SP::BPXCC, Convert__Imm1_1__imm_95_7, 0, { MCK__PCT_xcc, MCK_Imm }, },
2787
  { 245 /* bvs */, SP::BCONDA, Convert__Imm1_1__imm_95_7, 0, { MCK_a, MCK_Imm }, },
2788
  { 245 /* bvs */, SP::BPICCA, Convert__Imm1_2__imm_95_7, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
2789
  { 245 /* bvs */, SP::BPXCCA, Convert__Imm1_2__imm_95_7, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
2790
  { 245 /* bvs */, SP::BPICCNT, Convert__Imm1_2__imm_95_7, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2791
  { 245 /* bvs */, SP::BPXCCNT, Convert__Imm1_2__imm_95_7, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2792
  { 245 /* bvs */, SP::BPICC, Convert__Imm1_2__imm_95_7, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2793
  { 245 /* bvs */, SP::BPXCC, Convert__Imm1_2__imm_95_7, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2794
  { 245 /* bvs */, SP::BPICCANT, Convert__Imm1_3__imm_95_7, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2795
  { 245 /* bvs */, SP::BPXCCANT, Convert__Imm1_3__imm_95_7, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2796
  { 245 /* bvs */, SP::BPICCA, Convert__Imm1_3__imm_95_7, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2797
  { 245 /* bvs */, SP::BPXCCA, Convert__Imm1_3__imm_95_7, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2798
  { 249 /* bz */, SP::BCOND, Convert__Imm1_0__imm_95_1, 0, { MCK_Imm }, },
2799
  { 249 /* bz */, SP::BPICC, Convert__Imm1_1__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
2800
  { 249 /* bz */, SP::BPXCC, Convert__Imm1_1__imm_95_1, 0, { MCK__PCT_xcc, MCK_Imm }, },
2801
  { 249 /* bz */, SP::BCONDA, Convert__Imm1_1__imm_95_1, 0, { MCK_a, MCK_Imm }, },
2802
  { 249 /* bz */, SP::BPICCA, Convert__Imm1_2__imm_95_1, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
2803
  { 249 /* bz */, SP::BPXCCA, Convert__Imm1_2__imm_95_1, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
2804
  { 249 /* bz */, SP::BPICCNT, Convert__Imm1_2__imm_95_1, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2805
  { 249 /* bz */, SP::BPXCCNT, Convert__Imm1_2__imm_95_1, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2806
  { 249 /* bz */, SP::BPICC, Convert__Imm1_2__imm_95_1, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2807
  { 249 /* bz */, SP::BPXCC, Convert__Imm1_2__imm_95_1, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2808
  { 249 /* bz */, SP::BPICCANT, Convert__Imm1_3__imm_95_1, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2809
  { 249 /* bz */, SP::BPXCCANT, Convert__Imm1_3__imm_95_1, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2810
  { 249 /* bz */, SP::BPICCA, Convert__Imm1_3__imm_95_1, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2811
  { 249 /* bz */, SP::BPXCCA, Convert__Imm1_3__imm_95_1, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2812
  { 252 /* call */, SP::CALL, Convert__Imm1_0, 0, { MCK_Imm }, },
2813
  { 252 /* call */, SP::JMPLri, Convert__regO7__MEMri2_0, 0, { MCK_MEMri }, },
2814
  { 252 /* call */, SP::JMPLrr, Convert__regO7__MEMrr2_0, 0, { MCK_MEMrr }, },
2815
  { 252 /* call */, SP::TLS_CALL, Convert__Imm1_0__Imm1_1, 0, { MCK_Imm, MCK_Imm }, },
2816
  { 257 /* cas */, SP::CASrr, Convert__Reg1_4__Reg1_1__Reg1_3__Tie0_1_1, Feature_HasV9, { MCK__91_, MCK_IntRegs, MCK__93_, MCK_IntRegs, MCK_IntRegs }, },
2817
  { 261 /* casa */, SP::CASAasi10, Convert__Reg1_5__Reg1_1__Reg1_4__Tie0_1_1, 0, { MCK__91_, MCK_IntRegs, MCK__93_, MCK_10, MCK_IntRegs, MCK_IntRegs }, },
2818
  { 261 /* casa */, SP::CASArr, Convert__Reg1_5__Reg1_1__Reg1_4__Tie0_1_1__Imm1_3, 0, { MCK__91_, MCK_IntRegs, MCK__93_, MCK_Imm, MCK_IntRegs, MCK_IntRegs }, },
2819
  { 266 /* casx */, SP::CASXrr, Convert__Reg1_4__Reg1_1__Reg1_3__Tie0_1_1, 0, { MCK__91_, MCK_IntRegs, MCK__93_, MCK_IntRegs, MCK_IntRegs }, },
2820
  { 271 /* cb */, SP::CBCOND, Convert__Imm1_0__imm_95_8, 0, { MCK_Imm }, },
2821
  { 271 /* cb */, SP::CBCONDA, Convert__Imm1_1__imm_95_8, 0, { MCK_a, MCK_Imm }, },
2822
  { 271 /* cb */, SP::CBCOND, Convert__Imm1_1__Imm1_0, 0, { MCK_Imm, MCK_Imm }, },
2823
  { 271 /* cb */, SP::CBCONDA, Convert__Imm1_2__Imm1_0, 0, { MCK_Imm, MCK_a, MCK_Imm }, },
2824
  { 274 /* cb0 */, SP::CBCOND, Convert__Imm1_0__imm_95_9, 0, { MCK_Imm }, },
2825
  { 274 /* cb0 */, SP::CBCONDA, Convert__Imm1_1__imm_95_9, 0, { MCK_a, MCK_Imm }, },
2826
  { 278 /* cb01 */, SP::CBCOND, Convert__Imm1_0__imm_95_13, 0, { MCK_Imm }, },
2827
  { 278 /* cb01 */, SP::CBCONDA, Convert__Imm1_1__imm_95_13, 0, { MCK_a, MCK_Imm }, },
2828
  { 283 /* cb012 */, SP::CBCOND, Convert__Imm1_0__imm_95_15, 0, { MCK_Imm }, },
2829
  { 283 /* cb012 */, SP::CBCONDA, Convert__Imm1_1__imm_95_15, 0, { MCK_a, MCK_Imm }, },
2830
  { 289 /* cb013 */, SP::CBCOND, Convert__Imm1_0__imm_95_14, 0, { MCK_Imm }, },
2831
  { 289 /* cb013 */, SP::CBCONDA, Convert__Imm1_1__imm_95_14, 0, { MCK_a, MCK_Imm }, },
2832
  { 295 /* cb02 */, SP::CBCOND, Convert__Imm1_0__imm_95_11, 0, { MCK_Imm }, },
2833
  { 295 /* cb02 */, SP::CBCONDA, Convert__Imm1_1__imm_95_11, 0, { MCK_a, MCK_Imm }, },
2834
  { 300 /* cb023 */, SP::CBCOND, Convert__Imm1_0__imm_95_12, 0, { MCK_Imm }, },
2835
  { 300 /* cb023 */, SP::CBCONDA, Convert__Imm1_1__imm_95_12, 0, { MCK_a, MCK_Imm }, },
2836
  { 306 /* cb03 */, SP::CBCOND, Convert__Imm1_0__imm_95_10, 0, { MCK_Imm }, },
2837
  { 306 /* cb03 */, SP::CBCONDA, Convert__Imm1_1__imm_95_10, 0, { MCK_a, MCK_Imm }, },
2838
  { 311 /* cb1 */, SP::CBCOND, Convert__Imm1_0__imm_95_4, 0, { MCK_Imm }, },
2839
  { 311 /* cb1 */, SP::CBCONDA, Convert__Imm1_1__imm_95_4, 0, { MCK_a, MCK_Imm }, },
2840
  { 315 /* cb12 */, SP::CBCOND, Convert__Imm1_0__imm_95_2, 0, { MCK_Imm }, },
2841
  { 315 /* cb12 */, SP::CBCONDA, Convert__Imm1_1__imm_95_2, 0, { MCK_a, MCK_Imm }, },
2842
  { 320 /* cb123 */, SP::CBCOND, Convert__Imm1_0__imm_95_1, 0, { MCK_Imm }, },
2843
  { 320 /* cb123 */, SP::CBCONDA, Convert__Imm1_1__imm_95_1, 0, { MCK_a, MCK_Imm }, },
2844
  { 326 /* cb13 */, SP::CBCOND, Convert__Imm1_0__imm_95_3, 0, { MCK_Imm }, },
2845
  { 326 /* cb13 */, SP::CBCONDA, Convert__Imm1_1__imm_95_3, 0, { MCK_a, MCK_Imm }, },
2846
  { 331 /* cb2 */, SP::CBCOND, Convert__Imm1_0__imm_95_6, 0, { MCK_Imm }, },
2847
  { 331 /* cb2 */, SP::CBCONDA, Convert__Imm1_1__imm_95_6, 0, { MCK_a, MCK_Imm }, },
2848
  { 335 /* cb23 */, SP::CBCOND, Convert__Imm1_0__imm_95_5, 0, { MCK_Imm }, },
2849
  { 335 /* cb23 */, SP::CBCONDA, Convert__Imm1_1__imm_95_5, 0, { MCK_a, MCK_Imm }, },
2850
  { 340 /* cb3 */, SP::CBCOND, Convert__Imm1_0__imm_95_7, 0, { MCK_Imm }, },
2851
  { 340 /* cb3 */, SP::CBCONDA, Convert__Imm1_1__imm_95_7, 0, { MCK_a, MCK_Imm }, },
2852
  { 344 /* cba */, SP::CBCOND, Convert__Imm1_0__imm_95_8, 0, { MCK_Imm }, },
2853
  { 344 /* cba */, SP::CBCONDA, Convert__Imm1_1__imm_95_8, 0, { MCK_a, MCK_Imm }, },
2854
  { 348 /* cbn */, SP::CBCOND, Convert__Imm1_0__imm_95_0, 0, { MCK_Imm }, },
2855
  { 348 /* cbn */, SP::CBCONDA, Convert__Imm1_1__imm_95_0, 0, { MCK_a, MCK_Imm }, },
2856
  { 352 /* clr */, SP::ORrr, Convert__Reg1_0__regG0__regG0, 0, { MCK_IntRegs }, },
2857
  { 352 /* clr */, SP::STri, Convert__MEMri2_1__regG0, 0, { MCK__91_, MCK_MEMri, MCK__93_ }, },
2858
  { 352 /* clr */, SP::STrr, Convert__MEMrr2_1__regG0, 0, { MCK__91_, MCK_MEMrr, MCK__93_ }, },
2859
  { 356 /* clrb */, SP::STBri, Convert__MEMri2_1__regG0, 0, { MCK__91_, MCK_MEMri, MCK__93_ }, },
2860
  { 356 /* clrb */, SP::STBrr, Convert__MEMrr2_1__regG0, 0, { MCK__91_, MCK_MEMrr, MCK__93_ }, },
2861
  { 361 /* clrh */, SP::STHri, Convert__MEMri2_1__regG0, 0, { MCK__91_, MCK_MEMri, MCK__93_ }, },
2862
  { 361 /* clrh */, SP::STHrr, Convert__MEMrr2_1__regG0, 0, { MCK__91_, MCK_MEMrr, MCK__93_ }, },
2863
  { 366 /* cmask16 */, SP::CMASK16, Convert__Reg1_0, Feature_HasVIS3, { MCK_IntRegs }, },
2864
  { 374 /* cmask32 */, SP::CMASK32, Convert__Reg1_0, Feature_HasVIS3, { MCK_IntRegs }, },
2865
  { 382 /* cmask8 */, SP::CMASK8, Convert__Reg1_0, Feature_HasVIS3, { MCK_IntRegs }, },
2866
  { 389 /* cmp */, SP::CMPrr, Convert__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs }, },
2867
  { 389 /* cmp */, SP::CMPri, Convert__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm }, },
2868
  { 393 /* dec */, SP::SUBri, Convert__Reg1_0__Reg1_0__imm_95_1, 0, { MCK_IntRegs }, },
2869
  { 393 /* dec */, SP::SUBri, Convert__Reg1_1__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_IntRegs }, },
2870
  { 397 /* deccc */, SP::SUBCCri, Convert__Reg1_0__Reg1_0__imm_95_1, 0, { MCK_IntRegs }, },
2871
  { 397 /* deccc */, SP::SUBCCri, Convert__Reg1_1__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_IntRegs }, },
2872
  { 403 /* edge16 */, SP::EDGE16, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
2873
  { 410 /* edge16l */, SP::EDGE16L, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
2874
  { 418 /* edge16ln */, SP::EDGE16LN, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS2, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
2875
  { 427 /* edge16n */, SP::EDGE16N, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS2, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
2876
  { 435 /* edge32 */, SP::EDGE32, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
2877
  { 442 /* edge32l */, SP::EDGE32L, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
2878
  { 450 /* edge32ln */, SP::EDGE32LN, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS2, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
2879
  { 459 /* edge32n */, SP::EDGE32N, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS2, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
2880
  { 467 /* edge8 */, SP::EDGE8, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
2881
  { 473 /* edge8l */, SP::EDGE8L, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
2882
  { 480 /* edge8ln */, SP::EDGE8LN, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS2, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
2883
  { 488 /* edge8n */, SP::EDGE8N, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS2, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
2884
  { 495 /* fabsd */, SP::FABSD, Convert__Reg1_1__Reg1_0, Feature_HasV9, { MCK_DFPRegs, MCK_DFPRegs }, },
2885
  { 501 /* fabsq */, SP::FABSQ, Convert__Reg1_1__Reg1_0, Feature_HasV9, { MCK_QFPRegs, MCK_QFPRegs }, },
2886
  { 507 /* fabss */, SP::FABSS, Convert__Reg1_1__Reg1_0, 0, { MCK_FPRegs, MCK_FPRegs }, },
2887
  { 513 /* faddd */, SP::FADDD, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
2888
  { 519 /* faddq */, SP::FADDQ, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_QFPRegs, MCK_QFPRegs, MCK_QFPRegs }, },
2889
  { 525 /* fadds */, SP::FADDS, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_FPRegs, MCK_FPRegs, MCK_FPRegs }, },
2890
  { 531 /* faligndata */, SP::FALIGNADATA, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
2891
  { 542 /* fand */, SP::FAND, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
2892
  { 547 /* fandnot1 */, SP::FANDNOT1, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
2893
  { 556 /* fandnot1s */, SP::FANDNOT1S, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_FPRegs, MCK_FPRegs, MCK_FPRegs }, },
2894
  { 566 /* fandnot2 */, SP::FANDNOT2, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
2895
  { 575 /* fandnot2s */, SP::FANDNOT2S, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_FPRegs, MCK_FPRegs, MCK_FPRegs }, },
2896
  { 585 /* fands */, SP::FANDS, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_FPRegs, MCK_FPRegs, MCK_FPRegs }, },
2897
  { 591 /* fb */, SP::FBCOND, Convert__Imm1_0__imm_95_8, 0, { MCK_Imm }, },
2898
  { 591 /* fb */, SP::FBCONDA, Convert__Imm1_1__imm_95_8, 0, { MCK_a, MCK_Imm }, },
2899
  { 591 /* fb */, SP::BPFCC, Convert__Imm1_1__imm_95_8__Reg1_0, Feature_HasV9, { MCK_FCCRegs, MCK_Imm }, },
2900
  { 591 /* fb */, SP::FBCOND, Convert__Imm1_1__Imm1_0, 0, { MCK_Imm, MCK_Imm }, },
2901
  { 591 /* fb */, SP::BPFCCA, Convert__Imm1_2__imm_95_8__Reg1_1, Feature_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
2902
  { 591 /* fb */, SP::BPFCCNT, Convert__Imm1_2__imm_95_8__Reg1_1, Feature_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
2903
  { 591 /* fb */, SP::BPFCC, Convert__Imm1_2__imm_95_8__Reg1_1, Feature_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
2904
  { 591 /* fb */, SP::FBCONDA, Convert__Imm1_2__Imm1_0, 0, { MCK_Imm, MCK_a, MCK_Imm }, },
2905
  { 591 /* fb */, SP::BPFCC, Convert__Imm1_2__Imm1_0__Reg1_1, Feature_HasV9, { MCK_Imm, MCK_FCCRegs, MCK_Imm }, },
2906
  { 591 /* fb */, SP::BPFCCANT, Convert__Imm1_3__imm_95_8__Reg1_2, Feature_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
2907
  { 591 /* fb */, SP::BPFCCA, Convert__Imm1_3__imm_95_8__Reg1_2, Feature_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
2908
  { 591 /* fb */, SP::BPFCCA, Convert__Imm1_3__Imm1_0__Reg1_2, Feature_HasV9, { MCK_Imm, MCK_a, MCK_FCCRegs, MCK_Imm }, },
2909
  { 591 /* fb */, SP::BPFCCNT, Convert__Imm1_3__Imm1_0__Reg1_2, Feature_HasV9, { MCK_Imm, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
2910
  { 591 /* fb */, SP::BPFCCANT, Convert__Imm1_4__Imm1_0__Reg1_3, Feature_HasV9, { MCK_Imm, MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
2911
  { 594 /* fba */, SP::FBCOND, Convert__Imm1_0__imm_95_8, 0, { MCK_Imm }, },
2912
  { 594 /* fba */, SP::FBCONDA, Convert__Imm1_1__imm_95_8, 0, { MCK_a, MCK_Imm }, },
2913
  { 594 /* fba */, SP::BPFCC, Convert__Imm1_1__imm_95_8__Reg1_0, Feature_HasV9, { MCK_FCCRegs, MCK_Imm }, },
2914
  { 594 /* fba */, SP::BPFCCA, Convert__Imm1_2__imm_95_8__Reg1_1, Feature_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
2915
  { 594 /* fba */, SP::BPFCCNT, Convert__Imm1_2__imm_95_8__Reg1_1, Feature_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
2916
  { 594 /* fba */, SP::BPFCC, Convert__Imm1_2__imm_95_8__Reg1_1, Feature_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
2917
  { 594 /* fba */, SP::BPFCCANT, Convert__Imm1_3__imm_95_8__Reg1_2, Feature_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
2918
  { 594 /* fba */, SP::BPFCCA, Convert__Imm1_3__imm_95_8__Reg1_2, Feature_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
2919
  { 598 /* fbe */, SP::FBCOND, Convert__Imm1_0__imm_95_9, 0, { MCK_Imm }, },
2920
  { 598 /* fbe */, SP::FBCONDA, Convert__Imm1_1__imm_95_9, 0, { MCK_a, MCK_Imm }, },
2921
  { 598 /* fbe */, SP::BPFCC, Convert__Imm1_1__imm_95_9__Reg1_0, Feature_HasV9, { MCK_FCCRegs, MCK_Imm }, },
2922
  { 598 /* fbe */, SP::BPFCCA, Convert__Imm1_2__imm_95_9__Reg1_1, Feature_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
2923
  { 598 /* fbe */, SP::BPFCCNT, Convert__Imm1_2__imm_95_9__Reg1_1, Feature_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
2924
  { 598 /* fbe */, SP::BPFCC, Convert__Imm1_2__imm_95_9__Reg1_1, Feature_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
2925
  { 598 /* fbe */, SP::BPFCCANT, Convert__Imm1_3__imm_95_9__Reg1_2, Feature_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
2926
  { 598 /* fbe */, SP::BPFCCA, Convert__Imm1_3__imm_95_9__Reg1_2, Feature_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
2927
  { 602 /* fbg */, SP::FBCOND, Convert__Imm1_0__imm_95_6, 0, { MCK_Imm }, },
2928
  { 602 /* fbg */, SP::FBCONDA, Convert__Imm1_1__imm_95_6, 0, { MCK_a, MCK_Imm }, },
2929
  { 602 /* fbg */, SP::BPFCC, Convert__Imm1_1__imm_95_6__Reg1_0, Feature_HasV9, { MCK_FCCRegs, MCK_Imm }, },
2930
  { 602 /* fbg */, SP::BPFCCA, Convert__Imm1_2__imm_95_6__Reg1_1, Feature_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
2931
  { 602 /* fbg */, SP::BPFCCNT, Convert__Imm1_2__imm_95_6__Reg1_1, Feature_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
2932
  { 602 /* fbg */, SP::BPFCC, Convert__Imm1_2__imm_95_6__Reg1_1, Feature_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
2933
  { 602 /* fbg */, SP::BPFCCANT, Convert__Imm1_3__imm_95_6__Reg1_2, Feature_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
2934
  { 602 /* fbg */, SP::BPFCCA, Convert__Imm1_3__imm_95_6__Reg1_2, Feature_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
2935
  { 606 /* fbge */, SP::FBCOND, Convert__Imm1_0__imm_95_11, 0, { MCK_Imm }, },
2936
  { 606 /* fbge */, SP::FBCONDA, Convert__Imm1_1__imm_95_11, 0, { MCK_a, MCK_Imm }, },
2937
  { 606 /* fbge */, SP::BPFCC, Convert__Imm1_1__imm_95_11__Reg1_0, Feature_HasV9, { MCK_FCCRegs, MCK_Imm }, },
2938
  { 606 /* fbge */, SP::BPFCCA, Convert__Imm1_2__imm_95_11__Reg1_1, Feature_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
2939
  { 606 /* fbge */, SP::BPFCCNT, Convert__Imm1_2__imm_95_11__Reg1_1, Feature_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
2940
  { 606 /* fbge */, SP::BPFCC, Convert__Imm1_2__imm_95_11__Reg1_1, Feature_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
2941
  { 606 /* fbge */, SP::BPFCCANT, Convert__Imm1_3__imm_95_11__Reg1_2, Feature_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
2942
  { 606 /* fbge */, SP::BPFCCA, Convert__Imm1_3__imm_95_11__Reg1_2, Feature_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
2943
  { 611 /* fbl */, SP::FBCOND, Convert__Imm1_0__imm_95_4, 0, { MCK_Imm }, },
2944
  { 611 /* fbl */, SP::FBCONDA, Convert__Imm1_1__imm_95_4, 0, { MCK_a, MCK_Imm }, },
2945
  { 611 /* fbl */, SP::BPFCC, Convert__Imm1_1__imm_95_4__Reg1_0, Feature_HasV9, { MCK_FCCRegs, MCK_Imm }, },
2946
  { 611 /* fbl */, SP::BPFCCA, Convert__Imm1_2__imm_95_4__Reg1_1, Feature_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
2947
  { 611 /* fbl */, SP::BPFCCNT, Convert__Imm1_2__imm_95_4__Reg1_1, Feature_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
2948
  { 611 /* fbl */, SP::BPFCC, Convert__Imm1_2__imm_95_4__Reg1_1, Feature_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
2949
  { 611 /* fbl */, SP::BPFCCANT, Convert__Imm1_3__imm_95_4__Reg1_2, Feature_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
2950
  { 611 /* fbl */, SP::BPFCCA, Convert__Imm1_3__imm_95_4__Reg1_2, Feature_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
2951
  { 615 /* fble */, SP::FBCOND, Convert__Imm1_0__imm_95_13, 0, { MCK_Imm }, },
2952
  { 615 /* fble */, SP::FBCONDA, Convert__Imm1_1__imm_95_13, 0, { MCK_a, MCK_Imm }, },
2953
  { 615 /* fble */, SP::BPFCC, Convert__Imm1_1__imm_95_13__Reg1_0, Feature_HasV9, { MCK_FCCRegs, MCK_Imm }, },
2954
  { 615 /* fble */, SP::BPFCCA, Convert__Imm1_2__imm_95_13__Reg1_1, Feature_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
2955
  { 615 /* fble */, SP::BPFCCNT, Convert__Imm1_2__imm_95_13__Reg1_1, Feature_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
2956
  { 615 /* fble */, SP::BPFCC, Convert__Imm1_2__imm_95_13__Reg1_1, Feature_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
2957
  { 615 /* fble */, SP::BPFCCANT, Convert__Imm1_3__imm_95_13__Reg1_2, Feature_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
2958
  { 615 /* fble */, SP::BPFCCA, Convert__Imm1_3__imm_95_13__Reg1_2, Feature_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
2959
  { 620 /* fblg */, SP::FBCOND, Convert__Imm1_0__imm_95_2, 0, { MCK_Imm }, },
2960
  { 620 /* fblg */, SP::FBCONDA, Convert__Imm1_1__imm_95_2, 0, { MCK_a, MCK_Imm }, },
2961
  { 620 /* fblg */, SP::BPFCC, Convert__Imm1_1__imm_95_2__Reg1_0, Feature_HasV9, { MCK_FCCRegs, MCK_Imm }, },
2962
  { 620 /* fblg */, SP::BPFCCA, Convert__Imm1_2__imm_95_2__Reg1_1, Feature_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
2963
  { 620 /* fblg */, SP::BPFCCNT, Convert__Imm1_2__imm_95_2__Reg1_1, Feature_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
2964
  { 620 /* fblg */, SP::BPFCC, Convert__Imm1_2__imm_95_2__Reg1_1, Feature_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
2965
  { 620 /* fblg */, SP::BPFCCANT, Convert__Imm1_3__imm_95_2__Reg1_2, Feature_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
2966
  { 620 /* fblg */, SP::BPFCCA, Convert__Imm1_3__imm_95_2__Reg1_2, Feature_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
2967
  { 625 /* fbn */, SP::FBCOND, Convert__Imm1_0__imm_95_0, 0, { MCK_Imm }, },
2968
  { 625 /* fbn */, SP::FBCONDA, Convert__Imm1_1__imm_95_0, 0, { MCK_a, MCK_Imm }, },
2969
  { 625 /* fbn */, SP::BPFCC, Convert__Imm1_1__imm_95_0__Reg1_0, Feature_HasV9, { MCK_FCCRegs, MCK_Imm }, },
2970
  { 625 /* fbn */, SP::BPFCCA, Convert__Imm1_2__imm_95_0__Reg1_1, Feature_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
2971
  { 625 /* fbn */, SP::BPFCCNT, Convert__Imm1_2__imm_95_0__Reg1_1, Feature_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
2972
  { 625 /* fbn */, SP::BPFCC, Convert__Imm1_2__imm_95_0__Reg1_1, Feature_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
2973
  { 625 /* fbn */, SP::BPFCCANT, Convert__Imm1_3__imm_95_0__Reg1_2, Feature_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
2974
  { 625 /* fbn */, SP::BPFCCA, Convert__Imm1_3__imm_95_0__Reg1_2, Feature_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
2975
  { 629 /* fbne */, SP::FBCOND, Convert__Imm1_0__imm_95_1, 0, { MCK_Imm }, },
2976
  { 629 /* fbne */, SP::FBCONDA, Convert__Imm1_1__imm_95_1, 0, { MCK_a, MCK_Imm }, },
2977
  { 629 /* fbne */, SP::BPFCC, Convert__Imm1_1__imm_95_1__Reg1_0, Feature_HasV9, { MCK_FCCRegs, MCK_Imm }, },
2978
  { 629 /* fbne */, SP::BPFCCA, Convert__Imm1_2__imm_95_1__Reg1_1, Feature_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
2979
  { 629 /* fbne */, SP::BPFCCNT, Convert__Imm1_2__imm_95_1__Reg1_1, Feature_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
2980
  { 629 /* fbne */, SP::BPFCC, Convert__Imm1_2__imm_95_1__Reg1_1, Feature_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
2981
  { 629 /* fbne */, SP::BPFCCANT, Convert__Imm1_3__imm_95_1__Reg1_2, Feature_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
2982
  { 629 /* fbne */, SP::BPFCCA, Convert__Imm1_3__imm_95_1__Reg1_2, Feature_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
2983
  { 634 /* fbnz */, SP::FBCOND, Convert__Imm1_0__imm_95_1, 0, { MCK_Imm }, },
2984
  { 634 /* fbnz */, SP::FBCONDA, Convert__Imm1_1__imm_95_1, 0, { MCK_a, MCK_Imm }, },
2985
  { 634 /* fbnz */, SP::BPFCC, Convert__Imm1_1__imm_95_1__Reg1_0, Feature_HasV9, { MCK_FCCRegs, MCK_Imm }, },
2986
  { 634 /* fbnz */, SP::BPFCCA, Convert__Imm1_2__imm_95_1__Reg1_1, Feature_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
2987
  { 634 /* fbnz */, SP::BPFCCNT, Convert__Imm1_2__imm_95_1__Reg1_1, Feature_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
2988
  { 634 /* fbnz */, SP::BPFCC, Convert__Imm1_2__imm_95_1__Reg1_1, Feature_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
2989
  { 634 /* fbnz */, SP::BPFCCANT, Convert__Imm1_3__imm_95_1__Reg1_2, Feature_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
2990
  { 634 /* fbnz */, SP::BPFCCA, Convert__Imm1_3__imm_95_1__Reg1_2, Feature_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
2991
  { 639 /* fbo */, SP::FBCOND, Convert__Imm1_0__imm_95_15, 0, { MCK_Imm }, },
2992
  { 639 /* fbo */, SP::FBCONDA, Convert__Imm1_1__imm_95_15, 0, { MCK_a, MCK_Imm }, },
2993
  { 639 /* fbo */, SP::BPFCC, Convert__Imm1_1__imm_95_15__Reg1_0, Feature_HasV9, { MCK_FCCRegs, MCK_Imm }, },
2994
  { 639 /* fbo */, SP::BPFCCA, Convert__Imm1_2__imm_95_15__Reg1_1, Feature_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
2995
  { 639 /* fbo */, SP::BPFCCNT, Convert__Imm1_2__imm_95_15__Reg1_1, Feature_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
2996
  { 639 /* fbo */, SP::BPFCC, Convert__Imm1_2__imm_95_15__Reg1_1, Feature_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
2997
  { 639 /* fbo */, SP::BPFCCANT, Convert__Imm1_3__imm_95_15__Reg1_2, Feature_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
2998
  { 639 /* fbo */, SP::BPFCCA, Convert__Imm1_3__imm_95_15__Reg1_2, Feature_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
2999
  { 643 /* fbu */, SP::FBCOND, Convert__Imm1_0__imm_95_7, 0, { MCK_Imm }, },
3000
  { 643 /* fbu */, SP::FBCONDA, Convert__Imm1_1__imm_95_7, 0, { MCK_a, MCK_Imm }, },
3001
  { 643 /* fbu */, SP::BPFCC, Convert__Imm1_1__imm_95_7__Reg1_0, Feature_HasV9, { MCK_FCCRegs, MCK_Imm }, },
3002
  { 643 /* fbu */, SP::BPFCCA, Convert__Imm1_2__imm_95_7__Reg1_1, Feature_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
3003
  { 643 /* fbu */, SP::BPFCCNT, Convert__Imm1_2__imm_95_7__Reg1_1, Feature_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
3004
  { 643 /* fbu */, SP::BPFCC, Convert__Imm1_2__imm_95_7__Reg1_1, Feature_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
3005
  { 643 /* fbu */, SP::BPFCCANT, Convert__Imm1_3__imm_95_7__Reg1_2, Feature_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
3006
  { 643 /* fbu */, SP::BPFCCA, Convert__Imm1_3__imm_95_7__Reg1_2, Feature_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
3007
  { 647 /* fbue */, SP::FBCOND, Convert__Imm1_0__imm_95_10, 0, { MCK_Imm }, },
3008
  { 647 /* fbue */, SP::FBCONDA, Convert__Imm1_1__imm_95_10, 0, { MCK_a, MCK_Imm }, },
3009
  { 647 /* fbue */, SP::BPFCC, Convert__Imm1_1__imm_95_10__Reg1_0, Feature_HasV9, { MCK_FCCRegs, MCK_Imm }, },
3010
  { 647 /* fbue */, SP::BPFCCA, Convert__Imm1_2__imm_95_10__Reg1_1, Feature_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
3011
  { 647 /* fbue */, SP::BPFCCNT, Convert__Imm1_2__imm_95_10__Reg1_1, Feature_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
3012
  { 647 /* fbue */, SP::BPFCC, Convert__Imm1_2__imm_95_10__Reg1_1, Feature_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
3013
  { 647 /* fbue */, SP::BPFCCANT, Convert__Imm1_3__imm_95_10__Reg1_2, Feature_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
3014
  { 647 /* fbue */, SP::BPFCCA, Convert__Imm1_3__imm_95_10__Reg1_2, Feature_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
3015
  { 652 /* fbug */, SP::FBCOND, Convert__Imm1_0__imm_95_5, 0, { MCK_Imm }, },
3016
  { 652 /* fbug */, SP::FBCONDA, Convert__Imm1_1__imm_95_5, 0, { MCK_a, MCK_Imm }, },
3017
  { 652 /* fbug */, SP::BPFCC, Convert__Imm1_1__imm_95_5__Reg1_0, Feature_HasV9, { MCK_FCCRegs, MCK_Imm }, },
3018
  { 652 /* fbug */, SP::BPFCCA, Convert__Imm1_2__imm_95_5__Reg1_1, Feature_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
3019
  { 652 /* fbug */, SP::BPFCCNT, Convert__Imm1_2__imm_95_5__Reg1_1, Feature_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
3020
  { 652 /* fbug */, SP::BPFCC, Convert__Imm1_2__imm_95_5__Reg1_1, Feature_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
3021
  { 652 /* fbug */, SP::BPFCCANT, Convert__Imm1_3__imm_95_5__Reg1_2, Feature_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
3022
  { 652 /* fbug */, SP::BPFCCA, Convert__Imm1_3__imm_95_5__Reg1_2, Feature_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
3023
  { 657 /* fbuge */, SP::FBCOND, Convert__Imm1_0__imm_95_12, 0, { MCK_Imm }, },
3024
  { 657 /* fbuge */, SP::FBCONDA, Convert__Imm1_1__imm_95_12, 0, { MCK_a, MCK_Imm }, },
3025
  { 657 /* fbuge */, SP::BPFCC, Convert__Imm1_1__imm_95_12__Reg1_0, Feature_HasV9, { MCK_FCCRegs, MCK_Imm }, },
3026
  { 657 /* fbuge */, SP::BPFCCA, Convert__Imm1_2__imm_95_12__Reg1_1, Feature_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
3027
  { 657 /* fbuge */, SP::BPFCCNT, Convert__Imm1_2__imm_95_12__Reg1_1, Feature_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
3028
  { 657 /* fbuge */, SP::BPFCC, Convert__Imm1_2__imm_95_12__Reg1_1, Feature_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
3029
  { 657 /* fbuge */, SP::BPFCCANT, Convert__Imm1_3__imm_95_12__Reg1_2, Feature_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
3030
  { 657 /* fbuge */, SP::BPFCCA, Convert__Imm1_3__imm_95_12__Reg1_2, Feature_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
3031
  { 663 /* fbul */, SP::FBCOND, Convert__Imm1_0__imm_95_3, 0, { MCK_Imm }, },
3032
  { 663 /* fbul */, SP::FBCONDA, Convert__Imm1_1__imm_95_3, 0, { MCK_a, MCK_Imm }, },
3033
  { 663 /* fbul */, SP::BPFCC, Convert__Imm1_1__imm_95_3__Reg1_0, Feature_HasV9, { MCK_FCCRegs, MCK_Imm }, },
3034
  { 663 /* fbul */, SP::BPFCCA, Convert__Imm1_2__imm_95_3__Reg1_1, Feature_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
3035
  { 663 /* fbul */, SP::BPFCCNT, Convert__Imm1_2__imm_95_3__Reg1_1, Feature_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
3036
  { 663 /* fbul */, SP::BPFCC, Convert__Imm1_2__imm_95_3__Reg1_1, Feature_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
3037
  { 663 /* fbul */, SP::BPFCCANT, Convert__Imm1_3__imm_95_3__Reg1_2, Feature_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
3038
  { 663 /* fbul */, SP::BPFCCA, Convert__Imm1_3__imm_95_3__Reg1_2, Feature_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
3039
  { 668 /* fbule */, SP::FBCOND, Convert__Imm1_0__imm_95_14, 0, { MCK_Imm }, },
3040
  { 668 /* fbule */, SP::FBCONDA, Convert__Imm1_1__imm_95_14, 0, { MCK_a, MCK_Imm }, },
3041
  { 668 /* fbule */, SP::BPFCC, Convert__Imm1_1__imm_95_14__Reg1_0, Feature_HasV9, { MCK_FCCRegs, MCK_Imm }, },
3042
  { 668 /* fbule */, SP::BPFCCA, Convert__Imm1_2__imm_95_14__Reg1_1, Feature_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
3043
  { 668 /* fbule */, SP::BPFCCNT, Convert__Imm1_2__imm_95_14__Reg1_1, Feature_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
3044
  { 668 /* fbule */, SP::BPFCC, Convert__Imm1_2__imm_95_14__Reg1_1, Feature_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
3045
  { 668 /* fbule */, SP::BPFCCANT, Convert__Imm1_3__imm_95_14__Reg1_2, Feature_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
3046
  { 668 /* fbule */, SP::BPFCCA, Convert__Imm1_3__imm_95_14__Reg1_2, Feature_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
3047
  { 674 /* fbz */, SP::FBCOND, Convert__Imm1_0__imm_95_9, 0, { MCK_Imm }, },
3048
  { 674 /* fbz */, SP::FBCONDA, Convert__Imm1_1__imm_95_9, 0, { MCK_a, MCK_Imm }, },
3049
  { 674 /* fbz */, SP::BPFCC, Convert__Imm1_1__imm_95_9__Reg1_0, Feature_HasV9, { MCK_FCCRegs, MCK_Imm }, },
3050
  { 674 /* fbz */, SP::BPFCCA, Convert__Imm1_2__imm_95_9__Reg1_1, Feature_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
3051
  { 674 /* fbz */, SP::BPFCCNT, Convert__Imm1_2__imm_95_9__Reg1_1, Feature_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
3052
  { 674 /* fbz */, SP::BPFCC, Convert__Imm1_2__imm_95_9__Reg1_1, Feature_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
3053
  { 674 /* fbz */, SP::BPFCCANT, Convert__Imm1_3__imm_95_9__Reg1_2, Feature_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
3054
  { 674 /* fbz */, SP::BPFCCA, Convert__Imm1_3__imm_95_9__Reg1_2, Feature_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
3055
  { 678 /* fchksm16 */, SP::FCHKSM16, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3056
  { 687 /* fcmpd */, SP::V9FCMPD, Convert__regFCC0__Reg1_0__Reg1_1, 0, { MCK_DFPRegs, MCK_DFPRegs }, },
3057
  { 687 /* fcmpd */, SP::V9FCMPD, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3058
  { 693 /* fcmped */, SP::V9FCMPED, Convert__regFCC0__Reg1_0__Reg1_1, 0, { MCK_DFPRegs, MCK_DFPRegs }, },
3059
  { 693 /* fcmped */, SP::V9FCMPED, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3060
  { 700 /* fcmpeq */, SP::V9FCMPEQ, Convert__regFCC0__Reg1_0__Reg1_1, 0, { MCK_QFPRegs, MCK_QFPRegs }, },
3061
  { 700 /* fcmpeq */, SP::V9FCMPEQ, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
3062
  { 707 /* fcmpeq16 */, SP::FCMPEQ16, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_IntRegs }, },
3063
  { 716 /* fcmpeq32 */, SP::FCMPEQ32, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_IntRegs }, },
3064
  { 725 /* fcmpes */, SP::V9FCMPES, Convert__regFCC0__Reg1_0__Reg1_1, 0, { MCK_FPRegs, MCK_FPRegs }, },
3065
  { 725 /* fcmpes */, SP::V9FCMPES, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
3066
  { 732 /* fcmpgt16 */, SP::FCMPGT16, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_IntRegs }, },
3067
  { 741 /* fcmpgt32 */, SP::FCMPGT32, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_IntRegs }, },
3068
  { 750 /* fcmple16 */, SP::FCMPLE16, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_IntRegs }, },
3069
  { 759 /* fcmple32 */, SP::FCMPLE32, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_IntRegs }, },
3070
  { 768 /* fcmpne16 */, SP::FCMPNE16, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_IntRegs }, },
3071
  { 777 /* fcmpne32 */, SP::FCMPNE32, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_IntRegs }, },
3072
  { 786 /* fcmpq */, SP::V9FCMPQ, Convert__regFCC0__Reg1_0__Reg1_1, 0, { MCK_QFPRegs, MCK_QFPRegs }, },
3073
  { 786 /* fcmpq */, SP::V9FCMPQ, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
3074
  { 792 /* fcmps */, SP::V9FCMPS, Convert__regFCC0__Reg1_0__Reg1_1, 0, { MCK_FPRegs, MCK_FPRegs }, },
3075
  { 792 /* fcmps */, SP::V9FCMPS, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
3076
  { 798 /* fdivd */, SP::FDIVD, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3077
  { 804 /* fdivq */, SP::FDIVQ, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_QFPRegs, MCK_QFPRegs, MCK_QFPRegs }, },
3078
  { 810 /* fdivs */, SP::FDIVS, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_FPRegs, MCK_FPRegs, MCK_FPRegs }, },
3079
  { 816 /* fdmulq */, SP::FDMULQ, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_DFPRegs, MCK_DFPRegs, MCK_QFPRegs }, },
3080
  { 823 /* fdtoi */, SP::FDTOI, Convert__Reg1_1__Reg1_0, 0, { MCK_DFPRegs, MCK_FPRegs }, },
3081
  { 829 /* fdtoq */, SP::FDTOQ, Convert__Reg1_1__Reg1_0, 0, { MCK_DFPRegs, MCK_QFPRegs }, },
3082
  { 835 /* fdtos */, SP::FDTOS, Convert__Reg1_1__Reg1_0, 0, { MCK_DFPRegs, MCK_FPRegs }, },
3083
  { 841 /* fdtox */, SP::FDTOX, Convert__Reg1_1__Reg1_0, 0, { MCK_DFPRegs, MCK_DFPRegs }, },
3084
  { 847 /* fexpand */, SP::FEXPAND, Convert__Reg1_1__Reg1_0, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs }, },
3085
  { 855 /* fhaddd */, SP::FHADDD, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3086
  { 862 /* fhadds */, SP::FHADDS, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3087
  { 869 /* fhsubd */, SP::FHSUBD, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3088
  { 876 /* fhsubs */, SP::FHSUBS, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3089
  { 883 /* fitod */, SP::FITOD, Convert__Reg1_1__Reg1_0, 0, { MCK_FPRegs, MCK_DFPRegs }, },
3090
  { 889 /* fitoq */, SP::FITOQ, Convert__Reg1_1__Reg1_0, 0, { MCK_FPRegs, MCK_QFPRegs }, },
3091
  { 895 /* fitos */, SP::FITOS, Convert__Reg1_1__Reg1_0, 0, { MCK_FPRegs, MCK_FPRegs }, },
3092
  { 901 /* flcmpd */, SP::FLCMPD, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVIS3, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3093
  { 908 /* flcmps */, SP::FLCMPS, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVIS3, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3094
  { 915 /* flush */, SP::FLUSH, Convert_NoOperands, 0, {  }, },
3095
  { 915 /* flush */, SP::FLUSH, Convert_NoOperands, 0, { MCK__PCT_g0 }, },
3096
  { 915 /* flush */, SP::FLUSHri, Convert__MEMri2_0, 0, { MCK_MEMri }, },
3097
  { 915 /* flush */, SP::FLUSHrr, Convert__MEMrr2_0, 0, { MCK_MEMrr }, },
3098
  { 921 /* flushw */, SP::FLUSHW, Convert_NoOperands, Feature_HasV9, {  }, },
3099
  { 928 /* fmean16 */, SP::FMEAN16, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3100
  { 936 /* fmovd */, SP::FMOVD, Convert__Reg1_1__Reg1_0, Feature_HasV9, { MCK_DFPRegs, MCK_DFPRegs }, },
3101
  { 936 /* fmovd */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
3102
  { 936 /* fmovd */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
3103
  { 936 /* fmovd */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_8, Feature_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3104
  { 936 /* fmovd */, SP::FMOVD_FCC, Convert__Reg1_3__Reg1_2__Tie0_1_1__Imm1_0, Feature_HasV9, { MCK_Imm, MCK__PCT_fcc0, MCK_DFPRegs, MCK_DFPRegs }, },
3105
  { 936 /* fmovd */, SP::FMOVD_ICC, Convert__Reg1_3__Reg1_2__Tie0_1_1__Imm1_0, Feature_HasV9, { MCK_Imm, MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
3106
  { 936 /* fmovd */, SP::FMOVD_XCC, Convert__Reg1_3__Reg1_2__Tie0_1_1__Imm1_0, 0, { MCK_Imm, MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
3107
  { 936 /* fmovd */, SP::V9FMOVD_FCC, Convert__Reg1_3__Reg1_1__Reg1_2__Tie0_1_1__Imm1_0, Feature_HasV9, { MCK_Imm, MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3108
  { 942 /* fmovda */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
3109
  { 942 /* fmovda */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
3110
  { 942 /* fmovda */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_8, Feature_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3111
  { 949 /* fmovdcc */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
3112
  { 949 /* fmovdcc */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
3113
  { 957 /* fmovdcs */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
3114
  { 957 /* fmovdcs */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
3115
  { 965 /* fmovde */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
3116
  { 965 /* fmovde */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
3117
  { 965 /* fmovde */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_9, Feature_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3118
  { 972 /* fmovdeq */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
3119
  { 972 /* fmovdeq */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
3120
  { 980 /* fmovdg */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_10, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
3121
  { 980 /* fmovdg */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_10, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
3122
  { 980 /* fmovdg */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_6, Feature_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3123
  { 987 /* fmovdge */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_11, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
3124
  { 987 /* fmovdge */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_11, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
3125
  { 987 /* fmovdge */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_11, Feature_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3126
  { 995 /* fmovdgeu */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
3127
  { 995 /* fmovdgeu */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
3128
  { 1004 /* fmovdgu */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_12, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
3129
  { 1004 /* fmovdgu */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_12, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
3130
  { 1012 /* fmovdl */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_3, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
3131
  { 1012 /* fmovdl */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_3, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
3132
  { 1012 /* fmovdl */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_4, Feature_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3133
  { 1019 /* fmovdle */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_2, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
3134
  { 1019 /* fmovdle */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_2, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
3135
  { 1019 /* fmovdle */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_13, Feature_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3136
  { 1027 /* fmovdleu */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_4, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
3137
  { 1027 /* fmovdleu */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_4, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
3138
  { 1036 /* fmovdlg */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_2, Feature_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3139
  { 1044 /* fmovdlu */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
3140
  { 1044 /* fmovdlu */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
3141
  { 1052 /* fmovdn */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_0, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
3142
  { 1052 /* fmovdn */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_0, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
3143
  { 1052 /* fmovdn */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_0, Feature_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3144
  { 1059 /* fmovdne */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
3145
  { 1059 /* fmovdne */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
3146
  { 1059 /* fmovdne */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3147
  { 1067 /* fmovdneg */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_6, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
3148
  { 1067 /* fmovdneg */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_6, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
3149
  { 1076 /* fmovdnz */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
3150
  { 1076 /* fmovdnz */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
3151
  { 1076 /* fmovdnz */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3152
  { 1084 /* fmovdo */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_15, Feature_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3153
  { 1091 /* fmovdpos */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_14, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
3154
  { 1091 /* fmovdpos */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_14, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
3155
  { 1100 /* fmovdu */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_7, Feature_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3156
  { 1107 /* fmovdue */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_10, Feature_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3157
  { 1115 /* fmovdug */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_5, Feature_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3158
  { 1123 /* fmovduge */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_12, Feature_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3159
  { 1132 /* fmovdul */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_3, Feature_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3160
  { 1140 /* fmovdule */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_14, Feature_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3161
  { 1149 /* fmovdvc */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_15, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
3162
  { 1149 /* fmovdvc */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_15, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
3163
  { 1157 /* fmovdvs */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_7, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
3164
  { 1157 /* fmovdvs */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_7, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
3165
  { 1165 /* fmovdz */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
3166
  { 1165 /* fmovdz */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
3167
  { 1165 /* fmovdz */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_9, Feature_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3168
  { 1172 /* fmovq */, SP::FMOVQ, Convert__Reg1_1__Reg1_0, Feature_HasV9, { MCK_QFPRegs, MCK_QFPRegs }, },
3169
  { 1172 /* fmovq */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
3170
  { 1172 /* fmovq */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
3171
  { 1172 /* fmovq */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_8, Feature_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
3172
  { 1172 /* fmovq */, SP::FMOVQ_FCC, Convert__Reg1_3__Reg1_2__Tie0_1_1__Imm1_0, Feature_HasV9, { MCK_Imm, MCK__PCT_fcc0, MCK_QFPRegs, MCK_QFPRegs }, },
3173
  { 1172 /* fmovq */, SP::FMOVQ_ICC, Convert__Reg1_3__Reg1_2__Tie0_1_1__Imm1_0, Feature_HasV9, { MCK_Imm, MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
3174
  { 1172 /* fmovq */, SP::FMOVQ_XCC, Convert__Reg1_3__Reg1_2__Tie0_1_1__Imm1_0, 0, { MCK_Imm, MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
3175
  { 1172 /* fmovq */, SP::V9FMOVQ_FCC, Convert__Reg1_3__Reg1_1__Reg1_2__Tie0_1_1__Imm1_0, Feature_HasV9, { MCK_Imm, MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
3176
  { 1178 /* fmovqa */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
3177
  { 1178 /* fmovqa */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
3178
  { 1178 /* fmovqa */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_8, Feature_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
3179
  { 1185 /* fmovqcc */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
3180
  { 1185 /* fmovqcc */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
3181
  { 1193 /* fmovqcs */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
3182
  { 1193 /* fmovqcs */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
3183
  { 1201 /* fmovqe */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
3184
  { 1201 /* fmovqe */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
3185
  { 1201 /* fmovqe */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_9, Feature_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
3186
  { 1208 /* fmovqeq */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
3187
  { 1208 /* fmovqeq */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
3188
  { 1216 /* fmovqg */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_10, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
3189
  { 1216 /* fmovqg */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_10, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
3190
  { 1216 /* fmovqg */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_6, Feature_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
3191
  { 1223 /* fmovqge */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_11, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
3192
  { 1223 /* fmovqge */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_11, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
3193
  { 1223 /* fmovqge */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_11, Feature_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
3194
  { 1231 /* fmovqgeu */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
3195
  { 1231 /* fmovqgeu */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
3196
  { 1240 /* fmovqgu */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_12, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
3197
  { 1240 /* fmovqgu */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_12, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
3198
  { 1248 /* fmovql */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_3, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
3199
  { 1248 /* fmovql */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_3, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
3200
  { 1248 /* fmovql */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_4, Feature_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
3201
  { 1255 /* fmovqle */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_2, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
3202
  { 1255 /* fmovqle */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_2, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
3203
  { 1255 /* fmovqle */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_13, Feature_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
3204
  { 1263 /* fmovqleu */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_4, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
3205
  { 1263 /* fmovqleu */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_4, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
3206
  { 1272 /* fmovqlg */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_2, Feature_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
3207
  { 1280 /* fmovqlu */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
3208
  { 1280 /* fmovqlu */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
3209
  { 1288 /* fmovqn */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_0, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
3210
  { 1288 /* fmovqn */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_0, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
3211
  { 1288 /* fmovqn */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_0, Feature_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
3212
  { 1295 /* fmovqne */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
3213
  { 1295 /* fmovqne */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
3214
  { 1295 /* fmovqne */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
3215
  { 1303 /* fmovqneg */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_6, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
3216
  { 1303 /* fmovqneg */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_6, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
3217
  { 1312 /* fmovqnz */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
3218
  { 1312 /* fmovqnz */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
3219
  { 1312 /* fmovqnz */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
3220
  { 1320 /* fmovqo */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_15, Feature_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
3221
  { 1327 /* fmovqpos */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_14, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
3222
  { 1327 /* fmovqpos */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_14, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
3223
  { 1336 /* fmovqu */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_7, Feature_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
3224
  { 1343 /* fmovque */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_10, Feature_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
3225
  { 1351 /* fmovqug */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_5, Feature_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
3226
  { 1359 /* fmovquge */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_12, Feature_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
3227
  { 1368 /* fmovqul */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_3, Feature_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
3228
  { 1376 /* fmovqule */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_14, Feature_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
3229
  { 1385 /* fmovqvc */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_15, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
3230
  { 1385 /* fmovqvc */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_15, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
3231
  { 1393 /* fmovqvs */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_7, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
3232
  { 1393 /* fmovqvs */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_7, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
3233
  { 1401 /* fmovqz */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
3234
  { 1401 /* fmovqz */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
3235
  { 1401 /* fmovqz */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_9, Feature_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
3236
  { 1408 /* fmovrdgez */, SP::FMOVRGEZD, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasV9, { MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
3237
  { 1418 /* fmovrdgz */, SP::FMOVRGZD, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasV9, { MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
3238
  { 1427 /* fmovrdlez */, SP::FMOVRLEZD, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasV9, { MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
3239
  { 1437 /* fmovrdlz */, SP::FMOVRLZD, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasV9, { MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
3240
  { 1446 /* fmovrdnz */, SP::FMOVRNZD, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasV9, { MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
3241
  { 1455 /* fmovrdz */, SP::FMOVRZD, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasV9, { MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
3242
  { 1463 /* fmovrqgez */, SP::FMOVRGEZQ, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasV9, { MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
3243
  { 1473 /* fmovrqgz */, SP::FMOVRGZQ, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasV9, { MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
3244
  { 1482 /* fmovrqlez */, SP::FMOVRLEZQ, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasV9, { MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
3245
  { 1492 /* fmovrqlz */, SP::FMOVRLZQ, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasV9, { MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
3246
  { 1501 /* fmovrqnz */, SP::FMOVRNZQ, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasV9, { MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
3247
  { 1510 /* fmovrqz */, SP::FMOVRZQ, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasV9, { MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
3248
  { 1518 /* fmovrsgez */, SP::FMOVRGEZS, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasV9, { MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
3249
  { 1528 /* fmovrsgz */, SP::FMOVRGZS, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasV9, { MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
3250
  { 1537 /* fmovrslez */, SP::FMOVRLEZS, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasV9, { MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
3251
  { 1547 /* fmovrslz */, SP::FMOVRLZS, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasV9, { MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
3252
  { 1556 /* fmovrsnz */, SP::FMOVRNZS, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasV9, { MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
3253
  { 1565 /* fmovrsz */, SP::FMOVRZS, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasV9, { MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
3254
  { 1573 /* fmovs */, SP::FMOVS, Convert__Reg1_1__Reg1_0, 0, { MCK_FPRegs, MCK_FPRegs }, },
3255
  { 1573 /* fmovs */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
3256
  { 1573 /* fmovs */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
3257
  { 1573 /* fmovs */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_8, Feature_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
3258
  { 1573 /* fmovs */, SP::FMOVS_FCC, Convert__Reg1_3__Reg1_2__Tie0_1_1__Imm1_0, Feature_HasV9, { MCK_Imm, MCK__PCT_fcc0, MCK_FPRegs, MCK_FPRegs }, },
3259
  { 1573 /* fmovs */, SP::FMOVS_ICC, Convert__Reg1_3__Reg1_2__Tie0_1_1__Imm1_0, Feature_HasV9, { MCK_Imm, MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
3260
  { 1573 /* fmovs */, SP::FMOVS_XCC, Convert__Reg1_3__Reg1_2__Tie0_1_1__Imm1_0, 0, { MCK_Imm, MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
3261
  { 1573 /* fmovs */, SP::V9FMOVS_FCC, Convert__Reg1_3__Reg1_1__Reg1_2__Tie0_1_1__Imm1_0, Feature_HasV9, { MCK_Imm, MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
3262
  { 1579 /* fmovsa */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
3263
  { 1579 /* fmovsa */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
3264
  { 1579 /* fmovsa */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_8, Feature_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
3265
  { 1586 /* fmovscc */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
3266
  { 1586 /* fmovscc */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
3267
  { 1594 /* fmovscs */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
3268
  { 1594 /* fmovscs */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
3269
  { 1602 /* fmovse */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
3270
  { 1602 /* fmovse */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
3271
  { 1602 /* fmovse */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_9, Feature_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
3272
  { 1609 /* fmovseq */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
3273
  { 1609 /* fmovseq */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
3274
  { 1617 /* fmovsg */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_10, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
3275
  { 1617 /* fmovsg */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_10, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
3276
  { 1617 /* fmovsg */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_6, Feature_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
3277
  { 1624 /* fmovsge */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_11, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
3278
  { 1624 /* fmovsge */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_11, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
3279
  { 1624 /* fmovsge */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_11, Feature_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
3280
  { 1632 /* fmovsgeu */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
3281
  { 1632 /* fmovsgeu */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
3282
  { 1641 /* fmovsgu */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_12, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
3283
  { 1641 /* fmovsgu */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_12, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
3284
  { 1649 /* fmovsl */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_3, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
3285
  { 1649 /* fmovsl */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_3, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
3286
  { 1649 /* fmovsl */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_4, Feature_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
3287
  { 1656 /* fmovsle */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_2, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
3288
  { 1656 /* fmovsle */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_2, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
3289
  { 1656 /* fmovsle */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_13, Feature_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
3290
  { 1664 /* fmovsleu */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_4, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
3291
  { 1664 /* fmovsleu */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_4, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
3292
  { 1673 /* fmovslg */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_2, Feature_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
3293
  { 1681 /* fmovslu */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
3294
  { 1681 /* fmovslu */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
3295
  { 1689 /* fmovsn */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_0, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
3296
  { 1689 /* fmovsn */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_0, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
3297
  { 1689 /* fmovsn */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_0, Feature_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
3298
  { 1696 /* fmovsne */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
3299
  { 1696 /* fmovsne */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
3300
  { 1696 /* fmovsne */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
3301
  { 1704 /* fmovsneg */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_6, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
3302
  { 1704 /* fmovsneg */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_6, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
3303
  { 1713 /* fmovsnz */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
3304
  { 1713 /* fmovsnz */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
3305
  { 1713 /* fmovsnz */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
3306
  { 1721 /* fmovso */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_15, Feature_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
3307
  { 1728 /* fmovspos */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_14, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
3308
  { 1728 /* fmovspos */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_14, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
3309
  { 1737 /* fmovsu */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_7, Feature_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
3310
  { 1744 /* fmovsue */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_10, Feature_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
3311
  { 1752 /* fmovsug */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_5, Feature_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
3312
  { 1760 /* fmovsuge */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_12, Feature_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
3313
  { 1769 /* fmovsul */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_3, Feature_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
3314
  { 1777 /* fmovsule */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_14, Feature_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
3315
  { 1786 /* fmovsvc */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_15, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
3316
  { 1786 /* fmovsvc */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_15, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
3317
  { 1794 /* fmovsvs */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_7, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
3318
  { 1794 /* fmovsvs */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_7, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
3319
  { 1802 /* fmovsz */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
3320
  { 1802 /* fmovsz */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
3321
  { 1802 /* fmovsz */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_9, Feature_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
3322
  { 1809 /* fmul8sux16 */, SP::FMUL8SUX16, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3323
  { 1820 /* fmul8ulx16 */, SP::FMUL8ULX16, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3324
  { 1831 /* fmul8x16 */, SP::FMUL8X16, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3325
  { 1840 /* fmul8x16al */, SP::FMUL8X16AL, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3326
  { 1851 /* fmul8x16au */, SP::FMUL8X16AU, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3327
  { 1862 /* fmuld */, SP::FMULD, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3328
  { 1868 /* fmuld8sux16 */, SP::FMULD8SUX16, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3329
  { 1880 /* fmuld8ulx16 */, SP::FMULD8ULX16, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3330
  { 1892 /* fmulq */, SP::FMULQ, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_QFPRegs, MCK_QFPRegs, MCK_QFPRegs }, },
3331
  { 1898 /* fmuls */, SP::FMULS, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_FPRegs, MCK_FPRegs, MCK_FPRegs }, },
3332
  { 1904 /* fnaddd */, SP::FNADDD, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3333
  { 1911 /* fnadds */, SP::FNADDS, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3334
  { 1918 /* fnand */, SP::FNAND, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3335
  { 1924 /* fnands */, SP::FNANDS, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_FPRegs, MCK_FPRegs, MCK_FPRegs }, },
3336
  { 1931 /* fnegd */, SP::FNEGD, Convert__Reg1_1__Reg1_0, Feature_HasV9, { MCK_DFPRegs, MCK_DFPRegs }, },
3337
  { 1937 /* fnegq */, SP::FNEGQ, Convert__Reg1_1__Reg1_0, Feature_HasV9, { MCK_QFPRegs, MCK_QFPRegs }, },
3338
  { 1943 /* fnegs */, SP::FNEGS, Convert__Reg1_1__Reg1_0, 0, { MCK_FPRegs, MCK_FPRegs }, },
3339
  { 1949 /* fnhaddd */, SP::FNHADDD, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3340
  { 1949 /* fnhaddd */, SP::FNMULD, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3341
  { 1957 /* fnhadds */, SP::FNHADDS, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3342
  { 1957 /* fnhadds */, SP::FNMULS, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3343
  { 1957 /* fnhadds */, SP::FNSMULD, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3344
  { 1965 /* fnor */, SP::FNOR, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3345
  { 1970 /* fnors */, SP::FNORS, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_FPRegs, MCK_FPRegs, MCK_FPRegs }, },
3346
  { 1976 /* fnot1 */, SP::FNOT1, Convert__Reg1_1__Reg1_0, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs }, },
3347
  { 1982 /* fnot1s */, SP::FNOT1S, Convert__Reg1_1__Reg1_0, Feature_HasVIS, { MCK_FPRegs, MCK_FPRegs }, },
3348
  { 1989 /* fnot2 */, SP::FNOT2, Convert__Reg1_1__Reg1_0, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs }, },
3349
  { 1995 /* fnot2s */, SP::FNOT2S, Convert__Reg1_1__Reg1_0, Feature_HasVIS, { MCK_FPRegs, MCK_FPRegs }, },
3350
  { 2002 /* fone */, SP::FONE, Convert__Reg1_0__Tie0_1_1, Feature_HasVIS, { MCK_DFPRegs }, },
3351
  { 2007 /* fones */, SP::FONES, Convert__Reg1_0__Tie0_1_1, Feature_HasVIS, { MCK_FPRegs }, },
3352
  { 2013 /* for */, SP::FOR, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3353
  { 2017 /* fornot1 */, SP::FORNOT1, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3354
  { 2025 /* fornot1s */, SP::FORNOT1S, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_FPRegs, MCK_FPRegs, MCK_FPRegs }, },
3355
  { 2034 /* fornot2 */, SP::FORNOT2, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3356
  { 2042 /* fornot2s */, SP::FORNOT2S, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_FPRegs, MCK_FPRegs, MCK_FPRegs }, },
3357
  { 2051 /* fors */, SP::FORS, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_FPRegs, MCK_FPRegs, MCK_FPRegs }, },
3358
  { 2056 /* fpack16 */, SP::FPACK16, Convert__Reg1_1__Reg1_0, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs }, },
3359
  { 2064 /* fpack32 */, SP::FPACK32, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3360
  { 2072 /* fpackfix */, SP::FPACKFIX, Convert__Reg1_1__Reg1_0, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs }, },
3361
  { 2081 /* fpadd16 */, SP::FPADD16, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3362
  { 2089 /* fpadd16s */, SP::FPADD16S, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3363
  { 2098 /* fpadd32 */, SP::FPADD32, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3364
  { 2106 /* fpadd32s */, SP::FPADD32S, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3365
  { 2115 /* fpadd64 */, SP::FPADD64, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3366
  { 2123 /* fpmerge */, SP::FPMERGE, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3367
  { 2131 /* fpsub16 */, SP::FPSUB16, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3368
  { 2139 /* fpsub16S */, SP::FPSUB16S, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3369
  { 2148 /* fpsub32 */, SP::FPSUB32, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3370
  { 2156 /* fpsub32S */, SP::FPSUB32S, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3371
  { 2165 /* fqtod */, SP::FQTOD, Convert__Reg1_1__Reg1_0, 0, { MCK_QFPRegs, MCK_DFPRegs }, },
3372
  { 2171 /* fqtoi */, SP::FQTOI, Convert__Reg1_1__Reg1_0, 0, { MCK_QFPRegs, MCK_FPRegs }, },
3373
  { 2177 /* fqtos */, SP::FQTOS, Convert__Reg1_1__Reg1_0, 0, { MCK_QFPRegs, MCK_FPRegs }, },
3374
  { 2183 /* fqtox */, SP::FQTOX, Convert__Reg1_1__Reg1_0, 0, { MCK_QFPRegs, MCK_DFPRegs }, },
3375
  { 2189 /* fslas16 */, SP::FSLAS16, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3376
  { 2197 /* fslas32 */, SP::FSLAS32, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3377
  { 2205 /* fsll16 */, SP::FSLL16, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3378
  { 2212 /* fsll32 */, SP::FSLL32, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3379
  { 2219 /* fsmuld */, SP::FSMULD, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_FPRegs, MCK_FPRegs, MCK_DFPRegs }, },
3380
  { 2226 /* fsqrtd */, SP::FSQRTD, Convert__Reg1_1__Reg1_0, 0, { MCK_DFPRegs, MCK_DFPRegs }, },
3381
  { 2233 /* fsqrtq */, SP::FSQRTQ, Convert__Reg1_1__Reg1_0, 0, { MCK_QFPRegs, MCK_QFPRegs }, },
3382
  { 2240 /* fsqrts */, SP::FSQRTS, Convert__Reg1_1__Reg1_0, 0, { MCK_FPRegs, MCK_FPRegs }, },
3383
  { 2247 /* fsra16 */, SP::FSRA16, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3384
  { 2254 /* fsra32 */, SP::FSRA32, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3385
  { 2261 /* fsrc1 */, SP::FSRC1, Convert__Reg1_1__Reg1_0, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs }, },
3386
  { 2267 /* fsrc1s */, SP::FSRC1S, Convert__Reg1_1__Reg1_0, Feature_HasVIS, { MCK_FPRegs, MCK_FPRegs }, },
3387
  { 2274 /* fsrc2 */, SP::FSRC2, Convert__Reg1_1__Reg1_0, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs }, },
3388
  { 2280 /* fsrc2s */, SP::FSRC2S, Convert__Reg1_1__Reg1_0, Feature_HasVIS, { MCK_FPRegs, MCK_FPRegs }, },
3389
  { 2287 /* fsrl16 */, SP::FSRL16, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3390
  { 2294 /* fsrl32 */, SP::FSRL32, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3391
  { 2301 /* fstod */, SP::FSTOD, Convert__Reg1_1__Reg1_0, 0, { MCK_FPRegs, MCK_DFPRegs }, },
3392
  { 2307 /* fstoi */, SP::FSTOI, Convert__Reg1_1__Reg1_0, 0, { MCK_FPRegs, MCK_FPRegs }, },
3393
  { 2313 /* fstoq */, SP::FSTOQ, Convert__Reg1_1__Reg1_0, 0, { MCK_FPRegs, MCK_QFPRegs }, },
3394
  { 2319 /* fstox */, SP::FSTOX, Convert__Reg1_1__Reg1_0, 0, { MCK_FPRegs, MCK_DFPRegs }, },
3395
  { 2325 /* fsubd */, SP::FSUBD, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3396
  { 2331 /* fsubq */, SP::FSUBQ, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_QFPRegs, MCK_QFPRegs, MCK_QFPRegs }, },
3397
  { 2337 /* fsubs */, SP::FSUBS, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_FPRegs, MCK_FPRegs, MCK_FPRegs }, },
3398
  { 2343 /* fxnor */, SP::FXNOR, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3399
  { 2349 /* fxnors */, SP::FXNORS, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_FPRegs, MCK_FPRegs, MCK_FPRegs }, },
3400
  { 2356 /* fxor */, SP::FXOR, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3401
  { 2361 /* fxors */, SP::FXORS, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_FPRegs, MCK_FPRegs, MCK_FPRegs }, },
3402
  { 2367 /* fxtod */, SP::FXTOD, Convert__Reg1_1__Reg1_0, 0, { MCK_DFPRegs, MCK_DFPRegs }, },
3403
  { 2373 /* fxtoq */, SP::FXTOQ, Convert__Reg1_1__Reg1_0, 0, { MCK_DFPRegs, MCK_QFPRegs }, },
3404
  { 2379 /* fxtos */, SP::FXTOS, Convert__Reg1_1__Reg1_0, 0, { MCK_DFPRegs, MCK_FPRegs }, },
3405
  { 2385 /* fzero */, SP::FZERO, Convert__Reg1_0__Tie0_1_1, Feature_HasVIS, { MCK_DFPRegs }, },
3406
  { 2391 /* fzeros */, SP::FZEROS, Convert__Reg1_0__Tie0_1_1, Feature_HasVIS, { MCK_FPRegs }, },
3407
  { 2398 /* inc */, SP::ADDri, Convert__Reg1_0__Reg1_0__imm_95_1, 0, { MCK_IntRegs }, },
3408
  { 2398 /* inc */, SP::ADDri, Convert__Reg1_1__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_IntRegs }, },
3409
  { 2402 /* inccc */, SP::ADDCCri, Convert__Reg1_0__Reg1_0__imm_95_1, 0, { MCK_IntRegs }, },
3410
  { 2402 /* inccc */, SP::ADDCCri, Convert__Reg1_1__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_IntRegs }, },
3411
  { 2408 /* jmp */, SP::JMPLri, Convert__regG0__MEMri2_0, 0, { MCK_MEMri }, },
3412
  { 2408 /* jmp */, SP::JMPLrr, Convert__regG0__MEMrr2_0, 0, { MCK_MEMrr }, },
3413
  { 2412 /* jmpl */, SP::JMPLri, Convert__Reg1_1__MEMri2_0, 0, { MCK_MEMri, MCK_IntRegs }, },
3414
  { 2412 /* jmpl */, SP::JMPLrr, Convert__Reg1_1__MEMrr2_0, 0, { MCK_MEMrr, MCK_IntRegs }, },
3415
  { 2417 /* ld */, SP::LDCSRri, Convert__MEMri2_1, 0, { MCK__91_, MCK_MEMri, MCK__93_, MCK__PCT_csr }, },
3416
  { 2417 /* ld */, SP::LDFSRri, Convert__MEMri2_1, 0, { MCK__91_, MCK_MEMri, MCK__93_, MCK__PCT_fsr }, },
3417
  { 2417 /* ld */, SP::LDCri, Convert__Reg1_3__MEMri2_1, 0, { MCK__91_, MCK_MEMri, MCK__93_, MCK_CoprocRegs }, },
3418
  { 2417 /* ld */, SP::LDFri, Convert__Reg1_3__MEMri2_1, 0, { MCK__91_, MCK_MEMri, MCK__93_, MCK_FPRegs }, },
3419
  { 2417 /* ld */, SP::LDri, Convert__Reg1_3__MEMri2_1, 0, { MCK__91_, MCK_MEMri, MCK__93_, MCK_IntRegs }, },
3420
  { 2417 /* ld */, SP::LDCSRrr, Convert__MEMrr2_1, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK__PCT_csr }, },
3421
  { 2417 /* ld */, SP::LDFSRrr, Convert__MEMrr2_1, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK__PCT_fsr }, },
3422
  { 2417 /* ld */, SP::LDCrr, Convert__Reg1_3__MEMrr2_1, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_CoprocRegs }, },
3423
  { 2417 /* ld */, SP::LDFrr, Convert__Reg1_3__MEMrr2_1, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_FPRegs }, },
3424
  { 2417 /* ld */, SP::LDrr, Convert__Reg1_3__MEMrr2_1, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_IntRegs }, },
3425
  { 2417 /* ld */, SP::TLS_LDrr, Convert__Reg1_3__MEMrr2_1__Imm1_4, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_IntRegs, MCK_Imm }, },
3426
  { 2420 /* lda */, SP::LDFArr, Convert__Reg1_4__MEMrr2_1__Imm1_3, Feature_HasV9, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_Imm, MCK_FPRegs }, },
3427
  { 2420 /* lda */, SP::LDArr, Convert__Reg1_4__MEMrr2_1__Imm1_3, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_Imm, MCK_IntRegs }, },
3428
  { 2424 /* ldd */, SP::LDDCri, Convert__Reg1_3__MEMri2_1, 0, { MCK__91_, MCK_MEMri, MCK__93_, MCK_CoprocPair }, },
3429
  { 2424 /* ldd */, SP::LDDri, Convert__Reg1_3__MEMri2_1, 0, { MCK__91_, MCK_MEMri, MCK__93_, MCK_IntPair }, },
3430
  { 2424 /* ldd */, SP::LDDFri, Convert__Reg1_3__MEMri2_1, 0, { MCK__91_, MCK_MEMri, MCK__93_, MCK_DFPRegs }, },
3431
  { 2424 /* ldd */, SP::LDDCrr, Convert__Reg1_3__MEMrr2_1, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_CoprocPair }, },
3432
  { 2424 /* ldd */, SP::LDDrr, Convert__Reg1_3__MEMrr2_1, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_IntPair }, },
3433
  { 2424 /* ldd */, SP::LDDFrr, Convert__Reg1_3__MEMrr2_1, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_DFPRegs }, },
3434
  { 2428 /* ldda */, SP::LDDArr, Convert__Reg1_4__MEMrr2_1__Imm1_3, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_Imm, MCK_IntPair }, },
3435
  { 2428 /* ldda */, SP::LDDFArr, Convert__Reg1_4__MEMrr2_1__Imm1_3, Feature_HasV9, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_Imm, MCK_DFPRegs }, },
3436
  { 2433 /* ldq */, SP::LDQFri, Convert__Reg1_3__MEMri2_1, Feature_HasV9, { MCK__91_, MCK_MEMri, MCK__93_, MCK_QFPRegs }, },
3437
  { 2433 /* ldq */, SP::LDQFrr, Convert__Reg1_3__MEMrr2_1, Feature_HasV9, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_QFPRegs }, },
3438
  { 2437 /* ldqa */, SP::LDQFArr, Convert__Reg1_4__MEMrr2_1__Imm1_3, Feature_HasV9, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_Imm, MCK_QFPRegs }, },
3439
  { 2442 /* ldsb */, SP::LDSBri, Convert__Reg1_3__MEMri2_1, 0, { MCK__91_, MCK_MEMri, MCK__93_, MCK_IntRegs }, },
3440
  { 2442 /* ldsb */, SP::LDSBrr, Convert__Reg1_3__MEMrr2_1, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_IntRegs }, },
3441
  { 2447 /* ldsba */, SP::LDSBArr, Convert__Reg1_4__MEMrr2_1__Imm1_3, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_Imm, MCK_IntRegs }, },
3442
  { 2453 /* ldsh */, SP::LDSHri, Convert__Reg1_3__MEMri2_1, 0, { MCK__91_, MCK_MEMri, MCK__93_, MCK_IntRegs }, },
3443
  { 2453 /* ldsh */, SP::LDSHrr, Convert__Reg1_3__MEMrr2_1, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_IntRegs }, },
3444
  { 2458 /* ldsha */, SP::LDSHArr, Convert__Reg1_4__MEMrr2_1__Imm1_3, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_Imm, MCK_IntRegs }, },
3445
  { 2464 /* ldstub */, SP::LDSTUBri, Convert__Reg1_3__MEMri2_1, 0, { MCK__91_, MCK_MEMri, MCK__93_, MCK_IntRegs }, },
3446
  { 2464 /* ldstub */, SP::LDSTUBrr, Convert__Reg1_3__MEMrr2_1, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_IntRegs }, },
3447
  { 2471 /* ldstuba */, SP::LDSTUBArr, Convert__Reg1_4__MEMrr2_1__Imm1_3, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_Imm, MCK_IntRegs }, },
3448
  { 2479 /* ldsw */, SP::LDSWri, Convert__Reg1_3__MEMri2_1, 0, { MCK__91_, MCK_MEMri, MCK__93_, MCK_IntRegs }, },
3449
  { 2479 /* ldsw */, SP::LDSWrr, Convert__Reg1_3__MEMrr2_1, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_IntRegs }, },
3450
  { 2484 /* ldub */, SP::LDUBri, Convert__Reg1_3__MEMri2_1, 0, { MCK__91_, MCK_MEMri, MCK__93_, MCK_IntRegs }, },
3451
  { 2484 /* ldub */, SP::LDUBrr, Convert__Reg1_3__MEMrr2_1, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_IntRegs }, },
3452
  { 2489 /* lduba */, SP::LDUBArr, Convert__Reg1_4__MEMrr2_1__Imm1_3, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_Imm, MCK_IntRegs }, },
3453
  { 2495 /* lduh */, SP::LDUHri, Convert__Reg1_3__MEMri2_1, 0, { MCK__91_, MCK_MEMri, MCK__93_, MCK_IntRegs }, },
3454
  { 2495 /* lduh */, SP::LDUHrr, Convert__Reg1_3__MEMrr2_1, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_IntRegs }, },
3455
  { 2500 /* lduha */, SP::LDUHArr, Convert__Reg1_4__MEMrr2_1__Imm1_3, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_Imm, MCK_IntRegs }, },
3456
  { 2506 /* ldx */, SP::LDXFSRri, Convert__MEMri2_1, Feature_HasV9, { MCK__91_, MCK_MEMri, MCK__93_, MCK__PCT_fsr }, },
3457
  { 2506 /* ldx */, SP::LDXri, Convert__Reg1_3__MEMri2_1, 0, { MCK__91_, MCK_MEMri, MCK__93_, MCK_IntRegs }, },
3458
  { 2506 /* ldx */, SP::LDXFSRrr, Convert__MEMrr2_1, Feature_HasV9, { MCK__91_, MCK_MEMrr, MCK__93_, MCK__PCT_fsr }, },
3459
  { 2506 /* ldx */, SP::LDXrr, Convert__Reg1_3__MEMrr2_1, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_IntRegs }, },
3460
  { 2506 /* ldx */, SP::TLS_LDXrr, Convert__Reg1_3__MEMrr2_1__Imm1_4, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_IntRegs, MCK_Imm }, },
3461
  { 2510 /* lzcnt */, SP::LZCNT, Convert__Reg1_1__Reg1_0, Feature_HasVIS3, { MCK_IntRegs, MCK_IntRegs }, },
3462
  { 2516 /* membar */, SP::MEMBARi, Convert__Imm1_0, Feature_HasV9, { MCK_Imm }, },
3463
  { 2523 /* mov */, SP::RDPSR, Convert__Reg1_1, 0, { MCK__PCT_psr, MCK_IntRegs }, },
3464
  { 2523 /* mov */, SP::RDTBR, Convert__Reg1_1, 0, { MCK__PCT_tbr, MCK_IntRegs }, },
3465
  { 2523 /* mov */, SP::RDWIM, Convert__Reg1_1, 0, { MCK__PCT_wim, MCK_IntRegs }, },
3466
  { 2523 /* mov */, SP::RDASR, Convert__Reg1_1__Reg1_0, 0, { MCK_ASRRegs, MCK_IntRegs }, },
3467
  { 2523 /* mov */, SP::WRPSRrr, Convert__regG0__Reg1_0, 0, { MCK_IntRegs, MCK__PCT_psr }, },
3468
  { 2523 /* mov */, SP::WRTBRrr, Convert__regG0__Reg1_0, 0, { MCK_IntRegs, MCK__PCT_tbr }, },
3469
  { 2523 /* mov */, SP::WRWIMrr, Convert__regG0__Reg1_0, 0, { MCK_IntRegs, MCK__PCT_wim }, },
3470
  { 2523 /* mov */, SP::WRASRrr, Convert__Reg1_1__regG0__Reg1_0, 0, { MCK_IntRegs, MCK_ASRRegs }, },
3471
  { 2523 /* mov */, SP::ORrr, Convert__Reg1_1__regG0__Reg1_0, 0, { MCK_IntRegs, MCK_IntRegs }, },
3472
  { 2523 /* mov */, SP::WRPSRri, Convert__regG0__Imm1_0, 0, { MCK_Imm, MCK__PCT_psr }, },
3473
  { 2523 /* mov */, SP::WRTBRri, Convert__regG0__Imm1_0, 0, { MCK_Imm, MCK__PCT_tbr }, },
3474
  { 2523 /* mov */, SP::WRWIMri, Convert__regG0__Imm1_0, 0, { MCK_Imm, MCK__PCT_wim }, },
3475
  { 2523 /* mov */, SP::WRASRri, Convert__Reg1_1__regG0__Imm1_0, 0, { MCK_Imm, MCK_ASRRegs }, },
3476
  { 2523 /* mov */, SP::ORri, Convert__Reg1_1__regG0__Imm1_0, 0, { MCK_Imm, MCK_IntRegs }, },
3477
  { 2523 /* mov */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
3478
  { 2523 /* mov */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_8, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
3479
  { 2523 /* mov */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
3480
  { 2523 /* mov */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_8, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
3481
  { 2523 /* mov */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_8, Feature_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
3482
  { 2523 /* mov */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_8, Feature_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
3483
  { 2523 /* mov */, SP::MOVFCCrr, Convert__Reg1_3__Reg1_2__Tie0_1_1__Imm1_0, Feature_HasV9, { MCK_Imm, MCK__PCT_fcc0, MCK_IntRegs, MCK_IntRegs }, },
3484
  { 2523 /* mov */, SP::MOVFCCri, Convert__Reg1_3__Imm1_2__Tie0_1_1__Imm1_0, Feature_HasV9, { MCK_Imm, MCK__PCT_fcc0, MCK_Imm, MCK_IntRegs }, },
3485
  { 2523 /* mov */, SP::MOVICCrr, Convert__Reg1_3__Reg1_2__Tie0_1_1__Imm1_0, Feature_HasV9, { MCK_Imm, MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
3486
  { 2523 /* mov */, SP::MOVICCri, Convert__Reg1_3__Imm1_2__Tie0_1_1__Imm1_0, Feature_HasV9, { MCK_Imm, MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
3487
  { 2523 /* mov */, SP::MOVXCCrr, Convert__Reg1_3__Reg1_2__Tie0_1_1__Imm1_0, 0, { MCK_Imm, MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
3488
  { 2523 /* mov */, SP::MOVXCCri, Convert__Reg1_3__Imm1_2__Tie0_1_1__Imm1_0, 0, { MCK_Imm, MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
3489
  { 2523 /* mov */, SP::V9MOVFCCrr, Convert__Reg1_3__Reg1_1__Reg1_2__Tie0_1_1__Imm1_0, Feature_HasV9, { MCK_Imm, MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
3490
  { 2523 /* mov */, SP::V9MOVFCCri, Convert__Reg1_3__Reg1_1__Imm1_2__Tie0_1_1__Imm1_0, Feature_HasV9, { MCK_Imm, MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
3491
  { 2527 /* mova */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
3492
  { 2527 /* mova */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_8, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
3493
  { 2527 /* mova */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
3494
  { 2527 /* mova */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_8, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
3495
  { 2527 /* mova */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_8, Feature_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
3496
  { 2527 /* mova */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_8, Feature_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
3497
  { 2532 /* movcc */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
3498
  { 2532 /* movcc */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_13, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
3499
  { 2532 /* movcc */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
3500
  { 2532 /* movcc */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_13, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
3501
  { 2538 /* movcs */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
3502
  { 2538 /* movcs */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_5, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
3503
  { 2538 /* movcs */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
3504
  { 2538 /* movcs */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_5, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
3505
  { 2544 /* movdtox */, SP::MOVDTOX, Convert__Reg1_1__Reg1_0, Feature_HasVIS3, { MCK_DFPRegs, MCK_IntRegs }, },
3506
  { 2544 /* movdtox */, SP::MOVWTOS, Convert__Reg1_1__Reg1_0, Feature_HasVIS3, { MCK_IntRegs, MCK_DFPRegs }, },
3507
  { 2544 /* movdtox */, SP::MOVXTOD, Convert__Reg1_1__Reg1_0, Feature_HasVIS3, { MCK_IntRegs, MCK_DFPRegs }, },
3508
  { 2552 /* move */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
3509
  { 2552 /* move */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
3510
  { 2552 /* move */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
3511
  { 2552 /* move */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_1, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
3512
  { 2552 /* move */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_9, Feature_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
3513
  { 2552 /* move */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_9, Feature_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
3514
  { 2557 /* moveq */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
3515
  { 2557 /* moveq */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
3516
  { 2557 /* moveq */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
3517
  { 2557 /* moveq */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_1, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
3518
  { 2563 /* movg */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_10, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
3519
  { 2563 /* movg */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_10, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
3520
  { 2563 /* movg */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_10, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
3521
  { 2563 /* movg */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_10, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
3522
  { 2563 /* movg */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_6, Feature_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
3523
  { 2563 /* movg */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_6, Feature_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
3524
  { 2568 /* movge */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_11, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
3525
  { 2568 /* movge */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_11, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
3526
  { 2568 /* movge */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_11, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
3527
  { 2568 /* movge */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_11, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
3528
  { 2568 /* movge */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_11, Feature_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
3529
  { 2568 /* movge */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_11, Feature_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
3530
  { 2574 /* movgeu */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
3531
  { 2574 /* movgeu */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_13, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
3532
  { 2574 /* movgeu */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
3533
  { 2574 /* movgeu */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_13, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
3534
  { 2581 /* movgu */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_12, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
3535
  { 2581 /* movgu */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_12, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
3536
  { 2581 /* movgu */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_12, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
3537
  { 2581 /* movgu */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_12, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
3538
  { 2587 /* movl */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_3, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
3539
  { 2587 /* movl */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_3, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
3540
  { 2587 /* movl */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_3, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
3541
  { 2587 /* movl */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_3, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
3542
  { 2587 /* movl */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_4, Feature_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
3543
  { 2587 /* movl */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_4, Feature_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
3544
  { 2592 /* movle */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_2, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
3545
  { 2592 /* movle */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_2, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
3546
  { 2592 /* movle */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_2, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
3547
  { 2592 /* movle */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_2, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
3548
  { 2592 /* movle */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_13, Feature_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
3549
  { 2592 /* movle */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_13, Feature_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
3550
  { 2598 /* movleu */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_4, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
3551
  { 2598 /* movleu */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_4, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
3552
  { 2598 /* movleu */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_4, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
3553
  { 2598 /* movleu */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_4, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
3554
  { 2605 /* movlg */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_2, Feature_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
3555
  { 2605 /* movlg */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_2, Feature_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
3556
  { 2611 /* movlu */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
3557
  { 2611 /* movlu */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_5, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
3558
  { 2611 /* movlu */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
3559
  { 2611 /* movlu */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_5, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
3560
  { 2617 /* movn */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_0, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
3561
  { 2617 /* movn */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_0, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
3562
  { 2617 /* movn */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_0, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
3563
  { 2617 /* movn */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_0, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
3564
  { 2617 /* movn */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_0, Feature_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
3565
  { 2617 /* movn */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_0, Feature_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
3566
  { 2622 /* movne */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
3567
  { 2622 /* movne */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_9, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
3568
  { 2622 /* movne */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
3569
  { 2622 /* movne */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_9, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
3570
  { 2622 /* movne */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
3571
  { 2622 /* movne */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
3572
  { 2628 /* movneg */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_6, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
3573
  { 2628 /* movneg */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_6, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
3574
  { 2628 /* movneg */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_6, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
3575
  { 2628 /* movneg */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_6, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
3576
  { 2635 /* movnz */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
3577
  { 2635 /* movnz */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_9, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
3578
  { 2635 /* movnz */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
3579
  { 2635 /* movnz */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_9, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
3580
  { 2635 /* movnz */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
3581
  { 2635 /* movnz */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
3582
  { 2641 /* movo */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_15, Feature_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
3583
  { 2641 /* movo */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_15, Feature_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
3584
  { 2646 /* movpos */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_14, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
3585
  { 2646 /* movpos */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_14, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
3586
  { 2646 /* movpos */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_14, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
3587
  { 2646 /* movpos */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_14, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
3588
  { 2653 /* movrgez */, SP::MOVRGEZrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3589
  { 2653 /* movrgez */, SP::MOVRGEZri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3590
  { 2661 /* movrgz */, SP::MOVRGZrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3591
  { 2661 /* movrgz */, SP::MOVRGZri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3592
  { 2668 /* movrlez */, SP::MOVRLEZrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3593
  { 2668 /* movrlez */, SP::MOVRLEZri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3594
  { 2676 /* movrlz */, SP::MOVRLZrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3595
  { 2676 /* movrlz */, SP::MOVRLZri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3596
  { 2683 /* movrnz */, SP::MOVRNZrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3597
  { 2683 /* movrnz */, SP::MOVRNZri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3598
  { 2690 /* movrz */, SP::MOVRRZrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3599
  { 2690 /* movrz */, SP::MOVRRZri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3600
  { 2696 /* movstosw */, SP::MOVSTOSW, Convert__Reg1_1__Reg1_0, Feature_HasVIS3, { MCK_DFPRegs, MCK_IntRegs }, },
3601
  { 2705 /* movstouw */, SP::MOVSTOUW, Convert__Reg1_1__Reg1_0, Feature_HasVIS3, { MCK_DFPRegs, MCK_IntRegs }, },
3602
  { 2714 /* movu */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_7, Feature_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
3603
  { 2714 /* movu */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_7, Feature_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
3604
  { 2719 /* movue */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_10, Feature_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
3605
  { 2719 /* movue */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_10, Feature_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
3606
  { 2725 /* movug */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_5, Feature_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
3607
  { 2725 /* movug */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_5, Feature_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
3608
  { 2731 /* movuge */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_12, Feature_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
3609
  { 2731 /* movuge */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_12, Feature_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
3610
  { 2738 /* movul */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_3, Feature_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
3611
  { 2738 /* movul */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_3, Feature_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
3612
  { 2744 /* movule */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_14, Feature_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
3613
  { 2744 /* movule */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_14, Feature_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
3614
  { 2751 /* movvc */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_15, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
3615
  { 2751 /* movvc */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_15, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
3616
  { 2751 /* movvc */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_15, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
3617
  { 2751 /* movvc */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_15, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
3618
  { 2757 /* movvs */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_7, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
3619
  { 2757 /* movvs */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_7, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
3620
  { 2757 /* movvs */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_7, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
3621
  { 2757 /* movvs */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_7, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
3622
  { 2763 /* movz */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
3623
  { 2763 /* movz */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
3624
  { 2763 /* movz */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
3625
  { 2763 /* movz */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_1, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
3626
  { 2763 /* movz */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_9, Feature_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
3627
  { 2763 /* movz */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_9, Feature_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
3628
  { 2768 /* mulscc */, SP::MULSCCrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3629
  { 2768 /* mulscc */, SP::MULSCCri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3630
  { 2775 /* mulx */, SP::MULXrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3631
  { 2775 /* mulx */, SP::MULXri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3632
  { 2780 /* neg */, SP::SUBrr, Convert__Reg1_0__regG0__Reg1_0, 0, { MCK_IntRegs }, },
3633
  { 2780 /* neg */, SP::SUBrr, Convert__Reg1_1__regG0__Reg1_0, 0, { MCK_IntRegs, MCK_IntRegs }, },
3634
  { 2784 /* nop */, SP::NOP, Convert_NoOperands, 0, {  }, },
3635
  { 2788 /* not */, SP::XNORrr, Convert__Reg1_0__Reg1_0__regG0, 0, { MCK_IntRegs }, },
3636
  { 2788 /* not */, SP::XNORrr, Convert__Reg1_1__Reg1_0__regG0, 0, { MCK_IntRegs, MCK_IntRegs }, },
3637
  { 2792 /* or */, SP::ORrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3638
  { 2792 /* or */, SP::ORri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3639
  { 2795 /* orcc */, SP::ORCCrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3640
  { 2795 /* orcc */, SP::ORCCri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3641
  { 2800 /* orn */, SP::ORNrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3642
  { 2800 /* orn */, SP::ORNri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3643
  { 2804 /* orncc */, SP::ORNCCrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3644
  { 2804 /* orncc */, SP::ORNCCri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3645
  { 2810 /* pdist */, SP::PDIST, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3646
  { 2816 /* pdistn */, SP::PDISTN, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3647
  { 2823 /* popc */, SP::POPCrr, Convert__Reg1_1__Reg1_0, Feature_HasV9, { MCK_IntRegs, MCK_IntRegs }, },
3648
  { 2828 /* rd */, SP::RDPSR, Convert__Reg1_1, 0, { MCK__PCT_psr, MCK_IntRegs }, },
3649
  { 2828 /* rd */, SP::RDTBR, Convert__Reg1_1, 0, { MCK__PCT_tbr, MCK_IntRegs }, },
3650
  { 2828 /* rd */, SP::RDWIM, Convert__Reg1_1, 0, { MCK__PCT_wim, MCK_IntRegs }, },
3651
  { 2828 /* rd */, SP::RDASR, Convert__Reg1_1__Reg1_0, 0, { MCK_ASRRegs, MCK_IntRegs }, },
3652
  { 2831 /* rdpr */, SP::RDPR, Convert__Reg1_1__Reg1_0, Feature_HasV9, { MCK_PRRegs, MCK_IntRegs }, },
3653
  { 2836 /* restore */, SP::RESTORErr, Convert__regG0__regG0__regG0, 0, {  }, },
3654
  { 2836 /* restore */, SP::RESTORErr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3655
  { 2836 /* restore */, SP::RESTOREri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3656
  { 2844 /* ret */, SP::RET, Convert__imm_95_8, 0, {  }, },
3657
  { 2848 /* retl */, SP::RETL, Convert__imm_95_8, 0, {  }, },
3658
  { 2853 /* rett */, SP::RETTri, Convert__MEMri2_0, 0, { MCK_MEMri }, },
3659
  { 2853 /* rett */, SP::RETTrr, Convert__MEMrr2_0, 0, { MCK_MEMrr }, },
3660
  { 2858 /* save */, SP::SAVErr, Convert__regG0__regG0__regG0, 0, {  }, },
3661
  { 2858 /* save */, SP::SAVErr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3662
  { 2858 /* save */, SP::SAVEri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3663
  { 2863 /* sdiv */, SP::SDIVrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3664
  { 2863 /* sdiv */, SP::SDIVri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3665
  { 2868 /* sdivcc */, SP::SDIVCCrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3666
  { 2868 /* sdivcc */, SP::SDIVCCri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3667
  { 2875 /* sdivx */, SP::SDIVXrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3668
  { 2875 /* sdivx */, SP::SDIVXri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3669
  { 2881 /* set */, SP::SET, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_IntRegs }, },
3670
  { 2885 /* sethi */, SP::SETHIi, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_IntRegs }, },
3671
  { 2891 /* shutdown */, SP::SHUTDOWN, Convert_NoOperands, Feature_HasVIS, {  }, },
3672
  { 2900 /* siam */, SP::SIAM, Convert_NoOperands, Feature_HasVIS2, {  }, },
3673
  { 2905 /* signx */, SP::SRArr, Convert__Reg1_0__Reg1_0__regG0, Feature_HasV9, { MCK_IntRegs }, },
3674
  { 2905 /* signx */, SP::SRArr, Convert__Reg1_1__Reg1_0__regG0, Feature_HasV9, { MCK_IntRegs, MCK_IntRegs }, },
3675
  { 2911 /* sll */, SP::SLLrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3676
  { 2911 /* sll */, SP::SLLri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3677
  { 2915 /* sllx */, SP::SLLXrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3678
  { 2915 /* sllx */, SP::SLLXri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3679
  { 2920 /* smac */, SP::SMACrr, Convert__Reg1_2__Reg1_0__Reg1_1__imm_95_0, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3680
  { 2920 /* smac */, SP::SMACri, Convert__Reg1_2__Reg1_0__Imm1_1__imm_95_0, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3681
  { 2925 /* smul */, SP::SMULrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3682
  { 2925 /* smul */, SP::SMULri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3683
  { 2930 /* smulcc */, SP::SMULCCrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3684
  { 2930 /* smulcc */, SP::SMULCCri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3685
  { 2937 /* sra */, SP::SRArr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3686
  { 2937 /* sra */, SP::SRAri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3687
  { 2941 /* srax */, SP::SRAXrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3688
  { 2941 /* srax */, SP::SRAXri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3689
  { 2946 /* srl */, SP::SRLrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3690
  { 2946 /* srl */, SP::SRLri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3691
  { 2950 /* srlx */, SP::SRLXrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3692
  { 2950 /* srlx */, SP::SRLXri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3693
  { 2955 /* st */, SP::STCSRri, Convert__MEMri2_2, 0, { MCK__PCT_csr, MCK__91_, MCK_MEMri, MCK__93_ }, },
3694
  { 2955 /* st */, SP::STCSRrr, Convert__MEMrr2_2, 0, { MCK__PCT_csr, MCK__91_, MCK_MEMrr, MCK__93_ }, },
3695
  { 2955 /* st */, SP::STFSRri, Convert__MEMri2_2, 0, { MCK__PCT_fsr, MCK__91_, MCK_MEMri, MCK__93_ }, },
3696
  { 2955 /* st */, SP::STFSRrr, Convert__MEMrr2_2, 0, { MCK__PCT_fsr, MCK__91_, MCK_MEMrr, MCK__93_ }, },
3697
  { 2955 /* st */, SP::STCri, Convert__MEMri2_2__Reg1_0, 0, { MCK_CoprocRegs, MCK__91_, MCK_MEMri, MCK__93_ }, },
3698
  { 2955 /* st */, SP::STCrr, Convert__MEMrr2_2__Reg1_0, 0, { MCK_CoprocRegs, MCK__91_, MCK_MEMrr, MCK__93_ }, },
3699
  { 2955 /* st */, SP::STFri, Convert__MEMri2_2__Reg1_0, 0, { MCK_FPRegs, MCK__91_, MCK_MEMri, MCK__93_ }, },
3700
  { 2955 /* st */, SP::STFrr, Convert__MEMrr2_2__Reg1_0, 0, { MCK_FPRegs, MCK__91_, MCK_MEMrr, MCK__93_ }, },
3701
  { 2955 /* st */, SP::STri, Convert__MEMri2_2__Reg1_0, 0, { MCK_IntRegs, MCK__91_, MCK_MEMri, MCK__93_ }, },
3702
  { 2955 /* st */, SP::STrr, Convert__MEMrr2_2__Reg1_0, 0, { MCK_IntRegs, MCK__91_, MCK_MEMrr, MCK__93_ }, },
3703
  { 2958 /* sta */, SP::STFArr, Convert__MEMrr2_2__Reg1_0__Imm1_4, Feature_HasV9, { MCK_FPRegs, MCK__91_, MCK_MEMrr, MCK__93_, MCK_Imm }, },
3704
  { 2958 /* sta */, SP::STArr, Convert__MEMrr2_2__Reg1_0__Imm1_4, 0, { MCK_IntRegs, MCK__91_, MCK_MEMrr, MCK__93_, MCK_Imm }, },
3705
  { 2962 /* stb */, SP::STBri, Convert__MEMri2_2__Reg1_0, 0, { MCK_IntRegs, MCK__91_, MCK_MEMri, MCK__93_ }, },
3706
  { 2962 /* stb */, SP::STBrr, Convert__MEMrr2_2__Reg1_0, 0, { MCK_IntRegs, MCK__91_, MCK_MEMrr, MCK__93_ }, },
3707
  { 2966 /* stba */, SP::STBArr, Convert__MEMrr2_2__Reg1_0__Imm1_4, 0, { MCK_IntRegs, MCK__91_, MCK_MEMrr, MCK__93_, MCK_Imm }, },
3708
  { 2971 /* stbar */, SP::STBAR, Convert_NoOperands, 0, {  }, },
3709
  { 2977 /* std */, SP::STDCQri, Convert__MEMri2_2, 0, { MCK__PCT_cq, MCK__91_, MCK_MEMri, MCK__93_ }, },
3710
  { 2977 /* std */, SP::STDCQrr, Convert__MEMrr2_2, 0, { MCK__PCT_cq, MCK__91_, MCK_MEMrr, MCK__93_ }, },
3711
  { 2977 /* std */, SP::STDFQri, Convert__MEMri2_2, 0, { MCK__PCT_fq, MCK__91_, MCK_MEMri, MCK__93_ }, },
3712
  { 2977 /* std */, SP::STDFQrr, Convert__MEMrr2_2, 0, { MCK__PCT_fq, MCK__91_, MCK_MEMrr, MCK__93_ }, },
3713
  { 2977 /* std */, SP::STDCri, Convert__MEMri2_2__Reg1_0, 0, { MCK_CoprocPair, MCK__91_, MCK_MEMri, MCK__93_ }, },
3714
  { 2977 /* std */, SP::STDCrr, Convert__MEMrr2_2__Reg1_0, 0, { MCK_CoprocPair, MCK__91_, MCK_MEMrr, MCK__93_ }, },
3715
  { 2977 /* std */, SP::STDri, Convert__MEMri2_2__Reg1_0, 0, { MCK_IntPair, MCK__91_, MCK_MEMri, MCK__93_ }, },
3716
  { 2977 /* std */, SP::STDrr, Convert__MEMrr2_2__Reg1_0, 0, { MCK_IntPair, MCK__91_, MCK_MEMrr, MCK__93_ }, },
3717
  { 2977 /* std */, SP::STDFri, Convert__MEMri2_2__Reg1_0, 0, { MCK_DFPRegs, MCK__91_, MCK_MEMri, MCK__93_ }, },
3718
  { 2977 /* std */, SP::STDFrr, Convert__MEMrr2_2__Reg1_0, 0, { MCK_DFPRegs, MCK__91_, MCK_MEMrr, MCK__93_ }, },
3719
  { 2981 /* stda */, SP::STDArr, Convert__MEMrr2_2__Reg1_0__Imm1_4, 0, { MCK_IntPair, MCK__91_, MCK_MEMrr, MCK__93_, MCK_Imm }, },
3720
  { 2981 /* stda */, SP::STDFArr, Convert__MEMrr2_2__Reg1_0__Imm1_4, Feature_HasV9, { MCK_DFPRegs, MCK__91_, MCK_MEMrr, MCK__93_, MCK_Imm }, },
3721
  { 2986 /* sth */, SP::STHri, Convert__MEMri2_2__Reg1_0, 0, { MCK_IntRegs, MCK__91_, MCK_MEMri, MCK__93_ }, },
3722
  { 2986 /* sth */, SP::STHrr, Convert__MEMrr2_2__Reg1_0, 0, { MCK_IntRegs, MCK__91_, MCK_MEMrr, MCK__93_ }, },
3723
  { 2990 /* stha */, SP::STHArr, Convert__MEMrr2_2__Reg1_0__Imm1_4, 0, { MCK_IntRegs, MCK__91_, MCK_MEMrr, MCK__93_, MCK_Imm }, },
3724
  { 2995 /* stq */, SP::STQFri, Convert__MEMri2_2__Reg1_0, Feature_HasV9, { MCK_QFPRegs, MCK__91_, MCK_MEMri, MCK__93_ }, },
3725
  { 2995 /* stq */, SP::STQFrr, Convert__MEMrr2_2__Reg1_0, Feature_HasV9, { MCK_QFPRegs, MCK__91_, MCK_MEMrr, MCK__93_ }, },
3726
  { 2999 /* stqa */, SP::STQFArr, Convert__MEMrr2_2__Reg1_0__Imm1_4, Feature_HasV9, { MCK_QFPRegs, MCK__91_, MCK_MEMrr, MCK__93_, MCK_Imm }, },
3727
  { 3004 /* stx */, SP::STXFSRri, Convert__MEMri2_2, Feature_HasV9, { MCK__PCT_fsr, MCK__91_, MCK_MEMri, MCK__93_ }, },
3728
  { 3004 /* stx */, SP::STXFSRrr, Convert__MEMrr2_2, Feature_HasV9, { MCK__PCT_fsr, MCK__91_, MCK_MEMrr, MCK__93_ }, },
3729
  { 3004 /* stx */, SP::STXri, Convert__MEMri2_2__Reg1_0, 0, { MCK_IntRegs, MCK__91_, MCK_MEMri, MCK__93_ }, },
3730
  { 3004 /* stx */, SP::STXrr, Convert__MEMrr2_2__Reg1_0, 0, { MCK_IntRegs, MCK__91_, MCK_MEMrr, MCK__93_ }, },
3731
  { 3008 /* sub */, SP::SUBrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3732
  { 3008 /* sub */, SP::SUBri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3733
  { 3012 /* subcc */, SP::SUBCCrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3734
  { 3012 /* subcc */, SP::SUBCCri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3735
  { 3018 /* subx */, SP::SUBCrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3736
  { 3018 /* subx */, SP::SUBCri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3737
  { 3023 /* subxcc */, SP::SUBErr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3738
  { 3023 /* subxcc */, SP::SUBEri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3739
  { 3030 /* swap */, SP::SWAPri, Convert__Reg1_3__MEMri2_1__Tie0_1_1, 0, { MCK__91_, MCK_MEMri, MCK__93_, MCK_IntRegs }, },
3740
  { 3030 /* swap */, SP::SWAPrr, Convert__Reg1_3__MEMrr2_1__Tie0_1_1, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_IntRegs }, },
3741
  { 3035 /* swapa */, SP::SWAPArr, Convert__Reg1_4__MEMrr2_1__Imm1_3__Tie0_1_1, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_Imm, MCK_IntRegs }, },
3742
  { 3041 /* t */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_8, 0, { MCK_IntRegs }, },
3743
  { 3041 /* t */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_8, 0, { MCK_Imm }, },
3744
  { 3041 /* t */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_8, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
3745
  { 3041 /* t */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_8, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
3746
  { 3041 /* t */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_8, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
3747
  { 3041 /* t */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_8, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
3748
  { 3041 /* t */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_8, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3749
  { 3041 /* t */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_8, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
3750
  { 3041 /* t */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_8, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3751
  { 3041 /* t */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_8, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3752
  { 3041 /* t */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_8, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3753
  { 3041 /* t */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_8, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3754
  { 3041 /* t */, SP::TRAPrr, Convert__Reg1_1__Reg1_3__Imm1_0, 0, { MCK_Imm, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3755
  { 3041 /* t */, SP::TRAPri, Convert__Reg1_1__Imm1_3__Imm1_0, 0, { MCK_Imm, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3756
  { 3041 /* t */, SP::TICCrr, Convert__Reg1_2__Reg1_4__Imm1_0, Feature_HasV9, { MCK_Imm, MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3757
  { 3041 /* t */, SP::TICCri, Convert__Reg1_2__Imm1_4__Imm1_0, Feature_HasV9, { MCK_Imm, MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3758
  { 3041 /* t */, SP::TXCCrr, Convert__Reg1_2__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3759
  { 3041 /* t */, SP::TXCCri, Convert__Reg1_2__Imm1_4__Imm1_0, 0, { MCK_Imm, MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3760
  { 3043 /* ta */, SP::TA1, Convert_NoOperands, 0, { MCK_1 }, },
3761
  { 3043 /* ta */, SP::TA3, Convert_NoOperands, 0, { MCK_3 }, },
3762
  { 3043 /* ta */, SP::TA5, Convert_NoOperands, 0, { MCK_5 }, },
3763
  { 3043 /* ta */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_8, 0, { MCK_IntRegs }, },
3764
  { 3043 /* ta */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_8, 0, { MCK_Imm }, },
3765
  { 3043 /* ta */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_8, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
3766
  { 3043 /* ta */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_8, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
3767
  { 3043 /* ta */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_8, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
3768
  { 3043 /* ta */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_8, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
3769
  { 3043 /* ta */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_8, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3770
  { 3043 /* ta */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_8, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
3771
  { 3043 /* ta */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_8, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3772
  { 3043 /* ta */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_8, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3773
  { 3043 /* ta */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_8, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3774
  { 3043 /* ta */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_8, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3775
  { 3046 /* taddcc */, SP::TADDCCrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3776
  { 3046 /* taddcc */, SP::TADDCCri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3777
  { 3053 /* taddcctv */, SP::TADDCCTVrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3778
  { 3053 /* taddcctv */, SP::TADDCCTVri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3779
  { 3062 /* tcc */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_13, 0, { MCK_IntRegs }, },
3780
  { 3062 /* tcc */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_13, 0, { MCK_Imm }, },
3781
  { 3062 /* tcc */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_13, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
3782
  { 3062 /* tcc */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_13, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
3783
  { 3062 /* tcc */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_13, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
3784
  { 3062 /* tcc */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_13, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
3785
  { 3062 /* tcc */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_13, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3786
  { 3062 /* tcc */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_13, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
3787
  { 3062 /* tcc */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_13, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3788
  { 3062 /* tcc */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_13, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3789
  { 3062 /* tcc */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_13, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3790
  { 3062 /* tcc */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_13, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3791
  { 3066 /* tcs */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_5, 0, { MCK_IntRegs }, },
3792
  { 3066 /* tcs */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_5, 0, { MCK_Imm }, },
3793
  { 3066 /* tcs */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_5, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
3794
  { 3066 /* tcs */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_5, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
3795
  { 3066 /* tcs */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_5, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
3796
  { 3066 /* tcs */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_5, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
3797
  { 3066 /* tcs */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_5, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3798
  { 3066 /* tcs */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_5, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
3799
  { 3066 /* tcs */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_5, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3800
  { 3066 /* tcs */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_5, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3801
  { 3066 /* tcs */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_5, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3802
  { 3066 /* tcs */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_5, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3803
  { 3070 /* te */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_1, 0, { MCK_IntRegs }, },
3804
  { 3070 /* te */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_1, 0, { MCK_Imm }, },
3805
  { 3070 /* te */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
3806
  { 3070 /* te */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
3807
  { 3070 /* te */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_1, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
3808
  { 3070 /* te */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_1, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
3809
  { 3070 /* te */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_1, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3810
  { 3070 /* te */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_1, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
3811
  { 3070 /* te */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3812
  { 3070 /* te */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3813
  { 3070 /* te */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_1, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3814
  { 3070 /* te */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_1, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3815
  { 3073 /* teq */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_1, 0, { MCK_IntRegs }, },
3816
  { 3073 /* teq */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_1, 0, { MCK_Imm }, },
3817
  { 3073 /* teq */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
3818
  { 3073 /* teq */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
3819
  { 3073 /* teq */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_1, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
3820
  { 3073 /* teq */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_1, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
3821
  { 3073 /* teq */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_1, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3822
  { 3073 /* teq */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_1, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
3823
  { 3073 /* teq */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3824
  { 3073 /* teq */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3825
  { 3073 /* teq */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_1, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3826
  { 3073 /* teq */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_1, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3827
  { 3077 /* tg */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_10, 0, { MCK_IntRegs }, },
3828
  { 3077 /* tg */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_10, 0, { MCK_Imm }, },
3829
  { 3077 /* tg */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_10, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
3830
  { 3077 /* tg */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_10, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
3831
  { 3077 /* tg */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_10, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
3832
  { 3077 /* tg */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_10, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
3833
  { 3077 /* tg */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_10, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3834
  { 3077 /* tg */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_10, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
3835
  { 3077 /* tg */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_10, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3836
  { 3077 /* tg */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_10, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3837
  { 3077 /* tg */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_10, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3838
  { 3077 /* tg */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_10, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3839
  { 3080 /* tge */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_11, 0, { MCK_IntRegs }, },
3840
  { 3080 /* tge */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_11, 0, { MCK_Imm }, },
3841
  { 3080 /* tge */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_11, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
3842
  { 3080 /* tge */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_11, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
3843
  { 3080 /* tge */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_11, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
3844
  { 3080 /* tge */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_11, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
3845
  { 3080 /* tge */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_11, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3846
  { 3080 /* tge */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_11, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
3847
  { 3080 /* tge */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_11, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3848
  { 3080 /* tge */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_11, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3849
  { 3080 /* tge */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_11, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3850
  { 3080 /* tge */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_11, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3851
  { 3084 /* tgeu */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_13, 0, { MCK_IntRegs }, },
3852
  { 3084 /* tgeu */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_13, 0, { MCK_Imm }, },
3853
  { 3084 /* tgeu */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_13, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
3854
  { 3084 /* tgeu */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_13, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
3855
  { 3084 /* tgeu */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_13, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
3856
  { 3084 /* tgeu */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_13, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
3857
  { 3084 /* tgeu */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_13, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3858
  { 3084 /* tgeu */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_13, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
3859
  { 3084 /* tgeu */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_13, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3860
  { 3084 /* tgeu */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_13, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3861
  { 3084 /* tgeu */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_13, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3862
  { 3084 /* tgeu */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_13, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3863
  { 3089 /* tgu */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_12, 0, { MCK_IntRegs }, },
3864
  { 3089 /* tgu */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_12, 0, { MCK_Imm }, },
3865
  { 3089 /* tgu */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_12, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
3866
  { 3089 /* tgu */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_12, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
3867
  { 3089 /* tgu */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_12, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
3868
  { 3089 /* tgu */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_12, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
3869
  { 3089 /* tgu */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_12, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3870
  { 3089 /* tgu */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_12, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
3871
  { 3089 /* tgu */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_12, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3872
  { 3089 /* tgu */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_12, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3873
  { 3089 /* tgu */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_12, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3874
  { 3089 /* tgu */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_12, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3875
  { 3093 /* tl */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_3, 0, { MCK_IntRegs }, },
3876
  { 3093 /* tl */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_3, 0, { MCK_Imm }, },
3877
  { 3093 /* tl */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_3, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
3878
  { 3093 /* tl */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_3, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
3879
  { 3093 /* tl */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_3, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
3880
  { 3093 /* tl */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_3, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
3881
  { 3093 /* tl */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_3, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3882
  { 3093 /* tl */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_3, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
3883
  { 3093 /* tl */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_3, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3884
  { 3093 /* tl */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_3, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3885
  { 3093 /* tl */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_3, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3886
  { 3093 /* tl */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_3, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3887
  { 3096 /* tle */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_2, 0, { MCK_IntRegs }, },
3888
  { 3096 /* tle */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_2, 0, { MCK_Imm }, },
3889
  { 3096 /* tle */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_2, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
3890
  { 3096 /* tle */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_2, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
3891
  { 3096 /* tle */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_2, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
3892
  { 3096 /* tle */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_2, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
3893
  { 3096 /* tle */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_2, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3894
  { 3096 /* tle */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_2, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
3895
  { 3096 /* tle */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_2, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3896
  { 3096 /* tle */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_2, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3897
  { 3096 /* tle */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_2, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3898
  { 3096 /* tle */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_2, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3899
  { 3100 /* tleu */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_4, 0, { MCK_IntRegs }, },
3900
  { 3100 /* tleu */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_4, 0, { MCK_Imm }, },
3901
  { 3100 /* tleu */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_4, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
3902
  { 3100 /* tleu */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_4, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
3903
  { 3100 /* tleu */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_4, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
3904
  { 3100 /* tleu */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_4, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
3905
  { 3100 /* tleu */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_4, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3906
  { 3100 /* tleu */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_4, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
3907
  { 3100 /* tleu */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_4, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3908
  { 3100 /* tleu */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_4, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3909
  { 3100 /* tleu */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_4, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3910
  { 3100 /* tleu */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_4, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3911
  { 3105 /* tlu */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_5, 0, { MCK_IntRegs }, },
3912
  { 3105 /* tlu */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_5, 0, { MCK_Imm }, },
3913
  { 3105 /* tlu */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_5, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
3914
  { 3105 /* tlu */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_5, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
3915
  { 3105 /* tlu */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_5, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
3916
  { 3105 /* tlu */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_5, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
3917
  { 3105 /* tlu */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_5, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3918
  { 3105 /* tlu */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_5, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
3919
  { 3105 /* tlu */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_5, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3920
  { 3105 /* tlu */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_5, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3921
  { 3105 /* tlu */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_5, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3922
  { 3105 /* tlu */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_5, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3923
  { 3109 /* tn */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_0, 0, { MCK_IntRegs }, },
3924
  { 3109 /* tn */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_0, 0, { MCK_Imm }, },
3925
  { 3109 /* tn */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_0, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
3926
  { 3109 /* tn */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_0, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
3927
  { 3109 /* tn */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_0, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
3928
  { 3109 /* tn */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_0, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
3929
  { 3109 /* tn */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3930
  { 3109 /* tn */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_0, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
3931
  { 3109 /* tn */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_0, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3932
  { 3109 /* tn */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_0, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3933
  { 3109 /* tn */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_0, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3934
  { 3109 /* tn */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_0, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3935
  { 3112 /* tne */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_9, 0, { MCK_IntRegs }, },
3936
  { 3112 /* tne */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_9, 0, { MCK_Imm }, },
3937
  { 3112 /* tne */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_9, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
3938
  { 3112 /* tne */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_9, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
3939
  { 3112 /* tne */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_9, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
3940
  { 3112 /* tne */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_9, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
3941
  { 3112 /* tne */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_9, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3942
  { 3112 /* tne */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_9, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
3943
  { 3112 /* tne */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_9, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3944
  { 3112 /* tne */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_9, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3945
  { 3112 /* tne */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_9, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3946
  { 3112 /* tne */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_9, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3947
  { 3116 /* tneg */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_6, 0, { MCK_IntRegs }, },
3948
  { 3116 /* tneg */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_6, 0, { MCK_Imm }, },
3949
  { 3116 /* tneg */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_6, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
3950
  { 3116 /* tneg */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_6, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
3951
  { 3116 /* tneg */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_6, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
3952
  { 3116 /* tneg */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_6, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
3953
  { 3116 /* tneg */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_6, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3954
  { 3116 /* tneg */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_6, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
3955
  { 3116 /* tneg */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_6, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3956
  { 3116 /* tneg */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_6, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3957
  { 3116 /* tneg */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_6, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3958
  { 3116 /* tneg */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_6, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3959
  { 3121 /* tnz */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_9, 0, { MCK_IntRegs }, },
3960
  { 3121 /* tnz */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_9, 0, { MCK_Imm }, },
3961
  { 3121 /* tnz */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_9, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
3962
  { 3121 /* tnz */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_9, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
3963
  { 3121 /* tnz */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_9, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
3964
  { 3121 /* tnz */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_9, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
3965
  { 3121 /* tnz */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_9, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3966
  { 3121 /* tnz */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_9, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
3967
  { 3121 /* tnz */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_9, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3968
  { 3121 /* tnz */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_9, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3969
  { 3121 /* tnz */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_9, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3970
  { 3121 /* tnz */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_9, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3971
  { 3125 /* tpos */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_14, 0, { MCK_IntRegs }, },
3972
  { 3125 /* tpos */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_14, 0, { MCK_Imm }, },
3973
  { 3125 /* tpos */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_14, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
3974
  { 3125 /* tpos */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_14, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
3975
  { 3125 /* tpos */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_14, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
3976
  { 3125 /* tpos */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_14, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
3977
  { 3125 /* tpos */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_14, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3978
  { 3125 /* tpos */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_14, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
3979
  { 3125 /* tpos */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_14, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3980
  { 3125 /* tpos */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_14, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3981
  { 3125 /* tpos */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_14, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3982
  { 3125 /* tpos */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_14, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3983
  { 3130 /* tst */, SP::ORCCrr, Convert__regG0__Reg1_0__regG0, 0, { MCK_IntRegs }, },
3984
  { 3134 /* tsubcc */, SP::TSUBCCrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3985
  { 3134 /* tsubcc */, SP::TSUBCCri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3986
  { 3141 /* tsubcctv */, SP::TSUBCCTVrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3987
  { 3141 /* tsubcctv */, SP::TSUBCCTVri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3988
  { 3150 /* tvc */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_15, 0, { MCK_IntRegs }, },
3989
  { 3150 /* tvc */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_15, 0, { MCK_Imm }, },
3990
  { 3150 /* tvc */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_15, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
3991
  { 3150 /* tvc */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_15, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
3992
  { 3150 /* tvc */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_15, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
3993
  { 3150 /* tvc */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_15, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
3994
  { 3150 /* tvc */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_15, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3995
  { 3150 /* tvc */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_15, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
3996
  { 3150 /* tvc */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_15, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3997
  { 3150 /* tvc */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_15, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3998
  { 3150 /* tvc */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_15, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3999
  { 3150 /* tvc */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_15, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
4000
  { 3154 /* tvs */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_7, 0, { MCK_IntRegs }, },
4001
  { 3154 /* tvs */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_7, 0, { MCK_Imm }, },
4002
  { 3154 /* tvs */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_7, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
4003
  { 3154 /* tvs */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_7, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
4004
  { 3154 /* tvs */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_7, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
4005
  { 3154 /* tvs */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_7, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
4006
  { 3154 /* tvs */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_7, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4007
  { 3154 /* tvs */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_7, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
4008
  { 3154 /* tvs */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_7, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4009
  { 3154 /* tvs */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_7, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
4010
  { 3154 /* tvs */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_7, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4011
  { 3154 /* tvs */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_7, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
4012
  { 3158 /* tz */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_1, 0, { MCK_IntRegs }, },
4013
  { 3158 /* tz */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_1, 0, { MCK_Imm }, },
4014
  { 3158 /* tz */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
4015
  { 3158 /* tz */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
4016
  { 3158 /* tz */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_1, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
4017
  { 3158 /* tz */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_1, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
4018
  { 3158 /* tz */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_1, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4019
  { 3158 /* tz */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_1, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
4020
  { 3158 /* tz */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4021
  { 3158 /* tz */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
4022
  { 3158 /* tz */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_1, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4023
  { 3158 /* tz */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_1, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
4024
  { 3161 /* udiv */, SP::UDIVrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
4025
  { 3161 /* udiv */, SP::UDIVri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
4026
  { 3166 /* udivcc */, SP::UDIVCCrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
4027
  { 3166 /* udivcc */, SP::UDIVCCri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
4028
  { 3173 /* udivx */, SP::UDIVXrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
4029
  { 3173 /* udivx */, SP::UDIVXri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
4030
  { 3179 /* umac */, SP::UMACrr, Convert__Reg1_2__Reg1_0__Reg1_1__imm_95_0, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
4031
  { 3179 /* umac */, SP::UMACri, Convert__Reg1_2__Reg1_0__Imm1_1__imm_95_0, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
4032
  { 3184 /* umul */, SP::UMULrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
4033
  { 3184 /* umul */, SP::UMULri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
4034
  { 3189 /* umulcc */, SP::UMULCCrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
4035
  { 3189 /* umulcc */, SP::UMULCCri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
4036
  { 3196 /* umulxhi */, SP::UMULXHI, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
4037
  { 3204 /* unimp */, SP::UNIMP, Convert__Imm1_0, 0, { MCK_Imm }, },
4038
  { 3210 /* wr */, SP::WRPSRrr, Convert__regG0__Reg1_0, 0, { MCK_IntRegs, MCK__PCT_psr }, },
4039
  { 3210 /* wr */, SP::WRTBRrr, Convert__regG0__Reg1_0, 0, { MCK_IntRegs, MCK__PCT_tbr }, },
4040
  { 3210 /* wr */, SP::WRWIMrr, Convert__regG0__Reg1_0, 0, { MCK_IntRegs, MCK__PCT_wim }, },
4041
  { 3210 /* wr */, SP::WRASRrr, Convert__Reg1_1__regG0__Reg1_0, 0, { MCK_IntRegs, MCK_ASRRegs }, },
4042
  { 3210 /* wr */, SP::WRPSRri, Convert__regG0__Imm1_0, 0, { MCK_Imm, MCK__PCT_psr }, },
4043
  { 3210 /* wr */, SP::WRTBRri, Convert__regG0__Imm1_0, 0, { MCK_Imm, MCK__PCT_tbr }, },
4044
  { 3210 /* wr */, SP::WRWIMri, Convert__regG0__Imm1_0, 0, { MCK_Imm, MCK__PCT_wim }, },
4045
  { 3210 /* wr */, SP::WRASRri, Convert__Reg1_1__regG0__Imm1_0, 0, { MCK_Imm, MCK_ASRRegs }, },
4046
  { 3210 /* wr */, SP::WRPSRrr, Convert__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK__PCT_psr }, },
4047
  { 3210 /* wr */, SP::WRTBRrr, Convert__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK__PCT_tbr }, },
4048
  { 3210 /* wr */, SP::WRWIMrr, Convert__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK__PCT_wim }, },
4049
  { 3210 /* wr */, SP::WRASRrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_ASRRegs }, },
4050
  { 3210 /* wr */, SP::WRPSRri, Convert__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK__PCT_psr }, },
4051
  { 3210 /* wr */, SP::WRTBRri, Convert__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK__PCT_tbr }, },
4052
  { 3210 /* wr */, SP::WRWIMri, Convert__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK__PCT_wim }, },
4053
  { 3210 /* wr */, SP::WRASRri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_ASRRegs }, },
4054
  { 3213 /* wrpr */, SP::WRPRrr, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasV9, { MCK_IntRegs, MCK_IntRegs, MCK_PRRegs }, },
4055
  { 3213 /* wrpr */, SP::WRPRri, Convert__Reg1_2__Reg1_0__Imm1_1, Feature_HasV9, { MCK_IntRegs, MCK_Imm, MCK_PRRegs }, },
4056
  { 3218 /* xmulx */, SP::XMULX, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
4057
  { 3224 /* xmulxhi */, SP::XMULXHI, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
4058
  { 3232 /* xnor */, SP::XNORrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
4059
  { 3232 /* xnor */, SP::XNORri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
4060
  { 3237 /* xnorcc */, SP::XNORCCrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
4061
  { 3237 /* xnorcc */, SP::XNORCCri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
4062
  { 3244 /* xor */, SP::XORrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
4063
  { 3244 /* xor */, SP::XORri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
4064
  { 3248 /* xorcc */, SP::XORCCrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
4065
  { 3248 /* xorcc */, SP::XORCCri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
4066
};
4067
4068
#include "llvm/Support/Debug.h"
4069
#include "llvm/Support/Format.h"
4070
4071
unsigned SparcAsmParser::
4072
MatchInstructionImpl(const OperandVector &Operands,
4073
                     MCInst &Inst,
4074
                     uint64_t &ErrorInfo,
4075
1.84k
                     bool matchingInlineAsm, unsigned VariantID) {
4076
1.84k
  // Eliminate obvious mismatches.
4077
1.84k
  if (Operands.size() > 7) {
4078
0
    ErrorInfo = 7;
4079
0
    return Match_InvalidOperand;
4080
0
  }
4081
1.84k
4082
1.84k
  // Get the current feature set.
4083
1.84k
  uint64_t AvailableFeatures = getAvailableFeatures();
4084
1.84k
4085
1.84k
  // Get the instruction mnemonic, which is the first token.
4086
1.84k
  StringRef Mnemonic = ((SparcOperand&)*Operands[0]).getToken();
4087
1.84k
4088
1.84k
  // Process all MnemonicAliases to remap the mnemonic.
4089
1.84k
  applyMnemonicAliases(Mnemonic, AvailableFeatures, VariantID);
4090
1.84k
4091
1.84k
  // Some state to try to produce better error messages.
4092
1.84k
  bool HadMatchOtherThanFeatures = false;
4093
1.84k
  bool HadMatchOtherThanPredicate = false;
4094
1.84k
  unsigned RetCode = Match_InvalidOperand;
4095
1.84k
  uint64_t MissingFeatures = ~0ULL;
4096
1.84k
  // Set ErrorInfo to the operand that mismatches if it is
4097
1.84k
  // wrong for all instances of the instruction.
4098
1.84k
  ErrorInfo = ~0ULL;
4099
1.84k
  // Find the appropriate table for this asm variant.
4100
1.84k
  const MatchEntry *Start, *End;
4101
1.84k
  switch (VariantID) {
4102
1.84k
  
default: 0
llvm_unreachable0
("invalid variant!");
4103
1.84k
  case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break;
4104
1.84k
  }
4105
1.84k
  // Search the table.
4106
1.84k
  auto MnemonicRange = std::equal_range(Start, End, Mnemonic, LessOpcode());
4107
1.84k
4108
1.84k
  DEBUG_WITH_TYPE("asm-matcher", dbgs() << "AsmMatcher: found " <<
4109
1.84k
  std::distance(MnemonicRange.first, MnemonicRange.second) << 
4110
1.84k
  " encodings with mnemonic '" << Mnemonic << "'\n");
4111
1.84k
4112
1.84k
  // Return a more specific error code if no mnemonics match.
4113
1.84k
  if (MnemonicRange.first == MnemonicRange.second)
4114
8
    return Match_MnemonicFail;
4115
1.83k
4116
1.83k
  for (const MatchEntry *it = MnemonicRange.first, *ie = MnemonicRange.second;
4117
6.55k
       it != ie; 
++it4.71k
) {
4118
6.49k
    bool HasRequiredFeatures =
4119
6.49k
      (AvailableFeatures & it->RequiredFeatures) == it->RequiredFeatures;
4120
6.49k
    DEBUG_WITH_TYPE("asm-matcher", dbgs() << "Trying to match opcode "
4121
6.49k
                                          << MII.getName(it->Opcode) << "\n");
4122
6.49k
    // equal_range guarantees that instruction mnemonic matches.
4123
6.49k
    assert(Mnemonic == it->getMnemonic());
4124
6.49k
    bool OperandsValid = true;
4125
13.3k
    for (unsigned FormalIdx = 0, ActualIdx = 1; FormalIdx != 6; 
++FormalIdx6.89k
) {
4126
13.3k
      auto Formal = static_cast<MatchClassKind>(it->Classes[FormalIdx]);
4127
13.3k
      DEBUG_WITH_TYPE("asm-matcher",
4128
13.3k
                      dbgs() << "  Matching formal operand class " << getMatchClassName(Formal)
4129
13.3k
                             << " against actual operand at index " << ActualIdx);
4130
13.3k
      if (ActualIdx < Operands.size())
4131
13.3k
        
DEBUG_WITH_TYPE11.5k
("asm-matcher", dbgs() << " (";
4132
13.3k
                        Operands[ActualIdx]->print(dbgs()); dbgs() << "): ");
4133
13.3k
      else
4134
13.3k
        
DEBUG_WITH_TYPE1.82k
("asm-matcher", dbgs() << ": ");
4135
13.3k
      if (ActualIdx >= Operands.size()) {
4136
1.82k
        DEBUG_WITH_TYPE("asm-matcher", dbgs() << "actual operand index out of range ");
4137
1.82k
        OperandsValid = (Formal == InvalidMatchClass) || 
isSubclass(Formal, OptionalMatchClass)1
;
4138
1.82k
        if (!OperandsValid) 
ErrorInfo = ActualIdx1
;
4139
1.82k
        break;
4140
1.82k
      }
4141
11.5k
      MCParsedAsmOperand &Actual = *Operands[ActualIdx];
4142
11.5k
      unsigned Diag = validateOperandClass(Actual, Formal);
4143
11.5k
      if (Diag == Match_Success) {
4144
6.74k
        DEBUG_WITH_TYPE("asm-matcher",
4145
6.74k
                        dbgs() << "match success using generic matcher\n");
4146
6.74k
        ++ActualIdx;
4147
6.74k
        continue;
4148
6.74k
      }
4149
4.80k
      // If the generic handler indicates an invalid operand
4150
4.80k
      // failure, check for a special case.
4151
4.80k
      if (Diag != Match_Success) {
4152
4.80k
        unsigned TargetDiag = validateTargetOperandClass(Actual, Formal);
4153
4.80k
        if (TargetDiag == Match_Success) {
4154
152
          DEBUG_WITH_TYPE("asm-matcher",
4155
152
                          dbgs() << "match success using target matcher\n");
4156
152
          ++ActualIdx;
4157
152
          continue;
4158
152
        }
4159
4.65k
        // If the target matcher returned a specific error code use
4160
4.65k
        // that, else use the one from the generic matcher.
4161
4.65k
        if (TargetDiag != Match_InvalidOperand && 
HasRequiredFeatures0
)
4162
0
          Diag = TargetDiag;
4163
4.65k
      }
4164
4.80k
      // If current formal operand wasn't matched and it is optional
4165
4.80k
      // then try to match next formal operand
4166
4.80k
      
if (4.65k
Diag == Match_InvalidOperand4.65k
&&
isSubclass(Formal, OptionalMatchClass)4.65k
) {
4167
0
        DEBUG_WITH_TYPE("asm-matcher", dbgs() << "ignoring optional operand\n");
4168
0
        continue;
4169
0
      }
4170
4.65k
      // If this operand is broken for all of the instances of this
4171
4.65k
      // mnemonic, keep track of it so we can report loc info.
4172
4.65k
      // If we already had a match that only failed due to a
4173
4.65k
      // target predicate, that diagnostic is preferred.
4174
4.65k
      if (!HadMatchOtherThanPredicate &&
4175
4.65k
          (it == MnemonicRange.first || 
ErrorInfo <= ActualIdx3.55k
)) {
4176
3.74k
        if (HasRequiredFeatures && 
(3.70k
ErrorInfo != ActualIdx3.70k
||
Diag != Match_InvalidOperand2.15k
))
4177
1.54k
          RetCode = Diag;
4178
3.74k
        ErrorInfo = ActualIdx;
4179
3.74k
      }
4180
4.65k
      // Otherwise, just reject this instance of the mnemonic.
4181
4.65k
      OperandsValid = false;
4182
4.65k
      break;
4183
4.65k
    }
4184
6.49k
4185
6.49k
    if (!OperandsValid) {
4186
4.65k
      DEBUG_WITH_TYPE("asm-matcher", dbgs() << "Opcode result: multiple "
4187
4.65k
                                               "operand mismatches, ignoring "
4188
4.65k
                                               "this opcode\n");
4189
4.65k
      continue;
4190
4.65k
    }
4191
1.83k
    if (!HasRequiredFeatures) {
4192
60
      HadMatchOtherThanFeatures = true;
4193
60
      uint64_t NewMissingFeatures = it->RequiredFeatures & ~AvailableFeatures;
4194
60
      DEBUG_WITH_TYPE("asm-matcher", dbgs() << "Missing target features: "
4195
60
                                            << format_hex(NewMissingFeatures, 18)
4196
60
                                            << "\n");
4197
60
      if (countPopulation(NewMissingFeatures) <=
4198
60
          countPopulation(MissingFeatures))
4199
60
        MissingFeatures = NewMissingFeatures;
4200
60
      continue;
4201
60
    }
4202
1.77k
4203
1.77k
    Inst.clear();
4204
1.77k
4205
1.77k
    Inst.setOpcode(it->Opcode);
4206
1.77k
    // We have a potential match but have not rendered the operands.
4207
1.77k
    // Check the target predicate to handle any context sensitive
4208
1.77k
    // constraints.
4209
1.77k
    // For example, Ties that are referenced multiple times must be
4210
1.77k
    // checked here to ensure the input is the same for each match
4211
1.77k
    // constraints. If we leave it any later the ties will have been
4212
1.77k
    // canonicalized
4213
1.77k
    unsigned MatchResult;
4214
1.77k
    if ((MatchResult = checkEarlyTargetMatchPredicate(Inst, Operands)) != Match_Success) {
4215
0
      Inst.clear();
4216
0
      DEBUG_WITH_TYPE(
4217
0
          "asm-matcher",
4218
0
          dbgs() << "Early target match predicate failed with diag code "
4219
0
                 << MatchResult << "\n");
4220
0
      RetCode = MatchResult;
4221
0
      HadMatchOtherThanPredicate = true;
4222
0
      continue;
4223
0
    }
4224
1.77k
4225
1.77k
    if (matchingInlineAsm) {
4226
0
      convertToMapAndConstraints(it->ConvertFn, Operands);
4227
0
      if (!checkAsmTiedOperandConstraints(*this, it->ConvertFn, Operands, ErrorInfo))
4228
0
        return Match_InvalidTiedOperand;
4229
0
4230
0
      return Match_Success;
4231
0
    }
4232
1.77k
4233
1.77k
    // We have selected a definite instruction, convert the parsed
4234
1.77k
    // operands into the appropriate MCInst.
4235
1.77k
    convertToMCInst(it->ConvertFn, Inst, it->Opcode, Operands);
4236
1.77k
4237
1.77k
    // We have a potential match. Check the target predicate to
4238
1.77k
    // handle any context sensitive constraints.
4239
1.77k
    if ((MatchResult = checkTargetMatchPredicate(Inst)) != Match_Success) {
4240
0
      DEBUG_WITH_TYPE("asm-matcher",
4241
0
                      dbgs() << "Target match predicate failed with diag code "
4242
0
                             << MatchResult << "\n");
4243
0
      Inst.clear();
4244
0
      RetCode = MatchResult;
4245
0
      HadMatchOtherThanPredicate = true;
4246
0
      continue;
4247
0
    }
4248
1.77k
4249
1.77k
    if (!checkAsmTiedOperandConstraints(*this, it->ConvertFn, Operands, ErrorInfo))
4250
0
      return Match_InvalidTiedOperand;
4251
1.77k
4252
1.77k
    DEBUG_WITH_TYPE(
4253
1.77k
        "asm-matcher",
4254
1.77k
        dbgs() << "Opcode result: complete match, selecting this opcode\n");
4255
1.77k
    return Match_Success;
4256
1.77k
  }
4257
1.83k
4258
1.83k
  // Okay, we had no match.  Try to return a useful error code.
4259
1.83k
  
if (60
HadMatchOtherThanPredicate60
||
!HadMatchOtherThanFeatures60
)
4260
0
    return RetCode;
4261
60
4262
60
  // Missing feature matches return which features were missing
4263
60
  ErrorInfo = MissingFeatures;
4264
60
  return Match_MissingFeature;
4265
60
}
4266
4267
namespace {
4268
  struct OperandMatchEntry {
4269
    uint8_t RequiredFeatures;
4270
    uint16_t Mnemonic;
4271
    uint8_t Class;
4272
    uint8_t OperandMask;
4273
4274
40.7k
    StringRef getMnemonic() const {
4275
40.7k
      return StringRef(MnemonicTable + Mnemonic + 1,
4276
40.7k
                       MnemonicTable[Mnemonic]);
4277
40.7k
    }
4278
  };
4279
4280
  // Predicate for searching for an opcode.
4281
  struct LessOpcodeOperand {
4282
25.5k
    bool operator()(const OperandMatchEntry &LHS, StringRef RHS) {
4283
25.5k
      return LHS.getMnemonic()  < RHS;
4284
25.5k
    }
4285
15.2k
    bool operator()(StringRef LHS, const OperandMatchEntry &RHS) {
4286
15.2k
      return LHS < RHS.getMnemonic();
4287
15.2k
    }
4288
0
    bool operator()(const OperandMatchEntry &LHS, const OperandMatchEntry &RHS) {
4289
0
      return LHS.getMnemonic() < RHS.getMnemonic();
4290
0
    }
4291
  };
4292
} // end anonymous namespace.
4293
4294
static const OperandMatchEntry OperandMatchTable[102] = {
4295
  /* Operand List Mask, Mnemonic, Operand Class, Features */
4296
  { 0, 252 /* call */, MCK_MEMri, 1 /* 0 */ },
4297
  { 0, 252 /* call */, MCK_MEMrr, 1 /* 0 */ },
4298
  { 0, 352 /* clr */, MCK_MEMri, 2 /* 1 */ },
4299
  { 0, 352 /* clr */, MCK_MEMrr, 2 /* 1 */ },
4300
  { 0, 356 /* clrb */, MCK_MEMri, 2 /* 1 */ },
4301
  { 0, 356 /* clrb */, MCK_MEMrr, 2 /* 1 */ },
4302
  { 0, 361 /* clrh */, MCK_MEMri, 2 /* 1 */ },
4303
  { 0, 361 /* clrh */, MCK_MEMrr, 2 /* 1 */ },
4304
  { 0, 915 /* flush */, MCK_MEMri, 1 /* 0 */ },
4305
  { 0, 915 /* flush */, MCK_MEMrr, 1 /* 0 */ },
4306
  { 0, 2408 /* jmp */, MCK_MEMri, 1 /* 0 */ },
4307
  { 0, 2408 /* jmp */, MCK_MEMrr, 1 /* 0 */ },
4308
  { 0, 2412 /* jmpl */, MCK_MEMri, 1 /* 0 */ },
4309
  { 0, 2412 /* jmpl */, MCK_MEMrr, 1 /* 0 */ },
4310
  { 0, 2417 /* ld */, MCK_MEMri, 2 /* 1 */ },
4311
  { 0, 2417 /* ld */, MCK_MEMri, 2 /* 1 */ },
4312
  { 0, 2417 /* ld */, MCK_MEMri, 2 /* 1 */ },
4313
  { 0, 2417 /* ld */, MCK_MEMri, 2 /* 1 */ },
4314
  { 0, 2417 /* ld */, MCK_MEMri, 2 /* 1 */ },
4315
  { 0, 2417 /* ld */, MCK_MEMrr, 2 /* 1 */ },
4316
  { 0, 2417 /* ld */, MCK_MEMrr, 2 /* 1 */ },
4317
  { 0, 2417 /* ld */, MCK_MEMrr, 2 /* 1 */ },
4318
  { 0, 2417 /* ld */, MCK_MEMrr, 2 /* 1 */ },
4319
  { 0, 2417 /* ld */, MCK_MEMrr, 2 /* 1 */ },
4320
  { 0, 2417 /* ld */, MCK_MEMrr, 2 /* 1 */ },
4321
  { Feature_HasV9, 2420 /* lda */, MCK_MEMrr, 2 /* 1 */ },
4322
  { 0, 2420 /* lda */, MCK_MEMrr, 2 /* 1 */ },
4323
  { 0, 2424 /* ldd */, MCK_MEMri, 2 /* 1 */ },
4324
  { 0, 2424 /* ldd */, MCK_MEMri, 2 /* 1 */ },
4325
  { 0, 2424 /* ldd */, MCK_MEMri, 2 /* 1 */ },
4326
  { 0, 2424 /* ldd */, MCK_MEMrr, 2 /* 1 */ },
4327
  { 0, 2424 /* ldd */, MCK_MEMrr, 2 /* 1 */ },
4328
  { 0, 2424 /* ldd */, MCK_MEMrr, 2 /* 1 */ },
4329
  { 0, 2428 /* ldda */, MCK_MEMrr, 2 /* 1 */ },
4330
  { Feature_HasV9, 2428 /* ldda */, MCK_MEMrr, 2 /* 1 */ },
4331
  { Feature_HasV9, 2433 /* ldq */, MCK_MEMri, 2 /* 1 */ },
4332
  { Feature_HasV9, 2433 /* ldq */, MCK_MEMrr, 2 /* 1 */ },
4333
  { Feature_HasV9, 2437 /* ldqa */, MCK_MEMrr, 2 /* 1 */ },
4334
  { 0, 2442 /* ldsb */, MCK_MEMri, 2 /* 1 */ },
4335
  { 0, 2442 /* ldsb */, MCK_MEMrr, 2 /* 1 */ },
4336
  { 0, 2447 /* ldsba */, MCK_MEMrr, 2 /* 1 */ },
4337
  { 0, 2453 /* ldsh */, MCK_MEMri, 2 /* 1 */ },
4338
  { 0, 2453 /* ldsh */, MCK_MEMrr, 2 /* 1 */ },
4339
  { 0, 2458 /* ldsha */, MCK_MEMrr, 2 /* 1 */ },
4340
  { 0, 2464 /* ldstub */, MCK_MEMri, 2 /* 1 */ },
4341
  { 0, 2464 /* ldstub */, MCK_MEMrr, 2 /* 1 */ },
4342
  { 0, 2471 /* ldstuba */, MCK_MEMrr, 2 /* 1 */ },
4343
  { 0, 2479 /* ldsw */, MCK_MEMri, 2 /* 1 */ },
4344
  { 0, 2479 /* ldsw */, MCK_MEMrr, 2 /* 1 */ },
4345
  { 0, 2484 /* ldub */, MCK_MEMri, 2 /* 1 */ },
4346
  { 0, 2484 /* ldub */, MCK_MEMrr, 2 /* 1 */ },
4347
  { 0, 2489 /* lduba */, MCK_MEMrr, 2 /* 1 */ },
4348
  { 0, 2495 /* lduh */, MCK_MEMri, 2 /* 1 */ },
4349
  { 0, 2495 /* lduh */, MCK_MEMrr, 2 /* 1 */ },
4350
  { 0, 2500 /* lduha */, MCK_MEMrr, 2 /* 1 */ },
4351
  { Feature_HasV9, 2506 /* ldx */, MCK_MEMri, 2 /* 1 */ },
4352
  { 0, 2506 /* ldx */, MCK_MEMri, 2 /* 1 */ },
4353
  { Feature_HasV9, 2506 /* ldx */, MCK_MEMrr, 2 /* 1 */ },
4354
  { 0, 2506 /* ldx */, MCK_MEMrr, 2 /* 1 */ },
4355
  { 0, 2506 /* ldx */, MCK_MEMrr, 2 /* 1 */ },
4356
  { 0, 2853 /* rett */, MCK_MEMri, 1 /* 0 */ },
4357
  { 0, 2853 /* rett */, MCK_MEMrr, 1 /* 0 */ },
4358
  { 0, 2955 /* st */, MCK_MEMri, 4 /* 2 */ },
4359
  { 0, 2955 /* st */, MCK_MEMrr, 4 /* 2 */ },
4360
  { 0, 2955 /* st */, MCK_MEMri, 4 /* 2 */ },
4361
  { 0, 2955 /* st */, MCK_MEMrr, 4 /* 2 */ },
4362
  { 0, 2955 /* st */, MCK_MEMri, 4 /* 2 */ },
4363
  { 0, 2955 /* st */, MCK_MEMrr, 4 /* 2 */ },
4364
  { 0, 2955 /* st */, MCK_MEMri, 4 /* 2 */ },
4365
  { 0, 2955 /* st */, MCK_MEMrr, 4 /* 2 */ },
4366
  { 0, 2955 /* st */, MCK_MEMri, 4 /* 2 */ },
4367
  { 0, 2955 /* st */, MCK_MEMrr, 4 /* 2 */ },
4368
  { Feature_HasV9, 2958 /* sta */, MCK_MEMrr, 4 /* 2 */ },
4369
  { 0, 2958 /* sta */, MCK_MEMrr, 4 /* 2 */ },
4370
  { 0, 2962 /* stb */, MCK_MEMri, 4 /* 2 */ },
4371
  { 0, 2962 /* stb */, MCK_MEMrr, 4 /* 2 */ },
4372
  { 0, 2966 /* stba */, MCK_MEMrr, 4 /* 2 */ },
4373
  { 0, 2977 /* std */, MCK_MEMri, 4 /* 2 */ },
4374
  { 0, 2977 /* std */, MCK_MEMrr, 4 /* 2 */ },
4375
  { 0, 2977 /* std */, MCK_MEMri, 4 /* 2 */ },
4376
  { 0, 2977 /* std */, MCK_MEMrr, 4 /* 2 */ },
4377
  { 0, 2977 /* std */, MCK_MEMri, 4 /* 2 */ },
4378
  { 0, 2977 /* std */, MCK_MEMrr, 4 /* 2 */ },
4379
  { 0, 2977 /* std */, MCK_MEMri, 4 /* 2 */ },
4380
  { 0, 2977 /* std */, MCK_MEMrr, 4 /* 2 */ },
4381
  { 0, 2977 /* std */, MCK_MEMri, 4 /* 2 */ },
4382
  { 0, 2977 /* std */, MCK_MEMrr, 4 /* 2 */ },
4383
  { 0, 2981 /* stda */, MCK_MEMrr, 4 /* 2 */ },
4384
  { Feature_HasV9, 2981 /* stda */, MCK_MEMrr, 4 /* 2 */ },
4385
  { 0, 2986 /* sth */, MCK_MEMri, 4 /* 2 */ },
4386
  { 0, 2986 /* sth */, MCK_MEMrr, 4 /* 2 */ },
4387
  { 0, 2990 /* stha */, MCK_MEMrr, 4 /* 2 */ },
4388
  { Feature_HasV9, 2995 /* stq */, MCK_MEMri, 4 /* 2 */ },
4389
  { Feature_HasV9, 2995 /* stq */, MCK_MEMrr, 4 /* 2 */ },
4390
  { Feature_HasV9, 2999 /* stqa */, MCK_MEMrr, 4 /* 2 */ },
4391
  { Feature_HasV9, 3004 /* stx */, MCK_MEMri, 4 /* 2 */ },
4392
  { Feature_HasV9, 3004 /* stx */, MCK_MEMrr, 4 /* 2 */ },
4393
  { 0, 3004 /* stx */, MCK_MEMri, 4 /* 2 */ },
4394
  { 0, 3004 /* stx */, MCK_MEMrr, 4 /* 2 */ },
4395
  { 0, 3030 /* swap */, MCK_MEMri, 2 /* 1 */ },
4396
  { 0, 3030 /* swap */, MCK_MEMrr, 2 /* 1 */ },
4397
  { 0, 3035 /* swapa */, MCK_MEMrr, 2 /* 1 */ },
4398
};
4399
4400
OperandMatchResultTy SparcAsmParser::
4401
tryCustomParseOperand(OperandVector &Operands,
4402
81
                      unsigned MCK) {
4403
81
4404
81
  switch(MCK) {
4405
81
  case MCK_MEMri:
4406
59
    return parseMEMOperand(Operands);
4407
81
  case MCK_MEMrr:
4408
22
    return parseMEMOperand(Operands);
4409
81
  default:
4410
0
    return MatchOperand_NoMatch;
4411
0
  }
4412
0
  return MatchOperand_NoMatch;
4413
0
}
4414
4415
OperandMatchResultTy SparcAsmParser::
4416
MatchOperandParserImpl(OperandVector &Operands,
4417
                       StringRef Mnemonic,
4418
3.79k
                       bool ParseForAllFeatures) {
4419
3.79k
  // Get the current feature set.
4420
3.79k
  uint64_t AvailableFeatures = getAvailableFeatures();
4421
3.79k
4422
3.79k
  // Get the next operand index.
4423
3.79k
  unsigned NextOpNum = Operands.size() - 1;
4424
3.79k
  // Search the table.
4425
3.79k
  auto MnemonicRange =
4426
3.79k
    std::equal_range(std::begin(OperandMatchTable), std::end(OperandMatchTable),
4427
3.79k
                     Mnemonic, LessOpcodeOperand());
4428
3.79k
4429
3.79k
  if (MnemonicRange.first == MnemonicRange.second)
4430
3.27k
    return MatchOperand_NoMatch;
4431
525
4432
525
  for (const OperandMatchEntry *it = MnemonicRange.first,
4433
2.94k
       *ie = MnemonicRange.second; it != ie; 
++it2.42k
) {
4434
2.46k
    // equal_range guarantees that instruction mnemonic matches.
4435
2.46k
    assert(Mnemonic == it->getMnemonic());
4436
2.46k
4437
2.46k
    // check if the available features match
4438
2.46k
    if (!ParseForAllFeatures && (AvailableFeatures & it->RequiredFeatures) != it->RequiredFeatures)
4439
66
        continue;
4440
2.39k
4441
2.39k
    // check if the operand in question has a custom parser.
4442
2.39k
    if (!(it->OperandMask & (1 << NextOpNum)))
4443
2.31k
      continue;
4444
81
4445
81
    // call custom parse method to handle the operand
4446
81
    OperandMatchResultTy Result = tryCustomParseOperand(Operands, it->Class);
4447
81
    if (Result != MatchOperand_NoMatch)
4448
37
      return Result;
4449
81
  }
4450
525
4451
525
  // Okay, we had no match.
4452
525
  
return MatchOperand_NoMatch488
;
4453
525
}
4454
4455
#endif // GET_MATCHER_IMPLEMENTATION
4456
4457
4458
#ifdef GET_MNEMONIC_SPELL_CHECKER
4459
#undef GET_MNEMONIC_SPELL_CHECKER
4460
4461
static std::string SparcMnemonicSpellCheck(StringRef S, uint64_t FBS, unsigned VariantID) {
4462
  const unsigned MaxEditDist = 2;
4463
  std::vector<StringRef> Candidates;
4464
  StringRef Prev = "";
4465
4466
  // Find the appropriate table for this asm variant.
4467
  const MatchEntry *Start, *End;
4468
  switch (VariantID) {
4469
  default: llvm_unreachable("invalid variant!");
4470
  case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break;
4471
  }
4472
4473
  for (auto I = Start; I < End; I++) {
4474
    // Ignore unsupported instructions.
4475
    if ((FBS & I->RequiredFeatures) != I->RequiredFeatures)
4476
      continue;
4477
4478
    StringRef T = I->getMnemonic();
4479
    // Avoid recomputing the edit distance for the same string.
4480
    if (T.equals(Prev))
4481
      continue;
4482
4483
    Prev = T;
4484
    unsigned Dist = S.edit_distance(T, false, MaxEditDist);
4485
    if (Dist <= MaxEditDist)
4486
      Candidates.push_back(T);
4487
  }
4488
4489
  if (Candidates.empty())
4490
    return "";
4491
4492
  std::string Res = ", did you mean: ";
4493
  unsigned i = 0;
4494
  for( ; i < Candidates.size() - 1; i++)
4495
    Res += Candidates[i].str() + ", ";
4496
  return Res + Candidates[i].str() + "?";
4497
}
4498
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#endif // GET_MNEMONIC_SPELL_CHECKER
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