Coverage Report

Created: 2018-11-13 17:19

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/clang-build/lib/Target/Sparc/SparcGenAsmMatcher.inc
Line
Count
Source (jump to first uncovered line)
1
/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2
|*                                                                            *|
3
|* Assembly Matcher Source Fragment                                           *|
4
|*                                                                            *|
5
|* Automatically generated file, do not edit!                                 *|
6
|*                                                                            *|
7
\*===----------------------------------------------------------------------===*/
8
9
10
#ifdef GET_ASSEMBLER_HEADER
11
#undef GET_ASSEMBLER_HEADER
12
  // This should be included into the middle of the declaration of
13
  // your subclasses implementation of MCTargetAsmParser.
14
  uint64_t ComputeAvailableFeatures(const FeatureBitset& FB) const;
15
  void convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode,
16
                       const OperandVector &Operands);
17
  void convertToMapAndConstraints(unsigned Kind,
18
                           const OperandVector &Operands) override;
19
  unsigned MatchInstructionImpl(const OperandVector &Operands,
20
                                MCInst &Inst,
21
                                uint64_t &ErrorInfo,
22
                                bool matchingInlineAsm,
23
                                unsigned VariantID = 0);
24
  OperandMatchResultTy MatchOperandParserImpl(
25
    OperandVector &Operands,
26
    StringRef Mnemonic,
27
    bool ParseForAllFeatures = false);
28
  OperandMatchResultTy tryCustomParseOperand(
29
    OperandVector &Operands,
30
    unsigned MCK);
31
32
#endif // GET_ASSEMBLER_HEADER_INFO
33
34
35
#ifdef GET_OPERAND_DIAGNOSTIC_TYPES
36
#undef GET_OPERAND_DIAGNOSTIC_TYPES
37
38
#endif // GET_OPERAND_DIAGNOSTIC_TYPES
39
40
41
#ifdef GET_REGISTER_MATCHER
42
#undef GET_REGISTER_MATCHER
43
44
// Flags for subtarget features that participate in instruction matching.
45
enum SubtargetFeatureFlag : uint8_t {
46
  Feature_UseSoftMulDiv = (1ULL << 5),
47
  Feature_HasV9 = (1ULL << 1),
48
  Feature_HasVIS = (1ULL << 2),
49
  Feature_HasVIS2 = (1ULL << 3),
50
  Feature_HasVIS3 = (1ULL << 4),
51
  Feature_HasPWRPSR = (1ULL << 0),
52
  Feature_None = 0
53
};
54
55
#endif // GET_REGISTER_MATCHER
56
57
58
#ifdef GET_SUBTARGET_FEATURE_NAME
59
#undef GET_SUBTARGET_FEATURE_NAME
60
61
// User-level names for subtarget features that participate in
62
// instruction matching.
63
static const char *getSubtargetFeatureName(uint64_t Val) {
64
  switch(Val) {
65
  case Feature_UseSoftMulDiv: return "";
66
  case Feature_HasV9: return "";
67
  case Feature_HasVIS: return "";
68
  case Feature_HasVIS2: return "";
69
  case Feature_HasVIS3: return "";
70
  case Feature_HasPWRPSR: return "";
71
  default: return "(unknown)";
72
  }
73
}
74
75
#endif // GET_SUBTARGET_FEATURE_NAME
76
77
78
#ifdef GET_MATCHER_IMPLEMENTATION
79
#undef GET_MATCHER_IMPLEMENTATION
80
81
3.70k
static void applyMnemonicAliases(StringRef &Mnemonic, uint64_t Features, unsigned VariantID) {
82
3.70k
  switch (VariantID) {
83
3.70k
    case 0:
84
3.70k
      switch (Mnemonic.size()) {
85
3.70k
      
default: break2.04k
;
86
3.70k
      case 4:  // 7 strings to match.
87
1.02k
        switch (Mnemonic[0]) {
88
1.02k
        
default: break832
;
89
1.02k
        case 'a':  // 1 string to match.
90
12
          if (memcmp(Mnemonic.data()+1, "ddc", 3) != 0)
91
8
            break;
92
4
          if ((Features & Feature_HasV9) == Feature_HasV9)   // "addc"
93
2
            Mnemonic = "addx";
94
4
          return;
95
76
        case 'l':  // 1 string to match.
96
76
          if (memcmp(Mnemonic.data()+1, "duw", 3) != 0)
97
64
            break;
98
12
          if ((Features & Feature_HasV9) == Feature_HasV9)   // "lduw"
99
6
            Mnemonic = "ld";
100
12
          return;
101
104
        case 's':  // 5 strings to match.
102
104
          switch (Mnemonic[1]) {
103
104
          
default: break60
;
104
104
          case 't':  // 4 strings to match.
105
36
            switch (Mnemonic[2]) {
106
36
            
default: break20
;
107
36
            case 's':  // 2 strings to match.
108
8
              switch (Mnemonic[3]) {
109
8
              
default: break0
;
110
8
              case 'b':  // 1 string to match.
111
4
                Mnemonic = "stb";  // "stsb"
112
4
                return;
113
8
              case 'h':  // 1 string to match.
114
4
                Mnemonic = "sth";  // "stsh"
115
4
                return;
116
0
              }
117
0
              break;
118
8
            case 'u':  // 2 strings to match.
119
8
              switch (Mnemonic[3]) {
120
8
              
default: break0
;
121
8
              case 'b':  // 1 string to match.
122
4
                Mnemonic = "stb";  // "stub"
123
4
                return;
124
8
              case 'h':  // 1 string to match.
125
4
                Mnemonic = "sth";  // "stuh"
126
4
                return;
127
0
              }
128
0
              break;
129
20
            }
130
20
            break;
131
20
          case 'u':  // 1 string to match.
132
8
            if (memcmp(Mnemonic.data()+2, "bc", 2) != 0)
133
4
              break;
134
4
            if ((Features & Feature_HasV9) == Feature_HasV9)   // "subc"
135
2
              Mnemonic = "subx";
136
4
            return;
137
84
          }
138
84
          break;
139
988
        }
140
988
        break;
141
988
      case 5:  // 5 strings to match.
142
492
        switch (Mnemonic[0]) {
143
492
        
default: break336
;
144
492
        case 'l':  // 1 string to match.
145
20
          if (memcmp(Mnemonic.data()+1, "duwa", 4) != 0)
146
16
            break;
147
4
          if ((Features & Feature_HasV9) == Feature_HasV9)   // "lduwa"
148
2
            Mnemonic = "lda";
149
4
          return;
150
136
        case 's':  // 4 strings to match.
151
136
          if (Mnemonic[1] != 't')
152
116
            break;
153
20
          switch (Mnemonic[2]) {
154
20
          
default: break4
;
155
20
          case 's':  // 2 strings to match.
156
8
            switch (Mnemonic[3]) {
157
8
            
default: break0
;
158
8
            case 'b':  // 1 string to match.
159
4
              if (Mnemonic[4] != 'a')
160
0
                break;
161
4
              Mnemonic = "stba";   // "stsba"
162
4
              return;
163
4
            case 'h':  // 1 string to match.
164
4
              if (Mnemonic[4] != 'a')
165
0
                break;
166
4
              Mnemonic = "stha";   // "stsha"
167
4
              return;
168
0
            }
169
0
            break;
170
8
          case 'u':  // 2 strings to match.
171
8
            switch (Mnemonic[3]) {
172
8
            
default: break0
;
173
8
            case 'b':  // 1 string to match.
174
4
              if (Mnemonic[4] != 'a')
175
0
                break;
176
4
              Mnemonic = "stba";   // "stuba"
177
4
              return;
178
4
            case 'h':  // 1 string to match.
179
4
              if (Mnemonic[4] != 'a')
180
0
                break;
181
4
              Mnemonic = "stha";   // "stuha"
182
4
              return;
183
0
            }
184
0
            break;
185
4
          }
186
4
          break;
187
472
        }
188
472
        break;
189
472
      case 6:  // 4 strings to match.
190
148
        switch (Mnemonic[0]) {
191
148
        
default: break114
;
192
148
        case 'a':  // 1 string to match.
193
12
          if (memcmp(Mnemonic.data()+1, "ddccc", 5) != 0)
194
8
            break;
195
4
          if ((Features & Feature_HasV9) == Feature_HasV9)   // "addccc"
196
2
            Mnemonic = "addxcc";
197
4
          return;
198
4
        case 'i':  // 1 string to match.
199
4
          if (memcmp(Mnemonic.data()+1, "flush", 5) != 0)
200
0
            break;
201
4
          Mnemonic = "flush";  // "iflush"
202
4
          return;
203
4
        case 'r':  // 1 string to match.
204
2
          if (memcmp(Mnemonic.data()+1, "eturn", 5) != 0)
205
0
            break;
206
2
          if ((Features & Feature_HasV9) == Feature_HasV9)  // "return"
207
2
            Mnemonic = "rett";
208
2
          return;
209
16
        case 's':  // 1 string to match.
210
16
          if (memcmp(Mnemonic.data()+1, "ubccc", 5) != 0)
211
12
            break;
212
4
          if ((Features & Feature_HasV9) == Feature_HasV9)   // "subccc"
213
2
            Mnemonic = "subxcc";
214
4
          return;
215
134
        }
216
134
        break;
217
3.63k
      }
218
3.63k
    break;
219
3.63k
  }
220
3.63k
  switch (Mnemonic.size()) {
221
3.63k
  
default: break2.04k
;
222
3.63k
  case 4:  // 7 strings to match.
223
988
    switch (Mnemonic[0]) {
224
988
    
default: break832
;
225
988
    case 'a':  // 1 string to match.
226
8
      if (memcmp(Mnemonic.data()+1, "ddc", 3) != 0)
227
8
        break;
228
0
      if ((Features & Feature_HasV9) == Feature_HasV9)  // "addc"
229
0
        Mnemonic = "addx";
230
0
      return;
231
64
    case 'l':  // 1 string to match.
232
64
      if (memcmp(Mnemonic.data()+1, "duw", 3) != 0)
233
64
        break;
234
0
      if ((Features & Feature_HasV9) == Feature_HasV9)  // "lduw"
235
0
        Mnemonic = "ld";
236
0
      return;
237
84
    case 's':  // 5 strings to match.
238
84
      switch (Mnemonic[1]) {
239
84
      
default: break60
;
240
84
      case 't':  // 4 strings to match.
241
20
        switch (Mnemonic[2]) {
242
20
        default: break;
243
20
        case 's':  // 2 strings to match.
244
0
          switch (Mnemonic[3]) {
245
0
          default: break;
246
0
          case 'b':  // 1 string to match.
247
0
            Mnemonic = "stb";  // "stsb"
248
0
            return;
249
0
          case 'h':  // 1 string to match.
250
0
            Mnemonic = "sth";  // "stsh"
251
0
            return;
252
0
          }
253
0
          break;
254
0
        case 'u':  // 2 strings to match.
255
0
          switch (Mnemonic[3]) {
256
0
          default: break;
257
0
          case 'b':  // 1 string to match.
258
0
            Mnemonic = "stb";  // "stub"
259
0
            return;
260
0
          case 'h':  // 1 string to match.
261
0
            Mnemonic = "sth";  // "stuh"
262
0
            return;
263
0
          }
264
0
          break;
265
20
        }
266
20
        break;
267
20
      case 'u':  // 1 string to match.
268
4
        if (memcmp(Mnemonic.data()+2, "bc", 2) != 0)
269
4
          break;
270
0
        if ((Features & Feature_HasV9) == Feature_HasV9)  // "subc"
271
0
          Mnemonic = "subx";
272
0
        return;
273
84
      }
274
84
      break;
275
988
    }
276
988
    break;
277
988
  case 5:  // 5 strings to match.
278
472
    switch (Mnemonic[0]) {
279
472
    
default: break336
;
280
472
    case 'l':  // 1 string to match.
281
16
      if (memcmp(Mnemonic.data()+1, "duwa", 4) != 0)
282
16
        break;
283
0
      if ((Features & Feature_HasV9) == Feature_HasV9)  // "lduwa"
284
0
        Mnemonic = "lda";
285
0
      return;
286
120
    case 's':  // 4 strings to match.
287
120
      if (Mnemonic[1] != 't')
288
116
        break;
289
4
      switch (Mnemonic[2]) {
290
4
      default: break;
291
4
      case 's':  // 2 strings to match.
292
0
        switch (Mnemonic[3]) {
293
0
        default: break;
294
0
        case 'b':  // 1 string to match.
295
0
          if (Mnemonic[4] != 'a')
296
0
            break;
297
0
          Mnemonic = "stba";   // "stsba"
298
0
          return;
299
0
        case 'h':  // 1 string to match.
300
0
          if (Mnemonic[4] != 'a')
301
0
            break;
302
0
          Mnemonic = "stha";   // "stsha"
303
0
          return;
304
0
        }
305
0
        break;
306
0
      case 'u':  // 2 strings to match.
307
0
        switch (Mnemonic[3]) {
308
0
        default: break;
309
0
        case 'b':  // 1 string to match.
310
0
          if (Mnemonic[4] != 'a')
311
0
            break;
312
0
          Mnemonic = "stba";   // "stuba"
313
0
          return;
314
0
        case 'h':  // 1 string to match.
315
0
          if (Mnemonic[4] != 'a')
316
0
            break;
317
0
          Mnemonic = "stha";   // "stuha"
318
0
          return;
319
0
        }
320
0
        break;
321
4
      }
322
4
      break;
323
472
    }
324
472
    break;
325
472
  case 6:  // 4 strings to match.
326
134
    switch (Mnemonic[0]) {
327
134
    
default: break114
;
328
134
    case 'a':  // 1 string to match.
329
8
      if (memcmp(Mnemonic.data()+1, "ddccc", 5) != 0)
330
8
        break;
331
0
      if ((Features & Feature_HasV9) == Feature_HasV9)  // "addccc"
332
0
        Mnemonic = "addxcc";
333
0
      return;
334
0
    case 'i':  // 1 string to match.
335
0
      if (memcmp(Mnemonic.data()+1, "flush", 5) != 0)
336
0
        break;
337
0
      Mnemonic = "flush";  // "iflush"
338
0
      return;
339
0
    case 'r':  // 1 string to match.
340
0
      if (memcmp(Mnemonic.data()+1, "eturn", 5) != 0)
341
0
        break;
342
0
      if ((Features & Feature_HasV9) == Feature_HasV9)  // "return"
343
0
        Mnemonic = "rett";
344
0
      return;
345
12
    case 's':  // 1 string to match.
346
12
      if (memcmp(Mnemonic.data()+1, "ubccc", 5) != 0)
347
12
        break;
348
0
      if ((Features & Feature_HasV9) == Feature_HasV9)  // "subccc"
349
0
        Mnemonic = "subxcc";
350
0
      return;
351
134
    }
352
134
    break;
353
3.63k
  }
354
3.63k
}
355
356
enum {
357
  Tie0_1_1,
358
  Tie0_3_3,
359
};
360
361
static const uint8_t TiedAsmOperandTable[][3] = {
362
  /* Tie0_1_1 */ { 0, 1, 1 },
363
  /* Tie0_3_3 */ { 0, 3, 3 },
364
};
365
366
namespace {
367
enum OperatorConversionKind {
368
  CVT_Done,
369
  CVT_Reg,
370
  CVT_Tied,
371
  CVT_95_Reg,
372
  CVT_95_addImmOperands,
373
  CVT_imm_95_8,
374
  CVT_imm_95_13,
375
  CVT_imm_95_5,
376
  CVT_imm_95_1,
377
  CVT_imm_95_10,
378
  CVT_imm_95_11,
379
  CVT_imm_95_12,
380
  CVT_imm_95_3,
381
  CVT_imm_95_2,
382
  CVT_imm_95_4,
383
  CVT_imm_95_0,
384
  CVT_imm_95_9,
385
  CVT_imm_95_6,
386
  CVT_imm_95_14,
387
  CVT_regG0,
388
  CVT_imm_95_15,
389
  CVT_imm_95_7,
390
  CVT_regO7,
391
  CVT_95_addMEMriOperands,
392
  CVT_95_addMEMrrOperands,
393
  CVT_regFCC0,
394
  CVT_NUM_CONVERTERS
395
};
396
397
enum InstructionConversionKind {
398
  Convert__Reg1_2__Reg1_0__Reg1_1,
399
  Convert__Reg1_2__Reg1_0__Imm1_1,
400
  Convert__Reg1_2__Reg1_0__Reg1_1__Imm1_3,
401
  Convert__Imm1_0__imm_95_8,
402
  Convert__Imm1_1__imm_95_8,
403
  Convert__Imm1_1__Imm1_0,
404
  Convert__Imm1_2__imm_95_8,
405
  Convert__Imm1_2__Imm1_0,
406
  Convert__Imm1_3__imm_95_8,
407
  Convert__Imm1_3__Imm1_0,
408
  Convert__Imm1_4__Imm1_0,
409
  Convert__Imm1_0,
410
  Convert__Imm1_0__imm_95_13,
411
  Convert__Imm1_1__imm_95_13,
412
  Convert__Imm1_2__imm_95_13,
413
  Convert__Imm1_3__imm_95_13,
414
  Convert__Reg1_1__Reg1_1__Reg1_0,
415
  Convert__Reg1_1__Reg1_1__Imm1_0,
416
  Convert__Imm1_0__imm_95_5,
417
  Convert__Imm1_1__imm_95_5,
418
  Convert__Imm1_2__imm_95_5,
419
  Convert__Imm1_3__imm_95_5,
420
  Convert__Imm1_0__imm_95_1,
421
  Convert__Imm1_1__imm_95_1,
422
  Convert__Imm1_2__imm_95_1,
423
  Convert__Imm1_3__imm_95_1,
424
  Convert__Imm1_0__imm_95_10,
425
  Convert__Imm1_1__imm_95_10,
426
  Convert__Imm1_2__imm_95_10,
427
  Convert__Imm1_3__imm_95_10,
428
  Convert__Imm1_0__imm_95_11,
429
  Convert__Imm1_1__imm_95_11,
430
  Convert__Imm1_2__imm_95_11,
431
  Convert__Imm1_3__imm_95_11,
432
  Convert__Imm1_0__imm_95_12,
433
  Convert__Imm1_1__imm_95_12,
434
  Convert__Imm1_2__imm_95_12,
435
  Convert__Imm1_3__imm_95_12,
436
  Convert__Imm1_0__imm_95_3,
437
  Convert__Imm1_1__imm_95_3,
438
  Convert__Imm1_2__imm_95_3,
439
  Convert__Imm1_3__imm_95_3,
440
  Convert__Imm1_0__imm_95_2,
441
  Convert__Imm1_1__imm_95_2,
442
  Convert__Imm1_2__imm_95_2,
443
  Convert__Imm1_3__imm_95_2,
444
  Convert__Imm1_0__imm_95_4,
445
  Convert__Imm1_1__imm_95_4,
446
  Convert__Imm1_2__imm_95_4,
447
  Convert__Imm1_3__imm_95_4,
448
  Convert__Imm1_0__imm_95_0,
449
  Convert__Imm1_1__imm_95_0,
450
  Convert__Imm1_2__imm_95_0,
451
  Convert__Imm1_3__imm_95_0,
452
  Convert__Imm1_0__imm_95_9,
453
  Convert__Imm1_1__imm_95_9,
454
  Convert__Imm1_2__imm_95_9,
455
  Convert__Imm1_3__imm_95_9,
456
  Convert__Imm1_0__imm_95_6,
457
  Convert__Imm1_1__imm_95_6,
458
  Convert__Imm1_2__imm_95_6,
459
  Convert__Imm1_3__imm_95_6,
460
  Convert__Imm1_0__imm_95_14,
461
  Convert__Imm1_1__imm_95_14,
462
  Convert__Imm1_2__imm_95_14,
463
  Convert__Imm1_3__imm_95_14,
464
  Convert__Reg1_0__Imm1_1,
465
  Convert__Reg1_1__Imm1_2,
466
  Convert__Reg1_2__Imm1_3,
467
  Convert__regG0__Reg1_1__Reg1_0,
468
  Convert__regG0__Reg1_1__Imm1_0,
469
  Convert__Imm1_0__imm_95_15,
470
  Convert__Imm1_1__imm_95_15,
471
  Convert__Imm1_2__imm_95_15,
472
  Convert__Imm1_3__imm_95_15,
473
  Convert__Imm1_0__imm_95_7,
474
  Convert__Imm1_1__imm_95_7,
475
  Convert__Imm1_2__imm_95_7,
476
  Convert__Imm1_3__imm_95_7,
477
  Convert__regO7__MEMri2_0,
478
  Convert__regO7__MEMrr2_0,
479
  Convert__Imm1_0__Imm1_1,
480
  Convert__Reg1_4__Reg1_1__Reg1_3__Tie0_1_1,
481
  Convert__Reg1_5__Reg1_1__Reg1_4__Tie0_1_1,
482
  Convert__Reg1_5__Reg1_1__Reg1_4__Tie0_1_1__Imm1_3,
483
  Convert__Reg1_0__regG0__regG0,
484
  Convert__MEMri2_1__regG0,
485
  Convert__MEMrr2_1__regG0,
486
  Convert__Reg1_0,
487
  Convert__Reg1_0__Reg1_1,
488
  Convert__Reg1_0__Reg1_0__imm_95_1,
489
  Convert__Reg1_1__Reg1_0,
490
  Convert__Imm1_1__imm_95_8__Reg1_0,
491
  Convert__Imm1_2__imm_95_8__Reg1_1,
492
  Convert__Imm1_2__Imm1_0__Reg1_1,
493
  Convert__Imm1_3__imm_95_8__Reg1_2,
494
  Convert__Imm1_3__Imm1_0__Reg1_2,
495
  Convert__Imm1_4__Imm1_0__Reg1_3,
496
  Convert__Imm1_1__imm_95_9__Reg1_0,
497
  Convert__Imm1_2__imm_95_9__Reg1_1,
498
  Convert__Imm1_3__imm_95_9__Reg1_2,
499
  Convert__Imm1_1__imm_95_6__Reg1_0,
500
  Convert__Imm1_2__imm_95_6__Reg1_1,
501
  Convert__Imm1_3__imm_95_6__Reg1_2,
502
  Convert__Imm1_1__imm_95_11__Reg1_0,
503
  Convert__Imm1_2__imm_95_11__Reg1_1,
504
  Convert__Imm1_3__imm_95_11__Reg1_2,
505
  Convert__Imm1_1__imm_95_4__Reg1_0,
506
  Convert__Imm1_2__imm_95_4__Reg1_1,
507
  Convert__Imm1_3__imm_95_4__Reg1_2,
508
  Convert__Imm1_1__imm_95_13__Reg1_0,
509
  Convert__Imm1_2__imm_95_13__Reg1_1,
510
  Convert__Imm1_3__imm_95_13__Reg1_2,
511
  Convert__Imm1_1__imm_95_2__Reg1_0,
512
  Convert__Imm1_2__imm_95_2__Reg1_1,
513
  Convert__Imm1_3__imm_95_2__Reg1_2,
514
  Convert__Imm1_1__imm_95_0__Reg1_0,
515
  Convert__Imm1_2__imm_95_0__Reg1_1,
516
  Convert__Imm1_3__imm_95_0__Reg1_2,
517
  Convert__Imm1_1__imm_95_1__Reg1_0,
518
  Convert__Imm1_2__imm_95_1__Reg1_1,
519
  Convert__Imm1_3__imm_95_1__Reg1_2,
520
  Convert__Imm1_1__imm_95_15__Reg1_0,
521
  Convert__Imm1_2__imm_95_15__Reg1_1,
522
  Convert__Imm1_3__imm_95_15__Reg1_2,
523
  Convert__Imm1_1__imm_95_7__Reg1_0,
524
  Convert__Imm1_2__imm_95_7__Reg1_1,
525
  Convert__Imm1_3__imm_95_7__Reg1_2,
526
  Convert__Imm1_1__imm_95_10__Reg1_0,
527
  Convert__Imm1_2__imm_95_10__Reg1_1,
528
  Convert__Imm1_3__imm_95_10__Reg1_2,
529
  Convert__Imm1_1__imm_95_5__Reg1_0,
530
  Convert__Imm1_2__imm_95_5__Reg1_1,
531
  Convert__Imm1_3__imm_95_5__Reg1_2,
532
  Convert__Imm1_1__imm_95_12__Reg1_0,
533
  Convert__Imm1_2__imm_95_12__Reg1_1,
534
  Convert__Imm1_3__imm_95_12__Reg1_2,
535
  Convert__Imm1_1__imm_95_3__Reg1_0,
536
  Convert__Imm1_2__imm_95_3__Reg1_1,
537
  Convert__Imm1_3__imm_95_3__Reg1_2,
538
  Convert__Imm1_1__imm_95_14__Reg1_0,
539
  Convert__Imm1_2__imm_95_14__Reg1_1,
540
  Convert__Imm1_3__imm_95_14__Reg1_2,
541
  Convert__regFCC0__Reg1_0__Reg1_1,
542
  Convert__Reg1_0__Reg1_1__Reg1_2,
543
  Convert_NoOperands,
544
  Convert__MEMri2_0,
545
  Convert__MEMrr2_0,
546
  Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8,
547
  Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_8,
548
  Convert__Reg1_3__Reg1_2__Tie0_1_1__Imm1_0,
549
  Convert__Reg1_3__Reg1_1__Reg1_2__Tie0_1_1__Imm1_0,
550
  Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13,
551
  Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5,
552
  Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1,
553
  Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_9,
554
  Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_10,
555
  Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_6,
556
  Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_11,
557
  Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_11,
558
  Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_12,
559
  Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_3,
560
  Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_4,
561
  Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_2,
562
  Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_13,
563
  Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_4,
564
  Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_2,
565
  Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_0,
566
  Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_0,
567
  Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9,
568
  Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_1,
569
  Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_6,
570
  Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_15,
571
  Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_14,
572
  Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_7,
573
  Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_10,
574
  Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_5,
575
  Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_12,
576
  Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_3,
577
  Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_14,
578
  Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_15,
579
  Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_7,
580
  Convert__Reg1_0__Tie0_1_1,
581
  Convert__regG0__MEMri2_0,
582
  Convert__regG0__MEMrr2_0,
583
  Convert__Reg1_1__MEMri2_0,
584
  Convert__Reg1_1__MEMrr2_0,
585
  Convert__MEMri2_1,
586
  Convert__Reg1_3__MEMri2_1,
587
  Convert__MEMrr2_1,
588
  Convert__Reg1_3__MEMrr2_1,
589
  Convert__Reg1_3__MEMrr2_1__Imm1_4,
590
  Convert__Reg1_4__MEMrr2_1__Imm1_3,
591
  Convert__Reg1_1,
592
  Convert__regG0__Reg1_0,
593
  Convert__Reg1_1__regG0__Reg1_0,
594
  Convert__regG0__Imm1_0,
595
  Convert__Reg1_1__regG0__Imm1_0,
596
  Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_8,
597
  Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_8,
598
  Convert__Reg1_3__Imm1_2__Tie0_1_1__Imm1_0,
599
  Convert__Reg1_3__Reg1_1__Imm1_2__Tie0_1_1__Imm1_0,
600
  Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_13,
601
  Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_5,
602
  Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_1,
603
  Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_9,
604
  Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_10,
605
  Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_6,
606
  Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_11,
607
  Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_11,
608
  Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_12,
609
  Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_3,
610
  Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_4,
611
  Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_2,
612
  Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_13,
613
  Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_4,
614
  Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_2,
615
  Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_0,
616
  Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_0,
617
  Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_9,
618
  Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_1,
619
  Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_6,
620
  Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_15,
621
  Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_14,
622
  Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_7,
623
  Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_10,
624
  Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_5,
625
  Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_12,
626
  Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_3,
627
  Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_14,
628
  Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_15,
629
  Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_7,
630
  Convert__Reg1_0__regG0__Reg1_0,
631
  Convert__Reg1_0__Reg1_0__regG0,
632
  Convert__Reg1_1__Reg1_0__regG0,
633
  Convert__regG0__regG0__regG0,
634
  Convert__imm_95_8,
635
  Convert__Reg1_1__Imm1_0,
636
  Convert__Reg1_2__Reg1_0__Reg1_1__imm_95_0,
637
  Convert__Reg1_2__Reg1_0__Imm1_1__imm_95_0,
638
  Convert__MEMri2_2,
639
  Convert__MEMrr2_2,
640
  Convert__MEMri2_2__Reg1_0,
641
  Convert__MEMrr2_2__Reg1_0,
642
  Convert__MEMrr2_2__Reg1_0__Imm1_4,
643
  Convert__Reg1_3__MEMri2_1__Tie0_1_1,
644
  Convert__Reg1_3__MEMrr2_1__Tie0_1_1,
645
  Convert__Reg1_4__MEMrr2_1__Imm1_3__Tie0_1_1,
646
  Convert__regG0__Reg1_0__imm_95_8,
647
  Convert__regG0__Imm1_0__imm_95_8,
648
  Convert__regG0__Reg1_1__imm_95_8,
649
  Convert__regG0__Imm1_1__imm_95_8,
650
  Convert__Reg1_0__Reg1_2__imm_95_8,
651
  Convert__Reg1_0__Imm1_2__imm_95_8,
652
  Convert__Reg1_1__Reg1_3__imm_95_8,
653
  Convert__Reg1_1__Imm1_3__imm_95_8,
654
  Convert__Reg1_1__Reg1_3__Imm1_0,
655
  Convert__Reg1_1__Imm1_3__Imm1_0,
656
  Convert__Reg1_2__Reg1_4__Imm1_0,
657
  Convert__Reg1_2__Imm1_4__Imm1_0,
658
  Convert__regG0__Reg1_0__imm_95_13,
659
  Convert__regG0__Imm1_0__imm_95_13,
660
  Convert__regG0__Reg1_1__imm_95_13,
661
  Convert__regG0__Imm1_1__imm_95_13,
662
  Convert__Reg1_0__Reg1_2__imm_95_13,
663
  Convert__Reg1_0__Imm1_2__imm_95_13,
664
  Convert__Reg1_1__Reg1_3__imm_95_13,
665
  Convert__Reg1_1__Imm1_3__imm_95_13,
666
  Convert__regG0__Reg1_0__imm_95_5,
667
  Convert__regG0__Imm1_0__imm_95_5,
668
  Convert__regG0__Reg1_1__imm_95_5,
669
  Convert__regG0__Imm1_1__imm_95_5,
670
  Convert__Reg1_0__Reg1_2__imm_95_5,
671
  Convert__Reg1_0__Imm1_2__imm_95_5,
672
  Convert__Reg1_1__Reg1_3__imm_95_5,
673
  Convert__Reg1_1__Imm1_3__imm_95_5,
674
  Convert__regG0__Reg1_0__imm_95_1,
675
  Convert__regG0__Imm1_0__imm_95_1,
676
  Convert__regG0__Reg1_1__imm_95_1,
677
  Convert__regG0__Imm1_1__imm_95_1,
678
  Convert__Reg1_0__Reg1_2__imm_95_1,
679
  Convert__Reg1_0__Imm1_2__imm_95_1,
680
  Convert__Reg1_1__Reg1_3__imm_95_1,
681
  Convert__Reg1_1__Imm1_3__imm_95_1,
682
  Convert__regG0__Reg1_0__imm_95_10,
683
  Convert__regG0__Imm1_0__imm_95_10,
684
  Convert__regG0__Reg1_1__imm_95_10,
685
  Convert__regG0__Imm1_1__imm_95_10,
686
  Convert__Reg1_0__Reg1_2__imm_95_10,
687
  Convert__Reg1_0__Imm1_2__imm_95_10,
688
  Convert__Reg1_1__Reg1_3__imm_95_10,
689
  Convert__Reg1_1__Imm1_3__imm_95_10,
690
  Convert__regG0__Reg1_0__imm_95_11,
691
  Convert__regG0__Imm1_0__imm_95_11,
692
  Convert__regG0__Reg1_1__imm_95_11,
693
  Convert__regG0__Imm1_1__imm_95_11,
694
  Convert__Reg1_0__Reg1_2__imm_95_11,
695
  Convert__Reg1_0__Imm1_2__imm_95_11,
696
  Convert__Reg1_1__Reg1_3__imm_95_11,
697
  Convert__Reg1_1__Imm1_3__imm_95_11,
698
  Convert__regG0__Reg1_0__imm_95_12,
699
  Convert__regG0__Imm1_0__imm_95_12,
700
  Convert__regG0__Reg1_1__imm_95_12,
701
  Convert__regG0__Imm1_1__imm_95_12,
702
  Convert__Reg1_0__Reg1_2__imm_95_12,
703
  Convert__Reg1_0__Imm1_2__imm_95_12,
704
  Convert__Reg1_1__Reg1_3__imm_95_12,
705
  Convert__Reg1_1__Imm1_3__imm_95_12,
706
  Convert__regG0__Reg1_0__imm_95_3,
707
  Convert__regG0__Imm1_0__imm_95_3,
708
  Convert__regG0__Reg1_1__imm_95_3,
709
  Convert__regG0__Imm1_1__imm_95_3,
710
  Convert__Reg1_0__Reg1_2__imm_95_3,
711
  Convert__Reg1_0__Imm1_2__imm_95_3,
712
  Convert__Reg1_1__Reg1_3__imm_95_3,
713
  Convert__Reg1_1__Imm1_3__imm_95_3,
714
  Convert__regG0__Reg1_0__imm_95_2,
715
  Convert__regG0__Imm1_0__imm_95_2,
716
  Convert__regG0__Reg1_1__imm_95_2,
717
  Convert__regG0__Imm1_1__imm_95_2,
718
  Convert__Reg1_0__Reg1_2__imm_95_2,
719
  Convert__Reg1_0__Imm1_2__imm_95_2,
720
  Convert__Reg1_1__Reg1_3__imm_95_2,
721
  Convert__Reg1_1__Imm1_3__imm_95_2,
722
  Convert__regG0__Reg1_0__imm_95_4,
723
  Convert__regG0__Imm1_0__imm_95_4,
724
  Convert__regG0__Reg1_1__imm_95_4,
725
  Convert__regG0__Imm1_1__imm_95_4,
726
  Convert__Reg1_0__Reg1_2__imm_95_4,
727
  Convert__Reg1_0__Imm1_2__imm_95_4,
728
  Convert__Reg1_1__Reg1_3__imm_95_4,
729
  Convert__Reg1_1__Imm1_3__imm_95_4,
730
  Convert__regG0__Reg1_0__imm_95_0,
731
  Convert__regG0__Imm1_0__imm_95_0,
732
  Convert__regG0__Reg1_1__imm_95_0,
733
  Convert__regG0__Imm1_1__imm_95_0,
734
  Convert__Reg1_0__Reg1_2__imm_95_0,
735
  Convert__Reg1_0__Imm1_2__imm_95_0,
736
  Convert__Reg1_1__Reg1_3__imm_95_0,
737
  Convert__Reg1_1__Imm1_3__imm_95_0,
738
  Convert__regG0__Reg1_0__imm_95_9,
739
  Convert__regG0__Imm1_0__imm_95_9,
740
  Convert__regG0__Reg1_1__imm_95_9,
741
  Convert__regG0__Imm1_1__imm_95_9,
742
  Convert__Reg1_0__Reg1_2__imm_95_9,
743
  Convert__Reg1_0__Imm1_2__imm_95_9,
744
  Convert__Reg1_1__Reg1_3__imm_95_9,
745
  Convert__Reg1_1__Imm1_3__imm_95_9,
746
  Convert__regG0__Reg1_0__imm_95_6,
747
  Convert__regG0__Imm1_0__imm_95_6,
748
  Convert__regG0__Reg1_1__imm_95_6,
749
  Convert__regG0__Imm1_1__imm_95_6,
750
  Convert__Reg1_0__Reg1_2__imm_95_6,
751
  Convert__Reg1_0__Imm1_2__imm_95_6,
752
  Convert__Reg1_1__Reg1_3__imm_95_6,
753
  Convert__Reg1_1__Imm1_3__imm_95_6,
754
  Convert__regG0__Reg1_0__imm_95_14,
755
  Convert__regG0__Imm1_0__imm_95_14,
756
  Convert__regG0__Reg1_1__imm_95_14,
757
  Convert__regG0__Imm1_1__imm_95_14,
758
  Convert__Reg1_0__Reg1_2__imm_95_14,
759
  Convert__Reg1_0__Imm1_2__imm_95_14,
760
  Convert__Reg1_1__Reg1_3__imm_95_14,
761
  Convert__Reg1_1__Imm1_3__imm_95_14,
762
  Convert__regG0__Reg1_0__regG0,
763
  Convert__regG0__Reg1_0__imm_95_15,
764
  Convert__regG0__Imm1_0__imm_95_15,
765
  Convert__regG0__Reg1_1__imm_95_15,
766
  Convert__regG0__Imm1_1__imm_95_15,
767
  Convert__Reg1_0__Reg1_2__imm_95_15,
768
  Convert__Reg1_0__Imm1_2__imm_95_15,
769
  Convert__Reg1_1__Reg1_3__imm_95_15,
770
  Convert__Reg1_1__Imm1_3__imm_95_15,
771
  Convert__regG0__Reg1_0__imm_95_7,
772
  Convert__regG0__Imm1_0__imm_95_7,
773
  Convert__regG0__Reg1_1__imm_95_7,
774
  Convert__regG0__Imm1_1__imm_95_7,
775
  Convert__Reg1_0__Reg1_2__imm_95_7,
776
  Convert__Reg1_0__Imm1_2__imm_95_7,
777
  Convert__Reg1_1__Reg1_3__imm_95_7,
778
  Convert__Reg1_1__Imm1_3__imm_95_7,
779
  Convert__imm_95_0,
780
  CVT_NUM_SIGNATURES
781
};
782
783
} // end anonymous namespace
784
785
static const uint8_t ConversionTable[CVT_NUM_SIGNATURES][11] = {
786
  // Convert__Reg1_2__Reg1_0__Reg1_1
787
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Done },
788
  // Convert__Reg1_2__Reg1_0__Imm1_1
789
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
790
  // Convert__Reg1_2__Reg1_0__Reg1_1__Imm1_3
791
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_Done },
792
  // Convert__Imm1_0__imm_95_8
793
  { CVT_95_addImmOperands, 1, CVT_imm_95_8, 0, CVT_Done },
794
  // Convert__Imm1_1__imm_95_8
795
  { CVT_95_addImmOperands, 2, CVT_imm_95_8, 0, CVT_Done },
796
  // Convert__Imm1_1__Imm1_0
797
  { CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
798
  // Convert__Imm1_2__imm_95_8
799
  { CVT_95_addImmOperands, 3, CVT_imm_95_8, 0, CVT_Done },
800
  // Convert__Imm1_2__Imm1_0
801
  { CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
802
  // Convert__Imm1_3__imm_95_8
803
  { CVT_95_addImmOperands, 4, CVT_imm_95_8, 0, CVT_Done },
804
  // Convert__Imm1_3__Imm1_0
805
  { CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 1, CVT_Done },
806
  // Convert__Imm1_4__Imm1_0
807
  { CVT_95_addImmOperands, 5, CVT_95_addImmOperands, 1, CVT_Done },
808
  // Convert__Imm1_0
809
  { CVT_95_addImmOperands, 1, CVT_Done },
810
  // Convert__Imm1_0__imm_95_13
811
  { CVT_95_addImmOperands, 1, CVT_imm_95_13, 0, CVT_Done },
812
  // Convert__Imm1_1__imm_95_13
813
  { CVT_95_addImmOperands, 2, CVT_imm_95_13, 0, CVT_Done },
814
  // Convert__Imm1_2__imm_95_13
815
  { CVT_95_addImmOperands, 3, CVT_imm_95_13, 0, CVT_Done },
816
  // Convert__Imm1_3__imm_95_13
817
  { CVT_95_addImmOperands, 4, CVT_imm_95_13, 0, CVT_Done },
818
  // Convert__Reg1_1__Reg1_1__Reg1_0
819
  { CVT_95_Reg, 2, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
820
  // Convert__Reg1_1__Reg1_1__Imm1_0
821
  { CVT_95_Reg, 2, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
822
  // Convert__Imm1_0__imm_95_5
823
  { CVT_95_addImmOperands, 1, CVT_imm_95_5, 0, CVT_Done },
824
  // Convert__Imm1_1__imm_95_5
825
  { CVT_95_addImmOperands, 2, CVT_imm_95_5, 0, CVT_Done },
826
  // Convert__Imm1_2__imm_95_5
827
  { CVT_95_addImmOperands, 3, CVT_imm_95_5, 0, CVT_Done },
828
  // Convert__Imm1_3__imm_95_5
829
  { CVT_95_addImmOperands, 4, CVT_imm_95_5, 0, CVT_Done },
830
  // Convert__Imm1_0__imm_95_1
831
  { CVT_95_addImmOperands, 1, CVT_imm_95_1, 0, CVT_Done },
832
  // Convert__Imm1_1__imm_95_1
833
  { CVT_95_addImmOperands, 2, CVT_imm_95_1, 0, CVT_Done },
834
  // Convert__Imm1_2__imm_95_1
835
  { CVT_95_addImmOperands, 3, CVT_imm_95_1, 0, CVT_Done },
836
  // Convert__Imm1_3__imm_95_1
837
  { CVT_95_addImmOperands, 4, CVT_imm_95_1, 0, CVT_Done },
838
  // Convert__Imm1_0__imm_95_10
839
  { CVT_95_addImmOperands, 1, CVT_imm_95_10, 0, CVT_Done },
840
  // Convert__Imm1_1__imm_95_10
841
  { CVT_95_addImmOperands, 2, CVT_imm_95_10, 0, CVT_Done },
842
  // Convert__Imm1_2__imm_95_10
843
  { CVT_95_addImmOperands, 3, CVT_imm_95_10, 0, CVT_Done },
844
  // Convert__Imm1_3__imm_95_10
845
  { CVT_95_addImmOperands, 4, CVT_imm_95_10, 0, CVT_Done },
846
  // Convert__Imm1_0__imm_95_11
847
  { CVT_95_addImmOperands, 1, CVT_imm_95_11, 0, CVT_Done },
848
  // Convert__Imm1_1__imm_95_11
849
  { CVT_95_addImmOperands, 2, CVT_imm_95_11, 0, CVT_Done },
850
  // Convert__Imm1_2__imm_95_11
851
  { CVT_95_addImmOperands, 3, CVT_imm_95_11, 0, CVT_Done },
852
  // Convert__Imm1_3__imm_95_11
853
  { CVT_95_addImmOperands, 4, CVT_imm_95_11, 0, CVT_Done },
854
  // Convert__Imm1_0__imm_95_12
855
  { CVT_95_addImmOperands, 1, CVT_imm_95_12, 0, CVT_Done },
856
  // Convert__Imm1_1__imm_95_12
857
  { CVT_95_addImmOperands, 2, CVT_imm_95_12, 0, CVT_Done },
858
  // Convert__Imm1_2__imm_95_12
859
  { CVT_95_addImmOperands, 3, CVT_imm_95_12, 0, CVT_Done },
860
  // Convert__Imm1_3__imm_95_12
861
  { CVT_95_addImmOperands, 4, CVT_imm_95_12, 0, CVT_Done },
862
  // Convert__Imm1_0__imm_95_3
863
  { CVT_95_addImmOperands, 1, CVT_imm_95_3, 0, CVT_Done },
864
  // Convert__Imm1_1__imm_95_3
865
  { CVT_95_addImmOperands, 2, CVT_imm_95_3, 0, CVT_Done },
866
  // Convert__Imm1_2__imm_95_3
867
  { CVT_95_addImmOperands, 3, CVT_imm_95_3, 0, CVT_Done },
868
  // Convert__Imm1_3__imm_95_3
869
  { CVT_95_addImmOperands, 4, CVT_imm_95_3, 0, CVT_Done },
870
  // Convert__Imm1_0__imm_95_2
871
  { CVT_95_addImmOperands, 1, CVT_imm_95_2, 0, CVT_Done },
872
  // Convert__Imm1_1__imm_95_2
873
  { CVT_95_addImmOperands, 2, CVT_imm_95_2, 0, CVT_Done },
874
  // Convert__Imm1_2__imm_95_2
875
  { CVT_95_addImmOperands, 3, CVT_imm_95_2, 0, CVT_Done },
876
  // Convert__Imm1_3__imm_95_2
877
  { CVT_95_addImmOperands, 4, CVT_imm_95_2, 0, CVT_Done },
878
  // Convert__Imm1_0__imm_95_4
879
  { CVT_95_addImmOperands, 1, CVT_imm_95_4, 0, CVT_Done },
880
  // Convert__Imm1_1__imm_95_4
881
  { CVT_95_addImmOperands, 2, CVT_imm_95_4, 0, CVT_Done },
882
  // Convert__Imm1_2__imm_95_4
883
  { CVT_95_addImmOperands, 3, CVT_imm_95_4, 0, CVT_Done },
884
  // Convert__Imm1_3__imm_95_4
885
  { CVT_95_addImmOperands, 4, CVT_imm_95_4, 0, CVT_Done },
886
  // Convert__Imm1_0__imm_95_0
887
  { CVT_95_addImmOperands, 1, CVT_imm_95_0, 0, CVT_Done },
888
  // Convert__Imm1_1__imm_95_0
889
  { CVT_95_addImmOperands, 2, CVT_imm_95_0, 0, CVT_Done },
890
  // Convert__Imm1_2__imm_95_0
891
  { CVT_95_addImmOperands, 3, CVT_imm_95_0, 0, CVT_Done },
892
  // Convert__Imm1_3__imm_95_0
893
  { CVT_95_addImmOperands, 4, CVT_imm_95_0, 0, CVT_Done },
894
  // Convert__Imm1_0__imm_95_9
895
  { CVT_95_addImmOperands, 1, CVT_imm_95_9, 0, CVT_Done },
896
  // Convert__Imm1_1__imm_95_9
897
  { CVT_95_addImmOperands, 2, CVT_imm_95_9, 0, CVT_Done },
898
  // Convert__Imm1_2__imm_95_9
899
  { CVT_95_addImmOperands, 3, CVT_imm_95_9, 0, CVT_Done },
900
  // Convert__Imm1_3__imm_95_9
901
  { CVT_95_addImmOperands, 4, CVT_imm_95_9, 0, CVT_Done },
902
  // Convert__Imm1_0__imm_95_6
903
  { CVT_95_addImmOperands, 1, CVT_imm_95_6, 0, CVT_Done },
904
  // Convert__Imm1_1__imm_95_6
905
  { CVT_95_addImmOperands, 2, CVT_imm_95_6, 0, CVT_Done },
906
  // Convert__Imm1_2__imm_95_6
907
  { CVT_95_addImmOperands, 3, CVT_imm_95_6, 0, CVT_Done },
908
  // Convert__Imm1_3__imm_95_6
909
  { CVT_95_addImmOperands, 4, CVT_imm_95_6, 0, CVT_Done },
910
  // Convert__Imm1_0__imm_95_14
911
  { CVT_95_addImmOperands, 1, CVT_imm_95_14, 0, CVT_Done },
912
  // Convert__Imm1_1__imm_95_14
913
  { CVT_95_addImmOperands, 2, CVT_imm_95_14, 0, CVT_Done },
914
  // Convert__Imm1_2__imm_95_14
915
  { CVT_95_addImmOperands, 3, CVT_imm_95_14, 0, CVT_Done },
916
  // Convert__Imm1_3__imm_95_14
917
  { CVT_95_addImmOperands, 4, CVT_imm_95_14, 0, CVT_Done },
918
  // Convert__Reg1_0__Imm1_1
919
  { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
920
  // Convert__Reg1_1__Imm1_2
921
  { CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
922
  // Convert__Reg1_2__Imm1_3
923
  { CVT_95_Reg, 3, CVT_95_addImmOperands, 4, CVT_Done },
924
  // Convert__regG0__Reg1_1__Reg1_0
925
  { CVT_regG0, 0, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
926
  // Convert__regG0__Reg1_1__Imm1_0
927
  { CVT_regG0, 0, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
928
  // Convert__Imm1_0__imm_95_15
929
  { CVT_95_addImmOperands, 1, CVT_imm_95_15, 0, CVT_Done },
930
  // Convert__Imm1_1__imm_95_15
931
  { CVT_95_addImmOperands, 2, CVT_imm_95_15, 0, CVT_Done },
932
  // Convert__Imm1_2__imm_95_15
933
  { CVT_95_addImmOperands, 3, CVT_imm_95_15, 0, CVT_Done },
934
  // Convert__Imm1_3__imm_95_15
935
  { CVT_95_addImmOperands, 4, CVT_imm_95_15, 0, CVT_Done },
936
  // Convert__Imm1_0__imm_95_7
937
  { CVT_95_addImmOperands, 1, CVT_imm_95_7, 0, CVT_Done },
938
  // Convert__Imm1_1__imm_95_7
939
  { CVT_95_addImmOperands, 2, CVT_imm_95_7, 0, CVT_Done },
940
  // Convert__Imm1_2__imm_95_7
941
  { CVT_95_addImmOperands, 3, CVT_imm_95_7, 0, CVT_Done },
942
  // Convert__Imm1_3__imm_95_7
943
  { CVT_95_addImmOperands, 4, CVT_imm_95_7, 0, CVT_Done },
944
  // Convert__regO7__MEMri2_0
945
  { CVT_regO7, 0, CVT_95_addMEMriOperands, 1, CVT_Done },
946
  // Convert__regO7__MEMrr2_0
947
  { CVT_regO7, 0, CVT_95_addMEMrrOperands, 1, CVT_Done },
948
  // Convert__Imm1_0__Imm1_1
949
  { CVT_95_addImmOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
950
  // Convert__Reg1_4__Reg1_1__Reg1_3__Tie0_1_1
951
  { CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_Done },
952
  // Convert__Reg1_5__Reg1_1__Reg1_4__Tie0_1_1
953
  { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_95_Reg, 5, CVT_Tied, Tie0_1_1, CVT_Done },
954
  // Convert__Reg1_5__Reg1_1__Reg1_4__Tie0_1_1__Imm1_3
955
  { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_95_Reg, 5, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 4, CVT_Done },
956
  // Convert__Reg1_0__regG0__regG0
957
  { CVT_95_Reg, 1, CVT_regG0, 0, CVT_regG0, 0, CVT_Done },
958
  // Convert__MEMri2_1__regG0
959
  { CVT_95_addMEMriOperands, 2, CVT_regG0, 0, CVT_Done },
960
  // Convert__MEMrr2_1__regG0
961
  { CVT_95_addMEMrrOperands, 2, CVT_regG0, 0, CVT_Done },
962
  // Convert__Reg1_0
963
  { CVT_95_Reg, 1, CVT_Done },
964
  // Convert__Reg1_0__Reg1_1
965
  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Done },
966
  // Convert__Reg1_0__Reg1_0__imm_95_1
967
  { CVT_95_Reg, 1, CVT_95_Reg, 1, CVT_imm_95_1, 0, CVT_Done },
968
  // Convert__Reg1_1__Reg1_0
969
  { CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
970
  // Convert__Imm1_1__imm_95_8__Reg1_0
971
  { CVT_95_addImmOperands, 2, CVT_imm_95_8, 0, CVT_95_Reg, 1, CVT_Done },
972
  // Convert__Imm1_2__imm_95_8__Reg1_1
973
  { CVT_95_addImmOperands, 3, CVT_imm_95_8, 0, CVT_95_Reg, 2, CVT_Done },
974
  // Convert__Imm1_2__Imm1_0__Reg1_1
975
  { CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 1, CVT_95_Reg, 2, CVT_Done },
976
  // Convert__Imm1_3__imm_95_8__Reg1_2
977
  { CVT_95_addImmOperands, 4, CVT_imm_95_8, 0, CVT_95_Reg, 3, CVT_Done },
978
  // Convert__Imm1_3__Imm1_0__Reg1_2
979
  { CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 1, CVT_95_Reg, 3, CVT_Done },
980
  // Convert__Imm1_4__Imm1_0__Reg1_3
981
  { CVT_95_addImmOperands, 5, CVT_95_addImmOperands, 1, CVT_95_Reg, 4, CVT_Done },
982
  // Convert__Imm1_1__imm_95_9__Reg1_0
983
  { CVT_95_addImmOperands, 2, CVT_imm_95_9, 0, CVT_95_Reg, 1, CVT_Done },
984
  // Convert__Imm1_2__imm_95_9__Reg1_1
985
  { CVT_95_addImmOperands, 3, CVT_imm_95_9, 0, CVT_95_Reg, 2, CVT_Done },
986
  // Convert__Imm1_3__imm_95_9__Reg1_2
987
  { CVT_95_addImmOperands, 4, CVT_imm_95_9, 0, CVT_95_Reg, 3, CVT_Done },
988
  // Convert__Imm1_1__imm_95_6__Reg1_0
989
  { CVT_95_addImmOperands, 2, CVT_imm_95_6, 0, CVT_95_Reg, 1, CVT_Done },
990
  // Convert__Imm1_2__imm_95_6__Reg1_1
991
  { CVT_95_addImmOperands, 3, CVT_imm_95_6, 0, CVT_95_Reg, 2, CVT_Done },
992
  // Convert__Imm1_3__imm_95_6__Reg1_2
993
  { CVT_95_addImmOperands, 4, CVT_imm_95_6, 0, CVT_95_Reg, 3, CVT_Done },
994
  // Convert__Imm1_1__imm_95_11__Reg1_0
995
  { CVT_95_addImmOperands, 2, CVT_imm_95_11, 0, CVT_95_Reg, 1, CVT_Done },
996
  // Convert__Imm1_2__imm_95_11__Reg1_1
997
  { CVT_95_addImmOperands, 3, CVT_imm_95_11, 0, CVT_95_Reg, 2, CVT_Done },
998
  // Convert__Imm1_3__imm_95_11__Reg1_2
999
  { CVT_95_addImmOperands, 4, CVT_imm_95_11, 0, CVT_95_Reg, 3, CVT_Done },
1000
  // Convert__Imm1_1__imm_95_4__Reg1_0
1001
  { CVT_95_addImmOperands, 2, CVT_imm_95_4, 0, CVT_95_Reg, 1, CVT_Done },
1002
  // Convert__Imm1_2__imm_95_4__Reg1_1
1003
  { CVT_95_addImmOperands, 3, CVT_imm_95_4, 0, CVT_95_Reg, 2, CVT_Done },
1004
  // Convert__Imm1_3__imm_95_4__Reg1_2
1005
  { CVT_95_addImmOperands, 4, CVT_imm_95_4, 0, CVT_95_Reg, 3, CVT_Done },
1006
  // Convert__Imm1_1__imm_95_13__Reg1_0
1007
  { CVT_95_addImmOperands, 2, CVT_imm_95_13, 0, CVT_95_Reg, 1, CVT_Done },
1008
  // Convert__Imm1_2__imm_95_13__Reg1_1
1009
  { CVT_95_addImmOperands, 3, CVT_imm_95_13, 0, CVT_95_Reg, 2, CVT_Done },
1010
  // Convert__Imm1_3__imm_95_13__Reg1_2
1011
  { CVT_95_addImmOperands, 4, CVT_imm_95_13, 0, CVT_95_Reg, 3, CVT_Done },
1012
  // Convert__Imm1_1__imm_95_2__Reg1_0
1013
  { CVT_95_addImmOperands, 2, CVT_imm_95_2, 0, CVT_95_Reg, 1, CVT_Done },
1014
  // Convert__Imm1_2__imm_95_2__Reg1_1
1015
  { CVT_95_addImmOperands, 3, CVT_imm_95_2, 0, CVT_95_Reg, 2, CVT_Done },
1016
  // Convert__Imm1_3__imm_95_2__Reg1_2
1017
  { CVT_95_addImmOperands, 4, CVT_imm_95_2, 0, CVT_95_Reg, 3, CVT_Done },
1018
  // Convert__Imm1_1__imm_95_0__Reg1_0
1019
  { CVT_95_addImmOperands, 2, CVT_imm_95_0, 0, CVT_95_Reg, 1, CVT_Done },
1020
  // Convert__Imm1_2__imm_95_0__Reg1_1
1021
  { CVT_95_addImmOperands, 3, CVT_imm_95_0, 0, CVT_95_Reg, 2, CVT_Done },
1022
  // Convert__Imm1_3__imm_95_0__Reg1_2
1023
  { CVT_95_addImmOperands, 4, CVT_imm_95_0, 0, CVT_95_Reg, 3, CVT_Done },
1024
  // Convert__Imm1_1__imm_95_1__Reg1_0
1025
  { CVT_95_addImmOperands, 2, CVT_imm_95_1, 0, CVT_95_Reg, 1, CVT_Done },
1026
  // Convert__Imm1_2__imm_95_1__Reg1_1
1027
  { CVT_95_addImmOperands, 3, CVT_imm_95_1, 0, CVT_95_Reg, 2, CVT_Done },
1028
  // Convert__Imm1_3__imm_95_1__Reg1_2
1029
  { CVT_95_addImmOperands, 4, CVT_imm_95_1, 0, CVT_95_Reg, 3, CVT_Done },
1030
  // Convert__Imm1_1__imm_95_15__Reg1_0
1031
  { CVT_95_addImmOperands, 2, CVT_imm_95_15, 0, CVT_95_Reg, 1, CVT_Done },
1032
  // Convert__Imm1_2__imm_95_15__Reg1_1
1033
  { CVT_95_addImmOperands, 3, CVT_imm_95_15, 0, CVT_95_Reg, 2, CVT_Done },
1034
  // Convert__Imm1_3__imm_95_15__Reg1_2
1035
  { CVT_95_addImmOperands, 4, CVT_imm_95_15, 0, CVT_95_Reg, 3, CVT_Done },
1036
  // Convert__Imm1_1__imm_95_7__Reg1_0
1037
  { CVT_95_addImmOperands, 2, CVT_imm_95_7, 0, CVT_95_Reg, 1, CVT_Done },
1038
  // Convert__Imm1_2__imm_95_7__Reg1_1
1039
  { CVT_95_addImmOperands, 3, CVT_imm_95_7, 0, CVT_95_Reg, 2, CVT_Done },
1040
  // Convert__Imm1_3__imm_95_7__Reg1_2
1041
  { CVT_95_addImmOperands, 4, CVT_imm_95_7, 0, CVT_95_Reg, 3, CVT_Done },
1042
  // Convert__Imm1_1__imm_95_10__Reg1_0
1043
  { CVT_95_addImmOperands, 2, CVT_imm_95_10, 0, CVT_95_Reg, 1, CVT_Done },
1044
  // Convert__Imm1_2__imm_95_10__Reg1_1
1045
  { CVT_95_addImmOperands, 3, CVT_imm_95_10, 0, CVT_95_Reg, 2, CVT_Done },
1046
  // Convert__Imm1_3__imm_95_10__Reg1_2
1047
  { CVT_95_addImmOperands, 4, CVT_imm_95_10, 0, CVT_95_Reg, 3, CVT_Done },
1048
  // Convert__Imm1_1__imm_95_5__Reg1_0
1049
  { CVT_95_addImmOperands, 2, CVT_imm_95_5, 0, CVT_95_Reg, 1, CVT_Done },
1050
  // Convert__Imm1_2__imm_95_5__Reg1_1
1051
  { CVT_95_addImmOperands, 3, CVT_imm_95_5, 0, CVT_95_Reg, 2, CVT_Done },
1052
  // Convert__Imm1_3__imm_95_5__Reg1_2
1053
  { CVT_95_addImmOperands, 4, CVT_imm_95_5, 0, CVT_95_Reg, 3, CVT_Done },
1054
  // Convert__Imm1_1__imm_95_12__Reg1_0
1055
  { CVT_95_addImmOperands, 2, CVT_imm_95_12, 0, CVT_95_Reg, 1, CVT_Done },
1056
  // Convert__Imm1_2__imm_95_12__Reg1_1
1057
  { CVT_95_addImmOperands, 3, CVT_imm_95_12, 0, CVT_95_Reg, 2, CVT_Done },
1058
  // Convert__Imm1_3__imm_95_12__Reg1_2
1059
  { CVT_95_addImmOperands, 4, CVT_imm_95_12, 0, CVT_95_Reg, 3, CVT_Done },
1060
  // Convert__Imm1_1__imm_95_3__Reg1_0
1061
  { CVT_95_addImmOperands, 2, CVT_imm_95_3, 0, CVT_95_Reg, 1, CVT_Done },
1062
  // Convert__Imm1_2__imm_95_3__Reg1_1
1063
  { CVT_95_addImmOperands, 3, CVT_imm_95_3, 0, CVT_95_Reg, 2, CVT_Done },
1064
  // Convert__Imm1_3__imm_95_3__Reg1_2
1065
  { CVT_95_addImmOperands, 4, CVT_imm_95_3, 0, CVT_95_Reg, 3, CVT_Done },
1066
  // Convert__Imm1_1__imm_95_14__Reg1_0
1067
  { CVT_95_addImmOperands, 2, CVT_imm_95_14, 0, CVT_95_Reg, 1, CVT_Done },
1068
  // Convert__Imm1_2__imm_95_14__Reg1_1
1069
  { CVT_95_addImmOperands, 3, CVT_imm_95_14, 0, CVT_95_Reg, 2, CVT_Done },
1070
  // Convert__Imm1_3__imm_95_14__Reg1_2
1071
  { CVT_95_addImmOperands, 4, CVT_imm_95_14, 0, CVT_95_Reg, 3, CVT_Done },
1072
  // Convert__regFCC0__Reg1_0__Reg1_1
1073
  { CVT_regFCC0, 0, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Done },
1074
  // Convert__Reg1_0__Reg1_1__Reg1_2
1075
  { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done },
1076
  // Convert_NoOperands
1077
  { CVT_Done },
1078
  // Convert__MEMri2_0
1079
  { CVT_95_addMEMriOperands, 1, CVT_Done },
1080
  // Convert__MEMrr2_0
1081
  { CVT_95_addMEMrrOperands, 1, CVT_Done },
1082
  // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8
1083
  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_8, 0, CVT_Done },
1084
  // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_8
1085
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_8, 0, CVT_Done },
1086
  // Convert__Reg1_3__Reg1_2__Tie0_1_1__Imm1_0
1087
  { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 1, CVT_Done },
1088
  // Convert__Reg1_3__Reg1_1__Reg1_2__Tie0_1_1__Imm1_0
1089
  { CVT_95_Reg, 4, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 1, CVT_Done },
1090
  // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13
1091
  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_13, 0, CVT_Done },
1092
  // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5
1093
  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_5, 0, CVT_Done },
1094
  // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1
1095
  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_1, 0, CVT_Done },
1096
  // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_9
1097
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_9, 0, CVT_Done },
1098
  // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_10
1099
  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_10, 0, CVT_Done },
1100
  // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_6
1101
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_6, 0, CVT_Done },
1102
  // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_11
1103
  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_11, 0, CVT_Done },
1104
  // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_11
1105
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_11, 0, CVT_Done },
1106
  // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_12
1107
  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_12, 0, CVT_Done },
1108
  // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_3
1109
  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_3, 0, CVT_Done },
1110
  // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_4
1111
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_4, 0, CVT_Done },
1112
  // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_2
1113
  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_2, 0, CVT_Done },
1114
  // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_13
1115
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_13, 0, CVT_Done },
1116
  // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_4
1117
  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_4, 0, CVT_Done },
1118
  // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_2
1119
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_2, 0, CVT_Done },
1120
  // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_0
1121
  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_0, 0, CVT_Done },
1122
  // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_0
1123
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_0, 0, CVT_Done },
1124
  // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9
1125
  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_9, 0, CVT_Done },
1126
  // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_1
1127
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_1, 0, CVT_Done },
1128
  // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_6
1129
  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_6, 0, CVT_Done },
1130
  // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_15
1131
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_15, 0, CVT_Done },
1132
  // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_14
1133
  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_14, 0, CVT_Done },
1134
  // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_7
1135
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_7, 0, CVT_Done },
1136
  // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_10
1137
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_10, 0, CVT_Done },
1138
  // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_5
1139
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_5, 0, CVT_Done },
1140
  // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_12
1141
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_12, 0, CVT_Done },
1142
  // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_3
1143
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_3, 0, CVT_Done },
1144
  // Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_14
1145
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_14, 0, CVT_Done },
1146
  // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_15
1147
  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_15, 0, CVT_Done },
1148
  // Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_7
1149
  { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_7, 0, CVT_Done },
1150
  // Convert__Reg1_0__Tie0_1_1
1151
  { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_Done },
1152
  // Convert__regG0__MEMri2_0
1153
  { CVT_regG0, 0, CVT_95_addMEMriOperands, 1, CVT_Done },
1154
  // Convert__regG0__MEMrr2_0
1155
  { CVT_regG0, 0, CVT_95_addMEMrrOperands, 1, CVT_Done },
1156
  // Convert__Reg1_1__MEMri2_0
1157
  { CVT_95_Reg, 2, CVT_95_addMEMriOperands, 1, CVT_Done },
1158
  // Convert__Reg1_1__MEMrr2_0
1159
  { CVT_95_Reg, 2, CVT_95_addMEMrrOperands, 1, CVT_Done },
1160
  // Convert__MEMri2_1
1161
  { CVT_95_addMEMriOperands, 2, CVT_Done },
1162
  // Convert__Reg1_3__MEMri2_1
1163
  { CVT_95_Reg, 4, CVT_95_addMEMriOperands, 2, CVT_Done },
1164
  // Convert__MEMrr2_1
1165
  { CVT_95_addMEMrrOperands, 2, CVT_Done },
1166
  // Convert__Reg1_3__MEMrr2_1
1167
  { CVT_95_Reg, 4, CVT_95_addMEMrrOperands, 2, CVT_Done },
1168
  // Convert__Reg1_3__MEMrr2_1__Imm1_4
1169
  { CVT_95_Reg, 4, CVT_95_addMEMrrOperands, 2, CVT_95_addImmOperands, 5, CVT_Done },
1170
  // Convert__Reg1_4__MEMrr2_1__Imm1_3
1171
  { CVT_95_Reg, 5, CVT_95_addMEMrrOperands, 2, CVT_95_addImmOperands, 4, CVT_Done },
1172
  // Convert__Reg1_1
1173
  { CVT_95_Reg, 2, CVT_Done },
1174
  // Convert__regG0__Reg1_0
1175
  { CVT_regG0, 0, CVT_95_Reg, 1, CVT_Done },
1176
  // Convert__Reg1_1__regG0__Reg1_0
1177
  { CVT_95_Reg, 2, CVT_regG0, 0, CVT_95_Reg, 1, CVT_Done },
1178
  // Convert__regG0__Imm1_0
1179
  { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_Done },
1180
  // Convert__Reg1_1__regG0__Imm1_0
1181
  { CVT_95_Reg, 2, CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_Done },
1182
  // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_8
1183
  { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_8, 0, CVT_Done },
1184
  // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_8
1185
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_8, 0, CVT_Done },
1186
  // Convert__Reg1_3__Imm1_2__Tie0_1_1__Imm1_0
1187
  { CVT_95_Reg, 4, CVT_95_addImmOperands, 3, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 1, CVT_Done },
1188
  // Convert__Reg1_3__Reg1_1__Imm1_2__Tie0_1_1__Imm1_0
1189
  { CVT_95_Reg, 4, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 1, CVT_Done },
1190
  // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_13
1191
  { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_13, 0, CVT_Done },
1192
  // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_5
1193
  { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_5, 0, CVT_Done },
1194
  // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_1
1195
  { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_1, 0, CVT_Done },
1196
  // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_9
1197
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_9, 0, CVT_Done },
1198
  // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_10
1199
  { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_10, 0, CVT_Done },
1200
  // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_6
1201
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_6, 0, CVT_Done },
1202
  // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_11
1203
  { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_11, 0, CVT_Done },
1204
  // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_11
1205
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_11, 0, CVT_Done },
1206
  // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_12
1207
  { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_12, 0, CVT_Done },
1208
  // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_3
1209
  { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_3, 0, CVT_Done },
1210
  // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_4
1211
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_4, 0, CVT_Done },
1212
  // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_2
1213
  { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_2, 0, CVT_Done },
1214
  // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_13
1215
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_13, 0, CVT_Done },
1216
  // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_4
1217
  { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_4, 0, CVT_Done },
1218
  // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_2
1219
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_2, 0, CVT_Done },
1220
  // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_0
1221
  { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_0, 0, CVT_Done },
1222
  // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_0
1223
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_0, 0, CVT_Done },
1224
  // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_9
1225
  { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_9, 0, CVT_Done },
1226
  // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_1
1227
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_1, 0, CVT_Done },
1228
  // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_6
1229
  { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_6, 0, CVT_Done },
1230
  // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_15
1231
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_15, 0, CVT_Done },
1232
  // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_14
1233
  { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_14, 0, CVT_Done },
1234
  // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_7
1235
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_7, 0, CVT_Done },
1236
  // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_10
1237
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_10, 0, CVT_Done },
1238
  // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_5
1239
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_5, 0, CVT_Done },
1240
  // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_12
1241
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_12, 0, CVT_Done },
1242
  // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_3
1243
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_3, 0, CVT_Done },
1244
  // Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_14
1245
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_14, 0, CVT_Done },
1246
  // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_15
1247
  { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_15, 0, CVT_Done },
1248
  // Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_7
1249
  { CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_Tied, Tie0_3_3, CVT_imm_95_7, 0, CVT_Done },
1250
  // Convert__Reg1_0__regG0__Reg1_0
1251
  { CVT_95_Reg, 1, CVT_regG0, 0, CVT_95_Reg, 1, CVT_Done },
1252
  // Convert__Reg1_0__Reg1_0__regG0
1253
  { CVT_95_Reg, 1, CVT_95_Reg, 1, CVT_regG0, 0, CVT_Done },
1254
  // Convert__Reg1_1__Reg1_0__regG0
1255
  { CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_regG0, 0, CVT_Done },
1256
  // Convert__regG0__regG0__regG0
1257
  { CVT_regG0, 0, CVT_regG0, 0, CVT_regG0, 0, CVT_Done },
1258
  // Convert__imm_95_8
1259
  { CVT_imm_95_8, 0, CVT_Done },
1260
  // Convert__Reg1_1__Imm1_0
1261
  { CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
1262
  // Convert__Reg1_2__Reg1_0__Reg1_1__imm_95_0
1263
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_imm_95_0, 0, CVT_Done },
1264
  // Convert__Reg1_2__Reg1_0__Imm1_1__imm_95_0
1265
  { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_imm_95_0, 0, CVT_Done },
1266
  // Convert__MEMri2_2
1267
  { CVT_95_addMEMriOperands, 3, CVT_Done },
1268
  // Convert__MEMrr2_2
1269
  { CVT_95_addMEMrrOperands, 3, CVT_Done },
1270
  // Convert__MEMri2_2__Reg1_0
1271
  { CVT_95_addMEMriOperands, 3, CVT_95_Reg, 1, CVT_Done },
1272
  // Convert__MEMrr2_2__Reg1_0
1273
  { CVT_95_addMEMrrOperands, 3, CVT_95_Reg, 1, CVT_Done },
1274
  // Convert__MEMrr2_2__Reg1_0__Imm1_4
1275
  { CVT_95_addMEMrrOperands, 3, CVT_95_Reg, 1, CVT_95_addImmOperands, 5, CVT_Done },
1276
  // Convert__Reg1_3__MEMri2_1__Tie0_1_1
1277
  { CVT_95_Reg, 4, CVT_95_addMEMriOperands, 2, CVT_Tied, Tie0_1_1, CVT_Done },
1278
  // Convert__Reg1_3__MEMrr2_1__Tie0_1_1
1279
  { CVT_95_Reg, 4, CVT_95_addMEMrrOperands, 2, CVT_Tied, Tie0_1_1, CVT_Done },
1280
  // Convert__Reg1_4__MEMrr2_1__Imm1_3__Tie0_1_1
1281
  { CVT_95_Reg, 5, CVT_95_addMEMrrOperands, 2, CVT_95_addImmOperands, 4, CVT_Tied, Tie0_1_1, CVT_Done },
1282
  // Convert__regG0__Reg1_0__imm_95_8
1283
  { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_8, 0, CVT_Done },
1284
  // Convert__regG0__Imm1_0__imm_95_8
1285
  { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_8, 0, CVT_Done },
1286
  // Convert__regG0__Reg1_1__imm_95_8
1287
  { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_8, 0, CVT_Done },
1288
  // Convert__regG0__Imm1_1__imm_95_8
1289
  { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_8, 0, CVT_Done },
1290
  // Convert__Reg1_0__Reg1_2__imm_95_8
1291
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_8, 0, CVT_Done },
1292
  // Convert__Reg1_0__Imm1_2__imm_95_8
1293
  { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_8, 0, CVT_Done },
1294
  // Convert__Reg1_1__Reg1_3__imm_95_8
1295
  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_8, 0, CVT_Done },
1296
  // Convert__Reg1_1__Imm1_3__imm_95_8
1297
  { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_8, 0, CVT_Done },
1298
  // Convert__Reg1_1__Reg1_3__Imm1_0
1299
  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addImmOperands, 1, CVT_Done },
1300
  // Convert__Reg1_1__Imm1_3__Imm1_0
1301
  { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 1, CVT_Done },
1302
  // Convert__Reg1_2__Reg1_4__Imm1_0
1303
  { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addImmOperands, 1, CVT_Done },
1304
  // Convert__Reg1_2__Imm1_4__Imm1_0
1305
  { CVT_95_Reg, 3, CVT_95_addImmOperands, 5, CVT_95_addImmOperands, 1, CVT_Done },
1306
  // Convert__regG0__Reg1_0__imm_95_13
1307
  { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_13, 0, CVT_Done },
1308
  // Convert__regG0__Imm1_0__imm_95_13
1309
  { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_13, 0, CVT_Done },
1310
  // Convert__regG0__Reg1_1__imm_95_13
1311
  { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_13, 0, CVT_Done },
1312
  // Convert__regG0__Imm1_1__imm_95_13
1313
  { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_13, 0, CVT_Done },
1314
  // Convert__Reg1_0__Reg1_2__imm_95_13
1315
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_13, 0, CVT_Done },
1316
  // Convert__Reg1_0__Imm1_2__imm_95_13
1317
  { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_13, 0, CVT_Done },
1318
  // Convert__Reg1_1__Reg1_3__imm_95_13
1319
  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_13, 0, CVT_Done },
1320
  // Convert__Reg1_1__Imm1_3__imm_95_13
1321
  { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_13, 0, CVT_Done },
1322
  // Convert__regG0__Reg1_0__imm_95_5
1323
  { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_5, 0, CVT_Done },
1324
  // Convert__regG0__Imm1_0__imm_95_5
1325
  { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_5, 0, CVT_Done },
1326
  // Convert__regG0__Reg1_1__imm_95_5
1327
  { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_5, 0, CVT_Done },
1328
  // Convert__regG0__Imm1_1__imm_95_5
1329
  { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_5, 0, CVT_Done },
1330
  // Convert__Reg1_0__Reg1_2__imm_95_5
1331
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_5, 0, CVT_Done },
1332
  // Convert__Reg1_0__Imm1_2__imm_95_5
1333
  { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_5, 0, CVT_Done },
1334
  // Convert__Reg1_1__Reg1_3__imm_95_5
1335
  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_5, 0, CVT_Done },
1336
  // Convert__Reg1_1__Imm1_3__imm_95_5
1337
  { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_5, 0, CVT_Done },
1338
  // Convert__regG0__Reg1_0__imm_95_1
1339
  { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_1, 0, CVT_Done },
1340
  // Convert__regG0__Imm1_0__imm_95_1
1341
  { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_1, 0, CVT_Done },
1342
  // Convert__regG0__Reg1_1__imm_95_1
1343
  { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_1, 0, CVT_Done },
1344
  // Convert__regG0__Imm1_1__imm_95_1
1345
  { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_1, 0, CVT_Done },
1346
  // Convert__Reg1_0__Reg1_2__imm_95_1
1347
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_1, 0, CVT_Done },
1348
  // Convert__Reg1_0__Imm1_2__imm_95_1
1349
  { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_1, 0, CVT_Done },
1350
  // Convert__Reg1_1__Reg1_3__imm_95_1
1351
  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_1, 0, CVT_Done },
1352
  // Convert__Reg1_1__Imm1_3__imm_95_1
1353
  { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_1, 0, CVT_Done },
1354
  // Convert__regG0__Reg1_0__imm_95_10
1355
  { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_10, 0, CVT_Done },
1356
  // Convert__regG0__Imm1_0__imm_95_10
1357
  { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_10, 0, CVT_Done },
1358
  // Convert__regG0__Reg1_1__imm_95_10
1359
  { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_10, 0, CVT_Done },
1360
  // Convert__regG0__Imm1_1__imm_95_10
1361
  { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_10, 0, CVT_Done },
1362
  // Convert__Reg1_0__Reg1_2__imm_95_10
1363
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_10, 0, CVT_Done },
1364
  // Convert__Reg1_0__Imm1_2__imm_95_10
1365
  { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_10, 0, CVT_Done },
1366
  // Convert__Reg1_1__Reg1_3__imm_95_10
1367
  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_10, 0, CVT_Done },
1368
  // Convert__Reg1_1__Imm1_3__imm_95_10
1369
  { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_10, 0, CVT_Done },
1370
  // Convert__regG0__Reg1_0__imm_95_11
1371
  { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_11, 0, CVT_Done },
1372
  // Convert__regG0__Imm1_0__imm_95_11
1373
  { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_11, 0, CVT_Done },
1374
  // Convert__regG0__Reg1_1__imm_95_11
1375
  { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_11, 0, CVT_Done },
1376
  // Convert__regG0__Imm1_1__imm_95_11
1377
  { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_11, 0, CVT_Done },
1378
  // Convert__Reg1_0__Reg1_2__imm_95_11
1379
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_11, 0, CVT_Done },
1380
  // Convert__Reg1_0__Imm1_2__imm_95_11
1381
  { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_11, 0, CVT_Done },
1382
  // Convert__Reg1_1__Reg1_3__imm_95_11
1383
  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_11, 0, CVT_Done },
1384
  // Convert__Reg1_1__Imm1_3__imm_95_11
1385
  { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_11, 0, CVT_Done },
1386
  // Convert__regG0__Reg1_0__imm_95_12
1387
  { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_12, 0, CVT_Done },
1388
  // Convert__regG0__Imm1_0__imm_95_12
1389
  { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_12, 0, CVT_Done },
1390
  // Convert__regG0__Reg1_1__imm_95_12
1391
  { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_12, 0, CVT_Done },
1392
  // Convert__regG0__Imm1_1__imm_95_12
1393
  { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_12, 0, CVT_Done },
1394
  // Convert__Reg1_0__Reg1_2__imm_95_12
1395
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_12, 0, CVT_Done },
1396
  // Convert__Reg1_0__Imm1_2__imm_95_12
1397
  { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_12, 0, CVT_Done },
1398
  // Convert__Reg1_1__Reg1_3__imm_95_12
1399
  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_12, 0, CVT_Done },
1400
  // Convert__Reg1_1__Imm1_3__imm_95_12
1401
  { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_12, 0, CVT_Done },
1402
  // Convert__regG0__Reg1_0__imm_95_3
1403
  { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_3, 0, CVT_Done },
1404
  // Convert__regG0__Imm1_0__imm_95_3
1405
  { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_3, 0, CVT_Done },
1406
  // Convert__regG0__Reg1_1__imm_95_3
1407
  { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_3, 0, CVT_Done },
1408
  // Convert__regG0__Imm1_1__imm_95_3
1409
  { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_3, 0, CVT_Done },
1410
  // Convert__Reg1_0__Reg1_2__imm_95_3
1411
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_3, 0, CVT_Done },
1412
  // Convert__Reg1_0__Imm1_2__imm_95_3
1413
  { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_3, 0, CVT_Done },
1414
  // Convert__Reg1_1__Reg1_3__imm_95_3
1415
  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_3, 0, CVT_Done },
1416
  // Convert__Reg1_1__Imm1_3__imm_95_3
1417
  { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_3, 0, CVT_Done },
1418
  // Convert__regG0__Reg1_0__imm_95_2
1419
  { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_2, 0, CVT_Done },
1420
  // Convert__regG0__Imm1_0__imm_95_2
1421
  { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_2, 0, CVT_Done },
1422
  // Convert__regG0__Reg1_1__imm_95_2
1423
  { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_2, 0, CVT_Done },
1424
  // Convert__regG0__Imm1_1__imm_95_2
1425
  { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_2, 0, CVT_Done },
1426
  // Convert__Reg1_0__Reg1_2__imm_95_2
1427
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_2, 0, CVT_Done },
1428
  // Convert__Reg1_0__Imm1_2__imm_95_2
1429
  { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_2, 0, CVT_Done },
1430
  // Convert__Reg1_1__Reg1_3__imm_95_2
1431
  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_2, 0, CVT_Done },
1432
  // Convert__Reg1_1__Imm1_3__imm_95_2
1433
  { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_2, 0, CVT_Done },
1434
  // Convert__regG0__Reg1_0__imm_95_4
1435
  { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_4, 0, CVT_Done },
1436
  // Convert__regG0__Imm1_0__imm_95_4
1437
  { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_4, 0, CVT_Done },
1438
  // Convert__regG0__Reg1_1__imm_95_4
1439
  { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_4, 0, CVT_Done },
1440
  // Convert__regG0__Imm1_1__imm_95_4
1441
  { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_4, 0, CVT_Done },
1442
  // Convert__Reg1_0__Reg1_2__imm_95_4
1443
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_4, 0, CVT_Done },
1444
  // Convert__Reg1_0__Imm1_2__imm_95_4
1445
  { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_4, 0, CVT_Done },
1446
  // Convert__Reg1_1__Reg1_3__imm_95_4
1447
  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_4, 0, CVT_Done },
1448
  // Convert__Reg1_1__Imm1_3__imm_95_4
1449
  { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_4, 0, CVT_Done },
1450
  // Convert__regG0__Reg1_0__imm_95_0
1451
  { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_0, 0, CVT_Done },
1452
  // Convert__regG0__Imm1_0__imm_95_0
1453
  { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_0, 0, CVT_Done },
1454
  // Convert__regG0__Reg1_1__imm_95_0
1455
  { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_0, 0, CVT_Done },
1456
  // Convert__regG0__Imm1_1__imm_95_0
1457
  { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_0, 0, CVT_Done },
1458
  // Convert__Reg1_0__Reg1_2__imm_95_0
1459
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_0, 0, CVT_Done },
1460
  // Convert__Reg1_0__Imm1_2__imm_95_0
1461
  { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_0, 0, CVT_Done },
1462
  // Convert__Reg1_1__Reg1_3__imm_95_0
1463
  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_0, 0, CVT_Done },
1464
  // Convert__Reg1_1__Imm1_3__imm_95_0
1465
  { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_0, 0, CVT_Done },
1466
  // Convert__regG0__Reg1_0__imm_95_9
1467
  { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_9, 0, CVT_Done },
1468
  // Convert__regG0__Imm1_0__imm_95_9
1469
  { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_9, 0, CVT_Done },
1470
  // Convert__regG0__Reg1_1__imm_95_9
1471
  { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_9, 0, CVT_Done },
1472
  // Convert__regG0__Imm1_1__imm_95_9
1473
  { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_9, 0, CVT_Done },
1474
  // Convert__Reg1_0__Reg1_2__imm_95_9
1475
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_9, 0, CVT_Done },
1476
  // Convert__Reg1_0__Imm1_2__imm_95_9
1477
  { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_9, 0, CVT_Done },
1478
  // Convert__Reg1_1__Reg1_3__imm_95_9
1479
  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_9, 0, CVT_Done },
1480
  // Convert__Reg1_1__Imm1_3__imm_95_9
1481
  { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_9, 0, CVT_Done },
1482
  // Convert__regG0__Reg1_0__imm_95_6
1483
  { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_6, 0, CVT_Done },
1484
  // Convert__regG0__Imm1_0__imm_95_6
1485
  { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_6, 0, CVT_Done },
1486
  // Convert__regG0__Reg1_1__imm_95_6
1487
  { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_6, 0, CVT_Done },
1488
  // Convert__regG0__Imm1_1__imm_95_6
1489
  { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_6, 0, CVT_Done },
1490
  // Convert__Reg1_0__Reg1_2__imm_95_6
1491
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_6, 0, CVT_Done },
1492
  // Convert__Reg1_0__Imm1_2__imm_95_6
1493
  { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_6, 0, CVT_Done },
1494
  // Convert__Reg1_1__Reg1_3__imm_95_6
1495
  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_6, 0, CVT_Done },
1496
  // Convert__Reg1_1__Imm1_3__imm_95_6
1497
  { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_6, 0, CVT_Done },
1498
  // Convert__regG0__Reg1_0__imm_95_14
1499
  { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_14, 0, CVT_Done },
1500
  // Convert__regG0__Imm1_0__imm_95_14
1501
  { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_14, 0, CVT_Done },
1502
  // Convert__regG0__Reg1_1__imm_95_14
1503
  { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_14, 0, CVT_Done },
1504
  // Convert__regG0__Imm1_1__imm_95_14
1505
  { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_14, 0, CVT_Done },
1506
  // Convert__Reg1_0__Reg1_2__imm_95_14
1507
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_14, 0, CVT_Done },
1508
  // Convert__Reg1_0__Imm1_2__imm_95_14
1509
  { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_14, 0, CVT_Done },
1510
  // Convert__Reg1_1__Reg1_3__imm_95_14
1511
  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_14, 0, CVT_Done },
1512
  // Convert__Reg1_1__Imm1_3__imm_95_14
1513
  { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_14, 0, CVT_Done },
1514
  // Convert__regG0__Reg1_0__regG0
1515
  { CVT_regG0, 0, CVT_95_Reg, 1, CVT_regG0, 0, CVT_Done },
1516
  // Convert__regG0__Reg1_0__imm_95_15
1517
  { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_15, 0, CVT_Done },
1518
  // Convert__regG0__Imm1_0__imm_95_15
1519
  { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_15, 0, CVT_Done },
1520
  // Convert__regG0__Reg1_1__imm_95_15
1521
  { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_15, 0, CVT_Done },
1522
  // Convert__regG0__Imm1_1__imm_95_15
1523
  { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_15, 0, CVT_Done },
1524
  // Convert__Reg1_0__Reg1_2__imm_95_15
1525
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_15, 0, CVT_Done },
1526
  // Convert__Reg1_0__Imm1_2__imm_95_15
1527
  { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_15, 0, CVT_Done },
1528
  // Convert__Reg1_1__Reg1_3__imm_95_15
1529
  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_15, 0, CVT_Done },
1530
  // Convert__Reg1_1__Imm1_3__imm_95_15
1531
  { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_15, 0, CVT_Done },
1532
  // Convert__regG0__Reg1_0__imm_95_7
1533
  { CVT_regG0, 0, CVT_95_Reg, 1, CVT_imm_95_7, 0, CVT_Done },
1534
  // Convert__regG0__Imm1_0__imm_95_7
1535
  { CVT_regG0, 0, CVT_95_addImmOperands, 1, CVT_imm_95_7, 0, CVT_Done },
1536
  // Convert__regG0__Reg1_1__imm_95_7
1537
  { CVT_regG0, 0, CVT_95_Reg, 2, CVT_imm_95_7, 0, CVT_Done },
1538
  // Convert__regG0__Imm1_1__imm_95_7
1539
  { CVT_regG0, 0, CVT_95_addImmOperands, 2, CVT_imm_95_7, 0, CVT_Done },
1540
  // Convert__Reg1_0__Reg1_2__imm_95_7
1541
  { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_imm_95_7, 0, CVT_Done },
1542
  // Convert__Reg1_0__Imm1_2__imm_95_7
1543
  { CVT_95_Reg, 1, CVT_95_addImmOperands, 3, CVT_imm_95_7, 0, CVT_Done },
1544
  // Convert__Reg1_1__Reg1_3__imm_95_7
1545
  { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_imm_95_7, 0, CVT_Done },
1546
  // Convert__Reg1_1__Imm1_3__imm_95_7
1547
  { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_imm_95_7, 0, CVT_Done },
1548
  // Convert__imm_95_0
1549
  { CVT_imm_95_0, 0, CVT_Done },
1550
};
1551
1552
void SparcAsmParser::
1553
convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode,
1554
1.78k
                const OperandVector &Operands) {
1555
1.78k
  assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!");
1556
1.78k
  const uint8_t *Converter = ConversionTable[Kind];
1557
1.78k
  unsigned OpIdx;
1558
1.78k
  Inst.setOpcode(Opcode);
1559
6.32k
  for (const uint8_t *p = Converter; *p; 
p+= 24.53k
) {
1560
4.53k
    OpIdx = *(p + 1);
1561
4.53k
    switch (*p) {
1562
4.53k
    
default: 0
llvm_unreachable0
("invalid conversion entry!");
1563
4.53k
    case CVT_Reg:
1564
0
      static_cast<SparcOperand&>(*Operands[OpIdx]).addRegOperands(Inst, 1);
1565
0
      break;
1566
4.53k
    case CVT_Tied: {
1567
105
      assert(OpIdx < (size_t)(std::end(TiedAsmOperandTable) -
1568
105
                          std::begin(TiedAsmOperandTable)) &&
1569
105
             "Tied operand not found");
1570
105
      unsigned TiedResOpnd = TiedAsmOperandTable[OpIdx][0];
1571
105
      if (TiedResOpnd != (uint8_t) -1)
1572
105
        Inst.addOperand(Inst.getOperand(TiedResOpnd));
1573
105
      break;
1574
4.53k
    }
1575
4.53k
    case CVT_95_Reg:
1576
2.07k
      static_cast<SparcOperand&>(*Operands[OpIdx]).addRegOperands(Inst, 1);
1577
2.07k
      break;
1578
4.53k
    case CVT_95_addImmOperands:
1579
996
      static_cast<SparcOperand&>(*Operands[OpIdx]).addImmOperands(Inst, 1);
1580
996
      break;
1581
4.53k
    case CVT_imm_95_8:
1582
42
      Inst.addOperand(MCOperand::createImm(8));
1583
42
      break;
1584
4.53k
    case CVT_imm_95_13:
1585
51
      Inst.addOperand(MCOperand::createImm(13));
1586
51
      break;
1587
4.53k
    case CVT_imm_95_5:
1588
52
      Inst.addOperand(MCOperand::createImm(5));
1589
52
      break;
1590
4.53k
    case CVT_imm_95_1:
1591
75
      Inst.addOperand(MCOperand::createImm(1));
1592
75
      break;
1593
4.53k
    case CVT_imm_95_10:
1594
50
      Inst.addOperand(MCOperand::createImm(10));
1595
50
      break;
1596
4.53k
    case CVT_imm_95_11:
1597
49
      Inst.addOperand(MCOperand::createImm(11));
1598
49
      break;
1599
4.53k
    case CVT_imm_95_12:
1600
49
      Inst.addOperand(MCOperand::createImm(12));
1601
49
      break;
1602
4.53k
    case CVT_imm_95_3:
1603
49
      Inst.addOperand(MCOperand::createImm(3));
1604
49
      break;
1605
4.53k
    case CVT_imm_95_2:
1606
49
      Inst.addOperand(MCOperand::createImm(2));
1607
49
      break;
1608
4.53k
    case CVT_imm_95_4:
1609
50
      Inst.addOperand(MCOperand::createImm(4));
1610
50
      break;
1611
4.53k
    case CVT_imm_95_0:
1612
35
      Inst.addOperand(MCOperand::createImm(0));
1613
35
      break;
1614
4.53k
    case CVT_imm_95_9:
1615
56
      Inst.addOperand(MCOperand::createImm(9));
1616
56
      break;
1617
4.53k
    case CVT_imm_95_6:
1618
48
      Inst.addOperand(MCOperand::createImm(6));
1619
48
      break;
1620
4.53k
    case CVT_imm_95_14:
1621
49
      Inst.addOperand(MCOperand::createImm(14));
1622
49
      break;
1623
4.53k
    case CVT_regG0:
1624
291
      Inst.addOperand(MCOperand::createReg(SP::G0));
1625
291
      break;
1626
4.53k
    case CVT_imm_95_15:
1627
49
      Inst.addOperand(MCOperand::createImm(15));
1628
49
      break;
1629
4.53k
    case CVT_imm_95_7:
1630
49
      Inst.addOperand(MCOperand::createImm(7));
1631
49
      break;
1632
4.53k
    case CVT_regO7:
1633
10
      Inst.addOperand(MCOperand::createReg(SP::O7));
1634
10
      break;
1635
4.53k
    case CVT_95_addMEMriOperands:
1636
60
      static_cast<SparcOperand&>(*Operands[OpIdx]).addMEMriOperands(Inst, 2);
1637
60
      break;
1638
4.53k
    case CVT_95_addMEMrrOperands:
1639
186
      static_cast<SparcOperand&>(*Operands[OpIdx]).addMEMrrOperands(Inst, 2);
1640
186
      break;
1641
4.53k
    case CVT_regFCC0:
1642
12
      Inst.addOperand(MCOperand::createReg(SP::FCC0));
1643
12
      break;
1644
4.53k
    }
1645
4.53k
  }
1646
1.78k
}
1647
1648
void SparcAsmParser::
1649
convertToMapAndConstraints(unsigned Kind,
1650
0
                           const OperandVector &Operands) {
1651
0
  assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!");
1652
0
  unsigned NumMCOperands = 0;
1653
0
  const uint8_t *Converter = ConversionTable[Kind];
1654
0
  for (const uint8_t *p = Converter; *p; p+= 2) {
1655
0
    switch (*p) {
1656
0
    default: llvm_unreachable("invalid conversion entry!");
1657
0
    case CVT_Reg:
1658
0
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
1659
0
      Operands[*(p + 1)]->setConstraint("r");
1660
0
      ++NumMCOperands;
1661
0
      break;
1662
0
    case CVT_Tied:
1663
0
      ++NumMCOperands;
1664
0
      break;
1665
0
    case CVT_95_Reg:
1666
0
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
1667
0
      Operands[*(p + 1)]->setConstraint("r");
1668
0
      NumMCOperands += 1;
1669
0
      break;
1670
0
    case CVT_95_addImmOperands:
1671
0
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
1672
0
      Operands[*(p + 1)]->setConstraint("m");
1673
0
      NumMCOperands += 1;
1674
0
      break;
1675
0
    case CVT_imm_95_8:
1676
0
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
1677
0
      Operands[*(p + 1)]->setConstraint("");
1678
0
      ++NumMCOperands;
1679
0
      break;
1680
0
    case CVT_imm_95_13:
1681
0
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
1682
0
      Operands[*(p + 1)]->setConstraint("");
1683
0
      ++NumMCOperands;
1684
0
      break;
1685
0
    case CVT_imm_95_5:
1686
0
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
1687
0
      Operands[*(p + 1)]->setConstraint("");
1688
0
      ++NumMCOperands;
1689
0
      break;
1690
0
    case CVT_imm_95_1:
1691
0
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
1692
0
      Operands[*(p + 1)]->setConstraint("");
1693
0
      ++NumMCOperands;
1694
0
      break;
1695
0
    case CVT_imm_95_10:
1696
0
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
1697
0
      Operands[*(p + 1)]->setConstraint("");
1698
0
      ++NumMCOperands;
1699
0
      break;
1700
0
    case CVT_imm_95_11:
1701
0
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
1702
0
      Operands[*(p + 1)]->setConstraint("");
1703
0
      ++NumMCOperands;
1704
0
      break;
1705
0
    case CVT_imm_95_12:
1706
0
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
1707
0
      Operands[*(p + 1)]->setConstraint("");
1708
0
      ++NumMCOperands;
1709
0
      break;
1710
0
    case CVT_imm_95_3:
1711
0
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
1712
0
      Operands[*(p + 1)]->setConstraint("");
1713
0
      ++NumMCOperands;
1714
0
      break;
1715
0
    case CVT_imm_95_2:
1716
0
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
1717
0
      Operands[*(p + 1)]->setConstraint("");
1718
0
      ++NumMCOperands;
1719
0
      break;
1720
0
    case CVT_imm_95_4:
1721
0
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
1722
0
      Operands[*(p + 1)]->setConstraint("");
1723
0
      ++NumMCOperands;
1724
0
      break;
1725
0
    case CVT_imm_95_0:
1726
0
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
1727
0
      Operands[*(p + 1)]->setConstraint("");
1728
0
      ++NumMCOperands;
1729
0
      break;
1730
0
    case CVT_imm_95_9:
1731
0
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
1732
0
      Operands[*(p + 1)]->setConstraint("");
1733
0
      ++NumMCOperands;
1734
0
      break;
1735
0
    case CVT_imm_95_6:
1736
0
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
1737
0
      Operands[*(p + 1)]->setConstraint("");
1738
0
      ++NumMCOperands;
1739
0
      break;
1740
0
    case CVT_imm_95_14:
1741
0
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
1742
0
      Operands[*(p + 1)]->setConstraint("");
1743
0
      ++NumMCOperands;
1744
0
      break;
1745
0
    case CVT_regG0:
1746
0
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
1747
0
      Operands[*(p + 1)]->setConstraint("m");
1748
0
      ++NumMCOperands;
1749
0
      break;
1750
0
    case CVT_imm_95_15:
1751
0
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
1752
0
      Operands[*(p + 1)]->setConstraint("");
1753
0
      ++NumMCOperands;
1754
0
      break;
1755
0
    case CVT_imm_95_7:
1756
0
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
1757
0
      Operands[*(p + 1)]->setConstraint("");
1758
0
      ++NumMCOperands;
1759
0
      break;
1760
0
    case CVT_regO7:
1761
0
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
1762
0
      Operands[*(p + 1)]->setConstraint("m");
1763
0
      ++NumMCOperands;
1764
0
      break;
1765
0
    case CVT_95_addMEMriOperands:
1766
0
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
1767
0
      Operands[*(p + 1)]->setConstraint("m");
1768
0
      NumMCOperands += 2;
1769
0
      break;
1770
0
    case CVT_95_addMEMrrOperands:
1771
0
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
1772
0
      Operands[*(p + 1)]->setConstraint("m");
1773
0
      NumMCOperands += 2;
1774
0
      break;
1775
0
    case CVT_regFCC0:
1776
0
      Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
1777
0
      Operands[*(p + 1)]->setConstraint("m");
1778
0
      ++NumMCOperands;
1779
0
      break;
1780
0
    }
1781
0
  }
1782
0
}
1783
1784
namespace {
1785
1786
/// MatchClassKind - The kinds of classes which participate in
1787
/// instruction matching.
1788
enum MatchClassKind {
1789
  InvalidMatchClass = 0,
1790
  OptionalMatchClass = 1,
1791
  MCK__PCT_cq, // '%cq'
1792
  MCK__PCT_csr, // '%csr'
1793
  MCK__PCT_fcc0, // '%fcc0'
1794
  MCK__PCT_fq, // '%fq'
1795
  MCK__PCT_fsr, // '%fsr'
1796
  MCK__PCT_g0, // '%g0'
1797
  MCK__PCT_icc, // '%icc'
1798
  MCK__PCT_psr, // '%psr'
1799
  MCK__PCT_tbr, // '%tbr'
1800
  MCK__PCT_wim, // '%wim'
1801
  MCK__PCT_xcc, // '%xcc'
1802
  MCK__43_, // '+'
1803
  MCK_1, // '1'
1804
  MCK_10, // '10'
1805
  MCK_3, // '3'
1806
  MCK_5, // '5'
1807
  MCK__91_, // '['
1808
  MCK__93_, // ']'
1809
  MCK_a, // 'a'
1810
  MCK_pn, // 'pn'
1811
  MCK_pt, // 'pt'
1812
  MCK_LAST_TOKEN = MCK_pt,
1813
  MCK_FCCRegs, // register class 'FCCRegs'
1814
  MCK_LowQFPRegs, // register class 'LowQFPRegs'
1815
  MCK_PRRegs, // register class 'PRRegs'
1816
  MCK_CoprocPair, // register class 'CoprocPair'
1817
  MCK_IntPair, // register class 'IntPair'
1818
  MCK_LowDFPRegs, // register class 'LowDFPRegs'
1819
  MCK_QFPRegs, // register class 'QFPRegs'
1820
  MCK_ASRRegs, // register class 'ASRRegs'
1821
  MCK_CoprocRegs, // register class 'CoprocRegs'
1822
  MCK_DFPRegs, // register class 'DFPRegs'
1823
  MCK_FPRegs, // register class 'FPRegs'
1824
  MCK_IntRegs, // register class 'IntRegs,I64Regs'
1825
  MCK_LAST_REGISTER = MCK_IntRegs,
1826
  MCK_Imm, // user defined class 'ImmAsmOperand'
1827
  MCK_MEMri, // user defined class 'SparcMEMriAsmOperand'
1828
  MCK_MEMrr, // user defined class 'SparcMEMrrAsmOperand'
1829
  NumMatchClassKinds
1830
};
1831
1832
}
1833
1834
2.05k
static unsigned getDiagKindFromRegisterClass(MatchClassKind RegisterClass) {
1835
2.05k
  return MCTargetAsmParser::Match_InvalidOperand;
1836
2.05k
}
1837
1838
4.15k
static MatchClassKind matchTokenString(StringRef Name) {
1839
4.15k
  switch (Name.size()) {
1840
4.15k
  
default: break0
;
1841
4.15k
  case 1:  // 7 strings to match.
1842
2.21k
    switch (Name[0]) {
1843
2.21k
    
default: break0
;
1844
2.21k
    case '+':  // 1 string to match.
1845
144
      return MCK__43_;  // "+"
1846
2.21k
    case '1':  // 1 string to match.
1847
0
      return MCK_1;  // "1"
1848
2.21k
    case '3':  // 1 string to match.
1849
0
      return MCK_3;  // "3"
1850
2.21k
    case '5':  // 1 string to match.
1851
0
      return MCK_5;  // "5"
1852
2.21k
    case '[':  // 1 string to match.
1853
630
      return MCK__91_;  // "["
1854
2.21k
    case ']':  // 1 string to match.
1855
371
      return MCK__93_;  // "]"
1856
2.21k
    case 'a':  // 1 string to match.
1857
1.07k
      return MCK_a;  // "a"
1858
0
    }
1859
0
    break;
1860
795
  case 2:  // 3 strings to match.
1861
795
    switch (Name[0]) {
1862
795
    
default: break0
;
1863
795
    case '1':  // 1 string to match.
1864
0
      if (Name[1] != '0')
1865
0
        break;
1866
0
      return MCK_10;   // "10"
1867
795
    case 'p':  // 2 strings to match.
1868
795
      switch (Name[1]) {
1869
795
      
default: break0
;
1870
795
      case 'n':  // 1 string to match.
1871
343
        return MCK_pn;  // "pn"
1872
795
      case 't':  // 1 string to match.
1873
452
        return MCK_pt;  // "pt"
1874
0
      }
1875
0
      break;
1876
0
    }
1877
0
    break;
1878
24
  case 3:  // 3 strings to match.
1879
24
    if (Name[0] != '%')
1880
0
      break;
1881
24
    switch (Name[1]) {
1882
24
    
default: break0
;
1883
24
    case 'c':  // 1 string to match.
1884
5
      if (Name[2] != 'q')
1885
0
        break;
1886
5
      return MCK__PCT_cq;  // "%cq"
1887
19
    case 'f':  // 1 string to match.
1888
19
      if (Name[2] != 'q')
1889
0
        break;
1890
19
      return MCK__PCT_fq;  // "%fq"
1891
19
    case 'g':  // 1 string to match.
1892
0
      if (Name[2] != '0')
1893
0
        break;
1894
0
      return MCK__PCT_g0;  // "%g0"
1895
0
    }
1896
0
    break;
1897
1.12k
  case 4:  // 7 strings to match.
1898
1.12k
    if (Name[0] != '%')
1899
0
      break;
1900
1.12k
    switch (Name[1]) {
1901
1.12k
    
default: break0
;
1902
1.12k
    case 'c':  // 1 string to match.
1903
8
      if (memcmp(Name.data()+2, "sr", 2) != 0)
1904
0
        break;
1905
8
      return MCK__PCT_csr;   // "%csr"
1906
33
    case 'f':  // 1 string to match.
1907
33
      if (memcmp(Name.data()+2, "sr", 2) != 0)
1908
0
        break;
1909
33
      return MCK__PCT_fsr;   // "%fsr"
1910
333
    case 'i':  // 1 string to match.
1911
333
      if (memcmp(Name.data()+2, "cc", 2) != 0)
1912
0
        break;
1913
333
      return MCK__PCT_icc;   // "%icc"
1914
333
    case 'p':  // 1 string to match.
1915
27
      if (memcmp(Name.data()+2, "sr", 2) != 0)
1916
0
        break;
1917
27
      return MCK__PCT_psr;   // "%psr"
1918
48
    case 't':  // 1 string to match.
1919
48
      if (memcmp(Name.data()+2, "br", 2) != 0)
1920
0
        break;
1921
48
      return MCK__PCT_tbr;   // "%tbr"
1922
72
    case 'w':  // 1 string to match.
1923
72
      if (memcmp(Name.data()+2, "im", 2) != 0)
1924
0
        break;
1925
72
      return MCK__PCT_wim;   // "%wim"
1926
602
    case 'x':  // 1 string to match.
1927
602
      if (memcmp(Name.data()+2, "cc", 2) != 0)
1928
0
        break;
1929
602
      return MCK__PCT_xcc;  // "%xcc"
1930
0
    }
1931
0
    break;
1932
0
  case 5:  // 1 string to match.
1933
0
    if (memcmp(Name.data()+0, "%fcc0", 5) != 0)
1934
0
      break;
1935
0
    return MCK__PCT_fcc0;  // "%fcc0"
1936
0
  }
1937
0
  return InvalidMatchClass;
1938
0
}
1939
1940
/// isSubclass - Compute whether \p A is a subclass of \p B.
1941
12.5k
static bool isSubclass(MatchClassKind A, MatchClassKind B) {
1942
12.5k
  if (A == B)
1943
5.21k
    return true;
1944
7.35k
1945
7.35k
  switch (A) {
1946
7.35k
  default:
1947
7.35k
    return false;
1948
7.35k
1949
7.35k
  case MCK_LowQFPRegs:
1950
0
    return B == MCK_QFPRegs;
1951
7.35k
1952
7.35k
  case MCK_LowDFPRegs:
1953
0
    return B == MCK_DFPRegs;
1954
7.35k
  }
1955
7.35k
}
1956
1957
11.5k
static unsigned validateOperandClass(MCParsedAsmOperand &GOp, MatchClassKind Kind) {
1958
11.5k
  SparcOperand &Operand = (SparcOperand&)GOp;
1959
11.5k
  if (Kind == InvalidMatchClass)
1960
170
    return MCTargetAsmParser::Match_InvalidOperand;
1961
11.3k
1962
11.3k
  if (Operand.isToken() && 
Kind <= MCK_LAST_TOKEN5.12k
)
1963
4.15k
    return isSubclass(matchTokenString(Operand.getToken()), Kind) ?
1964
2.60k
             MCTargetAsmParser::Match_Success :
1965
4.15k
             
MCTargetAsmParser::Match_InvalidOperand1.55k
;
1966
7.23k
1967
7.23k
  switch (Kind) {
1968
7.23k
  
default: break4.58k
;
1969
7.23k
  // 'Imm' class
1970
7.23k
  case MCK_Imm: {
1971
1.96k
    DiagnosticPredicate DP(Operand.isImm());
1972
1.96k
    if (DP.isMatch())
1973
1.15k
      return MCTargetAsmParser::Match_Success;
1974
807
    break;
1975
807
    }
1976
807
  // 'MEMri' class
1977
807
  case MCK_MEMri: {
1978
368
    DiagnosticPredicate DP(Operand.isMEMri());
1979
368
    if (DP.isMatch())
1980
83
      return MCTargetAsmParser::Match_Success;
1981
285
    break;
1982
285
    }
1983
285
  // 'MEMrr' class
1984
319
  case MCK_MEMrr: {
1985
319
    DiagnosticPredicate DP(Operand.isMEMrr());
1986
319
    if (DP.isMatch())
1987
303
      return MCTargetAsmParser::Match_Success;
1988
16
    break;
1989
16
    }
1990
5.69k
  } // end switch (Kind)
1991
5.69k
1992
5.69k
  if (Operand.isReg()) {
1993
3.74k
    MatchClassKind OpKind;
1994
3.74k
    switch (Operand.getReg()) {
1995
3.74k
    
default: OpKind = InvalidMatchClass; break0
;
1996
3.74k
    
case SP::FCC0: OpKind = MCK_FCCRegs; break203
;
1997
3.74k
    
case SP::FCC1: OpKind = MCK_FCCRegs; break1
;
1998
3.74k
    
case SP::FCC2: OpKind = MCK_FCCRegs; break15
;
1999
3.74k
    
case SP::FCC3: OpKind = MCK_FCCRegs; break8
;
2000
3.74k
    
case SP::Y: OpKind = MCK_ASRRegs; break96
;
2001
3.74k
    
case SP::ASR1: OpKind = MCK_ASRRegs; break24
;
2002
3.74k
    
case SP::ASR2: OpKind = MCK_ASRRegs; break0
;
2003
3.74k
    
case SP::ASR3: OpKind = MCK_ASRRegs; break0
;
2004
3.74k
    
case SP::ASR4: OpKind = MCK_ASRRegs; break0
;
2005
3.74k
    
case SP::ASR5: OpKind = MCK_ASRRegs; break0
;
2006
3.74k
    
case SP::ASR6: OpKind = MCK_ASRRegs; break16
;
2007
3.74k
    
case SP::ASR7: OpKind = MCK_ASRRegs; break0
;
2008
3.74k
    
case SP::ASR8: OpKind = MCK_ASRRegs; break0
;
2009
3.74k
    
case SP::ASR9: OpKind = MCK_ASRRegs; break0
;
2010
3.74k
    
case SP::ASR10: OpKind = MCK_ASRRegs; break0
;
2011
3.74k
    
case SP::ASR11: OpKind = MCK_ASRRegs; break0
;
2012
3.74k
    
case SP::ASR12: OpKind = MCK_ASRRegs; break0
;
2013
3.74k
    
case SP::ASR13: OpKind = MCK_ASRRegs; break0
;
2014
3.74k
    
case SP::ASR14: OpKind = MCK_ASRRegs; break0
;
2015
3.74k
    
case SP::ASR15: OpKind = MCK_ASRRegs; break80
;
2016
3.74k
    
case SP::ASR16: OpKind = MCK_ASRRegs; break0
;
2017
3.74k
    
case SP::ASR17: OpKind = MCK_ASRRegs; break0
;
2018
3.74k
    
case SP::ASR18: OpKind = MCK_ASRRegs; break0
;
2019
3.74k
    
case SP::ASR19: OpKind = MCK_ASRRegs; break0
;
2020
3.74k
    
case SP::ASR20: OpKind = MCK_ASRRegs; break0
;
2021
3.74k
    
case SP::ASR21: OpKind = MCK_ASRRegs; break0
;
2022
3.74k
    
case SP::ASR22: OpKind = MCK_ASRRegs; break0
;
2023
3.74k
    
case SP::ASR23: OpKind = MCK_ASRRegs; break0
;
2024
3.74k
    
case SP::ASR24: OpKind = MCK_ASRRegs; break0
;
2025
3.74k
    
case SP::ASR25: OpKind = MCK_ASRRegs; break0
;
2026
3.74k
    
case SP::ASR26: OpKind = MCK_ASRRegs; break0
;
2027
3.74k
    
case SP::ASR27: OpKind = MCK_ASRRegs; break0
;
2028
3.74k
    
case SP::ASR28: OpKind = MCK_ASRRegs; break0
;
2029
3.74k
    
case SP::ASR29: OpKind = MCK_ASRRegs; break0
;
2030
3.74k
    
case SP::ASR30: OpKind = MCK_ASRRegs; break0
;
2031
3.74k
    
case SP::ASR31: OpKind = MCK_ASRRegs; break0
;
2032
3.74k
    
case SP::TPC: OpKind = MCK_PRRegs; break6
;
2033
3.74k
    
case SP::TNPC: OpKind = MCK_PRRegs; break6
;
2034
3.74k
    
case SP::TSTATE: OpKind = MCK_PRRegs; break6
;
2035
3.74k
    
case SP::TT: OpKind = MCK_PRRegs; break6
;
2036
3.74k
    
case SP::TICK: OpKind = MCK_PRRegs; break6
;
2037
3.74k
    
case SP::TBA: OpKind = MCK_PRRegs; break6
;
2038
3.74k
    
case SP::PSTATE: OpKind = MCK_PRRegs; break6
;
2039
3.74k
    
case SP::TL: OpKind = MCK_PRRegs; break6
;
2040
3.74k
    
case SP::PIL: OpKind = MCK_PRRegs; break6
;
2041
3.74k
    
case SP::CWP: OpKind = MCK_PRRegs; break6
;
2042
3.74k
    
case SP::CANSAVE: OpKind = MCK_PRRegs; break6
;
2043
3.74k
    
case SP::CANRESTORE: OpKind = MCK_PRRegs; break6
;
2044
3.74k
    
case SP::CLEANWIN: OpKind = MCK_PRRegs; break6
;
2045
3.74k
    
case SP::OTHERWIN: OpKind = MCK_PRRegs; break6
;
2046
3.74k
    
case SP::WSTATE: OpKind = MCK_PRRegs; break6
;
2047
3.74k
    
case SP::G0: OpKind = MCK_IntRegs; break19
;
2048
3.74k
    
case SP::G1: OpKind = MCK_IntRegs; break547
;
2049
3.74k
    
case SP::G2: OpKind = MCK_IntRegs; break186
;
2050
3.74k
    
case SP::G3: OpKind = MCK_IntRegs; break120
;
2051
3.74k
    
case SP::G4: OpKind = MCK_IntRegs; break1
;
2052
3.74k
    
case SP::G5: OpKind = MCK_IntRegs; break0
;
2053
3.74k
    
case SP::G6: OpKind = MCK_IntRegs; break105
;
2054
3.74k
    
case SP::G7: OpKind = MCK_IntRegs; break18
;
2055
3.74k
    
case SP::O0: OpKind = MCK_IntRegs; break109
;
2056
3.74k
    
case SP::O1: OpKind = MCK_IntRegs; break64
;
2057
3.74k
    
case SP::O2: OpKind = MCK_IntRegs; break287
;
2058
3.74k
    
case SP::O3: OpKind = MCK_IntRegs; break0
;
2059
3.74k
    
case SP::O4: OpKind = MCK_IntRegs; break11
;
2060
3.74k
    
case SP::O5: OpKind = MCK_IntRegs; break0
;
2061
3.74k
    
case SP::O6: OpKind = MCK_IntRegs; break12
;
2062
3.74k
    
case SP::O7: OpKind = MCK_IntRegs; break4
;
2063
3.74k
    
case SP::L0: OpKind = MCK_IntRegs; break19
;
2064
3.74k
    
case SP::L1: OpKind = MCK_IntRegs; break0
;
2065
3.74k
    
case SP::L2: OpKind = MCK_IntRegs; break0
;
2066
3.74k
    
case SP::L3: OpKind = MCK_IntRegs; break0
;
2067
3.74k
    
case SP::L4: OpKind = MCK_IntRegs; break0
;
2068
3.74k
    
case SP::L5: OpKind = MCK_IntRegs; break0
;
2069
3.74k
    
case SP::L6: OpKind = MCK_IntRegs; break22
;
2070
3.74k
    
case SP::L7: OpKind = MCK_IntRegs; break1
;
2071
3.74k
    
case SP::I0: OpKind = MCK_IntRegs; break624
;
2072
3.74k
    
case SP::I1: OpKind = MCK_IntRegs; break116
;
2073
3.74k
    
case SP::I2: OpKind = MCK_IntRegs; break114
;
2074
3.74k
    
case SP::I3: OpKind = MCK_IntRegs; break8
;
2075
3.74k
    
case SP::I4: OpKind = MCK_IntRegs; break11
;
2076
3.74k
    
case SP::I5: OpKind = MCK_IntRegs; break358
;
2077
3.74k
    
case SP::I6: OpKind = MCK_IntRegs; break45
;
2078
3.74k
    
case SP::I7: OpKind = MCK_IntRegs; break0
;
2079
3.74k
    
case SP::F0: OpKind = MCK_FPRegs; break70
;
2080
3.74k
    
case SP::F1: OpKind = MCK_FPRegs; break44
;
2081
3.74k
    
case SP::F2: OpKind = MCK_FPRegs; break53
;
2082
3.74k
    
case SP::F3: OpKind = MCK_FPRegs; break6
;
2083
3.74k
    
case SP::F4: OpKind = MCK_FPRegs; break63
;
2084
3.74k
    
case SP::F5: OpKind = MCK_FPRegs; break0
;
2085
3.74k
    
case SP::F6: OpKind = MCK_FPRegs; break0
;
2086
3.74k
    
case SP::F7: OpKind = MCK_FPRegs; break0
;
2087
3.74k
    
case SP::F8: OpKind = MCK_FPRegs; break14
;
2088
3.74k
    
case SP::F9: OpKind = MCK_FPRegs; break0
;
2089
3.74k
    
case SP::F10: OpKind = MCK_FPRegs; break0
;
2090
3.74k
    
case SP::F11: OpKind = MCK_FPRegs; break0
;
2091
3.74k
    
case SP::F12: OpKind = MCK_FPRegs; break0
;
2092
3.74k
    
case SP::F13: OpKind = MCK_FPRegs; break0
;
2093
3.74k
    
case SP::F14: OpKind = MCK_FPRegs; break0
;
2094
3.74k
    
case SP::F15: OpKind = MCK_FPRegs; break0
;
2095
3.74k
    
case SP::F16: OpKind = MCK_FPRegs; break0
;
2096
3.74k
    
case SP::F17: OpKind = MCK_FPRegs; break0
;
2097
3.74k
    
case SP::F18: OpKind = MCK_FPRegs; break0
;
2098
3.74k
    
case SP::F19: OpKind = MCK_FPRegs; break0
;
2099
3.74k
    
case SP::F20: OpKind = MCK_FPRegs; break12
;
2100
3.74k
    
case SP::F21: OpKind = MCK_FPRegs; break0
;
2101
3.74k
    
case SP::F22: OpKind = MCK_FPRegs; break0
;
2102
3.74k
    
case SP::F23: OpKind = MCK_FPRegs; break0
;
2103
3.74k
    
case SP::F24: OpKind = MCK_FPRegs; break0
;
2104
3.74k
    
case SP::F25: OpKind = MCK_FPRegs; break0
;
2105
3.74k
    
case SP::F26: OpKind = MCK_FPRegs; break0
;
2106
3.74k
    
case SP::F27: OpKind = MCK_FPRegs; break0
;
2107
3.74k
    
case SP::F28: OpKind = MCK_FPRegs; break0
;
2108
3.74k
    
case SP::F29: OpKind = MCK_FPRegs; break18
;
2109
3.74k
    
case SP::F30: OpKind = MCK_FPRegs; break0
;
2110
3.74k
    
case SP::F31: OpKind = MCK_FPRegs; break1
;
2111
3.74k
    
case SP::D0: OpKind = MCK_LowDFPRegs; break0
;
2112
3.74k
    
case SP::D1: OpKind = MCK_LowDFPRegs; break0
;
2113
3.74k
    
case SP::D2: OpKind = MCK_LowDFPRegs; break0
;
2114
3.74k
    
case SP::D3: OpKind = MCK_LowDFPRegs; break0
;
2115
3.74k
    
case SP::D4: OpKind = MCK_LowDFPRegs; break0
;
2116
3.74k
    
case SP::D5: OpKind = MCK_LowDFPRegs; break0
;
2117
3.74k
    
case SP::D6: OpKind = MCK_LowDFPRegs; break0
;
2118
3.74k
    
case SP::D7: OpKind = MCK_LowDFPRegs; break0
;
2119
3.74k
    
case SP::D8: OpKind = MCK_LowDFPRegs; break0
;
2120
3.74k
    
case SP::D9: OpKind = MCK_LowDFPRegs; break0
;
2121
3.74k
    
case SP::D10: OpKind = MCK_LowDFPRegs; break0
;
2122
3.74k
    
case SP::D11: OpKind = MCK_LowDFPRegs; break0
;
2123
3.74k
    
case SP::D12: OpKind = MCK_LowDFPRegs; break0
;
2124
3.74k
    
case SP::D13: OpKind = MCK_LowDFPRegs; break0
;
2125
3.74k
    
case SP::D14: OpKind = MCK_LowDFPRegs; break0
;
2126
3.74k
    
case SP::D15: OpKind = MCK_LowDFPRegs; break0
;
2127
3.74k
    
case SP::C0: OpKind = MCK_CoprocRegs; break0
;
2128
3.74k
    
case SP::C1: OpKind = MCK_CoprocRegs; break0
;
2129
3.74k
    
case SP::C2: OpKind = MCK_CoprocRegs; break0
;
2130
3.74k
    
case SP::C3: OpKind = MCK_CoprocRegs; break0
;
2131
3.74k
    
case SP::C4: OpKind = MCK_CoprocRegs; break59
;
2132
3.74k
    
case SP::C5: OpKind = MCK_CoprocRegs; break0
;
2133
3.74k
    
case SP::C6: OpKind = MCK_CoprocRegs; break0
;
2134
3.74k
    
case SP::C7: OpKind = MCK_CoprocRegs; break0
;
2135
3.74k
    
case SP::C8: OpKind = MCK_CoprocRegs; break0
;
2136
3.74k
    
case SP::C9: OpKind = MCK_CoprocRegs; break0
;
2137
3.74k
    
case SP::C10: OpKind = MCK_CoprocRegs; break0
;
2138
3.74k
    
case SP::C11: OpKind = MCK_CoprocRegs; break0
;
2139
3.74k
    
case SP::C12: OpKind = MCK_CoprocRegs; break0
;
2140
3.74k
    
case SP::C13: OpKind = MCK_CoprocRegs; break0
;
2141
3.74k
    
case SP::C14: OpKind = MCK_CoprocRegs; break0
;
2142
3.74k
    
case SP::C15: OpKind = MCK_CoprocRegs; break0
;
2143
3.74k
    
case SP::C16: OpKind = MCK_CoprocRegs; break0
;
2144
3.74k
    
case SP::C17: OpKind = MCK_CoprocRegs; break0
;
2145
3.74k
    
case SP::C18: OpKind = MCK_CoprocRegs; break0
;
2146
3.74k
    
case SP::C19: OpKind = MCK_CoprocRegs; break9
;
2147
3.74k
    
case SP::C20: OpKind = MCK_CoprocRegs; break0
;
2148
3.74k
    
case SP::C21: OpKind = MCK_CoprocRegs; break0
;
2149
3.74k
    
case SP::C22: OpKind = MCK_CoprocRegs; break0
;
2150
3.74k
    
case SP::C23: OpKind = MCK_CoprocRegs; break0
;
2151
3.74k
    
case SP::C24: OpKind = MCK_CoprocRegs; break0
;
2152
3.74k
    
case SP::C25: OpKind = MCK_CoprocRegs; break0
;
2153
3.74k
    
case SP::C26: OpKind = MCK_CoprocRegs; break0
;
2154
3.74k
    
case SP::C27: OpKind = MCK_CoprocRegs; break0
;
2155
3.74k
    
case SP::C28: OpKind = MCK_CoprocRegs; break0
;
2156
3.74k
    
case SP::C29: OpKind = MCK_CoprocRegs; break0
;
2157
3.74k
    
case SP::C30: OpKind = MCK_CoprocRegs; break6
;
2158
3.74k
    
case SP::C31: OpKind = MCK_CoprocRegs; break0
;
2159
3.74k
    
case SP::D16: OpKind = MCK_DFPRegs; break3
;
2160
3.74k
    
case SP::D17: OpKind = MCK_DFPRegs; break1
;
2161
3.74k
    
case SP::D18: OpKind = MCK_DFPRegs; break1
;
2162
3.74k
    
case SP::D19: OpKind = MCK_DFPRegs; break0
;
2163
3.74k
    
case SP::D20: OpKind = MCK_DFPRegs; break3
;
2164
3.74k
    
case SP::D21: OpKind = MCK_DFPRegs; break0
;
2165
3.74k
    
case SP::D22: OpKind = MCK_DFPRegs; break0
;
2166
3.74k
    
case SP::D23: OpKind = MCK_DFPRegs; break0
;
2167
3.74k
    
case SP::D24: OpKind = MCK_DFPRegs; break29
;
2168
3.74k
    
case SP::D25: OpKind = MCK_DFPRegs; break0
;
2169
3.74k
    
case SP::D26: OpKind = MCK_DFPRegs; break0
;
2170
3.74k
    
case SP::D27: OpKind = MCK_DFPRegs; break0
;
2171
3.74k
    
case SP::D28: OpKind = MCK_DFPRegs; break0
;
2172
3.74k
    
case SP::D29: OpKind = MCK_DFPRegs; break0
;
2173
3.74k
    
case SP::D30: OpKind = MCK_DFPRegs; break1
;
2174
3.74k
    
case SP::D31: OpKind = MCK_DFPRegs; break1
;
2175
3.74k
    
case SP::Q0: OpKind = MCK_LowQFPRegs; break0
;
2176
3.74k
    
case SP::Q1: OpKind = MCK_LowQFPRegs; break0
;
2177
3.74k
    
case SP::Q2: OpKind = MCK_LowQFPRegs; break0
;
2178
3.74k
    
case SP::Q3: OpKind = MCK_LowQFPRegs; break0
;
2179
3.74k
    
case SP::Q4: OpKind = MCK_LowQFPRegs; break0
;
2180
3.74k
    
case SP::Q5: OpKind = MCK_LowQFPRegs; break0
;
2181
3.74k
    
case SP::Q6: OpKind = MCK_LowQFPRegs; break0
;
2182
3.74k
    
case SP::Q7: OpKind = MCK_LowQFPRegs; break0
;
2183
3.74k
    
case SP::Q8: OpKind = MCK_QFPRegs; break0
;
2184
3.74k
    
case SP::Q9: OpKind = MCK_QFPRegs; break0
;
2185
3.74k
    
case SP::Q10: OpKind = MCK_QFPRegs; break0
;
2186
3.74k
    
case SP::Q11: OpKind = MCK_QFPRegs; break0
;
2187
3.74k
    
case SP::Q12: OpKind = MCK_QFPRegs; break2
;
2188
3.74k
    
case SP::Q13: OpKind = MCK_QFPRegs; break0
;
2189
3.74k
    
case SP::Q14: OpKind = MCK_QFPRegs; break0
;
2190
3.74k
    
case SP::Q15: OpKind = MCK_QFPRegs; break0
;
2191
3.74k
    
case SP::G0_G1: OpKind = MCK_IntPair; break0
;
2192
3.74k
    
case SP::G2_G3: OpKind = MCK_IntPair; break0
;
2193
3.74k
    
case SP::G4_G5: OpKind = MCK_IntPair; break0
;
2194
3.74k
    
case SP::G6_G7: OpKind = MCK_IntPair; break0
;
2195
3.74k
    
case SP::O0_O1: OpKind = MCK_IntPair; break0
;
2196
3.74k
    
case SP::O2_O3: OpKind = MCK_IntPair; break4
;
2197
3.74k
    
case SP::O4_O5: OpKind = MCK_IntPair; break1
;
2198
3.74k
    
case SP::O6_O7: OpKind = MCK_IntPair; break0
;
2199
3.74k
    
case SP::L0_L1: OpKind = MCK_IntPair; break1
;
2200
3.74k
    
case SP::L2_L3: OpKind = MCK_IntPair; break0
;
2201
3.74k
    
case SP::L4_L5: OpKind = MCK_IntPair; break0
;
2202
3.74k
    
case SP::L6_L7: OpKind = MCK_IntPair; break0
;
2203
3.74k
    
case SP::I0_I1: OpKind = MCK_IntPair; break0
;
2204
3.74k
    
case SP::I2_I3: OpKind = MCK_IntPair; break0
;
2205
3.74k
    
case SP::I4_I5: OpKind = MCK_IntPair; break1
;
2206
3.74k
    
case SP::I6_I7: OpKind = MCK_IntPair; break0
;
2207
3.74k
    
case SP::C0_C1: OpKind = MCK_CoprocPair; break0
;
2208
3.74k
    
case SP::C2_C3: OpKind = MCK_CoprocPair; break0
;
2209
3.74k
    
case SP::C4_C5: OpKind = MCK_CoprocPair; break3
;
2210
3.74k
    
case SP::C6_C7: OpKind = MCK_CoprocPair; break0
;
2211
3.74k
    
case SP::C8_C9: OpKind = MCK_CoprocPair; break0
;
2212
3.74k
    
case SP::C10_C11: OpKind = MCK_CoprocPair; break0
;
2213
3.74k
    
case SP::C12_C13: OpKind = MCK_CoprocPair; break0
;
2214
3.74k
    
case SP::C14_C15: OpKind = MCK_CoprocPair; break0
;
2215
3.74k
    
case SP::C16_C17: OpKind = MCK_CoprocPair; break0
;
2216
3.74k
    
case SP::C18_C19: OpKind = MCK_CoprocPair; break0
;
2217
3.74k
    
case SP::C20_C21: OpKind = MCK_CoprocPair; break0
;
2218
3.74k
    
case SP::C22_C23: OpKind = MCK_CoprocPair; break0
;
2219
3.74k
    
case SP::C24_C25: OpKind = MCK_CoprocPair; break0
;
2220
3.74k
    
case SP::C26_C27: OpKind = MCK_CoprocPair; break0
;
2221
3.74k
    
case SP::C28_C29: OpKind = MCK_CoprocPair; break0
;
2222
3.74k
    
case SP::C30_C31: OpKind = MCK_CoprocPair; break1
;
2223
3.74k
    }
2224
3.74k
    return isSubclass(OpKind, Kind) ? 
(unsigned)MCTargetAsmParser::Match_Success2.60k
:
2225
3.74k
                                      
getDiagKindFromRegisterClass(Kind)1.13k
;
2226
3.74k
  }
2227
1.95k
2228
1.95k
  if (Kind > MCK_LAST_TOKEN && 
Kind <= MCK_LAST_REGISTER1.80k
)
2229
919
    return getDiagKindFromRegisterClass(Kind);
2230
1.03k
2231
1.03k
  return MCTargetAsmParser::Match_InvalidOperand;
2232
1.03k
}
2233
2234
#ifndef NDEBUG
2235
const char *getMatchClassName(MatchClassKind Kind) {
2236
  switch (Kind) {
2237
  case InvalidMatchClass: return "InvalidMatchClass";
2238
  case OptionalMatchClass: return "OptionalMatchClass";
2239
  case MCK__PCT_cq: return "MCK__PCT_cq";
2240
  case MCK__PCT_csr: return "MCK__PCT_csr";
2241
  case MCK__PCT_fcc0: return "MCK__PCT_fcc0";
2242
  case MCK__PCT_fq: return "MCK__PCT_fq";
2243
  case MCK__PCT_fsr: return "MCK__PCT_fsr";
2244
  case MCK__PCT_g0: return "MCK__PCT_g0";
2245
  case MCK__PCT_icc: return "MCK__PCT_icc";
2246
  case MCK__PCT_psr: return "MCK__PCT_psr";
2247
  case MCK__PCT_tbr: return "MCK__PCT_tbr";
2248
  case MCK__PCT_wim: return "MCK__PCT_wim";
2249
  case MCK__PCT_xcc: return "MCK__PCT_xcc";
2250
  case MCK__43_: return "MCK__43_";
2251
  case MCK_1: return "MCK_1";
2252
  case MCK_10: return "MCK_10";
2253
  case MCK_3: return "MCK_3";
2254
  case MCK_5: return "MCK_5";
2255
  case MCK__91_: return "MCK__91_";
2256
  case MCK__93_: return "MCK__93_";
2257
  case MCK_a: return "MCK_a";
2258
  case MCK_pn: return "MCK_pn";
2259
  case MCK_pt: return "MCK_pt";
2260
  case MCK_FCCRegs: return "MCK_FCCRegs";
2261
  case MCK_LowQFPRegs: return "MCK_LowQFPRegs";
2262
  case MCK_PRRegs: return "MCK_PRRegs";
2263
  case MCK_CoprocPair: return "MCK_CoprocPair";
2264
  case MCK_IntPair: return "MCK_IntPair";
2265
  case MCK_LowDFPRegs: return "MCK_LowDFPRegs";
2266
  case MCK_QFPRegs: return "MCK_QFPRegs";
2267
  case MCK_ASRRegs: return "MCK_ASRRegs";
2268
  case MCK_CoprocRegs: return "MCK_CoprocRegs";
2269
  case MCK_DFPRegs: return "MCK_DFPRegs";
2270
  case MCK_FPRegs: return "MCK_FPRegs";
2271
  case MCK_IntRegs: return "MCK_IntRegs";
2272
  case MCK_Imm: return "MCK_Imm";
2273
  case MCK_MEMri: return "MCK_MEMri";
2274
  case MCK_MEMrr: return "MCK_MEMrr";
2275
  case NumMatchClassKinds: return "NumMatchClassKinds";
2276
  }
2277
  llvm_unreachable("unhandled MatchClassKind!");
2278
}
2279
2280
#endif // NDEBUG
2281
uint64_t SparcAsmParser::
2282
103
ComputeAvailableFeatures(const FeatureBitset& FB) const {
2283
103
  uint64_t Features = 0;
2284
103
  if ((FB[Sparc::FeatureSoftMulDiv]))
2285
0
    Features |= Feature_UseSoftMulDiv;
2286
103
  if ((FB[Sparc::FeatureV9]))
2287
45
    Features |= Feature_HasV9;
2288
103
  if ((FB[Sparc::FeatureVIS]))
2289
1
    Features |= Feature_HasVIS;
2290
103
  if ((FB[Sparc::FeatureVIS2]))
2291
1
    Features |= Feature_HasVIS2;
2292
103
  if ((FB[Sparc::FeatureVIS3]))
2293
0
    Features |= Feature_HasVIS3;
2294
103
  if ((FB[Sparc::FeaturePWRPSR]))
2295
2
    Features |= Feature_HasPWRPSR;
2296
103
  return Features;
2297
103
}
2298
2299
static bool checkAsmTiedOperandConstraints(const SparcAsmParser&AsmParser,
2300
                               unsigned Kind,
2301
                               const OperandVector &Operands,
2302
1.78k
                               uint64_t &ErrorInfo) {
2303
1.78k
  assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!");
2304
1.78k
  const uint8_t *Converter = ConversionTable[Kind];
2305
6.32k
  for (const uint8_t *p = Converter; *p; 
p+= 24.53k
) {
2306
4.53k
    switch (*p) {
2307
4.53k
    case CVT_Tied: {
2308
105
      unsigned OpIdx = *(p+1);
2309
105
      assert(OpIdx < (size_t)(std::end(TiedAsmOperandTable) -
2310
105
                              std::begin(TiedAsmOperandTable)) &&
2311
105
             "Tied operand not found");
2312
105
      unsigned OpndNum1 = TiedAsmOperandTable[OpIdx][1];
2313
105
      unsigned OpndNum2 = TiedAsmOperandTable[OpIdx][2];
2314
105
      if (OpndNum1 != OpndNum2) {
2315
0
        auto &SrcOp1 = Operands[OpndNum1];
2316
0
        auto &SrcOp2 = Operands[OpndNum2];
2317
0
        if (SrcOp1->isReg() && SrcOp2->isReg()) {
2318
0
          if (!AsmParser.regsEqual(*SrcOp1, *SrcOp2)) {
2319
0
            ErrorInfo = OpndNum2;
2320
0
            return false;
2321
0
          }
2322
105
        }
2323
0
      }
2324
105
      break;
2325
105
    }
2326
4.43k
    default:
2327
4.43k
      break;
2328
4.53k
    }
2329
4.53k
  }
2330
1.78k
  return true;
2331
1.78k
}
2332
2333
static const char *const MnemonicTable =
2334
    "\003add\005addcc\004addx\005addxc\006addxcc\007addxccc\talignaddr\nalig"
2335
    "naddrl\003and\005andcc\004andn\006andncc\007array16\007array32\006array"
2336
    "8\001b\002ba\003bcc\004bclr\003bcs\002be\003beq\002bg\003bge\004bgeu\003"
2337
    "bgu\002bl\003ble\004bleu\003blu\005bmask\002bn\003bne\004bneg\003bnz\004"
2338
    "bpos\005brgez\004brgz\005brlez\004brlz\004brnz\003brz\004bset\010bshuff"
2339
    "le\004btog\004btst\003bvc\003bvs\002bz\004call\003cas\004casa\004casx\002"
2340
    "cb\003cb0\004cb01\005cb012\005cb013\004cb02\005cb023\004cb03\003cb1\004"
2341
    "cb12\005cb123\004cb13\003cb2\004cb23\003cb3\003cba\003cbn\003clr\004clr"
2342
    "b\004clrh\007cmask16\007cmask32\006cmask8\003cmp\003dec\005deccc\006edg"
2343
    "e16\007edge16l\010edge16ln\007edge16n\006edge32\007edge32l\010edge32ln\007"
2344
    "edge32n\005edge8\006edge8l\007edge8ln\006edge8n\005fabsd\005fabsq\005fa"
2345
    "bss\005faddd\005faddq\005fadds\nfaligndata\004fand\010fandnot1\tfandnot"
2346
    "1s\010fandnot2\tfandnot2s\005fands\002fb\003fba\003fbe\003fbg\004fbge\003"
2347
    "fbl\004fble\004fblg\003fbn\004fbne\004fbnz\003fbo\003fbu\004fbue\004fbu"
2348
    "g\005fbuge\004fbul\005fbule\003fbz\010fchksm16\005fcmpd\006fcmped\006fc"
2349
    "mpeq\010fcmpeq16\010fcmpeq32\006fcmpes\010fcmpgt16\010fcmpgt32\010fcmpl"
2350
    "e16\010fcmple32\010fcmpne16\010fcmpne32\005fcmpq\005fcmps\005fdivd\005f"
2351
    "divq\005fdivs\006fdmulq\005fdtoi\005fdtoq\005fdtos\005fdtox\007fexpand\006"
2352
    "fhaddd\006fhadds\006fhsubd\006fhsubs\005fitod\005fitoq\005fitos\006flcm"
2353
    "pd\006flcmps\005flush\006flushw\007fmean16\005fmovd\006fmovda\007fmovdc"
2354
    "c\007fmovdcs\006fmovde\007fmovdeq\006fmovdg\007fmovdge\010fmovdgeu\007f"
2355
    "movdgu\006fmovdl\007fmovdle\010fmovdleu\007fmovdlg\007fmovdlu\006fmovdn"
2356
    "\007fmovdne\010fmovdneg\007fmovdnz\006fmovdo\010fmovdpos\006fmovdu\007f"
2357
    "movdue\007fmovdug\010fmovduge\007fmovdul\010fmovdule\007fmovdvc\007fmov"
2358
    "dvs\006fmovdz\005fmovq\006fmovqa\007fmovqcc\007fmovqcs\006fmovqe\007fmo"
2359
    "vqeq\006fmovqg\007fmovqge\010fmovqgeu\007fmovqgu\006fmovql\007fmovqle\010"
2360
    "fmovqleu\007fmovqlg\007fmovqlu\006fmovqn\007fmovqne\010fmovqneg\007fmov"
2361
    "qnz\006fmovqo\010fmovqpos\006fmovqu\007fmovque\007fmovqug\010fmovquge\007"
2362
    "fmovqul\010fmovqule\007fmovqvc\007fmovqvs\006fmovqz\tfmovrdgez\010fmovr"
2363
    "dgz\tfmovrdlez\010fmovrdlz\010fmovrdnz\007fmovrdz\tfmovrqgez\010fmovrqg"
2364
    "z\tfmovrqlez\010fmovrqlz\010fmovrqnz\007fmovrqz\tfmovrsgez\010fmovrsgz\t"
2365
    "fmovrslez\010fmovrslz\010fmovrsnz\007fmovrsz\005fmovs\006fmovsa\007fmov"
2366
    "scc\007fmovscs\006fmovse\007fmovseq\006fmovsg\007fmovsge\010fmovsgeu\007"
2367
    "fmovsgu\006fmovsl\007fmovsle\010fmovsleu\007fmovslg\007fmovslu\006fmovs"
2368
    "n\007fmovsne\010fmovsneg\007fmovsnz\006fmovso\010fmovspos\006fmovsu\007"
2369
    "fmovsue\007fmovsug\010fmovsuge\007fmovsul\010fmovsule\007fmovsvc\007fmo"
2370
    "vsvs\006fmovsz\nfmul8sux16\nfmul8ulx16\010fmul8x16\nfmul8x16al\nfmul8x1"
2371
    "6au\005fmuld\013fmuld8sux16\013fmuld8ulx16\005fmulq\005fmuls\006fnaddd\006"
2372
    "fnadds\005fnand\006fnands\005fnegd\005fnegq\005fnegs\007fnhaddd\007fnha"
2373
    "dds\004fnor\005fnors\005fnot1\006fnot1s\005fnot2\006fnot2s\004fone\005f"
2374
    "ones\003for\007fornot1\010fornot1s\007fornot2\010fornot2s\004fors\007fp"
2375
    "ack16\007fpack32\010fpackfix\007fpadd16\010fpadd16s\007fpadd32\010fpadd"
2376
    "32s\007fpadd64\007fpmerge\007fpsub16\010fpsub16S\007fpsub32\010fpsub32S"
2377
    "\005fqtod\005fqtoi\005fqtos\005fqtox\007fslas16\007fslas32\006fsll16\006"
2378
    "fsll32\006fsmuld\006fsqrtd\006fsqrtq\006fsqrts\006fsra16\006fsra32\005f"
2379
    "src1\006fsrc1s\005fsrc2\006fsrc2s\006fsrl16\006fsrl32\005fstod\005fstoi"
2380
    "\005fstoq\005fstox\005fsubd\005fsubq\005fsubs\005fxnor\006fxnors\004fxo"
2381
    "r\005fxors\005fxtod\005fxtoq\005fxtos\005fzero\006fzeros\003inc\005incc"
2382
    "c\003jmp\004jmpl\002ld\003lda\003ldd\004ldda\003ldq\004ldqa\004ldsb\005"
2383
    "ldsba\004ldsh\005ldsha\006ldstub\007ldstuba\004ldsw\004ldub\005lduba\004"
2384
    "lduh\005lduha\003ldx\005lzcnt\006membar\003mov\004mova\005movcc\005movc"
2385
    "s\007movdtox\004move\005moveq\004movg\005movge\006movgeu\005movgu\004mo"
2386
    "vl\005movle\006movleu\005movlg\005movlu\004movn\005movne\006movneg\005m"
2387
    "ovnz\004movo\006movpos\007movrgez\006movrgz\007movrlez\006movrlz\006mov"
2388
    "rnz\005movrz\010movstosw\010movstouw\004movu\005movue\005movug\006movug"
2389
    "e\005movul\006movule\005movvc\005movvs\004movz\006mulscc\004mulx\003neg"
2390
    "\003nop\003not\002or\004orcc\003orn\005orncc\005pdist\006pdistn\004popc"
2391
    "\003pwr\002rd\004rdpr\007restore\003ret\004retl\004rett\004save\004sdiv"
2392
    "\006sdivcc\005sdivx\003set\005sethi\010shutdown\004siam\005signx\003sll"
2393
    "\004sllx\004smac\004smul\006smulcc\003sra\004srax\003srl\004srlx\002st\003"
2394
    "sta\003stb\004stba\005stbar\003std\004stda\003sth\004stha\003stq\004stq"
2395
    "a\003stx\003sub\005subcc\004subx\006subxcc\004swap\005swapa\001t\002ta\006"
2396
    "taddcc\010taddcctv\003tcc\003tcs\002te\003teq\002tg\003tge\004tgeu\003t"
2397
    "gu\002tl\003tle\004tleu\003tlu\002tn\003tne\004tneg\003tnz\004tpos\003t"
2398
    "st\006tsubcc\010tsubcctv\003tvc\003tvs\002tz\004udiv\006udivcc\005udivx"
2399
    "\004umac\004umul\006umulcc\007umulxhi\005unimp\002wr\004wrpr\005xmulx\007"
2400
    "xmulxhi\004xnor\006xnorcc\003xor\005xorcc";
2401
2402
namespace {
2403
  struct MatchEntry {
2404
    uint16_t Mnemonic;
2405
    uint16_t Opcode;
2406
    uint16_t ConvertFn;
2407
    uint8_t RequiredFeatures;
2408
    uint8_t Classes[6];
2409
33.6k
    StringRef getMnemonic() const {
2410
33.6k
      return StringRef(MnemonicTable + Mnemonic + 1,
2411
33.6k
                       MnemonicTable[Mnemonic]);
2412
33.6k
    }
2413
  };
2414
2415
  // Predicate for searching for an opcode.
2416
  struct LessOpcode {
2417
19.8k
    bool operator()(const MatchEntry &LHS, StringRef RHS) {
2418
19.8k
      return LHS.getMnemonic() < RHS;
2419
19.8k
    }
2420
13.8k
    bool operator()(StringRef LHS, const MatchEntry &RHS) {
2421
13.8k
      return LHS < RHS.getMnemonic();
2422
13.8k
    }
2423
0
    bool operator()(const MatchEntry &LHS, const MatchEntry &RHS) {
2424
0
      return LHS.getMnemonic() < RHS.getMnemonic();
2425
0
    }
2426
  };
2427
} // end anonymous namespace.
2428
2429
static const MatchEntry MatchTable0[] = {
2430
  { 0 /* add */, SP::ADDrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
2431
  { 0 /* add */, SP::ADDri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
2432
  { 0 /* add */, SP::TLS_ADDrr, Convert__Reg1_2__Reg1_0__Reg1_1__Imm1_3, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs, MCK_Imm }, },
2433
  { 4 /* addcc */, SP::ADDCCrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
2434
  { 4 /* addcc */, SP::ADDCCri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
2435
  { 10 /* addx */, SP::ADDCrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
2436
  { 10 /* addx */, SP::ADDCri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
2437
  { 15 /* addxc */, SP::ADDXC, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
2438
  { 21 /* addxcc */, SP::ADDErr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
2439
  { 21 /* addxcc */, SP::ADDEri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
2440
  { 28 /* addxccc */, SP::ADDXCCC, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
2441
  { 36 /* alignaddr */, SP::ALIGNADDR, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
2442
  { 46 /* alignaddrl */, SP::ALIGNADDRL, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
2443
  { 57 /* and */, SP::ANDrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
2444
  { 57 /* and */, SP::ANDri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
2445
  { 61 /* andcc */, SP::ANDCCrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
2446
  { 61 /* andcc */, SP::ANDCCri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
2447
  { 67 /* andn */, SP::ANDNrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
2448
  { 67 /* andn */, SP::ANDNri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
2449
  { 72 /* andncc */, SP::ANDNCCrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
2450
  { 72 /* andncc */, SP::ANDNCCri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
2451
  { 79 /* array16 */, SP::ARRAY16, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
2452
  { 87 /* array32 */, SP::ARRAY32, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
2453
  { 95 /* array8 */, SP::ARRAY8, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
2454
  { 102 /* b */, SP::BCOND, Convert__Imm1_0__imm_95_8, 0, { MCK_Imm }, },
2455
  { 102 /* b */, SP::BPICC, Convert__Imm1_1__imm_95_8, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
2456
  { 102 /* b */, SP::BPXCC, Convert__Imm1_1__imm_95_8, 0, { MCK__PCT_xcc, MCK_Imm }, },
2457
  { 102 /* b */, SP::BCONDA, Convert__Imm1_1__imm_95_8, 0, { MCK_a, MCK_Imm }, },
2458
  { 102 /* b */, SP::BCOND, Convert__Imm1_1__Imm1_0, 0, { MCK_Imm, MCK_Imm }, },
2459
  { 102 /* b */, SP::BPICCA, Convert__Imm1_2__imm_95_8, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
2460
  { 102 /* b */, SP::BPXCCA, Convert__Imm1_2__imm_95_8, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
2461
  { 102 /* b */, SP::BPICCNT, Convert__Imm1_2__imm_95_8, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2462
  { 102 /* b */, SP::BPXCCNT, Convert__Imm1_2__imm_95_8, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2463
  { 102 /* b */, SP::BPICC, Convert__Imm1_2__imm_95_8, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2464
  { 102 /* b */, SP::BPXCC, Convert__Imm1_2__imm_95_8, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2465
  { 102 /* b */, SP::BPICC, Convert__Imm1_2__Imm1_0, Feature_HasV9, { MCK_Imm, MCK__PCT_icc, MCK_Imm }, },
2466
  { 102 /* b */, SP::BPXCC, Convert__Imm1_2__Imm1_0, 0, { MCK_Imm, MCK__PCT_xcc, MCK_Imm }, },
2467
  { 102 /* b */, SP::BCONDA, Convert__Imm1_2__Imm1_0, 0, { MCK_Imm, MCK_a, MCK_Imm }, },
2468
  { 102 /* b */, SP::BPICCANT, Convert__Imm1_3__imm_95_8, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2469
  { 102 /* b */, SP::BPXCCANT, Convert__Imm1_3__imm_95_8, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2470
  { 102 /* b */, SP::BPICCA, Convert__Imm1_3__imm_95_8, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2471
  { 102 /* b */, SP::BPXCCA, Convert__Imm1_3__imm_95_8, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2472
  { 102 /* b */, SP::BPICCA, Convert__Imm1_3__Imm1_0, Feature_HasV9, { MCK_Imm, MCK_a, MCK__PCT_icc, MCK_Imm }, },
2473
  { 102 /* b */, SP::BPXCCA, Convert__Imm1_3__Imm1_0, 0, { MCK_Imm, MCK_a, MCK__PCT_xcc, MCK_Imm }, },
2474
  { 102 /* b */, SP::BPICCNT, Convert__Imm1_3__Imm1_0, Feature_HasV9, { MCK_Imm, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2475
  { 102 /* b */, SP::BPXCCNT, Convert__Imm1_3__Imm1_0, 0, { MCK_Imm, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2476
  { 102 /* b */, SP::BPICCANT, Convert__Imm1_4__Imm1_0, Feature_HasV9, { MCK_Imm, MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2477
  { 102 /* b */, SP::BPXCCANT, Convert__Imm1_4__Imm1_0, 0, { MCK_Imm, MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2478
  { 104 /* ba */, SP::BA, Convert__Imm1_0, 0, { MCK_Imm }, },
2479
  { 104 /* ba */, SP::BCOND, Convert__Imm1_0__imm_95_8, 0, { MCK_Imm }, },
2480
  { 104 /* ba */, SP::BPICC, Convert__Imm1_1__imm_95_8, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
2481
  { 104 /* ba */, SP::BPXCC, Convert__Imm1_1__imm_95_8, 0, { MCK__PCT_xcc, MCK_Imm }, },
2482
  { 104 /* ba */, SP::BCONDA, Convert__Imm1_1__imm_95_8, 0, { MCK_a, MCK_Imm }, },
2483
  { 104 /* ba */, SP::BPICCA, Convert__Imm1_2__imm_95_8, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
2484
  { 104 /* ba */, SP::BPXCCA, Convert__Imm1_2__imm_95_8, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
2485
  { 104 /* ba */, SP::BPICCNT, Convert__Imm1_2__imm_95_8, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2486
  { 104 /* ba */, SP::BPXCCNT, Convert__Imm1_2__imm_95_8, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2487
  { 104 /* ba */, SP::BPICC, Convert__Imm1_2__imm_95_8, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2488
  { 104 /* ba */, SP::BPXCC, Convert__Imm1_2__imm_95_8, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2489
  { 104 /* ba */, SP::BPICCANT, Convert__Imm1_3__imm_95_8, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2490
  { 104 /* ba */, SP::BPXCCANT, Convert__Imm1_3__imm_95_8, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2491
  { 104 /* ba */, SP::BPICCA, Convert__Imm1_3__imm_95_8, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2492
  { 104 /* ba */, SP::BPXCCA, Convert__Imm1_3__imm_95_8, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2493
  { 107 /* bcc */, SP::BCOND, Convert__Imm1_0__imm_95_13, 0, { MCK_Imm }, },
2494
  { 107 /* bcc */, SP::BPICC, Convert__Imm1_1__imm_95_13, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
2495
  { 107 /* bcc */, SP::BPXCC, Convert__Imm1_1__imm_95_13, 0, { MCK__PCT_xcc, MCK_Imm }, },
2496
  { 107 /* bcc */, SP::BCONDA, Convert__Imm1_1__imm_95_13, 0, { MCK_a, MCK_Imm }, },
2497
  { 107 /* bcc */, SP::BPICCA, Convert__Imm1_2__imm_95_13, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
2498
  { 107 /* bcc */, SP::BPXCCA, Convert__Imm1_2__imm_95_13, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
2499
  { 107 /* bcc */, SP::BPICCNT, Convert__Imm1_2__imm_95_13, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2500
  { 107 /* bcc */, SP::BPXCCNT, Convert__Imm1_2__imm_95_13, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2501
  { 107 /* bcc */, SP::BPICC, Convert__Imm1_2__imm_95_13, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2502
  { 107 /* bcc */, SP::BPXCC, Convert__Imm1_2__imm_95_13, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2503
  { 107 /* bcc */, SP::BPICCANT, Convert__Imm1_3__imm_95_13, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2504
  { 107 /* bcc */, SP::BPXCCANT, Convert__Imm1_3__imm_95_13, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2505
  { 107 /* bcc */, SP::BPICCA, Convert__Imm1_3__imm_95_13, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2506
  { 107 /* bcc */, SP::BPXCCA, Convert__Imm1_3__imm_95_13, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2507
  { 111 /* bclr */, SP::ANDNrr, Convert__Reg1_1__Reg1_1__Reg1_0, 0, { MCK_IntRegs, MCK_IntRegs }, },
2508
  { 111 /* bclr */, SP::ANDNri, Convert__Reg1_1__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_IntRegs }, },
2509
  { 116 /* bcs */, SP::BCOND, Convert__Imm1_0__imm_95_5, 0, { MCK_Imm }, },
2510
  { 116 /* bcs */, SP::BPICC, Convert__Imm1_1__imm_95_5, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
2511
  { 116 /* bcs */, SP::BPXCC, Convert__Imm1_1__imm_95_5, 0, { MCK__PCT_xcc, MCK_Imm }, },
2512
  { 116 /* bcs */, SP::BCONDA, Convert__Imm1_1__imm_95_5, 0, { MCK_a, MCK_Imm }, },
2513
  { 116 /* bcs */, SP::BPICCA, Convert__Imm1_2__imm_95_5, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
2514
  { 116 /* bcs */, SP::BPXCCA, Convert__Imm1_2__imm_95_5, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
2515
  { 116 /* bcs */, SP::BPICCNT, Convert__Imm1_2__imm_95_5, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2516
  { 116 /* bcs */, SP::BPXCCNT, Convert__Imm1_2__imm_95_5, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2517
  { 116 /* bcs */, SP::BPICC, Convert__Imm1_2__imm_95_5, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2518
  { 116 /* bcs */, SP::BPXCC, Convert__Imm1_2__imm_95_5, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2519
  { 116 /* bcs */, SP::BPICCANT, Convert__Imm1_3__imm_95_5, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2520
  { 116 /* bcs */, SP::BPXCCANT, Convert__Imm1_3__imm_95_5, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2521
  { 116 /* bcs */, SP::BPICCA, Convert__Imm1_3__imm_95_5, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2522
  { 116 /* bcs */, SP::BPXCCA, Convert__Imm1_3__imm_95_5, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2523
  { 120 /* be */, SP::BCOND, Convert__Imm1_0__imm_95_1, 0, { MCK_Imm }, },
2524
  { 120 /* be */, SP::BPICC, Convert__Imm1_1__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
2525
  { 120 /* be */, SP::BPXCC, Convert__Imm1_1__imm_95_1, 0, { MCK__PCT_xcc, MCK_Imm }, },
2526
  { 120 /* be */, SP::BCONDA, Convert__Imm1_1__imm_95_1, 0, { MCK_a, MCK_Imm }, },
2527
  { 120 /* be */, SP::BPICCA, Convert__Imm1_2__imm_95_1, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
2528
  { 120 /* be */, SP::BPXCCA, Convert__Imm1_2__imm_95_1, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
2529
  { 120 /* be */, SP::BPICCNT, Convert__Imm1_2__imm_95_1, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2530
  { 120 /* be */, SP::BPXCCNT, Convert__Imm1_2__imm_95_1, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2531
  { 120 /* be */, SP::BPICC, Convert__Imm1_2__imm_95_1, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2532
  { 120 /* be */, SP::BPXCC, Convert__Imm1_2__imm_95_1, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2533
  { 120 /* be */, SP::BPICCANT, Convert__Imm1_3__imm_95_1, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2534
  { 120 /* be */, SP::BPXCCANT, Convert__Imm1_3__imm_95_1, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2535
  { 120 /* be */, SP::BPICCA, Convert__Imm1_3__imm_95_1, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2536
  { 120 /* be */, SP::BPXCCA, Convert__Imm1_3__imm_95_1, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2537
  { 123 /* beq */, SP::BCOND, Convert__Imm1_0__imm_95_1, 0, { MCK_Imm }, },
2538
  { 123 /* beq */, SP::BPICC, Convert__Imm1_1__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
2539
  { 123 /* beq */, SP::BPXCC, Convert__Imm1_1__imm_95_1, 0, { MCK__PCT_xcc, MCK_Imm }, },
2540
  { 123 /* beq */, SP::BCONDA, Convert__Imm1_1__imm_95_1, 0, { MCK_a, MCK_Imm }, },
2541
  { 123 /* beq */, SP::BPICCA, Convert__Imm1_2__imm_95_1, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
2542
  { 123 /* beq */, SP::BPXCCA, Convert__Imm1_2__imm_95_1, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
2543
  { 123 /* beq */, SP::BPICCNT, Convert__Imm1_2__imm_95_1, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2544
  { 123 /* beq */, SP::BPXCCNT, Convert__Imm1_2__imm_95_1, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2545
  { 123 /* beq */, SP::BPICC, Convert__Imm1_2__imm_95_1, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2546
  { 123 /* beq */, SP::BPXCC, Convert__Imm1_2__imm_95_1, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2547
  { 123 /* beq */, SP::BPICCANT, Convert__Imm1_3__imm_95_1, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2548
  { 123 /* beq */, SP::BPXCCANT, Convert__Imm1_3__imm_95_1, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2549
  { 123 /* beq */, SP::BPICCA, Convert__Imm1_3__imm_95_1, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2550
  { 123 /* beq */, SP::BPXCCA, Convert__Imm1_3__imm_95_1, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2551
  { 127 /* bg */, SP::BCOND, Convert__Imm1_0__imm_95_10, 0, { MCK_Imm }, },
2552
  { 127 /* bg */, SP::BPICC, Convert__Imm1_1__imm_95_10, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
2553
  { 127 /* bg */, SP::BPXCC, Convert__Imm1_1__imm_95_10, 0, { MCK__PCT_xcc, MCK_Imm }, },
2554
  { 127 /* bg */, SP::BCONDA, Convert__Imm1_1__imm_95_10, 0, { MCK_a, MCK_Imm }, },
2555
  { 127 /* bg */, SP::BPICCA, Convert__Imm1_2__imm_95_10, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
2556
  { 127 /* bg */, SP::BPXCCA, Convert__Imm1_2__imm_95_10, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
2557
  { 127 /* bg */, SP::BPICCNT, Convert__Imm1_2__imm_95_10, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2558
  { 127 /* bg */, SP::BPXCCNT, Convert__Imm1_2__imm_95_10, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2559
  { 127 /* bg */, SP::BPICC, Convert__Imm1_2__imm_95_10, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2560
  { 127 /* bg */, SP::BPXCC, Convert__Imm1_2__imm_95_10, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2561
  { 127 /* bg */, SP::BPICCANT, Convert__Imm1_3__imm_95_10, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2562
  { 127 /* bg */, SP::BPXCCANT, Convert__Imm1_3__imm_95_10, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2563
  { 127 /* bg */, SP::BPICCA, Convert__Imm1_3__imm_95_10, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2564
  { 127 /* bg */, SP::BPXCCA, Convert__Imm1_3__imm_95_10, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2565
  { 130 /* bge */, SP::BCOND, Convert__Imm1_0__imm_95_11, 0, { MCK_Imm }, },
2566
  { 130 /* bge */, SP::BPICC, Convert__Imm1_1__imm_95_11, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
2567
  { 130 /* bge */, SP::BPXCC, Convert__Imm1_1__imm_95_11, 0, { MCK__PCT_xcc, MCK_Imm }, },
2568
  { 130 /* bge */, SP::BCONDA, Convert__Imm1_1__imm_95_11, 0, { MCK_a, MCK_Imm }, },
2569
  { 130 /* bge */, SP::BPICCA, Convert__Imm1_2__imm_95_11, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
2570
  { 130 /* bge */, SP::BPXCCA, Convert__Imm1_2__imm_95_11, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
2571
  { 130 /* bge */, SP::BPICCNT, Convert__Imm1_2__imm_95_11, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2572
  { 130 /* bge */, SP::BPXCCNT, Convert__Imm1_2__imm_95_11, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2573
  { 130 /* bge */, SP::BPICC, Convert__Imm1_2__imm_95_11, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2574
  { 130 /* bge */, SP::BPXCC, Convert__Imm1_2__imm_95_11, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2575
  { 130 /* bge */, SP::BPICCANT, Convert__Imm1_3__imm_95_11, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2576
  { 130 /* bge */, SP::BPXCCANT, Convert__Imm1_3__imm_95_11, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2577
  { 130 /* bge */, SP::BPICCA, Convert__Imm1_3__imm_95_11, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2578
  { 130 /* bge */, SP::BPXCCA, Convert__Imm1_3__imm_95_11, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2579
  { 134 /* bgeu */, SP::BCOND, Convert__Imm1_0__imm_95_13, 0, { MCK_Imm }, },
2580
  { 134 /* bgeu */, SP::BPICC, Convert__Imm1_1__imm_95_13, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
2581
  { 134 /* bgeu */, SP::BPXCC, Convert__Imm1_1__imm_95_13, 0, { MCK__PCT_xcc, MCK_Imm }, },
2582
  { 134 /* bgeu */, SP::BCONDA, Convert__Imm1_1__imm_95_13, 0, { MCK_a, MCK_Imm }, },
2583
  { 134 /* bgeu */, SP::BPICCA, Convert__Imm1_2__imm_95_13, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
2584
  { 134 /* bgeu */, SP::BPXCCA, Convert__Imm1_2__imm_95_13, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
2585
  { 134 /* bgeu */, SP::BPICCNT, Convert__Imm1_2__imm_95_13, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2586
  { 134 /* bgeu */, SP::BPXCCNT, Convert__Imm1_2__imm_95_13, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2587
  { 134 /* bgeu */, SP::BPICC, Convert__Imm1_2__imm_95_13, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2588
  { 134 /* bgeu */, SP::BPXCC, Convert__Imm1_2__imm_95_13, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2589
  { 134 /* bgeu */, SP::BPICCANT, Convert__Imm1_3__imm_95_13, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2590
  { 134 /* bgeu */, SP::BPXCCANT, Convert__Imm1_3__imm_95_13, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2591
  { 134 /* bgeu */, SP::BPICCA, Convert__Imm1_3__imm_95_13, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2592
  { 134 /* bgeu */, SP::BPXCCA, Convert__Imm1_3__imm_95_13, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2593
  { 139 /* bgu */, SP::BCOND, Convert__Imm1_0__imm_95_12, 0, { MCK_Imm }, },
2594
  { 139 /* bgu */, SP::BPICC, Convert__Imm1_1__imm_95_12, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
2595
  { 139 /* bgu */, SP::BPXCC, Convert__Imm1_1__imm_95_12, 0, { MCK__PCT_xcc, MCK_Imm }, },
2596
  { 139 /* bgu */, SP::BCONDA, Convert__Imm1_1__imm_95_12, 0, { MCK_a, MCK_Imm }, },
2597
  { 139 /* bgu */, SP::BPICCA, Convert__Imm1_2__imm_95_12, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
2598
  { 139 /* bgu */, SP::BPXCCA, Convert__Imm1_2__imm_95_12, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
2599
  { 139 /* bgu */, SP::BPICCNT, Convert__Imm1_2__imm_95_12, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2600
  { 139 /* bgu */, SP::BPXCCNT, Convert__Imm1_2__imm_95_12, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2601
  { 139 /* bgu */, SP::BPICC, Convert__Imm1_2__imm_95_12, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2602
  { 139 /* bgu */, SP::BPXCC, Convert__Imm1_2__imm_95_12, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2603
  { 139 /* bgu */, SP::BPICCANT, Convert__Imm1_3__imm_95_12, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2604
  { 139 /* bgu */, SP::BPXCCANT, Convert__Imm1_3__imm_95_12, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2605
  { 139 /* bgu */, SP::BPICCA, Convert__Imm1_3__imm_95_12, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2606
  { 139 /* bgu */, SP::BPXCCA, Convert__Imm1_3__imm_95_12, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2607
  { 143 /* bl */, SP::BCOND, Convert__Imm1_0__imm_95_3, 0, { MCK_Imm }, },
2608
  { 143 /* bl */, SP::BPICC, Convert__Imm1_1__imm_95_3, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
2609
  { 143 /* bl */, SP::BPXCC, Convert__Imm1_1__imm_95_3, 0, { MCK__PCT_xcc, MCK_Imm }, },
2610
  { 143 /* bl */, SP::BCONDA, Convert__Imm1_1__imm_95_3, 0, { MCK_a, MCK_Imm }, },
2611
  { 143 /* bl */, SP::BPICCA, Convert__Imm1_2__imm_95_3, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
2612
  { 143 /* bl */, SP::BPXCCA, Convert__Imm1_2__imm_95_3, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
2613
  { 143 /* bl */, SP::BPICCNT, Convert__Imm1_2__imm_95_3, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2614
  { 143 /* bl */, SP::BPXCCNT, Convert__Imm1_2__imm_95_3, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2615
  { 143 /* bl */, SP::BPICC, Convert__Imm1_2__imm_95_3, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2616
  { 143 /* bl */, SP::BPXCC, Convert__Imm1_2__imm_95_3, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2617
  { 143 /* bl */, SP::BPICCANT, Convert__Imm1_3__imm_95_3, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2618
  { 143 /* bl */, SP::BPXCCANT, Convert__Imm1_3__imm_95_3, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2619
  { 143 /* bl */, SP::BPICCA, Convert__Imm1_3__imm_95_3, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2620
  { 143 /* bl */, SP::BPXCCA, Convert__Imm1_3__imm_95_3, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2621
  { 146 /* ble */, SP::BCOND, Convert__Imm1_0__imm_95_2, 0, { MCK_Imm }, },
2622
  { 146 /* ble */, SP::BPICC, Convert__Imm1_1__imm_95_2, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
2623
  { 146 /* ble */, SP::BPXCC, Convert__Imm1_1__imm_95_2, 0, { MCK__PCT_xcc, MCK_Imm }, },
2624
  { 146 /* ble */, SP::BCONDA, Convert__Imm1_1__imm_95_2, 0, { MCK_a, MCK_Imm }, },
2625
  { 146 /* ble */, SP::BPICCA, Convert__Imm1_2__imm_95_2, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
2626
  { 146 /* ble */, SP::BPXCCA, Convert__Imm1_2__imm_95_2, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
2627
  { 146 /* ble */, SP::BPICCNT, Convert__Imm1_2__imm_95_2, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2628
  { 146 /* ble */, SP::BPXCCNT, Convert__Imm1_2__imm_95_2, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2629
  { 146 /* ble */, SP::BPICC, Convert__Imm1_2__imm_95_2, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2630
  { 146 /* ble */, SP::BPXCC, Convert__Imm1_2__imm_95_2, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2631
  { 146 /* ble */, SP::BPICCANT, Convert__Imm1_3__imm_95_2, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2632
  { 146 /* ble */, SP::BPXCCANT, Convert__Imm1_3__imm_95_2, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2633
  { 146 /* ble */, SP::BPICCA, Convert__Imm1_3__imm_95_2, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2634
  { 146 /* ble */, SP::BPXCCA, Convert__Imm1_3__imm_95_2, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2635
  { 150 /* bleu */, SP::BCOND, Convert__Imm1_0__imm_95_4, 0, { MCK_Imm }, },
2636
  { 150 /* bleu */, SP::BPICC, Convert__Imm1_1__imm_95_4, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
2637
  { 150 /* bleu */, SP::BPXCC, Convert__Imm1_1__imm_95_4, 0, { MCK__PCT_xcc, MCK_Imm }, },
2638
  { 150 /* bleu */, SP::BCONDA, Convert__Imm1_1__imm_95_4, 0, { MCK_a, MCK_Imm }, },
2639
  { 150 /* bleu */, SP::BPICCA, Convert__Imm1_2__imm_95_4, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
2640
  { 150 /* bleu */, SP::BPXCCA, Convert__Imm1_2__imm_95_4, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
2641
  { 150 /* bleu */, SP::BPICCNT, Convert__Imm1_2__imm_95_4, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2642
  { 150 /* bleu */, SP::BPXCCNT, Convert__Imm1_2__imm_95_4, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2643
  { 150 /* bleu */, SP::BPICC, Convert__Imm1_2__imm_95_4, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2644
  { 150 /* bleu */, SP::BPXCC, Convert__Imm1_2__imm_95_4, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2645
  { 150 /* bleu */, SP::BPICCANT, Convert__Imm1_3__imm_95_4, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2646
  { 150 /* bleu */, SP::BPXCCANT, Convert__Imm1_3__imm_95_4, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2647
  { 150 /* bleu */, SP::BPICCA, Convert__Imm1_3__imm_95_4, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2648
  { 150 /* bleu */, SP::BPXCCA, Convert__Imm1_3__imm_95_4, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2649
  { 155 /* blu */, SP::BCOND, Convert__Imm1_0__imm_95_5, 0, { MCK_Imm }, },
2650
  { 155 /* blu */, SP::BPICC, Convert__Imm1_1__imm_95_5, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
2651
  { 155 /* blu */, SP::BPXCC, Convert__Imm1_1__imm_95_5, 0, { MCK__PCT_xcc, MCK_Imm }, },
2652
  { 155 /* blu */, SP::BCONDA, Convert__Imm1_1__imm_95_5, 0, { MCK_a, MCK_Imm }, },
2653
  { 155 /* blu */, SP::BPICCA, Convert__Imm1_2__imm_95_5, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
2654
  { 155 /* blu */, SP::BPXCCA, Convert__Imm1_2__imm_95_5, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
2655
  { 155 /* blu */, SP::BPICCNT, Convert__Imm1_2__imm_95_5, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2656
  { 155 /* blu */, SP::BPXCCNT, Convert__Imm1_2__imm_95_5, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2657
  { 155 /* blu */, SP::BPICC, Convert__Imm1_2__imm_95_5, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2658
  { 155 /* blu */, SP::BPXCC, Convert__Imm1_2__imm_95_5, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2659
  { 155 /* blu */, SP::BPICCANT, Convert__Imm1_3__imm_95_5, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2660
  { 155 /* blu */, SP::BPXCCANT, Convert__Imm1_3__imm_95_5, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2661
  { 155 /* blu */, SP::BPICCA, Convert__Imm1_3__imm_95_5, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2662
  { 155 /* blu */, SP::BPXCCA, Convert__Imm1_3__imm_95_5, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2663
  { 159 /* bmask */, SP::BMASK, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS2, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
2664
  { 165 /* bn */, SP::BCOND, Convert__Imm1_0__imm_95_0, 0, { MCK_Imm }, },
2665
  { 165 /* bn */, SP::BPICC, Convert__Imm1_1__imm_95_0, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
2666
  { 165 /* bn */, SP::BPXCC, Convert__Imm1_1__imm_95_0, 0, { MCK__PCT_xcc, MCK_Imm }, },
2667
  { 165 /* bn */, SP::BCONDA, Convert__Imm1_1__imm_95_0, 0, { MCK_a, MCK_Imm }, },
2668
  { 165 /* bn */, SP::BPICCA, Convert__Imm1_2__imm_95_0, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
2669
  { 165 /* bn */, SP::BPXCCA, Convert__Imm1_2__imm_95_0, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
2670
  { 165 /* bn */, SP::BPICCNT, Convert__Imm1_2__imm_95_0, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2671
  { 165 /* bn */, SP::BPXCCNT, Convert__Imm1_2__imm_95_0, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2672
  { 165 /* bn */, SP::BPICC, Convert__Imm1_2__imm_95_0, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2673
  { 165 /* bn */, SP::BPXCC, Convert__Imm1_2__imm_95_0, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2674
  { 165 /* bn */, SP::BPICCANT, Convert__Imm1_3__imm_95_0, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2675
  { 165 /* bn */, SP::BPXCCANT, Convert__Imm1_3__imm_95_0, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2676
  { 165 /* bn */, SP::BPICCA, Convert__Imm1_3__imm_95_0, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2677
  { 165 /* bn */, SP::BPXCCA, Convert__Imm1_3__imm_95_0, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2678
  { 168 /* bne */, SP::BCOND, Convert__Imm1_0__imm_95_9, 0, { MCK_Imm }, },
2679
  { 168 /* bne */, SP::BPICC, Convert__Imm1_1__imm_95_9, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
2680
  { 168 /* bne */, SP::BPXCC, Convert__Imm1_1__imm_95_9, 0, { MCK__PCT_xcc, MCK_Imm }, },
2681
  { 168 /* bne */, SP::BCONDA, Convert__Imm1_1__imm_95_9, 0, { MCK_a, MCK_Imm }, },
2682
  { 168 /* bne */, SP::BPICCA, Convert__Imm1_2__imm_95_9, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
2683
  { 168 /* bne */, SP::BPXCCA, Convert__Imm1_2__imm_95_9, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
2684
  { 168 /* bne */, SP::BPICCNT, Convert__Imm1_2__imm_95_9, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2685
  { 168 /* bne */, SP::BPXCCNT, Convert__Imm1_2__imm_95_9, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2686
  { 168 /* bne */, SP::BPICC, Convert__Imm1_2__imm_95_9, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2687
  { 168 /* bne */, SP::BPXCC, Convert__Imm1_2__imm_95_9, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2688
  { 168 /* bne */, SP::BPICCANT, Convert__Imm1_3__imm_95_9, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2689
  { 168 /* bne */, SP::BPXCCANT, Convert__Imm1_3__imm_95_9, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2690
  { 168 /* bne */, SP::BPICCA, Convert__Imm1_3__imm_95_9, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2691
  { 168 /* bne */, SP::BPXCCA, Convert__Imm1_3__imm_95_9, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2692
  { 172 /* bneg */, SP::BCOND, Convert__Imm1_0__imm_95_6, 0, { MCK_Imm }, },
2693
  { 172 /* bneg */, SP::BPICC, Convert__Imm1_1__imm_95_6, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
2694
  { 172 /* bneg */, SP::BPXCC, Convert__Imm1_1__imm_95_6, 0, { MCK__PCT_xcc, MCK_Imm }, },
2695
  { 172 /* bneg */, SP::BCONDA, Convert__Imm1_1__imm_95_6, 0, { MCK_a, MCK_Imm }, },
2696
  { 172 /* bneg */, SP::BPICCA, Convert__Imm1_2__imm_95_6, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
2697
  { 172 /* bneg */, SP::BPXCCA, Convert__Imm1_2__imm_95_6, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
2698
  { 172 /* bneg */, SP::BPICCNT, Convert__Imm1_2__imm_95_6, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2699
  { 172 /* bneg */, SP::BPXCCNT, Convert__Imm1_2__imm_95_6, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2700
  { 172 /* bneg */, SP::BPICC, Convert__Imm1_2__imm_95_6, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2701
  { 172 /* bneg */, SP::BPXCC, Convert__Imm1_2__imm_95_6, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2702
  { 172 /* bneg */, SP::BPICCANT, Convert__Imm1_3__imm_95_6, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2703
  { 172 /* bneg */, SP::BPXCCANT, Convert__Imm1_3__imm_95_6, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2704
  { 172 /* bneg */, SP::BPICCA, Convert__Imm1_3__imm_95_6, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2705
  { 172 /* bneg */, SP::BPXCCA, Convert__Imm1_3__imm_95_6, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2706
  { 177 /* bnz */, SP::BCOND, Convert__Imm1_0__imm_95_9, 0, { MCK_Imm }, },
2707
  { 177 /* bnz */, SP::BPICC, Convert__Imm1_1__imm_95_9, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
2708
  { 177 /* bnz */, SP::BPXCC, Convert__Imm1_1__imm_95_9, 0, { MCK__PCT_xcc, MCK_Imm }, },
2709
  { 177 /* bnz */, SP::BCONDA, Convert__Imm1_1__imm_95_9, 0, { MCK_a, MCK_Imm }, },
2710
  { 177 /* bnz */, SP::BPICCA, Convert__Imm1_2__imm_95_9, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
2711
  { 177 /* bnz */, SP::BPXCCA, Convert__Imm1_2__imm_95_9, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
2712
  { 177 /* bnz */, SP::BPICCNT, Convert__Imm1_2__imm_95_9, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2713
  { 177 /* bnz */, SP::BPXCCNT, Convert__Imm1_2__imm_95_9, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2714
  { 177 /* bnz */, SP::BPICC, Convert__Imm1_2__imm_95_9, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2715
  { 177 /* bnz */, SP::BPXCC, Convert__Imm1_2__imm_95_9, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2716
  { 177 /* bnz */, SP::BPICCANT, Convert__Imm1_3__imm_95_9, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2717
  { 177 /* bnz */, SP::BPXCCANT, Convert__Imm1_3__imm_95_9, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2718
  { 177 /* bnz */, SP::BPICCA, Convert__Imm1_3__imm_95_9, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2719
  { 177 /* bnz */, SP::BPXCCA, Convert__Imm1_3__imm_95_9, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2720
  { 181 /* bpos */, SP::BCOND, Convert__Imm1_0__imm_95_14, 0, { MCK_Imm }, },
2721
  { 181 /* bpos */, SP::BPICC, Convert__Imm1_1__imm_95_14, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
2722
  { 181 /* bpos */, SP::BPXCC, Convert__Imm1_1__imm_95_14, 0, { MCK__PCT_xcc, MCK_Imm }, },
2723
  { 181 /* bpos */, SP::BCONDA, Convert__Imm1_1__imm_95_14, 0, { MCK_a, MCK_Imm }, },
2724
  { 181 /* bpos */, SP::BPICCA, Convert__Imm1_2__imm_95_14, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
2725
  { 181 /* bpos */, SP::BPXCCA, Convert__Imm1_2__imm_95_14, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
2726
  { 181 /* bpos */, SP::BPICCNT, Convert__Imm1_2__imm_95_14, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2727
  { 181 /* bpos */, SP::BPXCCNT, Convert__Imm1_2__imm_95_14, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2728
  { 181 /* bpos */, SP::BPICC, Convert__Imm1_2__imm_95_14, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2729
  { 181 /* bpos */, SP::BPXCC, Convert__Imm1_2__imm_95_14, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2730
  { 181 /* bpos */, SP::BPICCANT, Convert__Imm1_3__imm_95_14, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2731
  { 181 /* bpos */, SP::BPXCCANT, Convert__Imm1_3__imm_95_14, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2732
  { 181 /* bpos */, SP::BPICCA, Convert__Imm1_3__imm_95_14, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2733
  { 181 /* bpos */, SP::BPXCCA, Convert__Imm1_3__imm_95_14, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2734
  { 186 /* brgez */, SP::BPGEZnapt, Convert__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm }, },
2735
  { 186 /* brgez */, SP::BPGEZapt, Convert__Reg1_1__Imm1_2, 0, { MCK_a, MCK_IntRegs, MCK_Imm }, },
2736
  { 186 /* brgez */, SP::BPGEZnapn, Convert__Reg1_1__Imm1_2, 0, { MCK_pn, MCK_IntRegs, MCK_Imm }, },
2737
  { 186 /* brgez */, SP::BPGEZnapt, Convert__Reg1_1__Imm1_2, 0, { MCK_pt, MCK_IntRegs, MCK_Imm }, },
2738
  { 186 /* brgez */, SP::BPGEZapn, Convert__Reg1_2__Imm1_3, 0, { MCK_a, MCK_pn, MCK_IntRegs, MCK_Imm }, },
2739
  { 186 /* brgez */, SP::BPGEZapt, Convert__Reg1_2__Imm1_3, 0, { MCK_a, MCK_pt, MCK_IntRegs, MCK_Imm }, },
2740
  { 192 /* brgz */, SP::BPGZnapt, Convert__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm }, },
2741
  { 192 /* brgz */, SP::BPGZapt, Convert__Reg1_1__Imm1_2, 0, { MCK_a, MCK_IntRegs, MCK_Imm }, },
2742
  { 192 /* brgz */, SP::BPGZnapn, Convert__Reg1_1__Imm1_2, 0, { MCK_pn, MCK_IntRegs, MCK_Imm }, },
2743
  { 192 /* brgz */, SP::BPGZnapt, Convert__Reg1_1__Imm1_2, 0, { MCK_pt, MCK_IntRegs, MCK_Imm }, },
2744
  { 192 /* brgz */, SP::BPGZapn, Convert__Reg1_2__Imm1_3, 0, { MCK_a, MCK_pn, MCK_IntRegs, MCK_Imm }, },
2745
  { 192 /* brgz */, SP::BPGZapt, Convert__Reg1_2__Imm1_3, 0, { MCK_a, MCK_pt, MCK_IntRegs, MCK_Imm }, },
2746
  { 197 /* brlez */, SP::BPLEZnapt, Convert__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm }, },
2747
  { 197 /* brlez */, SP::BPLEZapt, Convert__Reg1_1__Imm1_2, 0, { MCK_a, MCK_IntRegs, MCK_Imm }, },
2748
  { 197 /* brlez */, SP::BPLEZnapn, Convert__Reg1_1__Imm1_2, 0, { MCK_pn, MCK_IntRegs, MCK_Imm }, },
2749
  { 197 /* brlez */, SP::BPLEZnapt, Convert__Reg1_1__Imm1_2, 0, { MCK_pt, MCK_IntRegs, MCK_Imm }, },
2750
  { 197 /* brlez */, SP::BPLEZapn, Convert__Reg1_2__Imm1_3, 0, { MCK_a, MCK_pn, MCK_IntRegs, MCK_Imm }, },
2751
  { 197 /* brlez */, SP::BPLEZapt, Convert__Reg1_2__Imm1_3, 0, { MCK_a, MCK_pt, MCK_IntRegs, MCK_Imm }, },
2752
  { 203 /* brlz */, SP::BPLZnapt, Convert__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm }, },
2753
  { 203 /* brlz */, SP::BPLZapt, Convert__Reg1_1__Imm1_2, 0, { MCK_a, MCK_IntRegs, MCK_Imm }, },
2754
  { 203 /* brlz */, SP::BPLZnapn, Convert__Reg1_1__Imm1_2, 0, { MCK_pn, MCK_IntRegs, MCK_Imm }, },
2755
  { 203 /* brlz */, SP::BPLZnapt, Convert__Reg1_1__Imm1_2, 0, { MCK_pt, MCK_IntRegs, MCK_Imm }, },
2756
  { 203 /* brlz */, SP::BPLZapn, Convert__Reg1_2__Imm1_3, 0, { MCK_a, MCK_pn, MCK_IntRegs, MCK_Imm }, },
2757
  { 203 /* brlz */, SP::BPLZapt, Convert__Reg1_2__Imm1_3, 0, { MCK_a, MCK_pt, MCK_IntRegs, MCK_Imm }, },
2758
  { 208 /* brnz */, SP::BPNZnapt, Convert__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm }, },
2759
  { 208 /* brnz */, SP::BPNZapt, Convert__Reg1_1__Imm1_2, 0, { MCK_a, MCK_IntRegs, MCK_Imm }, },
2760
  { 208 /* brnz */, SP::BPNZnapn, Convert__Reg1_1__Imm1_2, 0, { MCK_pn, MCK_IntRegs, MCK_Imm }, },
2761
  { 208 /* brnz */, SP::BPNZnapt, Convert__Reg1_1__Imm1_2, 0, { MCK_pt, MCK_IntRegs, MCK_Imm }, },
2762
  { 208 /* brnz */, SP::BPNZapn, Convert__Reg1_2__Imm1_3, 0, { MCK_a, MCK_pn, MCK_IntRegs, MCK_Imm }, },
2763
  { 208 /* brnz */, SP::BPNZapt, Convert__Reg1_2__Imm1_3, 0, { MCK_a, MCK_pt, MCK_IntRegs, MCK_Imm }, },
2764
  { 213 /* brz */, SP::BPZnapt, Convert__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm }, },
2765
  { 213 /* brz */, SP::BPZapt, Convert__Reg1_1__Imm1_2, 0, { MCK_a, MCK_IntRegs, MCK_Imm }, },
2766
  { 213 /* brz */, SP::BPZnapn, Convert__Reg1_1__Imm1_2, 0, { MCK_pn, MCK_IntRegs, MCK_Imm }, },
2767
  { 213 /* brz */, SP::BPZnapt, Convert__Reg1_1__Imm1_2, 0, { MCK_pt, MCK_IntRegs, MCK_Imm }, },
2768
  { 213 /* brz */, SP::BPZapn, Convert__Reg1_2__Imm1_3, 0, { MCK_a, MCK_pn, MCK_IntRegs, MCK_Imm }, },
2769
  { 213 /* brz */, SP::BPZapt, Convert__Reg1_2__Imm1_3, 0, { MCK_a, MCK_pt, MCK_IntRegs, MCK_Imm }, },
2770
  { 217 /* bset */, SP::ORrr, Convert__Reg1_1__Reg1_1__Reg1_0, 0, { MCK_IntRegs, MCK_IntRegs }, },
2771
  { 217 /* bset */, SP::ORri, Convert__Reg1_1__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_IntRegs }, },
2772
  { 222 /* bshuffle */, SP::BSHUFFLE, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS2, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
2773
  { 231 /* btog */, SP::XORrr, Convert__Reg1_1__Reg1_1__Reg1_0, 0, { MCK_IntRegs, MCK_IntRegs }, },
2774
  { 231 /* btog */, SP::XORri, Convert__Reg1_1__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_IntRegs }, },
2775
  { 236 /* btst */, SP::ANDCCrr, Convert__regG0__Reg1_1__Reg1_0, 0, { MCK_IntRegs, MCK_IntRegs }, },
2776
  { 236 /* btst */, SP::ANDCCri, Convert__regG0__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_IntRegs }, },
2777
  { 241 /* bvc */, SP::BCOND, Convert__Imm1_0__imm_95_15, 0, { MCK_Imm }, },
2778
  { 241 /* bvc */, SP::BPICC, Convert__Imm1_1__imm_95_15, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
2779
  { 241 /* bvc */, SP::BPXCC, Convert__Imm1_1__imm_95_15, 0, { MCK__PCT_xcc, MCK_Imm }, },
2780
  { 241 /* bvc */, SP::BCONDA, Convert__Imm1_1__imm_95_15, 0, { MCK_a, MCK_Imm }, },
2781
  { 241 /* bvc */, SP::BPICCA, Convert__Imm1_2__imm_95_15, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
2782
  { 241 /* bvc */, SP::BPXCCA, Convert__Imm1_2__imm_95_15, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
2783
  { 241 /* bvc */, SP::BPICCNT, Convert__Imm1_2__imm_95_15, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2784
  { 241 /* bvc */, SP::BPXCCNT, Convert__Imm1_2__imm_95_15, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2785
  { 241 /* bvc */, SP::BPICC, Convert__Imm1_2__imm_95_15, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2786
  { 241 /* bvc */, SP::BPXCC, Convert__Imm1_2__imm_95_15, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2787
  { 241 /* bvc */, SP::BPICCANT, Convert__Imm1_3__imm_95_15, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2788
  { 241 /* bvc */, SP::BPXCCANT, Convert__Imm1_3__imm_95_15, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2789
  { 241 /* bvc */, SP::BPICCA, Convert__Imm1_3__imm_95_15, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2790
  { 241 /* bvc */, SP::BPXCCA, Convert__Imm1_3__imm_95_15, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2791
  { 245 /* bvs */, SP::BCOND, Convert__Imm1_0__imm_95_7, 0, { MCK_Imm }, },
2792
  { 245 /* bvs */, SP::BPICC, Convert__Imm1_1__imm_95_7, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
2793
  { 245 /* bvs */, SP::BPXCC, Convert__Imm1_1__imm_95_7, 0, { MCK__PCT_xcc, MCK_Imm }, },
2794
  { 245 /* bvs */, SP::BCONDA, Convert__Imm1_1__imm_95_7, 0, { MCK_a, MCK_Imm }, },
2795
  { 245 /* bvs */, SP::BPICCA, Convert__Imm1_2__imm_95_7, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
2796
  { 245 /* bvs */, SP::BPXCCA, Convert__Imm1_2__imm_95_7, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
2797
  { 245 /* bvs */, SP::BPICCNT, Convert__Imm1_2__imm_95_7, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2798
  { 245 /* bvs */, SP::BPXCCNT, Convert__Imm1_2__imm_95_7, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2799
  { 245 /* bvs */, SP::BPICC, Convert__Imm1_2__imm_95_7, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2800
  { 245 /* bvs */, SP::BPXCC, Convert__Imm1_2__imm_95_7, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2801
  { 245 /* bvs */, SP::BPICCANT, Convert__Imm1_3__imm_95_7, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2802
  { 245 /* bvs */, SP::BPXCCANT, Convert__Imm1_3__imm_95_7, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2803
  { 245 /* bvs */, SP::BPICCA, Convert__Imm1_3__imm_95_7, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2804
  { 245 /* bvs */, SP::BPXCCA, Convert__Imm1_3__imm_95_7, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2805
  { 249 /* bz */, SP::BCOND, Convert__Imm1_0__imm_95_1, 0, { MCK_Imm }, },
2806
  { 249 /* bz */, SP::BPICC, Convert__Imm1_1__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
2807
  { 249 /* bz */, SP::BPXCC, Convert__Imm1_1__imm_95_1, 0, { MCK__PCT_xcc, MCK_Imm }, },
2808
  { 249 /* bz */, SP::BCONDA, Convert__Imm1_1__imm_95_1, 0, { MCK_a, MCK_Imm }, },
2809
  { 249 /* bz */, SP::BPICCA, Convert__Imm1_2__imm_95_1, Feature_HasV9, { MCK_a, MCK__PCT_icc, MCK_Imm }, },
2810
  { 249 /* bz */, SP::BPXCCA, Convert__Imm1_2__imm_95_1, 0, { MCK_a, MCK__PCT_xcc, MCK_Imm }, },
2811
  { 249 /* bz */, SP::BPICCNT, Convert__Imm1_2__imm_95_1, Feature_HasV9, { MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2812
  { 249 /* bz */, SP::BPXCCNT, Convert__Imm1_2__imm_95_1, 0, { MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2813
  { 249 /* bz */, SP::BPICC, Convert__Imm1_2__imm_95_1, Feature_HasV9, { MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2814
  { 249 /* bz */, SP::BPXCC, Convert__Imm1_2__imm_95_1, 0, { MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2815
  { 249 /* bz */, SP::BPICCANT, Convert__Imm1_3__imm_95_1, Feature_HasV9, { MCK_a, MCK_pn, MCK__PCT_icc, MCK_Imm }, },
2816
  { 249 /* bz */, SP::BPXCCANT, Convert__Imm1_3__imm_95_1, 0, { MCK_a, MCK_pn, MCK__PCT_xcc, MCK_Imm }, },
2817
  { 249 /* bz */, SP::BPICCA, Convert__Imm1_3__imm_95_1, Feature_HasV9, { MCK_a, MCK_pt, MCK__PCT_icc, MCK_Imm }, },
2818
  { 249 /* bz */, SP::BPXCCA, Convert__Imm1_3__imm_95_1, 0, { MCK_a, MCK_pt, MCK__PCT_xcc, MCK_Imm }, },
2819
  { 252 /* call */, SP::CALL, Convert__Imm1_0, 0, { MCK_Imm }, },
2820
  { 252 /* call */, SP::JMPLri, Convert__regO7__MEMri2_0, 0, { MCK_MEMri }, },
2821
  { 252 /* call */, SP::JMPLrr, Convert__regO7__MEMrr2_0, 0, { MCK_MEMrr }, },
2822
  { 252 /* call */, SP::TLS_CALL, Convert__Imm1_0__Imm1_1, 0, { MCK_Imm, MCK_Imm }, },
2823
  { 257 /* cas */, SP::CASrr, Convert__Reg1_4__Reg1_1__Reg1_3__Tie0_1_1, Feature_HasV9, { MCK__91_, MCK_IntRegs, MCK__93_, MCK_IntRegs, MCK_IntRegs }, },
2824
  { 261 /* casa */, SP::CASAasi10, Convert__Reg1_5__Reg1_1__Reg1_4__Tie0_1_1, 0, { MCK__91_, MCK_IntRegs, MCK__93_, MCK_10, MCK_IntRegs, MCK_IntRegs }, },
2825
  { 261 /* casa */, SP::CASArr, Convert__Reg1_5__Reg1_1__Reg1_4__Tie0_1_1__Imm1_3, 0, { MCK__91_, MCK_IntRegs, MCK__93_, MCK_Imm, MCK_IntRegs, MCK_IntRegs }, },
2826
  { 266 /* casx */, SP::CASXrr, Convert__Reg1_4__Reg1_1__Reg1_3__Tie0_1_1, 0, { MCK__91_, MCK_IntRegs, MCK__93_, MCK_IntRegs, MCK_IntRegs }, },
2827
  { 271 /* cb */, SP::CBCOND, Convert__Imm1_0__imm_95_8, 0, { MCK_Imm }, },
2828
  { 271 /* cb */, SP::CBCONDA, Convert__Imm1_1__imm_95_8, 0, { MCK_a, MCK_Imm }, },
2829
  { 271 /* cb */, SP::CBCOND, Convert__Imm1_1__Imm1_0, 0, { MCK_Imm, MCK_Imm }, },
2830
  { 271 /* cb */, SP::CBCONDA, Convert__Imm1_2__Imm1_0, 0, { MCK_Imm, MCK_a, MCK_Imm }, },
2831
  { 274 /* cb0 */, SP::CBCOND, Convert__Imm1_0__imm_95_9, 0, { MCK_Imm }, },
2832
  { 274 /* cb0 */, SP::CBCONDA, Convert__Imm1_1__imm_95_9, 0, { MCK_a, MCK_Imm }, },
2833
  { 278 /* cb01 */, SP::CBCOND, Convert__Imm1_0__imm_95_13, 0, { MCK_Imm }, },
2834
  { 278 /* cb01 */, SP::CBCONDA, Convert__Imm1_1__imm_95_13, 0, { MCK_a, MCK_Imm }, },
2835
  { 283 /* cb012 */, SP::CBCOND, Convert__Imm1_0__imm_95_15, 0, { MCK_Imm }, },
2836
  { 283 /* cb012 */, SP::CBCONDA, Convert__Imm1_1__imm_95_15, 0, { MCK_a, MCK_Imm }, },
2837
  { 289 /* cb013 */, SP::CBCOND, Convert__Imm1_0__imm_95_14, 0, { MCK_Imm }, },
2838
  { 289 /* cb013 */, SP::CBCONDA, Convert__Imm1_1__imm_95_14, 0, { MCK_a, MCK_Imm }, },
2839
  { 295 /* cb02 */, SP::CBCOND, Convert__Imm1_0__imm_95_11, 0, { MCK_Imm }, },
2840
  { 295 /* cb02 */, SP::CBCONDA, Convert__Imm1_1__imm_95_11, 0, { MCK_a, MCK_Imm }, },
2841
  { 300 /* cb023 */, SP::CBCOND, Convert__Imm1_0__imm_95_12, 0, { MCK_Imm }, },
2842
  { 300 /* cb023 */, SP::CBCONDA, Convert__Imm1_1__imm_95_12, 0, { MCK_a, MCK_Imm }, },
2843
  { 306 /* cb03 */, SP::CBCOND, Convert__Imm1_0__imm_95_10, 0, { MCK_Imm }, },
2844
  { 306 /* cb03 */, SP::CBCONDA, Convert__Imm1_1__imm_95_10, 0, { MCK_a, MCK_Imm }, },
2845
  { 311 /* cb1 */, SP::CBCOND, Convert__Imm1_0__imm_95_4, 0, { MCK_Imm }, },
2846
  { 311 /* cb1 */, SP::CBCONDA, Convert__Imm1_1__imm_95_4, 0, { MCK_a, MCK_Imm }, },
2847
  { 315 /* cb12 */, SP::CBCOND, Convert__Imm1_0__imm_95_2, 0, { MCK_Imm }, },
2848
  { 315 /* cb12 */, SP::CBCONDA, Convert__Imm1_1__imm_95_2, 0, { MCK_a, MCK_Imm }, },
2849
  { 320 /* cb123 */, SP::CBCOND, Convert__Imm1_0__imm_95_1, 0, { MCK_Imm }, },
2850
  { 320 /* cb123 */, SP::CBCONDA, Convert__Imm1_1__imm_95_1, 0, { MCK_a, MCK_Imm }, },
2851
  { 326 /* cb13 */, SP::CBCOND, Convert__Imm1_0__imm_95_3, 0, { MCK_Imm }, },
2852
  { 326 /* cb13 */, SP::CBCONDA, Convert__Imm1_1__imm_95_3, 0, { MCK_a, MCK_Imm }, },
2853
  { 331 /* cb2 */, SP::CBCOND, Convert__Imm1_0__imm_95_6, 0, { MCK_Imm }, },
2854
  { 331 /* cb2 */, SP::CBCONDA, Convert__Imm1_1__imm_95_6, 0, { MCK_a, MCK_Imm }, },
2855
  { 335 /* cb23 */, SP::CBCOND, Convert__Imm1_0__imm_95_5, 0, { MCK_Imm }, },
2856
  { 335 /* cb23 */, SP::CBCONDA, Convert__Imm1_1__imm_95_5, 0, { MCK_a, MCK_Imm }, },
2857
  { 340 /* cb3 */, SP::CBCOND, Convert__Imm1_0__imm_95_7, 0, { MCK_Imm }, },
2858
  { 340 /* cb3 */, SP::CBCONDA, Convert__Imm1_1__imm_95_7, 0, { MCK_a, MCK_Imm }, },
2859
  { 344 /* cba */, SP::CBCOND, Convert__Imm1_0__imm_95_8, 0, { MCK_Imm }, },
2860
  { 344 /* cba */, SP::CBCONDA, Convert__Imm1_1__imm_95_8, 0, { MCK_a, MCK_Imm }, },
2861
  { 348 /* cbn */, SP::CBCOND, Convert__Imm1_0__imm_95_0, 0, { MCK_Imm }, },
2862
  { 348 /* cbn */, SP::CBCONDA, Convert__Imm1_1__imm_95_0, 0, { MCK_a, MCK_Imm }, },
2863
  { 352 /* clr */, SP::ORrr, Convert__Reg1_0__regG0__regG0, 0, { MCK_IntRegs }, },
2864
  { 352 /* clr */, SP::STri, Convert__MEMri2_1__regG0, 0, { MCK__91_, MCK_MEMri, MCK__93_ }, },
2865
  { 352 /* clr */, SP::STrr, Convert__MEMrr2_1__regG0, 0, { MCK__91_, MCK_MEMrr, MCK__93_ }, },
2866
  { 356 /* clrb */, SP::STBri, Convert__MEMri2_1__regG0, 0, { MCK__91_, MCK_MEMri, MCK__93_ }, },
2867
  { 356 /* clrb */, SP::STBrr, Convert__MEMrr2_1__regG0, 0, { MCK__91_, MCK_MEMrr, MCK__93_ }, },
2868
  { 361 /* clrh */, SP::STHri, Convert__MEMri2_1__regG0, 0, { MCK__91_, MCK_MEMri, MCK__93_ }, },
2869
  { 361 /* clrh */, SP::STHrr, Convert__MEMrr2_1__regG0, 0, { MCK__91_, MCK_MEMrr, MCK__93_ }, },
2870
  { 366 /* cmask16 */, SP::CMASK16, Convert__Reg1_0, Feature_HasVIS3, { MCK_IntRegs }, },
2871
  { 374 /* cmask32 */, SP::CMASK32, Convert__Reg1_0, Feature_HasVIS3, { MCK_IntRegs }, },
2872
  { 382 /* cmask8 */, SP::CMASK8, Convert__Reg1_0, Feature_HasVIS3, { MCK_IntRegs }, },
2873
  { 389 /* cmp */, SP::CMPrr, Convert__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs }, },
2874
  { 389 /* cmp */, SP::CMPri, Convert__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm }, },
2875
  { 393 /* dec */, SP::SUBri, Convert__Reg1_0__Reg1_0__imm_95_1, 0, { MCK_IntRegs }, },
2876
  { 393 /* dec */, SP::SUBri, Convert__Reg1_1__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_IntRegs }, },
2877
  { 397 /* deccc */, SP::SUBCCri, Convert__Reg1_0__Reg1_0__imm_95_1, 0, { MCK_IntRegs }, },
2878
  { 397 /* deccc */, SP::SUBCCri, Convert__Reg1_1__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_IntRegs }, },
2879
  { 403 /* edge16 */, SP::EDGE16, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
2880
  { 410 /* edge16l */, SP::EDGE16L, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
2881
  { 418 /* edge16ln */, SP::EDGE16LN, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS2, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
2882
  { 427 /* edge16n */, SP::EDGE16N, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS2, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
2883
  { 435 /* edge32 */, SP::EDGE32, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
2884
  { 442 /* edge32l */, SP::EDGE32L, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
2885
  { 450 /* edge32ln */, SP::EDGE32LN, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS2, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
2886
  { 459 /* edge32n */, SP::EDGE32N, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS2, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
2887
  { 467 /* edge8 */, SP::EDGE8, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
2888
  { 473 /* edge8l */, SP::EDGE8L, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
2889
  { 480 /* edge8ln */, SP::EDGE8LN, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS2, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
2890
  { 488 /* edge8n */, SP::EDGE8N, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS2, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
2891
  { 495 /* fabsd */, SP::FABSD, Convert__Reg1_1__Reg1_0, Feature_HasV9, { MCK_DFPRegs, MCK_DFPRegs }, },
2892
  { 501 /* fabsq */, SP::FABSQ, Convert__Reg1_1__Reg1_0, Feature_HasV9, { MCK_QFPRegs, MCK_QFPRegs }, },
2893
  { 507 /* fabss */, SP::FABSS, Convert__Reg1_1__Reg1_0, 0, { MCK_FPRegs, MCK_FPRegs }, },
2894
  { 513 /* faddd */, SP::FADDD, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
2895
  { 519 /* faddq */, SP::FADDQ, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_QFPRegs, MCK_QFPRegs, MCK_QFPRegs }, },
2896
  { 525 /* fadds */, SP::FADDS, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_FPRegs, MCK_FPRegs, MCK_FPRegs }, },
2897
  { 531 /* faligndata */, SP::FALIGNADATA, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
2898
  { 542 /* fand */, SP::FAND, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
2899
  { 547 /* fandnot1 */, SP::FANDNOT1, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
2900
  { 556 /* fandnot1s */, SP::FANDNOT1S, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_FPRegs, MCK_FPRegs, MCK_FPRegs }, },
2901
  { 566 /* fandnot2 */, SP::FANDNOT2, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
2902
  { 575 /* fandnot2s */, SP::FANDNOT2S, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_FPRegs, MCK_FPRegs, MCK_FPRegs }, },
2903
  { 585 /* fands */, SP::FANDS, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_FPRegs, MCK_FPRegs, MCK_FPRegs }, },
2904
  { 591 /* fb */, SP::FBCOND, Convert__Imm1_0__imm_95_8, 0, { MCK_Imm }, },
2905
  { 591 /* fb */, SP::FBCONDA, Convert__Imm1_1__imm_95_8, 0, { MCK_a, MCK_Imm }, },
2906
  { 591 /* fb */, SP::BPFCC, Convert__Imm1_1__imm_95_8__Reg1_0, Feature_HasV9, { MCK_FCCRegs, MCK_Imm }, },
2907
  { 591 /* fb */, SP::FBCOND, Convert__Imm1_1__Imm1_0, 0, { MCK_Imm, MCK_Imm }, },
2908
  { 591 /* fb */, SP::BPFCCA, Convert__Imm1_2__imm_95_8__Reg1_1, Feature_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
2909
  { 591 /* fb */, SP::BPFCCNT, Convert__Imm1_2__imm_95_8__Reg1_1, Feature_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
2910
  { 591 /* fb */, SP::BPFCC, Convert__Imm1_2__imm_95_8__Reg1_1, Feature_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
2911
  { 591 /* fb */, SP::FBCONDA, Convert__Imm1_2__Imm1_0, 0, { MCK_Imm, MCK_a, MCK_Imm }, },
2912
  { 591 /* fb */, SP::BPFCC, Convert__Imm1_2__Imm1_0__Reg1_1, Feature_HasV9, { MCK_Imm, MCK_FCCRegs, MCK_Imm }, },
2913
  { 591 /* fb */, SP::BPFCCANT, Convert__Imm1_3__imm_95_8__Reg1_2, Feature_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
2914
  { 591 /* fb */, SP::BPFCCA, Convert__Imm1_3__imm_95_8__Reg1_2, Feature_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
2915
  { 591 /* fb */, SP::BPFCCA, Convert__Imm1_3__Imm1_0__Reg1_2, Feature_HasV9, { MCK_Imm, MCK_a, MCK_FCCRegs, MCK_Imm }, },
2916
  { 591 /* fb */, SP::BPFCCNT, Convert__Imm1_3__Imm1_0__Reg1_2, Feature_HasV9, { MCK_Imm, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
2917
  { 591 /* fb */, SP::BPFCCANT, Convert__Imm1_4__Imm1_0__Reg1_3, Feature_HasV9, { MCK_Imm, MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
2918
  { 594 /* fba */, SP::FBCOND, Convert__Imm1_0__imm_95_8, 0, { MCK_Imm }, },
2919
  { 594 /* fba */, SP::FBCONDA, Convert__Imm1_1__imm_95_8, 0, { MCK_a, MCK_Imm }, },
2920
  { 594 /* fba */, SP::BPFCC, Convert__Imm1_1__imm_95_8__Reg1_0, Feature_HasV9, { MCK_FCCRegs, MCK_Imm }, },
2921
  { 594 /* fba */, SP::BPFCCA, Convert__Imm1_2__imm_95_8__Reg1_1, Feature_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
2922
  { 594 /* fba */, SP::BPFCCNT, Convert__Imm1_2__imm_95_8__Reg1_1, Feature_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
2923
  { 594 /* fba */, SP::BPFCC, Convert__Imm1_2__imm_95_8__Reg1_1, Feature_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
2924
  { 594 /* fba */, SP::BPFCCANT, Convert__Imm1_3__imm_95_8__Reg1_2, Feature_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
2925
  { 594 /* fba */, SP::BPFCCA, Convert__Imm1_3__imm_95_8__Reg1_2, Feature_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
2926
  { 598 /* fbe */, SP::FBCOND, Convert__Imm1_0__imm_95_9, 0, { MCK_Imm }, },
2927
  { 598 /* fbe */, SP::FBCONDA, Convert__Imm1_1__imm_95_9, 0, { MCK_a, MCK_Imm }, },
2928
  { 598 /* fbe */, SP::BPFCC, Convert__Imm1_1__imm_95_9__Reg1_0, Feature_HasV9, { MCK_FCCRegs, MCK_Imm }, },
2929
  { 598 /* fbe */, SP::BPFCCA, Convert__Imm1_2__imm_95_9__Reg1_1, Feature_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
2930
  { 598 /* fbe */, SP::BPFCCNT, Convert__Imm1_2__imm_95_9__Reg1_1, Feature_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
2931
  { 598 /* fbe */, SP::BPFCC, Convert__Imm1_2__imm_95_9__Reg1_1, Feature_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
2932
  { 598 /* fbe */, SP::BPFCCANT, Convert__Imm1_3__imm_95_9__Reg1_2, Feature_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
2933
  { 598 /* fbe */, SP::BPFCCA, Convert__Imm1_3__imm_95_9__Reg1_2, Feature_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
2934
  { 602 /* fbg */, SP::FBCOND, Convert__Imm1_0__imm_95_6, 0, { MCK_Imm }, },
2935
  { 602 /* fbg */, SP::FBCONDA, Convert__Imm1_1__imm_95_6, 0, { MCK_a, MCK_Imm }, },
2936
  { 602 /* fbg */, SP::BPFCC, Convert__Imm1_1__imm_95_6__Reg1_0, Feature_HasV9, { MCK_FCCRegs, MCK_Imm }, },
2937
  { 602 /* fbg */, SP::BPFCCA, Convert__Imm1_2__imm_95_6__Reg1_1, Feature_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
2938
  { 602 /* fbg */, SP::BPFCCNT, Convert__Imm1_2__imm_95_6__Reg1_1, Feature_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
2939
  { 602 /* fbg */, SP::BPFCC, Convert__Imm1_2__imm_95_6__Reg1_1, Feature_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
2940
  { 602 /* fbg */, SP::BPFCCANT, Convert__Imm1_3__imm_95_6__Reg1_2, Feature_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
2941
  { 602 /* fbg */, SP::BPFCCA, Convert__Imm1_3__imm_95_6__Reg1_2, Feature_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
2942
  { 606 /* fbge */, SP::FBCOND, Convert__Imm1_0__imm_95_11, 0, { MCK_Imm }, },
2943
  { 606 /* fbge */, SP::FBCONDA, Convert__Imm1_1__imm_95_11, 0, { MCK_a, MCK_Imm }, },
2944
  { 606 /* fbge */, SP::BPFCC, Convert__Imm1_1__imm_95_11__Reg1_0, Feature_HasV9, { MCK_FCCRegs, MCK_Imm }, },
2945
  { 606 /* fbge */, SP::BPFCCA, Convert__Imm1_2__imm_95_11__Reg1_1, Feature_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
2946
  { 606 /* fbge */, SP::BPFCCNT, Convert__Imm1_2__imm_95_11__Reg1_1, Feature_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
2947
  { 606 /* fbge */, SP::BPFCC, Convert__Imm1_2__imm_95_11__Reg1_1, Feature_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
2948
  { 606 /* fbge */, SP::BPFCCANT, Convert__Imm1_3__imm_95_11__Reg1_2, Feature_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
2949
  { 606 /* fbge */, SP::BPFCCA, Convert__Imm1_3__imm_95_11__Reg1_2, Feature_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
2950
  { 611 /* fbl */, SP::FBCOND, Convert__Imm1_0__imm_95_4, 0, { MCK_Imm }, },
2951
  { 611 /* fbl */, SP::FBCONDA, Convert__Imm1_1__imm_95_4, 0, { MCK_a, MCK_Imm }, },
2952
  { 611 /* fbl */, SP::BPFCC, Convert__Imm1_1__imm_95_4__Reg1_0, Feature_HasV9, { MCK_FCCRegs, MCK_Imm }, },
2953
  { 611 /* fbl */, SP::BPFCCA, Convert__Imm1_2__imm_95_4__Reg1_1, Feature_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
2954
  { 611 /* fbl */, SP::BPFCCNT, Convert__Imm1_2__imm_95_4__Reg1_1, Feature_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
2955
  { 611 /* fbl */, SP::BPFCC, Convert__Imm1_2__imm_95_4__Reg1_1, Feature_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
2956
  { 611 /* fbl */, SP::BPFCCANT, Convert__Imm1_3__imm_95_4__Reg1_2, Feature_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
2957
  { 611 /* fbl */, SP::BPFCCA, Convert__Imm1_3__imm_95_4__Reg1_2, Feature_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
2958
  { 615 /* fble */, SP::FBCOND, Convert__Imm1_0__imm_95_13, 0, { MCK_Imm }, },
2959
  { 615 /* fble */, SP::FBCONDA, Convert__Imm1_1__imm_95_13, 0, { MCK_a, MCK_Imm }, },
2960
  { 615 /* fble */, SP::BPFCC, Convert__Imm1_1__imm_95_13__Reg1_0, Feature_HasV9, { MCK_FCCRegs, MCK_Imm }, },
2961
  { 615 /* fble */, SP::BPFCCA, Convert__Imm1_2__imm_95_13__Reg1_1, Feature_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
2962
  { 615 /* fble */, SP::BPFCCNT, Convert__Imm1_2__imm_95_13__Reg1_1, Feature_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
2963
  { 615 /* fble */, SP::BPFCC, Convert__Imm1_2__imm_95_13__Reg1_1, Feature_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
2964
  { 615 /* fble */, SP::BPFCCANT, Convert__Imm1_3__imm_95_13__Reg1_2, Feature_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
2965
  { 615 /* fble */, SP::BPFCCA, Convert__Imm1_3__imm_95_13__Reg1_2, Feature_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
2966
  { 620 /* fblg */, SP::FBCOND, Convert__Imm1_0__imm_95_2, 0, { MCK_Imm }, },
2967
  { 620 /* fblg */, SP::FBCONDA, Convert__Imm1_1__imm_95_2, 0, { MCK_a, MCK_Imm }, },
2968
  { 620 /* fblg */, SP::BPFCC, Convert__Imm1_1__imm_95_2__Reg1_0, Feature_HasV9, { MCK_FCCRegs, MCK_Imm }, },
2969
  { 620 /* fblg */, SP::BPFCCA, Convert__Imm1_2__imm_95_2__Reg1_1, Feature_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
2970
  { 620 /* fblg */, SP::BPFCCNT, Convert__Imm1_2__imm_95_2__Reg1_1, Feature_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
2971
  { 620 /* fblg */, SP::BPFCC, Convert__Imm1_2__imm_95_2__Reg1_1, Feature_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
2972
  { 620 /* fblg */, SP::BPFCCANT, Convert__Imm1_3__imm_95_2__Reg1_2, Feature_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
2973
  { 620 /* fblg */, SP::BPFCCA, Convert__Imm1_3__imm_95_2__Reg1_2, Feature_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
2974
  { 625 /* fbn */, SP::FBCOND, Convert__Imm1_0__imm_95_0, 0, { MCK_Imm }, },
2975
  { 625 /* fbn */, SP::FBCONDA, Convert__Imm1_1__imm_95_0, 0, { MCK_a, MCK_Imm }, },
2976
  { 625 /* fbn */, SP::BPFCC, Convert__Imm1_1__imm_95_0__Reg1_0, Feature_HasV9, { MCK_FCCRegs, MCK_Imm }, },
2977
  { 625 /* fbn */, SP::BPFCCA, Convert__Imm1_2__imm_95_0__Reg1_1, Feature_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
2978
  { 625 /* fbn */, SP::BPFCCNT, Convert__Imm1_2__imm_95_0__Reg1_1, Feature_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
2979
  { 625 /* fbn */, SP::BPFCC, Convert__Imm1_2__imm_95_0__Reg1_1, Feature_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
2980
  { 625 /* fbn */, SP::BPFCCANT, Convert__Imm1_3__imm_95_0__Reg1_2, Feature_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
2981
  { 625 /* fbn */, SP::BPFCCA, Convert__Imm1_3__imm_95_0__Reg1_2, Feature_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
2982
  { 629 /* fbne */, SP::FBCOND, Convert__Imm1_0__imm_95_1, 0, { MCK_Imm }, },
2983
  { 629 /* fbne */, SP::FBCONDA, Convert__Imm1_1__imm_95_1, 0, { MCK_a, MCK_Imm }, },
2984
  { 629 /* fbne */, SP::BPFCC, Convert__Imm1_1__imm_95_1__Reg1_0, Feature_HasV9, { MCK_FCCRegs, MCK_Imm }, },
2985
  { 629 /* fbne */, SP::BPFCCA, Convert__Imm1_2__imm_95_1__Reg1_1, Feature_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
2986
  { 629 /* fbne */, SP::BPFCCNT, Convert__Imm1_2__imm_95_1__Reg1_1, Feature_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
2987
  { 629 /* fbne */, SP::BPFCC, Convert__Imm1_2__imm_95_1__Reg1_1, Feature_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
2988
  { 629 /* fbne */, SP::BPFCCANT, Convert__Imm1_3__imm_95_1__Reg1_2, Feature_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
2989
  { 629 /* fbne */, SP::BPFCCA, Convert__Imm1_3__imm_95_1__Reg1_2, Feature_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
2990
  { 634 /* fbnz */, SP::FBCOND, Convert__Imm1_0__imm_95_1, 0, { MCK_Imm }, },
2991
  { 634 /* fbnz */, SP::FBCONDA, Convert__Imm1_1__imm_95_1, 0, { MCK_a, MCK_Imm }, },
2992
  { 634 /* fbnz */, SP::BPFCC, Convert__Imm1_1__imm_95_1__Reg1_0, Feature_HasV9, { MCK_FCCRegs, MCK_Imm }, },
2993
  { 634 /* fbnz */, SP::BPFCCA, Convert__Imm1_2__imm_95_1__Reg1_1, Feature_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
2994
  { 634 /* fbnz */, SP::BPFCCNT, Convert__Imm1_2__imm_95_1__Reg1_1, Feature_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
2995
  { 634 /* fbnz */, SP::BPFCC, Convert__Imm1_2__imm_95_1__Reg1_1, Feature_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
2996
  { 634 /* fbnz */, SP::BPFCCANT, Convert__Imm1_3__imm_95_1__Reg1_2, Feature_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
2997
  { 634 /* fbnz */, SP::BPFCCA, Convert__Imm1_3__imm_95_1__Reg1_2, Feature_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
2998
  { 639 /* fbo */, SP::FBCOND, Convert__Imm1_0__imm_95_15, 0, { MCK_Imm }, },
2999
  { 639 /* fbo */, SP::FBCONDA, Convert__Imm1_1__imm_95_15, 0, { MCK_a, MCK_Imm }, },
3000
  { 639 /* fbo */, SP::BPFCC, Convert__Imm1_1__imm_95_15__Reg1_0, Feature_HasV9, { MCK_FCCRegs, MCK_Imm }, },
3001
  { 639 /* fbo */, SP::BPFCCA, Convert__Imm1_2__imm_95_15__Reg1_1, Feature_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
3002
  { 639 /* fbo */, SP::BPFCCNT, Convert__Imm1_2__imm_95_15__Reg1_1, Feature_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
3003
  { 639 /* fbo */, SP::BPFCC, Convert__Imm1_2__imm_95_15__Reg1_1, Feature_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
3004
  { 639 /* fbo */, SP::BPFCCANT, Convert__Imm1_3__imm_95_15__Reg1_2, Feature_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
3005
  { 639 /* fbo */, SP::BPFCCA, Convert__Imm1_3__imm_95_15__Reg1_2, Feature_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
3006
  { 643 /* fbu */, SP::FBCOND, Convert__Imm1_0__imm_95_7, 0, { MCK_Imm }, },
3007
  { 643 /* fbu */, SP::FBCONDA, Convert__Imm1_1__imm_95_7, 0, { MCK_a, MCK_Imm }, },
3008
  { 643 /* fbu */, SP::BPFCC, Convert__Imm1_1__imm_95_7__Reg1_0, Feature_HasV9, { MCK_FCCRegs, MCK_Imm }, },
3009
  { 643 /* fbu */, SP::BPFCCA, Convert__Imm1_2__imm_95_7__Reg1_1, Feature_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
3010
  { 643 /* fbu */, SP::BPFCCNT, Convert__Imm1_2__imm_95_7__Reg1_1, Feature_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
3011
  { 643 /* fbu */, SP::BPFCC, Convert__Imm1_2__imm_95_7__Reg1_1, Feature_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
3012
  { 643 /* fbu */, SP::BPFCCANT, Convert__Imm1_3__imm_95_7__Reg1_2, Feature_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
3013
  { 643 /* fbu */, SP::BPFCCA, Convert__Imm1_3__imm_95_7__Reg1_2, Feature_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
3014
  { 647 /* fbue */, SP::FBCOND, Convert__Imm1_0__imm_95_10, 0, { MCK_Imm }, },
3015
  { 647 /* fbue */, SP::FBCONDA, Convert__Imm1_1__imm_95_10, 0, { MCK_a, MCK_Imm }, },
3016
  { 647 /* fbue */, SP::BPFCC, Convert__Imm1_1__imm_95_10__Reg1_0, Feature_HasV9, { MCK_FCCRegs, MCK_Imm }, },
3017
  { 647 /* fbue */, SP::BPFCCA, Convert__Imm1_2__imm_95_10__Reg1_1, Feature_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
3018
  { 647 /* fbue */, SP::BPFCCNT, Convert__Imm1_2__imm_95_10__Reg1_1, Feature_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
3019
  { 647 /* fbue */, SP::BPFCC, Convert__Imm1_2__imm_95_10__Reg1_1, Feature_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
3020
  { 647 /* fbue */, SP::BPFCCANT, Convert__Imm1_3__imm_95_10__Reg1_2, Feature_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
3021
  { 647 /* fbue */, SP::BPFCCA, Convert__Imm1_3__imm_95_10__Reg1_2, Feature_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
3022
  { 652 /* fbug */, SP::FBCOND, Convert__Imm1_0__imm_95_5, 0, { MCK_Imm }, },
3023
  { 652 /* fbug */, SP::FBCONDA, Convert__Imm1_1__imm_95_5, 0, { MCK_a, MCK_Imm }, },
3024
  { 652 /* fbug */, SP::BPFCC, Convert__Imm1_1__imm_95_5__Reg1_0, Feature_HasV9, { MCK_FCCRegs, MCK_Imm }, },
3025
  { 652 /* fbug */, SP::BPFCCA, Convert__Imm1_2__imm_95_5__Reg1_1, Feature_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
3026
  { 652 /* fbug */, SP::BPFCCNT, Convert__Imm1_2__imm_95_5__Reg1_1, Feature_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
3027
  { 652 /* fbug */, SP::BPFCC, Convert__Imm1_2__imm_95_5__Reg1_1, Feature_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
3028
  { 652 /* fbug */, SP::BPFCCANT, Convert__Imm1_3__imm_95_5__Reg1_2, Feature_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
3029
  { 652 /* fbug */, SP::BPFCCA, Convert__Imm1_3__imm_95_5__Reg1_2, Feature_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
3030
  { 657 /* fbuge */, SP::FBCOND, Convert__Imm1_0__imm_95_12, 0, { MCK_Imm }, },
3031
  { 657 /* fbuge */, SP::FBCONDA, Convert__Imm1_1__imm_95_12, 0, { MCK_a, MCK_Imm }, },
3032
  { 657 /* fbuge */, SP::BPFCC, Convert__Imm1_1__imm_95_12__Reg1_0, Feature_HasV9, { MCK_FCCRegs, MCK_Imm }, },
3033
  { 657 /* fbuge */, SP::BPFCCA, Convert__Imm1_2__imm_95_12__Reg1_1, Feature_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
3034
  { 657 /* fbuge */, SP::BPFCCNT, Convert__Imm1_2__imm_95_12__Reg1_1, Feature_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
3035
  { 657 /* fbuge */, SP::BPFCC, Convert__Imm1_2__imm_95_12__Reg1_1, Feature_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
3036
  { 657 /* fbuge */, SP::BPFCCANT, Convert__Imm1_3__imm_95_12__Reg1_2, Feature_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
3037
  { 657 /* fbuge */, SP::BPFCCA, Convert__Imm1_3__imm_95_12__Reg1_2, Feature_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
3038
  { 663 /* fbul */, SP::FBCOND, Convert__Imm1_0__imm_95_3, 0, { MCK_Imm }, },
3039
  { 663 /* fbul */, SP::FBCONDA, Convert__Imm1_1__imm_95_3, 0, { MCK_a, MCK_Imm }, },
3040
  { 663 /* fbul */, SP::BPFCC, Convert__Imm1_1__imm_95_3__Reg1_0, Feature_HasV9, { MCK_FCCRegs, MCK_Imm }, },
3041
  { 663 /* fbul */, SP::BPFCCA, Convert__Imm1_2__imm_95_3__Reg1_1, Feature_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
3042
  { 663 /* fbul */, SP::BPFCCNT, Convert__Imm1_2__imm_95_3__Reg1_1, Feature_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
3043
  { 663 /* fbul */, SP::BPFCC, Convert__Imm1_2__imm_95_3__Reg1_1, Feature_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
3044
  { 663 /* fbul */, SP::BPFCCANT, Convert__Imm1_3__imm_95_3__Reg1_2, Feature_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
3045
  { 663 /* fbul */, SP::BPFCCA, Convert__Imm1_3__imm_95_3__Reg1_2, Feature_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
3046
  { 668 /* fbule */, SP::FBCOND, Convert__Imm1_0__imm_95_14, 0, { MCK_Imm }, },
3047
  { 668 /* fbule */, SP::FBCONDA, Convert__Imm1_1__imm_95_14, 0, { MCK_a, MCK_Imm }, },
3048
  { 668 /* fbule */, SP::BPFCC, Convert__Imm1_1__imm_95_14__Reg1_0, Feature_HasV9, { MCK_FCCRegs, MCK_Imm }, },
3049
  { 668 /* fbule */, SP::BPFCCA, Convert__Imm1_2__imm_95_14__Reg1_1, Feature_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
3050
  { 668 /* fbule */, SP::BPFCCNT, Convert__Imm1_2__imm_95_14__Reg1_1, Feature_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
3051
  { 668 /* fbule */, SP::BPFCC, Convert__Imm1_2__imm_95_14__Reg1_1, Feature_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
3052
  { 668 /* fbule */, SP::BPFCCANT, Convert__Imm1_3__imm_95_14__Reg1_2, Feature_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
3053
  { 668 /* fbule */, SP::BPFCCA, Convert__Imm1_3__imm_95_14__Reg1_2, Feature_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
3054
  { 674 /* fbz */, SP::FBCOND, Convert__Imm1_0__imm_95_9, 0, { MCK_Imm }, },
3055
  { 674 /* fbz */, SP::FBCONDA, Convert__Imm1_1__imm_95_9, 0, { MCK_a, MCK_Imm }, },
3056
  { 674 /* fbz */, SP::BPFCC, Convert__Imm1_1__imm_95_9__Reg1_0, Feature_HasV9, { MCK_FCCRegs, MCK_Imm }, },
3057
  { 674 /* fbz */, SP::BPFCCA, Convert__Imm1_2__imm_95_9__Reg1_1, Feature_HasV9, { MCK_a, MCK_FCCRegs, MCK_Imm }, },
3058
  { 674 /* fbz */, SP::BPFCCNT, Convert__Imm1_2__imm_95_9__Reg1_1, Feature_HasV9, { MCK_pn, MCK_FCCRegs, MCK_Imm }, },
3059
  { 674 /* fbz */, SP::BPFCC, Convert__Imm1_2__imm_95_9__Reg1_1, Feature_HasV9, { MCK_pt, MCK_FCCRegs, MCK_Imm }, },
3060
  { 674 /* fbz */, SP::BPFCCANT, Convert__Imm1_3__imm_95_9__Reg1_2, Feature_HasV9, { MCK_a, MCK_pn, MCK_FCCRegs, MCK_Imm }, },
3061
  { 674 /* fbz */, SP::BPFCCA, Convert__Imm1_3__imm_95_9__Reg1_2, Feature_HasV9, { MCK_a, MCK_pt, MCK_FCCRegs, MCK_Imm }, },
3062
  { 678 /* fchksm16 */, SP::FCHKSM16, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3063
  { 687 /* fcmpd */, SP::V9FCMPD, Convert__regFCC0__Reg1_0__Reg1_1, 0, { MCK_DFPRegs, MCK_DFPRegs }, },
3064
  { 687 /* fcmpd */, SP::V9FCMPD, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3065
  { 693 /* fcmped */, SP::V9FCMPED, Convert__regFCC0__Reg1_0__Reg1_1, 0, { MCK_DFPRegs, MCK_DFPRegs }, },
3066
  { 693 /* fcmped */, SP::V9FCMPED, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3067
  { 700 /* fcmpeq */, SP::V9FCMPEQ, Convert__regFCC0__Reg1_0__Reg1_1, 0, { MCK_QFPRegs, MCK_QFPRegs }, },
3068
  { 700 /* fcmpeq */, SP::V9FCMPEQ, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
3069
  { 707 /* fcmpeq16 */, SP::FCMPEQ16, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_IntRegs }, },
3070
  { 716 /* fcmpeq32 */, SP::FCMPEQ32, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_IntRegs }, },
3071
  { 725 /* fcmpes */, SP::V9FCMPES, Convert__regFCC0__Reg1_0__Reg1_1, 0, { MCK_FPRegs, MCK_FPRegs }, },
3072
  { 725 /* fcmpes */, SP::V9FCMPES, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
3073
  { 732 /* fcmpgt16 */, SP::FCMPGT16, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_IntRegs }, },
3074
  { 741 /* fcmpgt32 */, SP::FCMPGT32, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_IntRegs }, },
3075
  { 750 /* fcmple16 */, SP::FCMPLE16, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_IntRegs }, },
3076
  { 759 /* fcmple32 */, SP::FCMPLE32, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_IntRegs }, },
3077
  { 768 /* fcmpne16 */, SP::FCMPNE16, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_IntRegs }, },
3078
  { 777 /* fcmpne32 */, SP::FCMPNE32, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_IntRegs }, },
3079
  { 786 /* fcmpq */, SP::V9FCMPQ, Convert__regFCC0__Reg1_0__Reg1_1, 0, { MCK_QFPRegs, MCK_QFPRegs }, },
3080
  { 786 /* fcmpq */, SP::V9FCMPQ, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
3081
  { 792 /* fcmps */, SP::V9FCMPS, Convert__regFCC0__Reg1_0__Reg1_1, 0, { MCK_FPRegs, MCK_FPRegs }, },
3082
  { 792 /* fcmps */, SP::V9FCMPS, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
3083
  { 798 /* fdivd */, SP::FDIVD, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3084
  { 804 /* fdivq */, SP::FDIVQ, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_QFPRegs, MCK_QFPRegs, MCK_QFPRegs }, },
3085
  { 810 /* fdivs */, SP::FDIVS, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_FPRegs, MCK_FPRegs, MCK_FPRegs }, },
3086
  { 816 /* fdmulq */, SP::FDMULQ, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_DFPRegs, MCK_DFPRegs, MCK_QFPRegs }, },
3087
  { 823 /* fdtoi */, SP::FDTOI, Convert__Reg1_1__Reg1_0, 0, { MCK_DFPRegs, MCK_FPRegs }, },
3088
  { 829 /* fdtoq */, SP::FDTOQ, Convert__Reg1_1__Reg1_0, 0, { MCK_DFPRegs, MCK_QFPRegs }, },
3089
  { 835 /* fdtos */, SP::FDTOS, Convert__Reg1_1__Reg1_0, 0, { MCK_DFPRegs, MCK_FPRegs }, },
3090
  { 841 /* fdtox */, SP::FDTOX, Convert__Reg1_1__Reg1_0, 0, { MCK_DFPRegs, MCK_DFPRegs }, },
3091
  { 847 /* fexpand */, SP::FEXPAND, Convert__Reg1_1__Reg1_0, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs }, },
3092
  { 855 /* fhaddd */, SP::FHADDD, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3093
  { 862 /* fhadds */, SP::FHADDS, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3094
  { 869 /* fhsubd */, SP::FHSUBD, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3095
  { 876 /* fhsubs */, SP::FHSUBS, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3096
  { 883 /* fitod */, SP::FITOD, Convert__Reg1_1__Reg1_0, 0, { MCK_FPRegs, MCK_DFPRegs }, },
3097
  { 889 /* fitoq */, SP::FITOQ, Convert__Reg1_1__Reg1_0, 0, { MCK_FPRegs, MCK_QFPRegs }, },
3098
  { 895 /* fitos */, SP::FITOS, Convert__Reg1_1__Reg1_0, 0, { MCK_FPRegs, MCK_FPRegs }, },
3099
  { 901 /* flcmpd */, SP::FLCMPD, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVIS3, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3100
  { 908 /* flcmps */, SP::FLCMPS, Convert__Reg1_0__Reg1_1__Reg1_2, Feature_HasVIS3, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3101
  { 915 /* flush */, SP::FLUSH, Convert_NoOperands, 0, {  }, },
3102
  { 915 /* flush */, SP::FLUSH, Convert_NoOperands, 0, { MCK__PCT_g0 }, },
3103
  { 915 /* flush */, SP::FLUSHri, Convert__MEMri2_0, 0, { MCK_MEMri }, },
3104
  { 915 /* flush */, SP::FLUSHrr, Convert__MEMrr2_0, 0, { MCK_MEMrr }, },
3105
  { 921 /* flushw */, SP::FLUSHW, Convert_NoOperands, Feature_HasV9, {  }, },
3106
  { 928 /* fmean16 */, SP::FMEAN16, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3107
  { 936 /* fmovd */, SP::FMOVD, Convert__Reg1_1__Reg1_0, Feature_HasV9, { MCK_DFPRegs, MCK_DFPRegs }, },
3108
  { 936 /* fmovd */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
3109
  { 936 /* fmovd */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
3110
  { 936 /* fmovd */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_8, Feature_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3111
  { 936 /* fmovd */, SP::FMOVD_FCC, Convert__Reg1_3__Reg1_2__Tie0_1_1__Imm1_0, Feature_HasV9, { MCK_Imm, MCK__PCT_fcc0, MCK_DFPRegs, MCK_DFPRegs }, },
3112
  { 936 /* fmovd */, SP::FMOVD_ICC, Convert__Reg1_3__Reg1_2__Tie0_1_1__Imm1_0, Feature_HasV9, { MCK_Imm, MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
3113
  { 936 /* fmovd */, SP::FMOVD_XCC, Convert__Reg1_3__Reg1_2__Tie0_1_1__Imm1_0, 0, { MCK_Imm, MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
3114
  { 936 /* fmovd */, SP::V9FMOVD_FCC, Convert__Reg1_3__Reg1_1__Reg1_2__Tie0_1_1__Imm1_0, Feature_HasV9, { MCK_Imm, MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3115
  { 942 /* fmovda */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
3116
  { 942 /* fmovda */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
3117
  { 942 /* fmovda */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_8, Feature_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3118
  { 949 /* fmovdcc */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
3119
  { 949 /* fmovdcc */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
3120
  { 957 /* fmovdcs */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
3121
  { 957 /* fmovdcs */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
3122
  { 965 /* fmovde */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
3123
  { 965 /* fmovde */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
3124
  { 965 /* fmovde */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_9, Feature_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3125
  { 972 /* fmovdeq */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
3126
  { 972 /* fmovdeq */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
3127
  { 980 /* fmovdg */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_10, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
3128
  { 980 /* fmovdg */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_10, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
3129
  { 980 /* fmovdg */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_6, Feature_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3130
  { 987 /* fmovdge */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_11, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
3131
  { 987 /* fmovdge */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_11, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
3132
  { 987 /* fmovdge */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_11, Feature_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3133
  { 995 /* fmovdgeu */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
3134
  { 995 /* fmovdgeu */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
3135
  { 1004 /* fmovdgu */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_12, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
3136
  { 1004 /* fmovdgu */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_12, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
3137
  { 1012 /* fmovdl */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_3, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
3138
  { 1012 /* fmovdl */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_3, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
3139
  { 1012 /* fmovdl */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_4, Feature_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3140
  { 1019 /* fmovdle */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_2, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
3141
  { 1019 /* fmovdle */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_2, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
3142
  { 1019 /* fmovdle */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_13, Feature_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3143
  { 1027 /* fmovdleu */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_4, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
3144
  { 1027 /* fmovdleu */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_4, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
3145
  { 1036 /* fmovdlg */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_2, Feature_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3146
  { 1044 /* fmovdlu */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
3147
  { 1044 /* fmovdlu */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
3148
  { 1052 /* fmovdn */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_0, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
3149
  { 1052 /* fmovdn */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_0, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
3150
  { 1052 /* fmovdn */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_0, Feature_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3151
  { 1059 /* fmovdne */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
3152
  { 1059 /* fmovdne */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
3153
  { 1059 /* fmovdne */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3154
  { 1067 /* fmovdneg */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_6, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
3155
  { 1067 /* fmovdneg */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_6, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
3156
  { 1076 /* fmovdnz */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
3157
  { 1076 /* fmovdnz */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
3158
  { 1076 /* fmovdnz */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3159
  { 1084 /* fmovdo */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_15, Feature_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3160
  { 1091 /* fmovdpos */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_14, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
3161
  { 1091 /* fmovdpos */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_14, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
3162
  { 1100 /* fmovdu */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_7, Feature_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3163
  { 1107 /* fmovdue */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_10, Feature_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3164
  { 1115 /* fmovdug */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_5, Feature_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3165
  { 1123 /* fmovduge */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_12, Feature_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3166
  { 1132 /* fmovdul */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_3, Feature_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3167
  { 1140 /* fmovdule */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_14, Feature_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3168
  { 1149 /* fmovdvc */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_15, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
3169
  { 1149 /* fmovdvc */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_15, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
3170
  { 1157 /* fmovdvs */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_7, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
3171
  { 1157 /* fmovdvs */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_7, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
3172
  { 1165 /* fmovdz */, SP::FMOVD_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_DFPRegs, MCK_DFPRegs }, },
3173
  { 1165 /* fmovdz */, SP::FMOVD_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, 0, { MCK__PCT_xcc, MCK_DFPRegs, MCK_DFPRegs }, },
3174
  { 1165 /* fmovdz */, SP::V9FMOVD_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_9, Feature_HasV9, { MCK_FCCRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3175
  { 1172 /* fmovq */, SP::FMOVQ, Convert__Reg1_1__Reg1_0, Feature_HasV9, { MCK_QFPRegs, MCK_QFPRegs }, },
3176
  { 1172 /* fmovq */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
3177
  { 1172 /* fmovq */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
3178
  { 1172 /* fmovq */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_8, Feature_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
3179
  { 1172 /* fmovq */, SP::FMOVQ_FCC, Convert__Reg1_3__Reg1_2__Tie0_1_1__Imm1_0, Feature_HasV9, { MCK_Imm, MCK__PCT_fcc0, MCK_QFPRegs, MCK_QFPRegs }, },
3180
  { 1172 /* fmovq */, SP::FMOVQ_ICC, Convert__Reg1_3__Reg1_2__Tie0_1_1__Imm1_0, Feature_HasV9, { MCK_Imm, MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
3181
  { 1172 /* fmovq */, SP::FMOVQ_XCC, Convert__Reg1_3__Reg1_2__Tie0_1_1__Imm1_0, 0, { MCK_Imm, MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
3182
  { 1172 /* fmovq */, SP::V9FMOVQ_FCC, Convert__Reg1_3__Reg1_1__Reg1_2__Tie0_1_1__Imm1_0, Feature_HasV9, { MCK_Imm, MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
3183
  { 1178 /* fmovqa */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
3184
  { 1178 /* fmovqa */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
3185
  { 1178 /* fmovqa */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_8, Feature_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
3186
  { 1185 /* fmovqcc */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
3187
  { 1185 /* fmovqcc */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
3188
  { 1193 /* fmovqcs */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
3189
  { 1193 /* fmovqcs */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
3190
  { 1201 /* fmovqe */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
3191
  { 1201 /* fmovqe */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
3192
  { 1201 /* fmovqe */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_9, Feature_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
3193
  { 1208 /* fmovqeq */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
3194
  { 1208 /* fmovqeq */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
3195
  { 1216 /* fmovqg */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_10, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
3196
  { 1216 /* fmovqg */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_10, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
3197
  { 1216 /* fmovqg */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_6, Feature_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
3198
  { 1223 /* fmovqge */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_11, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
3199
  { 1223 /* fmovqge */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_11, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
3200
  { 1223 /* fmovqge */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_11, Feature_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
3201
  { 1231 /* fmovqgeu */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
3202
  { 1231 /* fmovqgeu */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
3203
  { 1240 /* fmovqgu */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_12, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
3204
  { 1240 /* fmovqgu */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_12, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
3205
  { 1248 /* fmovql */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_3, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
3206
  { 1248 /* fmovql */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_3, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
3207
  { 1248 /* fmovql */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_4, Feature_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
3208
  { 1255 /* fmovqle */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_2, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
3209
  { 1255 /* fmovqle */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_2, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
3210
  { 1255 /* fmovqle */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_13, Feature_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
3211
  { 1263 /* fmovqleu */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_4, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
3212
  { 1263 /* fmovqleu */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_4, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
3213
  { 1272 /* fmovqlg */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_2, Feature_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
3214
  { 1280 /* fmovqlu */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
3215
  { 1280 /* fmovqlu */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
3216
  { 1288 /* fmovqn */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_0, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
3217
  { 1288 /* fmovqn */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_0, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
3218
  { 1288 /* fmovqn */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_0, Feature_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
3219
  { 1295 /* fmovqne */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
3220
  { 1295 /* fmovqne */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
3221
  { 1295 /* fmovqne */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
3222
  { 1303 /* fmovqneg */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_6, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
3223
  { 1303 /* fmovqneg */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_6, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
3224
  { 1312 /* fmovqnz */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
3225
  { 1312 /* fmovqnz */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
3226
  { 1312 /* fmovqnz */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
3227
  { 1320 /* fmovqo */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_15, Feature_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
3228
  { 1327 /* fmovqpos */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_14, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
3229
  { 1327 /* fmovqpos */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_14, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
3230
  { 1336 /* fmovqu */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_7, Feature_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
3231
  { 1343 /* fmovque */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_10, Feature_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
3232
  { 1351 /* fmovqug */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_5, Feature_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
3233
  { 1359 /* fmovquge */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_12, Feature_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
3234
  { 1368 /* fmovqul */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_3, Feature_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
3235
  { 1376 /* fmovqule */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_14, Feature_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
3236
  { 1385 /* fmovqvc */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_15, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
3237
  { 1385 /* fmovqvc */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_15, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
3238
  { 1393 /* fmovqvs */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_7, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
3239
  { 1393 /* fmovqvs */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_7, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
3240
  { 1401 /* fmovqz */, SP::FMOVQ_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_QFPRegs, MCK_QFPRegs }, },
3241
  { 1401 /* fmovqz */, SP::FMOVQ_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, 0, { MCK__PCT_xcc, MCK_QFPRegs, MCK_QFPRegs }, },
3242
  { 1401 /* fmovqz */, SP::V9FMOVQ_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_9, Feature_HasV9, { MCK_FCCRegs, MCK_QFPRegs, MCK_QFPRegs }, },
3243
  { 1408 /* fmovrdgez */, SP::FMOVRGEZD, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasV9, { MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
3244
  { 1418 /* fmovrdgz */, SP::FMOVRGZD, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasV9, { MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
3245
  { 1427 /* fmovrdlez */, SP::FMOVRLEZD, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasV9, { MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
3246
  { 1437 /* fmovrdlz */, SP::FMOVRLZD, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasV9, { MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
3247
  { 1446 /* fmovrdnz */, SP::FMOVRNZD, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasV9, { MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
3248
  { 1455 /* fmovrdz */, SP::FMOVRZD, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasV9, { MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
3249
  { 1463 /* fmovrqgez */, SP::FMOVRGEZQ, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasV9, { MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
3250
  { 1473 /* fmovrqgz */, SP::FMOVRGZQ, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasV9, { MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
3251
  { 1482 /* fmovrqlez */, SP::FMOVRLEZQ, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasV9, { MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
3252
  { 1492 /* fmovrqlz */, SP::FMOVRLZQ, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasV9, { MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
3253
  { 1501 /* fmovrqnz */, SP::FMOVRNZQ, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasV9, { MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
3254
  { 1510 /* fmovrqz */, SP::FMOVRZQ, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasV9, { MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
3255
  { 1518 /* fmovrsgez */, SP::FMOVRGEZS, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasV9, { MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
3256
  { 1528 /* fmovrsgz */, SP::FMOVRGZS, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasV9, { MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
3257
  { 1537 /* fmovrslez */, SP::FMOVRLEZS, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasV9, { MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
3258
  { 1547 /* fmovrslz */, SP::FMOVRLZS, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasV9, { MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
3259
  { 1556 /* fmovrsnz */, SP::FMOVRNZS, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasV9, { MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
3260
  { 1565 /* fmovrsz */, SP::FMOVRZS, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasV9, { MCK_IntRegs, MCK_FPRegs, MCK_FPRegs }, },
3261
  { 1573 /* fmovs */, SP::FMOVS, Convert__Reg1_1__Reg1_0, 0, { MCK_FPRegs, MCK_FPRegs }, },
3262
  { 1573 /* fmovs */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
3263
  { 1573 /* fmovs */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
3264
  { 1573 /* fmovs */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_8, Feature_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
3265
  { 1573 /* fmovs */, SP::FMOVS_FCC, Convert__Reg1_3__Reg1_2__Tie0_1_1__Imm1_0, Feature_HasV9, { MCK_Imm, MCK__PCT_fcc0, MCK_FPRegs, MCK_FPRegs }, },
3266
  { 1573 /* fmovs */, SP::FMOVS_ICC, Convert__Reg1_3__Reg1_2__Tie0_1_1__Imm1_0, Feature_HasV9, { MCK_Imm, MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
3267
  { 1573 /* fmovs */, SP::FMOVS_XCC, Convert__Reg1_3__Reg1_2__Tie0_1_1__Imm1_0, 0, { MCK_Imm, MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
3268
  { 1573 /* fmovs */, SP::V9FMOVS_FCC, Convert__Reg1_3__Reg1_1__Reg1_2__Tie0_1_1__Imm1_0, Feature_HasV9, { MCK_Imm, MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
3269
  { 1579 /* fmovsa */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
3270
  { 1579 /* fmovsa */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
3271
  { 1579 /* fmovsa */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_8, Feature_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
3272
  { 1586 /* fmovscc */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
3273
  { 1586 /* fmovscc */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
3274
  { 1594 /* fmovscs */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
3275
  { 1594 /* fmovscs */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
3276
  { 1602 /* fmovse */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
3277
  { 1602 /* fmovse */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
3278
  { 1602 /* fmovse */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_9, Feature_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
3279
  { 1609 /* fmovseq */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
3280
  { 1609 /* fmovseq */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
3281
  { 1617 /* fmovsg */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_10, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
3282
  { 1617 /* fmovsg */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_10, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
3283
  { 1617 /* fmovsg */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_6, Feature_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
3284
  { 1624 /* fmovsge */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_11, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
3285
  { 1624 /* fmovsge */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_11, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
3286
  { 1624 /* fmovsge */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_11, Feature_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
3287
  { 1632 /* fmovsgeu */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
3288
  { 1632 /* fmovsgeu */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
3289
  { 1641 /* fmovsgu */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_12, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
3290
  { 1641 /* fmovsgu */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_12, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
3291
  { 1649 /* fmovsl */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_3, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
3292
  { 1649 /* fmovsl */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_3, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
3293
  { 1649 /* fmovsl */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_4, Feature_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
3294
  { 1656 /* fmovsle */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_2, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
3295
  { 1656 /* fmovsle */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_2, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
3296
  { 1656 /* fmovsle */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_13, Feature_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
3297
  { 1664 /* fmovsleu */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_4, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
3298
  { 1664 /* fmovsleu */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_4, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
3299
  { 1673 /* fmovslg */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_2, Feature_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
3300
  { 1681 /* fmovslu */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
3301
  { 1681 /* fmovslu */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
3302
  { 1689 /* fmovsn */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_0, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
3303
  { 1689 /* fmovsn */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_0, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
3304
  { 1689 /* fmovsn */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_0, Feature_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
3305
  { 1696 /* fmovsne */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
3306
  { 1696 /* fmovsne */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
3307
  { 1696 /* fmovsne */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
3308
  { 1704 /* fmovsneg */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_6, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
3309
  { 1704 /* fmovsneg */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_6, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
3310
  { 1713 /* fmovsnz */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
3311
  { 1713 /* fmovsnz */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
3312
  { 1713 /* fmovsnz */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
3313
  { 1721 /* fmovso */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_15, Feature_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
3314
  { 1728 /* fmovspos */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_14, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
3315
  { 1728 /* fmovspos */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_14, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
3316
  { 1737 /* fmovsu */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_7, Feature_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
3317
  { 1744 /* fmovsue */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_10, Feature_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
3318
  { 1752 /* fmovsug */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_5, Feature_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
3319
  { 1760 /* fmovsuge */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_12, Feature_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
3320
  { 1769 /* fmovsul */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_3, Feature_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
3321
  { 1777 /* fmovsule */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_14, Feature_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
3322
  { 1786 /* fmovsvc */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_15, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
3323
  { 1786 /* fmovsvc */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_15, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
3324
  { 1794 /* fmovsvs */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_7, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
3325
  { 1794 /* fmovsvs */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_7, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
3326
  { 1802 /* fmovsz */, SP::FMOVS_ICC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_FPRegs, MCK_FPRegs }, },
3327
  { 1802 /* fmovsz */, SP::FMOVS_XCC, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, 0, { MCK__PCT_xcc, MCK_FPRegs, MCK_FPRegs }, },
3328
  { 1802 /* fmovsz */, SP::V9FMOVS_FCC, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_9, Feature_HasV9, { MCK_FCCRegs, MCK_FPRegs, MCK_FPRegs }, },
3329
  { 1809 /* fmul8sux16 */, SP::FMUL8SUX16, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3330
  { 1820 /* fmul8ulx16 */, SP::FMUL8ULX16, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3331
  { 1831 /* fmul8x16 */, SP::FMUL8X16, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3332
  { 1840 /* fmul8x16al */, SP::FMUL8X16AL, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3333
  { 1851 /* fmul8x16au */, SP::FMUL8X16AU, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3334
  { 1862 /* fmuld */, SP::FMULD, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3335
  { 1868 /* fmuld8sux16 */, SP::FMULD8SUX16, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3336
  { 1880 /* fmuld8ulx16 */, SP::FMULD8ULX16, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3337
  { 1892 /* fmulq */, SP::FMULQ, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_QFPRegs, MCK_QFPRegs, MCK_QFPRegs }, },
3338
  { 1898 /* fmuls */, SP::FMULS, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_FPRegs, MCK_FPRegs, MCK_FPRegs }, },
3339
  { 1904 /* fnaddd */, SP::FNADDD, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3340
  { 1911 /* fnadds */, SP::FNADDS, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3341
  { 1918 /* fnand */, SP::FNAND, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3342
  { 1924 /* fnands */, SP::FNANDS, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_FPRegs, MCK_FPRegs, MCK_FPRegs }, },
3343
  { 1931 /* fnegd */, SP::FNEGD, Convert__Reg1_1__Reg1_0, Feature_HasV9, { MCK_DFPRegs, MCK_DFPRegs }, },
3344
  { 1937 /* fnegq */, SP::FNEGQ, Convert__Reg1_1__Reg1_0, Feature_HasV9, { MCK_QFPRegs, MCK_QFPRegs }, },
3345
  { 1943 /* fnegs */, SP::FNEGS, Convert__Reg1_1__Reg1_0, 0, { MCK_FPRegs, MCK_FPRegs }, },
3346
  { 1949 /* fnhaddd */, SP::FNHADDD, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3347
  { 1949 /* fnhaddd */, SP::FNMULD, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3348
  { 1957 /* fnhadds */, SP::FNHADDS, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3349
  { 1957 /* fnhadds */, SP::FNMULS, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3350
  { 1957 /* fnhadds */, SP::FNSMULD, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3351
  { 1965 /* fnor */, SP::FNOR, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3352
  { 1970 /* fnors */, SP::FNORS, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_FPRegs, MCK_FPRegs, MCK_FPRegs }, },
3353
  { 1976 /* fnot1 */, SP::FNOT1, Convert__Reg1_1__Reg1_0, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs }, },
3354
  { 1982 /* fnot1s */, SP::FNOT1S, Convert__Reg1_1__Reg1_0, Feature_HasVIS, { MCK_FPRegs, MCK_FPRegs }, },
3355
  { 1989 /* fnot2 */, SP::FNOT2, Convert__Reg1_1__Reg1_0, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs }, },
3356
  { 1995 /* fnot2s */, SP::FNOT2S, Convert__Reg1_1__Reg1_0, Feature_HasVIS, { MCK_FPRegs, MCK_FPRegs }, },
3357
  { 2002 /* fone */, SP::FONE, Convert__Reg1_0__Tie0_1_1, Feature_HasVIS, { MCK_DFPRegs }, },
3358
  { 2007 /* fones */, SP::FONES, Convert__Reg1_0__Tie0_1_1, Feature_HasVIS, { MCK_FPRegs }, },
3359
  { 2013 /* for */, SP::FOR, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3360
  { 2017 /* fornot1 */, SP::FORNOT1, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3361
  { 2025 /* fornot1s */, SP::FORNOT1S, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_FPRegs, MCK_FPRegs, MCK_FPRegs }, },
3362
  { 2034 /* fornot2 */, SP::FORNOT2, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3363
  { 2042 /* fornot2s */, SP::FORNOT2S, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_FPRegs, MCK_FPRegs, MCK_FPRegs }, },
3364
  { 2051 /* fors */, SP::FORS, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_FPRegs, MCK_FPRegs, MCK_FPRegs }, },
3365
  { 2056 /* fpack16 */, SP::FPACK16, Convert__Reg1_1__Reg1_0, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs }, },
3366
  { 2064 /* fpack32 */, SP::FPACK32, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3367
  { 2072 /* fpackfix */, SP::FPACKFIX, Convert__Reg1_1__Reg1_0, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs }, },
3368
  { 2081 /* fpadd16 */, SP::FPADD16, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3369
  { 2089 /* fpadd16s */, SP::FPADD16S, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3370
  { 2098 /* fpadd32 */, SP::FPADD32, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3371
  { 2106 /* fpadd32s */, SP::FPADD32S, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3372
  { 2115 /* fpadd64 */, SP::FPADD64, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3373
  { 2123 /* fpmerge */, SP::FPMERGE, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3374
  { 2131 /* fpsub16 */, SP::FPSUB16, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3375
  { 2139 /* fpsub16S */, SP::FPSUB16S, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3376
  { 2148 /* fpsub32 */, SP::FPSUB32, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3377
  { 2156 /* fpsub32S */, SP::FPSUB32S, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3378
  { 2165 /* fqtod */, SP::FQTOD, Convert__Reg1_1__Reg1_0, 0, { MCK_QFPRegs, MCK_DFPRegs }, },
3379
  { 2171 /* fqtoi */, SP::FQTOI, Convert__Reg1_1__Reg1_0, 0, { MCK_QFPRegs, MCK_FPRegs }, },
3380
  { 2177 /* fqtos */, SP::FQTOS, Convert__Reg1_1__Reg1_0, 0, { MCK_QFPRegs, MCK_FPRegs }, },
3381
  { 2183 /* fqtox */, SP::FQTOX, Convert__Reg1_1__Reg1_0, 0, { MCK_QFPRegs, MCK_DFPRegs }, },
3382
  { 2189 /* fslas16 */, SP::FSLAS16, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3383
  { 2197 /* fslas32 */, SP::FSLAS32, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3384
  { 2205 /* fsll16 */, SP::FSLL16, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3385
  { 2212 /* fsll32 */, SP::FSLL32, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3386
  { 2219 /* fsmuld */, SP::FSMULD, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_FPRegs, MCK_FPRegs, MCK_DFPRegs }, },
3387
  { 2226 /* fsqrtd */, SP::FSQRTD, Convert__Reg1_1__Reg1_0, 0, { MCK_DFPRegs, MCK_DFPRegs }, },
3388
  { 2233 /* fsqrtq */, SP::FSQRTQ, Convert__Reg1_1__Reg1_0, 0, { MCK_QFPRegs, MCK_QFPRegs }, },
3389
  { 2240 /* fsqrts */, SP::FSQRTS, Convert__Reg1_1__Reg1_0, 0, { MCK_FPRegs, MCK_FPRegs }, },
3390
  { 2247 /* fsra16 */, SP::FSRA16, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3391
  { 2254 /* fsra32 */, SP::FSRA32, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3392
  { 2261 /* fsrc1 */, SP::FSRC1, Convert__Reg1_1__Reg1_0, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs }, },
3393
  { 2267 /* fsrc1s */, SP::FSRC1S, Convert__Reg1_1__Reg1_0, Feature_HasVIS, { MCK_FPRegs, MCK_FPRegs }, },
3394
  { 2274 /* fsrc2 */, SP::FSRC2, Convert__Reg1_1__Reg1_0, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs }, },
3395
  { 2280 /* fsrc2s */, SP::FSRC2S, Convert__Reg1_1__Reg1_0, Feature_HasVIS, { MCK_FPRegs, MCK_FPRegs }, },
3396
  { 2287 /* fsrl16 */, SP::FSRL16, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3397
  { 2294 /* fsrl32 */, SP::FSRL32, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3398
  { 2301 /* fstod */, SP::FSTOD, Convert__Reg1_1__Reg1_0, 0, { MCK_FPRegs, MCK_DFPRegs }, },
3399
  { 2307 /* fstoi */, SP::FSTOI, Convert__Reg1_1__Reg1_0, 0, { MCK_FPRegs, MCK_FPRegs }, },
3400
  { 2313 /* fstoq */, SP::FSTOQ, Convert__Reg1_1__Reg1_0, 0, { MCK_FPRegs, MCK_QFPRegs }, },
3401
  { 2319 /* fstox */, SP::FSTOX, Convert__Reg1_1__Reg1_0, 0, { MCK_FPRegs, MCK_DFPRegs }, },
3402
  { 2325 /* fsubd */, SP::FSUBD, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3403
  { 2331 /* fsubq */, SP::FSUBQ, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_QFPRegs, MCK_QFPRegs, MCK_QFPRegs }, },
3404
  { 2337 /* fsubs */, SP::FSUBS, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_FPRegs, MCK_FPRegs, MCK_FPRegs }, },
3405
  { 2343 /* fxnor */, SP::FXNOR, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3406
  { 2349 /* fxnors */, SP::FXNORS, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_FPRegs, MCK_FPRegs, MCK_FPRegs }, },
3407
  { 2356 /* fxor */, SP::FXOR, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3408
  { 2361 /* fxors */, SP::FXORS, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_FPRegs, MCK_FPRegs, MCK_FPRegs }, },
3409
  { 2367 /* fxtod */, SP::FXTOD, Convert__Reg1_1__Reg1_0, 0, { MCK_DFPRegs, MCK_DFPRegs }, },
3410
  { 2373 /* fxtoq */, SP::FXTOQ, Convert__Reg1_1__Reg1_0, 0, { MCK_DFPRegs, MCK_QFPRegs }, },
3411
  { 2379 /* fxtos */, SP::FXTOS, Convert__Reg1_1__Reg1_0, 0, { MCK_DFPRegs, MCK_FPRegs }, },
3412
  { 2385 /* fzero */, SP::FZERO, Convert__Reg1_0__Tie0_1_1, Feature_HasVIS, { MCK_DFPRegs }, },
3413
  { 2391 /* fzeros */, SP::FZEROS, Convert__Reg1_0__Tie0_1_1, Feature_HasVIS, { MCK_FPRegs }, },
3414
  { 2398 /* inc */, SP::ADDri, Convert__Reg1_0__Reg1_0__imm_95_1, 0, { MCK_IntRegs }, },
3415
  { 2398 /* inc */, SP::ADDri, Convert__Reg1_1__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_IntRegs }, },
3416
  { 2402 /* inccc */, SP::ADDCCri, Convert__Reg1_0__Reg1_0__imm_95_1, 0, { MCK_IntRegs }, },
3417
  { 2402 /* inccc */, SP::ADDCCri, Convert__Reg1_1__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_IntRegs }, },
3418
  { 2408 /* jmp */, SP::JMPLri, Convert__regG0__MEMri2_0, 0, { MCK_MEMri }, },
3419
  { 2408 /* jmp */, SP::JMPLrr, Convert__regG0__MEMrr2_0, 0, { MCK_MEMrr }, },
3420
  { 2412 /* jmpl */, SP::JMPLri, Convert__Reg1_1__MEMri2_0, 0, { MCK_MEMri, MCK_IntRegs }, },
3421
  { 2412 /* jmpl */, SP::JMPLrr, Convert__Reg1_1__MEMrr2_0, 0, { MCK_MEMrr, MCK_IntRegs }, },
3422
  { 2417 /* ld */, SP::LDCSRri, Convert__MEMri2_1, 0, { MCK__91_, MCK_MEMri, MCK__93_, MCK__PCT_csr }, },
3423
  { 2417 /* ld */, SP::LDFSRri, Convert__MEMri2_1, 0, { MCK__91_, MCK_MEMri, MCK__93_, MCK__PCT_fsr }, },
3424
  { 2417 /* ld */, SP::LDCri, Convert__Reg1_3__MEMri2_1, 0, { MCK__91_, MCK_MEMri, MCK__93_, MCK_CoprocRegs }, },
3425
  { 2417 /* ld */, SP::LDFri, Convert__Reg1_3__MEMri2_1, 0, { MCK__91_, MCK_MEMri, MCK__93_, MCK_FPRegs }, },
3426
  { 2417 /* ld */, SP::LDri, Convert__Reg1_3__MEMri2_1, 0, { MCK__91_, MCK_MEMri, MCK__93_, MCK_IntRegs }, },
3427
  { 2417 /* ld */, SP::LDCSRrr, Convert__MEMrr2_1, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK__PCT_csr }, },
3428
  { 2417 /* ld */, SP::LDFSRrr, Convert__MEMrr2_1, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK__PCT_fsr }, },
3429
  { 2417 /* ld */, SP::LDCrr, Convert__Reg1_3__MEMrr2_1, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_CoprocRegs }, },
3430
  { 2417 /* ld */, SP::LDFrr, Convert__Reg1_3__MEMrr2_1, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_FPRegs }, },
3431
  { 2417 /* ld */, SP::LDrr, Convert__Reg1_3__MEMrr2_1, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_IntRegs }, },
3432
  { 2417 /* ld */, SP::TLS_LDrr, Convert__Reg1_3__MEMrr2_1__Imm1_4, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_IntRegs, MCK_Imm }, },
3433
  { 2420 /* lda */, SP::LDFArr, Convert__Reg1_4__MEMrr2_1__Imm1_3, Feature_HasV9, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_Imm, MCK_FPRegs }, },
3434
  { 2420 /* lda */, SP::LDArr, Convert__Reg1_4__MEMrr2_1__Imm1_3, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_Imm, MCK_IntRegs }, },
3435
  { 2424 /* ldd */, SP::LDDCri, Convert__Reg1_3__MEMri2_1, 0, { MCK__91_, MCK_MEMri, MCK__93_, MCK_CoprocPair }, },
3436
  { 2424 /* ldd */, SP::LDDri, Convert__Reg1_3__MEMri2_1, 0, { MCK__91_, MCK_MEMri, MCK__93_, MCK_IntPair }, },
3437
  { 2424 /* ldd */, SP::LDDFri, Convert__Reg1_3__MEMri2_1, 0, { MCK__91_, MCK_MEMri, MCK__93_, MCK_DFPRegs }, },
3438
  { 2424 /* ldd */, SP::LDDCrr, Convert__Reg1_3__MEMrr2_1, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_CoprocPair }, },
3439
  { 2424 /* ldd */, SP::LDDrr, Convert__Reg1_3__MEMrr2_1, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_IntPair }, },
3440
  { 2424 /* ldd */, SP::LDDFrr, Convert__Reg1_3__MEMrr2_1, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_DFPRegs }, },
3441
  { 2428 /* ldda */, SP::LDDArr, Convert__Reg1_4__MEMrr2_1__Imm1_3, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_Imm, MCK_IntPair }, },
3442
  { 2428 /* ldda */, SP::LDDFArr, Convert__Reg1_4__MEMrr2_1__Imm1_3, Feature_HasV9, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_Imm, MCK_DFPRegs }, },
3443
  { 2433 /* ldq */, SP::LDQFri, Convert__Reg1_3__MEMri2_1, Feature_HasV9, { MCK__91_, MCK_MEMri, MCK__93_, MCK_QFPRegs }, },
3444
  { 2433 /* ldq */, SP::LDQFrr, Convert__Reg1_3__MEMrr2_1, Feature_HasV9, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_QFPRegs }, },
3445
  { 2437 /* ldqa */, SP::LDQFArr, Convert__Reg1_4__MEMrr2_1__Imm1_3, Feature_HasV9, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_Imm, MCK_QFPRegs }, },
3446
  { 2442 /* ldsb */, SP::LDSBri, Convert__Reg1_3__MEMri2_1, 0, { MCK__91_, MCK_MEMri, MCK__93_, MCK_IntRegs }, },
3447
  { 2442 /* ldsb */, SP::LDSBrr, Convert__Reg1_3__MEMrr2_1, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_IntRegs }, },
3448
  { 2447 /* ldsba */, SP::LDSBArr, Convert__Reg1_4__MEMrr2_1__Imm1_3, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_Imm, MCK_IntRegs }, },
3449
  { 2453 /* ldsh */, SP::LDSHri, Convert__Reg1_3__MEMri2_1, 0, { MCK__91_, MCK_MEMri, MCK__93_, MCK_IntRegs }, },
3450
  { 2453 /* ldsh */, SP::LDSHrr, Convert__Reg1_3__MEMrr2_1, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_IntRegs }, },
3451
  { 2458 /* ldsha */, SP::LDSHArr, Convert__Reg1_4__MEMrr2_1__Imm1_3, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_Imm, MCK_IntRegs }, },
3452
  { 2464 /* ldstub */, SP::LDSTUBri, Convert__Reg1_3__MEMri2_1, 0, { MCK__91_, MCK_MEMri, MCK__93_, MCK_IntRegs }, },
3453
  { 2464 /* ldstub */, SP::LDSTUBrr, Convert__Reg1_3__MEMrr2_1, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_IntRegs }, },
3454
  { 2471 /* ldstuba */, SP::LDSTUBArr, Convert__Reg1_4__MEMrr2_1__Imm1_3, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_Imm, MCK_IntRegs }, },
3455
  { 2479 /* ldsw */, SP::LDSWri, Convert__Reg1_3__MEMri2_1, 0, { MCK__91_, MCK_MEMri, MCK__93_, MCK_IntRegs }, },
3456
  { 2479 /* ldsw */, SP::LDSWrr, Convert__Reg1_3__MEMrr2_1, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_IntRegs }, },
3457
  { 2484 /* ldub */, SP::LDUBri, Convert__Reg1_3__MEMri2_1, 0, { MCK__91_, MCK_MEMri, MCK__93_, MCK_IntRegs }, },
3458
  { 2484 /* ldub */, SP::LDUBrr, Convert__Reg1_3__MEMrr2_1, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_IntRegs }, },
3459
  { 2489 /* lduba */, SP::LDUBArr, Convert__Reg1_4__MEMrr2_1__Imm1_3, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_Imm, MCK_IntRegs }, },
3460
  { 2495 /* lduh */, SP::LDUHri, Convert__Reg1_3__MEMri2_1, 0, { MCK__91_, MCK_MEMri, MCK__93_, MCK_IntRegs }, },
3461
  { 2495 /* lduh */, SP::LDUHrr, Convert__Reg1_3__MEMrr2_1, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_IntRegs }, },
3462
  { 2500 /* lduha */, SP::LDUHArr, Convert__Reg1_4__MEMrr2_1__Imm1_3, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_Imm, MCK_IntRegs }, },
3463
  { 2506 /* ldx */, SP::LDXFSRri, Convert__MEMri2_1, Feature_HasV9, { MCK__91_, MCK_MEMri, MCK__93_, MCK__PCT_fsr }, },
3464
  { 2506 /* ldx */, SP::LDXri, Convert__Reg1_3__MEMri2_1, 0, { MCK__91_, MCK_MEMri, MCK__93_, MCK_IntRegs }, },
3465
  { 2506 /* ldx */, SP::LDXFSRrr, Convert__MEMrr2_1, Feature_HasV9, { MCK__91_, MCK_MEMrr, MCK__93_, MCK__PCT_fsr }, },
3466
  { 2506 /* ldx */, SP::LDXrr, Convert__Reg1_3__MEMrr2_1, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_IntRegs }, },
3467
  { 2506 /* ldx */, SP::TLS_LDXrr, Convert__Reg1_3__MEMrr2_1__Imm1_4, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_IntRegs, MCK_Imm }, },
3468
  { 2510 /* lzcnt */, SP::LZCNT, Convert__Reg1_1__Reg1_0, Feature_HasVIS3, { MCK_IntRegs, MCK_IntRegs }, },
3469
  { 2516 /* membar */, SP::MEMBARi, Convert__Imm1_0, Feature_HasV9, { MCK_Imm }, },
3470
  { 2523 /* mov */, SP::RDPSR, Convert__Reg1_1, 0, { MCK__PCT_psr, MCK_IntRegs }, },
3471
  { 2523 /* mov */, SP::RDTBR, Convert__Reg1_1, 0, { MCK__PCT_tbr, MCK_IntRegs }, },
3472
  { 2523 /* mov */, SP::RDWIM, Convert__Reg1_1, 0, { MCK__PCT_wim, MCK_IntRegs }, },
3473
  { 2523 /* mov */, SP::RDASR, Convert__Reg1_1__Reg1_0, 0, { MCK_ASRRegs, MCK_IntRegs }, },
3474
  { 2523 /* mov */, SP::WRPSRrr, Convert__regG0__Reg1_0, 0, { MCK_IntRegs, MCK__PCT_psr }, },
3475
  { 2523 /* mov */, SP::WRTBRrr, Convert__regG0__Reg1_0, 0, { MCK_IntRegs, MCK__PCT_tbr }, },
3476
  { 2523 /* mov */, SP::WRWIMrr, Convert__regG0__Reg1_0, 0, { MCK_IntRegs, MCK__PCT_wim }, },
3477
  { 2523 /* mov */, SP::WRASRrr, Convert__Reg1_1__regG0__Reg1_0, 0, { MCK_IntRegs, MCK_ASRRegs }, },
3478
  { 2523 /* mov */, SP::ORrr, Convert__Reg1_1__regG0__Reg1_0, 0, { MCK_IntRegs, MCK_IntRegs }, },
3479
  { 2523 /* mov */, SP::WRPSRri, Convert__regG0__Imm1_0, 0, { MCK_Imm, MCK__PCT_psr }, },
3480
  { 2523 /* mov */, SP::WRTBRri, Convert__regG0__Imm1_0, 0, { MCK_Imm, MCK__PCT_tbr }, },
3481
  { 2523 /* mov */, SP::WRWIMri, Convert__regG0__Imm1_0, 0, { MCK_Imm, MCK__PCT_wim }, },
3482
  { 2523 /* mov */, SP::WRASRri, Convert__Reg1_1__regG0__Imm1_0, 0, { MCK_Imm, MCK_ASRRegs }, },
3483
  { 2523 /* mov */, SP::ORri, Convert__Reg1_1__regG0__Imm1_0, 0, { MCK_Imm, MCK_IntRegs }, },
3484
  { 2523 /* mov */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
3485
  { 2523 /* mov */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_8, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
3486
  { 2523 /* mov */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
3487
  { 2523 /* mov */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_8, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
3488
  { 2523 /* mov */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_8, Feature_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
3489
  { 2523 /* mov */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_8, Feature_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
3490
  { 2523 /* mov */, SP::MOVFCCrr, Convert__Reg1_3__Reg1_2__Tie0_1_1__Imm1_0, Feature_HasV9, { MCK_Imm, MCK__PCT_fcc0, MCK_IntRegs, MCK_IntRegs }, },
3491
  { 2523 /* mov */, SP::MOVFCCri, Convert__Reg1_3__Imm1_2__Tie0_1_1__Imm1_0, Feature_HasV9, { MCK_Imm, MCK__PCT_fcc0, MCK_Imm, MCK_IntRegs }, },
3492
  { 2523 /* mov */, SP::MOVICCrr, Convert__Reg1_3__Reg1_2__Tie0_1_1__Imm1_0, Feature_HasV9, { MCK_Imm, MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
3493
  { 2523 /* mov */, SP::MOVICCri, Convert__Reg1_3__Imm1_2__Tie0_1_1__Imm1_0, Feature_HasV9, { MCK_Imm, MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
3494
  { 2523 /* mov */, SP::MOVXCCrr, Convert__Reg1_3__Reg1_2__Tie0_1_1__Imm1_0, 0, { MCK_Imm, MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
3495
  { 2523 /* mov */, SP::MOVXCCri, Convert__Reg1_3__Imm1_2__Tie0_1_1__Imm1_0, 0, { MCK_Imm, MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
3496
  { 2523 /* mov */, SP::V9MOVFCCrr, Convert__Reg1_3__Reg1_1__Reg1_2__Tie0_1_1__Imm1_0, Feature_HasV9, { MCK_Imm, MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
3497
  { 2523 /* mov */, SP::V9MOVFCCri, Convert__Reg1_3__Reg1_1__Imm1_2__Tie0_1_1__Imm1_0, Feature_HasV9, { MCK_Imm, MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
3498
  { 2527 /* mova */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
3499
  { 2527 /* mova */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_8, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
3500
  { 2527 /* mova */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_8, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
3501
  { 2527 /* mova */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_8, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
3502
  { 2527 /* mova */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_8, Feature_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
3503
  { 2527 /* mova */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_8, Feature_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
3504
  { 2532 /* movcc */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
3505
  { 2532 /* movcc */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_13, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
3506
  { 2532 /* movcc */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
3507
  { 2532 /* movcc */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_13, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
3508
  { 2538 /* movcs */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
3509
  { 2538 /* movcs */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_5, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
3510
  { 2538 /* movcs */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
3511
  { 2538 /* movcs */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_5, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
3512
  { 2544 /* movdtox */, SP::MOVDTOX, Convert__Reg1_1__Reg1_0, Feature_HasVIS3, { MCK_DFPRegs, MCK_IntRegs }, },
3513
  { 2544 /* movdtox */, SP::MOVWTOS, Convert__Reg1_1__Reg1_0, Feature_HasVIS3, { MCK_IntRegs, MCK_DFPRegs }, },
3514
  { 2544 /* movdtox */, SP::MOVXTOD, Convert__Reg1_1__Reg1_0, Feature_HasVIS3, { MCK_IntRegs, MCK_DFPRegs }, },
3515
  { 2552 /* move */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
3516
  { 2552 /* move */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
3517
  { 2552 /* move */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
3518
  { 2552 /* move */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_1, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
3519
  { 2552 /* move */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_9, Feature_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
3520
  { 2552 /* move */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_9, Feature_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
3521
  { 2557 /* moveq */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
3522
  { 2557 /* moveq */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
3523
  { 2557 /* moveq */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
3524
  { 2557 /* moveq */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_1, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
3525
  { 2563 /* movg */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_10, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
3526
  { 2563 /* movg */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_10, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
3527
  { 2563 /* movg */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_10, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
3528
  { 2563 /* movg */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_10, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
3529
  { 2563 /* movg */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_6, Feature_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
3530
  { 2563 /* movg */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_6, Feature_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
3531
  { 2568 /* movge */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_11, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
3532
  { 2568 /* movge */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_11, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
3533
  { 2568 /* movge */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_11, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
3534
  { 2568 /* movge */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_11, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
3535
  { 2568 /* movge */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_11, Feature_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
3536
  { 2568 /* movge */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_11, Feature_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
3537
  { 2574 /* movgeu */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
3538
  { 2574 /* movgeu */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_13, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
3539
  { 2574 /* movgeu */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_13, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
3540
  { 2574 /* movgeu */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_13, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
3541
  { 2581 /* movgu */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_12, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
3542
  { 2581 /* movgu */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_12, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
3543
  { 2581 /* movgu */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_12, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
3544
  { 2581 /* movgu */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_12, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
3545
  { 2587 /* movl */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_3, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
3546
  { 2587 /* movl */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_3, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
3547
  { 2587 /* movl */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_3, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
3548
  { 2587 /* movl */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_3, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
3549
  { 2587 /* movl */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_4, Feature_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
3550
  { 2587 /* movl */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_4, Feature_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
3551
  { 2592 /* movle */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_2, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
3552
  { 2592 /* movle */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_2, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
3553
  { 2592 /* movle */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_2, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
3554
  { 2592 /* movle */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_2, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
3555
  { 2592 /* movle */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_13, Feature_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
3556
  { 2592 /* movle */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_13, Feature_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
3557
  { 2598 /* movleu */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_4, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
3558
  { 2598 /* movleu */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_4, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
3559
  { 2598 /* movleu */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_4, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
3560
  { 2598 /* movleu */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_4, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
3561
  { 2605 /* movlg */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_2, Feature_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
3562
  { 2605 /* movlg */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_2, Feature_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
3563
  { 2611 /* movlu */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
3564
  { 2611 /* movlu */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_5, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
3565
  { 2611 /* movlu */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_5, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
3566
  { 2611 /* movlu */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_5, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
3567
  { 2617 /* movn */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_0, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
3568
  { 2617 /* movn */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_0, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
3569
  { 2617 /* movn */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_0, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
3570
  { 2617 /* movn */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_0, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
3571
  { 2617 /* movn */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_0, Feature_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
3572
  { 2617 /* movn */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_0, Feature_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
3573
  { 2622 /* movne */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
3574
  { 2622 /* movne */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_9, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
3575
  { 2622 /* movne */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
3576
  { 2622 /* movne */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_9, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
3577
  { 2622 /* movne */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
3578
  { 2622 /* movne */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
3579
  { 2628 /* movneg */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_6, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
3580
  { 2628 /* movneg */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_6, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
3581
  { 2628 /* movneg */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_6, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
3582
  { 2628 /* movneg */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_6, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
3583
  { 2635 /* movnz */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
3584
  { 2635 /* movnz */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_9, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
3585
  { 2635 /* movnz */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_9, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
3586
  { 2635 /* movnz */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_9, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
3587
  { 2635 /* movnz */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
3588
  { 2635 /* movnz */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
3589
  { 2641 /* movo */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_15, Feature_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
3590
  { 2641 /* movo */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_15, Feature_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
3591
  { 2646 /* movpos */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_14, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
3592
  { 2646 /* movpos */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_14, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
3593
  { 2646 /* movpos */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_14, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
3594
  { 2646 /* movpos */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_14, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
3595
  { 2653 /* movrgez */, SP::MOVRGEZrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3596
  { 2653 /* movrgez */, SP::MOVRGEZri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3597
  { 2661 /* movrgz */, SP::MOVRGZrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3598
  { 2661 /* movrgz */, SP::MOVRGZri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3599
  { 2668 /* movrlez */, SP::MOVRLEZrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3600
  { 2668 /* movrlez */, SP::MOVRLEZri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3601
  { 2676 /* movrlz */, SP::MOVRLZrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3602
  { 2676 /* movrlz */, SP::MOVRLZri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3603
  { 2683 /* movrnz */, SP::MOVRNZrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3604
  { 2683 /* movrnz */, SP::MOVRNZri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3605
  { 2690 /* movrz */, SP::MOVRRZrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3606
  { 2690 /* movrz */, SP::MOVRRZri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3607
  { 2696 /* movstosw */, SP::MOVSTOSW, Convert__Reg1_1__Reg1_0, Feature_HasVIS3, { MCK_DFPRegs, MCK_IntRegs }, },
3608
  { 2705 /* movstouw */, SP::MOVSTOUW, Convert__Reg1_1__Reg1_0, Feature_HasVIS3, { MCK_DFPRegs, MCK_IntRegs }, },
3609
  { 2714 /* movu */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_7, Feature_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
3610
  { 2714 /* movu */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_7, Feature_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
3611
  { 2719 /* movue */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_10, Feature_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
3612
  { 2719 /* movue */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_10, Feature_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
3613
  { 2725 /* movug */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_5, Feature_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
3614
  { 2725 /* movug */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_5, Feature_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
3615
  { 2731 /* movuge */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_12, Feature_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
3616
  { 2731 /* movuge */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_12, Feature_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
3617
  { 2738 /* movul */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_3, Feature_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
3618
  { 2738 /* movul */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_3, Feature_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
3619
  { 2744 /* movule */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_14, Feature_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
3620
  { 2744 /* movule */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_14, Feature_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
3621
  { 2751 /* movvc */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_15, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
3622
  { 2751 /* movvc */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_15, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
3623
  { 2751 /* movvc */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_15, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
3624
  { 2751 /* movvc */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_15, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
3625
  { 2757 /* movvs */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_7, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
3626
  { 2757 /* movvs */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_7, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
3627
  { 2757 /* movvs */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_7, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
3628
  { 2757 /* movvs */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_7, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
3629
  { 2763 /* movz */, SP::MOVICCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK_IntRegs }, },
3630
  { 2763 /* movz */, SP::MOVICCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_Imm, MCK_IntRegs }, },
3631
  { 2763 /* movz */, SP::MOVXCCrr, Convert__Reg1_2__Reg1_1__Tie0_3_3__imm_95_1, 0, { MCK__PCT_xcc, MCK_IntRegs, MCK_IntRegs }, },
3632
  { 2763 /* movz */, SP::MOVXCCri, Convert__Reg1_2__Imm1_1__Tie0_3_3__imm_95_1, 0, { MCK__PCT_xcc, MCK_Imm, MCK_IntRegs }, },
3633
  { 2763 /* movz */, SP::V9MOVFCCrr, Convert__Reg1_2__Reg1_0__Reg1_1__Tie0_3_3__imm_95_9, Feature_HasV9, { MCK_FCCRegs, MCK_IntRegs, MCK_IntRegs }, },
3634
  { 2763 /* movz */, SP::V9MOVFCCri, Convert__Reg1_2__Reg1_0__Imm1_1__Tie0_3_3__imm_95_9, Feature_HasV9, { MCK_FCCRegs, MCK_Imm, MCK_IntRegs }, },
3635
  { 2768 /* mulscc */, SP::MULSCCrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3636
  { 2768 /* mulscc */, SP::MULSCCri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3637
  { 2775 /* mulx */, SP::MULXrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3638
  { 2775 /* mulx */, SP::MULXri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3639
  { 2780 /* neg */, SP::SUBrr, Convert__Reg1_0__regG0__Reg1_0, 0, { MCK_IntRegs }, },
3640
  { 2780 /* neg */, SP::SUBrr, Convert__Reg1_1__regG0__Reg1_0, 0, { MCK_IntRegs, MCK_IntRegs }, },
3641
  { 2784 /* nop */, SP::NOP, Convert_NoOperands, 0, {  }, },
3642
  { 2788 /* not */, SP::XNORrr, Convert__Reg1_0__Reg1_0__regG0, 0, { MCK_IntRegs }, },
3643
  { 2788 /* not */, SP::XNORrr, Convert__Reg1_1__Reg1_0__regG0, 0, { MCK_IntRegs, MCK_IntRegs }, },
3644
  { 2792 /* or */, SP::ORrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3645
  { 2792 /* or */, SP::ORri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3646
  { 2795 /* orcc */, SP::ORCCrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3647
  { 2795 /* orcc */, SP::ORCCri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3648
  { 2800 /* orn */, SP::ORNrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3649
  { 2800 /* orn */, SP::ORNri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3650
  { 2804 /* orncc */, SP::ORNCCrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3651
  { 2804 /* orncc */, SP::ORNCCri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3652
  { 2810 /* pdist */, SP::PDIST, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3653
  { 2816 /* pdistn */, SP::PDISTN, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_DFPRegs, MCK_DFPRegs, MCK_DFPRegs }, },
3654
  { 2823 /* popc */, SP::POPCrr, Convert__Reg1_1__Reg1_0, Feature_HasV9, { MCK_IntRegs, MCK_IntRegs }, },
3655
  { 2828 /* pwr */, SP::PWRPSRrr, Convert__regG0__Reg1_0, 0, { MCK_IntRegs, MCK__PCT_psr }, },
3656
  { 2828 /* pwr */, SP::PWRPSRri, Convert__regG0__Imm1_0, 0, { MCK_Imm, MCK__PCT_psr }, },
3657
  { 2828 /* pwr */, SP::PWRPSRrr, Convert__Reg1_0__Reg1_1, Feature_HasPWRPSR, { MCK_IntRegs, MCK_IntRegs, MCK__PCT_psr }, },
3658
  { 2828 /* pwr */, SP::PWRPSRri, Convert__Reg1_0__Imm1_1, Feature_HasPWRPSR, { MCK_IntRegs, MCK_Imm, MCK__PCT_psr }, },
3659
  { 2832 /* rd */, SP::RDPSR, Convert__Reg1_1, 0, { MCK__PCT_psr, MCK_IntRegs }, },
3660
  { 2832 /* rd */, SP::RDTBR, Convert__Reg1_1, 0, { MCK__PCT_tbr, MCK_IntRegs }, },
3661
  { 2832 /* rd */, SP::RDWIM, Convert__Reg1_1, 0, { MCK__PCT_wim, MCK_IntRegs }, },
3662
  { 2832 /* rd */, SP::RDASR, Convert__Reg1_1__Reg1_0, 0, { MCK_ASRRegs, MCK_IntRegs }, },
3663
  { 2835 /* rdpr */, SP::RDPR, Convert__Reg1_1__Reg1_0, Feature_HasV9, { MCK_PRRegs, MCK_IntRegs }, },
3664
  { 2840 /* restore */, SP::RESTORErr, Convert__regG0__regG0__regG0, 0, {  }, },
3665
  { 2840 /* restore */, SP::RESTORErr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3666
  { 2840 /* restore */, SP::RESTOREri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3667
  { 2848 /* ret */, SP::RET, Convert__imm_95_8, 0, {  }, },
3668
  { 2852 /* retl */, SP::RETL, Convert__imm_95_8, 0, {  }, },
3669
  { 2857 /* rett */, SP::RETTri, Convert__MEMri2_0, 0, { MCK_MEMri }, },
3670
  { 2857 /* rett */, SP::RETTrr, Convert__MEMrr2_0, 0, { MCK_MEMrr }, },
3671
  { 2862 /* save */, SP::SAVErr, Convert__regG0__regG0__regG0, 0, {  }, },
3672
  { 2862 /* save */, SP::SAVErr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3673
  { 2862 /* save */, SP::SAVEri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3674
  { 2867 /* sdiv */, SP::SDIVrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3675
  { 2867 /* sdiv */, SP::SDIVri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3676
  { 2872 /* sdivcc */, SP::SDIVCCrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3677
  { 2872 /* sdivcc */, SP::SDIVCCri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3678
  { 2879 /* sdivx */, SP::SDIVXrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3679
  { 2879 /* sdivx */, SP::SDIVXri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3680
  { 2885 /* set */, SP::SET, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_IntRegs }, },
3681
  { 2889 /* sethi */, SP::SETHIi, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_IntRegs }, },
3682
  { 2895 /* shutdown */, SP::SHUTDOWN, Convert_NoOperands, Feature_HasVIS, {  }, },
3683
  { 2904 /* siam */, SP::SIAM, Convert_NoOperands, Feature_HasVIS2, {  }, },
3684
  { 2909 /* signx */, SP::SRArr, Convert__Reg1_0__Reg1_0__regG0, Feature_HasV9, { MCK_IntRegs }, },
3685
  { 2909 /* signx */, SP::SRArr, Convert__Reg1_1__Reg1_0__regG0, Feature_HasV9, { MCK_IntRegs, MCK_IntRegs }, },
3686
  { 2915 /* sll */, SP::SLLrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3687
  { 2915 /* sll */, SP::SLLri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3688
  { 2919 /* sllx */, SP::SLLXrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3689
  { 2919 /* sllx */, SP::SLLXri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3690
  { 2924 /* smac */, SP::SMACrr, Convert__Reg1_2__Reg1_0__Reg1_1__imm_95_0, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3691
  { 2924 /* smac */, SP::SMACri, Convert__Reg1_2__Reg1_0__Imm1_1__imm_95_0, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3692
  { 2929 /* smul */, SP::SMULrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3693
  { 2929 /* smul */, SP::SMULri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3694
  { 2934 /* smulcc */, SP::SMULCCrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3695
  { 2934 /* smulcc */, SP::SMULCCri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3696
  { 2941 /* sra */, SP::SRArr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3697
  { 2941 /* sra */, SP::SRAri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3698
  { 2945 /* srax */, SP::SRAXrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3699
  { 2945 /* srax */, SP::SRAXri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3700
  { 2950 /* srl */, SP::SRLrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3701
  { 2950 /* srl */, SP::SRLri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3702
  { 2954 /* srlx */, SP::SRLXrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3703
  { 2954 /* srlx */, SP::SRLXri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3704
  { 2959 /* st */, SP::STCSRri, Convert__MEMri2_2, 0, { MCK__PCT_csr, MCK__91_, MCK_MEMri, MCK__93_ }, },
3705
  { 2959 /* st */, SP::STCSRrr, Convert__MEMrr2_2, 0, { MCK__PCT_csr, MCK__91_, MCK_MEMrr, MCK__93_ }, },
3706
  { 2959 /* st */, SP::STFSRri, Convert__MEMri2_2, 0, { MCK__PCT_fsr, MCK__91_, MCK_MEMri, MCK__93_ }, },
3707
  { 2959 /* st */, SP::STFSRrr, Convert__MEMrr2_2, 0, { MCK__PCT_fsr, MCK__91_, MCK_MEMrr, MCK__93_ }, },
3708
  { 2959 /* st */, SP::STCri, Convert__MEMri2_2__Reg1_0, 0, { MCK_CoprocRegs, MCK__91_, MCK_MEMri, MCK__93_ }, },
3709
  { 2959 /* st */, SP::STCrr, Convert__MEMrr2_2__Reg1_0, 0, { MCK_CoprocRegs, MCK__91_, MCK_MEMrr, MCK__93_ }, },
3710
  { 2959 /* st */, SP::STFri, Convert__MEMri2_2__Reg1_0, 0, { MCK_FPRegs, MCK__91_, MCK_MEMri, MCK__93_ }, },
3711
  { 2959 /* st */, SP::STFrr, Convert__MEMrr2_2__Reg1_0, 0, { MCK_FPRegs, MCK__91_, MCK_MEMrr, MCK__93_ }, },
3712
  { 2959 /* st */, SP::STri, Convert__MEMri2_2__Reg1_0, 0, { MCK_IntRegs, MCK__91_, MCK_MEMri, MCK__93_ }, },
3713
  { 2959 /* st */, SP::STrr, Convert__MEMrr2_2__Reg1_0, 0, { MCK_IntRegs, MCK__91_, MCK_MEMrr, MCK__93_ }, },
3714
  { 2962 /* sta */, SP::STFArr, Convert__MEMrr2_2__Reg1_0__Imm1_4, Feature_HasV9, { MCK_FPRegs, MCK__91_, MCK_MEMrr, MCK__93_, MCK_Imm }, },
3715
  { 2962 /* sta */, SP::STArr, Convert__MEMrr2_2__Reg1_0__Imm1_4, 0, { MCK_IntRegs, MCK__91_, MCK_MEMrr, MCK__93_, MCK_Imm }, },
3716
  { 2966 /* stb */, SP::STBri, Convert__MEMri2_2__Reg1_0, 0, { MCK_IntRegs, MCK__91_, MCK_MEMri, MCK__93_ }, },
3717
  { 2966 /* stb */, SP::STBrr, Convert__MEMrr2_2__Reg1_0, 0, { MCK_IntRegs, MCK__91_, MCK_MEMrr, MCK__93_ }, },
3718
  { 2970 /* stba */, SP::STBArr, Convert__MEMrr2_2__Reg1_0__Imm1_4, 0, { MCK_IntRegs, MCK__91_, MCK_MEMrr, MCK__93_, MCK_Imm }, },
3719
  { 2975 /* stbar */, SP::STBAR, Convert_NoOperands, 0, {  }, },
3720
  { 2981 /* std */, SP::STDCQri, Convert__MEMri2_2, 0, { MCK__PCT_cq, MCK__91_, MCK_MEMri, MCK__93_ }, },
3721
  { 2981 /* std */, SP::STDCQrr, Convert__MEMrr2_2, 0, { MCK__PCT_cq, MCK__91_, MCK_MEMrr, MCK__93_ }, },
3722
  { 2981 /* std */, SP::STDFQri, Convert__MEMri2_2, 0, { MCK__PCT_fq, MCK__91_, MCK_MEMri, MCK__93_ }, },
3723
  { 2981 /* std */, SP::STDFQrr, Convert__MEMrr2_2, 0, { MCK__PCT_fq, MCK__91_, MCK_MEMrr, MCK__93_ }, },
3724
  { 2981 /* std */, SP::STDCri, Convert__MEMri2_2__Reg1_0, 0, { MCK_CoprocPair, MCK__91_, MCK_MEMri, MCK__93_ }, },
3725
  { 2981 /* std */, SP::STDCrr, Convert__MEMrr2_2__Reg1_0, 0, { MCK_CoprocPair, MCK__91_, MCK_MEMrr, MCK__93_ }, },
3726
  { 2981 /* std */, SP::STDri, Convert__MEMri2_2__Reg1_0, 0, { MCK_IntPair, MCK__91_, MCK_MEMri, MCK__93_ }, },
3727
  { 2981 /* std */, SP::STDrr, Convert__MEMrr2_2__Reg1_0, 0, { MCK_IntPair, MCK__91_, MCK_MEMrr, MCK__93_ }, },
3728
  { 2981 /* std */, SP::STDFri, Convert__MEMri2_2__Reg1_0, 0, { MCK_DFPRegs, MCK__91_, MCK_MEMri, MCK__93_ }, },
3729
  { 2981 /* std */, SP::STDFrr, Convert__MEMrr2_2__Reg1_0, 0, { MCK_DFPRegs, MCK__91_, MCK_MEMrr, MCK__93_ }, },
3730
  { 2985 /* stda */, SP::STDArr, Convert__MEMrr2_2__Reg1_0__Imm1_4, 0, { MCK_IntPair, MCK__91_, MCK_MEMrr, MCK__93_, MCK_Imm }, },
3731
  { 2985 /* stda */, SP::STDFArr, Convert__MEMrr2_2__Reg1_0__Imm1_4, Feature_HasV9, { MCK_DFPRegs, MCK__91_, MCK_MEMrr, MCK__93_, MCK_Imm }, },
3732
  { 2990 /* sth */, SP::STHri, Convert__MEMri2_2__Reg1_0, 0, { MCK_IntRegs, MCK__91_, MCK_MEMri, MCK__93_ }, },
3733
  { 2990 /* sth */, SP::STHrr, Convert__MEMrr2_2__Reg1_0, 0, { MCK_IntRegs, MCK__91_, MCK_MEMrr, MCK__93_ }, },
3734
  { 2994 /* stha */, SP::STHArr, Convert__MEMrr2_2__Reg1_0__Imm1_4, 0, { MCK_IntRegs, MCK__91_, MCK_MEMrr, MCK__93_, MCK_Imm }, },
3735
  { 2999 /* stq */, SP::STQFri, Convert__MEMri2_2__Reg1_0, Feature_HasV9, { MCK_QFPRegs, MCK__91_, MCK_MEMri, MCK__93_ }, },
3736
  { 2999 /* stq */, SP::STQFrr, Convert__MEMrr2_2__Reg1_0, Feature_HasV9, { MCK_QFPRegs, MCK__91_, MCK_MEMrr, MCK__93_ }, },
3737
  { 3003 /* stqa */, SP::STQFArr, Convert__MEMrr2_2__Reg1_0__Imm1_4, Feature_HasV9, { MCK_QFPRegs, MCK__91_, MCK_MEMrr, MCK__93_, MCK_Imm }, },
3738
  { 3008 /* stx */, SP::STXFSRri, Convert__MEMri2_2, Feature_HasV9, { MCK__PCT_fsr, MCK__91_, MCK_MEMri, MCK__93_ }, },
3739
  { 3008 /* stx */, SP::STXFSRrr, Convert__MEMrr2_2, Feature_HasV9, { MCK__PCT_fsr, MCK__91_, MCK_MEMrr, MCK__93_ }, },
3740
  { 3008 /* stx */, SP::STXri, Convert__MEMri2_2__Reg1_0, 0, { MCK_IntRegs, MCK__91_, MCK_MEMri, MCK__93_ }, },
3741
  { 3008 /* stx */, SP::STXrr, Convert__MEMrr2_2__Reg1_0, 0, { MCK_IntRegs, MCK__91_, MCK_MEMrr, MCK__93_ }, },
3742
  { 3012 /* sub */, SP::SUBrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3743
  { 3012 /* sub */, SP::SUBri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3744
  { 3016 /* subcc */, SP::SUBCCrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3745
  { 3016 /* subcc */, SP::SUBCCri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3746
  { 3022 /* subx */, SP::SUBCrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3747
  { 3022 /* subx */, SP::SUBCri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3748
  { 3027 /* subxcc */, SP::SUBErr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3749
  { 3027 /* subxcc */, SP::SUBEri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3750
  { 3034 /* swap */, SP::SWAPri, Convert__Reg1_3__MEMri2_1__Tie0_1_1, 0, { MCK__91_, MCK_MEMri, MCK__93_, MCK_IntRegs }, },
3751
  { 3034 /* swap */, SP::SWAPrr, Convert__Reg1_3__MEMrr2_1__Tie0_1_1, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_IntRegs }, },
3752
  { 3039 /* swapa */, SP::SWAPArr, Convert__Reg1_4__MEMrr2_1__Imm1_3__Tie0_1_1, 0, { MCK__91_, MCK_MEMrr, MCK__93_, MCK_Imm, MCK_IntRegs }, },
3753
  { 3045 /* t */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_8, 0, { MCK_IntRegs }, },
3754
  { 3045 /* t */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_8, 0, { MCK_Imm }, },
3755
  { 3045 /* t */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_8, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
3756
  { 3045 /* t */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_8, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
3757
  { 3045 /* t */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_8, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
3758
  { 3045 /* t */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_8, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
3759
  { 3045 /* t */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_8, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3760
  { 3045 /* t */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_8, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
3761
  { 3045 /* t */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_8, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3762
  { 3045 /* t */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_8, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3763
  { 3045 /* t */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_8, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3764
  { 3045 /* t */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_8, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3765
  { 3045 /* t */, SP::TRAPrr, Convert__Reg1_1__Reg1_3__Imm1_0, 0, { MCK_Imm, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3766
  { 3045 /* t */, SP::TRAPri, Convert__Reg1_1__Imm1_3__Imm1_0, 0, { MCK_Imm, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3767
  { 3045 /* t */, SP::TICCrr, Convert__Reg1_2__Reg1_4__Imm1_0, Feature_HasV9, { MCK_Imm, MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3768
  { 3045 /* t */, SP::TICCri, Convert__Reg1_2__Imm1_4__Imm1_0, Feature_HasV9, { MCK_Imm, MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3769
  { 3045 /* t */, SP::TXCCrr, Convert__Reg1_2__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3770
  { 3045 /* t */, SP::TXCCri, Convert__Reg1_2__Imm1_4__Imm1_0, 0, { MCK_Imm, MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3771
  { 3047 /* ta */, SP::TA1, Convert_NoOperands, 0, { MCK_1 }, },
3772
  { 3047 /* ta */, SP::TA3, Convert_NoOperands, 0, { MCK_3 }, },
3773
  { 3047 /* ta */, SP::TA5, Convert_NoOperands, 0, { MCK_5 }, },
3774
  { 3047 /* ta */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_8, 0, { MCK_IntRegs }, },
3775
  { 3047 /* ta */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_8, 0, { MCK_Imm }, },
3776
  { 3047 /* ta */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_8, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
3777
  { 3047 /* ta */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_8, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
3778
  { 3047 /* ta */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_8, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
3779
  { 3047 /* ta */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_8, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
3780
  { 3047 /* ta */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_8, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3781
  { 3047 /* ta */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_8, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
3782
  { 3047 /* ta */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_8, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3783
  { 3047 /* ta */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_8, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3784
  { 3047 /* ta */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_8, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3785
  { 3047 /* ta */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_8, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3786
  { 3050 /* taddcc */, SP::TADDCCrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3787
  { 3050 /* taddcc */, SP::TADDCCri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3788
  { 3057 /* taddcctv */, SP::TADDCCTVrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3789
  { 3057 /* taddcctv */, SP::TADDCCTVri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3790
  { 3066 /* tcc */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_13, 0, { MCK_IntRegs }, },
3791
  { 3066 /* tcc */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_13, 0, { MCK_Imm }, },
3792
  { 3066 /* tcc */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_13, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
3793
  { 3066 /* tcc */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_13, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
3794
  { 3066 /* tcc */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_13, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
3795
  { 3066 /* tcc */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_13, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
3796
  { 3066 /* tcc */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_13, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3797
  { 3066 /* tcc */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_13, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
3798
  { 3066 /* tcc */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_13, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3799
  { 3066 /* tcc */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_13, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3800
  { 3066 /* tcc */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_13, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3801
  { 3066 /* tcc */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_13, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3802
  { 3070 /* tcs */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_5, 0, { MCK_IntRegs }, },
3803
  { 3070 /* tcs */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_5, 0, { MCK_Imm }, },
3804
  { 3070 /* tcs */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_5, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
3805
  { 3070 /* tcs */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_5, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
3806
  { 3070 /* tcs */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_5, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
3807
  { 3070 /* tcs */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_5, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
3808
  { 3070 /* tcs */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_5, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3809
  { 3070 /* tcs */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_5, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
3810
  { 3070 /* tcs */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_5, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3811
  { 3070 /* tcs */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_5, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3812
  { 3070 /* tcs */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_5, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3813
  { 3070 /* tcs */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_5, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3814
  { 3074 /* te */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_1, 0, { MCK_IntRegs }, },
3815
  { 3074 /* te */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_1, 0, { MCK_Imm }, },
3816
  { 3074 /* te */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
3817
  { 3074 /* te */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
3818
  { 3074 /* te */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_1, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
3819
  { 3074 /* te */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_1, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
3820
  { 3074 /* te */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_1, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3821
  { 3074 /* te */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_1, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
3822
  { 3074 /* te */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3823
  { 3074 /* te */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3824
  { 3074 /* te */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_1, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3825
  { 3074 /* te */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_1, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3826
  { 3077 /* teq */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_1, 0, { MCK_IntRegs }, },
3827
  { 3077 /* teq */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_1, 0, { MCK_Imm }, },
3828
  { 3077 /* teq */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
3829
  { 3077 /* teq */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
3830
  { 3077 /* teq */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_1, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
3831
  { 3077 /* teq */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_1, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
3832
  { 3077 /* teq */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_1, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3833
  { 3077 /* teq */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_1, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
3834
  { 3077 /* teq */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3835
  { 3077 /* teq */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3836
  { 3077 /* teq */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_1, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3837
  { 3077 /* teq */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_1, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3838
  { 3081 /* tg */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_10, 0, { MCK_IntRegs }, },
3839
  { 3081 /* tg */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_10, 0, { MCK_Imm }, },
3840
  { 3081 /* tg */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_10, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
3841
  { 3081 /* tg */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_10, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
3842
  { 3081 /* tg */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_10, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
3843
  { 3081 /* tg */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_10, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
3844
  { 3081 /* tg */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_10, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3845
  { 3081 /* tg */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_10, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
3846
  { 3081 /* tg */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_10, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3847
  { 3081 /* tg */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_10, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3848
  { 3081 /* tg */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_10, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3849
  { 3081 /* tg */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_10, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3850
  { 3084 /* tge */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_11, 0, { MCK_IntRegs }, },
3851
  { 3084 /* tge */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_11, 0, { MCK_Imm }, },
3852
  { 3084 /* tge */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_11, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
3853
  { 3084 /* tge */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_11, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
3854
  { 3084 /* tge */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_11, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
3855
  { 3084 /* tge */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_11, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
3856
  { 3084 /* tge */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_11, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3857
  { 3084 /* tge */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_11, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
3858
  { 3084 /* tge */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_11, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3859
  { 3084 /* tge */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_11, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3860
  { 3084 /* tge */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_11, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3861
  { 3084 /* tge */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_11, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3862
  { 3088 /* tgeu */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_13, 0, { MCK_IntRegs }, },
3863
  { 3088 /* tgeu */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_13, 0, { MCK_Imm }, },
3864
  { 3088 /* tgeu */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_13, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
3865
  { 3088 /* tgeu */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_13, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
3866
  { 3088 /* tgeu */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_13, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
3867
  { 3088 /* tgeu */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_13, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
3868
  { 3088 /* tgeu */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_13, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3869
  { 3088 /* tgeu */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_13, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
3870
  { 3088 /* tgeu */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_13, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3871
  { 3088 /* tgeu */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_13, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3872
  { 3088 /* tgeu */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_13, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3873
  { 3088 /* tgeu */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_13, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3874
  { 3093 /* tgu */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_12, 0, { MCK_IntRegs }, },
3875
  { 3093 /* tgu */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_12, 0, { MCK_Imm }, },
3876
  { 3093 /* tgu */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_12, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
3877
  { 3093 /* tgu */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_12, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
3878
  { 3093 /* tgu */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_12, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
3879
  { 3093 /* tgu */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_12, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
3880
  { 3093 /* tgu */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_12, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3881
  { 3093 /* tgu */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_12, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
3882
  { 3093 /* tgu */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_12, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3883
  { 3093 /* tgu */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_12, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3884
  { 3093 /* tgu */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_12, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3885
  { 3093 /* tgu */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_12, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3886
  { 3097 /* tl */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_3, 0, { MCK_IntRegs }, },
3887
  { 3097 /* tl */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_3, 0, { MCK_Imm }, },
3888
  { 3097 /* tl */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_3, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
3889
  { 3097 /* tl */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_3, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
3890
  { 3097 /* tl */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_3, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
3891
  { 3097 /* tl */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_3, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
3892
  { 3097 /* tl */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_3, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3893
  { 3097 /* tl */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_3, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
3894
  { 3097 /* tl */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_3, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3895
  { 3097 /* tl */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_3, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3896
  { 3097 /* tl */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_3, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3897
  { 3097 /* tl */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_3, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3898
  { 3100 /* tle */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_2, 0, { MCK_IntRegs }, },
3899
  { 3100 /* tle */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_2, 0, { MCK_Imm }, },
3900
  { 3100 /* tle */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_2, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
3901
  { 3100 /* tle */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_2, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
3902
  { 3100 /* tle */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_2, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
3903
  { 3100 /* tle */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_2, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
3904
  { 3100 /* tle */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_2, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3905
  { 3100 /* tle */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_2, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
3906
  { 3100 /* tle */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_2, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3907
  { 3100 /* tle */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_2, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3908
  { 3100 /* tle */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_2, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3909
  { 3100 /* tle */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_2, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3910
  { 3104 /* tleu */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_4, 0, { MCK_IntRegs }, },
3911
  { 3104 /* tleu */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_4, 0, { MCK_Imm }, },
3912
  { 3104 /* tleu */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_4, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
3913
  { 3104 /* tleu */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_4, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
3914
  { 3104 /* tleu */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_4, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
3915
  { 3104 /* tleu */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_4, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
3916
  { 3104 /* tleu */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_4, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3917
  { 3104 /* tleu */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_4, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
3918
  { 3104 /* tleu */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_4, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3919
  { 3104 /* tleu */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_4, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3920
  { 3104 /* tleu */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_4, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3921
  { 3104 /* tleu */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_4, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3922
  { 3109 /* tlu */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_5, 0, { MCK_IntRegs }, },
3923
  { 3109 /* tlu */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_5, 0, { MCK_Imm }, },
3924
  { 3109 /* tlu */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_5, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
3925
  { 3109 /* tlu */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_5, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
3926
  { 3109 /* tlu */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_5, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
3927
  { 3109 /* tlu */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_5, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
3928
  { 3109 /* tlu */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_5, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3929
  { 3109 /* tlu */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_5, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
3930
  { 3109 /* tlu */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_5, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3931
  { 3109 /* tlu */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_5, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3932
  { 3109 /* tlu */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_5, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3933
  { 3109 /* tlu */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_5, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3934
  { 3113 /* tn */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_0, 0, { MCK_IntRegs }, },
3935
  { 3113 /* tn */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_0, 0, { MCK_Imm }, },
3936
  { 3113 /* tn */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_0, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
3937
  { 3113 /* tn */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_0, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
3938
  { 3113 /* tn */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_0, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
3939
  { 3113 /* tn */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_0, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
3940
  { 3113 /* tn */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_0, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3941
  { 3113 /* tn */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_0, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
3942
  { 3113 /* tn */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_0, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3943
  { 3113 /* tn */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_0, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3944
  { 3113 /* tn */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_0, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3945
  { 3113 /* tn */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_0, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3946
  { 3116 /* tne */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_9, 0, { MCK_IntRegs }, },
3947
  { 3116 /* tne */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_9, 0, { MCK_Imm }, },
3948
  { 3116 /* tne */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_9, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
3949
  { 3116 /* tne */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_9, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
3950
  { 3116 /* tne */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_9, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
3951
  { 3116 /* tne */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_9, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
3952
  { 3116 /* tne */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_9, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3953
  { 3116 /* tne */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_9, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
3954
  { 3116 /* tne */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_9, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3955
  { 3116 /* tne */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_9, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3956
  { 3116 /* tne */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_9, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3957
  { 3116 /* tne */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_9, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3958
  { 3120 /* tneg */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_6, 0, { MCK_IntRegs }, },
3959
  { 3120 /* tneg */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_6, 0, { MCK_Imm }, },
3960
  { 3120 /* tneg */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_6, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
3961
  { 3120 /* tneg */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_6, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
3962
  { 3120 /* tneg */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_6, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
3963
  { 3120 /* tneg */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_6, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
3964
  { 3120 /* tneg */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_6, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3965
  { 3120 /* tneg */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_6, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
3966
  { 3120 /* tneg */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_6, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3967
  { 3120 /* tneg */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_6, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3968
  { 3120 /* tneg */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_6, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3969
  { 3120 /* tneg */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_6, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3970
  { 3125 /* tnz */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_9, 0, { MCK_IntRegs }, },
3971
  { 3125 /* tnz */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_9, 0, { MCK_Imm }, },
3972
  { 3125 /* tnz */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_9, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
3973
  { 3125 /* tnz */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_9, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
3974
  { 3125 /* tnz */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_9, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
3975
  { 3125 /* tnz */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_9, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
3976
  { 3125 /* tnz */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_9, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3977
  { 3125 /* tnz */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_9, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
3978
  { 3125 /* tnz */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_9, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3979
  { 3125 /* tnz */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_9, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3980
  { 3125 /* tnz */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_9, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3981
  { 3125 /* tnz */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_9, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3982
  { 3129 /* tpos */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_14, 0, { MCK_IntRegs }, },
3983
  { 3129 /* tpos */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_14, 0, { MCK_Imm }, },
3984
  { 3129 /* tpos */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_14, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
3985
  { 3129 /* tpos */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_14, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
3986
  { 3129 /* tpos */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_14, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
3987
  { 3129 /* tpos */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_14, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
3988
  { 3129 /* tpos */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_14, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3989
  { 3129 /* tpos */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_14, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
3990
  { 3129 /* tpos */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_14, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3991
  { 3129 /* tpos */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_14, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3992
  { 3129 /* tpos */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_14, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
3993
  { 3129 /* tpos */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_14, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
3994
  { 3134 /* tst */, SP::ORCCrr, Convert__regG0__Reg1_0__regG0, 0, { MCK_IntRegs }, },
3995
  { 3138 /* tsubcc */, SP::TSUBCCrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3996
  { 3138 /* tsubcc */, SP::TSUBCCri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3997
  { 3145 /* tsubcctv */, SP::TSUBCCTVrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
3998
  { 3145 /* tsubcctv */, SP::TSUBCCTVri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
3999
  { 3154 /* tvc */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_15, 0, { MCK_IntRegs }, },
4000
  { 3154 /* tvc */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_15, 0, { MCK_Imm }, },
4001
  { 3154 /* tvc */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_15, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
4002
  { 3154 /* tvc */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_15, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
4003
  { 3154 /* tvc */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_15, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
4004
  { 3154 /* tvc */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_15, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
4005
  { 3154 /* tvc */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_15, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4006
  { 3154 /* tvc */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_15, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
4007
  { 3154 /* tvc */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_15, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4008
  { 3154 /* tvc */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_15, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
4009
  { 3154 /* tvc */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_15, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4010
  { 3154 /* tvc */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_15, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
4011
  { 3158 /* tvs */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_7, 0, { MCK_IntRegs }, },
4012
  { 3158 /* tvs */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_7, 0, { MCK_Imm }, },
4013
  { 3158 /* tvs */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_7, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
4014
  { 3158 /* tvs */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_7, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
4015
  { 3158 /* tvs */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_7, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
4016
  { 3158 /* tvs */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_7, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
4017
  { 3158 /* tvs */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_7, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4018
  { 3158 /* tvs */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_7, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
4019
  { 3158 /* tvs */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_7, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4020
  { 3158 /* tvs */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_7, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
4021
  { 3158 /* tvs */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_7, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4022
  { 3158 /* tvs */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_7, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
4023
  { 3162 /* tz */, SP::TRAPrr, Convert__regG0__Reg1_0__imm_95_1, 0, { MCK_IntRegs }, },
4024
  { 3162 /* tz */, SP::TRAPri, Convert__regG0__Imm1_0__imm_95_1, 0, { MCK_Imm }, },
4025
  { 3162 /* tz */, SP::TICCrr, Convert__regG0__Reg1_1__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs }, },
4026
  { 3162 /* tz */, SP::TICCri, Convert__regG0__Imm1_1__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_Imm }, },
4027
  { 3162 /* tz */, SP::TXCCrr, Convert__regG0__Reg1_1__imm_95_1, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs }, },
4028
  { 3162 /* tz */, SP::TXCCri, Convert__regG0__Imm1_1__imm_95_1, Feature_HasV9, { MCK__PCT_xcc, MCK_Imm }, },
4029
  { 3162 /* tz */, SP::TRAPrr, Convert__Reg1_0__Reg1_2__imm_95_1, 0, { MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4030
  { 3162 /* tz */, SP::TRAPri, Convert__Reg1_0__Imm1_2__imm_95_1, 0, { MCK_IntRegs, MCK__43_, MCK_Imm }, },
4031
  { 3162 /* tz */, SP::TICCrr, Convert__Reg1_1__Reg1_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4032
  { 3162 /* tz */, SP::TICCri, Convert__Reg1_1__Imm1_3__imm_95_1, Feature_HasV9, { MCK__PCT_icc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
4033
  { 3162 /* tz */, SP::TXCCrr, Convert__Reg1_1__Reg1_3__imm_95_1, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_IntRegs }, },
4034
  { 3162 /* tz */, SP::TXCCri, Convert__Reg1_1__Imm1_3__imm_95_1, Feature_HasV9, { MCK__PCT_xcc, MCK_IntRegs, MCK__43_, MCK_Imm }, },
4035
  { 3165 /* udiv */, SP::UDIVrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
4036
  { 3165 /* udiv */, SP::UDIVri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
4037
  { 3170 /* udivcc */, SP::UDIVCCrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
4038
  { 3170 /* udivcc */, SP::UDIVCCri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
4039
  { 3177 /* udivx */, SP::UDIVXrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
4040
  { 3177 /* udivx */, SP::UDIVXri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
4041
  { 3183 /* umac */, SP::UMACrr, Convert__Reg1_2__Reg1_0__Reg1_1__imm_95_0, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
4042
  { 3183 /* umac */, SP::UMACri, Convert__Reg1_2__Reg1_0__Imm1_1__imm_95_0, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
4043
  { 3188 /* umul */, SP::UMULrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
4044
  { 3188 /* umul */, SP::UMULri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
4045
  { 3193 /* umulcc */, SP::UMULCCrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
4046
  { 3193 /* umulcc */, SP::UMULCCri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
4047
  { 3200 /* umulxhi */, SP::UMULXHI, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
4048
  { 3208 /* unimp */, SP::UNIMP, Convert__imm_95_0, 0, {  }, },
4049
  { 3208 /* unimp */, SP::UNIMP, Convert__Imm1_0, 0, { MCK_Imm }, },
4050
  { 3214 /* wr */, SP::WRPSRrr, Convert__regG0__Reg1_0, 0, { MCK_IntRegs, MCK__PCT_psr }, },
4051
  { 3214 /* wr */, SP::WRTBRrr, Convert__regG0__Reg1_0, 0, { MCK_IntRegs, MCK__PCT_tbr }, },
4052
  { 3214 /* wr */, SP::WRWIMrr, Convert__regG0__Reg1_0, 0, { MCK_IntRegs, MCK__PCT_wim }, },
4053
  { 3214 /* wr */, SP::WRASRrr, Convert__Reg1_1__regG0__Reg1_0, 0, { MCK_IntRegs, MCK_ASRRegs }, },
4054
  { 3214 /* wr */, SP::WRPSRri, Convert__regG0__Imm1_0, 0, { MCK_Imm, MCK__PCT_psr }, },
4055
  { 3214 /* wr */, SP::WRTBRri, Convert__regG0__Imm1_0, 0, { MCK_Imm, MCK__PCT_tbr }, },
4056
  { 3214 /* wr */, SP::WRWIMri, Convert__regG0__Imm1_0, 0, { MCK_Imm, MCK__PCT_wim }, },
4057
  { 3214 /* wr */, SP::WRASRri, Convert__Reg1_1__regG0__Imm1_0, 0, { MCK_Imm, MCK_ASRRegs }, },
4058
  { 3214 /* wr */, SP::WRPSRrr, Convert__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK__PCT_psr }, },
4059
  { 3214 /* wr */, SP::WRTBRrr, Convert__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK__PCT_tbr }, },
4060
  { 3214 /* wr */, SP::WRWIMrr, Convert__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK__PCT_wim }, },
4061
  { 3214 /* wr */, SP::WRASRrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_ASRRegs }, },
4062
  { 3214 /* wr */, SP::WRPSRri, Convert__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK__PCT_psr }, },
4063
  { 3214 /* wr */, SP::WRTBRri, Convert__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK__PCT_tbr }, },
4064
  { 3214 /* wr */, SP::WRWIMri, Convert__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK__PCT_wim }, },
4065
  { 3214 /* wr */, SP::WRASRri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_ASRRegs }, },
4066
  { 3217 /* wrpr */, SP::WRPRrr, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasV9, { MCK_IntRegs, MCK_IntRegs, MCK_PRRegs }, },
4067
  { 3217 /* wrpr */, SP::WRPRri, Convert__Reg1_2__Reg1_0__Imm1_1, Feature_HasV9, { MCK_IntRegs, MCK_Imm, MCK_PRRegs }, },
4068
  { 3222 /* xmulx */, SP::XMULX, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
4069
  { 3228 /* xmulxhi */, SP::XMULXHI, Convert__Reg1_2__Reg1_0__Reg1_1, Feature_HasVIS3, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
4070
  { 3236 /* xnor */, SP::XNORrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
4071
  { 3236 /* xnor */, SP::XNORri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
4072
  { 3241 /* xnorcc */, SP::XNORCCrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
4073
  { 3241 /* xnorcc */, SP::XNORCCri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
4074
  { 3248 /* xor */, SP::XORrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
4075
  { 3248 /* xor */, SP::XORri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
4076
  { 3252 /* xorcc */, SP::XORCCrr, Convert__Reg1_2__Reg1_0__Reg1_1, 0, { MCK_IntRegs, MCK_IntRegs, MCK_IntRegs }, },
4077
  { 3252 /* xorcc */, SP::XORCCri, Convert__Reg1_2__Reg1_0__Imm1_1, 0, { MCK_IntRegs, MCK_Imm, MCK_IntRegs }, },
4078
};
4079
4080
#include "llvm/Support/Debug.h"
4081
#include "llvm/Support/Format.h"
4082
4083
unsigned SparcAsmParser::
4084
MatchInstructionImpl(const OperandVector &Operands,
4085
                     MCInst &Inst,
4086
                     uint64_t &ErrorInfo,
4087
1.85k
                     bool matchingInlineAsm, unsigned VariantID) {
4088
1.85k
  // Eliminate obvious mismatches.
4089
1.85k
  if (Operands.size() > 7) {
4090
0
    ErrorInfo = 7;
4091
0
    return Match_InvalidOperand;
4092
0
  }
4093
1.85k
4094
1.85k
  // Get the current feature set.
4095
1.85k
  uint64_t AvailableFeatures = getAvailableFeatures();
4096
1.85k
4097
1.85k
  // Get the instruction mnemonic, which is the first token.
4098
1.85k
  StringRef Mnemonic = ((SparcOperand&)*Operands[0]).getToken();
4099
1.85k
4100
1.85k
  // Process all MnemonicAliases to remap the mnemonic.
4101
1.85k
  applyMnemonicAliases(Mnemonic, AvailableFeatures, VariantID);
4102
1.85k
4103
1.85k
  // Some state to try to produce better error messages.
4104
1.85k
  bool HadMatchOtherThanFeatures = false;
4105
1.85k
  bool HadMatchOtherThanPredicate = false;
4106
1.85k
  unsigned RetCode = Match_InvalidOperand;
4107
1.85k
  uint64_t MissingFeatures = ~0ULL;
4108
1.85k
  // Set ErrorInfo to the operand that mismatches if it is
4109
1.85k
  // wrong for all instances of the instruction.
4110
1.85k
  ErrorInfo = ~0ULL;
4111
1.85k
  // Find the appropriate table for this asm variant.
4112
1.85k
  const MatchEntry *Start, *End;
4113
1.85k
  switch (VariantID) {
4114
1.85k
  
default: 0
llvm_unreachable0
("invalid variant!");
4115
1.85k
  case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break;
4116
1.85k
  }
4117
1.85k
  // Search the table.
4118
1.85k
  auto MnemonicRange = std::equal_range(Start, End, Mnemonic, LessOpcode());
4119
1.85k
4120
1.85k
  DEBUG_WITH_TYPE("asm-matcher", dbgs() << "AsmMatcher: found " <<
4121
1.85k
  std::distance(MnemonicRange.first, MnemonicRange.second) << 
4122
1.85k
  " encodings with mnemonic '" << Mnemonic << "'\n");
4123
1.85k
4124
1.85k
  // Return a more specific error code if no mnemonics match.
4125
1.85k
  if (MnemonicRange.first == MnemonicRange.second)
4126
8
    return Match_MnemonicFail;
4127
1.84k
4128
1.84k
  for (const MatchEntry *it = MnemonicRange.first, *ie = MnemonicRange.second;
4129
6.56k
       it != ie; 
++it4.72k
) {
4130
6.50k
    bool HasRequiredFeatures =
4131
6.50k
      (AvailableFeatures & it->RequiredFeatures) == it->RequiredFeatures;
4132
6.50k
    DEBUG_WITH_TYPE("asm-matcher", dbgs() << "Trying to match opcode "
4133
6.50k
                                          << MII.getName(it->Opcode) << "\n");
4134
6.50k
    // equal_range guarantees that instruction mnemonic matches.
4135
6.50k
    assert(Mnemonic == it->getMnemonic());
4136
6.50k
    bool OperandsValid = true;
4137
13.4k
    for (unsigned FormalIdx = 0, ActualIdx = 1; FormalIdx != 6; 
++FormalIdx6.90k
) {
4138
13.4k
      auto Formal = static_cast<MatchClassKind>(it->Classes[FormalIdx]);
4139
13.4k
      DEBUG_WITH_TYPE("asm-matcher",
4140
13.4k
                      dbgs() << "  Matching formal operand class " << getMatchClassName(Formal)
4141
13.4k
                             << " against actual operand at index " << ActualIdx);
4142
13.4k
      if (ActualIdx < Operands.size())
4143
13.4k
        
DEBUG_WITH_TYPE11.5k
("asm-matcher", dbgs() << " (";
4144
13.4k
                        Operands[ActualIdx]->print(dbgs()); dbgs() << "): ");
4145
13.4k
      else
4146
13.4k
        
DEBUG_WITH_TYPE1.83k
("asm-matcher", dbgs() << ": ");
4147
13.4k
      if (ActualIdx >= Operands.size()) {
4148
1.83k
        DEBUG_WITH_TYPE("asm-matcher", dbgs() << "actual operand index out of range ");
4149
1.83k
        OperandsValid = (Formal == InvalidMatchClass) || 
isSubclass(Formal, OptionalMatchClass)1
;
4150
1.83k
        if (!OperandsValid) 
ErrorInfo = ActualIdx1
;
4151
1.83k
        break;
4152
1.83k
      }
4153
11.5k
      MCParsedAsmOperand &Actual = *Operands[ActualIdx];
4154
11.5k
      unsigned Diag = validateOperandClass(Actual, Formal);
4155
11.5k
      if (Diag == Match_Success) {
4156
6.75k
        DEBUG_WITH_TYPE("asm-matcher",
4157
6.75k
                        dbgs() << "match success using generic matcher\n");
4158
6.75k
        ++ActualIdx;
4159
6.75k
        continue;
4160
6.75k
      }
4161
4.81k
      // If the generic handler indicates an invalid operand
4162
4.81k
      // failure, check for a special case.
4163
4.81k
      if (Diag != Match_Success) {
4164
4.81k
        unsigned TargetDiag = validateTargetOperandClass(Actual, Formal);
4165
4.81k
        if (TargetDiag == Match_Success) {
4166
152
          DEBUG_WITH_TYPE("asm-matcher",
4167
152
                          dbgs() << "match success using target matcher\n");
4168
152
          ++ActualIdx;
4169
152
          continue;
4170
152
        }
4171
4.66k
        // If the target matcher returned a specific error code use
4172
4.66k
        // that, else use the one from the generic matcher.
4173
4.66k
        if (TargetDiag != Match_InvalidOperand && 
HasRequiredFeatures0
)
4174
0
          Diag = TargetDiag;
4175
4.66k
      }
4176
4.81k
      // If current formal operand wasn't matched and it is optional
4177
4.81k
      // then try to match next formal operand
4178
4.81k
      
if (4.66k
Diag == Match_InvalidOperand4.66k
&&
isSubclass(Formal, OptionalMatchClass)4.66k
) {
4179
0
        DEBUG_WITH_TYPE("asm-matcher", dbgs() << "ignoring optional operand\n");
4180
0
        continue;
4181
0
      }
4182
4.66k
      // If this operand is broken for all of the instances of this
4183
4.66k
      // mnemonic, keep track of it so we can report loc info.
4184
4.66k
      // If we already had a match that only failed due to a
4185
4.66k
      // target predicate, that diagnostic is preferred.
4186
4.66k
      if (!HadMatchOtherThanPredicate &&
4187
4.66k
          (it == MnemonicRange.first || 
ErrorInfo <= ActualIdx3.55k
)) {
4188
3.75k
        if (HasRequiredFeatures && 
(3.70k
ErrorInfo != ActualIdx3.70k
||
Diag != Match_InvalidOperand2.15k
))
4189
1.55k
          RetCode = Diag;
4190
3.75k
        ErrorInfo = ActualIdx;
4191
3.75k
      }
4192
4.66k
      // Otherwise, just reject this instance of the mnemonic.
4193
4.66k
      OperandsValid = false;
4194
4.66k
      break;
4195
4.66k
    }
4196
6.50k
4197
6.50k
    if (!OperandsValid) {
4198
4.66k
      DEBUG_WITH_TYPE("asm-matcher", dbgs() << "Opcode result: multiple "
4199
4.66k
                                               "operand mismatches, ignoring "
4200
4.66k
                                               "this opcode\n");
4201
4.66k
      continue;
4202
4.66k
    }
4203
1.84k
    if (!HasRequiredFeatures) {
4204
60
      HadMatchOtherThanFeatures = true;
4205
60
      uint64_t NewMissingFeatures = it->RequiredFeatures & ~AvailableFeatures;
4206
60
      DEBUG_WITH_TYPE("asm-matcher", dbgs() << "Missing target features: "
4207
60
                                            << format_hex(NewMissingFeatures, 18)
4208
60
                                            << "\n");
4209
60
      if (countPopulation(NewMissingFeatures) <=
4210
60
          countPopulation(MissingFeatures))
4211
60
        MissingFeatures = NewMissingFeatures;
4212
60
      continue;
4213
60
    }
4214
1.78k
4215
1.78k
    Inst.clear();
4216
1.78k
4217
1.78k
    Inst.setOpcode(it->Opcode);
4218
1.78k
    // We have a potential match but have not rendered the operands.
4219
1.78k
    // Check the target predicate to handle any context sensitive
4220
1.78k
    // constraints.
4221
1.78k
    // For example, Ties that are referenced multiple times must be
4222
1.78k
    // checked here to ensure the input is the same for each match
4223
1.78k
    // constraints. If we leave it any later the ties will have been
4224
1.78k
    // canonicalized
4225
1.78k
    unsigned MatchResult;
4226
1.78k
    if ((MatchResult = checkEarlyTargetMatchPredicate(Inst, Operands)) != Match_Success) {
4227
0
      Inst.clear();
4228
0
      DEBUG_WITH_TYPE(
4229
0
          "asm-matcher",
4230
0
          dbgs() << "Early target match predicate failed with diag code "
4231
0
                 << MatchResult << "\n");
4232
0
      RetCode = MatchResult;
4233
0
      HadMatchOtherThanPredicate = true;
4234
0
      continue;
4235
0
    }
4236
1.78k
4237
1.78k
    if (matchingInlineAsm) {
4238
0
      convertToMapAndConstraints(it->ConvertFn, Operands);
4239
0
      if (!checkAsmTiedOperandConstraints(*this, it->ConvertFn, Operands, ErrorInfo))
4240
0
        return Match_InvalidTiedOperand;
4241
0
4242
0
      return Match_Success;
4243
0
    }
4244
1.78k
4245
1.78k
    // We have selected a definite instruction, convert the parsed
4246
1.78k
    // operands into the appropriate MCInst.
4247
1.78k
    convertToMCInst(it->ConvertFn, Inst, it->Opcode, Operands);
4248
1.78k
4249
1.78k
    // We have a potential match. Check the target predicate to
4250
1.78k
    // handle any context sensitive constraints.
4251
1.78k
    if ((MatchResult = checkTargetMatchPredicate(Inst)) != Match_Success) {
4252
0
      DEBUG_WITH_TYPE("asm-matcher",
4253
0
                      dbgs() << "Target match predicate failed with diag code "
4254
0
                             << MatchResult << "\n");
4255
0
      Inst.clear();
4256
0
      RetCode = MatchResult;
4257
0
      HadMatchOtherThanPredicate = true;
4258
0
      continue;
4259
0
    }
4260
1.78k
4261
1.78k
    if (!checkAsmTiedOperandConstraints(*this, it->ConvertFn, Operands, ErrorInfo))
4262
0
      return Match_InvalidTiedOperand;
4263
1.78k
4264
1.78k
    DEBUG_WITH_TYPE(
4265
1.78k
        "asm-matcher",
4266
1.78k
        dbgs() << "Opcode result: complete match, selecting this opcode\n");
4267
1.78k
    return Match_Success;
4268
1.78k
  }
4269
1.84k
4270
1.84k
  // Okay, we had no match.  Try to return a useful error code.
4271
1.84k
  
if (60
HadMatchOtherThanPredicate60
||
!HadMatchOtherThanFeatures60
)
4272
0
    return RetCode;
4273
60
4274
60
  // Missing feature matches return which features were missing
4275
60
  ErrorInfo = MissingFeatures;
4276
60
  return Match_MissingFeature;
4277
60
}
4278
4279
namespace {
4280
  struct OperandMatchEntry {
4281
    uint8_t RequiredFeatures;
4282
    uint16_t Mnemonic;
4283
    uint8_t Class;
4284
    uint8_t OperandMask;
4285
4286
40.8k
    StringRef getMnemonic() const {
4287
40.8k
      return StringRef(MnemonicTable + Mnemonic + 1,
4288
40.8k
                       MnemonicTable[Mnemonic]);
4289
40.8k
    }
4290
  };
4291
4292
  // Predicate for searching for an opcode.
4293
  struct LessOpcodeOperand {
4294
25.5k
    bool operator()(const OperandMatchEntry &LHS, StringRef RHS) {
4295
25.5k
      return LHS.getMnemonic()  < RHS;
4296
25.5k
    }
4297
15.2k
    bool operator()(StringRef LHS, const OperandMatchEntry &RHS) {
4298
15.2k
      return LHS < RHS.getMnemonic();
4299
15.2k
    }
4300
0
    bool operator()(const OperandMatchEntry &LHS, const OperandMatchEntry &RHS) {
4301
0
      return LHS.getMnemonic() < RHS.getMnemonic();
4302
0
    }
4303
  };
4304
} // end anonymous namespace.
4305
4306
static const OperandMatchEntry OperandMatchTable[102] = {
4307
  /* Operand List Mask, Mnemonic, Operand Class, Features */
4308
  { 0, 252 /* call */, MCK_MEMri, 1 /* 0 */ },
4309
  { 0, 252 /* call */, MCK_MEMrr, 1 /* 0 */ },
4310
  { 0, 352 /* clr */, MCK_MEMri, 2 /* 1 */ },
4311
  { 0, 352 /* clr */, MCK_MEMrr, 2 /* 1 */ },
4312
  { 0, 356 /* clrb */, MCK_MEMri, 2 /* 1 */ },
4313
  { 0, 356 /* clrb */, MCK_MEMrr, 2 /* 1 */ },
4314
  { 0, 361 /* clrh */, MCK_MEMri, 2 /* 1 */ },
4315
  { 0, 361 /* clrh */, MCK_MEMrr, 2 /* 1 */ },
4316
  { 0, 915 /* flush */, MCK_MEMri, 1 /* 0 */ },
4317
  { 0, 915 /* flush */, MCK_MEMrr, 1 /* 0 */ },
4318
  { 0, 2408 /* jmp */, MCK_MEMri, 1 /* 0 */ },
4319
  { 0, 2408 /* jmp */, MCK_MEMrr, 1 /* 0 */ },
4320
  { 0, 2412 /* jmpl */, MCK_MEMri, 1 /* 0 */ },
4321
  { 0, 2412 /* jmpl */, MCK_MEMrr, 1 /* 0 */ },
4322
  { 0, 2417 /* ld */, MCK_MEMri, 2 /* 1 */ },
4323
  { 0, 2417 /* ld */, MCK_MEMri, 2 /* 1 */ },
4324
  { 0, 2417 /* ld */, MCK_MEMri, 2 /* 1 */ },
4325
  { 0, 2417 /* ld */, MCK_MEMri, 2 /* 1 */ },
4326
  { 0, 2417 /* ld */, MCK_MEMri, 2 /* 1 */ },
4327
  { 0, 2417 /* ld */, MCK_MEMrr, 2 /* 1 */ },
4328
  { 0, 2417 /* ld */, MCK_MEMrr, 2 /* 1 */ },
4329
  { 0, 2417 /* ld */, MCK_MEMrr, 2 /* 1 */ },
4330
  { 0, 2417 /* ld */, MCK_MEMrr, 2 /* 1 */ },
4331
  { 0, 2417 /* ld */, MCK_MEMrr, 2 /* 1 */ },
4332
  { 0, 2417 /* ld */, MCK_MEMrr, 2 /* 1 */ },
4333
  { Feature_HasV9, 2420 /* lda */, MCK_MEMrr, 2 /* 1 */ },
4334
  { 0, 2420 /* lda */, MCK_MEMrr, 2 /* 1 */ },
4335
  { 0, 2424 /* ldd */, MCK_MEMri, 2 /* 1 */ },
4336
  { 0, 2424 /* ldd */, MCK_MEMri, 2 /* 1 */ },
4337
  { 0, 2424 /* ldd */, MCK_MEMri, 2 /* 1 */ },
4338
  { 0, 2424 /* ldd */, MCK_MEMrr, 2 /* 1 */ },
4339
  { 0, 2424 /* ldd */, MCK_MEMrr, 2 /* 1 */ },
4340
  { 0, 2424 /* ldd */, MCK_MEMrr, 2 /* 1 */ },
4341
  { 0, 2428 /* ldda */, MCK_MEMrr, 2 /* 1 */ },
4342
  { Feature_HasV9, 2428 /* ldda */, MCK_MEMrr, 2 /* 1 */ },
4343
  { Feature_HasV9, 2433 /* ldq */, MCK_MEMri, 2 /* 1 */ },
4344
  { Feature_HasV9, 2433 /* ldq */, MCK_MEMrr, 2 /* 1 */ },
4345
  { Feature_HasV9, 2437 /* ldqa */, MCK_MEMrr, 2 /* 1 */ },
4346
  { 0, 2442 /* ldsb */, MCK_MEMri, 2 /* 1 */ },
4347
  { 0, 2442 /* ldsb */, MCK_MEMrr, 2 /* 1 */ },
4348
  { 0, 2447 /* ldsba */, MCK_MEMrr, 2 /* 1 */ },
4349
  { 0, 2453 /* ldsh */, MCK_MEMri, 2 /* 1 */ },
4350
  { 0, 2453 /* ldsh */, MCK_MEMrr, 2 /* 1 */ },
4351
  { 0, 2458 /* ldsha */, MCK_MEMrr, 2 /* 1 */ },
4352
  { 0, 2464 /* ldstub */, MCK_MEMri, 2 /* 1 */ },
4353
  { 0, 2464 /* ldstub */, MCK_MEMrr, 2 /* 1 */ },
4354
  { 0, 2471 /* ldstuba */, MCK_MEMrr, 2 /* 1 */ },
4355
  { 0, 2479 /* ldsw */, MCK_MEMri, 2 /* 1 */ },
4356
  { 0, 2479 /* ldsw */, MCK_MEMrr, 2 /* 1 */ },
4357
  { 0, 2484 /* ldub */, MCK_MEMri, 2 /* 1 */ },
4358
  { 0, 2484 /* ldub */, MCK_MEMrr, 2 /* 1 */ },
4359
  { 0, 2489 /* lduba */, MCK_MEMrr, 2 /* 1 */ },
4360
  { 0, 2495 /* lduh */, MCK_MEMri, 2 /* 1 */ },
4361
  { 0, 2495 /* lduh */, MCK_MEMrr, 2 /* 1 */ },
4362
  { 0, 2500 /* lduha */, MCK_MEMrr, 2 /* 1 */ },
4363
  { Feature_HasV9, 2506 /* ldx */, MCK_MEMri, 2 /* 1 */ },
4364
  { 0, 2506 /* ldx */, MCK_MEMri, 2 /* 1 */ },
4365
  { Feature_HasV9, 2506 /* ldx */, MCK_MEMrr, 2 /* 1 */ },
4366
  { 0, 2506 /* ldx */, MCK_MEMrr, 2 /* 1 */ },
4367
  { 0, 2506 /* ldx */, MCK_MEMrr, 2 /* 1 */ },
4368
  { 0, 2857 /* rett */, MCK_MEMri, 1 /* 0 */ },
4369
  { 0, 2857 /* rett */, MCK_MEMrr, 1 /* 0 */ },
4370
  { 0, 2959 /* st */, MCK_MEMri, 4 /* 2 */ },
4371
  { 0, 2959 /* st */, MCK_MEMrr, 4 /* 2 */ },
4372
  { 0, 2959 /* st */, MCK_MEMri, 4 /* 2 */ },
4373
  { 0, 2959 /* st */, MCK_MEMrr, 4 /* 2 */ },
4374
  { 0, 2959 /* st */, MCK_MEMri, 4 /* 2 */ },
4375
  { 0, 2959 /* st */, MCK_MEMrr, 4 /* 2 */ },
4376
  { 0, 2959 /* st */, MCK_MEMri, 4 /* 2 */ },
4377
  { 0, 2959 /* st */, MCK_MEMrr, 4 /* 2 */ },
4378
  { 0, 2959 /* st */, MCK_MEMri, 4 /* 2 */ },
4379
  { 0, 2959 /* st */, MCK_MEMrr, 4 /* 2 */ },
4380
  { Feature_HasV9, 2962 /* sta */, MCK_MEMrr, 4 /* 2 */ },
4381
  { 0, 2962 /* sta */, MCK_MEMrr, 4 /* 2 */ },
4382
  { 0, 2966 /* stb */, MCK_MEMri, 4 /* 2 */ },
4383
  { 0, 2966 /* stb */, MCK_MEMrr, 4 /* 2 */ },
4384
  { 0, 2970 /* stba */, MCK_MEMrr, 4 /* 2 */ },
4385
  { 0, 2981 /* std */, MCK_MEMri, 4 /* 2 */ },
4386
  { 0, 2981 /* std */, MCK_MEMrr, 4 /* 2 */ },
4387
  { 0, 2981 /* std */, MCK_MEMri, 4 /* 2 */ },
4388
  { 0, 2981 /* std */, MCK_MEMrr, 4 /* 2 */ },
4389
  { 0, 2981 /* std */, MCK_MEMri, 4 /* 2 */ },
4390
  { 0, 2981 /* std */, MCK_MEMrr, 4 /* 2 */ },
4391
  { 0, 2981 /* std */, MCK_MEMri, 4 /* 2 */ },
4392
  { 0, 2981 /* std */, MCK_MEMrr, 4 /* 2 */ },
4393
  { 0, 2981 /* std */, MCK_MEMri, 4 /* 2 */ },
4394
  { 0, 2981 /* std */, MCK_MEMrr, 4 /* 2 */ },
4395
  { 0, 2985 /* stda */, MCK_MEMrr, 4 /* 2 */ },
4396
  { Feature_HasV9, 2985 /* stda */, MCK_MEMrr, 4 /* 2 */ },
4397
  { 0, 2990 /* sth */, MCK_MEMri, 4 /* 2 */ },
4398
  { 0, 2990 /* sth */, MCK_MEMrr, 4 /* 2 */ },
4399
  { 0, 2994 /* stha */, MCK_MEMrr, 4 /* 2 */ },
4400
  { Feature_HasV9, 2999 /* stq */, MCK_MEMri, 4 /* 2 */ },
4401
  { Feature_HasV9, 2999 /* stq */, MCK_MEMrr, 4 /* 2 */ },
4402
  { Feature_HasV9, 3003 /* stqa */, MCK_MEMrr, 4 /* 2 */ },
4403
  { Feature_HasV9, 3008 /* stx */, MCK_MEMri, 4 /* 2 */ },
4404
  { Feature_HasV9, 3008 /* stx */, MCK_MEMrr, 4 /* 2 */ },
4405
  { 0, 3008 /* stx */, MCK_MEMri, 4 /* 2 */ },
4406
  { 0, 3008 /* stx */, MCK_MEMrr, 4 /* 2 */ },
4407
  { 0, 3034 /* swap */, MCK_MEMri, 2 /* 1 */ },
4408
  { 0, 3034 /* swap */, MCK_MEMrr, 2 /* 1 */ },
4409
  { 0, 3039 /* swapa */, MCK_MEMrr, 2 /* 1 */ },
4410
};
4411
4412
OperandMatchResultTy SparcAsmParser::
4413
tryCustomParseOperand(OperandVector &Operands,
4414
81
                      unsigned MCK) {
4415
81
4416
81
  switch(MCK) {
4417
81
  case MCK_MEMri:
4418
59
    return parseMEMOperand(Operands);
4419
81
  case MCK_MEMrr:
4420
22
    return parseMEMOperand(Operands);
4421
81
  default:
4422
0
    return MatchOperand_NoMatch;
4423
0
  }
4424
0
  return MatchOperand_NoMatch;
4425
0
}
4426
4427
OperandMatchResultTy SparcAsmParser::
4428
MatchOperandParserImpl(OperandVector &Operands,
4429
                       StringRef Mnemonic,
4430
3.80k
                       bool ParseForAllFeatures) {
4431
3.80k
  // Get the current feature set.
4432
3.80k
  uint64_t AvailableFeatures = getAvailableFeatures();
4433
3.80k
4434
3.80k
  // Get the next operand index.
4435
3.80k
  unsigned NextOpNum = Operands.size() - 1;
4436
3.80k
  // Search the table.
4437
3.80k
  auto MnemonicRange =
4438
3.80k
    std::equal_range(std::begin(OperandMatchTable), std::end(OperandMatchTable),
4439
3.80k
                     Mnemonic, LessOpcodeOperand());
4440
3.80k
4441
3.80k
  if (MnemonicRange.first == MnemonicRange.second)
4442
3.28k
    return MatchOperand_NoMatch;
4443
525
4444
525
  for (const OperandMatchEntry *it = MnemonicRange.first,
4445
2.94k
       *ie = MnemonicRange.second; it != ie; 
++it2.42k
) {
4446
2.46k
    // equal_range guarantees that instruction mnemonic matches.
4447
2.46k
    assert(Mnemonic == it->getMnemonic());
4448
2.46k
4449
2.46k
    // check if the available features match
4450
2.46k
    if (!ParseForAllFeatures && (AvailableFeatures & it->RequiredFeatures) != it->RequiredFeatures)
4451
66
        continue;
4452
2.39k
4453
2.39k
    // check if the operand in question has a custom parser.
4454
2.39k
    if (!(it->OperandMask & (1 << NextOpNum)))
4455
2.31k
      continue;
4456
81
4457
81
    // call custom parse method to handle the operand
4458
81
    OperandMatchResultTy Result = tryCustomParseOperand(Operands, it->Class);
4459
81
    if (Result != MatchOperand_NoMatch)
4460
37
      return Result;
4461
81
  }
4462
525
4463
525
  // Okay, we had no match.
4464
525
  
return MatchOperand_NoMatch488
;
4465
525
}
4466
4467
#endif // GET_MATCHER_IMPLEMENTATION
4468
4469
4470
#ifdef GET_MNEMONIC_SPELL_CHECKER
4471
#undef GET_MNEMONIC_SPELL_CHECKER
4472
4473
static std::string SparcMnemonicSpellCheck(StringRef S, uint64_t FBS, unsigned VariantID) {
4474
  const unsigned MaxEditDist = 2;
4475
  std::vector<StringRef> Candidates;
4476
  StringRef Prev = "";
4477
4478
  // Find the appropriate table for this asm variant.
4479
  const MatchEntry *Start, *End;
4480
  switch (VariantID) {
4481
  default: llvm_unreachable("invalid variant!");
4482
  case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break;
4483
  }
4484
4485
  for (auto I = Start; I < End; I++) {
4486
    // Ignore unsupported instructions.
4487
    if ((FBS & I->RequiredFeatures) != I->RequiredFeatures)
4488
      continue;
4489
4490
    StringRef T = I->getMnemonic();
4491
    // Avoid recomputing the edit distance for the same string.
4492
    if (T.equals(Prev))
4493
      continue;
4494
4495
    Prev = T;
4496
    unsigned Dist = S.edit_distance(T, false, MaxEditDist);
4497
    if (Dist <= MaxEditDist)
4498
      Candidates.push_back(T);
4499
  }
4500
4501
  if (Candidates.empty())
4502
    return "";
4503
4504
  std::string Res = ", did you mean: ";
4505
  unsigned i = 0;
4506
  for( ; i < Candidates.size() - 1; i++)
4507
    Res += Candidates[i].str() + ", ";
4508
  return Res + Candidates[i].str() + "?";
4509
}
4510
4511
#endif // GET_MNEMONIC_SPELL_CHECKER
4512