Coverage Report

Created: 2019-03-24 22:13

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/clang-build/lib/Target/Sparc/SparcGenMCCodeEmitter.inc
Line
Count
Source (jump to first uncovered line)
1
/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2
|*                                                                            *|
3
|* Machine Code Emitter                                                       *|
4
|*                                                                            *|
5
|* Automatically generated file, do not edit!                                 *|
6
|*                                                                            *|
7
\*===----------------------------------------------------------------------===*/
8
9
uint64_t SparcMCCodeEmitter::getBinaryCodeForInstr(const MCInst &MI,
10
    SmallVectorImpl<MCFixup> &Fixups,
11
1.99k
    const MCSubtargetInfo &STI) const {
12
1.99k
  static const uint64_t InstBits[] = {
13
1.99k
    UINT64_C(0),
14
1.99k
    UINT64_C(0),
15
1.99k
    UINT64_C(0),
16
1.99k
    UINT64_C(0),
17
1.99k
    UINT64_C(0),
18
1.99k
    UINT64_C(0),
19
1.99k
    UINT64_C(0),
20
1.99k
    UINT64_C(0),
21
1.99k
    UINT64_C(0),
22
1.99k
    UINT64_C(0),
23
1.99k
    UINT64_C(0),
24
1.99k
    UINT64_C(0),
25
1.99k
    UINT64_C(0),
26
1.99k
    UINT64_C(0),
27
1.99k
    UINT64_C(0),
28
1.99k
    UINT64_C(0),
29
1.99k
    UINT64_C(0),
30
1.99k
    UINT64_C(0),
31
1.99k
    UINT64_C(0),
32
1.99k
    UINT64_C(0),
33
1.99k
    UINT64_C(0),
34
1.99k
    UINT64_C(0),
35
1.99k
    UINT64_C(0),
36
1.99k
    UINT64_C(0),
37
1.99k
    UINT64_C(0),
38
1.99k
    UINT64_C(0),
39
1.99k
    UINT64_C(0),
40
1.99k
    UINT64_C(0),
41
1.99k
    UINT64_C(0),
42
1.99k
    UINT64_C(0),
43
1.99k
    UINT64_C(0),
44
1.99k
    UINT64_C(0),
45
1.99k
    UINT64_C(0),
46
1.99k
    UINT64_C(0),
47
1.99k
    UINT64_C(0),
48
1.99k
    UINT64_C(0),
49
1.99k
    UINT64_C(0),
50
1.99k
    UINT64_C(0),
51
1.99k
    UINT64_C(0),
52
1.99k
    UINT64_C(0),
53
1.99k
    UINT64_C(0),
54
1.99k
    UINT64_C(0),
55
1.99k
    UINT64_C(0),
56
1.99k
    UINT64_C(0),
57
1.99k
    UINT64_C(0),
58
1.99k
    UINT64_C(0),
59
1.99k
    UINT64_C(0),
60
1.99k
    UINT64_C(0),
61
1.99k
    UINT64_C(0),
62
1.99k
    UINT64_C(0),
63
1.99k
    UINT64_C(0),
64
1.99k
    UINT64_C(0),
65
1.99k
    UINT64_C(0),
66
1.99k
    UINT64_C(0),
67
1.99k
    UINT64_C(0),
68
1.99k
    UINT64_C(0),
69
1.99k
    UINT64_C(0),
70
1.99k
    UINT64_C(0),
71
1.99k
    UINT64_C(0),
72
1.99k
    UINT64_C(0),
73
1.99k
    UINT64_C(0),
74
1.99k
    UINT64_C(0),
75
1.99k
    UINT64_C(0),
76
1.99k
    UINT64_C(0),
77
1.99k
    UINT64_C(0),
78
1.99k
    UINT64_C(0),
79
1.99k
    UINT64_C(0),
80
1.99k
    UINT64_C(0),
81
1.99k
    UINT64_C(0),
82
1.99k
    UINT64_C(0),
83
1.99k
    UINT64_C(0),
84
1.99k
    UINT64_C(0),
85
1.99k
    UINT64_C(0),
86
1.99k
    UINT64_C(0),
87
1.99k
    UINT64_C(0),
88
1.99k
    UINT64_C(0),
89
1.99k
    UINT64_C(0),
90
1.99k
    UINT64_C(0),
91
1.99k
    UINT64_C(0),
92
1.99k
    UINT64_C(0),
93
1.99k
    UINT64_C(0),
94
1.99k
    UINT64_C(0),
95
1.99k
    UINT64_C(0),
96
1.99k
    UINT64_C(0),
97
1.99k
    UINT64_C(0),
98
1.99k
    UINT64_C(0),
99
1.99k
    UINT64_C(0),
100
1.99k
    UINT64_C(0),
101
1.99k
    UINT64_C(0),
102
1.99k
    UINT64_C(0),
103
1.99k
    UINT64_C(0),
104
1.99k
    UINT64_C(0),
105
1.99k
    UINT64_C(0),
106
1.99k
    UINT64_C(0),
107
1.99k
    UINT64_C(0),
108
1.99k
    UINT64_C(0),
109
1.99k
    UINT64_C(0),
110
1.99k
    UINT64_C(0),
111
1.99k
    UINT64_C(0),
112
1.99k
    UINT64_C(0),
113
1.99k
    UINT64_C(0),
114
1.99k
    UINT64_C(0),
115
1.99k
    UINT64_C(0),
116
1.99k
    UINT64_C(0),
117
1.99k
    UINT64_C(0),
118
1.99k
    UINT64_C(0),
119
1.99k
    UINT64_C(0),
120
1.99k
    UINT64_C(0),
121
1.99k
    UINT64_C(0),
122
1.99k
    UINT64_C(0),
123
1.99k
    UINT64_C(0),
124
1.99k
    UINT64_C(0),
125
1.99k
    UINT64_C(0),
126
1.99k
    UINT64_C(0),
127
1.99k
    UINT64_C(0),
128
1.99k
    UINT64_C(0),
129
1.99k
    UINT64_C(0),
130
1.99k
    UINT64_C(0),
131
1.99k
    UINT64_C(0),
132
1.99k
    UINT64_C(0),
133
1.99k
    UINT64_C(0),
134
1.99k
    UINT64_C(0),
135
1.99k
    UINT64_C(0),
136
1.99k
    UINT64_C(0),
137
1.99k
    UINT64_C(0),
138
1.99k
    UINT64_C(0),
139
1.99k
    UINT64_C(0),
140
1.99k
    UINT64_C(0),
141
1.99k
    UINT64_C(0),
142
1.99k
    UINT64_C(0),
143
1.99k
    UINT64_C(0),
144
1.99k
    UINT64_C(0),
145
1.99k
    UINT64_C(0),
146
1.99k
    UINT64_C(0),
147
1.99k
    UINT64_C(0),
148
1.99k
    UINT64_C(0),
149
1.99k
    UINT64_C(0),
150
1.99k
    UINT64_C(0),
151
1.99k
    UINT64_C(0),
152
1.99k
    UINT64_C(0),
153
1.99k
    UINT64_C(0),
154
1.99k
    UINT64_C(0),
155
1.99k
    UINT64_C(0),
156
1.99k
    UINT64_C(0),
157
1.99k
    UINT64_C(0),
158
1.99k
    UINT64_C(0),
159
1.99k
    UINT64_C(0),
160
1.99k
    UINT64_C(0),
161
1.99k
    UINT64_C(0),
162
1.99k
    UINT64_C(0),
163
1.99k
    UINT64_C(0),
164
1.99k
    UINT64_C(0),
165
1.99k
    UINT64_C(0),
166
1.99k
    UINT64_C(0),
167
1.99k
    UINT64_C(0),
168
1.99k
    UINT64_C(0),
169
1.99k
    UINT64_C(0),
170
1.99k
    UINT64_C(0),
171
1.99k
    UINT64_C(0),
172
1.99k
    UINT64_C(0),
173
1.99k
    UINT64_C(2155880448), // ADDCCri
174
1.99k
    UINT64_C(2155872256), // ADDCCrr
175
1.99k
    UINT64_C(2151686144), // ADDCri
176
1.99k
    UINT64_C(2151677952), // ADDCrr
177
1.99k
    UINT64_C(2160074752), // ADDEri
178
1.99k
    UINT64_C(2160066560), // ADDErr
179
1.99k
    UINT64_C(2175795744), // ADDXC
180
1.99k
    UINT64_C(2175795808), // ADDXCCC
181
1.99k
    UINT64_C(2147491840), // ADDXri
182
1.99k
    UINT64_C(2147483648), // ADDXrr
183
1.99k
    UINT64_C(2147491840), // ADDri
184
1.99k
    UINT64_C(2147483648), // ADDrr
185
1.99k
    UINT64_C(2175795968), // ALIGNADDR
186
1.99k
    UINT64_C(2175796032), // ALIGNADDRL
187
1.99k
    UINT64_C(2156404736), // ANDCCri
188
1.99k
    UINT64_C(2156396544), // ANDCCrr
189
1.99k
    UINT64_C(2158501888), // ANDNCCri
190
1.99k
    UINT64_C(2158493696), // ANDNCCrr
191
1.99k
    UINT64_C(2150113280), // ANDNri
192
1.99k
    UINT64_C(2150105088), // ANDNrr
193
1.99k
    UINT64_C(2150105088), // ANDXNrr
194
1.99k
    UINT64_C(2148016128), // ANDXri
195
1.99k
    UINT64_C(2148007936), // ANDXrr
196
1.99k
    UINT64_C(2148016128), // ANDri
197
1.99k
    UINT64_C(2148007936), // ANDrr
198
1.99k
    UINT64_C(2175795776), // ARRAY16
199
1.99k
    UINT64_C(2175795840), // ARRAY32
200
1.99k
    UINT64_C(2175795712), // ARRAY8
201
1.99k
    UINT64_C(276824064),  // BA
202
1.99k
    UINT64_C(8388608),  // BCOND
203
1.99k
    UINT64_C(545259520),  // BCONDA
204
1.99k
    UINT64_C(2176851968), // BINDri
205
1.99k
    UINT64_C(2176843776), // BINDrr
206
1.99k
    UINT64_C(2175796000), // BMASK
207
1.99k
    UINT64_C(21495808), // BPFCC
208
1.99k
    UINT64_C(558366720),  // BPFCCA
209
1.99k
    UINT64_C(557842432),  // BPFCCANT
210
1.99k
    UINT64_C(20971520), // BPFCCNT
211
1.99k
    UINT64_C(784334848),  // BPGEZapn
212
1.99k
    UINT64_C(784859136),  // BPGEZapt
213
1.99k
    UINT64_C(247463936),  // BPGEZnapn
214
1.99k
    UINT64_C(247988224),  // BPGEZnapt
215
1.99k
    UINT64_C(750780416),  // BPGZapn
216
1.99k
    UINT64_C(751304704),  // BPGZapt
217
1.99k
    UINT64_C(213909504),  // BPGZnapn
218
1.99k
    UINT64_C(214433792),  // BPGZnapt
219
1.99k
    UINT64_C(4718592),  // BPICC
220
1.99k
    UINT64_C(541589504),  // BPICCA
221
1.99k
    UINT64_C(541065216),  // BPICCANT
222
1.99k
    UINT64_C(4194304),  // BPICCNT
223
1.99k
    UINT64_C(616562688),  // BPLEZapn
224
1.99k
    UINT64_C(617086976),  // BPLEZapt
225
1.99k
    UINT64_C(79691776), // BPLEZnapn
226
1.99k
    UINT64_C(80216064), // BPLEZnapt
227
1.99k
    UINT64_C(650117120),  // BPLZapn
228
1.99k
    UINT64_C(650641408),  // BPLZapt
229
1.99k
    UINT64_C(113246208),  // BPLZnapn
230
1.99k
    UINT64_C(113770496),  // BPLZnapt
231
1.99k
    UINT64_C(717225984),  // BPNZapn
232
1.99k
    UINT64_C(717750272),  // BPNZapt
233
1.99k
    UINT64_C(180355072),  // BPNZnapn
234
1.99k
    UINT64_C(180879360),  // BPNZnapt
235
1.99k
    UINT64_C(6815744),  // BPXCC
236
1.99k
    UINT64_C(543686656),  // BPXCCA
237
1.99k
    UINT64_C(543162368),  // BPXCCANT
238
1.99k
    UINT64_C(6291456),  // BPXCCNT
239
1.99k
    UINT64_C(583008256),  // BPZapn
240
1.99k
    UINT64_C(583532544),  // BPZapt
241
1.99k
    UINT64_C(46137344), // BPZnapn
242
1.99k
    UINT64_C(46661632), // BPZnapt
243
1.99k
    UINT64_C(2175796096), // BSHUFFLE
244
1.99k
    UINT64_C(1073741824), // CALL
245
1.99k
    UINT64_C(2680168448), // CALLri
246
1.99k
    UINT64_C(2680160256), // CALLrr
247
1.99k
    UINT64_C(3252683072), // CASAasi10
248
1.99k
    UINT64_C(3252682752), // CASArr
249
1.99k
    UINT64_C(3253735424), // CASXrr
250
1.99k
    UINT64_C(3252686848), // CASrr
251
1.99k
    UINT64_C(29360128), // CBCOND
252
1.99k
    UINT64_C(566231040),  // CBCONDA
253
1.99k
    UINT64_C(2175796128), // CMASK16
254
1.99k
    UINT64_C(2175796192), // CMASK32
255
1.99k
    UINT64_C(2175796064), // CMASK8
256
1.99k
    UINT64_C(2157977600), // CMPri
257
1.99k
    UINT64_C(2157969408), // CMPrr
258
1.99k
    UINT64_C(2175795328), // EDGE16
259
1.99k
    UINT64_C(2175795392), // EDGE16L
260
1.99k
    UINT64_C(2175795424), // EDGE16LN
261
1.99k
    UINT64_C(2175795360), // EDGE16N
262
1.99k
    UINT64_C(2175795456), // EDGE32
263
1.99k
    UINT64_C(2175795520), // EDGE32L
264
1.99k
    UINT64_C(2175795552), // EDGE32LN
265
1.99k
    UINT64_C(2175795488), // EDGE32N
266
1.99k
    UINT64_C(2175795200), // EDGE8
267
1.99k
    UINT64_C(2175795264), // EDGE8L
268
1.99k
    UINT64_C(2175795296), // EDGE8LN
269
1.99k
    UINT64_C(2175795232), // EDGE8N
270
1.99k
    UINT64_C(2174746944), // FABSD
271
1.99k
    UINT64_C(2174746976), // FABSQ
272
1.99k
    UINT64_C(2174746912), // FABSS
273
1.99k
    UINT64_C(2174748736), // FADDD
274
1.99k
    UINT64_C(2174748768), // FADDQ
275
1.99k
    UINT64_C(2174748704), // FADDS
276
1.99k
    UINT64_C(2175797504), // FALIGNADATA
277
1.99k
    UINT64_C(2175798784), // FAND
278
1.99k
    UINT64_C(2175798528), // FANDNOT1
279
1.99k
    UINT64_C(2175798560), // FANDNOT1S
280
1.99k
    UINT64_C(2175798400), // FANDNOT2
281
1.99k
    UINT64_C(2175798432), // FANDNOT2S
282
1.99k
    UINT64_C(2175798816), // FANDS
283
1.99k
    UINT64_C(25165824), // FBCOND
284
1.99k
    UINT64_C(562036736),  // FBCONDA
285
1.99k
    UINT64_C(2175797376), // FCHKSM16
286
1.99k
    UINT64_C(2175273536), // FCMPD
287
1.99k
    UINT64_C(2175796544), // FCMPEQ16
288
1.99k
    UINT64_C(2175796672), // FCMPEQ32
289
1.99k
    UINT64_C(2175796480), // FCMPGT16
290
1.99k
    UINT64_C(2175796608), // FCMPGT32
291
1.99k
    UINT64_C(2175796224), // FCMPLE16
292
1.99k
    UINT64_C(2175796352), // FCMPLE32
293
1.99k
    UINT64_C(2175796288), // FCMPNE16
294
1.99k
    UINT64_C(2175796416), // FCMPNE32
295
1.99k
    UINT64_C(2175273568), // FCMPQ
296
1.99k
    UINT64_C(2175273504), // FCMPS
297
1.99k
    UINT64_C(2174749120), // FDIVD
298
1.99k
    UINT64_C(2174749152), // FDIVQ
299
1.99k
    UINT64_C(2174749088), // FDIVS
300
1.99k
    UINT64_C(2174750144), // FDMULQ
301
1.99k
    UINT64_C(2174753344), // FDTOI
302
1.99k
    UINT64_C(2174753216), // FDTOQ
303
1.99k
    UINT64_C(2174752960), // FDTOS
304
1.99k
    UINT64_C(2174750784), // FDTOX
305
1.99k
    UINT64_C(2175797664), // FEXPAND
306
1.99k
    UINT64_C(2174749760), // FHADDD
307
1.99k
    UINT64_C(2174749728), // FHADDS
308
1.99k
    UINT64_C(2174749888), // FHSUBD
309
1.99k
    UINT64_C(2174749856), // FHSUBS
310
1.99k
    UINT64_C(2174753024), // FITOD
311
1.99k
    UINT64_C(2174753152), // FITOQ
312
1.99k
    UINT64_C(2174752896), // FITOS
313
1.99k
    UINT64_C(2175806016), // FLCMPD
314
1.99k
    UINT64_C(2175805984), // FLCMPS
315
1.99k
    UINT64_C(2178416640), // FLUSH
316
1.99k
    UINT64_C(2170028032), // FLUSHW
317
1.99k
    UINT64_C(2178424832), // FLUSHri
318
1.99k
    UINT64_C(2178416640), // FLUSHrr
319
1.99k
    UINT64_C(2175797248), // FMEAN16
320
1.99k
    UINT64_C(2174746688), // FMOVD
321
1.99k
    UINT64_C(2175270976), // FMOVD_FCC
322
1.99k
    UINT64_C(2175279168), // FMOVD_ICC
323
1.99k
    UINT64_C(2175283264), // FMOVD_XCC
324
1.99k
    UINT64_C(2174746720), // FMOVQ
325
1.99k
    UINT64_C(2175271008), // FMOVQ_FCC
326
1.99k
    UINT64_C(2175279200), // FMOVQ_ICC
327
1.99k
    UINT64_C(2175283296), // FMOVQ_XCC
328
1.99k
    UINT64_C(2175278272), // FMOVRGEZD
329
1.99k
    UINT64_C(2175278304), // FMOVRGEZQ
330
1.99k
    UINT64_C(2175278240), // FMOVRGEZS
331
1.99k
    UINT64_C(2175277248), // FMOVRGZD
332
1.99k
    UINT64_C(2175277280), // FMOVRGZQ
333
1.99k
    UINT64_C(2175277216), // FMOVRGZS
334
1.99k
    UINT64_C(2175273152), // FMOVRLEZD
335
1.99k
    UINT64_C(2175273184), // FMOVRLEZQ
336
1.99k
    UINT64_C(2175273120), // FMOVRLEZS
337
1.99k
    UINT64_C(2175274176), // FMOVRLZD
338
1.99k
    UINT64_C(2175274208), // FMOVRLZQ
339
1.99k
    UINT64_C(2175274144), // FMOVRLZS
340
1.99k
    UINT64_C(2175276224), // FMOVRNZD
341
1.99k
    UINT64_C(2175276256), // FMOVRNZQ
342
1.99k
    UINT64_C(2175276192), // FMOVRNZS
343
1.99k
    UINT64_C(2175272128), // FMOVRZD
344
1.99k
    UINT64_C(2175272160), // FMOVRZQ
345
1.99k
    UINT64_C(2175272096), // FMOVRZS
346
1.99k
    UINT64_C(2174746656), // FMOVS
347
1.99k
    UINT64_C(2175270944), // FMOVS_FCC
348
1.99k
    UINT64_C(2175279136), // FMOVS_ICC
349
1.99k
    UINT64_C(2175283232), // FMOVS_XCC
350
1.99k
    UINT64_C(2175796928), // FMUL8SUX16
351
1.99k
    UINT64_C(2175796960), // FMUL8ULX16
352
1.99k
    UINT64_C(2175796768), // FMUL8X16
353
1.99k
    UINT64_C(2175796896), // FMUL8X16AL
354
1.99k
    UINT64_C(2175796832), // FMUL8X16AU
355
1.99k
    UINT64_C(2174748992), // FMULD
356
1.99k
    UINT64_C(2175796992), // FMULD8SUX16
357
1.99k
    UINT64_C(2175797024), // FMULD8ULX16
358
1.99k
    UINT64_C(2174749024), // FMULQ
359
1.99k
    UINT64_C(2174748960), // FMULS
360
1.99k
    UINT64_C(2174749248), // FNADDD
361
1.99k
    UINT64_C(2174749216), // FNADDS
362
1.99k
    UINT64_C(2175798720), // FNAND
363
1.99k
    UINT64_C(2175798752), // FNANDS
364
1.99k
    UINT64_C(2174746816), // FNEGD
365
1.99k
    UINT64_C(2174746848), // FNEGQ
366
1.99k
    UINT64_C(2174746784), // FNEGS
367
1.99k
    UINT64_C(2174750272), // FNHADDD
368
1.99k
    UINT64_C(2174750240), // FNHADDS
369
1.99k
    UINT64_C(2174749504), // FNMULD
370
1.99k
    UINT64_C(2174749472), // FNMULS
371
1.99k
    UINT64_C(2175798336), // FNOR
372
1.99k
    UINT64_C(2175798368), // FNORS
373
1.99k
    UINT64_C(2175798592), // FNOT1
374
1.99k
    UINT64_C(2175798624), // FNOT1S
375
1.99k
    UINT64_C(2175798464), // FNOT2
376
1.99k
    UINT64_C(2175798496), // FNOT2S
377
1.99k
    UINT64_C(2174750496), // FNSMULD
378
1.99k
    UINT64_C(2175799232), // FONE
379
1.99k
    UINT64_C(2175799264), // FONES
380
1.99k
    UINT64_C(2175799168), // FOR
381
1.99k
    UINT64_C(2175799104), // FORNOT1
382
1.99k
    UINT64_C(2175799136), // FORNOT1S
383
1.99k
    UINT64_C(2175798976), // FORNOT2
384
1.99k
    UINT64_C(2175799008), // FORNOT2S
385
1.99k
    UINT64_C(2175799200), // FORS
386
1.99k
    UINT64_C(2175797088), // FPACK16
387
1.99k
    UINT64_C(2175797056), // FPACK32
388
1.99k
    UINT64_C(2175797152), // FPACKFIX
389
1.99k
    UINT64_C(2175797760), // FPADD16
390
1.99k
    UINT64_C(2175797792), // FPADD16S
391
1.99k
    UINT64_C(2175797824), // FPADD32
392
1.99k
    UINT64_C(2175797856), // FPADD32S
393
1.99k
    UINT64_C(2175797312), // FPADD64
394
1.99k
    UINT64_C(2175797600), // FPMERGE
395
1.99k
    UINT64_C(2175797888), // FPSUB16
396
1.99k
    UINT64_C(2175797920), // FPSUB16S
397
1.99k
    UINT64_C(2175797952), // FPSUB32
398
1.99k
    UINT64_C(2175797984), // FPSUB32S
399
1.99k
    UINT64_C(2174753120), // FQTOD
400
1.99k
    UINT64_C(2174753376), // FQTOI
401
1.99k
    UINT64_C(2174752992), // FQTOS
402
1.99k
    UINT64_C(2174750816), // FQTOX
403
1.99k
    UINT64_C(2175796512), // FSLAS16
404
1.99k
    UINT64_C(2175796640), // FSLAS32
405
1.99k
    UINT64_C(2175796256), // FSLL16
406
1.99k
    UINT64_C(2175796384), // FSLL32
407
1.99k
    UINT64_C(2174749984), // FSMULD
408
1.99k
    UINT64_C(2174747968), // FSQRTD
409
1.99k
    UINT64_C(2174748000), // FSQRTQ
410
1.99k
    UINT64_C(2174747936), // FSQRTS
411
1.99k
    UINT64_C(2175796576), // FSRA16
412
1.99k
    UINT64_C(2175796704), // FSRA32
413
1.99k
    UINT64_C(2175798912), // FSRC1
414
1.99k
    UINT64_C(2175798944), // FSRC1S
415
1.99k
    UINT64_C(2175799040), // FSRC2
416
1.99k
    UINT64_C(2175799072), // FSRC2S
417
1.99k
    UINT64_C(2175796320), // FSRL16
418
1.99k
    UINT64_C(2175796448), // FSRL32
419
1.99k
    UINT64_C(2174753056), // FSTOD
420
1.99k
    UINT64_C(2174753312), // FSTOI
421
1.99k
    UINT64_C(2174753184), // FSTOQ
422
1.99k
    UINT64_C(2174750752), // FSTOX
423
1.99k
    UINT64_C(2174748864), // FSUBD
424
1.99k
    UINT64_C(2174748896), // FSUBQ
425
1.99k
    UINT64_C(2174748832), // FSUBS
426
1.99k
    UINT64_C(2175798848), // FXNOR
427
1.99k
    UINT64_C(2175798880), // FXNORS
428
1.99k
    UINT64_C(2175798656), // FXOR
429
1.99k
    UINT64_C(2175798688), // FXORS
430
1.99k
    UINT64_C(2174750976), // FXTOD
431
1.99k
    UINT64_C(2174751104), // FXTOQ
432
1.99k
    UINT64_C(2174750848), // FXTOS
433
1.99k
    UINT64_C(2175798272), // FZERO
434
1.99k
    UINT64_C(2175798304), // FZEROS
435
1.99k
    UINT64_C(2176851968), // JMPLri
436
1.99k
    UINT64_C(2176843776), // JMPLrr
437
1.99k
    UINT64_C(3229614080), // LDArr
438
1.99k
    UINT64_C(3246923776), // LDCSRri
439
1.99k
    UINT64_C(3246915584), // LDCSRrr
440
1.99k
    UINT64_C(3246399488), // LDCri
441
1.99k
    UINT64_C(3246391296), // LDCrr
442
1.99k
    UINT64_C(3231186944), // LDDArr
443
1.99k
    UINT64_C(3247972352), // LDDCri
444
1.99k
    UINT64_C(3247964160), // LDDCrr
445
1.99k
    UINT64_C(3247964160), // LDDFArr
446
1.99k
    UINT64_C(3239583744), // LDDFri
447
1.99k
    UINT64_C(3239575552), // LDDFrr
448
1.99k
    UINT64_C(3222806528), // LDDri
449
1.99k
    UINT64_C(3222798336), // LDDrr
450
1.99k
    UINT64_C(3246391296), // LDFArr
451
1.99k
    UINT64_C(3238535168), // LDFSRri
452
1.99k
    UINT64_C(3238526976), // LDFSRrr
453
1.99k
    UINT64_C(3238010880), // LDFri
454
1.99k
    UINT64_C(3238002688), // LDFrr
455
1.99k
    UINT64_C(3247439872), // LDQFArr
456
1.99k
    UINT64_C(3239059456), // LDQFri
457
1.99k
    UINT64_C(3239051264), // LDQFrr
458
1.99k
    UINT64_C(3234332672), // LDSBArr
459
1.99k
    UINT64_C(3225952256), // LDSBri
460
1.99k
    UINT64_C(3225944064), // LDSBrr
461
1.99k
    UINT64_C(3234856960), // LDSHArr
462
1.99k
    UINT64_C(3226476544), // LDSHri
463
1.99k
    UINT64_C(3226468352), // LDSHrr
464
1.99k
    UINT64_C(3236429824), // LDSTUBArr
465
1.99k
    UINT64_C(3228049408), // LDSTUBri
466
1.99k
    UINT64_C(3228041216), // LDSTUBrr
467
1.99k
    UINT64_C(3225427968), // LDSWri
468
1.99k
    UINT64_C(3225419776), // LDSWrr
469
1.99k
    UINT64_C(3230138368), // LDUBArr
470
1.99k
    UINT64_C(3221757952), // LDUBri
471
1.99k
    UINT64_C(3221749760), // LDUBrr
472
1.99k
    UINT64_C(3230662656), // LDUHArr
473
1.99k
    UINT64_C(3222282240), // LDUHri
474
1.99k
    UINT64_C(3222274048), // LDUHrr
475
1.99k
    UINT64_C(3272089600), // LDXFSRri
476
1.99k
    UINT64_C(3272081408), // LDXFSRrr
477
1.99k
    UINT64_C(3227000832), // LDXri
478
1.99k
    UINT64_C(3226992640), // LDXrr
479
1.99k
    UINT64_C(3221233664), // LDri
480
1.99k
    UINT64_C(3221225472), // LDrr
481
1.99k
    UINT64_C(2147491840), // LEAX_ADDri
482
1.99k
    UINT64_C(2147491840), // LEA_ADDri
483
1.99k
    UINT64_C(2175795936), // LZCNT
484
1.99k
    UINT64_C(2168709120), // MEMBARi
485
1.99k
    UINT64_C(2175803904), // MOVDTOX
486
1.99k
    UINT64_C(2170560512), // MOVFCCri
487
1.99k
    UINT64_C(2170552320), // MOVFCCrr
488
1.99k
    UINT64_C(2170822656), // MOVICCri
489
1.99k
    UINT64_C(2170814464), // MOVICCrr
490
1.99k
    UINT64_C(2172140544), // MOVRGEZri
491
1.99k
    UINT64_C(2172132352), // MOVRGEZrr
492
1.99k
    UINT64_C(2172139520), // MOVRGZri
493
1.99k
    UINT64_C(2172131328), // MOVRGZrr
494
1.99k
    UINT64_C(2172135424), // MOVRLEZri
495
1.99k
    UINT64_C(2172127232), // MOVRLEZrr
496
1.99k
    UINT64_C(2172136448), // MOVRLZri
497
1.99k
    UINT64_C(2172128256), // MOVRLZrr
498
1.99k
    UINT64_C(2172138496), // MOVRNZri
499
1.99k
    UINT64_C(2172130304), // MOVRNZrr
500
1.99k
    UINT64_C(2172134400), // MOVRRZri
501
1.99k
    UINT64_C(2172126208), // MOVRRZrr
502
1.99k
    UINT64_C(2175804000), // MOVSTOSW
503
1.99k
    UINT64_C(2175803936), // MOVSTOUW
504
1.99k
    UINT64_C(2175804192), // MOVWTOS
505
1.99k
    UINT64_C(2170826752), // MOVXCCri
506
1.99k
    UINT64_C(2170818560), // MOVXCCrr
507
1.99k
    UINT64_C(2175804160), // MOVXTOD
508
1.99k
    UINT64_C(2166366208), // MULSCCri
509
1.99k
    UINT64_C(2166358016), // MULSCCrr
510
1.99k
    UINT64_C(2152210432), // MULXri
511
1.99k
    UINT64_C(2152202240), // MULXrr
512
1.99k
    UINT64_C(16777216), // NOP
513
1.99k
    UINT64_C(2156929024), // ORCCri
514
1.99k
    UINT64_C(2156920832), // ORCCrr
515
1.99k
    UINT64_C(2159026176), // ORNCCri
516
1.99k
    UINT64_C(2159017984), // ORNCCrr
517
1.99k
    UINT64_C(2150637568), // ORNri
518
1.99k
    UINT64_C(2150629376), // ORNrr
519
1.99k
    UINT64_C(2150629376), // ORXNrr
520
1.99k
    UINT64_C(2148540416), // ORXri
521
1.99k
    UINT64_C(2148532224), // ORXrr
522
1.99k
    UINT64_C(2148540416), // ORri
523
1.99k
    UINT64_C(2148532224), // ORrr
524
1.99k
    UINT64_C(2175797184), // PDIST
525
1.99k
    UINT64_C(2175797216), // PDISTN
526
1.99k
    UINT64_C(2171600896), // POPCrr
527
1.99k
    UINT64_C(2206736384), // PWRPSRri
528
1.99k
    UINT64_C(2206728192), // PWRPSRrr
529
1.99k
    UINT64_C(2168455168), // RDASR
530
1.99k
    UINT64_C(2169503744), // RDPR
531
1.99k
    UINT64_C(2168979456), // RDPSR
532
1.99k
    UINT64_C(2170028032), // RDTBR
533
1.99k
    UINT64_C(2169503744), // RDWIM
534
1.99k
    UINT64_C(2179473408), // RESTOREri
535
1.99k
    UINT64_C(2179465216), // RESTORErr
536
1.99k
    UINT64_C(2177359872), // RET
537
1.99k
    UINT64_C(2177097728), // RETL
538
1.99k
    UINT64_C(2177376256), // RETTri
539
1.99k
    UINT64_C(2177368064), // RETTrr
540
1.99k
    UINT64_C(2178949120), // SAVEri
541
1.99k
    UINT64_C(2178940928), // SAVErr
542
1.99k
    UINT64_C(2163744768), // SDIVCCri
543
1.99k
    UINT64_C(2163736576), // SDIVCCrr
544
1.99k
    UINT64_C(2171084800), // SDIVXri
545
1.99k
    UINT64_C(2171076608), // SDIVXrr
546
1.99k
    UINT64_C(2155356160), // SDIVri
547
1.99k
    UINT64_C(2155347968), // SDIVrr
548
1.99k
    UINT64_C(16777216), // SETHIXi
549
1.99k
    UINT64_C(16777216), // SETHIi
550
1.99k
    UINT64_C(2175799296), // SHUTDOWN
551
1.99k
    UINT64_C(2175799328), // SIAM
552
1.99k
    UINT64_C(2166894592), // SLLXri
553
1.99k
    UINT64_C(2166886400), // SLLXrr
554
1.99k
    UINT64_C(2166890496), // SLLri
555
1.99k
    UINT64_C(2166882304), // SLLrr
556
1.99k
    UINT64_C(2180521984), // SMACri
557
1.99k
    UINT64_C(2180513792), // SMACrr
558
1.99k
    UINT64_C(2161647616), // SMULCCri
559
1.99k
    UINT64_C(2161639424), // SMULCCrr
560
1.99k
    UINT64_C(2153259008), // SMULri
561
1.99k
    UINT64_C(2153250816), // SMULrr
562
1.99k
    UINT64_C(2167943168), // SRAXri
563
1.99k
    UINT64_C(2167934976), // SRAXrr
564
1.99k
    UINT64_C(2167939072), // SRAri
565
1.99k
    UINT64_C(2167930880), // SRArr
566
1.99k
    UINT64_C(2167418880), // SRLXri
567
1.99k
    UINT64_C(2167410688), // SRLXrr
568
1.99k
    UINT64_C(2167414784), // SRLri
569
1.99k
    UINT64_C(2167406592), // SRLrr
570
1.99k
    UINT64_C(3231711232), // STArr
571
1.99k
    UINT64_C(2168700928), // STBAR
572
1.99k
    UINT64_C(3232235520), // STBArr
573
1.99k
    UINT64_C(3223855104), // STBri
574
1.99k
    UINT64_C(3223846912), // STBrr
575
1.99k
    UINT64_C(3249020928), // STCSRri
576
1.99k
    UINT64_C(3249012736), // STCSRrr
577
1.99k
    UINT64_C(3248496640), // STCri
578
1.99k
    UINT64_C(3248488448), // STCrr
579
1.99k
    UINT64_C(3233284096), // STDArr
580
1.99k
    UINT64_C(3249545216), // STDCQri
581
1.99k
    UINT64_C(3249537024), // STDCQrr
582
1.99k
    UINT64_C(3250069504), // STDCri
583
1.99k
    UINT64_C(3250061312), // STDCrr
584
1.99k
    UINT64_C(3250061312), // STDFArr
585
1.99k
    UINT64_C(3241156608), // STDFQri
586
1.99k
    UINT64_C(3241148416), // STDFQrr
587
1.99k
    UINT64_C(3241680896), // STDFri
588
1.99k
    UINT64_C(3241672704), // STDFrr
589
1.99k
    UINT64_C(3224903680), // STDri
590
1.99k
    UINT64_C(3224895488), // STDrr
591
1.99k
    UINT64_C(3248488448), // STFArr
592
1.99k
    UINT64_C(3240632320), // STFSRri
593
1.99k
    UINT64_C(3240624128), // STFSRrr
594
1.99k
    UINT64_C(3240108032), // STFri
595
1.99k
    UINT64_C(3240099840), // STFrr
596
1.99k
    UINT64_C(3232759808), // STHArr
597
1.99k
    UINT64_C(3224379392), // STHri
598
1.99k
    UINT64_C(3224371200), // STHrr
599
1.99k
    UINT64_C(3249537024), // STQFArr
600
1.99k
    UINT64_C(3241156608), // STQFri
601
1.99k
    UINT64_C(3241148416), // STQFrr
602
1.99k
    UINT64_C(3274186752), // STXFSRri
603
1.99k
    UINT64_C(3274178560), // STXFSRrr
604
1.99k
    UINT64_C(3228573696), // STXri
605
1.99k
    UINT64_C(3228565504), // STXrr
606
1.99k
    UINT64_C(3223330816), // STri
607
1.99k
    UINT64_C(3223322624), // STrr
608
1.99k
    UINT64_C(2157977600), // SUBCCri
609
1.99k
    UINT64_C(2157969408), // SUBCCrr
610
1.99k
    UINT64_C(2153783296), // SUBCri
611
1.99k
    UINT64_C(2153775104), // SUBCrr
612
1.99k
    UINT64_C(2162171904), // SUBEri
613
1.99k
    UINT64_C(2162163712), // SUBErr
614
1.99k
    UINT64_C(2149588992), // SUBXri
615
1.99k
    UINT64_C(2149580800), // SUBXrr
616
1.99k
    UINT64_C(2149588992), // SUBri
617
1.99k
    UINT64_C(2149580800), // SUBrr
618
1.99k
    UINT64_C(3237478400), // SWAPArr
619
1.99k
    UINT64_C(3229097984), // SWAPri
620
1.99k
    UINT64_C(3229089792), // SWAPrr
621
1.99k
    UINT64_C(2446336001), // TA1
622
1.99k
    UINT64_C(2446336003), // TA3
623
1.99k
    UINT64_C(2446336005), // TA5
624
1.99k
    UINT64_C(2165317632), // TADDCCTVri
625
1.99k
    UINT64_C(2165309440), // TADDCCTVrr
626
1.99k
    UINT64_C(2164269056), // TADDCCri
627
1.99k
    UINT64_C(2164260864), // TADDCCrr
628
1.99k
    UINT64_C(2177900544), // TICCri
629
1.99k
    UINT64_C(2177892352), // TICCrr
630
1.99k
    UINT64_C(2147483648), // TLS_ADDXrr
631
1.99k
    UINT64_C(2147483648), // TLS_ADDrr
632
1.99k
    UINT64_C(1073741824), // TLS_CALL
633
1.99k
    UINT64_C(3226992640), // TLS_LDXrr
634
1.99k
    UINT64_C(3221225472), // TLS_LDrr
635
1.99k
    UINT64_C(2177900544), // TRAPri
636
1.99k
    UINT64_C(2177892352), // TRAPrr
637
1.99k
    UINT64_C(2165841920), // TSUBCCTVri
638
1.99k
    UINT64_C(2165833728), // TSUBCCTVrr
639
1.99k
    UINT64_C(2164793344), // TSUBCCri
640
1.99k
    UINT64_C(2164785152), // TSUBCCrr
641
1.99k
    UINT64_C(2177904640), // TXCCri
642
1.99k
    UINT64_C(2177896448), // TXCCrr
643
1.99k
    UINT64_C(2163220480), // UDIVCCri
644
1.99k
    UINT64_C(2163212288), // UDIVCCrr
645
1.99k
    UINT64_C(2154307584), // UDIVXri
646
1.99k
    UINT64_C(2154299392), // UDIVXrr
647
1.99k
    UINT64_C(2154831872), // UDIVri
648
1.99k
    UINT64_C(2154823680), // UDIVrr
649
1.99k
    UINT64_C(2179997696), // UMACri
650
1.99k
    UINT64_C(2179989504), // UMACrr
651
1.99k
    UINT64_C(2161123328), // UMULCCri
652
1.99k
    UINT64_C(2161115136), // UMULCCrr
653
1.99k
    UINT64_C(2175795904), // UMULXHI
654
1.99k
    UINT64_C(2152734720), // UMULri
655
1.99k
    UINT64_C(2152726528), // UMULrr
656
1.99k
    UINT64_C(0),  // UNIMP
657
1.99k
    UINT64_C(2175273536), // V9FCMPD
658
1.99k
    UINT64_C(2175273664), // V9FCMPED
659
1.99k
    UINT64_C(2175273696), // V9FCMPEQ
660
1.99k
    UINT64_C(2175273632), // V9FCMPES
661
1.99k
    UINT64_C(2175273568), // V9FCMPQ
662
1.99k
    UINT64_C(2175273504), // V9FCMPS
663
1.99k
    UINT64_C(2175270976), // V9FMOVD_FCC
664
1.99k
    UINT64_C(2175271008), // V9FMOVQ_FCC
665
1.99k
    UINT64_C(2175270944), // V9FMOVS_FCC
666
1.99k
    UINT64_C(2170560512), // V9MOVFCCri
667
1.99k
    UINT64_C(2170552320), // V9MOVFCCrr
668
1.99k
    UINT64_C(2172657664), // WRASRri
669
1.99k
    UINT64_C(2172649472), // WRASRrr
670
1.99k
    UINT64_C(2173706240), // WRPRri
671
1.99k
    UINT64_C(2173698048), // WRPRrr
672
1.99k
    UINT64_C(2173181952), // WRPSRri
673
1.99k
    UINT64_C(2173173760), // WRPSRrr
674
1.99k
    UINT64_C(2174230528), // WRTBRri
675
1.99k
    UINT64_C(2174222336), // WRTBRrr
676
1.99k
    UINT64_C(2173706240), // WRWIMri
677
1.99k
    UINT64_C(2173698048), // WRWIMrr
678
1.99k
    UINT64_C(2175804064), // XMULX
679
1.99k
    UINT64_C(2175804128), // XMULXHI
680
1.99k
    UINT64_C(2159550464), // XNORCCri
681
1.99k
    UINT64_C(2159542272), // XNORCCrr
682
1.99k
    UINT64_C(2151153664), // XNORXrr
683
1.99k
    UINT64_C(2151161856), // XNORri
684
1.99k
    UINT64_C(2151153664), // XNORrr
685
1.99k
    UINT64_C(2157453312), // XORCCri
686
1.99k
    UINT64_C(2157445120), // XORCCrr
687
1.99k
    UINT64_C(2149064704), // XORXri
688
1.99k
    UINT64_C(2149056512), // XORXrr
689
1.99k
    UINT64_C(2149064704), // XORri
690
1.99k
    UINT64_C(2149056512), // XORrr
691
1.99k
    UINT64_C(0)
692
1.99k
  };
693
1.99k
  const unsigned opcode = MI.getOpcode();
694
1.99k
  uint64_t Value = InstBits[opcode];
695
1.99k
  uint64_t op = 0;
696
1.99k
  (void)op;  // suppress warning
697
1.99k
  switch (opcode) {
698
1.99k
    case SP::FLUSH:
699
28
    case SP::FLUSHW:
700
28
    case SP::NOP:
701
28
    case SP::SHUTDOWN:
702
28
    case SP::SIAM:
703
28
    case SP::STBAR:
704
28
    case SP::TA1:
705
28
    case SP::TA3:
706
28
    case SP::TA5: {
707
28
      break;
708
28
    }
709
94
    case SP::BPFCC:
710
94
    case SP::BPFCCA:
711
94
    case SP::BPFCCANT:
712
94
    case SP::BPFCCNT: {
713
94
      // op: cc
714
94
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
715
94
      Value |= (op & UINT64_C(3)) << 20;
716
94
      // op: cond
717
94
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
718
94
      Value |= (op & UINT64_C(15)) << 25;
719
94
      // op: imm19
720
94
      op = getBranchPredTargetOpValue(MI, 0, Fixups, STI);
721
94
      Value |= op & UINT64_C(524287);
722
94
      break;
723
94
    }
724
148
    case SP::BPICC:
725
148
    case SP::BPICCA:
726
148
    case SP::BPICCANT:
727
148
    case SP::BPICCNT:
728
148
    case SP::BPXCC:
729
148
    case SP::BPXCCA:
730
148
    case SP::BPXCCANT:
731
148
    case SP::BPXCCNT: {
732
148
      // op: cond
733
148
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
734
148
      Value |= (op & UINT64_C(15)) << 25;
735
148
      // op: imm19
736
148
      op = getBranchPredTargetOpValue(MI, 0, Fixups, STI);
737
148
      Value |= op & UINT64_C(524287);
738
148
      break;
739
148
    }
740
148
    case SP::CALL:
741
36
    case SP::TLS_CALL: {
742
36
      // op: disp
743
36
      op = getCallTargetOpValue(MI, 0, Fixups, STI);
744
36
      Value |= op & UINT64_C(1073741823);
745
36
      break;
746
36
    }
747
36
    case SP::BPGEZapn:
748
11
    case SP::BPGEZapt:
749
11
    case SP::BPGEZnapn:
750
11
    case SP::BPGEZnapt:
751
11
    case SP::BPGZapn:
752
11
    case SP::BPGZapt:
753
11
    case SP::BPGZnapn:
754
11
    case SP::BPGZnapt:
755
11
    case SP::BPLEZapn:
756
11
    case SP::BPLEZapt:
757
11
    case SP::BPLEZnapn:
758
11
    case SP::BPLEZnapt:
759
11
    case SP::BPLZapn:
760
11
    case SP::BPLZapt:
761
11
    case SP::BPLZnapn:
762
11
    case SP::BPLZnapt:
763
11
    case SP::BPNZapn:
764
11
    case SP::BPNZapt:
765
11
    case SP::BPNZnapn:
766
11
    case SP::BPNZnapt:
767
11
    case SP::BPZapn:
768
11
    case SP::BPZapt:
769
11
    case SP::BPZnapn:
770
11
    case SP::BPZnapt: {
771
11
      // op: imm16
772
11
      op = getBranchOnRegTargetOpValue(MI, 1, Fixups, STI);
773
11
      Value |= (op & UINT64_C(49152)) << 6;
774
11
      Value |= op & UINT64_C(16383);
775
11
      // op: rs1
776
11
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
777
11
      Value |= (op & UINT64_C(31)) << 14;
778
11
      break;
779
11
    }
780
11
    case SP::BA: {
781
4
      // op: imm22
782
4
      op = getBranchTargetOpValue(MI, 0, Fixups, STI);
783
4
      Value |= op & UINT64_C(4194303);
784
4
      break;
785
11
    }
786
225
    case SP::BCOND:
787
225
    case SP::BCONDA:
788
225
    case SP::CBCOND:
789
225
    case SP::CBCONDA:
790
225
    case SP::FBCOND:
791
225
    case SP::FBCONDA: {
792
225
      // op: imm22
793
225
      op = getBranchTargetOpValue(MI, 0, Fixups, STI);
794
225
      Value |= op & UINT64_C(4194303);
795
225
      // op: cond
796
225
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
797
225
      Value |= (op & UINT64_C(15)) << 25;
798
225
      break;
799
225
    }
800
225
    case SP::UNIMP: {
801
5
      // op: imm22
802
5
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
803
5
      Value |= op & UINT64_C(4194303);
804
5
      break;
805
225
    }
806
225
    case SP::SETHIXi:
807
111
    case SP::SETHIi: {
808
111
      // op: imm22
809
111
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
810
111
      Value |= op & UINT64_C(4194303);
811
111
      // op: rd
812
111
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
813
111
      Value |= (op & UINT64_C(31)) << 25;
814
111
      break;
815
111
    }
816
111
    case SP::FONE:
817
19
    case SP::FONES:
818
19
    case SP::FZERO:
819
19
    case SP::FZEROS:
820
19
    case SP::RDPSR:
821
19
    case SP::RDTBR:
822
19
    case SP::RDWIM: {
823
19
      // op: rd
824
19
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
825
19
      Value |= (op & UINT64_C(31)) << 25;
826
19
      break;
827
19
    }
828
19
    case SP::V9MOVFCCrr: {
829
15
      // op: rd
830
15
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
831
15
      Value |= (op & UINT64_C(31)) << 25;
832
15
      // op: cc
833
15
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
834
15
      Value |= (op & UINT64_C(3)) << 11;
835
15
      // op: cond
836
15
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
837
15
      Value |= (op & UINT64_C(15)) << 14;
838
15
      // op: rs2
839
15
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
840
15
      Value |= op & UINT64_C(31);
841
15
      break;
842
19
    }
843
19
    case SP::V9MOVFCCri: {
844
0
      // op: rd
845
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
846
0
      Value |= (op & UINT64_C(31)) << 25;
847
0
      // op: cc
848
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
849
0
      Value |= (op & UINT64_C(3)) << 11;
850
0
      // op: cond
851
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
852
0
      Value |= (op & UINT64_C(15)) << 14;
853
0
      // op: simm11
854
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
855
0
      Value |= op & UINT64_C(2047);
856
0
      break;
857
19
    }
858
56
    case SP::FMOVD_FCC:
859
56
    case SP::FMOVD_ICC:
860
56
    case SP::FMOVD_XCC:
861
56
    case SP::FMOVQ_FCC:
862
56
    case SP::FMOVQ_ICC:
863
56
    case SP::FMOVQ_XCC:
864
56
    case SP::FMOVS_FCC:
865
56
    case SP::FMOVS_ICC:
866
56
    case SP::FMOVS_XCC:
867
56
    case SP::MOVFCCrr:
868
56
    case SP::MOVICCrr:
869
56
    case SP::MOVXCCrr: {
870
56
      // op: rd
871
56
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
872
56
      Value |= (op & UINT64_C(31)) << 25;
873
56
      // op: cond
874
56
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
875
56
      Value |= (op & UINT64_C(15)) << 14;
876
56
      // op: rs2
877
56
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
878
56
      Value |= op & UINT64_C(31);
879
56
      break;
880
56
    }
881
56
    case SP::MOVFCCri:
882
0
    case SP::MOVICCri:
883
0
    case SP::MOVXCCri: {
884
0
      // op: rd
885
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
886
0
      Value |= (op & UINT64_C(31)) << 25;
887
0
      // op: cond
888
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
889
0
      Value |= (op & UINT64_C(15)) << 14;
890
0
      // op: simm11
891
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
892
0
      Value |= op & UINT64_C(2047);
893
0
      break;
894
0
    }
895
15
    case SP::V9FMOVD_FCC:
896
15
    case SP::V9FMOVQ_FCC:
897
15
    case SP::V9FMOVS_FCC: {
898
15
      // op: rd
899
15
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
900
15
      Value |= (op & UINT64_C(31)) << 25;
901
15
      // op: cond
902
15
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
903
15
      Value |= (op & UINT64_C(15)) << 14;
904
15
      // op: opf_cc
905
15
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
906
15
      Value |= (op & UINT64_C(3)) << 11;
907
15
      // op: rs2
908
15
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
909
15
      Value |= op & UINT64_C(31);
910
15
      break;
911
15
    }
912
31
    case SP::FNOT1:
913
31
    case SP::FNOT1S:
914
31
    case SP::FSRC1:
915
31
    case SP::FSRC1S:
916
31
    case SP::RDASR:
917
31
    case SP::RDPR: {
918
31
      // op: rd
919
31
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
920
31
      Value |= (op & UINT64_C(31)) << 25;
921
31
      // op: rs1
922
31
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
923
31
      Value |= (op & UINT64_C(31)) << 14;
924
31
      break;
925
31
    }
926
31
    case SP::LDArr:
927
20
    case SP::LDDArr:
928
20
    case SP::LDDFArr:
929
20
    case SP::LDFArr:
930
20
    case SP::LDQFArr:
931
20
    case SP::LDSBArr:
932
20
    case SP::LDSHArr:
933
20
    case SP::LDSTUBArr:
934
20
    case SP::LDUBArr:
935
20
    case SP::LDUHArr:
936
20
    case SP::SWAPArr: {
937
20
      // op: rd
938
20
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
939
20
      Value |= (op & UINT64_C(31)) << 25;
940
20
      // op: rs1
941
20
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
942
20
      Value |= (op & UINT64_C(31)) << 14;
943
20
      // op: asi
944
20
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
945
20
      Value |= (op & UINT64_C(255)) << 5;
946
20
      // op: rs2
947
20
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
948
20
      Value |= op & UINT64_C(31);
949
20
      break;
950
20
    }
951
20
    case SP::CASArr: {
952
10
      // op: rd
953
10
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
954
10
      Value |= (op & UINT64_C(31)) << 25;
955
10
      // op: rs1
956
10
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
957
10
      Value |= (op & UINT64_C(31)) << 14;
958
10
      // op: asi
959
10
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
960
10
      Value |= (op & UINT64_C(255)) << 5;
961
10
      // op: rs2
962
10
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
963
10
      Value |= op & UINT64_C(31);
964
10
      break;
965
20
    }
966
400
    case SP::ADDCCrr:
967
400
    case SP::ADDCrr:
968
400
    case SP::ADDErr:
969
400
    case SP::ADDXC:
970
400
    case SP::ADDXCCC:
971
400
    case SP::ADDXrr:
972
400
    case SP::ADDrr:
973
400
    case SP::ALIGNADDR:
974
400
    case SP::ALIGNADDRL:
975
400
    case SP::ANDCCrr:
976
400
    case SP::ANDNCCrr:
977
400
    case SP::ANDNrr:
978
400
    case SP::ANDXNrr:
979
400
    case SP::ANDXrr:
980
400
    case SP::ANDrr:
981
400
    case SP::ARRAY16:
982
400
    case SP::ARRAY32:
983
400
    case SP::ARRAY8:
984
400
    case SP::BMASK:
985
400
    case SP::BSHUFFLE:
986
400
    case SP::CASAasi10:
987
400
    case SP::CASXrr:
988
400
    case SP::CASrr:
989
400
    case SP::EDGE16:
990
400
    case SP::EDGE16L:
991
400
    case SP::EDGE16LN:
992
400
    case SP::EDGE16N:
993
400
    case SP::EDGE32:
994
400
    case SP::EDGE32L:
995
400
    case SP::EDGE32LN:
996
400
    case SP::EDGE32N:
997
400
    case SP::EDGE8:
998
400
    case SP::EDGE8L:
999
400
    case SP::EDGE8LN:
1000
400
    case SP::EDGE8N:
1001
400
    case SP::FADDD:
1002
400
    case SP::FADDQ:
1003
400
    case SP::FADDS:
1004
400
    case SP::FALIGNADATA:
1005
400
    case SP::FAND:
1006
400
    case SP::FANDNOT1:
1007
400
    case SP::FANDNOT1S:
1008
400
    case SP::FANDNOT2:
1009
400
    case SP::FANDNOT2S:
1010
400
    case SP::FANDS:
1011
400
    case SP::FCHKSM16:
1012
400
    case SP::FCMPEQ16:
1013
400
    case SP::FCMPEQ32:
1014
400
    case SP::FCMPGT16:
1015
400
    case SP::FCMPGT32:
1016
400
    case SP::FCMPLE16:
1017
400
    case SP::FCMPLE32:
1018
400
    case SP::FCMPNE16:
1019
400
    case SP::FCMPNE32:
1020
400
    case SP::FDIVD:
1021
400
    case SP::FDIVQ:
1022
400
    case SP::FDIVS:
1023
400
    case SP::FDMULQ:
1024
400
    case SP::FHADDD:
1025
400
    case SP::FHADDS:
1026
400
    case SP::FHSUBD:
1027
400
    case SP::FHSUBS:
1028
400
    case SP::FLCMPD:
1029
400
    case SP::FLCMPS:
1030
400
    case SP::FMEAN16:
1031
400
    case SP::FMOVRGEZD:
1032
400
    case SP::FMOVRGEZQ:
1033
400
    case SP::FMOVRGEZS:
1034
400
    case SP::FMOVRGZD:
1035
400
    case SP::FMOVRGZQ:
1036
400
    case SP::FMOVRGZS:
1037
400
    case SP::FMOVRLEZD:
1038
400
    case SP::FMOVRLEZQ:
1039
400
    case SP::FMOVRLEZS:
1040
400
    case SP::FMOVRLZD:
1041
400
    case SP::FMOVRLZQ:
1042
400
    case SP::FMOVRLZS:
1043
400
    case SP::FMOVRNZD:
1044
400
    case SP::FMOVRNZQ:
1045
400
    case SP::FMOVRNZS:
1046
400
    case SP::FMOVRZD:
1047
400
    case SP::FMOVRZQ:
1048
400
    case SP::FMOVRZS:
1049
400
    case SP::FMUL8SUX16:
1050
400
    case SP::FMUL8ULX16:
1051
400
    case SP::FMUL8X16:
1052
400
    case SP::FMUL8X16AL:
1053
400
    case SP::FMUL8X16AU:
1054
400
    case SP::FMULD:
1055
400
    case SP::FMULD8SUX16:
1056
400
    case SP::FMULD8ULX16:
1057
400
    case SP::FMULQ:
1058
400
    case SP::FMULS:
1059
400
    case SP::FNADDD:
1060
400
    case SP::FNADDS:
1061
400
    case SP::FNAND:
1062
400
    case SP::FNANDS:
1063
400
    case SP::FNHADDD:
1064
400
    case SP::FNHADDS:
1065
400
    case SP::FNMULD:
1066
400
    case SP::FNMULS:
1067
400
    case SP::FNOR:
1068
400
    case SP::FNORS:
1069
400
    case SP::FNSMULD:
1070
400
    case SP::FOR:
1071
400
    case SP::FORNOT1:
1072
400
    case SP::FORNOT1S:
1073
400
    case SP::FORNOT2:
1074
400
    case SP::FORNOT2S:
1075
400
    case SP::FORS:
1076
400
    case SP::FPACK32:
1077
400
    case SP::FPADD16:
1078
400
    case SP::FPADD16S:
1079
400
    case SP::FPADD32:
1080
400
    case SP::FPADD32S:
1081
400
    case SP::FPADD64:
1082
400
    case SP::FPMERGE:
1083
400
    case SP::FPSUB16:
1084
400
    case SP::FPSUB16S:
1085
400
    case SP::FPSUB32:
1086
400
    case SP::FPSUB32S:
1087
400
    case SP::FSLAS16:
1088
400
    case SP::FSLAS32:
1089
400
    case SP::FSLL16:
1090
400
    case SP::FSLL32:
1091
400
    case SP::FSMULD:
1092
400
    case SP::FSRA16:
1093
400
    case SP::FSRA32:
1094
400
    case SP::FSRL16:
1095
400
    case SP::FSRL32:
1096
400
    case SP::FSUBD:
1097
400
    case SP::FSUBQ:
1098
400
    case SP::FSUBS:
1099
400
    case SP::FXNOR:
1100
400
    case SP::FXNORS:
1101
400
    case SP::FXOR:
1102
400
    case SP::FXORS:
1103
400
    case SP::JMPLrr:
1104
400
    case SP::LDCrr:
1105
400
    case SP::LDDCrr:
1106
400
    case SP::LDDFrr:
1107
400
    case SP::LDDrr:
1108
400
    case SP::LDFrr:
1109
400
    case SP::LDQFrr:
1110
400
    case SP::LDSBrr:
1111
400
    case SP::LDSHrr:
1112
400
    case SP::LDSTUBrr:
1113
400
    case SP::LDSWrr:
1114
400
    case SP::LDUBrr:
1115
400
    case SP::LDUHrr:
1116
400
    case SP::LDXrr:
1117
400
    case SP::LDrr:
1118
400
    case SP::MOVRGEZrr:
1119
400
    case SP::MOVRGZrr:
1120
400
    case SP::MOVRLEZrr:
1121
400
    case SP::MOVRLZrr:
1122
400
    case SP::MOVRNZrr:
1123
400
    case SP::MOVRRZrr:
1124
400
    case SP::MULSCCrr:
1125
400
    case SP::MULXrr:
1126
400
    case SP::ORCCrr:
1127
400
    case SP::ORNCCrr:
1128
400
    case SP::ORNrr:
1129
400
    case SP::ORXNrr:
1130
400
    case SP::ORXrr:
1131
400
    case SP::ORrr:
1132
400
    case SP::PDIST:
1133
400
    case SP::PDISTN:
1134
400
    case SP::RESTORErr:
1135
400
    case SP::SAVErr:
1136
400
    case SP::SDIVCCrr:
1137
400
    case SP::SDIVXrr:
1138
400
    case SP::SDIVrr:
1139
400
    case SP::SLLXrr:
1140
400
    case SP::SLLrr:
1141
400
    case SP::SMACrr:
1142
400
    case SP::SMULCCrr:
1143
400
    case SP::SMULrr:
1144
400
    case SP::SRAXrr:
1145
400
    case SP::SRArr:
1146
400
    case SP::SRLXrr:
1147
400
    case SP::SRLrr:
1148
400
    case SP::SUBCCrr:
1149
400
    case SP::SUBCrr:
1150
400
    case SP::SUBErr:
1151
400
    case SP::SUBXrr:
1152
400
    case SP::SUBrr:
1153
400
    case SP::SWAPrr:
1154
400
    case SP::TADDCCTVrr:
1155
400
    case SP::TADDCCrr:
1156
400
    case SP::TLS_ADDXrr:
1157
400
    case SP::TLS_ADDrr:
1158
400
    case SP::TLS_LDXrr:
1159
400
    case SP::TLS_LDrr:
1160
400
    case SP::TSUBCCTVrr:
1161
400
    case SP::TSUBCCrr:
1162
400
    case SP::UDIVCCrr:
1163
400
    case SP::UDIVXrr:
1164
400
    case SP::UDIVrr:
1165
400
    case SP::UMACrr:
1166
400
    case SP::UMULCCrr:
1167
400
    case SP::UMULXHI:
1168
400
    case SP::UMULrr:
1169
400
    case SP::V9FCMPD:
1170
400
    case SP::V9FCMPED:
1171
400
    case SP::V9FCMPEQ:
1172
400
    case SP::V9FCMPES:
1173
400
    case SP::V9FCMPQ:
1174
400
    case SP::V9FCMPS:
1175
400
    case SP::WRASRrr:
1176
400
    case SP::WRPRrr:
1177
400
    case SP::XMULX:
1178
400
    case SP::XMULXHI:
1179
400
    case SP::XNORCCrr:
1180
400
    case SP::XNORXrr:
1181
400
    case SP::XNORrr:
1182
400
    case SP::XORCCrr:
1183
400
    case SP::XORXrr:
1184
400
    case SP::XORrr: {
1185
400
      // op: rd
1186
400
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1187
400
      Value |= (op & UINT64_C(31)) << 25;
1188
400
      // op: rs1
1189
400
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
1190
400
      Value |= (op & UINT64_C(31)) << 14;
1191
400
      // op: rs2
1192
400
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
1193
400
      Value |= op & UINT64_C(31);
1194
400
      break;
1195
400
    }
1196
400
    case SP::SLLXri:
1197
6
    case SP::SRAXri:
1198
6
    case SP::SRLXri: {
1199
6
      // op: rd
1200
6
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1201
6
      Value |= (op & UINT64_C(31)) << 25;
1202
6
      // op: rs1
1203
6
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
1204
6
      Value |= (op & UINT64_C(31)) << 14;
1205
6
      // op: shcnt
1206
6
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
1207
6
      Value |= op & UINT64_C(63);
1208
6
      break;
1209
6
    }
1210
6
    case SP::MOVRGEZri:
1211
0
    case SP::MOVRGZri:
1212
0
    case SP::MOVRLEZri:
1213
0
    case SP::MOVRLZri:
1214
0
    case SP::MOVRNZri:
1215
0
    case SP::MOVRRZri: {
1216
0
      // op: rd
1217
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1218
0
      Value |= (op & UINT64_C(31)) << 25;
1219
0
      // op: rs1
1220
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
1221
0
      Value |= (op & UINT64_C(31)) << 14;
1222
0
      // op: simm10
1223
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
1224
0
      Value |= op & UINT64_C(1023);
1225
0
      break;
1226
0
    }
1227
294
    case SP::ADDCCri:
1228
294
    case SP::ADDCri:
1229
294
    case SP::ADDEri:
1230
294
    case SP::ADDXri:
1231
294
    case SP::ADDri:
1232
294
    case SP::ANDCCri:
1233
294
    case SP::ANDNCCri:
1234
294
    case SP::ANDNri:
1235
294
    case SP::ANDXri:
1236
294
    case SP::ANDri:
1237
294
    case SP::JMPLri:
1238
294
    case SP::LDCri:
1239
294
    case SP::LDDCri:
1240
294
    case SP::LDDFri:
1241
294
    case SP::LDDri:
1242
294
    case SP::LDFri:
1243
294
    case SP::LDQFri:
1244
294
    case SP::LDSBri:
1245
294
    case SP::LDSHri:
1246
294
    case SP::LDSTUBri:
1247
294
    case SP::LDSWri:
1248
294
    case SP::LDUBri:
1249
294
    case SP::LDUHri:
1250
294
    case SP::LDXri:
1251
294
    case SP::LDri:
1252
294
    case SP::LEAX_ADDri:
1253
294
    case SP::LEA_ADDri:
1254
294
    case SP::MULSCCri:
1255
294
    case SP::MULXri:
1256
294
    case SP::ORCCri:
1257
294
    case SP::ORNCCri:
1258
294
    case SP::ORNri:
1259
294
    case SP::ORXri:
1260
294
    case SP::ORri:
1261
294
    case SP::RESTOREri:
1262
294
    case SP::SAVEri:
1263
294
    case SP::SDIVCCri:
1264
294
    case SP::SDIVXri:
1265
294
    case SP::SDIVri:
1266
294
    case SP::SLLri:
1267
294
    case SP::SMACri:
1268
294
    case SP::SMULCCri:
1269
294
    case SP::SMULri:
1270
294
    case SP::SRAri:
1271
294
    case SP::SRLri:
1272
294
    case SP::SUBCCri:
1273
294
    case SP::SUBCri:
1274
294
    case SP::SUBEri:
1275
294
    case SP::SUBXri:
1276
294
    case SP::SUBri:
1277
294
    case SP::SWAPri:
1278
294
    case SP::TADDCCTVri:
1279
294
    case SP::TADDCCri:
1280
294
    case SP::TSUBCCTVri:
1281
294
    case SP::TSUBCCri:
1282
294
    case SP::UDIVCCri:
1283
294
    case SP::UDIVXri:
1284
294
    case SP::UDIVri:
1285
294
    case SP::UMACri:
1286
294
    case SP::UMULCCri:
1287
294
    case SP::UMULri:
1288
294
    case SP::WRASRri:
1289
294
    case SP::WRPRri:
1290
294
    case SP::XNORCCri:
1291
294
    case SP::XNORri:
1292
294
    case SP::XORCCri:
1293
294
    case SP::XORXri:
1294
294
    case SP::XORri: {
1295
294
      // op: rd
1296
294
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1297
294
      Value |= (op & UINT64_C(31)) << 25;
1298
294
      // op: rs1
1299
294
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
1300
294
      Value |= (op & UINT64_C(31)) << 14;
1301
294
      // op: simm13
1302
294
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
1303
294
      Value |= op & UINT64_C(8191);
1304
294
      break;
1305
294
    }
1306
294
    case SP::FABSD:
1307
31
    case SP::FABSQ:
1308
31
    case SP::FABSS:
1309
31
    case SP::FDTOI:
1310
31
    case SP::FDTOQ:
1311
31
    case SP::FDTOS:
1312
31
    case SP::FDTOX:
1313
31
    case SP::FEXPAND:
1314
31
    case SP::FITOD:
1315
31
    case SP::FITOQ:
1316
31
    case SP::FITOS:
1317
31
    case SP::FMOVD:
1318
31
    case SP::FMOVQ:
1319
31
    case SP::FMOVS:
1320
31
    case SP::FNEGD:
1321
31
    case SP::FNEGQ:
1322
31
    case SP::FNEGS:
1323
31
    case SP::FNOT2:
1324
31
    case SP::FNOT2S:
1325
31
    case SP::FPACK16:
1326
31
    case SP::FPACKFIX:
1327
31
    case SP::FQTOD:
1328
31
    case SP::FQTOI:
1329
31
    case SP::FQTOS:
1330
31
    case SP::FQTOX:
1331
31
    case SP::FSQRTD:
1332
31
    case SP::FSQRTQ:
1333
31
    case SP::FSQRTS:
1334
31
    case SP::FSRC2:
1335
31
    case SP::FSRC2S:
1336
31
    case SP::FSTOD:
1337
31
    case SP::FSTOI:
1338
31
    case SP::FSTOQ:
1339
31
    case SP::FSTOX:
1340
31
    case SP::FXTOD:
1341
31
    case SP::FXTOQ:
1342
31
    case SP::FXTOS:
1343
31
    case SP::LZCNT:
1344
31
    case SP::MOVDTOX:
1345
31
    case SP::MOVSTOSW:
1346
31
    case SP::MOVSTOUW:
1347
31
    case SP::MOVWTOS:
1348
31
    case SP::MOVXTOD:
1349
31
    case SP::POPCrr: {
1350
31
      // op: rd
1351
31
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1352
31
      Value |= (op & UINT64_C(31)) << 25;
1353
31
      // op: rs2
1354
31
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
1355
31
      Value |= op & UINT64_C(31);
1356
31
      break;
1357
31
    }
1358
31
    case SP::STArr:
1359
19
    case SP::STBArr:
1360
19
    case SP::STDArr:
1361
19
    case SP::STDFArr:
1362
19
    case SP::STFArr:
1363
19
    case SP::STHArr:
1364
19
    case SP::STQFArr: {
1365
19
      // op: rd
1366
19
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
1367
19
      Value |= (op & UINT64_C(31)) << 25;
1368
19
      // op: rs1
1369
19
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1370
19
      Value |= (op & UINT64_C(31)) << 14;
1371
19
      // op: asi
1372
19
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
1373
19
      Value |= (op & UINT64_C(255)) << 5;
1374
19
      // op: rs2
1375
19
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
1376
19
      Value |= op & UINT64_C(31);
1377
19
      break;
1378
19
    }
1379
55
    case SP::STBrr:
1380
55
    case SP::STCrr:
1381
55
    case SP::STDCrr:
1382
55
    case SP::STDFrr:
1383
55
    case SP::STDrr:
1384
55
    case SP::STFrr:
1385
55
    case SP::STHrr:
1386
55
    case SP::STQFrr:
1387
55
    case SP::STXrr:
1388
55
    case SP::STrr: {
1389
55
      // op: rd
1390
55
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
1391
55
      Value |= (op & UINT64_C(31)) << 25;
1392
55
      // op: rs1
1393
55
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1394
55
      Value |= (op & UINT64_C(31)) << 14;
1395
55
      // op: rs2
1396
55
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
1397
55
      Value |= op & UINT64_C(31);
1398
55
      break;
1399
55
    }
1400
55
    case SP::STBri:
1401
17
    case SP::STCri:
1402
17
    case SP::STDCri:
1403
17
    case SP::STDFri:
1404
17
    case SP::STDri:
1405
17
    case SP::STFri:
1406
17
    case SP::STHri:
1407
17
    case SP::STQFri:
1408
17
    case SP::STXri:
1409
17
    case SP::STri: {
1410
17
      // op: rd
1411
17
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
1412
17
      Value |= (op & UINT64_C(31)) << 25;
1413
17
      // op: rs1
1414
17
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1415
17
      Value |= (op & UINT64_C(31)) << 14;
1416
17
      // op: simm13
1417
17
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
1418
17
      Value |= op & UINT64_C(8191);
1419
17
      break;
1420
17
    }
1421
97
    case SP::TICCri:
1422
97
    case SP::TRAPri:
1423
97
    case SP::TXCCri: {
1424
97
      // op: rs1
1425
97
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1426
97
      Value |= (op & UINT64_C(31)) << 14;
1427
97
      // op: cond
1428
97
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
1429
97
      Value |= (op & UINT64_C(15)) << 25;
1430
97
      // op: imm
1431
97
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
1432
97
      Value |= op & UINT64_C(255);
1433
97
      break;
1434
97
    }
1435
102
    case SP::TICCrr:
1436
102
    case SP::TRAPrr:
1437
102
    case SP::TXCCrr: {
1438
102
      // op: rs1
1439
102
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1440
102
      Value |= (op & UINT64_C(31)) << 14;
1441
102
      // op: cond
1442
102
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
1443
102
      Value |= (op & UINT64_C(15)) << 25;
1444
102
      // op: rs2
1445
102
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
1446
102
      Value |= op & UINT64_C(31);
1447
102
      break;
1448
102
    }
1449
102
    case SP::BINDrr:
1450
49
    case SP::CALLrr:
1451
49
    case SP::CMPrr:
1452
49
    case SP::FCMPD:
1453
49
    case SP::FCMPQ:
1454
49
    case SP::FCMPS:
1455
49
    case SP::FLUSHrr:
1456
49
    case SP::LDCSRrr:
1457
49
    case SP::LDFSRrr:
1458
49
    case SP::LDXFSRrr:
1459
49
    case SP::PWRPSRrr:
1460
49
    case SP::RETTrr:
1461
49
    case SP::STCSRrr:
1462
49
    case SP::STDCQrr:
1463
49
    case SP::STDFQrr:
1464
49
    case SP::STFSRrr:
1465
49
    case SP::STXFSRrr:
1466
49
    case SP::WRPSRrr:
1467
49
    case SP::WRTBRrr:
1468
49
    case SP::WRWIMrr: {
1469
49
      // op: rs1
1470
49
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1471
49
      Value |= (op & UINT64_C(31)) << 14;
1472
49
      // op: rs2
1473
49
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
1474
49
      Value |= op & UINT64_C(31);
1475
49
      break;
1476
49
    }
1477
53
    case SP::BINDri:
1478
53
    case SP::CALLri:
1479
53
    case SP::CMPri:
1480
53
    case SP::FLUSHri:
1481
53
    case SP::LDCSRri:
1482
53
    case SP::LDFSRri:
1483
53
    case SP::LDXFSRri:
1484
53
    case SP::PWRPSRri:
1485
53
    case SP::RETTri:
1486
53
    case SP::STCSRri:
1487
53
    case SP::STDCQri:
1488
53
    case SP::STDFQri:
1489
53
    case SP::STFSRri:
1490
53
    case SP::STXFSRri:
1491
53
    case SP::WRPSRri:
1492
53
    case SP::WRTBRri:
1493
53
    case SP::WRWIMri: {
1494
53
      // op: rs1
1495
53
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1496
53
      Value |= (op & UINT64_C(31)) << 14;
1497
53
      // op: simm13
1498
53
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
1499
53
      Value |= op & UINT64_C(8191);
1500
53
      break;
1501
53
    }
1502
53
    case SP::CMASK16:
1503
0
    case SP::CMASK32:
1504
0
    case SP::CMASK8: {
1505
0
      // op: rs2
1506
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1507
0
      Value |= op & UINT64_C(31);
1508
0
      break;
1509
0
    }
1510
41
    case SP::MEMBARi:
1511
41
    case SP::RET:
1512
41
    case SP::RETL: {
1513
41
      // op: simm13
1514
41
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1515
41
      Value |= op & UINT64_C(8191);
1516
41
      break;
1517
41
    }
1518
41
  default:
1519
0
    std::string msg;
1520
0
    raw_string_ostream Msg(msg);
1521
0
    Msg << "Not supported instr: " << MI;
1522
0
    report_fatal_error(Msg.str());
1523
1.99k
  }
1524
1.99k
  return Value;
1525
1.99k
}
1526
1527
#ifdef ENABLE_INSTR_PREDICATE_VERIFIER
1528
#undef ENABLE_INSTR_PREDICATE_VERIFIER
1529
#include <sstream>
1530
1531
// Bits for subtarget features that participate in instruction matching.
1532
enum SubtargetFeatureBits : uint8_t {
1533
  Feature_UseSoftMulDivBit = 5,
1534
  Feature_HasV9Bit = 1,
1535
  Feature_HasVISBit = 2,
1536
  Feature_HasVIS2Bit = 3,
1537
  Feature_HasVIS3Bit = 4,
1538
  Feature_HasPWRPSRBit = 0,
1539
};
1540
1541
#ifndef NDEBUG
1542
static const char *SubtargetFeatureNames[] = {
1543
  "Feature_HasPWRPSR",
1544
  "Feature_HasV9",
1545
  "Feature_HasVIS",
1546
  "Feature_HasVIS2",
1547
  "Feature_HasVIS3",
1548
  "Feature_UseSoftMulDiv",
1549
  nullptr
1550
};
1551
1552
#endif // NDEBUG
1553
FeatureBitset SparcMCCodeEmitter::
1554
1.99k
computeAvailableFeatures(const FeatureBitset& FB) const {
1555
1.99k
  FeatureBitset Features;
1556
1.99k
  if ((FB[Sparc::FeatureSoftMulDiv]))
1557
0
    Features[Feature_UseSoftMulDivBit] = 1;
1558
1.99k
  if ((FB[Sparc::FeatureV9]))
1559
1.27k
    Features[Feature_HasV9Bit] = 1;
1560
1.99k
  if ((FB[Sparc::FeatureVIS]))
1561
1
    Features[Feature_HasVISBit] = 1;
1562
1.99k
  if ((FB[Sparc::FeatureVIS2]))
1563
1
    Features[Feature_HasVIS2Bit] = 1;
1564
1.99k
  if ((FB[Sparc::FeatureVIS3]))
1565
0
    Features[Feature_HasVIS3Bit] = 1;
1566
1.99k
  if ((FB[Sparc::FeaturePWRPSR]))
1567
7
    Features[Feature_HasPWRPSRBit] = 1;
1568
1.99k
  return Features;
1569
1.99k
}
1570
1571
#ifndef NDEBUG
1572
// Feature bitsets.
1573
enum : uint8_t {
1574
  CEFBS_None,
1575
  CEFBS_HasPWRPSR,
1576
  CEFBS_HasV9,
1577
  CEFBS_HasVIS,
1578
  CEFBS_HasVIS2,
1579
  CEFBS_HasVIS3,
1580
};
1581
1582
const static FeatureBitset FeatureBitsets[] {
1583
  {}, // CEFBS_None
1584
  {Feature_HasPWRPSRBit, },
1585
  {Feature_HasV9Bit, },
1586
  {Feature_HasVISBit, },
1587
  {Feature_HasVIS2Bit, },
1588
  {Feature_HasVIS3Bit, },
1589
};
1590
#endif // NDEBUG
1591
1592
void SparcMCCodeEmitter::verifyInstructionPredicates(
1593
1.99k
    const MCInst &Inst, const FeatureBitset &AvailableFeatures) const {
1594
#ifndef NDEBUG
1595
  static uint8_t RequiredFeaturesRefs[] = {
1596
    CEFBS_None, // PHI = 0
1597
    CEFBS_None, // INLINEASM = 1
1598
    CEFBS_None, // INLINEASM_BR = 2
1599
    CEFBS_None, // CFI_INSTRUCTION = 3
1600
    CEFBS_None, // EH_LABEL = 4
1601
    CEFBS_None, // GC_LABEL = 5
1602
    CEFBS_None, // ANNOTATION_LABEL = 6
1603
    CEFBS_None, // KILL = 7
1604
    CEFBS_None, // EXTRACT_SUBREG = 8
1605
    CEFBS_None, // INSERT_SUBREG = 9
1606
    CEFBS_None, // IMPLICIT_DEF = 10
1607
    CEFBS_None, // SUBREG_TO_REG = 11
1608
    CEFBS_None, // COPY_TO_REGCLASS = 12
1609
    CEFBS_None, // DBG_VALUE = 13
1610
    CEFBS_None, // DBG_LABEL = 14
1611
    CEFBS_None, // REG_SEQUENCE = 15
1612
    CEFBS_None, // COPY = 16
1613
    CEFBS_None, // BUNDLE = 17
1614
    CEFBS_None, // LIFETIME_START = 18
1615
    CEFBS_None, // LIFETIME_END = 19
1616
    CEFBS_None, // STACKMAP = 20
1617
    CEFBS_None, // FENTRY_CALL = 21
1618
    CEFBS_None, // PATCHPOINT = 22
1619
    CEFBS_None, // LOAD_STACK_GUARD = 23
1620
    CEFBS_None, // STATEPOINT = 24
1621
    CEFBS_None, // LOCAL_ESCAPE = 25
1622
    CEFBS_None, // FAULTING_OP = 26
1623
    CEFBS_None, // PATCHABLE_OP = 27
1624
    CEFBS_None, // PATCHABLE_FUNCTION_ENTER = 28
1625
    CEFBS_None, // PATCHABLE_RET = 29
1626
    CEFBS_None, // PATCHABLE_FUNCTION_EXIT = 30
1627
    CEFBS_None, // PATCHABLE_TAIL_CALL = 31
1628
    CEFBS_None, // PATCHABLE_EVENT_CALL = 32
1629
    CEFBS_None, // PATCHABLE_TYPED_EVENT_CALL = 33
1630
    CEFBS_None, // ICALL_BRANCH_FUNNEL = 34
1631
    CEFBS_None, // G_ADD = 35
1632
    CEFBS_None, // G_SUB = 36
1633
    CEFBS_None, // G_MUL = 37
1634
    CEFBS_None, // G_SDIV = 38
1635
    CEFBS_None, // G_UDIV = 39
1636
    CEFBS_None, // G_SREM = 40
1637
    CEFBS_None, // G_UREM = 41
1638
    CEFBS_None, // G_AND = 42
1639
    CEFBS_None, // G_OR = 43
1640
    CEFBS_None, // G_XOR = 44
1641
    CEFBS_None, // G_IMPLICIT_DEF = 45
1642
    CEFBS_None, // G_PHI = 46
1643
    CEFBS_None, // G_FRAME_INDEX = 47
1644
    CEFBS_None, // G_GLOBAL_VALUE = 48
1645
    CEFBS_None, // G_EXTRACT = 49
1646
    CEFBS_None, // G_UNMERGE_VALUES = 50
1647
    CEFBS_None, // G_INSERT = 51
1648
    CEFBS_None, // G_MERGE_VALUES = 52
1649
    CEFBS_None, // G_BUILD_VECTOR = 53
1650
    CEFBS_None, // G_BUILD_VECTOR_TRUNC = 54
1651
    CEFBS_None, // G_CONCAT_VECTORS = 55
1652
    CEFBS_None, // G_PTRTOINT = 56
1653
    CEFBS_None, // G_INTTOPTR = 57
1654
    CEFBS_None, // G_BITCAST = 58
1655
    CEFBS_None, // G_INTRINSIC_TRUNC = 59
1656
    CEFBS_None, // G_INTRINSIC_ROUND = 60
1657
    CEFBS_None, // G_LOAD = 61
1658
    CEFBS_None, // G_SEXTLOAD = 62
1659
    CEFBS_None, // G_ZEXTLOAD = 63
1660
    CEFBS_None, // G_STORE = 64
1661
    CEFBS_None, // G_ATOMIC_CMPXCHG_WITH_SUCCESS = 65
1662
    CEFBS_None, // G_ATOMIC_CMPXCHG = 66
1663
    CEFBS_None, // G_ATOMICRMW_XCHG = 67
1664
    CEFBS_None, // G_ATOMICRMW_ADD = 68
1665
    CEFBS_None, // G_ATOMICRMW_SUB = 69
1666
    CEFBS_None, // G_ATOMICRMW_AND = 70
1667
    CEFBS_None, // G_ATOMICRMW_NAND = 71
1668
    CEFBS_None, // G_ATOMICRMW_OR = 72
1669
    CEFBS_None, // G_ATOMICRMW_XOR = 73
1670
    CEFBS_None, // G_ATOMICRMW_MAX = 74
1671
    CEFBS_None, // G_ATOMICRMW_MIN = 75
1672
    CEFBS_None, // G_ATOMICRMW_UMAX = 76
1673
    CEFBS_None, // G_ATOMICRMW_UMIN = 77
1674
    CEFBS_None, // G_BRCOND = 78
1675
    CEFBS_None, // G_BRINDIRECT = 79
1676
    CEFBS_None, // G_INTRINSIC = 80
1677
    CEFBS_None, // G_INTRINSIC_W_SIDE_EFFECTS = 81
1678
    CEFBS_None, // G_ANYEXT = 82
1679
    CEFBS_None, // G_TRUNC = 83
1680
    CEFBS_None, // G_CONSTANT = 84
1681
    CEFBS_None, // G_FCONSTANT = 85
1682
    CEFBS_None, // G_VASTART = 86
1683
    CEFBS_None, // G_VAARG = 87
1684
    CEFBS_None, // G_SEXT = 88
1685
    CEFBS_None, // G_ZEXT = 89
1686
    CEFBS_None, // G_SHL = 90
1687
    CEFBS_None, // G_LSHR = 91
1688
    CEFBS_None, // G_ASHR = 92
1689
    CEFBS_None, // G_ICMP = 93
1690
    CEFBS_None, // G_FCMP = 94
1691
    CEFBS_None, // G_SELECT = 95
1692
    CEFBS_None, // G_UADDO = 96
1693
    CEFBS_None, // G_UADDE = 97
1694
    CEFBS_None, // G_USUBO = 98
1695
    CEFBS_None, // G_USUBE = 99
1696
    CEFBS_None, // G_SADDO = 100
1697
    CEFBS_None, // G_SADDE = 101
1698
    CEFBS_None, // G_SSUBO = 102
1699
    CEFBS_None, // G_SSUBE = 103
1700
    CEFBS_None, // G_UMULO = 104
1701
    CEFBS_None, // G_SMULO = 105
1702
    CEFBS_None, // G_UMULH = 106
1703
    CEFBS_None, // G_SMULH = 107
1704
    CEFBS_None, // G_FADD = 108
1705
    CEFBS_None, // G_FSUB = 109
1706
    CEFBS_None, // G_FMUL = 110
1707
    CEFBS_None, // G_FMA = 111
1708
    CEFBS_None, // G_FDIV = 112
1709
    CEFBS_None, // G_FREM = 113
1710
    CEFBS_None, // G_FPOW = 114
1711
    CEFBS_None, // G_FEXP = 115
1712
    CEFBS_None, // G_FEXP2 = 116
1713
    CEFBS_None, // G_FLOG = 117
1714
    CEFBS_None, // G_FLOG2 = 118
1715
    CEFBS_None, // G_FLOG10 = 119
1716
    CEFBS_None, // G_FNEG = 120
1717
    CEFBS_None, // G_FPEXT = 121
1718
    CEFBS_None, // G_FPTRUNC = 122
1719
    CEFBS_None, // G_FPTOSI = 123
1720
    CEFBS_None, // G_FPTOUI = 124
1721
    CEFBS_None, // G_SITOFP = 125
1722
    CEFBS_None, // G_UITOFP = 126
1723
    CEFBS_None, // G_FABS = 127
1724
    CEFBS_None, // G_FCANONICALIZE = 128
1725
    CEFBS_None, // G_GEP = 129
1726
    CEFBS_None, // G_PTR_MASK = 130
1727
    CEFBS_None, // G_BR = 131
1728
    CEFBS_None, // G_INSERT_VECTOR_ELT = 132
1729
    CEFBS_None, // G_EXTRACT_VECTOR_ELT = 133
1730
    CEFBS_None, // G_SHUFFLE_VECTOR = 134
1731
    CEFBS_None, // G_CTTZ = 135
1732
    CEFBS_None, // G_CTTZ_ZERO_UNDEF = 136
1733
    CEFBS_None, // G_CTLZ = 137
1734
    CEFBS_None, // G_CTLZ_ZERO_UNDEF = 138
1735
    CEFBS_None, // G_CTPOP = 139
1736
    CEFBS_None, // G_BSWAP = 140
1737
    CEFBS_None, // G_FCEIL = 141
1738
    CEFBS_None, // G_FCOS = 142
1739
    CEFBS_None, // G_FSIN = 143
1740
    CEFBS_None, // G_FSQRT = 144
1741
    CEFBS_None, // G_FFLOOR = 145
1742
    CEFBS_None, // G_ADDRSPACE_CAST = 146
1743
    CEFBS_None, // G_BLOCK_ADDR = 147
1744
    CEFBS_None, // ADJCALLSTACKDOWN = 148
1745
    CEFBS_None, // ADJCALLSTACKUP = 149
1746
    CEFBS_None, // GETPCX = 150
1747
    CEFBS_None, // SELECT_CC_DFP_FCC = 151
1748
    CEFBS_None, // SELECT_CC_DFP_ICC = 152
1749
    CEFBS_None, // SELECT_CC_FP_FCC = 153
1750
    CEFBS_None, // SELECT_CC_FP_ICC = 154
1751
    CEFBS_None, // SELECT_CC_Int_FCC = 155
1752
    CEFBS_None, // SELECT_CC_Int_ICC = 156
1753
    CEFBS_None, // SELECT_CC_QFP_FCC = 157
1754
    CEFBS_None, // SELECT_CC_QFP_ICC = 158
1755
    CEFBS_None, // SET = 159
1756
    CEFBS_None, // ADDCCri = 160
1757
    CEFBS_None, // ADDCCrr = 161
1758
    CEFBS_None, // ADDCri = 162
1759
    CEFBS_None, // ADDCrr = 163
1760
    CEFBS_None, // ADDEri = 164
1761
    CEFBS_None, // ADDErr = 165
1762
    CEFBS_HasVIS3, // ADDXC = 166
1763
    CEFBS_HasVIS3, // ADDXCCC = 167
1764
    CEFBS_None, // ADDXri = 168
1765
    CEFBS_None, // ADDXrr = 169
1766
    CEFBS_None, // ADDri = 170
1767
    CEFBS_None, // ADDrr = 171
1768
    CEFBS_HasVIS, // ALIGNADDR = 172
1769
    CEFBS_HasVIS, // ALIGNADDRL = 173
1770
    CEFBS_None, // ANDCCri = 174
1771
    CEFBS_None, // ANDCCrr = 175
1772
    CEFBS_None, // ANDNCCri = 176
1773
    CEFBS_None, // ANDNCCrr = 177
1774
    CEFBS_None, // ANDNri = 178
1775
    CEFBS_None, // ANDNrr = 179
1776
    CEFBS_None, // ANDXNrr = 180
1777
    CEFBS_None, // ANDXri = 181
1778
    CEFBS_None, // ANDXrr = 182
1779
    CEFBS_None, // ANDri = 183
1780
    CEFBS_None, // ANDrr = 184
1781
    CEFBS_HasVIS, // ARRAY16 = 185
1782
    CEFBS_HasVIS, // ARRAY32 = 186
1783
    CEFBS_HasVIS, // ARRAY8 = 187
1784
    CEFBS_None, // BA = 188
1785
    CEFBS_None, // BCOND = 189
1786
    CEFBS_None, // BCONDA = 190
1787
    CEFBS_None, // BINDri = 191
1788
    CEFBS_None, // BINDrr = 192
1789
    CEFBS_HasVIS2, // BMASK = 193
1790
    CEFBS_HasV9, // BPFCC = 194
1791
    CEFBS_HasV9, // BPFCCA = 195
1792
    CEFBS_HasV9, // BPFCCANT = 196
1793
    CEFBS_HasV9, // BPFCCNT = 197
1794
    CEFBS_None, // BPGEZapn = 198
1795
    CEFBS_None, // BPGEZapt = 199
1796
    CEFBS_None, // BPGEZnapn = 200
1797
    CEFBS_None, // BPGEZnapt = 201
1798
    CEFBS_None, // BPGZapn = 202
1799
    CEFBS_None, // BPGZapt = 203
1800
    CEFBS_None, // BPGZnapn = 204
1801
    CEFBS_None, // BPGZnapt = 205
1802
    CEFBS_HasV9, // BPICC = 206
1803
    CEFBS_HasV9, // BPICCA = 207
1804
    CEFBS_HasV9, // BPICCANT = 208
1805
    CEFBS_HasV9, // BPICCNT = 209
1806
    CEFBS_None, // BPLEZapn = 210
1807
    CEFBS_None, // BPLEZapt = 211
1808
    CEFBS_None, // BPLEZnapn = 212
1809
    CEFBS_None, // BPLEZnapt = 213
1810
    CEFBS_None, // BPLZapn = 214
1811
    CEFBS_None, // BPLZapt = 215
1812
    CEFBS_None, // BPLZnapn = 216
1813
    CEFBS_None, // BPLZnapt = 217
1814
    CEFBS_None, // BPNZapn = 218
1815
    CEFBS_None, // BPNZapt = 219
1816
    CEFBS_None, // BPNZnapn = 220
1817
    CEFBS_None, // BPNZnapt = 221
1818
    CEFBS_None, // BPXCC = 222
1819
    CEFBS_None, // BPXCCA = 223
1820
    CEFBS_None, // BPXCCANT = 224
1821
    CEFBS_None, // BPXCCNT = 225
1822
    CEFBS_None, // BPZapn = 226
1823
    CEFBS_None, // BPZapt = 227
1824
    CEFBS_None, // BPZnapn = 228
1825
    CEFBS_None, // BPZnapt = 229
1826
    CEFBS_HasVIS2, // BSHUFFLE = 230
1827
    CEFBS_None, // CALL = 231
1828
    CEFBS_None, // CALLri = 232
1829
    CEFBS_None, // CALLrr = 233
1830
    CEFBS_None, // CASAasi10 = 234
1831
    CEFBS_None, // CASArr = 235
1832
    CEFBS_None, // CASXrr = 236
1833
    CEFBS_HasV9, // CASrr = 237
1834
    CEFBS_None, // CBCOND = 238
1835
    CEFBS_None, // CBCONDA = 239
1836
    CEFBS_HasVIS3, // CMASK16 = 240
1837
    CEFBS_HasVIS3, // CMASK32 = 241
1838
    CEFBS_HasVIS3, // CMASK8 = 242
1839
    CEFBS_None, // CMPri = 243
1840
    CEFBS_None, // CMPrr = 244
1841
    CEFBS_HasVIS, // EDGE16 = 245
1842
    CEFBS_HasVIS, // EDGE16L = 246
1843
    CEFBS_HasVIS2, // EDGE16LN = 247
1844
    CEFBS_HasVIS2, // EDGE16N = 248
1845
    CEFBS_HasVIS, // EDGE32 = 249
1846
    CEFBS_HasVIS, // EDGE32L = 250
1847
    CEFBS_HasVIS2, // EDGE32LN = 251
1848
    CEFBS_HasVIS2, // EDGE32N = 252
1849
    CEFBS_HasVIS, // EDGE8 = 253
1850
    CEFBS_HasVIS, // EDGE8L = 254
1851
    CEFBS_HasVIS2, // EDGE8LN = 255
1852
    CEFBS_HasVIS2, // EDGE8N = 256
1853
    CEFBS_HasV9, // FABSD = 257
1854
    CEFBS_HasV9, // FABSQ = 258
1855
    CEFBS_None, // FABSS = 259
1856
    CEFBS_None, // FADDD = 260
1857
    CEFBS_None, // FADDQ = 261
1858
    CEFBS_None, // FADDS = 262
1859
    CEFBS_HasVIS, // FALIGNADATA = 263
1860
    CEFBS_HasVIS, // FAND = 264
1861
    CEFBS_HasVIS, // FANDNOT1 = 265
1862
    CEFBS_HasVIS, // FANDNOT1S = 266
1863
    CEFBS_HasVIS, // FANDNOT2 = 267
1864
    CEFBS_HasVIS, // FANDNOT2S = 268
1865
    CEFBS_HasVIS, // FANDS = 269
1866
    CEFBS_None, // FBCOND = 270
1867
    CEFBS_None, // FBCONDA = 271
1868
    CEFBS_HasVIS3, // FCHKSM16 = 272
1869
    CEFBS_None, // FCMPD = 273
1870
    CEFBS_HasVIS, // FCMPEQ16 = 274
1871
    CEFBS_HasVIS, // FCMPEQ32 = 275
1872
    CEFBS_HasVIS, // FCMPGT16 = 276
1873
    CEFBS_HasVIS, // FCMPGT32 = 277
1874
    CEFBS_HasVIS, // FCMPLE16 = 278
1875
    CEFBS_HasVIS, // FCMPLE32 = 279
1876
    CEFBS_HasVIS, // FCMPNE16 = 280
1877
    CEFBS_HasVIS, // FCMPNE32 = 281
1878
    CEFBS_None, // FCMPQ = 282
1879
    CEFBS_None, // FCMPS = 283
1880
    CEFBS_None, // FDIVD = 284
1881
    CEFBS_None, // FDIVQ = 285
1882
    CEFBS_None, // FDIVS = 286
1883
    CEFBS_None, // FDMULQ = 287
1884
    CEFBS_None, // FDTOI = 288
1885
    CEFBS_None, // FDTOQ = 289
1886
    CEFBS_None, // FDTOS = 290
1887
    CEFBS_None, // FDTOX = 291
1888
    CEFBS_HasVIS, // FEXPAND = 292
1889
    CEFBS_HasVIS3, // FHADDD = 293
1890
    CEFBS_HasVIS3, // FHADDS = 294
1891
    CEFBS_HasVIS3, // FHSUBD = 295
1892
    CEFBS_HasVIS3, // FHSUBS = 296
1893
    CEFBS_None, // FITOD = 297
1894
    CEFBS_None, // FITOQ = 298
1895
    CEFBS_None, // FITOS = 299
1896
    CEFBS_HasVIS3, // FLCMPD = 300
1897
    CEFBS_HasVIS3, // FLCMPS = 301
1898
    CEFBS_None, // FLUSH = 302
1899
    CEFBS_HasV9, // FLUSHW = 303
1900
    CEFBS_None, // FLUSHri = 304
1901
    CEFBS_None, // FLUSHrr = 305
1902
    CEFBS_HasVIS3, // FMEAN16 = 306
1903
    CEFBS_HasV9, // FMOVD = 307
1904
    CEFBS_HasV9, // FMOVD_FCC = 308
1905
    CEFBS_HasV9, // FMOVD_ICC = 309
1906
    CEFBS_None, // FMOVD_XCC = 310
1907
    CEFBS_HasV9, // FMOVQ = 311
1908
    CEFBS_HasV9, // FMOVQ_FCC = 312
1909
    CEFBS_HasV9, // FMOVQ_ICC = 313
1910
    CEFBS_None, // FMOVQ_XCC = 314
1911
    CEFBS_HasV9, // FMOVRGEZD = 315
1912
    CEFBS_HasV9, // FMOVRGEZQ = 316
1913
    CEFBS_HasV9, // FMOVRGEZS = 317
1914
    CEFBS_HasV9, // FMOVRGZD = 318
1915
    CEFBS_HasV9, // FMOVRGZQ = 319
1916
    CEFBS_HasV9, // FMOVRGZS = 320
1917
    CEFBS_HasV9, // FMOVRLEZD = 321
1918
    CEFBS_HasV9, // FMOVRLEZQ = 322
1919
    CEFBS_HasV9, // FMOVRLEZS = 323
1920
    CEFBS_HasV9, // FMOVRLZD = 324
1921
    CEFBS_HasV9, // FMOVRLZQ = 325
1922
    CEFBS_HasV9, // FMOVRLZS = 326
1923
    CEFBS_HasV9, // FMOVRNZD = 327
1924
    CEFBS_HasV9, // FMOVRNZQ = 328
1925
    CEFBS_HasV9, // FMOVRNZS = 329
1926
    CEFBS_HasV9, // FMOVRZD = 330
1927
    CEFBS_HasV9, // FMOVRZQ = 331
1928
    CEFBS_HasV9, // FMOVRZS = 332
1929
    CEFBS_None, // FMOVS = 333
1930
    CEFBS_HasV9, // FMOVS_FCC = 334
1931
    CEFBS_HasV9, // FMOVS_ICC = 335
1932
    CEFBS_None, // FMOVS_XCC = 336
1933
    CEFBS_HasVIS, // FMUL8SUX16 = 337
1934
    CEFBS_HasVIS, // FMUL8ULX16 = 338
1935
    CEFBS_HasVIS, // FMUL8X16 = 339
1936
    CEFBS_HasVIS, // FMUL8X16AL = 340
1937
    CEFBS_HasVIS, // FMUL8X16AU = 341
1938
    CEFBS_None, // FMULD = 342
1939
    CEFBS_HasVIS, // FMULD8SUX16 = 343
1940
    CEFBS_HasVIS, // FMULD8ULX16 = 344
1941
    CEFBS_None, // FMULQ = 345
1942
    CEFBS_None, // FMULS = 346
1943
    CEFBS_HasVIS3, // FNADDD = 347
1944
    CEFBS_HasVIS3, // FNADDS = 348
1945
    CEFBS_HasVIS, // FNAND = 349
1946
    CEFBS_HasVIS, // FNANDS = 350
1947
    CEFBS_HasV9, // FNEGD = 351
1948
    CEFBS_HasV9, // FNEGQ = 352
1949
    CEFBS_None, // FNEGS = 353
1950
    CEFBS_HasVIS3, // FNHADDD = 354
1951
    CEFBS_HasVIS3, // FNHADDS = 355
1952
    CEFBS_HasVIS3, // FNMULD = 356
1953
    CEFBS_HasVIS3, // FNMULS = 357
1954
    CEFBS_HasVIS, // FNOR = 358
1955
    CEFBS_HasVIS, // FNORS = 359
1956
    CEFBS_HasVIS, // FNOT1 = 360
1957
    CEFBS_HasVIS, // FNOT1S = 361
1958
    CEFBS_HasVIS, // FNOT2 = 362
1959
    CEFBS_HasVIS, // FNOT2S = 363
1960
    CEFBS_HasVIS3, // FNSMULD = 364
1961
    CEFBS_HasVIS, // FONE = 365
1962
    CEFBS_HasVIS, // FONES = 366
1963
    CEFBS_HasVIS, // FOR = 367
1964
    CEFBS_HasVIS, // FORNOT1 = 368
1965
    CEFBS_HasVIS, // FORNOT1S = 369
1966
    CEFBS_HasVIS, // FORNOT2 = 370
1967
    CEFBS_HasVIS, // FORNOT2S = 371
1968
    CEFBS_HasVIS, // FORS = 372
1969
    CEFBS_HasVIS, // FPACK16 = 373
1970
    CEFBS_HasVIS, // FPACK32 = 374
1971
    CEFBS_HasVIS, // FPACKFIX = 375
1972
    CEFBS_HasVIS, // FPADD16 = 376
1973
    CEFBS_HasVIS, // FPADD16S = 377
1974
    CEFBS_HasVIS, // FPADD32 = 378
1975
    CEFBS_HasVIS, // FPADD32S = 379
1976
    CEFBS_HasVIS3, // FPADD64 = 380
1977
    CEFBS_HasVIS, // FPMERGE = 381
1978
    CEFBS_HasVIS, // FPSUB16 = 382
1979
    CEFBS_HasVIS, // FPSUB16S = 383
1980
    CEFBS_HasVIS, // FPSUB32 = 384
1981
    CEFBS_HasVIS, // FPSUB32S = 385
1982
    CEFBS_None, // FQTOD = 386
1983
    CEFBS_None, // FQTOI = 387
1984
    CEFBS_None, // FQTOS = 388
1985
    CEFBS_None, // FQTOX = 389
1986
    CEFBS_HasVIS3, // FSLAS16 = 390
1987
    CEFBS_HasVIS3, // FSLAS32 = 391
1988
    CEFBS_HasVIS3, // FSLL16 = 392
1989
    CEFBS_HasVIS3, // FSLL32 = 393
1990
    CEFBS_None, // FSMULD = 394
1991
    CEFBS_None, // FSQRTD = 395
1992
    CEFBS_None, // FSQRTQ = 396
1993
    CEFBS_None, // FSQRTS = 397
1994
    CEFBS_HasVIS3, // FSRA16 = 398
1995
    CEFBS_HasVIS3, // FSRA32 = 399
1996
    CEFBS_HasVIS, // FSRC1 = 400
1997
    CEFBS_HasVIS, // FSRC1S = 401
1998
    CEFBS_HasVIS, // FSRC2 = 402
1999
    CEFBS_HasVIS, // FSRC2S = 403
2000
    CEFBS_HasVIS3, // FSRL16 = 404
2001
    CEFBS_HasVIS3, // FSRL32 = 405
2002
    CEFBS_None, // FSTOD = 406
2003
    CEFBS_None, // FSTOI = 407
2004
    CEFBS_None, // FSTOQ = 408
2005
    CEFBS_None, // FSTOX = 409
2006
    CEFBS_None, // FSUBD = 410
2007
    CEFBS_None, // FSUBQ = 411
2008
    CEFBS_None, // FSUBS = 412
2009
    CEFBS_HasVIS, // FXNOR = 413
2010
    CEFBS_HasVIS, // FXNORS = 414
2011
    CEFBS_HasVIS, // FXOR = 415
2012
    CEFBS_HasVIS, // FXORS = 416
2013
    CEFBS_None, // FXTOD = 417
2014
    CEFBS_None, // FXTOQ = 418
2015
    CEFBS_None, // FXTOS = 419
2016
    CEFBS_HasVIS, // FZERO = 420
2017
    CEFBS_HasVIS, // FZEROS = 421
2018
    CEFBS_None, // JMPLri = 422
2019
    CEFBS_None, // JMPLrr = 423
2020
    CEFBS_None, // LDArr = 424
2021
    CEFBS_None, // LDCSRri = 425
2022
    CEFBS_None, // LDCSRrr = 426
2023
    CEFBS_None, // LDCri = 427
2024
    CEFBS_None, // LDCrr = 428
2025
    CEFBS_None, // LDDArr = 429
2026
    CEFBS_None, // LDDCri = 430
2027
    CEFBS_None, // LDDCrr = 431
2028
    CEFBS_HasV9, // LDDFArr = 432
2029
    CEFBS_None, // LDDFri = 433
2030
    CEFBS_None, // LDDFrr = 434
2031
    CEFBS_None, // LDDri = 435
2032
    CEFBS_None, // LDDrr = 436
2033
    CEFBS_HasV9, // LDFArr = 437
2034
    CEFBS_None, // LDFSRri = 438
2035
    CEFBS_None, // LDFSRrr = 439
2036
    CEFBS_None, // LDFri = 440
2037
    CEFBS_None, // LDFrr = 441
2038
    CEFBS_HasV9, // LDQFArr = 442
2039
    CEFBS_HasV9, // LDQFri = 443
2040
    CEFBS_HasV9, // LDQFrr = 444
2041
    CEFBS_None, // LDSBArr = 445
2042
    CEFBS_None, // LDSBri = 446
2043
    CEFBS_None, // LDSBrr = 447
2044
    CEFBS_None, // LDSHArr = 448
2045
    CEFBS_None, // LDSHri = 449
2046
    CEFBS_None, // LDSHrr = 450
2047
    CEFBS_None, // LDSTUBArr = 451
2048
    CEFBS_None, // LDSTUBri = 452
2049
    CEFBS_None, // LDSTUBrr = 453
2050
    CEFBS_None, // LDSWri = 454
2051
    CEFBS_None, // LDSWrr = 455
2052
    CEFBS_None, // LDUBArr = 456
2053
    CEFBS_None, // LDUBri = 457
2054
    CEFBS_None, // LDUBrr = 458
2055
    CEFBS_None, // LDUHArr = 459
2056
    CEFBS_None, // LDUHri = 460
2057
    CEFBS_None, // LDUHrr = 461
2058
    CEFBS_HasV9, // LDXFSRri = 462
2059
    CEFBS_HasV9, // LDXFSRrr = 463
2060
    CEFBS_None, // LDXri = 464
2061
    CEFBS_None, // LDXrr = 465
2062
    CEFBS_None, // LDri = 466
2063
    CEFBS_None, // LDrr = 467
2064
    CEFBS_None, // LEAX_ADDri = 468
2065
    CEFBS_None, // LEA_ADDri = 469
2066
    CEFBS_HasVIS3, // LZCNT = 470
2067
    CEFBS_HasV9, // MEMBARi = 471
2068
    CEFBS_HasVIS3, // MOVDTOX = 472
2069
    CEFBS_HasV9, // MOVFCCri = 473
2070
    CEFBS_HasV9, // MOVFCCrr = 474
2071
    CEFBS_HasV9, // MOVICCri = 475
2072
    CEFBS_HasV9, // MOVICCrr = 476
2073
    CEFBS_None, // MOVRGEZri = 477
2074
    CEFBS_None, // MOVRGEZrr = 478
2075
    CEFBS_None, // MOVRGZri = 479
2076
    CEFBS_None, // MOVRGZrr = 480
2077
    CEFBS_None, // MOVRLEZri = 481
2078
    CEFBS_None, // MOVRLEZrr = 482
2079
    CEFBS_None, // MOVRLZri = 483
2080
    CEFBS_None, // MOVRLZrr = 484
2081
    CEFBS_None, // MOVRNZri = 485
2082
    CEFBS_None, // MOVRNZrr = 486
2083
    CEFBS_None, // MOVRRZri = 487
2084
    CEFBS_None, // MOVRRZrr = 488
2085
    CEFBS_HasVIS3, // MOVSTOSW = 489
2086
    CEFBS_HasVIS3, // MOVSTOUW = 490
2087
    CEFBS_HasVIS3, // MOVWTOS = 491
2088
    CEFBS_None, // MOVXCCri = 492
2089
    CEFBS_None, // MOVXCCrr = 493
2090
    CEFBS_HasVIS3, // MOVXTOD = 494
2091
    CEFBS_None, // MULSCCri = 495
2092
    CEFBS_None, // MULSCCrr = 496
2093
    CEFBS_None, // MULXri = 497
2094
    CEFBS_None, // MULXrr = 498
2095
    CEFBS_None, // NOP = 499
2096
    CEFBS_None, // ORCCri = 500
2097
    CEFBS_None, // ORCCrr = 501
2098
    CEFBS_None, // ORNCCri = 502
2099
    CEFBS_None, // ORNCCrr = 503
2100
    CEFBS_None, // ORNri = 504
2101
    CEFBS_None, // ORNrr = 505
2102
    CEFBS_None, // ORXNrr = 506
2103
    CEFBS_None, // ORXri = 507
2104
    CEFBS_None, // ORXrr = 508
2105
    CEFBS_None, // ORri = 509
2106
    CEFBS_None, // ORrr = 510
2107
    CEFBS_HasVIS, // PDIST = 511
2108
    CEFBS_HasVIS3, // PDISTN = 512
2109
    CEFBS_HasV9, // POPCrr = 513
2110
    CEFBS_HasPWRPSR, // PWRPSRri = 514
2111
    CEFBS_HasPWRPSR, // PWRPSRrr = 515
2112
    CEFBS_None, // RDASR = 516
2113
    CEFBS_HasV9, // RDPR = 517
2114
    CEFBS_None, // RDPSR = 518
2115
    CEFBS_None, // RDTBR = 519
2116
    CEFBS_None, // RDWIM = 520
2117
    CEFBS_None, // RESTOREri = 521
2118
    CEFBS_None, // RESTORErr = 522
2119
    CEFBS_None, // RET = 523
2120
    CEFBS_None, // RETL = 524
2121
    CEFBS_None, // RETTri = 525
2122
    CEFBS_None, // RETTrr = 526
2123
    CEFBS_None, // SAVEri = 527
2124
    CEFBS_None, // SAVErr = 528
2125
    CEFBS_None, // SDIVCCri = 529
2126
    CEFBS_None, // SDIVCCrr = 530
2127
    CEFBS_None, // SDIVXri = 531
2128
    CEFBS_None, // SDIVXrr = 532
2129
    CEFBS_None, // SDIVri = 533
2130
    CEFBS_None, // SDIVrr = 534
2131
    CEFBS_None, // SETHIXi = 535
2132
    CEFBS_None, // SETHIi = 536
2133
    CEFBS_HasVIS, // SHUTDOWN = 537
2134
    CEFBS_HasVIS2, // SIAM = 538
2135
    CEFBS_None, // SLLXri = 539
2136
    CEFBS_None, // SLLXrr = 540
2137
    CEFBS_None, // SLLri = 541
2138
    CEFBS_None, // SLLrr = 542
2139
    CEFBS_None, // SMACri = 543
2140
    CEFBS_None, // SMACrr = 544
2141
    CEFBS_None, // SMULCCri = 545
2142
    CEFBS_None, // SMULCCrr = 546
2143
    CEFBS_None, // SMULri = 547
2144
    CEFBS_None, // SMULrr = 548
2145
    CEFBS_None, // SRAXri = 549
2146
    CEFBS_None, // SRAXrr = 550
2147
    CEFBS_None, // SRAri = 551
2148
    CEFBS_None, // SRArr = 552
2149
    CEFBS_None, // SRLXri = 553
2150
    CEFBS_None, // SRLXrr = 554
2151
    CEFBS_None, // SRLri = 555
2152
    CEFBS_None, // SRLrr = 556
2153
    CEFBS_None, // STArr = 557
2154
    CEFBS_None, // STBAR = 558
2155
    CEFBS_None, // STBArr = 559
2156
    CEFBS_None, // STBri = 560
2157
    CEFBS_None, // STBrr = 561
2158
    CEFBS_None, // STCSRri = 562
2159
    CEFBS_None, // STCSRrr = 563
2160
    CEFBS_None, // STCri = 564
2161
    CEFBS_None, // STCrr = 565
2162
    CEFBS_None, // STDArr = 566
2163
    CEFBS_None, // STDCQri = 567
2164
    CEFBS_None, // STDCQrr = 568
2165
    CEFBS_None, // STDCri = 569
2166
    CEFBS_None, // STDCrr = 570
2167
    CEFBS_HasV9, // STDFArr = 571
2168
    CEFBS_None, // STDFQri = 572
2169
    CEFBS_None, // STDFQrr = 573
2170
    CEFBS_None, // STDFri = 574
2171
    CEFBS_None, // STDFrr = 575
2172
    CEFBS_None, // STDri = 576
2173
    CEFBS_None, // STDrr = 577
2174
    CEFBS_HasV9, // STFArr = 578
2175
    CEFBS_None, // STFSRri = 579
2176
    CEFBS_None, // STFSRrr = 580
2177
    CEFBS_None, // STFri = 581
2178
    CEFBS_None, // STFrr = 582
2179
    CEFBS_None, // STHArr = 583
2180
    CEFBS_None, // STHri = 584
2181
    CEFBS_None, // STHrr = 585
2182
    CEFBS_HasV9, // STQFArr = 586
2183
    CEFBS_HasV9, // STQFri = 587
2184
    CEFBS_HasV9, // STQFrr = 588
2185
    CEFBS_HasV9, // STXFSRri = 589
2186
    CEFBS_HasV9, // STXFSRrr = 590
2187
    CEFBS_None, // STXri = 591
2188
    CEFBS_None, // STXrr = 592
2189
    CEFBS_None, // STri = 593
2190
    CEFBS_None, // STrr = 594
2191
    CEFBS_None, // SUBCCri = 595
2192
    CEFBS_None, // SUBCCrr = 596
2193
    CEFBS_None, // SUBCri = 597
2194
    CEFBS_None, // SUBCrr = 598
2195
    CEFBS_None, // SUBEri = 599
2196
    CEFBS_None, // SUBErr = 600
2197
    CEFBS_None, // SUBXri = 601
2198
    CEFBS_None, // SUBXrr = 602
2199
    CEFBS_None, // SUBri = 603
2200
    CEFBS_None, // SUBrr = 604
2201
    CEFBS_None, // SWAPArr = 605
2202
    CEFBS_None, // SWAPri = 606
2203
    CEFBS_None, // SWAPrr = 607
2204
    CEFBS_None, // TA1 = 608
2205
    CEFBS_None, // TA3 = 609
2206
    CEFBS_None, // TA5 = 610
2207
    CEFBS_None, // TADDCCTVri = 611
2208
    CEFBS_None, // TADDCCTVrr = 612
2209
    CEFBS_None, // TADDCCri = 613
2210
    CEFBS_None, // TADDCCrr = 614
2211
    CEFBS_HasV9, // TICCri = 615
2212
    CEFBS_HasV9, // TICCrr = 616
2213
    CEFBS_None, // TLS_ADDXrr = 617
2214
    CEFBS_None, // TLS_ADDrr = 618
2215
    CEFBS_None, // TLS_CALL = 619
2216
    CEFBS_None, // TLS_LDXrr = 620
2217
    CEFBS_None, // TLS_LDrr = 621
2218
    CEFBS_None, // TRAPri = 622
2219
    CEFBS_None, // TRAPrr = 623
2220
    CEFBS_None, // TSUBCCTVri = 624
2221
    CEFBS_None, // TSUBCCTVrr = 625
2222
    CEFBS_None, // TSUBCCri = 626
2223
    CEFBS_None, // TSUBCCrr = 627
2224
    CEFBS_None, // TXCCri = 628
2225
    CEFBS_None, // TXCCrr = 629
2226
    CEFBS_None, // UDIVCCri = 630
2227
    CEFBS_None, // UDIVCCrr = 631
2228
    CEFBS_None, // UDIVXri = 632
2229
    CEFBS_None, // UDIVXrr = 633
2230
    CEFBS_None, // UDIVri = 634
2231
    CEFBS_None, // UDIVrr = 635
2232
    CEFBS_None, // UMACri = 636
2233
    CEFBS_None, // UMACrr = 637
2234
    CEFBS_None, // UMULCCri = 638
2235
    CEFBS_None, // UMULCCrr = 639
2236
    CEFBS_HasVIS3, // UMULXHI = 640
2237
    CEFBS_None, // UMULri = 641
2238
    CEFBS_None, // UMULrr = 642
2239
    CEFBS_None, // UNIMP = 643
2240
    CEFBS_None, // V9FCMPD = 644
2241
    CEFBS_None, // V9FCMPED = 645
2242
    CEFBS_None, // V9FCMPEQ = 646
2243
    CEFBS_None, // V9FCMPES = 647
2244
    CEFBS_None, // V9FCMPQ = 648
2245
    CEFBS_None, // V9FCMPS = 649
2246
    CEFBS_HasV9, // V9FMOVD_FCC = 650
2247
    CEFBS_HasV9, // V9FMOVQ_FCC = 651
2248
    CEFBS_HasV9, // V9FMOVS_FCC = 652
2249
    CEFBS_HasV9, // V9MOVFCCri = 653
2250
    CEFBS_HasV9, // V9MOVFCCrr = 654
2251
    CEFBS_None, // WRASRri = 655
2252
    CEFBS_None, // WRASRrr = 656
2253
    CEFBS_HasV9, // WRPRri = 657
2254
    CEFBS_HasV9, // WRPRrr = 658
2255
    CEFBS_None, // WRPSRri = 659
2256
    CEFBS_None, // WRPSRrr = 660
2257
    CEFBS_None, // WRTBRri = 661
2258
    CEFBS_None, // WRTBRrr = 662
2259
    CEFBS_None, // WRWIMri = 663
2260
    CEFBS_None, // WRWIMrr = 664
2261
    CEFBS_HasVIS3, // XMULX = 665
2262
    CEFBS_HasVIS3, // XMULXHI = 666
2263
    CEFBS_None, // XNORCCri = 667
2264
    CEFBS_None, // XNORCCrr = 668
2265
    CEFBS_None, // XNORXrr = 669
2266
    CEFBS_None, // XNORri = 670
2267
    CEFBS_None, // XNORrr = 671
2268
    CEFBS_None, // XORCCri = 672
2269
    CEFBS_None, // XORCCrr = 673
2270
    CEFBS_None, // XORXri = 674
2271
    CEFBS_None, // XORXrr = 675
2272
    CEFBS_None, // XORri = 676
2273
    CEFBS_None, // XORrr = 677
2274
  };
2275
2276
  assert(Inst.getOpcode() < 678);
2277
  const FeatureBitset &RequiredFeatures = FeatureBitsets[RequiredFeaturesRefs[Inst.getOpcode()]];
2278
  FeatureBitset MissingFeatures =
2279
      (AvailableFeatures & RequiredFeatures) ^
2280
      RequiredFeatures;
2281
  if (MissingFeatures.any()) {
2282
    std::ostringstream Msg;
2283
    Msg << "Attempting to emit " << MCII.getName(Inst.getOpcode()).str()
2284
        << " instruction but the ";
2285
    for (unsigned i = 0, e = MissingFeatures.size(); i != e; ++i)
2286
      if (MissingFeatures.test(i))
2287
        Msg << SubtargetFeatureNames[i] << " ";
2288
    Msg << "predicate(s) are not met";
2289
    report_fatal_error(Msg.str());
2290
  }
2291
#else
2292
// Silence unused variable warning on targets that don't use MCII for other purposes (e.g. BPF).
2293
1.99k
(void)MCII;
2294
1.99k
#endif // NDEBUG
2295
1.99k
}
2296
#endif