Coverage Report

Created: 2018-12-14 11:24

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/clang-build/lib/Target/Sparc/SparcGenMCCodeEmitter.inc
Line
Count
Source (jump to first uncovered line)
1
/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2
|*                                                                            *|
3
|* Machine Code Emitter                                                       *|
4
|*                                                                            *|
5
|* Automatically generated file, do not edit!                                 *|
6
|*                                                                            *|
7
\*===----------------------------------------------------------------------===*/
8
9
uint64_t SparcMCCodeEmitter::getBinaryCodeForInstr(const MCInst &MI,
10
    SmallVectorImpl<MCFixup> &Fixups,
11
1.99k
    const MCSubtargetInfo &STI) const {
12
1.99k
  static const uint64_t InstBits[] = {
13
1.99k
    UINT64_C(0),
14
1.99k
    UINT64_C(0),
15
1.99k
    UINT64_C(0),
16
1.99k
    UINT64_C(0),
17
1.99k
    UINT64_C(0),
18
1.99k
    UINT64_C(0),
19
1.99k
    UINT64_C(0),
20
1.99k
    UINT64_C(0),
21
1.99k
    UINT64_C(0),
22
1.99k
    UINT64_C(0),
23
1.99k
    UINT64_C(0),
24
1.99k
    UINT64_C(0),
25
1.99k
    UINT64_C(0),
26
1.99k
    UINT64_C(0),
27
1.99k
    UINT64_C(0),
28
1.99k
    UINT64_C(0),
29
1.99k
    UINT64_C(0),
30
1.99k
    UINT64_C(0),
31
1.99k
    UINT64_C(0),
32
1.99k
    UINT64_C(0),
33
1.99k
    UINT64_C(0),
34
1.99k
    UINT64_C(0),
35
1.99k
    UINT64_C(0),
36
1.99k
    UINT64_C(0),
37
1.99k
    UINT64_C(0),
38
1.99k
    UINT64_C(0),
39
1.99k
    UINT64_C(0),
40
1.99k
    UINT64_C(0),
41
1.99k
    UINT64_C(0),
42
1.99k
    UINT64_C(0),
43
1.99k
    UINT64_C(0),
44
1.99k
    UINT64_C(0),
45
1.99k
    UINT64_C(0),
46
1.99k
    UINT64_C(0),
47
1.99k
    UINT64_C(0),
48
1.99k
    UINT64_C(0),
49
1.99k
    UINT64_C(0),
50
1.99k
    UINT64_C(0),
51
1.99k
    UINT64_C(0),
52
1.99k
    UINT64_C(0),
53
1.99k
    UINT64_C(0),
54
1.99k
    UINT64_C(0),
55
1.99k
    UINT64_C(0),
56
1.99k
    UINT64_C(0),
57
1.99k
    UINT64_C(0),
58
1.99k
    UINT64_C(0),
59
1.99k
    UINT64_C(0),
60
1.99k
    UINT64_C(0),
61
1.99k
    UINT64_C(0),
62
1.99k
    UINT64_C(0),
63
1.99k
    UINT64_C(0),
64
1.99k
    UINT64_C(0),
65
1.99k
    UINT64_C(0),
66
1.99k
    UINT64_C(0),
67
1.99k
    UINT64_C(0),
68
1.99k
    UINT64_C(0),
69
1.99k
    UINT64_C(0),
70
1.99k
    UINT64_C(0),
71
1.99k
    UINT64_C(0),
72
1.99k
    UINT64_C(0),
73
1.99k
    UINT64_C(0),
74
1.99k
    UINT64_C(0),
75
1.99k
    UINT64_C(0),
76
1.99k
    UINT64_C(0),
77
1.99k
    UINT64_C(0),
78
1.99k
    UINT64_C(0),
79
1.99k
    UINT64_C(0),
80
1.99k
    UINT64_C(0),
81
1.99k
    UINT64_C(0),
82
1.99k
    UINT64_C(0),
83
1.99k
    UINT64_C(0),
84
1.99k
    UINT64_C(0),
85
1.99k
    UINT64_C(0),
86
1.99k
    UINT64_C(0),
87
1.99k
    UINT64_C(0),
88
1.99k
    UINT64_C(0),
89
1.99k
    UINT64_C(0),
90
1.99k
    UINT64_C(0),
91
1.99k
    UINT64_C(0),
92
1.99k
    UINT64_C(0),
93
1.99k
    UINT64_C(0),
94
1.99k
    UINT64_C(0),
95
1.99k
    UINT64_C(0),
96
1.99k
    UINT64_C(0),
97
1.99k
    UINT64_C(0),
98
1.99k
    UINT64_C(0),
99
1.99k
    UINT64_C(0),
100
1.99k
    UINT64_C(0),
101
1.99k
    UINT64_C(0),
102
1.99k
    UINT64_C(0),
103
1.99k
    UINT64_C(0),
104
1.99k
    UINT64_C(0),
105
1.99k
    UINT64_C(0),
106
1.99k
    UINT64_C(0),
107
1.99k
    UINT64_C(0),
108
1.99k
    UINT64_C(0),
109
1.99k
    UINT64_C(0),
110
1.99k
    UINT64_C(0),
111
1.99k
    UINT64_C(0),
112
1.99k
    UINT64_C(0),
113
1.99k
    UINT64_C(0),
114
1.99k
    UINT64_C(0),
115
1.99k
    UINT64_C(0),
116
1.99k
    UINT64_C(0),
117
1.99k
    UINT64_C(0),
118
1.99k
    UINT64_C(0),
119
1.99k
    UINT64_C(0),
120
1.99k
    UINT64_C(0),
121
1.99k
    UINT64_C(0),
122
1.99k
    UINT64_C(0),
123
1.99k
    UINT64_C(0),
124
1.99k
    UINT64_C(0),
125
1.99k
    UINT64_C(0),
126
1.99k
    UINT64_C(0),
127
1.99k
    UINT64_C(0),
128
1.99k
    UINT64_C(0),
129
1.99k
    UINT64_C(0),
130
1.99k
    UINT64_C(0),
131
1.99k
    UINT64_C(0),
132
1.99k
    UINT64_C(0),
133
1.99k
    UINT64_C(0),
134
1.99k
    UINT64_C(0),
135
1.99k
    UINT64_C(0),
136
1.99k
    UINT64_C(0),
137
1.99k
    UINT64_C(0),
138
1.99k
    UINT64_C(0),
139
1.99k
    UINT64_C(0),
140
1.99k
    UINT64_C(0),
141
1.99k
    UINT64_C(0),
142
1.99k
    UINT64_C(0),
143
1.99k
    UINT64_C(0),
144
1.99k
    UINT64_C(0),
145
1.99k
    UINT64_C(0),
146
1.99k
    UINT64_C(0),
147
1.99k
    UINT64_C(0),
148
1.99k
    UINT64_C(0),
149
1.99k
    UINT64_C(0),
150
1.99k
    UINT64_C(0),
151
1.99k
    UINT64_C(0),
152
1.99k
    UINT64_C(0),
153
1.99k
    UINT64_C(0),
154
1.99k
    UINT64_C(0),
155
1.99k
    UINT64_C(0),
156
1.99k
    UINT64_C(0),
157
1.99k
    UINT64_C(0),
158
1.99k
    UINT64_C(0),
159
1.99k
    UINT64_C(0),
160
1.99k
    UINT64_C(0),
161
1.99k
    UINT64_C(0),
162
1.99k
    UINT64_C(0),
163
1.99k
    UINT64_C(0),
164
1.99k
    UINT64_C(0),
165
1.99k
    UINT64_C(0),
166
1.99k
    UINT64_C(2155880448), // ADDCCri
167
1.99k
    UINT64_C(2155872256), // ADDCCrr
168
1.99k
    UINT64_C(2151686144), // ADDCri
169
1.99k
    UINT64_C(2151677952), // ADDCrr
170
1.99k
    UINT64_C(2160074752), // ADDEri
171
1.99k
    UINT64_C(2160066560), // ADDErr
172
1.99k
    UINT64_C(2175795744), // ADDXC
173
1.99k
    UINT64_C(2175795808), // ADDXCCC
174
1.99k
    UINT64_C(2147491840), // ADDXri
175
1.99k
    UINT64_C(2147483648), // ADDXrr
176
1.99k
    UINT64_C(2147491840), // ADDri
177
1.99k
    UINT64_C(2147483648), // ADDrr
178
1.99k
    UINT64_C(2175795968), // ALIGNADDR
179
1.99k
    UINT64_C(2175796032), // ALIGNADDRL
180
1.99k
    UINT64_C(2156404736), // ANDCCri
181
1.99k
    UINT64_C(2156396544), // ANDCCrr
182
1.99k
    UINT64_C(2158501888), // ANDNCCri
183
1.99k
    UINT64_C(2158493696), // ANDNCCrr
184
1.99k
    UINT64_C(2150113280), // ANDNri
185
1.99k
    UINT64_C(2150105088), // ANDNrr
186
1.99k
    UINT64_C(2150105088), // ANDXNrr
187
1.99k
    UINT64_C(2148016128), // ANDXri
188
1.99k
    UINT64_C(2148007936), // ANDXrr
189
1.99k
    UINT64_C(2148016128), // ANDri
190
1.99k
    UINT64_C(2148007936), // ANDrr
191
1.99k
    UINT64_C(2175795776), // ARRAY16
192
1.99k
    UINT64_C(2175795840), // ARRAY32
193
1.99k
    UINT64_C(2175795712), // ARRAY8
194
1.99k
    UINT64_C(276824064),  // BA
195
1.99k
    UINT64_C(8388608),  // BCOND
196
1.99k
    UINT64_C(545259520),  // BCONDA
197
1.99k
    UINT64_C(2176851968), // BINDri
198
1.99k
    UINT64_C(2176843776), // BINDrr
199
1.99k
    UINT64_C(2175796000), // BMASK
200
1.99k
    UINT64_C(21495808), // BPFCC
201
1.99k
    UINT64_C(558366720),  // BPFCCA
202
1.99k
    UINT64_C(557842432),  // BPFCCANT
203
1.99k
    UINT64_C(20971520), // BPFCCNT
204
1.99k
    UINT64_C(784334848),  // BPGEZapn
205
1.99k
    UINT64_C(784859136),  // BPGEZapt
206
1.99k
    UINT64_C(247463936),  // BPGEZnapn
207
1.99k
    UINT64_C(247988224),  // BPGEZnapt
208
1.99k
    UINT64_C(750780416),  // BPGZapn
209
1.99k
    UINT64_C(751304704),  // BPGZapt
210
1.99k
    UINT64_C(213909504),  // BPGZnapn
211
1.99k
    UINT64_C(214433792),  // BPGZnapt
212
1.99k
    UINT64_C(4718592),  // BPICC
213
1.99k
    UINT64_C(541589504),  // BPICCA
214
1.99k
    UINT64_C(541065216),  // BPICCANT
215
1.99k
    UINT64_C(4194304),  // BPICCNT
216
1.99k
    UINT64_C(616562688),  // BPLEZapn
217
1.99k
    UINT64_C(617086976),  // BPLEZapt
218
1.99k
    UINT64_C(79691776), // BPLEZnapn
219
1.99k
    UINT64_C(80216064), // BPLEZnapt
220
1.99k
    UINT64_C(650117120),  // BPLZapn
221
1.99k
    UINT64_C(650641408),  // BPLZapt
222
1.99k
    UINT64_C(113246208),  // BPLZnapn
223
1.99k
    UINT64_C(113770496),  // BPLZnapt
224
1.99k
    UINT64_C(717225984),  // BPNZapn
225
1.99k
    UINT64_C(717750272),  // BPNZapt
226
1.99k
    UINT64_C(180355072),  // BPNZnapn
227
1.99k
    UINT64_C(180879360),  // BPNZnapt
228
1.99k
    UINT64_C(6815744),  // BPXCC
229
1.99k
    UINT64_C(543686656),  // BPXCCA
230
1.99k
    UINT64_C(543162368),  // BPXCCANT
231
1.99k
    UINT64_C(6291456),  // BPXCCNT
232
1.99k
    UINT64_C(583008256),  // BPZapn
233
1.99k
    UINT64_C(583532544),  // BPZapt
234
1.99k
    UINT64_C(46137344), // BPZnapn
235
1.99k
    UINT64_C(46661632), // BPZnapt
236
1.99k
    UINT64_C(2175796096), // BSHUFFLE
237
1.99k
    UINT64_C(1073741824), // CALL
238
1.99k
    UINT64_C(2680168448), // CALLri
239
1.99k
    UINT64_C(2680160256), // CALLrr
240
1.99k
    UINT64_C(3252683072), // CASAasi10
241
1.99k
    UINT64_C(3252682752), // CASArr
242
1.99k
    UINT64_C(3253735424), // CASXrr
243
1.99k
    UINT64_C(3252686848), // CASrr
244
1.99k
    UINT64_C(29360128), // CBCOND
245
1.99k
    UINT64_C(566231040),  // CBCONDA
246
1.99k
    UINT64_C(2175796128), // CMASK16
247
1.99k
    UINT64_C(2175796192), // CMASK32
248
1.99k
    UINT64_C(2175796064), // CMASK8
249
1.99k
    UINT64_C(2157977600), // CMPri
250
1.99k
    UINT64_C(2157969408), // CMPrr
251
1.99k
    UINT64_C(2175795328), // EDGE16
252
1.99k
    UINT64_C(2175795392), // EDGE16L
253
1.99k
    UINT64_C(2175795424), // EDGE16LN
254
1.99k
    UINT64_C(2175795360), // EDGE16N
255
1.99k
    UINT64_C(2175795456), // EDGE32
256
1.99k
    UINT64_C(2175795520), // EDGE32L
257
1.99k
    UINT64_C(2175795552), // EDGE32LN
258
1.99k
    UINT64_C(2175795488), // EDGE32N
259
1.99k
    UINT64_C(2175795200), // EDGE8
260
1.99k
    UINT64_C(2175795264), // EDGE8L
261
1.99k
    UINT64_C(2175795296), // EDGE8LN
262
1.99k
    UINT64_C(2175795232), // EDGE8N
263
1.99k
    UINT64_C(2174746944), // FABSD
264
1.99k
    UINT64_C(2174746976), // FABSQ
265
1.99k
    UINT64_C(2174746912), // FABSS
266
1.99k
    UINT64_C(2174748736), // FADDD
267
1.99k
    UINT64_C(2174748768), // FADDQ
268
1.99k
    UINT64_C(2174748704), // FADDS
269
1.99k
    UINT64_C(2175797504), // FALIGNADATA
270
1.99k
    UINT64_C(2175798784), // FAND
271
1.99k
    UINT64_C(2175798528), // FANDNOT1
272
1.99k
    UINT64_C(2175798560), // FANDNOT1S
273
1.99k
    UINT64_C(2175798400), // FANDNOT2
274
1.99k
    UINT64_C(2175798432), // FANDNOT2S
275
1.99k
    UINT64_C(2175798816), // FANDS
276
1.99k
    UINT64_C(25165824), // FBCOND
277
1.99k
    UINT64_C(562036736),  // FBCONDA
278
1.99k
    UINT64_C(2175797376), // FCHKSM16
279
1.99k
    UINT64_C(2175273536), // FCMPD
280
1.99k
    UINT64_C(2175796544), // FCMPEQ16
281
1.99k
    UINT64_C(2175796672), // FCMPEQ32
282
1.99k
    UINT64_C(2175796480), // FCMPGT16
283
1.99k
    UINT64_C(2175796608), // FCMPGT32
284
1.99k
    UINT64_C(2175796224), // FCMPLE16
285
1.99k
    UINT64_C(2175796352), // FCMPLE32
286
1.99k
    UINT64_C(2175796288), // FCMPNE16
287
1.99k
    UINT64_C(2175796416), // FCMPNE32
288
1.99k
    UINT64_C(2175273568), // FCMPQ
289
1.99k
    UINT64_C(2175273504), // FCMPS
290
1.99k
    UINT64_C(2174749120), // FDIVD
291
1.99k
    UINT64_C(2174749152), // FDIVQ
292
1.99k
    UINT64_C(2174749088), // FDIVS
293
1.99k
    UINT64_C(2174750144), // FDMULQ
294
1.99k
    UINT64_C(2174753344), // FDTOI
295
1.99k
    UINT64_C(2174753216), // FDTOQ
296
1.99k
    UINT64_C(2174752960), // FDTOS
297
1.99k
    UINT64_C(2174750784), // FDTOX
298
1.99k
    UINT64_C(2175797664), // FEXPAND
299
1.99k
    UINT64_C(2174749760), // FHADDD
300
1.99k
    UINT64_C(2174749728), // FHADDS
301
1.99k
    UINT64_C(2174749888), // FHSUBD
302
1.99k
    UINT64_C(2174749856), // FHSUBS
303
1.99k
    UINT64_C(2174753024), // FITOD
304
1.99k
    UINT64_C(2174753152), // FITOQ
305
1.99k
    UINT64_C(2174752896), // FITOS
306
1.99k
    UINT64_C(2175806016), // FLCMPD
307
1.99k
    UINT64_C(2175805984), // FLCMPS
308
1.99k
    UINT64_C(2178416640), // FLUSH
309
1.99k
    UINT64_C(2170028032), // FLUSHW
310
1.99k
    UINT64_C(2178424832), // FLUSHri
311
1.99k
    UINT64_C(2178416640), // FLUSHrr
312
1.99k
    UINT64_C(2175797248), // FMEAN16
313
1.99k
    UINT64_C(2174746688), // FMOVD
314
1.99k
    UINT64_C(2175270976), // FMOVD_FCC
315
1.99k
    UINT64_C(2175279168), // FMOVD_ICC
316
1.99k
    UINT64_C(2175283264), // FMOVD_XCC
317
1.99k
    UINT64_C(2174746720), // FMOVQ
318
1.99k
    UINT64_C(2175271008), // FMOVQ_FCC
319
1.99k
    UINT64_C(2175279200), // FMOVQ_ICC
320
1.99k
    UINT64_C(2175283296), // FMOVQ_XCC
321
1.99k
    UINT64_C(2175278272), // FMOVRGEZD
322
1.99k
    UINT64_C(2175278304), // FMOVRGEZQ
323
1.99k
    UINT64_C(2175278240), // FMOVRGEZS
324
1.99k
    UINT64_C(2175277248), // FMOVRGZD
325
1.99k
    UINT64_C(2175277280), // FMOVRGZQ
326
1.99k
    UINT64_C(2175277216), // FMOVRGZS
327
1.99k
    UINT64_C(2175273152), // FMOVRLEZD
328
1.99k
    UINT64_C(2175273184), // FMOVRLEZQ
329
1.99k
    UINT64_C(2175273120), // FMOVRLEZS
330
1.99k
    UINT64_C(2175274176), // FMOVRLZD
331
1.99k
    UINT64_C(2175274208), // FMOVRLZQ
332
1.99k
    UINT64_C(2175274144), // FMOVRLZS
333
1.99k
    UINT64_C(2175276224), // FMOVRNZD
334
1.99k
    UINT64_C(2175276256), // FMOVRNZQ
335
1.99k
    UINT64_C(2175276192), // FMOVRNZS
336
1.99k
    UINT64_C(2175272128), // FMOVRZD
337
1.99k
    UINT64_C(2175272160), // FMOVRZQ
338
1.99k
    UINT64_C(2175272096), // FMOVRZS
339
1.99k
    UINT64_C(2174746656), // FMOVS
340
1.99k
    UINT64_C(2175270944), // FMOVS_FCC
341
1.99k
    UINT64_C(2175279136), // FMOVS_ICC
342
1.99k
    UINT64_C(2175283232), // FMOVS_XCC
343
1.99k
    UINT64_C(2175796928), // FMUL8SUX16
344
1.99k
    UINT64_C(2175796960), // FMUL8ULX16
345
1.99k
    UINT64_C(2175796768), // FMUL8X16
346
1.99k
    UINT64_C(2175796896), // FMUL8X16AL
347
1.99k
    UINT64_C(2175796832), // FMUL8X16AU
348
1.99k
    UINT64_C(2174748992), // FMULD
349
1.99k
    UINT64_C(2175796992), // FMULD8SUX16
350
1.99k
    UINT64_C(2175797024), // FMULD8ULX16
351
1.99k
    UINT64_C(2174749024), // FMULQ
352
1.99k
    UINT64_C(2174748960), // FMULS
353
1.99k
    UINT64_C(2174749248), // FNADDD
354
1.99k
    UINT64_C(2174749216), // FNADDS
355
1.99k
    UINT64_C(2175798720), // FNAND
356
1.99k
    UINT64_C(2175798752), // FNANDS
357
1.99k
    UINT64_C(2174746816), // FNEGD
358
1.99k
    UINT64_C(2174746848), // FNEGQ
359
1.99k
    UINT64_C(2174746784), // FNEGS
360
1.99k
    UINT64_C(2174750272), // FNHADDD
361
1.99k
    UINT64_C(2174750240), // FNHADDS
362
1.99k
    UINT64_C(2174749504), // FNMULD
363
1.99k
    UINT64_C(2174749472), // FNMULS
364
1.99k
    UINT64_C(2175798336), // FNOR
365
1.99k
    UINT64_C(2175798368), // FNORS
366
1.99k
    UINT64_C(2175798592), // FNOT1
367
1.99k
    UINT64_C(2175798624), // FNOT1S
368
1.99k
    UINT64_C(2175798464), // FNOT2
369
1.99k
    UINT64_C(2175798496), // FNOT2S
370
1.99k
    UINT64_C(2174750496), // FNSMULD
371
1.99k
    UINT64_C(2175799232), // FONE
372
1.99k
    UINT64_C(2175799264), // FONES
373
1.99k
    UINT64_C(2175799168), // FOR
374
1.99k
    UINT64_C(2175799104), // FORNOT1
375
1.99k
    UINT64_C(2175799136), // FORNOT1S
376
1.99k
    UINT64_C(2175798976), // FORNOT2
377
1.99k
    UINT64_C(2175799008), // FORNOT2S
378
1.99k
    UINT64_C(2175799200), // FORS
379
1.99k
    UINT64_C(2175797088), // FPACK16
380
1.99k
    UINT64_C(2175797056), // FPACK32
381
1.99k
    UINT64_C(2175797152), // FPACKFIX
382
1.99k
    UINT64_C(2175797760), // FPADD16
383
1.99k
    UINT64_C(2175797792), // FPADD16S
384
1.99k
    UINT64_C(2175797824), // FPADD32
385
1.99k
    UINT64_C(2175797856), // FPADD32S
386
1.99k
    UINT64_C(2175797312), // FPADD64
387
1.99k
    UINT64_C(2175797600), // FPMERGE
388
1.99k
    UINT64_C(2175797888), // FPSUB16
389
1.99k
    UINT64_C(2175797920), // FPSUB16S
390
1.99k
    UINT64_C(2175797952), // FPSUB32
391
1.99k
    UINT64_C(2175797984), // FPSUB32S
392
1.99k
    UINT64_C(2174753120), // FQTOD
393
1.99k
    UINT64_C(2174753376), // FQTOI
394
1.99k
    UINT64_C(2174752992), // FQTOS
395
1.99k
    UINT64_C(2174750816), // FQTOX
396
1.99k
    UINT64_C(2175796512), // FSLAS16
397
1.99k
    UINT64_C(2175796640), // FSLAS32
398
1.99k
    UINT64_C(2175796256), // FSLL16
399
1.99k
    UINT64_C(2175796384), // FSLL32
400
1.99k
    UINT64_C(2174749984), // FSMULD
401
1.99k
    UINT64_C(2174747968), // FSQRTD
402
1.99k
    UINT64_C(2174748000), // FSQRTQ
403
1.99k
    UINT64_C(2174747936), // FSQRTS
404
1.99k
    UINT64_C(2175796576), // FSRA16
405
1.99k
    UINT64_C(2175796704), // FSRA32
406
1.99k
    UINT64_C(2175798912), // FSRC1
407
1.99k
    UINT64_C(2175798944), // FSRC1S
408
1.99k
    UINT64_C(2175799040), // FSRC2
409
1.99k
    UINT64_C(2175799072), // FSRC2S
410
1.99k
    UINT64_C(2175796320), // FSRL16
411
1.99k
    UINT64_C(2175796448), // FSRL32
412
1.99k
    UINT64_C(2174753056), // FSTOD
413
1.99k
    UINT64_C(2174753312), // FSTOI
414
1.99k
    UINT64_C(2174753184), // FSTOQ
415
1.99k
    UINT64_C(2174750752), // FSTOX
416
1.99k
    UINT64_C(2174748864), // FSUBD
417
1.99k
    UINT64_C(2174748896), // FSUBQ
418
1.99k
    UINT64_C(2174748832), // FSUBS
419
1.99k
    UINT64_C(2175798848), // FXNOR
420
1.99k
    UINT64_C(2175798880), // FXNORS
421
1.99k
    UINT64_C(2175798656), // FXOR
422
1.99k
    UINT64_C(2175798688), // FXORS
423
1.99k
    UINT64_C(2174750976), // FXTOD
424
1.99k
    UINT64_C(2174751104), // FXTOQ
425
1.99k
    UINT64_C(2174750848), // FXTOS
426
1.99k
    UINT64_C(2175798272), // FZERO
427
1.99k
    UINT64_C(2175798304), // FZEROS
428
1.99k
    UINT64_C(2176851968), // JMPLri
429
1.99k
    UINT64_C(2176843776), // JMPLrr
430
1.99k
    UINT64_C(3229614080), // LDArr
431
1.99k
    UINT64_C(3246923776), // LDCSRri
432
1.99k
    UINT64_C(3246915584), // LDCSRrr
433
1.99k
    UINT64_C(3246399488), // LDCri
434
1.99k
    UINT64_C(3246391296), // LDCrr
435
1.99k
    UINT64_C(3231186944), // LDDArr
436
1.99k
    UINT64_C(3247972352), // LDDCri
437
1.99k
    UINT64_C(3247964160), // LDDCrr
438
1.99k
    UINT64_C(3247964160), // LDDFArr
439
1.99k
    UINT64_C(3239583744), // LDDFri
440
1.99k
    UINT64_C(3239575552), // LDDFrr
441
1.99k
    UINT64_C(3222806528), // LDDri
442
1.99k
    UINT64_C(3222798336), // LDDrr
443
1.99k
    UINT64_C(3246391296), // LDFArr
444
1.99k
    UINT64_C(3238535168), // LDFSRri
445
1.99k
    UINT64_C(3238526976), // LDFSRrr
446
1.99k
    UINT64_C(3238010880), // LDFri
447
1.99k
    UINT64_C(3238002688), // LDFrr
448
1.99k
    UINT64_C(3247439872), // LDQFArr
449
1.99k
    UINT64_C(3239059456), // LDQFri
450
1.99k
    UINT64_C(3239051264), // LDQFrr
451
1.99k
    UINT64_C(3234332672), // LDSBArr
452
1.99k
    UINT64_C(3225952256), // LDSBri
453
1.99k
    UINT64_C(3225944064), // LDSBrr
454
1.99k
    UINT64_C(3234856960), // LDSHArr
455
1.99k
    UINT64_C(3226476544), // LDSHri
456
1.99k
    UINT64_C(3226468352), // LDSHrr
457
1.99k
    UINT64_C(3236429824), // LDSTUBArr
458
1.99k
    UINT64_C(3228049408), // LDSTUBri
459
1.99k
    UINT64_C(3228041216), // LDSTUBrr
460
1.99k
    UINT64_C(3225427968), // LDSWri
461
1.99k
    UINT64_C(3225419776), // LDSWrr
462
1.99k
    UINT64_C(3230138368), // LDUBArr
463
1.99k
    UINT64_C(3221757952), // LDUBri
464
1.99k
    UINT64_C(3221749760), // LDUBrr
465
1.99k
    UINT64_C(3230662656), // LDUHArr
466
1.99k
    UINT64_C(3222282240), // LDUHri
467
1.99k
    UINT64_C(3222274048), // LDUHrr
468
1.99k
    UINT64_C(3272089600), // LDXFSRri
469
1.99k
    UINT64_C(3272081408), // LDXFSRrr
470
1.99k
    UINT64_C(3227000832), // LDXri
471
1.99k
    UINT64_C(3226992640), // LDXrr
472
1.99k
    UINT64_C(3221233664), // LDri
473
1.99k
    UINT64_C(3221225472), // LDrr
474
1.99k
    UINT64_C(2147491840), // LEAX_ADDri
475
1.99k
    UINT64_C(2147491840), // LEA_ADDri
476
1.99k
    UINT64_C(2175795936), // LZCNT
477
1.99k
    UINT64_C(2168709120), // MEMBARi
478
1.99k
    UINT64_C(2175803904), // MOVDTOX
479
1.99k
    UINT64_C(2170560512), // MOVFCCri
480
1.99k
    UINT64_C(2170552320), // MOVFCCrr
481
1.99k
    UINT64_C(2170822656), // MOVICCri
482
1.99k
    UINT64_C(2170814464), // MOVICCrr
483
1.99k
    UINT64_C(2172140544), // MOVRGEZri
484
1.99k
    UINT64_C(2172132352), // MOVRGEZrr
485
1.99k
    UINT64_C(2172139520), // MOVRGZri
486
1.99k
    UINT64_C(2172131328), // MOVRGZrr
487
1.99k
    UINT64_C(2172135424), // MOVRLEZri
488
1.99k
    UINT64_C(2172127232), // MOVRLEZrr
489
1.99k
    UINT64_C(2172136448), // MOVRLZri
490
1.99k
    UINT64_C(2172128256), // MOVRLZrr
491
1.99k
    UINT64_C(2172138496), // MOVRNZri
492
1.99k
    UINT64_C(2172130304), // MOVRNZrr
493
1.99k
    UINT64_C(2172134400), // MOVRRZri
494
1.99k
    UINT64_C(2172126208), // MOVRRZrr
495
1.99k
    UINT64_C(2175804000), // MOVSTOSW
496
1.99k
    UINT64_C(2175803936), // MOVSTOUW
497
1.99k
    UINT64_C(2175804192), // MOVWTOS
498
1.99k
    UINT64_C(2170826752), // MOVXCCri
499
1.99k
    UINT64_C(2170818560), // MOVXCCrr
500
1.99k
    UINT64_C(2175804160), // MOVXTOD
501
1.99k
    UINT64_C(2166366208), // MULSCCri
502
1.99k
    UINT64_C(2166358016), // MULSCCrr
503
1.99k
    UINT64_C(2152210432), // MULXri
504
1.99k
    UINT64_C(2152202240), // MULXrr
505
1.99k
    UINT64_C(16777216), // NOP
506
1.99k
    UINT64_C(2156929024), // ORCCri
507
1.99k
    UINT64_C(2156920832), // ORCCrr
508
1.99k
    UINT64_C(2159026176), // ORNCCri
509
1.99k
    UINT64_C(2159017984), // ORNCCrr
510
1.99k
    UINT64_C(2150637568), // ORNri
511
1.99k
    UINT64_C(2150629376), // ORNrr
512
1.99k
    UINT64_C(2150629376), // ORXNrr
513
1.99k
    UINT64_C(2148540416), // ORXri
514
1.99k
    UINT64_C(2148532224), // ORXrr
515
1.99k
    UINT64_C(2148540416), // ORri
516
1.99k
    UINT64_C(2148532224), // ORrr
517
1.99k
    UINT64_C(2175797184), // PDIST
518
1.99k
    UINT64_C(2175797216), // PDISTN
519
1.99k
    UINT64_C(2171600896), // POPCrr
520
1.99k
    UINT64_C(2206736384), // PWRPSRri
521
1.99k
    UINT64_C(2206728192), // PWRPSRrr
522
1.99k
    UINT64_C(2168455168), // RDASR
523
1.99k
    UINT64_C(2169503744), // RDPR
524
1.99k
    UINT64_C(2168979456), // RDPSR
525
1.99k
    UINT64_C(2170028032), // RDTBR
526
1.99k
    UINT64_C(2169503744), // RDWIM
527
1.99k
    UINT64_C(2179473408), // RESTOREri
528
1.99k
    UINT64_C(2179465216), // RESTORErr
529
1.99k
    UINT64_C(2177359872), // RET
530
1.99k
    UINT64_C(2177097728), // RETL
531
1.99k
    UINT64_C(2177376256), // RETTri
532
1.99k
    UINT64_C(2177368064), // RETTrr
533
1.99k
    UINT64_C(2178949120), // SAVEri
534
1.99k
    UINT64_C(2178940928), // SAVErr
535
1.99k
    UINT64_C(2163744768), // SDIVCCri
536
1.99k
    UINT64_C(2163736576), // SDIVCCrr
537
1.99k
    UINT64_C(2171084800), // SDIVXri
538
1.99k
    UINT64_C(2171076608), // SDIVXrr
539
1.99k
    UINT64_C(2155356160), // SDIVri
540
1.99k
    UINT64_C(2155347968), // SDIVrr
541
1.99k
    UINT64_C(16777216), // SETHIXi
542
1.99k
    UINT64_C(16777216), // SETHIi
543
1.99k
    UINT64_C(2175799296), // SHUTDOWN
544
1.99k
    UINT64_C(2175799328), // SIAM
545
1.99k
    UINT64_C(2166894592), // SLLXri
546
1.99k
    UINT64_C(2166886400), // SLLXrr
547
1.99k
    UINT64_C(2166890496), // SLLri
548
1.99k
    UINT64_C(2166882304), // SLLrr
549
1.99k
    UINT64_C(2180521984), // SMACri
550
1.99k
    UINT64_C(2180513792), // SMACrr
551
1.99k
    UINT64_C(2161647616), // SMULCCri
552
1.99k
    UINT64_C(2161639424), // SMULCCrr
553
1.99k
    UINT64_C(2153259008), // SMULri
554
1.99k
    UINT64_C(2153250816), // SMULrr
555
1.99k
    UINT64_C(2167943168), // SRAXri
556
1.99k
    UINT64_C(2167934976), // SRAXrr
557
1.99k
    UINT64_C(2167939072), // SRAri
558
1.99k
    UINT64_C(2167930880), // SRArr
559
1.99k
    UINT64_C(2167418880), // SRLXri
560
1.99k
    UINT64_C(2167410688), // SRLXrr
561
1.99k
    UINT64_C(2167414784), // SRLri
562
1.99k
    UINT64_C(2167406592), // SRLrr
563
1.99k
    UINT64_C(3231711232), // STArr
564
1.99k
    UINT64_C(2168700928), // STBAR
565
1.99k
    UINT64_C(3232235520), // STBArr
566
1.99k
    UINT64_C(3223855104), // STBri
567
1.99k
    UINT64_C(3223846912), // STBrr
568
1.99k
    UINT64_C(3249020928), // STCSRri
569
1.99k
    UINT64_C(3249012736), // STCSRrr
570
1.99k
    UINT64_C(3248496640), // STCri
571
1.99k
    UINT64_C(3248488448), // STCrr
572
1.99k
    UINT64_C(3233284096), // STDArr
573
1.99k
    UINT64_C(3249545216), // STDCQri
574
1.99k
    UINT64_C(3249537024), // STDCQrr
575
1.99k
    UINT64_C(3250069504), // STDCri
576
1.99k
    UINT64_C(3250061312), // STDCrr
577
1.99k
    UINT64_C(3250061312), // STDFArr
578
1.99k
    UINT64_C(3241156608), // STDFQri
579
1.99k
    UINT64_C(3241148416), // STDFQrr
580
1.99k
    UINT64_C(3241680896), // STDFri
581
1.99k
    UINT64_C(3241672704), // STDFrr
582
1.99k
    UINT64_C(3224903680), // STDri
583
1.99k
    UINT64_C(3224895488), // STDrr
584
1.99k
    UINT64_C(3248488448), // STFArr
585
1.99k
    UINT64_C(3240632320), // STFSRri
586
1.99k
    UINT64_C(3240624128), // STFSRrr
587
1.99k
    UINT64_C(3240108032), // STFri
588
1.99k
    UINT64_C(3240099840), // STFrr
589
1.99k
    UINT64_C(3232759808), // STHArr
590
1.99k
    UINT64_C(3224379392), // STHri
591
1.99k
    UINT64_C(3224371200), // STHrr
592
1.99k
    UINT64_C(3249537024), // STQFArr
593
1.99k
    UINT64_C(3241156608), // STQFri
594
1.99k
    UINT64_C(3241148416), // STQFrr
595
1.99k
    UINT64_C(3274186752), // STXFSRri
596
1.99k
    UINT64_C(3274178560), // STXFSRrr
597
1.99k
    UINT64_C(3228573696), // STXri
598
1.99k
    UINT64_C(3228565504), // STXrr
599
1.99k
    UINT64_C(3223330816), // STri
600
1.99k
    UINT64_C(3223322624), // STrr
601
1.99k
    UINT64_C(2157977600), // SUBCCri
602
1.99k
    UINT64_C(2157969408), // SUBCCrr
603
1.99k
    UINT64_C(2153783296), // SUBCri
604
1.99k
    UINT64_C(2153775104), // SUBCrr
605
1.99k
    UINT64_C(2162171904), // SUBEri
606
1.99k
    UINT64_C(2162163712), // SUBErr
607
1.99k
    UINT64_C(2149588992), // SUBXri
608
1.99k
    UINT64_C(2149580800), // SUBXrr
609
1.99k
    UINT64_C(2149588992), // SUBri
610
1.99k
    UINT64_C(2149580800), // SUBrr
611
1.99k
    UINT64_C(3237478400), // SWAPArr
612
1.99k
    UINT64_C(3229097984), // SWAPri
613
1.99k
    UINT64_C(3229089792), // SWAPrr
614
1.99k
    UINT64_C(2446336001), // TA1
615
1.99k
    UINT64_C(2446336003), // TA3
616
1.99k
    UINT64_C(2446336005), // TA5
617
1.99k
    UINT64_C(2165317632), // TADDCCTVri
618
1.99k
    UINT64_C(2165309440), // TADDCCTVrr
619
1.99k
    UINT64_C(2164269056), // TADDCCri
620
1.99k
    UINT64_C(2164260864), // TADDCCrr
621
1.99k
    UINT64_C(2177900544), // TICCri
622
1.99k
    UINT64_C(2177892352), // TICCrr
623
1.99k
    UINT64_C(2147483648), // TLS_ADDXrr
624
1.99k
    UINT64_C(2147483648), // TLS_ADDrr
625
1.99k
    UINT64_C(1073741824), // TLS_CALL
626
1.99k
    UINT64_C(3226992640), // TLS_LDXrr
627
1.99k
    UINT64_C(3221225472), // TLS_LDrr
628
1.99k
    UINT64_C(2177900544), // TRAPri
629
1.99k
    UINT64_C(2177892352), // TRAPrr
630
1.99k
    UINT64_C(2165841920), // TSUBCCTVri
631
1.99k
    UINT64_C(2165833728), // TSUBCCTVrr
632
1.99k
    UINT64_C(2164793344), // TSUBCCri
633
1.99k
    UINT64_C(2164785152), // TSUBCCrr
634
1.99k
    UINT64_C(2177904640), // TXCCri
635
1.99k
    UINT64_C(2177896448), // TXCCrr
636
1.99k
    UINT64_C(2163220480), // UDIVCCri
637
1.99k
    UINT64_C(2163212288), // UDIVCCrr
638
1.99k
    UINT64_C(2154307584), // UDIVXri
639
1.99k
    UINT64_C(2154299392), // UDIVXrr
640
1.99k
    UINT64_C(2154831872), // UDIVri
641
1.99k
    UINT64_C(2154823680), // UDIVrr
642
1.99k
    UINT64_C(2179997696), // UMACri
643
1.99k
    UINT64_C(2179989504), // UMACrr
644
1.99k
    UINT64_C(2161123328), // UMULCCri
645
1.99k
    UINT64_C(2161115136), // UMULCCrr
646
1.99k
    UINT64_C(2175795904), // UMULXHI
647
1.99k
    UINT64_C(2152734720), // UMULri
648
1.99k
    UINT64_C(2152726528), // UMULrr
649
1.99k
    UINT64_C(0),  // UNIMP
650
1.99k
    UINT64_C(2175273536), // V9FCMPD
651
1.99k
    UINT64_C(2175273664), // V9FCMPED
652
1.99k
    UINT64_C(2175273696), // V9FCMPEQ
653
1.99k
    UINT64_C(2175273632), // V9FCMPES
654
1.99k
    UINT64_C(2175273568), // V9FCMPQ
655
1.99k
    UINT64_C(2175273504), // V9FCMPS
656
1.99k
    UINT64_C(2175270976), // V9FMOVD_FCC
657
1.99k
    UINT64_C(2175271008), // V9FMOVQ_FCC
658
1.99k
    UINT64_C(2175270944), // V9FMOVS_FCC
659
1.99k
    UINT64_C(2170560512), // V9MOVFCCri
660
1.99k
    UINT64_C(2170552320), // V9MOVFCCrr
661
1.99k
    UINT64_C(2172657664), // WRASRri
662
1.99k
    UINT64_C(2172649472), // WRASRrr
663
1.99k
    UINT64_C(2173706240), // WRPRri
664
1.99k
    UINT64_C(2173698048), // WRPRrr
665
1.99k
    UINT64_C(2173181952), // WRPSRri
666
1.99k
    UINT64_C(2173173760), // WRPSRrr
667
1.99k
    UINT64_C(2174230528), // WRTBRri
668
1.99k
    UINT64_C(2174222336), // WRTBRrr
669
1.99k
    UINT64_C(2173706240), // WRWIMri
670
1.99k
    UINT64_C(2173698048), // WRWIMrr
671
1.99k
    UINT64_C(2175804064), // XMULX
672
1.99k
    UINT64_C(2175804128), // XMULXHI
673
1.99k
    UINT64_C(2159550464), // XNORCCri
674
1.99k
    UINT64_C(2159542272), // XNORCCrr
675
1.99k
    UINT64_C(2151153664), // XNORXrr
676
1.99k
    UINT64_C(2151161856), // XNORri
677
1.99k
    UINT64_C(2151153664), // XNORrr
678
1.99k
    UINT64_C(2157453312), // XORCCri
679
1.99k
    UINT64_C(2157445120), // XORCCrr
680
1.99k
    UINT64_C(2149064704), // XORXri
681
1.99k
    UINT64_C(2149056512), // XORXrr
682
1.99k
    UINT64_C(2149064704), // XORri
683
1.99k
    UINT64_C(2149056512), // XORrr
684
1.99k
    UINT64_C(0)
685
1.99k
  };
686
1.99k
  const unsigned opcode = MI.getOpcode();
687
1.99k
  uint64_t Value = InstBits[opcode];
688
1.99k
  uint64_t op = 0;
689
1.99k
  (void)op;  // suppress warning
690
1.99k
  switch (opcode) {
691
1.99k
    case SP::FLUSH:
692
28
    case SP::FLUSHW:
693
28
    case SP::NOP:
694
28
    case SP::SHUTDOWN:
695
28
    case SP::SIAM:
696
28
    case SP::STBAR:
697
28
    case SP::TA1:
698
28
    case SP::TA3:
699
28
    case SP::TA5: {
700
28
      break;
701
28
    }
702
94
    case SP::BPFCC:
703
94
    case SP::BPFCCA:
704
94
    case SP::BPFCCANT:
705
94
    case SP::BPFCCNT: {
706
94
      // op: cc
707
94
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
708
94
      Value |= (op & UINT64_C(3)) << 20;
709
94
      // op: cond
710
94
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
711
94
      Value |= (op & UINT64_C(15)) << 25;
712
94
      // op: imm19
713
94
      op = getBranchPredTargetOpValue(MI, 0, Fixups, STI);
714
94
      Value |= op & UINT64_C(524287);
715
94
      break;
716
94
    }
717
148
    case SP::BPICC:
718
148
    case SP::BPICCA:
719
148
    case SP::BPICCANT:
720
148
    case SP::BPICCNT:
721
148
    case SP::BPXCC:
722
148
    case SP::BPXCCA:
723
148
    case SP::BPXCCANT:
724
148
    case SP::BPXCCNT: {
725
148
      // op: cond
726
148
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
727
148
      Value |= (op & UINT64_C(15)) << 25;
728
148
      // op: imm19
729
148
      op = getBranchPredTargetOpValue(MI, 0, Fixups, STI);
730
148
      Value |= op & UINT64_C(524287);
731
148
      break;
732
148
    }
733
148
    case SP::CALL:
734
36
    case SP::TLS_CALL: {
735
36
      // op: disp
736
36
      op = getCallTargetOpValue(MI, 0, Fixups, STI);
737
36
      Value |= op & UINT64_C(1073741823);
738
36
      break;
739
36
    }
740
36
    case SP::BPGEZapn:
741
11
    case SP::BPGEZapt:
742
11
    case SP::BPGEZnapn:
743
11
    case SP::BPGEZnapt:
744
11
    case SP::BPGZapn:
745
11
    case SP::BPGZapt:
746
11
    case SP::BPGZnapn:
747
11
    case SP::BPGZnapt:
748
11
    case SP::BPLEZapn:
749
11
    case SP::BPLEZapt:
750
11
    case SP::BPLEZnapn:
751
11
    case SP::BPLEZnapt:
752
11
    case SP::BPLZapn:
753
11
    case SP::BPLZapt:
754
11
    case SP::BPLZnapn:
755
11
    case SP::BPLZnapt:
756
11
    case SP::BPNZapn:
757
11
    case SP::BPNZapt:
758
11
    case SP::BPNZnapn:
759
11
    case SP::BPNZnapt:
760
11
    case SP::BPZapn:
761
11
    case SP::BPZapt:
762
11
    case SP::BPZnapn:
763
11
    case SP::BPZnapt: {
764
11
      // op: imm16
765
11
      op = getBranchOnRegTargetOpValue(MI, 1, Fixups, STI);
766
11
      Value |= (op & UINT64_C(49152)) << 6;
767
11
      Value |= op & UINT64_C(16383);
768
11
      // op: rs1
769
11
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
770
11
      Value |= (op & UINT64_C(31)) << 14;
771
11
      break;
772
11
    }
773
11
    case SP::BA: {
774
4
      // op: imm22
775
4
      op = getBranchTargetOpValue(MI, 0, Fixups, STI);
776
4
      Value |= op & UINT64_C(4194303);
777
4
      break;
778
11
    }
779
225
    case SP::BCOND:
780
225
    case SP::BCONDA:
781
225
    case SP::CBCOND:
782
225
    case SP::CBCONDA:
783
225
    case SP::FBCOND:
784
225
    case SP::FBCONDA: {
785
225
      // op: imm22
786
225
      op = getBranchTargetOpValue(MI, 0, Fixups, STI);
787
225
      Value |= op & UINT64_C(4194303);
788
225
      // op: cond
789
225
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
790
225
      Value |= (op & UINT64_C(15)) << 25;
791
225
      break;
792
225
    }
793
225
    case SP::UNIMP: {
794
5
      // op: imm22
795
5
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
796
5
      Value |= op & UINT64_C(4194303);
797
5
      break;
798
225
    }
799
225
    case SP::SETHIXi:
800
111
    case SP::SETHIi: {
801
111
      // op: imm22
802
111
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
803
111
      Value |= op & UINT64_C(4194303);
804
111
      // op: rd
805
111
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
806
111
      Value |= (op & UINT64_C(31)) << 25;
807
111
      break;
808
111
    }
809
111
    case SP::FONE:
810
19
    case SP::FONES:
811
19
    case SP::FZERO:
812
19
    case SP::FZEROS:
813
19
    case SP::RDPSR:
814
19
    case SP::RDTBR:
815
19
    case SP::RDWIM: {
816
19
      // op: rd
817
19
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
818
19
      Value |= (op & UINT64_C(31)) << 25;
819
19
      break;
820
19
    }
821
19
    case SP::V9MOVFCCrr: {
822
15
      // op: rd
823
15
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
824
15
      Value |= (op & UINT64_C(31)) << 25;
825
15
      // op: cc
826
15
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
827
15
      Value |= (op & UINT64_C(3)) << 11;
828
15
      // op: cond
829
15
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
830
15
      Value |= (op & UINT64_C(15)) << 14;
831
15
      // op: rs2
832
15
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
833
15
      Value |= op & UINT64_C(31);
834
15
      break;
835
19
    }
836
19
    case SP::V9MOVFCCri: {
837
0
      // op: rd
838
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
839
0
      Value |= (op & UINT64_C(31)) << 25;
840
0
      // op: cc
841
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
842
0
      Value |= (op & UINT64_C(3)) << 11;
843
0
      // op: cond
844
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
845
0
      Value |= (op & UINT64_C(15)) << 14;
846
0
      // op: simm11
847
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
848
0
      Value |= op & UINT64_C(2047);
849
0
      break;
850
19
    }
851
56
    case SP::FMOVD_FCC:
852
56
    case SP::FMOVD_ICC:
853
56
    case SP::FMOVD_XCC:
854
56
    case SP::FMOVQ_FCC:
855
56
    case SP::FMOVQ_ICC:
856
56
    case SP::FMOVQ_XCC:
857
56
    case SP::FMOVS_FCC:
858
56
    case SP::FMOVS_ICC:
859
56
    case SP::FMOVS_XCC:
860
56
    case SP::MOVFCCrr:
861
56
    case SP::MOVICCrr:
862
56
    case SP::MOVXCCrr: {
863
56
      // op: rd
864
56
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
865
56
      Value |= (op & UINT64_C(31)) << 25;
866
56
      // op: cond
867
56
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
868
56
      Value |= (op & UINT64_C(15)) << 14;
869
56
      // op: rs2
870
56
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
871
56
      Value |= op & UINT64_C(31);
872
56
      break;
873
56
    }
874
56
    case SP::MOVFCCri:
875
0
    case SP::MOVICCri:
876
0
    case SP::MOVXCCri: {
877
0
      // op: rd
878
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
879
0
      Value |= (op & UINT64_C(31)) << 25;
880
0
      // op: cond
881
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
882
0
      Value |= (op & UINT64_C(15)) << 14;
883
0
      // op: simm11
884
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
885
0
      Value |= op & UINT64_C(2047);
886
0
      break;
887
0
    }
888
15
    case SP::V9FMOVD_FCC:
889
15
    case SP::V9FMOVQ_FCC:
890
15
    case SP::V9FMOVS_FCC: {
891
15
      // op: rd
892
15
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
893
15
      Value |= (op & UINT64_C(31)) << 25;
894
15
      // op: cond
895
15
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
896
15
      Value |= (op & UINT64_C(15)) << 14;
897
15
      // op: opf_cc
898
15
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
899
15
      Value |= (op & UINT64_C(3)) << 11;
900
15
      // op: rs2
901
15
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
902
15
      Value |= op & UINT64_C(31);
903
15
      break;
904
15
    }
905
31
    case SP::FNOT1:
906
31
    case SP::FNOT1S:
907
31
    case SP::FSRC1:
908
31
    case SP::FSRC1S:
909
31
    case SP::RDASR:
910
31
    case SP::RDPR: {
911
31
      // op: rd
912
31
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
913
31
      Value |= (op & UINT64_C(31)) << 25;
914
31
      // op: rs1
915
31
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
916
31
      Value |= (op & UINT64_C(31)) << 14;
917
31
      break;
918
31
    }
919
31
    case SP::LDArr:
920
20
    case SP::LDDArr:
921
20
    case SP::LDDFArr:
922
20
    case SP::LDFArr:
923
20
    case SP::LDQFArr:
924
20
    case SP::LDSBArr:
925
20
    case SP::LDSHArr:
926
20
    case SP::LDSTUBArr:
927
20
    case SP::LDUBArr:
928
20
    case SP::LDUHArr:
929
20
    case SP::SWAPArr: {
930
20
      // op: rd
931
20
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
932
20
      Value |= (op & UINT64_C(31)) << 25;
933
20
      // op: rs1
934
20
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
935
20
      Value |= (op & UINT64_C(31)) << 14;
936
20
      // op: asi
937
20
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
938
20
      Value |= (op & UINT64_C(255)) << 5;
939
20
      // op: rs2
940
20
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
941
20
      Value |= op & UINT64_C(31);
942
20
      break;
943
20
    }
944
20
    case SP::CASArr: {
945
10
      // op: rd
946
10
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
947
10
      Value |= (op & UINT64_C(31)) << 25;
948
10
      // op: rs1
949
10
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
950
10
      Value |= (op & UINT64_C(31)) << 14;
951
10
      // op: asi
952
10
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
953
10
      Value |= (op & UINT64_C(255)) << 5;
954
10
      // op: rs2
955
10
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
956
10
      Value |= op & UINT64_C(31);
957
10
      break;
958
20
    }
959
400
    case SP::ADDCCrr:
960
400
    case SP::ADDCrr:
961
400
    case SP::ADDErr:
962
400
    case SP::ADDXC:
963
400
    case SP::ADDXCCC:
964
400
    case SP::ADDXrr:
965
400
    case SP::ADDrr:
966
400
    case SP::ALIGNADDR:
967
400
    case SP::ALIGNADDRL:
968
400
    case SP::ANDCCrr:
969
400
    case SP::ANDNCCrr:
970
400
    case SP::ANDNrr:
971
400
    case SP::ANDXNrr:
972
400
    case SP::ANDXrr:
973
400
    case SP::ANDrr:
974
400
    case SP::ARRAY16:
975
400
    case SP::ARRAY32:
976
400
    case SP::ARRAY8:
977
400
    case SP::BMASK:
978
400
    case SP::BSHUFFLE:
979
400
    case SP::CASAasi10:
980
400
    case SP::CASXrr:
981
400
    case SP::CASrr:
982
400
    case SP::EDGE16:
983
400
    case SP::EDGE16L:
984
400
    case SP::EDGE16LN:
985
400
    case SP::EDGE16N:
986
400
    case SP::EDGE32:
987
400
    case SP::EDGE32L:
988
400
    case SP::EDGE32LN:
989
400
    case SP::EDGE32N:
990
400
    case SP::EDGE8:
991
400
    case SP::EDGE8L:
992
400
    case SP::EDGE8LN:
993
400
    case SP::EDGE8N:
994
400
    case SP::FADDD:
995
400
    case SP::FADDQ:
996
400
    case SP::FADDS:
997
400
    case SP::FALIGNADATA:
998
400
    case SP::FAND:
999
400
    case SP::FANDNOT1:
1000
400
    case SP::FANDNOT1S:
1001
400
    case SP::FANDNOT2:
1002
400
    case SP::FANDNOT2S:
1003
400
    case SP::FANDS:
1004
400
    case SP::FCHKSM16:
1005
400
    case SP::FCMPEQ16:
1006
400
    case SP::FCMPEQ32:
1007
400
    case SP::FCMPGT16:
1008
400
    case SP::FCMPGT32:
1009
400
    case SP::FCMPLE16:
1010
400
    case SP::FCMPLE32:
1011
400
    case SP::FCMPNE16:
1012
400
    case SP::FCMPNE32:
1013
400
    case SP::FDIVD:
1014
400
    case SP::FDIVQ:
1015
400
    case SP::FDIVS:
1016
400
    case SP::FDMULQ:
1017
400
    case SP::FHADDD:
1018
400
    case SP::FHADDS:
1019
400
    case SP::FHSUBD:
1020
400
    case SP::FHSUBS:
1021
400
    case SP::FLCMPD:
1022
400
    case SP::FLCMPS:
1023
400
    case SP::FMEAN16:
1024
400
    case SP::FMOVRGEZD:
1025
400
    case SP::FMOVRGEZQ:
1026
400
    case SP::FMOVRGEZS:
1027
400
    case SP::FMOVRGZD:
1028
400
    case SP::FMOVRGZQ:
1029
400
    case SP::FMOVRGZS:
1030
400
    case SP::FMOVRLEZD:
1031
400
    case SP::FMOVRLEZQ:
1032
400
    case SP::FMOVRLEZS:
1033
400
    case SP::FMOVRLZD:
1034
400
    case SP::FMOVRLZQ:
1035
400
    case SP::FMOVRLZS:
1036
400
    case SP::FMOVRNZD:
1037
400
    case SP::FMOVRNZQ:
1038
400
    case SP::FMOVRNZS:
1039
400
    case SP::FMOVRZD:
1040
400
    case SP::FMOVRZQ:
1041
400
    case SP::FMOVRZS:
1042
400
    case SP::FMUL8SUX16:
1043
400
    case SP::FMUL8ULX16:
1044
400
    case SP::FMUL8X16:
1045
400
    case SP::FMUL8X16AL:
1046
400
    case SP::FMUL8X16AU:
1047
400
    case SP::FMULD:
1048
400
    case SP::FMULD8SUX16:
1049
400
    case SP::FMULD8ULX16:
1050
400
    case SP::FMULQ:
1051
400
    case SP::FMULS:
1052
400
    case SP::FNADDD:
1053
400
    case SP::FNADDS:
1054
400
    case SP::FNAND:
1055
400
    case SP::FNANDS:
1056
400
    case SP::FNHADDD:
1057
400
    case SP::FNHADDS:
1058
400
    case SP::FNMULD:
1059
400
    case SP::FNMULS:
1060
400
    case SP::FNOR:
1061
400
    case SP::FNORS:
1062
400
    case SP::FNSMULD:
1063
400
    case SP::FOR:
1064
400
    case SP::FORNOT1:
1065
400
    case SP::FORNOT1S:
1066
400
    case SP::FORNOT2:
1067
400
    case SP::FORNOT2S:
1068
400
    case SP::FORS:
1069
400
    case SP::FPACK32:
1070
400
    case SP::FPADD16:
1071
400
    case SP::FPADD16S:
1072
400
    case SP::FPADD32:
1073
400
    case SP::FPADD32S:
1074
400
    case SP::FPADD64:
1075
400
    case SP::FPMERGE:
1076
400
    case SP::FPSUB16:
1077
400
    case SP::FPSUB16S:
1078
400
    case SP::FPSUB32:
1079
400
    case SP::FPSUB32S:
1080
400
    case SP::FSLAS16:
1081
400
    case SP::FSLAS32:
1082
400
    case SP::FSLL16:
1083
400
    case SP::FSLL32:
1084
400
    case SP::FSMULD:
1085
400
    case SP::FSRA16:
1086
400
    case SP::FSRA32:
1087
400
    case SP::FSRL16:
1088
400
    case SP::FSRL32:
1089
400
    case SP::FSUBD:
1090
400
    case SP::FSUBQ:
1091
400
    case SP::FSUBS:
1092
400
    case SP::FXNOR:
1093
400
    case SP::FXNORS:
1094
400
    case SP::FXOR:
1095
400
    case SP::FXORS:
1096
400
    case SP::JMPLrr:
1097
400
    case SP::LDCrr:
1098
400
    case SP::LDDCrr:
1099
400
    case SP::LDDFrr:
1100
400
    case SP::LDDrr:
1101
400
    case SP::LDFrr:
1102
400
    case SP::LDQFrr:
1103
400
    case SP::LDSBrr:
1104
400
    case SP::LDSHrr:
1105
400
    case SP::LDSTUBrr:
1106
400
    case SP::LDSWrr:
1107
400
    case SP::LDUBrr:
1108
400
    case SP::LDUHrr:
1109
400
    case SP::LDXrr:
1110
400
    case SP::LDrr:
1111
400
    case SP::MOVRGEZrr:
1112
400
    case SP::MOVRGZrr:
1113
400
    case SP::MOVRLEZrr:
1114
400
    case SP::MOVRLZrr:
1115
400
    case SP::MOVRNZrr:
1116
400
    case SP::MOVRRZrr:
1117
400
    case SP::MULSCCrr:
1118
400
    case SP::MULXrr:
1119
400
    case SP::ORCCrr:
1120
400
    case SP::ORNCCrr:
1121
400
    case SP::ORNrr:
1122
400
    case SP::ORXNrr:
1123
400
    case SP::ORXrr:
1124
400
    case SP::ORrr:
1125
400
    case SP::PDIST:
1126
400
    case SP::PDISTN:
1127
400
    case SP::RESTORErr:
1128
400
    case SP::SAVErr:
1129
400
    case SP::SDIVCCrr:
1130
400
    case SP::SDIVXrr:
1131
400
    case SP::SDIVrr:
1132
400
    case SP::SLLXrr:
1133
400
    case SP::SLLrr:
1134
400
    case SP::SMACrr:
1135
400
    case SP::SMULCCrr:
1136
400
    case SP::SMULrr:
1137
400
    case SP::SRAXrr:
1138
400
    case SP::SRArr:
1139
400
    case SP::SRLXrr:
1140
400
    case SP::SRLrr:
1141
400
    case SP::SUBCCrr:
1142
400
    case SP::SUBCrr:
1143
400
    case SP::SUBErr:
1144
400
    case SP::SUBXrr:
1145
400
    case SP::SUBrr:
1146
400
    case SP::SWAPrr:
1147
400
    case SP::TADDCCTVrr:
1148
400
    case SP::TADDCCrr:
1149
400
    case SP::TLS_ADDXrr:
1150
400
    case SP::TLS_ADDrr:
1151
400
    case SP::TLS_LDXrr:
1152
400
    case SP::TLS_LDrr:
1153
400
    case SP::TSUBCCTVrr:
1154
400
    case SP::TSUBCCrr:
1155
400
    case SP::UDIVCCrr:
1156
400
    case SP::UDIVXrr:
1157
400
    case SP::UDIVrr:
1158
400
    case SP::UMACrr:
1159
400
    case SP::UMULCCrr:
1160
400
    case SP::UMULXHI:
1161
400
    case SP::UMULrr:
1162
400
    case SP::V9FCMPD:
1163
400
    case SP::V9FCMPED:
1164
400
    case SP::V9FCMPEQ:
1165
400
    case SP::V9FCMPES:
1166
400
    case SP::V9FCMPQ:
1167
400
    case SP::V9FCMPS:
1168
400
    case SP::WRASRrr:
1169
400
    case SP::WRPRrr:
1170
400
    case SP::XMULX:
1171
400
    case SP::XMULXHI:
1172
400
    case SP::XNORCCrr:
1173
400
    case SP::XNORXrr:
1174
400
    case SP::XNORrr:
1175
400
    case SP::XORCCrr:
1176
400
    case SP::XORXrr:
1177
400
    case SP::XORrr: {
1178
400
      // op: rd
1179
400
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1180
400
      Value |= (op & UINT64_C(31)) << 25;
1181
400
      // op: rs1
1182
400
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
1183
400
      Value |= (op & UINT64_C(31)) << 14;
1184
400
      // op: rs2
1185
400
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
1186
400
      Value |= op & UINT64_C(31);
1187
400
      break;
1188
400
    }
1189
400
    case SP::SLLXri:
1190
6
    case SP::SRAXri:
1191
6
    case SP::SRLXri: {
1192
6
      // op: rd
1193
6
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1194
6
      Value |= (op & UINT64_C(31)) << 25;
1195
6
      // op: rs1
1196
6
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
1197
6
      Value |= (op & UINT64_C(31)) << 14;
1198
6
      // op: shcnt
1199
6
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
1200
6
      Value |= op & UINT64_C(63);
1201
6
      break;
1202
6
    }
1203
6
    case SP::MOVRGEZri:
1204
0
    case SP::MOVRGZri:
1205
0
    case SP::MOVRLEZri:
1206
0
    case SP::MOVRLZri:
1207
0
    case SP::MOVRNZri:
1208
0
    case SP::MOVRRZri: {
1209
0
      // op: rd
1210
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1211
0
      Value |= (op & UINT64_C(31)) << 25;
1212
0
      // op: rs1
1213
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
1214
0
      Value |= (op & UINT64_C(31)) << 14;
1215
0
      // op: simm10
1216
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
1217
0
      Value |= op & UINT64_C(1023);
1218
0
      break;
1219
0
    }
1220
294
    case SP::ADDCCri:
1221
294
    case SP::ADDCri:
1222
294
    case SP::ADDEri:
1223
294
    case SP::ADDXri:
1224
294
    case SP::ADDri:
1225
294
    case SP::ANDCCri:
1226
294
    case SP::ANDNCCri:
1227
294
    case SP::ANDNri:
1228
294
    case SP::ANDXri:
1229
294
    case SP::ANDri:
1230
294
    case SP::JMPLri:
1231
294
    case SP::LDCri:
1232
294
    case SP::LDDCri:
1233
294
    case SP::LDDFri:
1234
294
    case SP::LDDri:
1235
294
    case SP::LDFri:
1236
294
    case SP::LDQFri:
1237
294
    case SP::LDSBri:
1238
294
    case SP::LDSHri:
1239
294
    case SP::LDSTUBri:
1240
294
    case SP::LDSWri:
1241
294
    case SP::LDUBri:
1242
294
    case SP::LDUHri:
1243
294
    case SP::LDXri:
1244
294
    case SP::LDri:
1245
294
    case SP::LEAX_ADDri:
1246
294
    case SP::LEA_ADDri:
1247
294
    case SP::MULSCCri:
1248
294
    case SP::MULXri:
1249
294
    case SP::ORCCri:
1250
294
    case SP::ORNCCri:
1251
294
    case SP::ORNri:
1252
294
    case SP::ORXri:
1253
294
    case SP::ORri:
1254
294
    case SP::RESTOREri:
1255
294
    case SP::SAVEri:
1256
294
    case SP::SDIVCCri:
1257
294
    case SP::SDIVXri:
1258
294
    case SP::SDIVri:
1259
294
    case SP::SLLri:
1260
294
    case SP::SMACri:
1261
294
    case SP::SMULCCri:
1262
294
    case SP::SMULri:
1263
294
    case SP::SRAri:
1264
294
    case SP::SRLri:
1265
294
    case SP::SUBCCri:
1266
294
    case SP::SUBCri:
1267
294
    case SP::SUBEri:
1268
294
    case SP::SUBXri:
1269
294
    case SP::SUBri:
1270
294
    case SP::SWAPri:
1271
294
    case SP::TADDCCTVri:
1272
294
    case SP::TADDCCri:
1273
294
    case SP::TSUBCCTVri:
1274
294
    case SP::TSUBCCri:
1275
294
    case SP::UDIVCCri:
1276
294
    case SP::UDIVXri:
1277
294
    case SP::UDIVri:
1278
294
    case SP::UMACri:
1279
294
    case SP::UMULCCri:
1280
294
    case SP::UMULri:
1281
294
    case SP::WRASRri:
1282
294
    case SP::WRPRri:
1283
294
    case SP::XNORCCri:
1284
294
    case SP::XNORri:
1285
294
    case SP::XORCCri:
1286
294
    case SP::XORXri:
1287
294
    case SP::XORri: {
1288
294
      // op: rd
1289
294
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1290
294
      Value |= (op & UINT64_C(31)) << 25;
1291
294
      // op: rs1
1292
294
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
1293
294
      Value |= (op & UINT64_C(31)) << 14;
1294
294
      // op: simm13
1295
294
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
1296
294
      Value |= op & UINT64_C(8191);
1297
294
      break;
1298
294
    }
1299
294
    case SP::FABSD:
1300
31
    case SP::FABSQ:
1301
31
    case SP::FABSS:
1302
31
    case SP::FDTOI:
1303
31
    case SP::FDTOQ:
1304
31
    case SP::FDTOS:
1305
31
    case SP::FDTOX:
1306
31
    case SP::FEXPAND:
1307
31
    case SP::FITOD:
1308
31
    case SP::FITOQ:
1309
31
    case SP::FITOS:
1310
31
    case SP::FMOVD:
1311
31
    case SP::FMOVQ:
1312
31
    case SP::FMOVS:
1313
31
    case SP::FNEGD:
1314
31
    case SP::FNEGQ:
1315
31
    case SP::FNEGS:
1316
31
    case SP::FNOT2:
1317
31
    case SP::FNOT2S:
1318
31
    case SP::FPACK16:
1319
31
    case SP::FPACKFIX:
1320
31
    case SP::FQTOD:
1321
31
    case SP::FQTOI:
1322
31
    case SP::FQTOS:
1323
31
    case SP::FQTOX:
1324
31
    case SP::FSQRTD:
1325
31
    case SP::FSQRTQ:
1326
31
    case SP::FSQRTS:
1327
31
    case SP::FSRC2:
1328
31
    case SP::FSRC2S:
1329
31
    case SP::FSTOD:
1330
31
    case SP::FSTOI:
1331
31
    case SP::FSTOQ:
1332
31
    case SP::FSTOX:
1333
31
    case SP::FXTOD:
1334
31
    case SP::FXTOQ:
1335
31
    case SP::FXTOS:
1336
31
    case SP::LZCNT:
1337
31
    case SP::MOVDTOX:
1338
31
    case SP::MOVSTOSW:
1339
31
    case SP::MOVSTOUW:
1340
31
    case SP::MOVWTOS:
1341
31
    case SP::MOVXTOD:
1342
31
    case SP::POPCrr: {
1343
31
      // op: rd
1344
31
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1345
31
      Value |= (op & UINT64_C(31)) << 25;
1346
31
      // op: rs2
1347
31
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
1348
31
      Value |= op & UINT64_C(31);
1349
31
      break;
1350
31
    }
1351
31
    case SP::STArr:
1352
19
    case SP::STBArr:
1353
19
    case SP::STDArr:
1354
19
    case SP::STDFArr:
1355
19
    case SP::STFArr:
1356
19
    case SP::STHArr:
1357
19
    case SP::STQFArr: {
1358
19
      // op: rd
1359
19
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
1360
19
      Value |= (op & UINT64_C(31)) << 25;
1361
19
      // op: rs1
1362
19
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1363
19
      Value |= (op & UINT64_C(31)) << 14;
1364
19
      // op: asi
1365
19
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
1366
19
      Value |= (op & UINT64_C(255)) << 5;
1367
19
      // op: rs2
1368
19
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
1369
19
      Value |= op & UINT64_C(31);
1370
19
      break;
1371
19
    }
1372
55
    case SP::STBrr:
1373
55
    case SP::STCrr:
1374
55
    case SP::STDCrr:
1375
55
    case SP::STDFrr:
1376
55
    case SP::STDrr:
1377
55
    case SP::STFrr:
1378
55
    case SP::STHrr:
1379
55
    case SP::STQFrr:
1380
55
    case SP::STXrr:
1381
55
    case SP::STrr: {
1382
55
      // op: rd
1383
55
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
1384
55
      Value |= (op & UINT64_C(31)) << 25;
1385
55
      // op: rs1
1386
55
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1387
55
      Value |= (op & UINT64_C(31)) << 14;
1388
55
      // op: rs2
1389
55
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
1390
55
      Value |= op & UINT64_C(31);
1391
55
      break;
1392
55
    }
1393
55
    case SP::STBri:
1394
17
    case SP::STCri:
1395
17
    case SP::STDCri:
1396
17
    case SP::STDFri:
1397
17
    case SP::STDri:
1398
17
    case SP::STFri:
1399
17
    case SP::STHri:
1400
17
    case SP::STQFri:
1401
17
    case SP::STXri:
1402
17
    case SP::STri: {
1403
17
      // op: rd
1404
17
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
1405
17
      Value |= (op & UINT64_C(31)) << 25;
1406
17
      // op: rs1
1407
17
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1408
17
      Value |= (op & UINT64_C(31)) << 14;
1409
17
      // op: simm13
1410
17
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
1411
17
      Value |= op & UINT64_C(8191);
1412
17
      break;
1413
17
    }
1414
97
    case SP::TICCri:
1415
97
    case SP::TRAPri:
1416
97
    case SP::TXCCri: {
1417
97
      // op: rs1
1418
97
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1419
97
      Value |= (op & UINT64_C(31)) << 14;
1420
97
      // op: cond
1421
97
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
1422
97
      Value |= (op & UINT64_C(15)) << 25;
1423
97
      // op: imm
1424
97
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
1425
97
      Value |= op & UINT64_C(255);
1426
97
      break;
1427
97
    }
1428
102
    case SP::TICCrr:
1429
102
    case SP::TRAPrr:
1430
102
    case SP::TXCCrr: {
1431
102
      // op: rs1
1432
102
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1433
102
      Value |= (op & UINT64_C(31)) << 14;
1434
102
      // op: cond
1435
102
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
1436
102
      Value |= (op & UINT64_C(15)) << 25;
1437
102
      // op: rs2
1438
102
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
1439
102
      Value |= op & UINT64_C(31);
1440
102
      break;
1441
102
    }
1442
102
    case SP::BINDrr:
1443
49
    case SP::CALLrr:
1444
49
    case SP::CMPrr:
1445
49
    case SP::FCMPD:
1446
49
    case SP::FCMPQ:
1447
49
    case SP::FCMPS:
1448
49
    case SP::FLUSHrr:
1449
49
    case SP::LDCSRrr:
1450
49
    case SP::LDFSRrr:
1451
49
    case SP::LDXFSRrr:
1452
49
    case SP::PWRPSRrr:
1453
49
    case SP::RETTrr:
1454
49
    case SP::STCSRrr:
1455
49
    case SP::STDCQrr:
1456
49
    case SP::STDFQrr:
1457
49
    case SP::STFSRrr:
1458
49
    case SP::STXFSRrr:
1459
49
    case SP::WRPSRrr:
1460
49
    case SP::WRTBRrr:
1461
49
    case SP::WRWIMrr: {
1462
49
      // op: rs1
1463
49
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1464
49
      Value |= (op & UINT64_C(31)) << 14;
1465
49
      // op: rs2
1466
49
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
1467
49
      Value |= op & UINT64_C(31);
1468
49
      break;
1469
49
    }
1470
53
    case SP::BINDri:
1471
53
    case SP::CALLri:
1472
53
    case SP::CMPri:
1473
53
    case SP::FLUSHri:
1474
53
    case SP::LDCSRri:
1475
53
    case SP::LDFSRri:
1476
53
    case SP::LDXFSRri:
1477
53
    case SP::PWRPSRri:
1478
53
    case SP::RETTri:
1479
53
    case SP::STCSRri:
1480
53
    case SP::STDCQri:
1481
53
    case SP::STDFQri:
1482
53
    case SP::STFSRri:
1483
53
    case SP::STXFSRri:
1484
53
    case SP::WRPSRri:
1485
53
    case SP::WRTBRri:
1486
53
    case SP::WRWIMri: {
1487
53
      // op: rs1
1488
53
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1489
53
      Value |= (op & UINT64_C(31)) << 14;
1490
53
      // op: simm13
1491
53
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
1492
53
      Value |= op & UINT64_C(8191);
1493
53
      break;
1494
53
    }
1495
53
    case SP::CMASK16:
1496
0
    case SP::CMASK32:
1497
0
    case SP::CMASK8: {
1498
0
      // op: rs2
1499
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1500
0
      Value |= op & UINT64_C(31);
1501
0
      break;
1502
0
    }
1503
41
    case SP::MEMBARi:
1504
41
    case SP::RET:
1505
41
    case SP::RETL: {
1506
41
      // op: simm13
1507
41
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1508
41
      Value |= op & UINT64_C(8191);
1509
41
      break;
1510
41
    }
1511
41
  default:
1512
0
    std::string msg;
1513
0
    raw_string_ostream Msg(msg);
1514
0
    Msg << "Not supported instr: " << MI;
1515
0
    report_fatal_error(Msg.str());
1516
1.99k
  }
1517
1.99k
  return Value;
1518
1.99k
}
1519
1520
#ifdef ENABLE_INSTR_PREDICATE_VERIFIER
1521
#undef ENABLE_INSTR_PREDICATE_VERIFIER
1522
#include <sstream>
1523
1524
// Flags for subtarget features that participate in instruction matching.
1525
enum SubtargetFeatureFlag : uint8_t {
1526
  Feature_UseSoftMulDiv = (1ULL << 5),
1527
  Feature_HasV9 = (1ULL << 1),
1528
  Feature_HasVIS = (1ULL << 2),
1529
  Feature_HasVIS2 = (1ULL << 3),
1530
  Feature_HasVIS3 = (1ULL << 4),
1531
  Feature_HasPWRPSR = (1ULL << 0),
1532
  Feature_None = 0
1533
};
1534
1535
#ifndef NDEBUG
1536
static const char *SubtargetFeatureNames[] = {
1537
  "Feature_HasPWRPSR",
1538
  "Feature_HasV9",
1539
  "Feature_HasVIS",
1540
  "Feature_HasVIS2",
1541
  "Feature_HasVIS3",
1542
  "Feature_UseSoftMulDiv",
1543
  nullptr
1544
};
1545
1546
#endif // NDEBUG
1547
uint64_t SparcMCCodeEmitter::
1548
1.99k
computeAvailableFeatures(const FeatureBitset& FB) const {
1549
1.99k
  uint64_t Features = 0;
1550
1.99k
  if ((FB[Sparc::FeatureSoftMulDiv]))
1551
0
    Features |= Feature_UseSoftMulDiv;
1552
1.99k
  if ((FB[Sparc::FeatureV9]))
1553
1.27k
    Features |= Feature_HasV9;
1554
1.99k
  if ((FB[Sparc::FeatureVIS]))
1555
1
    Features |= Feature_HasVIS;
1556
1.99k
  if ((FB[Sparc::FeatureVIS2]))
1557
1
    Features |= Feature_HasVIS2;
1558
1.99k
  if ((FB[Sparc::FeatureVIS3]))
1559
0
    Features |= Feature_HasVIS3;
1560
1.99k
  if ((FB[Sparc::FeaturePWRPSR]))
1561
7
    Features |= Feature_HasPWRPSR;
1562
1.99k
  return Features;
1563
1.99k
}
1564
1565
void SparcMCCodeEmitter::verifyInstructionPredicates(
1566
1.99k
    const MCInst &Inst, uint64_t AvailableFeatures) const {
1567
#ifndef NDEBUG
1568
  static uint64_t RequiredFeatures[] = {
1569
    0, // PHI = 0
1570
    0, // INLINEASM = 1
1571
    0, // CFI_INSTRUCTION = 2
1572
    0, // EH_LABEL = 3
1573
    0, // GC_LABEL = 4
1574
    0, // ANNOTATION_LABEL = 5
1575
    0, // KILL = 6
1576
    0, // EXTRACT_SUBREG = 7
1577
    0, // INSERT_SUBREG = 8
1578
    0, // IMPLICIT_DEF = 9
1579
    0, // SUBREG_TO_REG = 10
1580
    0, // COPY_TO_REGCLASS = 11
1581
    0, // DBG_VALUE = 12
1582
    0, // DBG_LABEL = 13
1583
    0, // REG_SEQUENCE = 14
1584
    0, // COPY = 15
1585
    0, // BUNDLE = 16
1586
    0, // LIFETIME_START = 17
1587
    0, // LIFETIME_END = 18
1588
    0, // STACKMAP = 19
1589
    0, // FENTRY_CALL = 20
1590
    0, // PATCHPOINT = 21
1591
    0, // LOAD_STACK_GUARD = 22
1592
    0, // STATEPOINT = 23
1593
    0, // LOCAL_ESCAPE = 24
1594
    0, // FAULTING_OP = 25
1595
    0, // PATCHABLE_OP = 26
1596
    0, // PATCHABLE_FUNCTION_ENTER = 27
1597
    0, // PATCHABLE_RET = 28
1598
    0, // PATCHABLE_FUNCTION_EXIT = 29
1599
    0, // PATCHABLE_TAIL_CALL = 30
1600
    0, // PATCHABLE_EVENT_CALL = 31
1601
    0, // PATCHABLE_TYPED_EVENT_CALL = 32
1602
    0, // ICALL_BRANCH_FUNNEL = 33
1603
    0, // G_ADD = 34
1604
    0, // G_SUB = 35
1605
    0, // G_MUL = 36
1606
    0, // G_SDIV = 37
1607
    0, // G_UDIV = 38
1608
    0, // G_SREM = 39
1609
    0, // G_UREM = 40
1610
    0, // G_AND = 41
1611
    0, // G_OR = 42
1612
    0, // G_XOR = 43
1613
    0, // G_IMPLICIT_DEF = 44
1614
    0, // G_PHI = 45
1615
    0, // G_FRAME_INDEX = 46
1616
    0, // G_GLOBAL_VALUE = 47
1617
    0, // G_EXTRACT = 48
1618
    0, // G_UNMERGE_VALUES = 49
1619
    0, // G_INSERT = 50
1620
    0, // G_MERGE_VALUES = 51
1621
    0, // G_BUILD_VECTOR = 52
1622
    0, // G_BUILD_VECTOR_TRUNC = 53
1623
    0, // G_CONCAT_VECTORS = 54
1624
    0, // G_PTRTOINT = 55
1625
    0, // G_INTTOPTR = 56
1626
    0, // G_BITCAST = 57
1627
    0, // G_INTRINSIC_TRUNC = 58
1628
    0, // G_INTRINSIC_ROUND = 59
1629
    0, // G_LOAD = 60
1630
    0, // G_SEXTLOAD = 61
1631
    0, // G_ZEXTLOAD = 62
1632
    0, // G_STORE = 63
1633
    0, // G_ATOMIC_CMPXCHG_WITH_SUCCESS = 64
1634
    0, // G_ATOMIC_CMPXCHG = 65
1635
    0, // G_ATOMICRMW_XCHG = 66
1636
    0, // G_ATOMICRMW_ADD = 67
1637
    0, // G_ATOMICRMW_SUB = 68
1638
    0, // G_ATOMICRMW_AND = 69
1639
    0, // G_ATOMICRMW_NAND = 70
1640
    0, // G_ATOMICRMW_OR = 71
1641
    0, // G_ATOMICRMW_XOR = 72
1642
    0, // G_ATOMICRMW_MAX = 73
1643
    0, // G_ATOMICRMW_MIN = 74
1644
    0, // G_ATOMICRMW_UMAX = 75
1645
    0, // G_ATOMICRMW_UMIN = 76
1646
    0, // G_BRCOND = 77
1647
    0, // G_BRINDIRECT = 78
1648
    0, // G_INTRINSIC = 79
1649
    0, // G_INTRINSIC_W_SIDE_EFFECTS = 80
1650
    0, // G_ANYEXT = 81
1651
    0, // G_TRUNC = 82
1652
    0, // G_CONSTANT = 83
1653
    0, // G_FCONSTANT = 84
1654
    0, // G_VASTART = 85
1655
    0, // G_VAARG = 86
1656
    0, // G_SEXT = 87
1657
    0, // G_ZEXT = 88
1658
    0, // G_SHL = 89
1659
    0, // G_LSHR = 90
1660
    0, // G_ASHR = 91
1661
    0, // G_ICMP = 92
1662
    0, // G_FCMP = 93
1663
    0, // G_SELECT = 94
1664
    0, // G_UADDO = 95
1665
    0, // G_UADDE = 96
1666
    0, // G_USUBO = 97
1667
    0, // G_USUBE = 98
1668
    0, // G_SADDO = 99
1669
    0, // G_SADDE = 100
1670
    0, // G_SSUBO = 101
1671
    0, // G_SSUBE = 102
1672
    0, // G_UMULO = 103
1673
    0, // G_SMULO = 104
1674
    0, // G_UMULH = 105
1675
    0, // G_SMULH = 106
1676
    0, // G_FADD = 107
1677
    0, // G_FSUB = 108
1678
    0, // G_FMUL = 109
1679
    0, // G_FMA = 110
1680
    0, // G_FDIV = 111
1681
    0, // G_FREM = 112
1682
    0, // G_FPOW = 113
1683
    0, // G_FEXP = 114
1684
    0, // G_FEXP2 = 115
1685
    0, // G_FLOG = 116
1686
    0, // G_FLOG2 = 117
1687
    0, // G_FLOG10 = 118
1688
    0, // G_FNEG = 119
1689
    0, // G_FPEXT = 120
1690
    0, // G_FPTRUNC = 121
1691
    0, // G_FPTOSI = 122
1692
    0, // G_FPTOUI = 123
1693
    0, // G_SITOFP = 124
1694
    0, // G_UITOFP = 125
1695
    0, // G_FABS = 126
1696
    0, // G_GEP = 127
1697
    0, // G_PTR_MASK = 128
1698
    0, // G_BR = 129
1699
    0, // G_INSERT_VECTOR_ELT = 130
1700
    0, // G_EXTRACT_VECTOR_ELT = 131
1701
    0, // G_SHUFFLE_VECTOR = 132
1702
    0, // G_CTTZ = 133
1703
    0, // G_CTTZ_ZERO_UNDEF = 134
1704
    0, // G_CTLZ = 135
1705
    0, // G_CTLZ_ZERO_UNDEF = 136
1706
    0, // G_CTPOP = 137
1707
    0, // G_BSWAP = 138
1708
    0, // G_ADDRSPACE_CAST = 139
1709
    0, // G_BLOCK_ADDR = 140
1710
    0, // ADJCALLSTACKDOWN = 141
1711
    0, // ADJCALLSTACKUP = 142
1712
    0, // GETPCX = 143
1713
    0, // SELECT_CC_DFP_FCC = 144
1714
    0, // SELECT_CC_DFP_ICC = 145
1715
    0, // SELECT_CC_FP_FCC = 146
1716
    0, // SELECT_CC_FP_ICC = 147
1717
    0, // SELECT_CC_Int_FCC = 148
1718
    0, // SELECT_CC_Int_ICC = 149
1719
    0, // SELECT_CC_QFP_FCC = 150
1720
    0, // SELECT_CC_QFP_ICC = 151
1721
    0, // SET = 152
1722
    0, // ADDCCri = 153
1723
    0, // ADDCCrr = 154
1724
    0, // ADDCri = 155
1725
    0, // ADDCrr = 156
1726
    0, // ADDEri = 157
1727
    0, // ADDErr = 158
1728
    Feature_HasVIS3 | 0, // ADDXC = 159
1729
    Feature_HasVIS3 | 0, // ADDXCCC = 160
1730
    0, // ADDXri = 161
1731
    0, // ADDXrr = 162
1732
    0, // ADDri = 163
1733
    0, // ADDrr = 164
1734
    Feature_HasVIS | 0, // ALIGNADDR = 165
1735
    Feature_HasVIS | 0, // ALIGNADDRL = 166
1736
    0, // ANDCCri = 167
1737
    0, // ANDCCrr = 168
1738
    0, // ANDNCCri = 169
1739
    0, // ANDNCCrr = 170
1740
    0, // ANDNri = 171
1741
    0, // ANDNrr = 172
1742
    0, // ANDXNrr = 173
1743
    0, // ANDXri = 174
1744
    0, // ANDXrr = 175
1745
    0, // ANDri = 176
1746
    0, // ANDrr = 177
1747
    Feature_HasVIS | 0, // ARRAY16 = 178
1748
    Feature_HasVIS | 0, // ARRAY32 = 179
1749
    Feature_HasVIS | 0, // ARRAY8 = 180
1750
    0, // BA = 181
1751
    0, // BCOND = 182
1752
    0, // BCONDA = 183
1753
    0, // BINDri = 184
1754
    0, // BINDrr = 185
1755
    Feature_HasVIS2 | 0, // BMASK = 186
1756
    Feature_HasV9 | 0, // BPFCC = 187
1757
    Feature_HasV9 | 0, // BPFCCA = 188
1758
    Feature_HasV9 | 0, // BPFCCANT = 189
1759
    Feature_HasV9 | 0, // BPFCCNT = 190
1760
    0, // BPGEZapn = 191
1761
    0, // BPGEZapt = 192
1762
    0, // BPGEZnapn = 193
1763
    0, // BPGEZnapt = 194
1764
    0, // BPGZapn = 195
1765
    0, // BPGZapt = 196
1766
    0, // BPGZnapn = 197
1767
    0, // BPGZnapt = 198
1768
    Feature_HasV9 | 0, // BPICC = 199
1769
    Feature_HasV9 | 0, // BPICCA = 200
1770
    Feature_HasV9 | 0, // BPICCANT = 201
1771
    Feature_HasV9 | 0, // BPICCNT = 202
1772
    0, // BPLEZapn = 203
1773
    0, // BPLEZapt = 204
1774
    0, // BPLEZnapn = 205
1775
    0, // BPLEZnapt = 206
1776
    0, // BPLZapn = 207
1777
    0, // BPLZapt = 208
1778
    0, // BPLZnapn = 209
1779
    0, // BPLZnapt = 210
1780
    0, // BPNZapn = 211
1781
    0, // BPNZapt = 212
1782
    0, // BPNZnapn = 213
1783
    0, // BPNZnapt = 214
1784
    0, // BPXCC = 215
1785
    0, // BPXCCA = 216
1786
    0, // BPXCCANT = 217
1787
    0, // BPXCCNT = 218
1788
    0, // BPZapn = 219
1789
    0, // BPZapt = 220
1790
    0, // BPZnapn = 221
1791
    0, // BPZnapt = 222
1792
    Feature_HasVIS2 | 0, // BSHUFFLE = 223
1793
    0, // CALL = 224
1794
    0, // CALLri = 225
1795
    0, // CALLrr = 226
1796
    0, // CASAasi10 = 227
1797
    0, // CASArr = 228
1798
    0, // CASXrr = 229
1799
    Feature_HasV9 | 0, // CASrr = 230
1800
    0, // CBCOND = 231
1801
    0, // CBCONDA = 232
1802
    Feature_HasVIS3 | 0, // CMASK16 = 233
1803
    Feature_HasVIS3 | 0, // CMASK32 = 234
1804
    Feature_HasVIS3 | 0, // CMASK8 = 235
1805
    0, // CMPri = 236
1806
    0, // CMPrr = 237
1807
    Feature_HasVIS | 0, // EDGE16 = 238
1808
    Feature_HasVIS | 0, // EDGE16L = 239
1809
    Feature_HasVIS2 | 0, // EDGE16LN = 240
1810
    Feature_HasVIS2 | 0, // EDGE16N = 241
1811
    Feature_HasVIS | 0, // EDGE32 = 242
1812
    Feature_HasVIS | 0, // EDGE32L = 243
1813
    Feature_HasVIS2 | 0, // EDGE32LN = 244
1814
    Feature_HasVIS2 | 0, // EDGE32N = 245
1815
    Feature_HasVIS | 0, // EDGE8 = 246
1816
    Feature_HasVIS | 0, // EDGE8L = 247
1817
    Feature_HasVIS2 | 0, // EDGE8LN = 248
1818
    Feature_HasVIS2 | 0, // EDGE8N = 249
1819
    Feature_HasV9 | 0, // FABSD = 250
1820
    Feature_HasV9 | 0, // FABSQ = 251
1821
    0, // FABSS = 252
1822
    0, // FADDD = 253
1823
    0, // FADDQ = 254
1824
    0, // FADDS = 255
1825
    Feature_HasVIS | 0, // FALIGNADATA = 256
1826
    Feature_HasVIS | 0, // FAND = 257
1827
    Feature_HasVIS | 0, // FANDNOT1 = 258
1828
    Feature_HasVIS | 0, // FANDNOT1S = 259
1829
    Feature_HasVIS | 0, // FANDNOT2 = 260
1830
    Feature_HasVIS | 0, // FANDNOT2S = 261
1831
    Feature_HasVIS | 0, // FANDS = 262
1832
    0, // FBCOND = 263
1833
    0, // FBCONDA = 264
1834
    Feature_HasVIS3 | 0, // FCHKSM16 = 265
1835
    0, // FCMPD = 266
1836
    Feature_HasVIS | 0, // FCMPEQ16 = 267
1837
    Feature_HasVIS | 0, // FCMPEQ32 = 268
1838
    Feature_HasVIS | 0, // FCMPGT16 = 269
1839
    Feature_HasVIS | 0, // FCMPGT32 = 270
1840
    Feature_HasVIS | 0, // FCMPLE16 = 271
1841
    Feature_HasVIS | 0, // FCMPLE32 = 272
1842
    Feature_HasVIS | 0, // FCMPNE16 = 273
1843
    Feature_HasVIS | 0, // FCMPNE32 = 274
1844
    0, // FCMPQ = 275
1845
    0, // FCMPS = 276
1846
    0, // FDIVD = 277
1847
    0, // FDIVQ = 278
1848
    0, // FDIVS = 279
1849
    0, // FDMULQ = 280
1850
    0, // FDTOI = 281
1851
    0, // FDTOQ = 282
1852
    0, // FDTOS = 283
1853
    0, // FDTOX = 284
1854
    Feature_HasVIS | 0, // FEXPAND = 285
1855
    Feature_HasVIS3 | 0, // FHADDD = 286
1856
    Feature_HasVIS3 | 0, // FHADDS = 287
1857
    Feature_HasVIS3 | 0, // FHSUBD = 288
1858
    Feature_HasVIS3 | 0, // FHSUBS = 289
1859
    0, // FITOD = 290
1860
    0, // FITOQ = 291
1861
    0, // FITOS = 292
1862
    Feature_HasVIS3 | 0, // FLCMPD = 293
1863
    Feature_HasVIS3 | 0, // FLCMPS = 294
1864
    0, // FLUSH = 295
1865
    Feature_HasV9 | 0, // FLUSHW = 296
1866
    0, // FLUSHri = 297
1867
    0, // FLUSHrr = 298
1868
    Feature_HasVIS3 | 0, // FMEAN16 = 299
1869
    Feature_HasV9 | 0, // FMOVD = 300
1870
    Feature_HasV9 | 0, // FMOVD_FCC = 301
1871
    Feature_HasV9 | 0, // FMOVD_ICC = 302
1872
    0, // FMOVD_XCC = 303
1873
    Feature_HasV9 | 0, // FMOVQ = 304
1874
    Feature_HasV9 | 0, // FMOVQ_FCC = 305
1875
    Feature_HasV9 | 0, // FMOVQ_ICC = 306
1876
    0, // FMOVQ_XCC = 307
1877
    Feature_HasV9 | 0, // FMOVRGEZD = 308
1878
    Feature_HasV9 | 0, // FMOVRGEZQ = 309
1879
    Feature_HasV9 | 0, // FMOVRGEZS = 310
1880
    Feature_HasV9 | 0, // FMOVRGZD = 311
1881
    Feature_HasV9 | 0, // FMOVRGZQ = 312
1882
    Feature_HasV9 | 0, // FMOVRGZS = 313
1883
    Feature_HasV9 | 0, // FMOVRLEZD = 314
1884
    Feature_HasV9 | 0, // FMOVRLEZQ = 315
1885
    Feature_HasV9 | 0, // FMOVRLEZS = 316
1886
    Feature_HasV9 | 0, // FMOVRLZD = 317
1887
    Feature_HasV9 | 0, // FMOVRLZQ = 318
1888
    Feature_HasV9 | 0, // FMOVRLZS = 319
1889
    Feature_HasV9 | 0, // FMOVRNZD = 320
1890
    Feature_HasV9 | 0, // FMOVRNZQ = 321
1891
    Feature_HasV9 | 0, // FMOVRNZS = 322
1892
    Feature_HasV9 | 0, // FMOVRZD = 323
1893
    Feature_HasV9 | 0, // FMOVRZQ = 324
1894
    Feature_HasV9 | 0, // FMOVRZS = 325
1895
    0, // FMOVS = 326
1896
    Feature_HasV9 | 0, // FMOVS_FCC = 327
1897
    Feature_HasV9 | 0, // FMOVS_ICC = 328
1898
    0, // FMOVS_XCC = 329
1899
    Feature_HasVIS | 0, // FMUL8SUX16 = 330
1900
    Feature_HasVIS | 0, // FMUL8ULX16 = 331
1901
    Feature_HasVIS | 0, // FMUL8X16 = 332
1902
    Feature_HasVIS | 0, // FMUL8X16AL = 333
1903
    Feature_HasVIS | 0, // FMUL8X16AU = 334
1904
    0, // FMULD = 335
1905
    Feature_HasVIS | 0, // FMULD8SUX16 = 336
1906
    Feature_HasVIS | 0, // FMULD8ULX16 = 337
1907
    0, // FMULQ = 338
1908
    0, // FMULS = 339
1909
    Feature_HasVIS3 | 0, // FNADDD = 340
1910
    Feature_HasVIS3 | 0, // FNADDS = 341
1911
    Feature_HasVIS | 0, // FNAND = 342
1912
    Feature_HasVIS | 0, // FNANDS = 343
1913
    Feature_HasV9 | 0, // FNEGD = 344
1914
    Feature_HasV9 | 0, // FNEGQ = 345
1915
    0, // FNEGS = 346
1916
    Feature_HasVIS3 | 0, // FNHADDD = 347
1917
    Feature_HasVIS3 | 0, // FNHADDS = 348
1918
    Feature_HasVIS3 | 0, // FNMULD = 349
1919
    Feature_HasVIS3 | 0, // FNMULS = 350
1920
    Feature_HasVIS | 0, // FNOR = 351
1921
    Feature_HasVIS | 0, // FNORS = 352
1922
    Feature_HasVIS | 0, // FNOT1 = 353
1923
    Feature_HasVIS | 0, // FNOT1S = 354
1924
    Feature_HasVIS | 0, // FNOT2 = 355
1925
    Feature_HasVIS | 0, // FNOT2S = 356
1926
    Feature_HasVIS3 | 0, // FNSMULD = 357
1927
    Feature_HasVIS | 0, // FONE = 358
1928
    Feature_HasVIS | 0, // FONES = 359
1929
    Feature_HasVIS | 0, // FOR = 360
1930
    Feature_HasVIS | 0, // FORNOT1 = 361
1931
    Feature_HasVIS | 0, // FORNOT1S = 362
1932
    Feature_HasVIS | 0, // FORNOT2 = 363
1933
    Feature_HasVIS | 0, // FORNOT2S = 364
1934
    Feature_HasVIS | 0, // FORS = 365
1935
    Feature_HasVIS | 0, // FPACK16 = 366
1936
    Feature_HasVIS | 0, // FPACK32 = 367
1937
    Feature_HasVIS | 0, // FPACKFIX = 368
1938
    Feature_HasVIS | 0, // FPADD16 = 369
1939
    Feature_HasVIS | 0, // FPADD16S = 370
1940
    Feature_HasVIS | 0, // FPADD32 = 371
1941
    Feature_HasVIS | 0, // FPADD32S = 372
1942
    Feature_HasVIS3 | 0, // FPADD64 = 373
1943
    Feature_HasVIS | 0, // FPMERGE = 374
1944
    Feature_HasVIS | 0, // FPSUB16 = 375
1945
    Feature_HasVIS | 0, // FPSUB16S = 376
1946
    Feature_HasVIS | 0, // FPSUB32 = 377
1947
    Feature_HasVIS | 0, // FPSUB32S = 378
1948
    0, // FQTOD = 379
1949
    0, // FQTOI = 380
1950
    0, // FQTOS = 381
1951
    0, // FQTOX = 382
1952
    Feature_HasVIS3 | 0, // FSLAS16 = 383
1953
    Feature_HasVIS3 | 0, // FSLAS32 = 384
1954
    Feature_HasVIS3 | 0, // FSLL16 = 385
1955
    Feature_HasVIS3 | 0, // FSLL32 = 386
1956
    0, // FSMULD = 387
1957
    0, // FSQRTD = 388
1958
    0, // FSQRTQ = 389
1959
    0, // FSQRTS = 390
1960
    Feature_HasVIS3 | 0, // FSRA16 = 391
1961
    Feature_HasVIS3 | 0, // FSRA32 = 392
1962
    Feature_HasVIS | 0, // FSRC1 = 393
1963
    Feature_HasVIS | 0, // FSRC1S = 394
1964
    Feature_HasVIS | 0, // FSRC2 = 395
1965
    Feature_HasVIS | 0, // FSRC2S = 396
1966
    Feature_HasVIS3 | 0, // FSRL16 = 397
1967
    Feature_HasVIS3 | 0, // FSRL32 = 398
1968
    0, // FSTOD = 399
1969
    0, // FSTOI = 400
1970
    0, // FSTOQ = 401
1971
    0, // FSTOX = 402
1972
    0, // FSUBD = 403
1973
    0, // FSUBQ = 404
1974
    0, // FSUBS = 405
1975
    Feature_HasVIS | 0, // FXNOR = 406
1976
    Feature_HasVIS | 0, // FXNORS = 407
1977
    Feature_HasVIS | 0, // FXOR = 408
1978
    Feature_HasVIS | 0, // FXORS = 409
1979
    0, // FXTOD = 410
1980
    0, // FXTOQ = 411
1981
    0, // FXTOS = 412
1982
    Feature_HasVIS | 0, // FZERO = 413
1983
    Feature_HasVIS | 0, // FZEROS = 414
1984
    0, // JMPLri = 415
1985
    0, // JMPLrr = 416
1986
    0, // LDArr = 417
1987
    0, // LDCSRri = 418
1988
    0, // LDCSRrr = 419
1989
    0, // LDCri = 420
1990
    0, // LDCrr = 421
1991
    0, // LDDArr = 422
1992
    0, // LDDCri = 423
1993
    0, // LDDCrr = 424
1994
    Feature_HasV9 | 0, // LDDFArr = 425
1995
    0, // LDDFri = 426
1996
    0, // LDDFrr = 427
1997
    0, // LDDri = 428
1998
    0, // LDDrr = 429
1999
    Feature_HasV9 | 0, // LDFArr = 430
2000
    0, // LDFSRri = 431
2001
    0, // LDFSRrr = 432
2002
    0, // LDFri = 433
2003
    0, // LDFrr = 434
2004
    Feature_HasV9 | 0, // LDQFArr = 435
2005
    Feature_HasV9 | 0, // LDQFri = 436
2006
    Feature_HasV9 | 0, // LDQFrr = 437
2007
    0, // LDSBArr = 438
2008
    0, // LDSBri = 439
2009
    0, // LDSBrr = 440
2010
    0, // LDSHArr = 441
2011
    0, // LDSHri = 442
2012
    0, // LDSHrr = 443
2013
    0, // LDSTUBArr = 444
2014
    0, // LDSTUBri = 445
2015
    0, // LDSTUBrr = 446
2016
    0, // LDSWri = 447
2017
    0, // LDSWrr = 448
2018
    0, // LDUBArr = 449
2019
    0, // LDUBri = 450
2020
    0, // LDUBrr = 451
2021
    0, // LDUHArr = 452
2022
    0, // LDUHri = 453
2023
    0, // LDUHrr = 454
2024
    Feature_HasV9 | 0, // LDXFSRri = 455
2025
    Feature_HasV9 | 0, // LDXFSRrr = 456
2026
    0, // LDXri = 457
2027
    0, // LDXrr = 458
2028
    0, // LDri = 459
2029
    0, // LDrr = 460
2030
    0, // LEAX_ADDri = 461
2031
    0, // LEA_ADDri = 462
2032
    Feature_HasVIS3 | 0, // LZCNT = 463
2033
    Feature_HasV9 | 0, // MEMBARi = 464
2034
    Feature_HasVIS3 | 0, // MOVDTOX = 465
2035
    Feature_HasV9 | 0, // MOVFCCri = 466
2036
    Feature_HasV9 | 0, // MOVFCCrr = 467
2037
    Feature_HasV9 | 0, // MOVICCri = 468
2038
    Feature_HasV9 | 0, // MOVICCrr = 469
2039
    0, // MOVRGEZri = 470
2040
    0, // MOVRGEZrr = 471
2041
    0, // MOVRGZri = 472
2042
    0, // MOVRGZrr = 473
2043
    0, // MOVRLEZri = 474
2044
    0, // MOVRLEZrr = 475
2045
    0, // MOVRLZri = 476
2046
    0, // MOVRLZrr = 477
2047
    0, // MOVRNZri = 478
2048
    0, // MOVRNZrr = 479
2049
    0, // MOVRRZri = 480
2050
    0, // MOVRRZrr = 481
2051
    Feature_HasVIS3 | 0, // MOVSTOSW = 482
2052
    Feature_HasVIS3 | 0, // MOVSTOUW = 483
2053
    Feature_HasVIS3 | 0, // MOVWTOS = 484
2054
    0, // MOVXCCri = 485
2055
    0, // MOVXCCrr = 486
2056
    Feature_HasVIS3 | 0, // MOVXTOD = 487
2057
    0, // MULSCCri = 488
2058
    0, // MULSCCrr = 489
2059
    0, // MULXri = 490
2060
    0, // MULXrr = 491
2061
    0, // NOP = 492
2062
    0, // ORCCri = 493
2063
    0, // ORCCrr = 494
2064
    0, // ORNCCri = 495
2065
    0, // ORNCCrr = 496
2066
    0, // ORNri = 497
2067
    0, // ORNrr = 498
2068
    0, // ORXNrr = 499
2069
    0, // ORXri = 500
2070
    0, // ORXrr = 501
2071
    0, // ORri = 502
2072
    0, // ORrr = 503
2073
    Feature_HasVIS | 0, // PDIST = 504
2074
    Feature_HasVIS3 | 0, // PDISTN = 505
2075
    Feature_HasV9 | 0, // POPCrr = 506
2076
    Feature_HasPWRPSR | 0, // PWRPSRri = 507
2077
    Feature_HasPWRPSR | 0, // PWRPSRrr = 508
2078
    0, // RDASR = 509
2079
    Feature_HasV9 | 0, // RDPR = 510
2080
    0, // RDPSR = 511
2081
    0, // RDTBR = 512
2082
    0, // RDWIM = 513
2083
    0, // RESTOREri = 514
2084
    0, // RESTORErr = 515
2085
    0, // RET = 516
2086
    0, // RETL = 517
2087
    0, // RETTri = 518
2088
    0, // RETTrr = 519
2089
    0, // SAVEri = 520
2090
    0, // SAVErr = 521
2091
    0, // SDIVCCri = 522
2092
    0, // SDIVCCrr = 523
2093
    0, // SDIVXri = 524
2094
    0, // SDIVXrr = 525
2095
    0, // SDIVri = 526
2096
    0, // SDIVrr = 527
2097
    0, // SETHIXi = 528
2098
    0, // SETHIi = 529
2099
    Feature_HasVIS | 0, // SHUTDOWN = 530
2100
    Feature_HasVIS2 | 0, // SIAM = 531
2101
    0, // SLLXri = 532
2102
    0, // SLLXrr = 533
2103
    0, // SLLri = 534
2104
    0, // SLLrr = 535
2105
    0, // SMACri = 536
2106
    0, // SMACrr = 537
2107
    0, // SMULCCri = 538
2108
    0, // SMULCCrr = 539
2109
    0, // SMULri = 540
2110
    0, // SMULrr = 541
2111
    0, // SRAXri = 542
2112
    0, // SRAXrr = 543
2113
    0, // SRAri = 544
2114
    0, // SRArr = 545
2115
    0, // SRLXri = 546
2116
    0, // SRLXrr = 547
2117
    0, // SRLri = 548
2118
    0, // SRLrr = 549
2119
    0, // STArr = 550
2120
    0, // STBAR = 551
2121
    0, // STBArr = 552
2122
    0, // STBri = 553
2123
    0, // STBrr = 554
2124
    0, // STCSRri = 555
2125
    0, // STCSRrr = 556
2126
    0, // STCri = 557
2127
    0, // STCrr = 558
2128
    0, // STDArr = 559
2129
    0, // STDCQri = 560
2130
    0, // STDCQrr = 561
2131
    0, // STDCri = 562
2132
    0, // STDCrr = 563
2133
    Feature_HasV9 | 0, // STDFArr = 564
2134
    0, // STDFQri = 565
2135
    0, // STDFQrr = 566
2136
    0, // STDFri = 567
2137
    0, // STDFrr = 568
2138
    0, // STDri = 569
2139
    0, // STDrr = 570
2140
    Feature_HasV9 | 0, // STFArr = 571
2141
    0, // STFSRri = 572
2142
    0, // STFSRrr = 573
2143
    0, // STFri = 574
2144
    0, // STFrr = 575
2145
    0, // STHArr = 576
2146
    0, // STHri = 577
2147
    0, // STHrr = 578
2148
    Feature_HasV9 | 0, // STQFArr = 579
2149
    Feature_HasV9 | 0, // STQFri = 580
2150
    Feature_HasV9 | 0, // STQFrr = 581
2151
    Feature_HasV9 | 0, // STXFSRri = 582
2152
    Feature_HasV9 | 0, // STXFSRrr = 583
2153
    0, // STXri = 584
2154
    0, // STXrr = 585
2155
    0, // STri = 586
2156
    0, // STrr = 587
2157
    0, // SUBCCri = 588
2158
    0, // SUBCCrr = 589
2159
    0, // SUBCri = 590
2160
    0, // SUBCrr = 591
2161
    0, // SUBEri = 592
2162
    0, // SUBErr = 593
2163
    0, // SUBXri = 594
2164
    0, // SUBXrr = 595
2165
    0, // SUBri = 596
2166
    0, // SUBrr = 597
2167
    0, // SWAPArr = 598
2168
    0, // SWAPri = 599
2169
    0, // SWAPrr = 600
2170
    0, // TA1 = 601
2171
    0, // TA3 = 602
2172
    0, // TA5 = 603
2173
    0, // TADDCCTVri = 604
2174
    0, // TADDCCTVrr = 605
2175
    0, // TADDCCri = 606
2176
    0, // TADDCCrr = 607
2177
    Feature_HasV9 | 0, // TICCri = 608
2178
    Feature_HasV9 | 0, // TICCrr = 609
2179
    0, // TLS_ADDXrr = 610
2180
    0, // TLS_ADDrr = 611
2181
    0, // TLS_CALL = 612
2182
    0, // TLS_LDXrr = 613
2183
    0, // TLS_LDrr = 614
2184
    0, // TRAPri = 615
2185
    0, // TRAPrr = 616
2186
    0, // TSUBCCTVri = 617
2187
    0, // TSUBCCTVrr = 618
2188
    0, // TSUBCCri = 619
2189
    0, // TSUBCCrr = 620
2190
    0, // TXCCri = 621
2191
    0, // TXCCrr = 622
2192
    0, // UDIVCCri = 623
2193
    0, // UDIVCCrr = 624
2194
    0, // UDIVXri = 625
2195
    0, // UDIVXrr = 626
2196
    0, // UDIVri = 627
2197
    0, // UDIVrr = 628
2198
    0, // UMACri = 629
2199
    0, // UMACrr = 630
2200
    0, // UMULCCri = 631
2201
    0, // UMULCCrr = 632
2202
    Feature_HasVIS3 | 0, // UMULXHI = 633
2203
    0, // UMULri = 634
2204
    0, // UMULrr = 635
2205
    0, // UNIMP = 636
2206
    0, // V9FCMPD = 637
2207
    0, // V9FCMPED = 638
2208
    0, // V9FCMPEQ = 639
2209
    0, // V9FCMPES = 640
2210
    0, // V9FCMPQ = 641
2211
    0, // V9FCMPS = 642
2212
    Feature_HasV9 | 0, // V9FMOVD_FCC = 643
2213
    Feature_HasV9 | 0, // V9FMOVQ_FCC = 644
2214
    Feature_HasV9 | 0, // V9FMOVS_FCC = 645
2215
    Feature_HasV9 | 0, // V9MOVFCCri = 646
2216
    Feature_HasV9 | 0, // V9MOVFCCrr = 647
2217
    0, // WRASRri = 648
2218
    0, // WRASRrr = 649
2219
    Feature_HasV9 | 0, // WRPRri = 650
2220
    Feature_HasV9 | 0, // WRPRrr = 651
2221
    0, // WRPSRri = 652
2222
    0, // WRPSRrr = 653
2223
    0, // WRTBRri = 654
2224
    0, // WRTBRrr = 655
2225
    0, // WRWIMri = 656
2226
    0, // WRWIMrr = 657
2227
    Feature_HasVIS3 | 0, // XMULX = 658
2228
    Feature_HasVIS3 | 0, // XMULXHI = 659
2229
    0, // XNORCCri = 660
2230
    0, // XNORCCrr = 661
2231
    0, // XNORXrr = 662
2232
    0, // XNORri = 663
2233
    0, // XNORrr = 664
2234
    0, // XORCCri = 665
2235
    0, // XORCCrr = 666
2236
    0, // XORXri = 667
2237
    0, // XORXrr = 668
2238
    0, // XORri = 669
2239
    0, // XORrr = 670
2240
  };
2241
2242
  assert(Inst.getOpcode() < 671);
2243
  uint64_t MissingFeatures =
2244
      (AvailableFeatures & RequiredFeatures[Inst.getOpcode()]) ^
2245
      RequiredFeatures[Inst.getOpcode()];
2246
  if (MissingFeatures) {
2247
    std::ostringstream Msg;
2248
    Msg << "Attempting to emit " << MCII.getName(Inst.getOpcode()).str()
2249
        << " instruction but the ";
2250
    for (unsigned i = 0; i < 8 * sizeof(MissingFeatures); ++i)
2251
      if (MissingFeatures & (1ULL << i))
2252
        Msg << SubtargetFeatureNames[i] << " ";
2253
    Msg << "predicate(s) are not met";
2254
    report_fatal_error(Msg.str());
2255
  }
2256
#else
2257
// Silence unused variable warning on targets that don't use MCII for other purposes (e.g. BPF).
2258
1.99k
(void)MCII;
2259
1.99k
#endif // NDEBUG
2260
1.99k
}
2261
#endif