Coverage Report

Created: 2018-09-25 17:16

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/clang-build/lib/Target/Sparc/SparcGenMCCodeEmitter.inc
Line
Count
Source (jump to first uncovered line)
1
/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2
|*                                                                            *|
3
|* Machine Code Emitter                                                       *|
4
|*                                                                            *|
5
|* Automatically generated file, do not edit!                                 *|
6
|*                                                                            *|
7
\*===----------------------------------------------------------------------===*/
8
9
uint64_t SparcMCCodeEmitter::getBinaryCodeForInstr(const MCInst &MI,
10
    SmallVectorImpl<MCFixup> &Fixups,
11
1.98k
    const MCSubtargetInfo &STI) const {
12
1.98k
  static const uint64_t InstBits[] = {
13
1.98k
    UINT64_C(0),
14
1.98k
    UINT64_C(0),
15
1.98k
    UINT64_C(0),
16
1.98k
    UINT64_C(0),
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    UINT64_C(0),
18
1.98k
    UINT64_C(0),
19
1.98k
    UINT64_C(0),
20
1.98k
    UINT64_C(0),
21
1.98k
    UINT64_C(0),
22
1.98k
    UINT64_C(0),
23
1.98k
    UINT64_C(0),
24
1.98k
    UINT64_C(0),
25
1.98k
    UINT64_C(0),
26
1.98k
    UINT64_C(0),
27
1.98k
    UINT64_C(0),
28
1.98k
    UINT64_C(0),
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    UINT64_C(0),
30
1.98k
    UINT64_C(0),
31
1.98k
    UINT64_C(0),
32
1.98k
    UINT64_C(0),
33
1.98k
    UINT64_C(0),
34
1.98k
    UINT64_C(0),
35
1.98k
    UINT64_C(0),
36
1.98k
    UINT64_C(0),
37
1.98k
    UINT64_C(0),
38
1.98k
    UINT64_C(0),
39
1.98k
    UINT64_C(0),
40
1.98k
    UINT64_C(0),
41
1.98k
    UINT64_C(0),
42
1.98k
    UINT64_C(0),
43
1.98k
    UINT64_C(0),
44
1.98k
    UINT64_C(0),
45
1.98k
    UINT64_C(0),
46
1.98k
    UINT64_C(0),
47
1.98k
    UINT64_C(0),
48
1.98k
    UINT64_C(0),
49
1.98k
    UINT64_C(0),
50
1.98k
    UINT64_C(0),
51
1.98k
    UINT64_C(0),
52
1.98k
    UINT64_C(0),
53
1.98k
    UINT64_C(0),
54
1.98k
    UINT64_C(0),
55
1.98k
    UINT64_C(0),
56
1.98k
    UINT64_C(0),
57
1.98k
    UINT64_C(0),
58
1.98k
    UINT64_C(0),
59
1.98k
    UINT64_C(0),
60
1.98k
    UINT64_C(0),
61
1.98k
    UINT64_C(0),
62
1.98k
    UINT64_C(0),
63
1.98k
    UINT64_C(0),
64
1.98k
    UINT64_C(0),
65
1.98k
    UINT64_C(0),
66
1.98k
    UINT64_C(0),
67
1.98k
    UINT64_C(0),
68
1.98k
    UINT64_C(0),
69
1.98k
    UINT64_C(0),
70
1.98k
    UINT64_C(0),
71
1.98k
    UINT64_C(0),
72
1.98k
    UINT64_C(0),
73
1.98k
    UINT64_C(0),
74
1.98k
    UINT64_C(0),
75
1.98k
    UINT64_C(0),
76
1.98k
    UINT64_C(0),
77
1.98k
    UINT64_C(0),
78
1.98k
    UINT64_C(0),
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    UINT64_C(0),
80
1.98k
    UINT64_C(0),
81
1.98k
    UINT64_C(0),
82
1.98k
    UINT64_C(0),
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1.98k
    UINT64_C(0),
84
1.98k
    UINT64_C(0),
85
1.98k
    UINT64_C(0),
86
1.98k
    UINT64_C(0),
87
1.98k
    UINT64_C(0),
88
1.98k
    UINT64_C(0),
89
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    UINT64_C(0),
90
1.98k
    UINT64_C(0),
91
1.98k
    UINT64_C(0),
92
1.98k
    UINT64_C(0),
93
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    UINT64_C(0),
94
1.98k
    UINT64_C(0),
95
1.98k
    UINT64_C(0),
96
1.98k
    UINT64_C(0),
97
1.98k
    UINT64_C(0),
98
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    UINT64_C(0),
99
1.98k
    UINT64_C(0),
100
1.98k
    UINT64_C(0),
101
1.98k
    UINT64_C(0),
102
1.98k
    UINT64_C(0),
103
1.98k
    UINT64_C(0),
104
1.98k
    UINT64_C(0),
105
1.98k
    UINT64_C(0),
106
1.98k
    UINT64_C(0),
107
1.98k
    UINT64_C(0),
108
1.98k
    UINT64_C(0),
109
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    UINT64_C(0),
110
1.98k
    UINT64_C(0),
111
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    UINT64_C(0),
112
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    UINT64_C(0),
113
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    UINT64_C(0),
114
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    UINT64_C(0),
115
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    UINT64_C(0),
116
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    UINT64_C(0),
117
1.98k
    UINT64_C(0),
118
1.98k
    UINT64_C(0),
119
1.98k
    UINT64_C(0),
120
1.98k
    UINT64_C(0),
121
1.98k
    UINT64_C(0),
122
1.98k
    UINT64_C(0),
123
1.98k
    UINT64_C(0),
124
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    UINT64_C(0),
125
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    UINT64_C(0),
126
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    UINT64_C(0),
127
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    UINT64_C(0),
128
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    UINT64_C(0),
129
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    UINT64_C(0),
130
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    UINT64_C(0),
131
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    UINT64_C(0),
132
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    UINT64_C(0),
133
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    UINT64_C(0),
134
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    UINT64_C(0),
135
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    UINT64_C(0),
136
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    UINT64_C(0),
137
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    UINT64_C(0),
138
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    UINT64_C(0),
139
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    UINT64_C(0),
140
1.98k
    UINT64_C(0),
141
1.98k
    UINT64_C(0),
142
1.98k
    UINT64_C(0),
143
1.98k
    UINT64_C(0),
144
1.98k
    UINT64_C(0),
145
1.98k
    UINT64_C(0),
146
1.98k
    UINT64_C(0),
147
1.98k
    UINT64_C(0),
148
1.98k
    UINT64_C(0),
149
1.98k
    UINT64_C(0),
150
1.98k
    UINT64_C(0),
151
1.98k
    UINT64_C(0),
152
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    UINT64_C(0),
153
1.98k
    UINT64_C(0),
154
1.98k
    UINT64_C(0),
155
1.98k
    UINT64_C(0),
156
1.98k
    UINT64_C(0),
157
1.98k
    UINT64_C(0),
158
1.98k
    UINT64_C(0),
159
1.98k
    UINT64_C(0),
160
1.98k
    UINT64_C(0),
161
1.98k
    UINT64_C(0),
162
1.98k
    UINT64_C(0),
163
1.98k
    UINT64_C(0),
164
1.98k
    UINT64_C(0),
165
1.98k
    UINT64_C(0),
166
1.98k
    UINT64_C(2155880448), // ADDCCri
167
1.98k
    UINT64_C(2155872256), // ADDCCrr
168
1.98k
    UINT64_C(2151686144), // ADDCri
169
1.98k
    UINT64_C(2151677952), // ADDCrr
170
1.98k
    UINT64_C(2160074752), // ADDEri
171
1.98k
    UINT64_C(2160066560), // ADDErr
172
1.98k
    UINT64_C(2175795744), // ADDXC
173
1.98k
    UINT64_C(2175795808), // ADDXCCC
174
1.98k
    UINT64_C(2147491840), // ADDXri
175
1.98k
    UINT64_C(2147483648), // ADDXrr
176
1.98k
    UINT64_C(2147491840), // ADDri
177
1.98k
    UINT64_C(2147483648), // ADDrr
178
1.98k
    UINT64_C(2175795968), // ALIGNADDR
179
1.98k
    UINT64_C(2175796032), // ALIGNADDRL
180
1.98k
    UINT64_C(2156404736), // ANDCCri
181
1.98k
    UINT64_C(2156396544), // ANDCCrr
182
1.98k
    UINT64_C(2158501888), // ANDNCCri
183
1.98k
    UINT64_C(2158493696), // ANDNCCrr
184
1.98k
    UINT64_C(2150113280), // ANDNri
185
1.98k
    UINT64_C(2150105088), // ANDNrr
186
1.98k
    UINT64_C(2150105088), // ANDXNrr
187
1.98k
    UINT64_C(2148016128), // ANDXri
188
1.98k
    UINT64_C(2148007936), // ANDXrr
189
1.98k
    UINT64_C(2148016128), // ANDri
190
1.98k
    UINT64_C(2148007936), // ANDrr
191
1.98k
    UINT64_C(2175795776), // ARRAY16
192
1.98k
    UINT64_C(2175795840), // ARRAY32
193
1.98k
    UINT64_C(2175795712), // ARRAY8
194
1.98k
    UINT64_C(276824064),  // BA
195
1.98k
    UINT64_C(8388608),  // BCOND
196
1.98k
    UINT64_C(545259520),  // BCONDA
197
1.98k
    UINT64_C(2176851968), // BINDri
198
1.98k
    UINT64_C(2176843776), // BINDrr
199
1.98k
    UINT64_C(2175796000), // BMASK
200
1.98k
    UINT64_C(21495808), // BPFCC
201
1.98k
    UINT64_C(558366720),  // BPFCCA
202
1.98k
    UINT64_C(557842432),  // BPFCCANT
203
1.98k
    UINT64_C(20971520), // BPFCCNT
204
1.98k
    UINT64_C(784334848),  // BPGEZapn
205
1.98k
    UINT64_C(784859136),  // BPGEZapt
206
1.98k
    UINT64_C(247463936),  // BPGEZnapn
207
1.98k
    UINT64_C(247988224),  // BPGEZnapt
208
1.98k
    UINT64_C(750780416),  // BPGZapn
209
1.98k
    UINT64_C(751304704),  // BPGZapt
210
1.98k
    UINT64_C(213909504),  // BPGZnapn
211
1.98k
    UINT64_C(214433792),  // BPGZnapt
212
1.98k
    UINT64_C(4718592),  // BPICC
213
1.98k
    UINT64_C(541589504),  // BPICCA
214
1.98k
    UINT64_C(541065216),  // BPICCANT
215
1.98k
    UINT64_C(4194304),  // BPICCNT
216
1.98k
    UINT64_C(616562688),  // BPLEZapn
217
1.98k
    UINT64_C(617086976),  // BPLEZapt
218
1.98k
    UINT64_C(79691776), // BPLEZnapn
219
1.98k
    UINT64_C(80216064), // BPLEZnapt
220
1.98k
    UINT64_C(650117120),  // BPLZapn
221
1.98k
    UINT64_C(650641408),  // BPLZapt
222
1.98k
    UINT64_C(113246208),  // BPLZnapn
223
1.98k
    UINT64_C(113770496),  // BPLZnapt
224
1.98k
    UINT64_C(717225984),  // BPNZapn
225
1.98k
    UINT64_C(717750272),  // BPNZapt
226
1.98k
    UINT64_C(180355072),  // BPNZnapn
227
1.98k
    UINT64_C(180879360),  // BPNZnapt
228
1.98k
    UINT64_C(6815744),  // BPXCC
229
1.98k
    UINT64_C(543686656),  // BPXCCA
230
1.98k
    UINT64_C(543162368),  // BPXCCANT
231
1.98k
    UINT64_C(6291456),  // BPXCCNT
232
1.98k
    UINT64_C(583008256),  // BPZapn
233
1.98k
    UINT64_C(583532544),  // BPZapt
234
1.98k
    UINT64_C(46137344), // BPZnapn
235
1.98k
    UINT64_C(46661632), // BPZnapt
236
1.98k
    UINT64_C(2175796096), // BSHUFFLE
237
1.98k
    UINT64_C(1073741824), // CALL
238
1.98k
    UINT64_C(2680168448), // CALLri
239
1.98k
    UINT64_C(2680160256), // CALLrr
240
1.98k
    UINT64_C(3252683072), // CASAasi10
241
1.98k
    UINT64_C(3252682752), // CASArr
242
1.98k
    UINT64_C(3253735424), // CASXrr
243
1.98k
    UINT64_C(3252686848), // CASrr
244
1.98k
    UINT64_C(29360128), // CBCOND
245
1.98k
    UINT64_C(566231040),  // CBCONDA
246
1.98k
    UINT64_C(2175796128), // CMASK16
247
1.98k
    UINT64_C(2175796192), // CMASK32
248
1.98k
    UINT64_C(2175796064), // CMASK8
249
1.98k
    UINT64_C(2157977600), // CMPri
250
1.98k
    UINT64_C(2157969408), // CMPrr
251
1.98k
    UINT64_C(2175795328), // EDGE16
252
1.98k
    UINT64_C(2175795392), // EDGE16L
253
1.98k
    UINT64_C(2175795424), // EDGE16LN
254
1.98k
    UINT64_C(2175795360), // EDGE16N
255
1.98k
    UINT64_C(2175795456), // EDGE32
256
1.98k
    UINT64_C(2175795520), // EDGE32L
257
1.98k
    UINT64_C(2175795552), // EDGE32LN
258
1.98k
    UINT64_C(2175795488), // EDGE32N
259
1.98k
    UINT64_C(2175795200), // EDGE8
260
1.98k
    UINT64_C(2175795264), // EDGE8L
261
1.98k
    UINT64_C(2175795296), // EDGE8LN
262
1.98k
    UINT64_C(2175795232), // EDGE8N
263
1.98k
    UINT64_C(2174746944), // FABSD
264
1.98k
    UINT64_C(2174746976), // FABSQ
265
1.98k
    UINT64_C(2174746912), // FABSS
266
1.98k
    UINT64_C(2174748736), // FADDD
267
1.98k
    UINT64_C(2174748768), // FADDQ
268
1.98k
    UINT64_C(2174748704), // FADDS
269
1.98k
    UINT64_C(2175797504), // FALIGNADATA
270
1.98k
    UINT64_C(2175798784), // FAND
271
1.98k
    UINT64_C(2175798528), // FANDNOT1
272
1.98k
    UINT64_C(2175798560), // FANDNOT1S
273
1.98k
    UINT64_C(2175798400), // FANDNOT2
274
1.98k
    UINT64_C(2175798432), // FANDNOT2S
275
1.98k
    UINT64_C(2175798816), // FANDS
276
1.98k
    UINT64_C(25165824), // FBCOND
277
1.98k
    UINT64_C(562036736),  // FBCONDA
278
1.98k
    UINT64_C(2175797376), // FCHKSM16
279
1.98k
    UINT64_C(2175273536), // FCMPD
280
1.98k
    UINT64_C(2175796544), // FCMPEQ16
281
1.98k
    UINT64_C(2175796672), // FCMPEQ32
282
1.98k
    UINT64_C(2175796480), // FCMPGT16
283
1.98k
    UINT64_C(2175796608), // FCMPGT32
284
1.98k
    UINT64_C(2175796224), // FCMPLE16
285
1.98k
    UINT64_C(2175796352), // FCMPLE32
286
1.98k
    UINT64_C(2175796288), // FCMPNE16
287
1.98k
    UINT64_C(2175796416), // FCMPNE32
288
1.98k
    UINT64_C(2175273568), // FCMPQ
289
1.98k
    UINT64_C(2175273504), // FCMPS
290
1.98k
    UINT64_C(2174749120), // FDIVD
291
1.98k
    UINT64_C(2174749152), // FDIVQ
292
1.98k
    UINT64_C(2174749088), // FDIVS
293
1.98k
    UINT64_C(2174750144), // FDMULQ
294
1.98k
    UINT64_C(2174753344), // FDTOI
295
1.98k
    UINT64_C(2174753216), // FDTOQ
296
1.98k
    UINT64_C(2174752960), // FDTOS
297
1.98k
    UINT64_C(2174750784), // FDTOX
298
1.98k
    UINT64_C(2175797664), // FEXPAND
299
1.98k
    UINT64_C(2174749760), // FHADDD
300
1.98k
    UINT64_C(2174749728), // FHADDS
301
1.98k
    UINT64_C(2174749888), // FHSUBD
302
1.98k
    UINT64_C(2174749856), // FHSUBS
303
1.98k
    UINT64_C(2174753024), // FITOD
304
1.98k
    UINT64_C(2174753152), // FITOQ
305
1.98k
    UINT64_C(2174752896), // FITOS
306
1.98k
    UINT64_C(2175806016), // FLCMPD
307
1.98k
    UINT64_C(2175805984), // FLCMPS
308
1.98k
    UINT64_C(2178416640), // FLUSH
309
1.98k
    UINT64_C(2170028032), // FLUSHW
310
1.98k
    UINT64_C(2178424832), // FLUSHri
311
1.98k
    UINT64_C(2178416640), // FLUSHrr
312
1.98k
    UINT64_C(2175797248), // FMEAN16
313
1.98k
    UINT64_C(2174746688), // FMOVD
314
1.98k
    UINT64_C(2175270976), // FMOVD_FCC
315
1.98k
    UINT64_C(2175279168), // FMOVD_ICC
316
1.98k
    UINT64_C(2175283264), // FMOVD_XCC
317
1.98k
    UINT64_C(2174746720), // FMOVQ
318
1.98k
    UINT64_C(2175271008), // FMOVQ_FCC
319
1.98k
    UINT64_C(2175279200), // FMOVQ_ICC
320
1.98k
    UINT64_C(2175283296), // FMOVQ_XCC
321
1.98k
    UINT64_C(2175278272), // FMOVRGEZD
322
1.98k
    UINT64_C(2175278304), // FMOVRGEZQ
323
1.98k
    UINT64_C(2175278240), // FMOVRGEZS
324
1.98k
    UINT64_C(2175277248), // FMOVRGZD
325
1.98k
    UINT64_C(2175277280), // FMOVRGZQ
326
1.98k
    UINT64_C(2175277216), // FMOVRGZS
327
1.98k
    UINT64_C(2175273152), // FMOVRLEZD
328
1.98k
    UINT64_C(2175273184), // FMOVRLEZQ
329
1.98k
    UINT64_C(2175273120), // FMOVRLEZS
330
1.98k
    UINT64_C(2175274176), // FMOVRLZD
331
1.98k
    UINT64_C(2175274208), // FMOVRLZQ
332
1.98k
    UINT64_C(2175274144), // FMOVRLZS
333
1.98k
    UINT64_C(2175276224), // FMOVRNZD
334
1.98k
    UINT64_C(2175276256), // FMOVRNZQ
335
1.98k
    UINT64_C(2175276192), // FMOVRNZS
336
1.98k
    UINT64_C(2175272128), // FMOVRZD
337
1.98k
    UINT64_C(2175272160), // FMOVRZQ
338
1.98k
    UINT64_C(2175272096), // FMOVRZS
339
1.98k
    UINT64_C(2174746656), // FMOVS
340
1.98k
    UINT64_C(2175270944), // FMOVS_FCC
341
1.98k
    UINT64_C(2175279136), // FMOVS_ICC
342
1.98k
    UINT64_C(2175283232), // FMOVS_XCC
343
1.98k
    UINT64_C(2175796928), // FMUL8SUX16
344
1.98k
    UINT64_C(2175796960), // FMUL8ULX16
345
1.98k
    UINT64_C(2175796768), // FMUL8X16
346
1.98k
    UINT64_C(2175796896), // FMUL8X16AL
347
1.98k
    UINT64_C(2175796832), // FMUL8X16AU
348
1.98k
    UINT64_C(2174748992), // FMULD
349
1.98k
    UINT64_C(2175796992), // FMULD8SUX16
350
1.98k
    UINT64_C(2175797024), // FMULD8ULX16
351
1.98k
    UINT64_C(2174749024), // FMULQ
352
1.98k
    UINT64_C(2174748960), // FMULS
353
1.98k
    UINT64_C(2174749248), // FNADDD
354
1.98k
    UINT64_C(2174749216), // FNADDS
355
1.98k
    UINT64_C(2175798720), // FNAND
356
1.98k
    UINT64_C(2175798752), // FNANDS
357
1.98k
    UINT64_C(2174746816), // FNEGD
358
1.98k
    UINT64_C(2174746848), // FNEGQ
359
1.98k
    UINT64_C(2174746784), // FNEGS
360
1.98k
    UINT64_C(2174750272), // FNHADDD
361
1.98k
    UINT64_C(2174750240), // FNHADDS
362
1.98k
    UINT64_C(2174749504), // FNMULD
363
1.98k
    UINT64_C(2174749472), // FNMULS
364
1.98k
    UINT64_C(2175798336), // FNOR
365
1.98k
    UINT64_C(2175798368), // FNORS
366
1.98k
    UINT64_C(2175798592), // FNOT1
367
1.98k
    UINT64_C(2175798624), // FNOT1S
368
1.98k
    UINT64_C(2175798464), // FNOT2
369
1.98k
    UINT64_C(2175798496), // FNOT2S
370
1.98k
    UINT64_C(2174750496), // FNSMULD
371
1.98k
    UINT64_C(2175799232), // FONE
372
1.98k
    UINT64_C(2175799264), // FONES
373
1.98k
    UINT64_C(2175799168), // FOR
374
1.98k
    UINT64_C(2175799104), // FORNOT1
375
1.98k
    UINT64_C(2175799136), // FORNOT1S
376
1.98k
    UINT64_C(2175798976), // FORNOT2
377
1.98k
    UINT64_C(2175799008), // FORNOT2S
378
1.98k
    UINT64_C(2175799200), // FORS
379
1.98k
    UINT64_C(2175797088), // FPACK16
380
1.98k
    UINT64_C(2175797056), // FPACK32
381
1.98k
    UINT64_C(2175797152), // FPACKFIX
382
1.98k
    UINT64_C(2175797760), // FPADD16
383
1.98k
    UINT64_C(2175797792), // FPADD16S
384
1.98k
    UINT64_C(2175797824), // FPADD32
385
1.98k
    UINT64_C(2175797856), // FPADD32S
386
1.98k
    UINT64_C(2175797312), // FPADD64
387
1.98k
    UINT64_C(2175797600), // FPMERGE
388
1.98k
    UINT64_C(2175797888), // FPSUB16
389
1.98k
    UINT64_C(2175797920), // FPSUB16S
390
1.98k
    UINT64_C(2175797952), // FPSUB32
391
1.98k
    UINT64_C(2175797984), // FPSUB32S
392
1.98k
    UINT64_C(2174753120), // FQTOD
393
1.98k
    UINT64_C(2174753376), // FQTOI
394
1.98k
    UINT64_C(2174752992), // FQTOS
395
1.98k
    UINT64_C(2174750816), // FQTOX
396
1.98k
    UINT64_C(2175796512), // FSLAS16
397
1.98k
    UINT64_C(2175796640), // FSLAS32
398
1.98k
    UINT64_C(2175796256), // FSLL16
399
1.98k
    UINT64_C(2175796384), // FSLL32
400
1.98k
    UINT64_C(2174749984), // FSMULD
401
1.98k
    UINT64_C(2174747968), // FSQRTD
402
1.98k
    UINT64_C(2174748000), // FSQRTQ
403
1.98k
    UINT64_C(2174747936), // FSQRTS
404
1.98k
    UINT64_C(2175796576), // FSRA16
405
1.98k
    UINT64_C(2175796704), // FSRA32
406
1.98k
    UINT64_C(2175798912), // FSRC1
407
1.98k
    UINT64_C(2175798944), // FSRC1S
408
1.98k
    UINT64_C(2175799040), // FSRC2
409
1.98k
    UINT64_C(2175799072), // FSRC2S
410
1.98k
    UINT64_C(2175796320), // FSRL16
411
1.98k
    UINT64_C(2175796448), // FSRL32
412
1.98k
    UINT64_C(2174753056), // FSTOD
413
1.98k
    UINT64_C(2174753312), // FSTOI
414
1.98k
    UINT64_C(2174753184), // FSTOQ
415
1.98k
    UINT64_C(2174750752), // FSTOX
416
1.98k
    UINT64_C(2174748864), // FSUBD
417
1.98k
    UINT64_C(2174748896), // FSUBQ
418
1.98k
    UINT64_C(2174748832), // FSUBS
419
1.98k
    UINT64_C(2175798848), // FXNOR
420
1.98k
    UINT64_C(2175798880), // FXNORS
421
1.98k
    UINT64_C(2175798656), // FXOR
422
1.98k
    UINT64_C(2175798688), // FXORS
423
1.98k
    UINT64_C(2174750976), // FXTOD
424
1.98k
    UINT64_C(2174751104), // FXTOQ
425
1.98k
    UINT64_C(2174750848), // FXTOS
426
1.98k
    UINT64_C(2175798272), // FZERO
427
1.98k
    UINT64_C(2175798304), // FZEROS
428
1.98k
    UINT64_C(2176851968), // JMPLri
429
1.98k
    UINT64_C(2176843776), // JMPLrr
430
1.98k
    UINT64_C(3229614080), // LDArr
431
1.98k
    UINT64_C(3246923776), // LDCSRri
432
1.98k
    UINT64_C(3246915584), // LDCSRrr
433
1.98k
    UINT64_C(3246399488), // LDCri
434
1.98k
    UINT64_C(3246391296), // LDCrr
435
1.98k
    UINT64_C(3231186944), // LDDArr
436
1.98k
    UINT64_C(3247972352), // LDDCri
437
1.98k
    UINT64_C(3247964160), // LDDCrr
438
1.98k
    UINT64_C(3247964160), // LDDFArr
439
1.98k
    UINT64_C(3239583744), // LDDFri
440
1.98k
    UINT64_C(3239575552), // LDDFrr
441
1.98k
    UINT64_C(3222806528), // LDDri
442
1.98k
    UINT64_C(3222798336), // LDDrr
443
1.98k
    UINT64_C(3246391296), // LDFArr
444
1.98k
    UINT64_C(3238535168), // LDFSRri
445
1.98k
    UINT64_C(3238526976), // LDFSRrr
446
1.98k
    UINT64_C(3238010880), // LDFri
447
1.98k
    UINT64_C(3238002688), // LDFrr
448
1.98k
    UINT64_C(3247439872), // LDQFArr
449
1.98k
    UINT64_C(3239059456), // LDQFri
450
1.98k
    UINT64_C(3239051264), // LDQFrr
451
1.98k
    UINT64_C(3234332672), // LDSBArr
452
1.98k
    UINT64_C(3225952256), // LDSBri
453
1.98k
    UINT64_C(3225944064), // LDSBrr
454
1.98k
    UINT64_C(3234856960), // LDSHArr
455
1.98k
    UINT64_C(3226476544), // LDSHri
456
1.98k
    UINT64_C(3226468352), // LDSHrr
457
1.98k
    UINT64_C(3236429824), // LDSTUBArr
458
1.98k
    UINT64_C(3228049408), // LDSTUBri
459
1.98k
    UINT64_C(3228041216), // LDSTUBrr
460
1.98k
    UINT64_C(3225427968), // LDSWri
461
1.98k
    UINT64_C(3225419776), // LDSWrr
462
1.98k
    UINT64_C(3230138368), // LDUBArr
463
1.98k
    UINT64_C(3221757952), // LDUBri
464
1.98k
    UINT64_C(3221749760), // LDUBrr
465
1.98k
    UINT64_C(3230662656), // LDUHArr
466
1.98k
    UINT64_C(3222282240), // LDUHri
467
1.98k
    UINT64_C(3222274048), // LDUHrr
468
1.98k
    UINT64_C(3272089600), // LDXFSRri
469
1.98k
    UINT64_C(3272081408), // LDXFSRrr
470
1.98k
    UINT64_C(3227000832), // LDXri
471
1.98k
    UINT64_C(3226992640), // LDXrr
472
1.98k
    UINT64_C(3221233664), // LDri
473
1.98k
    UINT64_C(3221225472), // LDrr
474
1.98k
    UINT64_C(2147491840), // LEAX_ADDri
475
1.98k
    UINT64_C(2147491840), // LEA_ADDri
476
1.98k
    UINT64_C(2175795936), // LZCNT
477
1.98k
    UINT64_C(2168709120), // MEMBARi
478
1.98k
    UINT64_C(2175803904), // MOVDTOX
479
1.98k
    UINT64_C(2170560512), // MOVFCCri
480
1.98k
    UINT64_C(2170552320), // MOVFCCrr
481
1.98k
    UINT64_C(2170822656), // MOVICCri
482
1.98k
    UINT64_C(2170814464), // MOVICCrr
483
1.98k
    UINT64_C(2172140544), // MOVRGEZri
484
1.98k
    UINT64_C(2172132352), // MOVRGEZrr
485
1.98k
    UINT64_C(2172139520), // MOVRGZri
486
1.98k
    UINT64_C(2172131328), // MOVRGZrr
487
1.98k
    UINT64_C(2172135424), // MOVRLEZri
488
1.98k
    UINT64_C(2172127232), // MOVRLEZrr
489
1.98k
    UINT64_C(2172136448), // MOVRLZri
490
1.98k
    UINT64_C(2172128256), // MOVRLZrr
491
1.98k
    UINT64_C(2172138496), // MOVRNZri
492
1.98k
    UINT64_C(2172130304), // MOVRNZrr
493
1.98k
    UINT64_C(2172134400), // MOVRRZri
494
1.98k
    UINT64_C(2172126208), // MOVRRZrr
495
1.98k
    UINT64_C(2175804000), // MOVSTOSW
496
1.98k
    UINT64_C(2175803936), // MOVSTOUW
497
1.98k
    UINT64_C(2175804192), // MOVWTOS
498
1.98k
    UINT64_C(2170826752), // MOVXCCri
499
1.98k
    UINT64_C(2170818560), // MOVXCCrr
500
1.98k
    UINT64_C(2175804160), // MOVXTOD
501
1.98k
    UINT64_C(2166366208), // MULSCCri
502
1.98k
    UINT64_C(2166358016), // MULSCCrr
503
1.98k
    UINT64_C(2152210432), // MULXri
504
1.98k
    UINT64_C(2152202240), // MULXrr
505
1.98k
    UINT64_C(16777216), // NOP
506
1.98k
    UINT64_C(2156929024), // ORCCri
507
1.98k
    UINT64_C(2156920832), // ORCCrr
508
1.98k
    UINT64_C(2159026176), // ORNCCri
509
1.98k
    UINT64_C(2159017984), // ORNCCrr
510
1.98k
    UINT64_C(2150637568), // ORNri
511
1.98k
    UINT64_C(2150629376), // ORNrr
512
1.98k
    UINT64_C(2150629376), // ORXNrr
513
1.98k
    UINT64_C(2148540416), // ORXri
514
1.98k
    UINT64_C(2148532224), // ORXrr
515
1.98k
    UINT64_C(2148540416), // ORri
516
1.98k
    UINT64_C(2148532224), // ORrr
517
1.98k
    UINT64_C(2175797184), // PDIST
518
1.98k
    UINT64_C(2175797216), // PDISTN
519
1.98k
    UINT64_C(2171600896), // POPCrr
520
1.98k
    UINT64_C(2168455168), // RDASR
521
1.98k
    UINT64_C(2169503744), // RDPR
522
1.98k
    UINT64_C(2168979456), // RDPSR
523
1.98k
    UINT64_C(2170028032), // RDTBR
524
1.98k
    UINT64_C(2169503744), // RDWIM
525
1.98k
    UINT64_C(2179473408), // RESTOREri
526
1.98k
    UINT64_C(2179465216), // RESTORErr
527
1.98k
    UINT64_C(2177359872), // RET
528
1.98k
    UINT64_C(2177097728), // RETL
529
1.98k
    UINT64_C(2177376256), // RETTri
530
1.98k
    UINT64_C(2177368064), // RETTrr
531
1.98k
    UINT64_C(2178949120), // SAVEri
532
1.98k
    UINT64_C(2178940928), // SAVErr
533
1.98k
    UINT64_C(2163744768), // SDIVCCri
534
1.98k
    UINT64_C(2163736576), // SDIVCCrr
535
1.98k
    UINT64_C(2171084800), // SDIVXri
536
1.98k
    UINT64_C(2171076608), // SDIVXrr
537
1.98k
    UINT64_C(2155356160), // SDIVri
538
1.98k
    UINT64_C(2155347968), // SDIVrr
539
1.98k
    UINT64_C(16777216), // SETHIXi
540
1.98k
    UINT64_C(16777216), // SETHIi
541
1.98k
    UINT64_C(2175799296), // SHUTDOWN
542
1.98k
    UINT64_C(2175799328), // SIAM
543
1.98k
    UINT64_C(2166894592), // SLLXri
544
1.98k
    UINT64_C(2166886400), // SLLXrr
545
1.98k
    UINT64_C(2166890496), // SLLri
546
1.98k
    UINT64_C(2166882304), // SLLrr
547
1.98k
    UINT64_C(2180521984), // SMACri
548
1.98k
    UINT64_C(2180513792), // SMACrr
549
1.98k
    UINT64_C(2161647616), // SMULCCri
550
1.98k
    UINT64_C(2161639424), // SMULCCrr
551
1.98k
    UINT64_C(2153259008), // SMULri
552
1.98k
    UINT64_C(2153250816), // SMULrr
553
1.98k
    UINT64_C(2167943168), // SRAXri
554
1.98k
    UINT64_C(2167934976), // SRAXrr
555
1.98k
    UINT64_C(2167939072), // SRAri
556
1.98k
    UINT64_C(2167930880), // SRArr
557
1.98k
    UINT64_C(2167418880), // SRLXri
558
1.98k
    UINT64_C(2167410688), // SRLXrr
559
1.98k
    UINT64_C(2167414784), // SRLri
560
1.98k
    UINT64_C(2167406592), // SRLrr
561
1.98k
    UINT64_C(3231711232), // STArr
562
1.98k
    UINT64_C(2168700928), // STBAR
563
1.98k
    UINT64_C(3232235520), // STBArr
564
1.98k
    UINT64_C(3223855104), // STBri
565
1.98k
    UINT64_C(3223846912), // STBrr
566
1.98k
    UINT64_C(3249020928), // STCSRri
567
1.98k
    UINT64_C(3249012736), // STCSRrr
568
1.98k
    UINT64_C(3248496640), // STCri
569
1.98k
    UINT64_C(3248488448), // STCrr
570
1.98k
    UINT64_C(3233284096), // STDArr
571
1.98k
    UINT64_C(3249545216), // STDCQri
572
1.98k
    UINT64_C(3249537024), // STDCQrr
573
1.98k
    UINT64_C(3250069504), // STDCri
574
1.98k
    UINT64_C(3250061312), // STDCrr
575
1.98k
    UINT64_C(3250061312), // STDFArr
576
1.98k
    UINT64_C(3241156608), // STDFQri
577
1.98k
    UINT64_C(3241148416), // STDFQrr
578
1.98k
    UINT64_C(3241680896), // STDFri
579
1.98k
    UINT64_C(3241672704), // STDFrr
580
1.98k
    UINT64_C(3224903680), // STDri
581
1.98k
    UINT64_C(3224895488), // STDrr
582
1.98k
    UINT64_C(3248488448), // STFArr
583
1.98k
    UINT64_C(3240632320), // STFSRri
584
1.98k
    UINT64_C(3240624128), // STFSRrr
585
1.98k
    UINT64_C(3240108032), // STFri
586
1.98k
    UINT64_C(3240099840), // STFrr
587
1.98k
    UINT64_C(3232759808), // STHArr
588
1.98k
    UINT64_C(3224379392), // STHri
589
1.98k
    UINT64_C(3224371200), // STHrr
590
1.98k
    UINT64_C(3249537024), // STQFArr
591
1.98k
    UINT64_C(3241156608), // STQFri
592
1.98k
    UINT64_C(3241148416), // STQFrr
593
1.98k
    UINT64_C(3274186752), // STXFSRri
594
1.98k
    UINT64_C(3274178560), // STXFSRrr
595
1.98k
    UINT64_C(3228573696), // STXri
596
1.98k
    UINT64_C(3228565504), // STXrr
597
1.98k
    UINT64_C(3223330816), // STri
598
1.98k
    UINT64_C(3223322624), // STrr
599
1.98k
    UINT64_C(2157977600), // SUBCCri
600
1.98k
    UINT64_C(2157969408), // SUBCCrr
601
1.98k
    UINT64_C(2153783296), // SUBCri
602
1.98k
    UINT64_C(2153775104), // SUBCrr
603
1.98k
    UINT64_C(2162171904), // SUBEri
604
1.98k
    UINT64_C(2162163712), // SUBErr
605
1.98k
    UINT64_C(2149588992), // SUBXri
606
1.98k
    UINT64_C(2149580800), // SUBXrr
607
1.98k
    UINT64_C(2149588992), // SUBri
608
1.98k
    UINT64_C(2149580800), // SUBrr
609
1.98k
    UINT64_C(3237478400), // SWAPArr
610
1.98k
    UINT64_C(3229097984), // SWAPri
611
1.98k
    UINT64_C(3229089792), // SWAPrr
612
1.98k
    UINT64_C(2446336001), // TA1
613
1.98k
    UINT64_C(2446336003), // TA3
614
1.98k
    UINT64_C(2446336005), // TA5
615
1.98k
    UINT64_C(2165317632), // TADDCCTVri
616
1.98k
    UINT64_C(2165309440), // TADDCCTVrr
617
1.98k
    UINT64_C(2164269056), // TADDCCri
618
1.98k
    UINT64_C(2164260864), // TADDCCrr
619
1.98k
    UINT64_C(2177900544), // TICCri
620
1.98k
    UINT64_C(2177892352), // TICCrr
621
1.98k
    UINT64_C(2147483648), // TLS_ADDXrr
622
1.98k
    UINT64_C(2147483648), // TLS_ADDrr
623
1.98k
    UINT64_C(1073741824), // TLS_CALL
624
1.98k
    UINT64_C(3226992640), // TLS_LDXrr
625
1.98k
    UINT64_C(3221225472), // TLS_LDrr
626
1.98k
    UINT64_C(2177900544), // TRAPri
627
1.98k
    UINT64_C(2177892352), // TRAPrr
628
1.98k
    UINT64_C(2165841920), // TSUBCCTVri
629
1.98k
    UINT64_C(2165833728), // TSUBCCTVrr
630
1.98k
    UINT64_C(2164793344), // TSUBCCri
631
1.98k
    UINT64_C(2164785152), // TSUBCCrr
632
1.98k
    UINT64_C(2177904640), // TXCCri
633
1.98k
    UINT64_C(2177896448), // TXCCrr
634
1.98k
    UINT64_C(2163220480), // UDIVCCri
635
1.98k
    UINT64_C(2163212288), // UDIVCCrr
636
1.98k
    UINT64_C(2154307584), // UDIVXri
637
1.98k
    UINT64_C(2154299392), // UDIVXrr
638
1.98k
    UINT64_C(2154831872), // UDIVri
639
1.98k
    UINT64_C(2154823680), // UDIVrr
640
1.98k
    UINT64_C(2179997696), // UMACri
641
1.98k
    UINT64_C(2179989504), // UMACrr
642
1.98k
    UINT64_C(2161123328), // UMULCCri
643
1.98k
    UINT64_C(2161115136), // UMULCCrr
644
1.98k
    UINT64_C(2175795904), // UMULXHI
645
1.98k
    UINT64_C(2152734720), // UMULri
646
1.98k
    UINT64_C(2152726528), // UMULrr
647
1.98k
    UINT64_C(0),  // UNIMP
648
1.98k
    UINT64_C(2175273536), // V9FCMPD
649
1.98k
    UINT64_C(2175273664), // V9FCMPED
650
1.98k
    UINT64_C(2175273696), // V9FCMPEQ
651
1.98k
    UINT64_C(2175273632), // V9FCMPES
652
1.98k
    UINT64_C(2175273568), // V9FCMPQ
653
1.98k
    UINT64_C(2175273504), // V9FCMPS
654
1.98k
    UINT64_C(2175270976), // V9FMOVD_FCC
655
1.98k
    UINT64_C(2175271008), // V9FMOVQ_FCC
656
1.98k
    UINT64_C(2175270944), // V9FMOVS_FCC
657
1.98k
    UINT64_C(2170560512), // V9MOVFCCri
658
1.98k
    UINT64_C(2170552320), // V9MOVFCCrr
659
1.98k
    UINT64_C(2172657664), // WRASRri
660
1.98k
    UINT64_C(2172649472), // WRASRrr
661
1.98k
    UINT64_C(2173706240), // WRPRri
662
1.98k
    UINT64_C(2173698048), // WRPRrr
663
1.98k
    UINT64_C(2173181952), // WRPSRri
664
1.98k
    UINT64_C(2173173760), // WRPSRrr
665
1.98k
    UINT64_C(2174230528), // WRTBRri
666
1.98k
    UINT64_C(2174222336), // WRTBRrr
667
1.98k
    UINT64_C(2173706240), // WRWIMri
668
1.98k
    UINT64_C(2173698048), // WRWIMrr
669
1.98k
    UINT64_C(2175804064), // XMULX
670
1.98k
    UINT64_C(2175804128), // XMULXHI
671
1.98k
    UINT64_C(2159550464), // XNORCCri
672
1.98k
    UINT64_C(2159542272), // XNORCCrr
673
1.98k
    UINT64_C(2151153664), // XNORXrr
674
1.98k
    UINT64_C(2151161856), // XNORri
675
1.98k
    UINT64_C(2151153664), // XNORrr
676
1.98k
    UINT64_C(2157453312), // XORCCri
677
1.98k
    UINT64_C(2157445120), // XORCCrr
678
1.98k
    UINT64_C(2149064704), // XORXri
679
1.98k
    UINT64_C(2149056512), // XORXrr
680
1.98k
    UINT64_C(2149064704), // XORri
681
1.98k
    UINT64_C(2149056512), // XORrr
682
1.98k
    UINT64_C(0)
683
1.98k
  };
684
1.98k
  const unsigned opcode = MI.getOpcode();
685
1.98k
  uint64_t Value = InstBits[opcode];
686
1.98k
  uint64_t op = 0;
687
1.98k
  (void)op;  // suppress warning
688
1.98k
  switch (opcode) {
689
1.98k
    case SP::FLUSH:
690
28
    case SP::FLUSHW:
691
28
    case SP::NOP:
692
28
    case SP::SHUTDOWN:
693
28
    case SP::SIAM:
694
28
    case SP::STBAR:
695
28
    case SP::TA1:
696
28
    case SP::TA3:
697
28
    case SP::TA5: {
698
28
      break;
699
28
    }
700
94
    case SP::BPFCC:
701
94
    case SP::BPFCCA:
702
94
    case SP::BPFCCANT:
703
94
    case SP::BPFCCNT: {
704
94
      // op: cc
705
94
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
706
94
      Value |= (op & UINT64_C(3)) << 20;
707
94
      // op: cond
708
94
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
709
94
      Value |= (op & UINT64_C(15)) << 25;
710
94
      // op: imm19
711
94
      op = getBranchPredTargetOpValue(MI, 0, Fixups, STI);
712
94
      Value |= op & UINT64_C(524287);
713
94
      break;
714
94
    }
715
148
    case SP::BPICC:
716
148
    case SP::BPICCA:
717
148
    case SP::BPICCANT:
718
148
    case SP::BPICCNT:
719
148
    case SP::BPXCC:
720
148
    case SP::BPXCCA:
721
148
    case SP::BPXCCANT:
722
148
    case SP::BPXCCNT: {
723
148
      // op: cond
724
148
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
725
148
      Value |= (op & UINT64_C(15)) << 25;
726
148
      // op: imm19
727
148
      op = getBranchPredTargetOpValue(MI, 0, Fixups, STI);
728
148
      Value |= op & UINT64_C(524287);
729
148
      break;
730
148
    }
731
148
    case SP::CALL:
732
36
    case SP::TLS_CALL: {
733
36
      // op: disp
734
36
      op = getCallTargetOpValue(MI, 0, Fixups, STI);
735
36
      Value |= op & UINT64_C(1073741823);
736
36
      break;
737
36
    }
738
36
    case SP::BPGEZapn:
739
11
    case SP::BPGEZapt:
740
11
    case SP::BPGEZnapn:
741
11
    case SP::BPGEZnapt:
742
11
    case SP::BPGZapn:
743
11
    case SP::BPGZapt:
744
11
    case SP::BPGZnapn:
745
11
    case SP::BPGZnapt:
746
11
    case SP::BPLEZapn:
747
11
    case SP::BPLEZapt:
748
11
    case SP::BPLEZnapn:
749
11
    case SP::BPLEZnapt:
750
11
    case SP::BPLZapn:
751
11
    case SP::BPLZapt:
752
11
    case SP::BPLZnapn:
753
11
    case SP::BPLZnapt:
754
11
    case SP::BPNZapn:
755
11
    case SP::BPNZapt:
756
11
    case SP::BPNZnapn:
757
11
    case SP::BPNZnapt:
758
11
    case SP::BPZapn:
759
11
    case SP::BPZapt:
760
11
    case SP::BPZnapn:
761
11
    case SP::BPZnapt: {
762
11
      // op: imm16
763
11
      op = getBranchOnRegTargetOpValue(MI, 1, Fixups, STI);
764
11
      Value |= (op & UINT64_C(49152)) << 6;
765
11
      Value |= op & UINT64_C(16383);
766
11
      // op: rs1
767
11
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
768
11
      Value |= (op & UINT64_C(31)) << 14;
769
11
      break;
770
11
    }
771
11
    case SP::BA: {
772
4
      // op: imm22
773
4
      op = getBranchTargetOpValue(MI, 0, Fixups, STI);
774
4
      Value |= op & UINT64_C(4194303);
775
4
      break;
776
11
    }
777
225
    case SP::BCOND:
778
225
    case SP::BCONDA:
779
225
    case SP::CBCOND:
780
225
    case SP::CBCONDA:
781
225
    case SP::FBCOND:
782
225
    case SP::FBCONDA: {
783
225
      // op: imm22
784
225
      op = getBranchTargetOpValue(MI, 0, Fixups, STI);
785
225
      Value |= op & UINT64_C(4194303);
786
225
      // op: cond
787
225
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
788
225
      Value |= (op & UINT64_C(15)) << 25;
789
225
      break;
790
225
    }
791
225
    case SP::UNIMP: {
792
1
      // op: imm22
793
1
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
794
1
      Value |= op & UINT64_C(4194303);
795
1
      break;
796
225
    }
797
225
    case SP::SETHIXi:
798
111
    case SP::SETHIi: {
799
111
      // op: imm22
800
111
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
801
111
      Value |= op & UINT64_C(4194303);
802
111
      // op: rd
803
111
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
804
111
      Value |= (op & UINT64_C(31)) << 25;
805
111
      break;
806
111
    }
807
111
    case SP::FONE:
808
19
    case SP::FONES:
809
19
    case SP::FZERO:
810
19
    case SP::FZEROS:
811
19
    case SP::RDPSR:
812
19
    case SP::RDTBR:
813
19
    case SP::RDWIM: {
814
19
      // op: rd
815
19
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
816
19
      Value |= (op & UINT64_C(31)) << 25;
817
19
      break;
818
19
    }
819
19
    case SP::V9MOVFCCrr: {
820
15
      // op: rd
821
15
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
822
15
      Value |= (op & UINT64_C(31)) << 25;
823
15
      // op: cc
824
15
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
825
15
      Value |= (op & UINT64_C(3)) << 11;
826
15
      // op: cond
827
15
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
828
15
      Value |= (op & UINT64_C(15)) << 14;
829
15
      // op: rs2
830
15
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
831
15
      Value |= op & UINT64_C(31);
832
15
      break;
833
19
    }
834
19
    case SP::V9MOVFCCri: {
835
0
      // op: rd
836
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
837
0
      Value |= (op & UINT64_C(31)) << 25;
838
0
      // op: cc
839
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
840
0
      Value |= (op & UINT64_C(3)) << 11;
841
0
      // op: cond
842
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
843
0
      Value |= (op & UINT64_C(15)) << 14;
844
0
      // op: simm11
845
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
846
0
      Value |= op & UINT64_C(2047);
847
0
      break;
848
19
    }
849
56
    case SP::FMOVD_FCC:
850
56
    case SP::FMOVD_ICC:
851
56
    case SP::FMOVD_XCC:
852
56
    case SP::FMOVQ_FCC:
853
56
    case SP::FMOVQ_ICC:
854
56
    case SP::FMOVQ_XCC:
855
56
    case SP::FMOVS_FCC:
856
56
    case SP::FMOVS_ICC:
857
56
    case SP::FMOVS_XCC:
858
56
    case SP::MOVFCCrr:
859
56
    case SP::MOVICCrr:
860
56
    case SP::MOVXCCrr: {
861
56
      // op: rd
862
56
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
863
56
      Value |= (op & UINT64_C(31)) << 25;
864
56
      // op: cond
865
56
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
866
56
      Value |= (op & UINT64_C(15)) << 14;
867
56
      // op: rs2
868
56
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
869
56
      Value |= op & UINT64_C(31);
870
56
      break;
871
56
    }
872
56
    case SP::MOVFCCri:
873
0
    case SP::MOVICCri:
874
0
    case SP::MOVXCCri: {
875
0
      // op: rd
876
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
877
0
      Value |= (op & UINT64_C(31)) << 25;
878
0
      // op: cond
879
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
880
0
      Value |= (op & UINT64_C(15)) << 14;
881
0
      // op: simm11
882
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
883
0
      Value |= op & UINT64_C(2047);
884
0
      break;
885
0
    }
886
15
    case SP::V9FMOVD_FCC:
887
15
    case SP::V9FMOVQ_FCC:
888
15
    case SP::V9FMOVS_FCC: {
889
15
      // op: rd
890
15
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
891
15
      Value |= (op & UINT64_C(31)) << 25;
892
15
      // op: cond
893
15
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
894
15
      Value |= (op & UINT64_C(15)) << 14;
895
15
      // op: opf_cc
896
15
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
897
15
      Value |= (op & UINT64_C(3)) << 11;
898
15
      // op: rs2
899
15
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
900
15
      Value |= op & UINT64_C(31);
901
15
      break;
902
15
    }
903
31
    case SP::FNOT1:
904
31
    case SP::FNOT1S:
905
31
    case SP::FSRC1:
906
31
    case SP::FSRC1S:
907
31
    case SP::RDASR:
908
31
    case SP::RDPR: {
909
31
      // op: rd
910
31
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
911
31
      Value |= (op & UINT64_C(31)) << 25;
912
31
      // op: rs1
913
31
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
914
31
      Value |= (op & UINT64_C(31)) << 14;
915
31
      break;
916
31
    }
917
31
    case SP::LDArr:
918
20
    case SP::LDDArr:
919
20
    case SP::LDDFArr:
920
20
    case SP::LDFArr:
921
20
    case SP::LDQFArr:
922
20
    case SP::LDSBArr:
923
20
    case SP::LDSHArr:
924
20
    case SP::LDSTUBArr:
925
20
    case SP::LDUBArr:
926
20
    case SP::LDUHArr:
927
20
    case SP::SWAPArr: {
928
20
      // op: rd
929
20
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
930
20
      Value |= (op & UINT64_C(31)) << 25;
931
20
      // op: rs1
932
20
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
933
20
      Value |= (op & UINT64_C(31)) << 14;
934
20
      // op: asi
935
20
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
936
20
      Value |= (op & UINT64_C(255)) << 5;
937
20
      // op: rs2
938
20
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
939
20
      Value |= op & UINT64_C(31);
940
20
      break;
941
20
    }
942
20
    case SP::CASArr: {
943
10
      // op: rd
944
10
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
945
10
      Value |= (op & UINT64_C(31)) << 25;
946
10
      // op: rs1
947
10
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
948
10
      Value |= (op & UINT64_C(31)) << 14;
949
10
      // op: asi
950
10
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
951
10
      Value |= (op & UINT64_C(255)) << 5;
952
10
      // op: rs2
953
10
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
954
10
      Value |= op & UINT64_C(31);
955
10
      break;
956
20
    }
957
400
    case SP::ADDCCrr:
958
400
    case SP::ADDCrr:
959
400
    case SP::ADDErr:
960
400
    case SP::ADDXC:
961
400
    case SP::ADDXCCC:
962
400
    case SP::ADDXrr:
963
400
    case SP::ADDrr:
964
400
    case SP::ALIGNADDR:
965
400
    case SP::ALIGNADDRL:
966
400
    case SP::ANDCCrr:
967
400
    case SP::ANDNCCrr:
968
400
    case SP::ANDNrr:
969
400
    case SP::ANDXNrr:
970
400
    case SP::ANDXrr:
971
400
    case SP::ANDrr:
972
400
    case SP::ARRAY16:
973
400
    case SP::ARRAY32:
974
400
    case SP::ARRAY8:
975
400
    case SP::BMASK:
976
400
    case SP::BSHUFFLE:
977
400
    case SP::CASAasi10:
978
400
    case SP::CASXrr:
979
400
    case SP::CASrr:
980
400
    case SP::EDGE16:
981
400
    case SP::EDGE16L:
982
400
    case SP::EDGE16LN:
983
400
    case SP::EDGE16N:
984
400
    case SP::EDGE32:
985
400
    case SP::EDGE32L:
986
400
    case SP::EDGE32LN:
987
400
    case SP::EDGE32N:
988
400
    case SP::EDGE8:
989
400
    case SP::EDGE8L:
990
400
    case SP::EDGE8LN:
991
400
    case SP::EDGE8N:
992
400
    case SP::FADDD:
993
400
    case SP::FADDQ:
994
400
    case SP::FADDS:
995
400
    case SP::FALIGNADATA:
996
400
    case SP::FAND:
997
400
    case SP::FANDNOT1:
998
400
    case SP::FANDNOT1S:
999
400
    case SP::FANDNOT2:
1000
400
    case SP::FANDNOT2S:
1001
400
    case SP::FANDS:
1002
400
    case SP::FCHKSM16:
1003
400
    case SP::FCMPEQ16:
1004
400
    case SP::FCMPEQ32:
1005
400
    case SP::FCMPGT16:
1006
400
    case SP::FCMPGT32:
1007
400
    case SP::FCMPLE16:
1008
400
    case SP::FCMPLE32:
1009
400
    case SP::FCMPNE16:
1010
400
    case SP::FCMPNE32:
1011
400
    case SP::FDIVD:
1012
400
    case SP::FDIVQ:
1013
400
    case SP::FDIVS:
1014
400
    case SP::FDMULQ:
1015
400
    case SP::FHADDD:
1016
400
    case SP::FHADDS:
1017
400
    case SP::FHSUBD:
1018
400
    case SP::FHSUBS:
1019
400
    case SP::FLCMPD:
1020
400
    case SP::FLCMPS:
1021
400
    case SP::FMEAN16:
1022
400
    case SP::FMOVRGEZD:
1023
400
    case SP::FMOVRGEZQ:
1024
400
    case SP::FMOVRGEZS:
1025
400
    case SP::FMOVRGZD:
1026
400
    case SP::FMOVRGZQ:
1027
400
    case SP::FMOVRGZS:
1028
400
    case SP::FMOVRLEZD:
1029
400
    case SP::FMOVRLEZQ:
1030
400
    case SP::FMOVRLEZS:
1031
400
    case SP::FMOVRLZD:
1032
400
    case SP::FMOVRLZQ:
1033
400
    case SP::FMOVRLZS:
1034
400
    case SP::FMOVRNZD:
1035
400
    case SP::FMOVRNZQ:
1036
400
    case SP::FMOVRNZS:
1037
400
    case SP::FMOVRZD:
1038
400
    case SP::FMOVRZQ:
1039
400
    case SP::FMOVRZS:
1040
400
    case SP::FMUL8SUX16:
1041
400
    case SP::FMUL8ULX16:
1042
400
    case SP::FMUL8X16:
1043
400
    case SP::FMUL8X16AL:
1044
400
    case SP::FMUL8X16AU:
1045
400
    case SP::FMULD:
1046
400
    case SP::FMULD8SUX16:
1047
400
    case SP::FMULD8ULX16:
1048
400
    case SP::FMULQ:
1049
400
    case SP::FMULS:
1050
400
    case SP::FNADDD:
1051
400
    case SP::FNADDS:
1052
400
    case SP::FNAND:
1053
400
    case SP::FNANDS:
1054
400
    case SP::FNHADDD:
1055
400
    case SP::FNHADDS:
1056
400
    case SP::FNMULD:
1057
400
    case SP::FNMULS:
1058
400
    case SP::FNOR:
1059
400
    case SP::FNORS:
1060
400
    case SP::FNSMULD:
1061
400
    case SP::FOR:
1062
400
    case SP::FORNOT1:
1063
400
    case SP::FORNOT1S:
1064
400
    case SP::FORNOT2:
1065
400
    case SP::FORNOT2S:
1066
400
    case SP::FORS:
1067
400
    case SP::FPACK32:
1068
400
    case SP::FPADD16:
1069
400
    case SP::FPADD16S:
1070
400
    case SP::FPADD32:
1071
400
    case SP::FPADD32S:
1072
400
    case SP::FPADD64:
1073
400
    case SP::FPMERGE:
1074
400
    case SP::FPSUB16:
1075
400
    case SP::FPSUB16S:
1076
400
    case SP::FPSUB32:
1077
400
    case SP::FPSUB32S:
1078
400
    case SP::FSLAS16:
1079
400
    case SP::FSLAS32:
1080
400
    case SP::FSLL16:
1081
400
    case SP::FSLL32:
1082
400
    case SP::FSMULD:
1083
400
    case SP::FSRA16:
1084
400
    case SP::FSRA32:
1085
400
    case SP::FSRL16:
1086
400
    case SP::FSRL32:
1087
400
    case SP::FSUBD:
1088
400
    case SP::FSUBQ:
1089
400
    case SP::FSUBS:
1090
400
    case SP::FXNOR:
1091
400
    case SP::FXNORS:
1092
400
    case SP::FXOR:
1093
400
    case SP::FXORS:
1094
400
    case SP::JMPLrr:
1095
400
    case SP::LDCrr:
1096
400
    case SP::LDDCrr:
1097
400
    case SP::LDDFrr:
1098
400
    case SP::LDDrr:
1099
400
    case SP::LDFrr:
1100
400
    case SP::LDQFrr:
1101
400
    case SP::LDSBrr:
1102
400
    case SP::LDSHrr:
1103
400
    case SP::LDSTUBrr:
1104
400
    case SP::LDSWrr:
1105
400
    case SP::LDUBrr:
1106
400
    case SP::LDUHrr:
1107
400
    case SP::LDXrr:
1108
400
    case SP::LDrr:
1109
400
    case SP::MOVRGEZrr:
1110
400
    case SP::MOVRGZrr:
1111
400
    case SP::MOVRLEZrr:
1112
400
    case SP::MOVRLZrr:
1113
400
    case SP::MOVRNZrr:
1114
400
    case SP::MOVRRZrr:
1115
400
    case SP::MULSCCrr:
1116
400
    case SP::MULXrr:
1117
400
    case SP::ORCCrr:
1118
400
    case SP::ORNCCrr:
1119
400
    case SP::ORNrr:
1120
400
    case SP::ORXNrr:
1121
400
    case SP::ORXrr:
1122
400
    case SP::ORrr:
1123
400
    case SP::PDIST:
1124
400
    case SP::PDISTN:
1125
400
    case SP::RESTORErr:
1126
400
    case SP::SAVErr:
1127
400
    case SP::SDIVCCrr:
1128
400
    case SP::SDIVXrr:
1129
400
    case SP::SDIVrr:
1130
400
    case SP::SLLXrr:
1131
400
    case SP::SLLrr:
1132
400
    case SP::SMACrr:
1133
400
    case SP::SMULCCrr:
1134
400
    case SP::SMULrr:
1135
400
    case SP::SRAXrr:
1136
400
    case SP::SRArr:
1137
400
    case SP::SRLXrr:
1138
400
    case SP::SRLrr:
1139
400
    case SP::SUBCCrr:
1140
400
    case SP::SUBCrr:
1141
400
    case SP::SUBErr:
1142
400
    case SP::SUBXrr:
1143
400
    case SP::SUBrr:
1144
400
    case SP::SWAPrr:
1145
400
    case SP::TADDCCTVrr:
1146
400
    case SP::TADDCCrr:
1147
400
    case SP::TLS_ADDXrr:
1148
400
    case SP::TLS_ADDrr:
1149
400
    case SP::TLS_LDXrr:
1150
400
    case SP::TLS_LDrr:
1151
400
    case SP::TSUBCCTVrr:
1152
400
    case SP::TSUBCCrr:
1153
400
    case SP::UDIVCCrr:
1154
400
    case SP::UDIVXrr:
1155
400
    case SP::UDIVrr:
1156
400
    case SP::UMACrr:
1157
400
    case SP::UMULCCrr:
1158
400
    case SP::UMULXHI:
1159
400
    case SP::UMULrr:
1160
400
    case SP::V9FCMPD:
1161
400
    case SP::V9FCMPED:
1162
400
    case SP::V9FCMPEQ:
1163
400
    case SP::V9FCMPES:
1164
400
    case SP::V9FCMPQ:
1165
400
    case SP::V9FCMPS:
1166
400
    case SP::WRASRrr:
1167
400
    case SP::WRPRrr:
1168
400
    case SP::XMULX:
1169
400
    case SP::XMULXHI:
1170
400
    case SP::XNORCCrr:
1171
400
    case SP::XNORXrr:
1172
400
    case SP::XNORrr:
1173
400
    case SP::XORCCrr:
1174
400
    case SP::XORXrr:
1175
400
    case SP::XORrr: {
1176
400
      // op: rd
1177
400
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1178
400
      Value |= (op & UINT64_C(31)) << 25;
1179
400
      // op: rs1
1180
400
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
1181
400
      Value |= (op & UINT64_C(31)) << 14;
1182
400
      // op: rs2
1183
400
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
1184
400
      Value |= op & UINT64_C(31);
1185
400
      break;
1186
400
    }
1187
400
    case SP::SLLXri:
1188
6
    case SP::SRAXri:
1189
6
    case SP::SRLXri: {
1190
6
      // op: rd
1191
6
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1192
6
      Value |= (op & UINT64_C(31)) << 25;
1193
6
      // op: rs1
1194
6
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
1195
6
      Value |= (op & UINT64_C(31)) << 14;
1196
6
      // op: shcnt
1197
6
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
1198
6
      Value |= op & UINT64_C(63);
1199
6
      break;
1200
6
    }
1201
6
    case SP::MOVRGEZri:
1202
0
    case SP::MOVRGZri:
1203
0
    case SP::MOVRLEZri:
1204
0
    case SP::MOVRLZri:
1205
0
    case SP::MOVRNZri:
1206
0
    case SP::MOVRRZri: {
1207
0
      // op: rd
1208
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1209
0
      Value |= (op & UINT64_C(31)) << 25;
1210
0
      // op: rs1
1211
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
1212
0
      Value |= (op & UINT64_C(31)) << 14;
1213
0
      // op: simm10
1214
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
1215
0
      Value |= op & UINT64_C(1023);
1216
0
      break;
1217
0
    }
1218
294
    case SP::ADDCCri:
1219
294
    case SP::ADDCri:
1220
294
    case SP::ADDEri:
1221
294
    case SP::ADDXri:
1222
294
    case SP::ADDri:
1223
294
    case SP::ANDCCri:
1224
294
    case SP::ANDNCCri:
1225
294
    case SP::ANDNri:
1226
294
    case SP::ANDXri:
1227
294
    case SP::ANDri:
1228
294
    case SP::JMPLri:
1229
294
    case SP::LDCri:
1230
294
    case SP::LDDCri:
1231
294
    case SP::LDDFri:
1232
294
    case SP::LDDri:
1233
294
    case SP::LDFri:
1234
294
    case SP::LDQFri:
1235
294
    case SP::LDSBri:
1236
294
    case SP::LDSHri:
1237
294
    case SP::LDSTUBri:
1238
294
    case SP::LDSWri:
1239
294
    case SP::LDUBri:
1240
294
    case SP::LDUHri:
1241
294
    case SP::LDXri:
1242
294
    case SP::LDri:
1243
294
    case SP::LEAX_ADDri:
1244
294
    case SP::LEA_ADDri:
1245
294
    case SP::MULSCCri:
1246
294
    case SP::MULXri:
1247
294
    case SP::ORCCri:
1248
294
    case SP::ORNCCri:
1249
294
    case SP::ORNri:
1250
294
    case SP::ORXri:
1251
294
    case SP::ORri:
1252
294
    case SP::RESTOREri:
1253
294
    case SP::SAVEri:
1254
294
    case SP::SDIVCCri:
1255
294
    case SP::SDIVXri:
1256
294
    case SP::SDIVri:
1257
294
    case SP::SLLri:
1258
294
    case SP::SMACri:
1259
294
    case SP::SMULCCri:
1260
294
    case SP::SMULri:
1261
294
    case SP::SRAri:
1262
294
    case SP::SRLri:
1263
294
    case SP::SUBCCri:
1264
294
    case SP::SUBCri:
1265
294
    case SP::SUBEri:
1266
294
    case SP::SUBXri:
1267
294
    case SP::SUBri:
1268
294
    case SP::SWAPri:
1269
294
    case SP::TADDCCTVri:
1270
294
    case SP::TADDCCri:
1271
294
    case SP::TSUBCCTVri:
1272
294
    case SP::TSUBCCri:
1273
294
    case SP::UDIVCCri:
1274
294
    case SP::UDIVXri:
1275
294
    case SP::UDIVri:
1276
294
    case SP::UMACri:
1277
294
    case SP::UMULCCri:
1278
294
    case SP::UMULri:
1279
294
    case SP::WRASRri:
1280
294
    case SP::WRPRri:
1281
294
    case SP::XNORCCri:
1282
294
    case SP::XNORri:
1283
294
    case SP::XORCCri:
1284
294
    case SP::XORXri:
1285
294
    case SP::XORri: {
1286
294
      // op: rd
1287
294
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1288
294
      Value |= (op & UINT64_C(31)) << 25;
1289
294
      // op: rs1
1290
294
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
1291
294
      Value |= (op & UINT64_C(31)) << 14;
1292
294
      // op: simm13
1293
294
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
1294
294
      Value |= op & UINT64_C(8191);
1295
294
      break;
1296
294
    }
1297
294
    case SP::FABSD:
1298
31
    case SP::FABSQ:
1299
31
    case SP::FABSS:
1300
31
    case SP::FDTOI:
1301
31
    case SP::FDTOQ:
1302
31
    case SP::FDTOS:
1303
31
    case SP::FDTOX:
1304
31
    case SP::FEXPAND:
1305
31
    case SP::FITOD:
1306
31
    case SP::FITOQ:
1307
31
    case SP::FITOS:
1308
31
    case SP::FMOVD:
1309
31
    case SP::FMOVQ:
1310
31
    case SP::FMOVS:
1311
31
    case SP::FNEGD:
1312
31
    case SP::FNEGQ:
1313
31
    case SP::FNEGS:
1314
31
    case SP::FNOT2:
1315
31
    case SP::FNOT2S:
1316
31
    case SP::FPACK16:
1317
31
    case SP::FPACKFIX:
1318
31
    case SP::FQTOD:
1319
31
    case SP::FQTOI:
1320
31
    case SP::FQTOS:
1321
31
    case SP::FQTOX:
1322
31
    case SP::FSQRTD:
1323
31
    case SP::FSQRTQ:
1324
31
    case SP::FSQRTS:
1325
31
    case SP::FSRC2:
1326
31
    case SP::FSRC2S:
1327
31
    case SP::FSTOD:
1328
31
    case SP::FSTOI:
1329
31
    case SP::FSTOQ:
1330
31
    case SP::FSTOX:
1331
31
    case SP::FXTOD:
1332
31
    case SP::FXTOQ:
1333
31
    case SP::FXTOS:
1334
31
    case SP::LZCNT:
1335
31
    case SP::MOVDTOX:
1336
31
    case SP::MOVSTOSW:
1337
31
    case SP::MOVSTOUW:
1338
31
    case SP::MOVWTOS:
1339
31
    case SP::MOVXTOD:
1340
31
    case SP::POPCrr: {
1341
31
      // op: rd
1342
31
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1343
31
      Value |= (op & UINT64_C(31)) << 25;
1344
31
      // op: rs2
1345
31
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
1346
31
      Value |= op & UINT64_C(31);
1347
31
      break;
1348
31
    }
1349
31
    case SP::STArr:
1350
19
    case SP::STBArr:
1351
19
    case SP::STDArr:
1352
19
    case SP::STDFArr:
1353
19
    case SP::STFArr:
1354
19
    case SP::STHArr:
1355
19
    case SP::STQFArr: {
1356
19
      // op: rd
1357
19
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
1358
19
      Value |= (op & UINT64_C(31)) << 25;
1359
19
      // op: rs1
1360
19
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1361
19
      Value |= (op & UINT64_C(31)) << 14;
1362
19
      // op: asi
1363
19
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
1364
19
      Value |= (op & UINT64_C(255)) << 5;
1365
19
      // op: rs2
1366
19
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
1367
19
      Value |= op & UINT64_C(31);
1368
19
      break;
1369
19
    }
1370
55
    case SP::STBrr:
1371
55
    case SP::STCrr:
1372
55
    case SP::STDCrr:
1373
55
    case SP::STDFrr:
1374
55
    case SP::STDrr:
1375
55
    case SP::STFrr:
1376
55
    case SP::STHrr:
1377
55
    case SP::STQFrr:
1378
55
    case SP::STXrr:
1379
55
    case SP::STrr: {
1380
55
      // op: rd
1381
55
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
1382
55
      Value |= (op & UINT64_C(31)) << 25;
1383
55
      // op: rs1
1384
55
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1385
55
      Value |= (op & UINT64_C(31)) << 14;
1386
55
      // op: rs2
1387
55
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
1388
55
      Value |= op & UINT64_C(31);
1389
55
      break;
1390
55
    }
1391
55
    case SP::STBri:
1392
17
    case SP::STCri:
1393
17
    case SP::STDCri:
1394
17
    case SP::STDFri:
1395
17
    case SP::STDri:
1396
17
    case SP::STFri:
1397
17
    case SP::STHri:
1398
17
    case SP::STQFri:
1399
17
    case SP::STXri:
1400
17
    case SP::STri: {
1401
17
      // op: rd
1402
17
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
1403
17
      Value |= (op & UINT64_C(31)) << 25;
1404
17
      // op: rs1
1405
17
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1406
17
      Value |= (op & UINT64_C(31)) << 14;
1407
17
      // op: simm13
1408
17
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
1409
17
      Value |= op & UINT64_C(8191);
1410
17
      break;
1411
17
    }
1412
97
    case SP::TICCri:
1413
97
    case SP::TRAPri:
1414
97
    case SP::TXCCri: {
1415
97
      // op: rs1
1416
97
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1417
97
      Value |= (op & UINT64_C(31)) << 14;
1418
97
      // op: cond
1419
97
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
1420
97
      Value |= (op & UINT64_C(15)) << 25;
1421
97
      // op: imm
1422
97
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
1423
97
      Value |= op & UINT64_C(255);
1424
97
      break;
1425
97
    }
1426
102
    case SP::TICCrr:
1427
102
    case SP::TRAPrr:
1428
102
    case SP::TXCCrr: {
1429
102
      // op: rs1
1430
102
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1431
102
      Value |= (op & UINT64_C(31)) << 14;
1432
102
      // op: cond
1433
102
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
1434
102
      Value |= (op & UINT64_C(15)) << 25;
1435
102
      // op: rs2
1436
102
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
1437
102
      Value |= op & UINT64_C(31);
1438
102
      break;
1439
102
    }
1440
102
    case SP::BINDrr:
1441
48
    case SP::CALLrr:
1442
48
    case SP::CMPrr:
1443
48
    case SP::FCMPD:
1444
48
    case SP::FCMPQ:
1445
48
    case SP::FCMPS:
1446
48
    case SP::FLUSHrr:
1447
48
    case SP::LDCSRrr:
1448
48
    case SP::LDFSRrr:
1449
48
    case SP::LDXFSRrr:
1450
48
    case SP::RETTrr:
1451
48
    case SP::STCSRrr:
1452
48
    case SP::STDCQrr:
1453
48
    case SP::STDFQrr:
1454
48
    case SP::STFSRrr:
1455
48
    case SP::STXFSRrr:
1456
48
    case SP::WRPSRrr:
1457
48
    case SP::WRTBRrr:
1458
48
    case SP::WRWIMrr: {
1459
48
      // op: rs1
1460
48
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1461
48
      Value |= (op & UINT64_C(31)) << 14;
1462
48
      // op: rs2
1463
48
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
1464
48
      Value |= op & UINT64_C(31);
1465
48
      break;
1466
48
    }
1467
51
    case SP::BINDri:
1468
51
    case SP::CALLri:
1469
51
    case SP::CMPri:
1470
51
    case SP::FLUSHri:
1471
51
    case SP::LDCSRri:
1472
51
    case SP::LDFSRri:
1473
51
    case SP::LDXFSRri:
1474
51
    case SP::RETTri:
1475
51
    case SP::STCSRri:
1476
51
    case SP::STDCQri:
1477
51
    case SP::STDFQri:
1478
51
    case SP::STFSRri:
1479
51
    case SP::STXFSRri:
1480
51
    case SP::WRPSRri:
1481
51
    case SP::WRTBRri:
1482
51
    case SP::WRWIMri: {
1483
51
      // op: rs1
1484
51
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1485
51
      Value |= (op & UINT64_C(31)) << 14;
1486
51
      // op: simm13
1487
51
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
1488
51
      Value |= op & UINT64_C(8191);
1489
51
      break;
1490
51
    }
1491
51
    case SP::CMASK16:
1492
0
    case SP::CMASK32:
1493
0
    case SP::CMASK8: {
1494
0
      // op: rs2
1495
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1496
0
      Value |= op & UINT64_C(31);
1497
0
      break;
1498
0
    }
1499
38
    case SP::MEMBARi:
1500
38
    case SP::RET:
1501
38
    case SP::RETL: {
1502
38
      // op: simm13
1503
38
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1504
38
      Value |= op & UINT64_C(8191);
1505
38
      break;
1506
38
    }
1507
38
  default:
1508
0
    std::string msg;
1509
0
    raw_string_ostream Msg(msg);
1510
0
    Msg << "Not supported instr: " << MI;
1511
0
    report_fatal_error(Msg.str());
1512
1.98k
  }
1513
1.98k
  return Value;
1514
1.98k
}
1515
1516
#ifdef ENABLE_INSTR_PREDICATE_VERIFIER
1517
#undef ENABLE_INSTR_PREDICATE_VERIFIER
1518
#include <sstream>
1519
1520
// Flags for subtarget features that participate in instruction matching.
1521
enum SubtargetFeatureFlag : uint8_t {
1522
  Feature_UseSoftMulDiv = (1ULL << 4),
1523
  Feature_HasV9 = (1ULL << 0),
1524
  Feature_HasVIS = (1ULL << 1),
1525
  Feature_HasVIS2 = (1ULL << 2),
1526
  Feature_HasVIS3 = (1ULL << 3),
1527
  Feature_None = 0
1528
};
1529
1530
#ifndef NDEBUG
1531
static const char *SubtargetFeatureNames[] = {
1532
  "Feature_HasV9",
1533
  "Feature_HasVIS",
1534
  "Feature_HasVIS2",
1535
  "Feature_HasVIS3",
1536
  "Feature_UseSoftMulDiv",
1537
  nullptr
1538
};
1539
1540
#endif // NDEBUG
1541
uint64_t SparcMCCodeEmitter::
1542
1.98k
computeAvailableFeatures(const FeatureBitset& FB) const {
1543
1.98k
  uint64_t Features = 0;
1544
1.98k
  if ((FB[Sparc::FeatureSoftMulDiv]))
1545
0
    Features |= Feature_UseSoftMulDiv;
1546
1.98k
  if ((FB[Sparc::FeatureV9]))
1547
1.27k
    Features |= Feature_HasV9;
1548
1.98k
  if ((FB[Sparc::FeatureVIS]))
1549
1
    Features |= Feature_HasVIS;
1550
1.98k
  if ((FB[Sparc::FeatureVIS2]))
1551
1
    Features |= Feature_HasVIS2;
1552
1.98k
  if ((FB[Sparc::FeatureVIS3]))
1553
0
    Features |= Feature_HasVIS3;
1554
1.98k
  return Features;
1555
1.98k
}
1556
1557
void SparcMCCodeEmitter::verifyInstructionPredicates(
1558
1.98k
    const MCInst &Inst, uint64_t AvailableFeatures) const {
1559
#ifndef NDEBUG
1560
  static uint64_t RequiredFeatures[] = {
1561
    0, // PHI = 0
1562
    0, // INLINEASM = 1
1563
    0, // CFI_INSTRUCTION = 2
1564
    0, // EH_LABEL = 3
1565
    0, // GC_LABEL = 4
1566
    0, // ANNOTATION_LABEL = 5
1567
    0, // KILL = 6
1568
    0, // EXTRACT_SUBREG = 7
1569
    0, // INSERT_SUBREG = 8
1570
    0, // IMPLICIT_DEF = 9
1571
    0, // SUBREG_TO_REG = 10
1572
    0, // COPY_TO_REGCLASS = 11
1573
    0, // DBG_VALUE = 12
1574
    0, // DBG_LABEL = 13
1575
    0, // REG_SEQUENCE = 14
1576
    0, // COPY = 15
1577
    0, // BUNDLE = 16
1578
    0, // LIFETIME_START = 17
1579
    0, // LIFETIME_END = 18
1580
    0, // STACKMAP = 19
1581
    0, // FENTRY_CALL = 20
1582
    0, // PATCHPOINT = 21
1583
    0, // LOAD_STACK_GUARD = 22
1584
    0, // STATEPOINT = 23
1585
    0, // LOCAL_ESCAPE = 24
1586
    0, // FAULTING_OP = 25
1587
    0, // PATCHABLE_OP = 26
1588
    0, // PATCHABLE_FUNCTION_ENTER = 27
1589
    0, // PATCHABLE_RET = 28
1590
    0, // PATCHABLE_FUNCTION_EXIT = 29
1591
    0, // PATCHABLE_TAIL_CALL = 30
1592
    0, // PATCHABLE_EVENT_CALL = 31
1593
    0, // PATCHABLE_TYPED_EVENT_CALL = 32
1594
    0, // ICALL_BRANCH_FUNNEL = 33
1595
    0, // G_ADD = 34
1596
    0, // G_SUB = 35
1597
    0, // G_MUL = 36
1598
    0, // G_SDIV = 37
1599
    0, // G_UDIV = 38
1600
    0, // G_SREM = 39
1601
    0, // G_UREM = 40
1602
    0, // G_AND = 41
1603
    0, // G_OR = 42
1604
    0, // G_XOR = 43
1605
    0, // G_IMPLICIT_DEF = 44
1606
    0, // G_PHI = 45
1607
    0, // G_FRAME_INDEX = 46
1608
    0, // G_GLOBAL_VALUE = 47
1609
    0, // G_EXTRACT = 48
1610
    0, // G_UNMERGE_VALUES = 49
1611
    0, // G_INSERT = 50
1612
    0, // G_MERGE_VALUES = 51
1613
    0, // G_PTRTOINT = 52
1614
    0, // G_INTTOPTR = 53
1615
    0, // G_BITCAST = 54
1616
    0, // G_INTRINSIC_TRUNC = 55
1617
    0, // G_INTRINSIC_ROUND = 56
1618
    0, // G_LOAD = 57
1619
    0, // G_SEXTLOAD = 58
1620
    0, // G_ZEXTLOAD = 59
1621
    0, // G_STORE = 60
1622
    0, // G_ATOMIC_CMPXCHG_WITH_SUCCESS = 61
1623
    0, // G_ATOMIC_CMPXCHG = 62
1624
    0, // G_ATOMICRMW_XCHG = 63
1625
    0, // G_ATOMICRMW_ADD = 64
1626
    0, // G_ATOMICRMW_SUB = 65
1627
    0, // G_ATOMICRMW_AND = 66
1628
    0, // G_ATOMICRMW_NAND = 67
1629
    0, // G_ATOMICRMW_OR = 68
1630
    0, // G_ATOMICRMW_XOR = 69
1631
    0, // G_ATOMICRMW_MAX = 70
1632
    0, // G_ATOMICRMW_MIN = 71
1633
    0, // G_ATOMICRMW_UMAX = 72
1634
    0, // G_ATOMICRMW_UMIN = 73
1635
    0, // G_BRCOND = 74
1636
    0, // G_BRINDIRECT = 75
1637
    0, // G_INTRINSIC = 76
1638
    0, // G_INTRINSIC_W_SIDE_EFFECTS = 77
1639
    0, // G_ANYEXT = 78
1640
    0, // G_TRUNC = 79
1641
    0, // G_CONSTANT = 80
1642
    0, // G_FCONSTANT = 81
1643
    0, // G_VASTART = 82
1644
    0, // G_VAARG = 83
1645
    0, // G_SEXT = 84
1646
    0, // G_ZEXT = 85
1647
    0, // G_SHL = 86
1648
    0, // G_LSHR = 87
1649
    0, // G_ASHR = 88
1650
    0, // G_ICMP = 89
1651
    0, // G_FCMP = 90
1652
    0, // G_SELECT = 91
1653
    0, // G_UADDO = 92
1654
    0, // G_UADDE = 93
1655
    0, // G_USUBO = 94
1656
    0, // G_USUBE = 95
1657
    0, // G_SADDO = 96
1658
    0, // G_SADDE = 97
1659
    0, // G_SSUBO = 98
1660
    0, // G_SSUBE = 99
1661
    0, // G_UMULO = 100
1662
    0, // G_SMULO = 101
1663
    0, // G_UMULH = 102
1664
    0, // G_SMULH = 103
1665
    0, // G_FADD = 104
1666
    0, // G_FSUB = 105
1667
    0, // G_FMUL = 106
1668
    0, // G_FMA = 107
1669
    0, // G_FDIV = 108
1670
    0, // G_FREM = 109
1671
    0, // G_FPOW = 110
1672
    0, // G_FEXP = 111
1673
    0, // G_FEXP2 = 112
1674
    0, // G_FLOG = 113
1675
    0, // G_FLOG2 = 114
1676
    0, // G_FNEG = 115
1677
    0, // G_FPEXT = 116
1678
    0, // G_FPTRUNC = 117
1679
    0, // G_FPTOSI = 118
1680
    0, // G_FPTOUI = 119
1681
    0, // G_SITOFP = 120
1682
    0, // G_UITOFP = 121
1683
    0, // G_FABS = 122
1684
    0, // G_GEP = 123
1685
    0, // G_PTR_MASK = 124
1686
    0, // G_BR = 125
1687
    0, // G_INSERT_VECTOR_ELT = 126
1688
    0, // G_EXTRACT_VECTOR_ELT = 127
1689
    0, // G_SHUFFLE_VECTOR = 128
1690
    0, // G_CTTZ = 129
1691
    0, // G_CTTZ_ZERO_UNDEF = 130
1692
    0, // G_CTLZ = 131
1693
    0, // G_CTLZ_ZERO_UNDEF = 132
1694
    0, // G_CTPOP = 133
1695
    0, // G_BSWAP = 134
1696
    0, // G_ADDRSPACE_CAST = 135
1697
    0, // G_BLOCK_ADDR = 136
1698
    0, // ADJCALLSTACKDOWN = 137
1699
    0, // ADJCALLSTACKUP = 138
1700
    0, // EH_SJLJ_LONGJMP32ri = 139
1701
    0, // EH_SJLJ_LONGJMP32rr = 140
1702
    0, // EH_SJLJ_SETJMP32ri = 141
1703
    0, // EH_SJLJ_SETJMP32rr = 142
1704
    0, // GETPCX = 143
1705
    0, // SELECT_CC_DFP_FCC = 144
1706
    0, // SELECT_CC_DFP_ICC = 145
1707
    0, // SELECT_CC_FP_FCC = 146
1708
    0, // SELECT_CC_FP_ICC = 147
1709
    0, // SELECT_CC_Int_FCC = 148
1710
    0, // SELECT_CC_Int_ICC = 149
1711
    0, // SELECT_CC_QFP_FCC = 150
1712
    0, // SELECT_CC_QFP_ICC = 151
1713
    0, // SET = 152
1714
    0, // ADDCCri = 153
1715
    0, // ADDCCrr = 154
1716
    0, // ADDCri = 155
1717
    0, // ADDCrr = 156
1718
    0, // ADDEri = 157
1719
    0, // ADDErr = 158
1720
    Feature_HasVIS3 | 0, // ADDXC = 159
1721
    Feature_HasVIS3 | 0, // ADDXCCC = 160
1722
    0, // ADDXri = 161
1723
    0, // ADDXrr = 162
1724
    0, // ADDri = 163
1725
    0, // ADDrr = 164
1726
    Feature_HasVIS | 0, // ALIGNADDR = 165
1727
    Feature_HasVIS | 0, // ALIGNADDRL = 166
1728
    0, // ANDCCri = 167
1729
    0, // ANDCCrr = 168
1730
    0, // ANDNCCri = 169
1731
    0, // ANDNCCrr = 170
1732
    0, // ANDNri = 171
1733
    0, // ANDNrr = 172
1734
    0, // ANDXNrr = 173
1735
    0, // ANDXri = 174
1736
    0, // ANDXrr = 175
1737
    0, // ANDri = 176
1738
    0, // ANDrr = 177
1739
    Feature_HasVIS | 0, // ARRAY16 = 178
1740
    Feature_HasVIS | 0, // ARRAY32 = 179
1741
    Feature_HasVIS | 0, // ARRAY8 = 180
1742
    0, // BA = 181
1743
    0, // BCOND = 182
1744
    0, // BCONDA = 183
1745
    0, // BINDri = 184
1746
    0, // BINDrr = 185
1747
    Feature_HasVIS2 | 0, // BMASK = 186
1748
    Feature_HasV9 | 0, // BPFCC = 187
1749
    Feature_HasV9 | 0, // BPFCCA = 188
1750
    Feature_HasV9 | 0, // BPFCCANT = 189
1751
    Feature_HasV9 | 0, // BPFCCNT = 190
1752
    0, // BPGEZapn = 191
1753
    0, // BPGEZapt = 192
1754
    0, // BPGEZnapn = 193
1755
    0, // BPGEZnapt = 194
1756
    0, // BPGZapn = 195
1757
    0, // BPGZapt = 196
1758
    0, // BPGZnapn = 197
1759
    0, // BPGZnapt = 198
1760
    Feature_HasV9 | 0, // BPICC = 199
1761
    Feature_HasV9 | 0, // BPICCA = 200
1762
    Feature_HasV9 | 0, // BPICCANT = 201
1763
    Feature_HasV9 | 0, // BPICCNT = 202
1764
    0, // BPLEZapn = 203
1765
    0, // BPLEZapt = 204
1766
    0, // BPLEZnapn = 205
1767
    0, // BPLEZnapt = 206
1768
    0, // BPLZapn = 207
1769
    0, // BPLZapt = 208
1770
    0, // BPLZnapn = 209
1771
    0, // BPLZnapt = 210
1772
    0, // BPNZapn = 211
1773
    0, // BPNZapt = 212
1774
    0, // BPNZnapn = 213
1775
    0, // BPNZnapt = 214
1776
    0, // BPXCC = 215
1777
    0, // BPXCCA = 216
1778
    0, // BPXCCANT = 217
1779
    0, // BPXCCNT = 218
1780
    0, // BPZapn = 219
1781
    0, // BPZapt = 220
1782
    0, // BPZnapn = 221
1783
    0, // BPZnapt = 222
1784
    Feature_HasVIS2 | 0, // BSHUFFLE = 223
1785
    0, // CALL = 224
1786
    0, // CALLri = 225
1787
    0, // CALLrr = 226
1788
    0, // CASAasi10 = 227
1789
    0, // CASArr = 228
1790
    0, // CASXrr = 229
1791
    Feature_HasV9 | 0, // CASrr = 230
1792
    0, // CBCOND = 231
1793
    0, // CBCONDA = 232
1794
    Feature_HasVIS3 | 0, // CMASK16 = 233
1795
    Feature_HasVIS3 | 0, // CMASK32 = 234
1796
    Feature_HasVIS3 | 0, // CMASK8 = 235
1797
    0, // CMPri = 236
1798
    0, // CMPrr = 237
1799
    Feature_HasVIS | 0, // EDGE16 = 238
1800
    Feature_HasVIS | 0, // EDGE16L = 239
1801
    Feature_HasVIS2 | 0, // EDGE16LN = 240
1802
    Feature_HasVIS2 | 0, // EDGE16N = 241
1803
    Feature_HasVIS | 0, // EDGE32 = 242
1804
    Feature_HasVIS | 0, // EDGE32L = 243
1805
    Feature_HasVIS2 | 0, // EDGE32LN = 244
1806
    Feature_HasVIS2 | 0, // EDGE32N = 245
1807
    Feature_HasVIS | 0, // EDGE8 = 246
1808
    Feature_HasVIS | 0, // EDGE8L = 247
1809
    Feature_HasVIS2 | 0, // EDGE8LN = 248
1810
    Feature_HasVIS2 | 0, // EDGE8N = 249
1811
    Feature_HasV9 | 0, // FABSD = 250
1812
    Feature_HasV9 | 0, // FABSQ = 251
1813
    0, // FABSS = 252
1814
    0, // FADDD = 253
1815
    0, // FADDQ = 254
1816
    0, // FADDS = 255
1817
    Feature_HasVIS | 0, // FALIGNADATA = 256
1818
    Feature_HasVIS | 0, // FAND = 257
1819
    Feature_HasVIS | 0, // FANDNOT1 = 258
1820
    Feature_HasVIS | 0, // FANDNOT1S = 259
1821
    Feature_HasVIS | 0, // FANDNOT2 = 260
1822
    Feature_HasVIS | 0, // FANDNOT2S = 261
1823
    Feature_HasVIS | 0, // FANDS = 262
1824
    0, // FBCOND = 263
1825
    0, // FBCONDA = 264
1826
    Feature_HasVIS3 | 0, // FCHKSM16 = 265
1827
    0, // FCMPD = 266
1828
    Feature_HasVIS | 0, // FCMPEQ16 = 267
1829
    Feature_HasVIS | 0, // FCMPEQ32 = 268
1830
    Feature_HasVIS | 0, // FCMPGT16 = 269
1831
    Feature_HasVIS | 0, // FCMPGT32 = 270
1832
    Feature_HasVIS | 0, // FCMPLE16 = 271
1833
    Feature_HasVIS | 0, // FCMPLE32 = 272
1834
    Feature_HasVIS | 0, // FCMPNE16 = 273
1835
    Feature_HasVIS | 0, // FCMPNE32 = 274
1836
    0, // FCMPQ = 275
1837
    0, // FCMPS = 276
1838
    0, // FDIVD = 277
1839
    0, // FDIVQ = 278
1840
    0, // FDIVS = 279
1841
    0, // FDMULQ = 280
1842
    0, // FDTOI = 281
1843
    0, // FDTOQ = 282
1844
    0, // FDTOS = 283
1845
    0, // FDTOX = 284
1846
    Feature_HasVIS | 0, // FEXPAND = 285
1847
    Feature_HasVIS3 | 0, // FHADDD = 286
1848
    Feature_HasVIS3 | 0, // FHADDS = 287
1849
    Feature_HasVIS3 | 0, // FHSUBD = 288
1850
    Feature_HasVIS3 | 0, // FHSUBS = 289
1851
    0, // FITOD = 290
1852
    0, // FITOQ = 291
1853
    0, // FITOS = 292
1854
    Feature_HasVIS3 | 0, // FLCMPD = 293
1855
    Feature_HasVIS3 | 0, // FLCMPS = 294
1856
    0, // FLUSH = 295
1857
    Feature_HasV9 | 0, // FLUSHW = 296
1858
    0, // FLUSHri = 297
1859
    0, // FLUSHrr = 298
1860
    Feature_HasVIS3 | 0, // FMEAN16 = 299
1861
    Feature_HasV9 | 0, // FMOVD = 300
1862
    Feature_HasV9 | 0, // FMOVD_FCC = 301
1863
    Feature_HasV9 | 0, // FMOVD_ICC = 302
1864
    0, // FMOVD_XCC = 303
1865
    Feature_HasV9 | 0, // FMOVQ = 304
1866
    Feature_HasV9 | 0, // FMOVQ_FCC = 305
1867
    Feature_HasV9 | 0, // FMOVQ_ICC = 306
1868
    0, // FMOVQ_XCC = 307
1869
    Feature_HasV9 | 0, // FMOVRGEZD = 308
1870
    Feature_HasV9 | 0, // FMOVRGEZQ = 309
1871
    Feature_HasV9 | 0, // FMOVRGEZS = 310
1872
    Feature_HasV9 | 0, // FMOVRGZD = 311
1873
    Feature_HasV9 | 0, // FMOVRGZQ = 312
1874
    Feature_HasV9 | 0, // FMOVRGZS = 313
1875
    Feature_HasV9 | 0, // FMOVRLEZD = 314
1876
    Feature_HasV9 | 0, // FMOVRLEZQ = 315
1877
    Feature_HasV9 | 0, // FMOVRLEZS = 316
1878
    Feature_HasV9 | 0, // FMOVRLZD = 317
1879
    Feature_HasV9 | 0, // FMOVRLZQ = 318
1880
    Feature_HasV9 | 0, // FMOVRLZS = 319
1881
    Feature_HasV9 | 0, // FMOVRNZD = 320
1882
    Feature_HasV9 | 0, // FMOVRNZQ = 321
1883
    Feature_HasV9 | 0, // FMOVRNZS = 322
1884
    Feature_HasV9 | 0, // FMOVRZD = 323
1885
    Feature_HasV9 | 0, // FMOVRZQ = 324
1886
    Feature_HasV9 | 0, // FMOVRZS = 325
1887
    0, // FMOVS = 326
1888
    Feature_HasV9 | 0, // FMOVS_FCC = 327
1889
    Feature_HasV9 | 0, // FMOVS_ICC = 328
1890
    0, // FMOVS_XCC = 329
1891
    Feature_HasVIS | 0, // FMUL8SUX16 = 330
1892
    Feature_HasVIS | 0, // FMUL8ULX16 = 331
1893
    Feature_HasVIS | 0, // FMUL8X16 = 332
1894
    Feature_HasVIS | 0, // FMUL8X16AL = 333
1895
    Feature_HasVIS | 0, // FMUL8X16AU = 334
1896
    0, // FMULD = 335
1897
    Feature_HasVIS | 0, // FMULD8SUX16 = 336
1898
    Feature_HasVIS | 0, // FMULD8ULX16 = 337
1899
    0, // FMULQ = 338
1900
    0, // FMULS = 339
1901
    Feature_HasVIS3 | 0, // FNADDD = 340
1902
    Feature_HasVIS3 | 0, // FNADDS = 341
1903
    Feature_HasVIS | 0, // FNAND = 342
1904
    Feature_HasVIS | 0, // FNANDS = 343
1905
    Feature_HasV9 | 0, // FNEGD = 344
1906
    Feature_HasV9 | 0, // FNEGQ = 345
1907
    0, // FNEGS = 346
1908
    Feature_HasVIS3 | 0, // FNHADDD = 347
1909
    Feature_HasVIS3 | 0, // FNHADDS = 348
1910
    Feature_HasVIS3 | 0, // FNMULD = 349
1911
    Feature_HasVIS3 | 0, // FNMULS = 350
1912
    Feature_HasVIS | 0, // FNOR = 351
1913
    Feature_HasVIS | 0, // FNORS = 352
1914
    Feature_HasVIS | 0, // FNOT1 = 353
1915
    Feature_HasVIS | 0, // FNOT1S = 354
1916
    Feature_HasVIS | 0, // FNOT2 = 355
1917
    Feature_HasVIS | 0, // FNOT2S = 356
1918
    Feature_HasVIS3 | 0, // FNSMULD = 357
1919
    Feature_HasVIS | 0, // FONE = 358
1920
    Feature_HasVIS | 0, // FONES = 359
1921
    Feature_HasVIS | 0, // FOR = 360
1922
    Feature_HasVIS | 0, // FORNOT1 = 361
1923
    Feature_HasVIS | 0, // FORNOT1S = 362
1924
    Feature_HasVIS | 0, // FORNOT2 = 363
1925
    Feature_HasVIS | 0, // FORNOT2S = 364
1926
    Feature_HasVIS | 0, // FORS = 365
1927
    Feature_HasVIS | 0, // FPACK16 = 366
1928
    Feature_HasVIS | 0, // FPACK32 = 367
1929
    Feature_HasVIS | 0, // FPACKFIX = 368
1930
    Feature_HasVIS | 0, // FPADD16 = 369
1931
    Feature_HasVIS | 0, // FPADD16S = 370
1932
    Feature_HasVIS | 0, // FPADD32 = 371
1933
    Feature_HasVIS | 0, // FPADD32S = 372
1934
    Feature_HasVIS3 | 0, // FPADD64 = 373
1935
    Feature_HasVIS | 0, // FPMERGE = 374
1936
    Feature_HasVIS | 0, // FPSUB16 = 375
1937
    Feature_HasVIS | 0, // FPSUB16S = 376
1938
    Feature_HasVIS | 0, // FPSUB32 = 377
1939
    Feature_HasVIS | 0, // FPSUB32S = 378
1940
    0, // FQTOD = 379
1941
    0, // FQTOI = 380
1942
    0, // FQTOS = 381
1943
    0, // FQTOX = 382
1944
    Feature_HasVIS3 | 0, // FSLAS16 = 383
1945
    Feature_HasVIS3 | 0, // FSLAS32 = 384
1946
    Feature_HasVIS3 | 0, // FSLL16 = 385
1947
    Feature_HasVIS3 | 0, // FSLL32 = 386
1948
    0, // FSMULD = 387
1949
    0, // FSQRTD = 388
1950
    0, // FSQRTQ = 389
1951
    0, // FSQRTS = 390
1952
    Feature_HasVIS3 | 0, // FSRA16 = 391
1953
    Feature_HasVIS3 | 0, // FSRA32 = 392
1954
    Feature_HasVIS | 0, // FSRC1 = 393
1955
    Feature_HasVIS | 0, // FSRC1S = 394
1956
    Feature_HasVIS | 0, // FSRC2 = 395
1957
    Feature_HasVIS | 0, // FSRC2S = 396
1958
    Feature_HasVIS3 | 0, // FSRL16 = 397
1959
    Feature_HasVIS3 | 0, // FSRL32 = 398
1960
    0, // FSTOD = 399
1961
    0, // FSTOI = 400
1962
    0, // FSTOQ = 401
1963
    0, // FSTOX = 402
1964
    0, // FSUBD = 403
1965
    0, // FSUBQ = 404
1966
    0, // FSUBS = 405
1967
    Feature_HasVIS | 0, // FXNOR = 406
1968
    Feature_HasVIS | 0, // FXNORS = 407
1969
    Feature_HasVIS | 0, // FXOR = 408
1970
    Feature_HasVIS | 0, // FXORS = 409
1971
    0, // FXTOD = 410
1972
    0, // FXTOQ = 411
1973
    0, // FXTOS = 412
1974
    Feature_HasVIS | 0, // FZERO = 413
1975
    Feature_HasVIS | 0, // FZEROS = 414
1976
    0, // JMPLri = 415
1977
    0, // JMPLrr = 416
1978
    0, // LDArr = 417
1979
    0, // LDCSRri = 418
1980
    0, // LDCSRrr = 419
1981
    0, // LDCri = 420
1982
    0, // LDCrr = 421
1983
    0, // LDDArr = 422
1984
    0, // LDDCri = 423
1985
    0, // LDDCrr = 424
1986
    Feature_HasV9 | 0, // LDDFArr = 425
1987
    0, // LDDFri = 426
1988
    0, // LDDFrr = 427
1989
    0, // LDDri = 428
1990
    0, // LDDrr = 429
1991
    Feature_HasV9 | 0, // LDFArr = 430
1992
    0, // LDFSRri = 431
1993
    0, // LDFSRrr = 432
1994
    0, // LDFri = 433
1995
    0, // LDFrr = 434
1996
    Feature_HasV9 | 0, // LDQFArr = 435
1997
    Feature_HasV9 | 0, // LDQFri = 436
1998
    Feature_HasV9 | 0, // LDQFrr = 437
1999
    0, // LDSBArr = 438
2000
    0, // LDSBri = 439
2001
    0, // LDSBrr = 440
2002
    0, // LDSHArr = 441
2003
    0, // LDSHri = 442
2004
    0, // LDSHrr = 443
2005
    0, // LDSTUBArr = 444
2006
    0, // LDSTUBri = 445
2007
    0, // LDSTUBrr = 446
2008
    0, // LDSWri = 447
2009
    0, // LDSWrr = 448
2010
    0, // LDUBArr = 449
2011
    0, // LDUBri = 450
2012
    0, // LDUBrr = 451
2013
    0, // LDUHArr = 452
2014
    0, // LDUHri = 453
2015
    0, // LDUHrr = 454
2016
    Feature_HasV9 | 0, // LDXFSRri = 455
2017
    Feature_HasV9 | 0, // LDXFSRrr = 456
2018
    0, // LDXri = 457
2019
    0, // LDXrr = 458
2020
    0, // LDri = 459
2021
    0, // LDrr = 460
2022
    0, // LEAX_ADDri = 461
2023
    0, // LEA_ADDri = 462
2024
    Feature_HasVIS3 | 0, // LZCNT = 463
2025
    Feature_HasV9 | 0, // MEMBARi = 464
2026
    Feature_HasVIS3 | 0, // MOVDTOX = 465
2027
    Feature_HasV9 | 0, // MOVFCCri = 466
2028
    Feature_HasV9 | 0, // MOVFCCrr = 467
2029
    Feature_HasV9 | 0, // MOVICCri = 468
2030
    Feature_HasV9 | 0, // MOVICCrr = 469
2031
    0, // MOVRGEZri = 470
2032
    0, // MOVRGEZrr = 471
2033
    0, // MOVRGZri = 472
2034
    0, // MOVRGZrr = 473
2035
    0, // MOVRLEZri = 474
2036
    0, // MOVRLEZrr = 475
2037
    0, // MOVRLZri = 476
2038
    0, // MOVRLZrr = 477
2039
    0, // MOVRNZri = 478
2040
    0, // MOVRNZrr = 479
2041
    0, // MOVRRZri = 480
2042
    0, // MOVRRZrr = 481
2043
    Feature_HasVIS3 | 0, // MOVSTOSW = 482
2044
    Feature_HasVIS3 | 0, // MOVSTOUW = 483
2045
    Feature_HasVIS3 | 0, // MOVWTOS = 484
2046
    0, // MOVXCCri = 485
2047
    0, // MOVXCCrr = 486
2048
    Feature_HasVIS3 | 0, // MOVXTOD = 487
2049
    0, // MULSCCri = 488
2050
    0, // MULSCCrr = 489
2051
    0, // MULXri = 490
2052
    0, // MULXrr = 491
2053
    0, // NOP = 492
2054
    0, // ORCCri = 493
2055
    0, // ORCCrr = 494
2056
    0, // ORNCCri = 495
2057
    0, // ORNCCrr = 496
2058
    0, // ORNri = 497
2059
    0, // ORNrr = 498
2060
    0, // ORXNrr = 499
2061
    0, // ORXri = 500
2062
    0, // ORXrr = 501
2063
    0, // ORri = 502
2064
    0, // ORrr = 503
2065
    Feature_HasVIS | 0, // PDIST = 504
2066
    Feature_HasVIS3 | 0, // PDISTN = 505
2067
    Feature_HasV9 | 0, // POPCrr = 506
2068
    0, // RDASR = 507
2069
    Feature_HasV9 | 0, // RDPR = 508
2070
    0, // RDPSR = 509
2071
    0, // RDTBR = 510
2072
    0, // RDWIM = 511
2073
    0, // RESTOREri = 512
2074
    0, // RESTORErr = 513
2075
    0, // RET = 514
2076
    0, // RETL = 515
2077
    0, // RETTri = 516
2078
    0, // RETTrr = 517
2079
    0, // SAVEri = 518
2080
    0, // SAVErr = 519
2081
    0, // SDIVCCri = 520
2082
    0, // SDIVCCrr = 521
2083
    0, // SDIVXri = 522
2084
    0, // SDIVXrr = 523
2085
    0, // SDIVri = 524
2086
    0, // SDIVrr = 525
2087
    0, // SETHIXi = 526
2088
    0, // SETHIi = 527
2089
    Feature_HasVIS | 0, // SHUTDOWN = 528
2090
    Feature_HasVIS2 | 0, // SIAM = 529
2091
    0, // SLLXri = 530
2092
    0, // SLLXrr = 531
2093
    0, // SLLri = 532
2094
    0, // SLLrr = 533
2095
    0, // SMACri = 534
2096
    0, // SMACrr = 535
2097
    0, // SMULCCri = 536
2098
    0, // SMULCCrr = 537
2099
    0, // SMULri = 538
2100
    0, // SMULrr = 539
2101
    0, // SRAXri = 540
2102
    0, // SRAXrr = 541
2103
    0, // SRAri = 542
2104
    0, // SRArr = 543
2105
    0, // SRLXri = 544
2106
    0, // SRLXrr = 545
2107
    0, // SRLri = 546
2108
    0, // SRLrr = 547
2109
    0, // STArr = 548
2110
    0, // STBAR = 549
2111
    0, // STBArr = 550
2112
    0, // STBri = 551
2113
    0, // STBrr = 552
2114
    0, // STCSRri = 553
2115
    0, // STCSRrr = 554
2116
    0, // STCri = 555
2117
    0, // STCrr = 556
2118
    0, // STDArr = 557
2119
    0, // STDCQri = 558
2120
    0, // STDCQrr = 559
2121
    0, // STDCri = 560
2122
    0, // STDCrr = 561
2123
    Feature_HasV9 | 0, // STDFArr = 562
2124
    0, // STDFQri = 563
2125
    0, // STDFQrr = 564
2126
    0, // STDFri = 565
2127
    0, // STDFrr = 566
2128
    0, // STDri = 567
2129
    0, // STDrr = 568
2130
    Feature_HasV9 | 0, // STFArr = 569
2131
    0, // STFSRri = 570
2132
    0, // STFSRrr = 571
2133
    0, // STFri = 572
2134
    0, // STFrr = 573
2135
    0, // STHArr = 574
2136
    0, // STHri = 575
2137
    0, // STHrr = 576
2138
    Feature_HasV9 | 0, // STQFArr = 577
2139
    Feature_HasV9 | 0, // STQFri = 578
2140
    Feature_HasV9 | 0, // STQFrr = 579
2141
    Feature_HasV9 | 0, // STXFSRri = 580
2142
    Feature_HasV9 | 0, // STXFSRrr = 581
2143
    0, // STXri = 582
2144
    0, // STXrr = 583
2145
    0, // STri = 584
2146
    0, // STrr = 585
2147
    0, // SUBCCri = 586
2148
    0, // SUBCCrr = 587
2149
    0, // SUBCri = 588
2150
    0, // SUBCrr = 589
2151
    0, // SUBEri = 590
2152
    0, // SUBErr = 591
2153
    0, // SUBXri = 592
2154
    0, // SUBXrr = 593
2155
    0, // SUBri = 594
2156
    0, // SUBrr = 595
2157
    0, // SWAPArr = 596
2158
    0, // SWAPri = 597
2159
    0, // SWAPrr = 598
2160
    0, // TA1 = 599
2161
    0, // TA3 = 600
2162
    0, // TA5 = 601
2163
    0, // TADDCCTVri = 602
2164
    0, // TADDCCTVrr = 603
2165
    0, // TADDCCri = 604
2166
    0, // TADDCCrr = 605
2167
    Feature_HasV9 | 0, // TICCri = 606
2168
    Feature_HasV9 | 0, // TICCrr = 607
2169
    0, // TLS_ADDXrr = 608
2170
    0, // TLS_ADDrr = 609
2171
    0, // TLS_CALL = 610
2172
    0, // TLS_LDXrr = 611
2173
    0, // TLS_LDrr = 612
2174
    0, // TRAPri = 613
2175
    0, // TRAPrr = 614
2176
    0, // TSUBCCTVri = 615
2177
    0, // TSUBCCTVrr = 616
2178
    0, // TSUBCCri = 617
2179
    0, // TSUBCCrr = 618
2180
    0, // TXCCri = 619
2181
    0, // TXCCrr = 620
2182
    0, // UDIVCCri = 621
2183
    0, // UDIVCCrr = 622
2184
    0, // UDIVXri = 623
2185
    0, // UDIVXrr = 624
2186
    0, // UDIVri = 625
2187
    0, // UDIVrr = 626
2188
    0, // UMACri = 627
2189
    0, // UMACrr = 628
2190
    0, // UMULCCri = 629
2191
    0, // UMULCCrr = 630
2192
    Feature_HasVIS3 | 0, // UMULXHI = 631
2193
    0, // UMULri = 632
2194
    0, // UMULrr = 633
2195
    0, // UNIMP = 634
2196
    0, // V9FCMPD = 635
2197
    0, // V9FCMPED = 636
2198
    0, // V9FCMPEQ = 637
2199
    0, // V9FCMPES = 638
2200
    0, // V9FCMPQ = 639
2201
    0, // V9FCMPS = 640
2202
    Feature_HasV9 | 0, // V9FMOVD_FCC = 641
2203
    Feature_HasV9 | 0, // V9FMOVQ_FCC = 642
2204
    Feature_HasV9 | 0, // V9FMOVS_FCC = 643
2205
    Feature_HasV9 | 0, // V9MOVFCCri = 644
2206
    Feature_HasV9 | 0, // V9MOVFCCrr = 645
2207
    0, // WRASRri = 646
2208
    0, // WRASRrr = 647
2209
    Feature_HasV9 | 0, // WRPRri = 648
2210
    Feature_HasV9 | 0, // WRPRrr = 649
2211
    0, // WRPSRri = 650
2212
    0, // WRPSRrr = 651
2213
    0, // WRTBRri = 652
2214
    0, // WRTBRrr = 653
2215
    0, // WRWIMri = 654
2216
    0, // WRWIMrr = 655
2217
    Feature_HasVIS3 | 0, // XMULX = 656
2218
    Feature_HasVIS3 | 0, // XMULXHI = 657
2219
    0, // XNORCCri = 658
2220
    0, // XNORCCrr = 659
2221
    0, // XNORXrr = 660
2222
    0, // XNORri = 661
2223
    0, // XNORrr = 662
2224
    0, // XORCCri = 663
2225
    0, // XORCCrr = 664
2226
    0, // XORXri = 665
2227
    0, // XORXrr = 666
2228
    0, // XORri = 667
2229
    0, // XORrr = 668
2230
  };
2231
2232
  assert(Inst.getOpcode() < 669);
2233
  uint64_t MissingFeatures =
2234
      (AvailableFeatures & RequiredFeatures[Inst.getOpcode()]) ^
2235
      RequiredFeatures[Inst.getOpcode()];
2236
  if (MissingFeatures) {
2237
    std::ostringstream Msg;
2238
    Msg << "Attempting to emit " << MCII.getName(Inst.getOpcode()).str()
2239
        << " instruction but the ";
2240
    for (unsigned i = 0; i < 8 * sizeof(MissingFeatures); ++i)
2241
      if (MissingFeatures & (1ULL << i))
2242
        Msg << SubtargetFeatureNames[i] << " ";
2243
    Msg << "predicate(s) are not met";
2244
    report_fatal_error(Msg.str());
2245
  }
2246
#else
2247
// Silence unused variable warning on targets that don't use MCII for other purposes (e.g. BPF).
2248
1.98k
(void)MCII;
2249
1.98k
#endif // NDEBUG
2250
1.98k
}
2251
#endif