Coverage Report

Created: 2018-07-12 09:57

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/clang-build/lib/Target/Sparc/SparcGenMCCodeEmitter.inc
Line
Count
Source (jump to first uncovered line)
1
/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2
|*                                                                            *|
3
|* Machine Code Emitter                                                       *|
4
|*                                                                            *|
5
|* Automatically generated file, do not edit!                                 *|
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|*                                                                            *|
7
\*===----------------------------------------------------------------------===*/
8
9
uint64_t SparcMCCodeEmitter::getBinaryCodeForInstr(const MCInst &MI,
10
    SmallVectorImpl<MCFixup> &Fixups,
11
1.85k
    const MCSubtargetInfo &STI) const {
12
1.85k
  static const uint64_t InstBits[] = {
13
1.85k
    UINT64_C(0),
14
1.85k
    UINT64_C(0),
15
1.85k
    UINT64_C(0),
16
1.85k
    UINT64_C(0),
17
1.85k
    UINT64_C(0),
18
1.85k
    UINT64_C(0),
19
1.85k
    UINT64_C(0),
20
1.85k
    UINT64_C(0),
21
1.85k
    UINT64_C(0),
22
1.85k
    UINT64_C(0),
23
1.85k
    UINT64_C(0),
24
1.85k
    UINT64_C(0),
25
1.85k
    UINT64_C(0),
26
1.85k
    UINT64_C(0),
27
1.85k
    UINT64_C(0),
28
1.85k
    UINT64_C(0),
29
1.85k
    UINT64_C(0),
30
1.85k
    UINT64_C(0),
31
1.85k
    UINT64_C(0),
32
1.85k
    UINT64_C(0),
33
1.85k
    UINT64_C(0),
34
1.85k
    UINT64_C(0),
35
1.85k
    UINT64_C(0),
36
1.85k
    UINT64_C(0),
37
1.85k
    UINT64_C(0),
38
1.85k
    UINT64_C(0),
39
1.85k
    UINT64_C(0),
40
1.85k
    UINT64_C(0),
41
1.85k
    UINT64_C(0),
42
1.85k
    UINT64_C(0),
43
1.85k
    UINT64_C(0),
44
1.85k
    UINT64_C(0),
45
1.85k
    UINT64_C(0),
46
1.85k
    UINT64_C(0),
47
1.85k
    UINT64_C(0),
48
1.85k
    UINT64_C(0),
49
1.85k
    UINT64_C(0),
50
1.85k
    UINT64_C(0),
51
1.85k
    UINT64_C(0),
52
1.85k
    UINT64_C(0),
53
1.85k
    UINT64_C(0),
54
1.85k
    UINT64_C(0),
55
1.85k
    UINT64_C(0),
56
1.85k
    UINT64_C(0),
57
1.85k
    UINT64_C(0),
58
1.85k
    UINT64_C(0),
59
1.85k
    UINT64_C(0),
60
1.85k
    UINT64_C(0),
61
1.85k
    UINT64_C(0),
62
1.85k
    UINT64_C(0),
63
1.85k
    UINT64_C(0),
64
1.85k
    UINT64_C(0),
65
1.85k
    UINT64_C(0),
66
1.85k
    UINT64_C(0),
67
1.85k
    UINT64_C(0),
68
1.85k
    UINT64_C(0),
69
1.85k
    UINT64_C(0),
70
1.85k
    UINT64_C(0),
71
1.85k
    UINT64_C(0),
72
1.85k
    UINT64_C(0),
73
1.85k
    UINT64_C(0),
74
1.85k
    UINT64_C(0),
75
1.85k
    UINT64_C(0),
76
1.85k
    UINT64_C(0),
77
1.85k
    UINT64_C(0),
78
1.85k
    UINT64_C(0),
79
1.85k
    UINT64_C(0),
80
1.85k
    UINT64_C(0),
81
1.85k
    UINT64_C(0),
82
1.85k
    UINT64_C(0),
83
1.85k
    UINT64_C(0),
84
1.85k
    UINT64_C(0),
85
1.85k
    UINT64_C(0),
86
1.85k
    UINT64_C(0),
87
1.85k
    UINT64_C(0),
88
1.85k
    UINT64_C(0),
89
1.85k
    UINT64_C(0),
90
1.85k
    UINT64_C(0),
91
1.85k
    UINT64_C(0),
92
1.85k
    UINT64_C(0),
93
1.85k
    UINT64_C(0),
94
1.85k
    UINT64_C(0),
95
1.85k
    UINT64_C(0),
96
1.85k
    UINT64_C(0),
97
1.85k
    UINT64_C(0),
98
1.85k
    UINT64_C(0),
99
1.85k
    UINT64_C(0),
100
1.85k
    UINT64_C(0),
101
1.85k
    UINT64_C(0),
102
1.85k
    UINT64_C(0),
103
1.85k
    UINT64_C(0),
104
1.85k
    UINT64_C(0),
105
1.85k
    UINT64_C(0),
106
1.85k
    UINT64_C(0),
107
1.85k
    UINT64_C(0),
108
1.85k
    UINT64_C(0),
109
1.85k
    UINT64_C(0),
110
1.85k
    UINT64_C(0),
111
1.85k
    UINT64_C(0),
112
1.85k
    UINT64_C(0),
113
1.85k
    UINT64_C(0),
114
1.85k
    UINT64_C(0),
115
1.85k
    UINT64_C(0),
116
1.85k
    UINT64_C(0),
117
1.85k
    UINT64_C(0),
118
1.85k
    UINT64_C(0),
119
1.85k
    UINT64_C(0),
120
1.85k
    UINT64_C(0),
121
1.85k
    UINT64_C(0),
122
1.85k
    UINT64_C(0),
123
1.85k
    UINT64_C(0),
124
1.85k
    UINT64_C(0),
125
1.85k
    UINT64_C(0),
126
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    UINT64_C(0),
127
1.85k
    UINT64_C(0),
128
1.85k
    UINT64_C(0),
129
1.85k
    UINT64_C(0),
130
1.85k
    UINT64_C(0),
131
1.85k
    UINT64_C(0),
132
1.85k
    UINT64_C(0),
133
1.85k
    UINT64_C(0),
134
1.85k
    UINT64_C(0),
135
1.85k
    UINT64_C(0),
136
1.85k
    UINT64_C(0),
137
1.85k
    UINT64_C(0),
138
1.85k
    UINT64_C(0),
139
1.85k
    UINT64_C(0),
140
1.85k
    UINT64_C(0),
141
1.85k
    UINT64_C(0),
142
1.85k
    UINT64_C(0),
143
1.85k
    UINT64_C(0),
144
1.85k
    UINT64_C(0),
145
1.85k
    UINT64_C(0),
146
1.85k
    UINT64_C(0),
147
1.85k
    UINT64_C(0),
148
1.85k
    UINT64_C(0),
149
1.85k
    UINT64_C(0),
150
1.85k
    UINT64_C(0),
151
1.85k
    UINT64_C(0),
152
1.85k
    UINT64_C(0),
153
1.85k
    UINT64_C(0),
154
1.85k
    UINT64_C(2155880448), // ADDCCri
155
1.85k
    UINT64_C(2155872256), // ADDCCrr
156
1.85k
    UINT64_C(2151686144), // ADDCri
157
1.85k
    UINT64_C(2151677952), // ADDCrr
158
1.85k
    UINT64_C(2160074752), // ADDEri
159
1.85k
    UINT64_C(2160066560), // ADDErr
160
1.85k
    UINT64_C(2175795744), // ADDXC
161
1.85k
    UINT64_C(2175795808), // ADDXCCC
162
1.85k
    UINT64_C(2147491840), // ADDXri
163
1.85k
    UINT64_C(2147483648), // ADDXrr
164
1.85k
    UINT64_C(2147491840), // ADDri
165
1.85k
    UINT64_C(2147483648), // ADDrr
166
1.85k
    UINT64_C(2175795968), // ALIGNADDR
167
1.85k
    UINT64_C(2175796032), // ALIGNADDRL
168
1.85k
    UINT64_C(2156404736), // ANDCCri
169
1.85k
    UINT64_C(2156396544), // ANDCCrr
170
1.85k
    UINT64_C(2158501888), // ANDNCCri
171
1.85k
    UINT64_C(2158493696), // ANDNCCrr
172
1.85k
    UINT64_C(2150113280), // ANDNri
173
1.85k
    UINT64_C(2150105088), // ANDNrr
174
1.85k
    UINT64_C(2150105088), // ANDXNrr
175
1.85k
    UINT64_C(2148016128), // ANDXri
176
1.85k
    UINT64_C(2148007936), // ANDXrr
177
1.85k
    UINT64_C(2148016128), // ANDri
178
1.85k
    UINT64_C(2148007936), // ANDrr
179
1.85k
    UINT64_C(2175795776), // ARRAY16
180
1.85k
    UINT64_C(2175795840), // ARRAY32
181
1.85k
    UINT64_C(2175795712), // ARRAY8
182
1.85k
    UINT64_C(276824064),  // BA
183
1.85k
    UINT64_C(8388608),  // BCOND
184
1.85k
    UINT64_C(545259520),  // BCONDA
185
1.85k
    UINT64_C(2176851968), // BINDri
186
1.85k
    UINT64_C(2176843776), // BINDrr
187
1.85k
    UINT64_C(2175796000), // BMASK
188
1.85k
    UINT64_C(21495808), // BPFCC
189
1.85k
    UINT64_C(558366720),  // BPFCCA
190
1.85k
    UINT64_C(557842432),  // BPFCCANT
191
1.85k
    UINT64_C(20971520), // BPFCCNT
192
1.85k
    UINT64_C(784334848),  // BPGEZapn
193
1.85k
    UINT64_C(784859136),  // BPGEZapt
194
1.85k
    UINT64_C(247463936),  // BPGEZnapn
195
1.85k
    UINT64_C(247988224),  // BPGEZnapt
196
1.85k
    UINT64_C(750780416),  // BPGZapn
197
1.85k
    UINT64_C(751304704),  // BPGZapt
198
1.85k
    UINT64_C(213909504),  // BPGZnapn
199
1.85k
    UINT64_C(214433792),  // BPGZnapt
200
1.85k
    UINT64_C(4718592),  // BPICC
201
1.85k
    UINT64_C(541589504),  // BPICCA
202
1.85k
    UINT64_C(541065216),  // BPICCANT
203
1.85k
    UINT64_C(4194304),  // BPICCNT
204
1.85k
    UINT64_C(616562688),  // BPLEZapn
205
1.85k
    UINT64_C(617086976),  // BPLEZapt
206
1.85k
    UINT64_C(79691776), // BPLEZnapn
207
1.85k
    UINT64_C(80216064), // BPLEZnapt
208
1.85k
    UINT64_C(650117120),  // BPLZapn
209
1.85k
    UINT64_C(650641408),  // BPLZapt
210
1.85k
    UINT64_C(113246208),  // BPLZnapn
211
1.85k
    UINT64_C(113770496),  // BPLZnapt
212
1.85k
    UINT64_C(717225984),  // BPNZapn
213
1.85k
    UINT64_C(717750272),  // BPNZapt
214
1.85k
    UINT64_C(180355072),  // BPNZnapn
215
1.85k
    UINT64_C(180879360),  // BPNZnapt
216
1.85k
    UINT64_C(6815744),  // BPXCC
217
1.85k
    UINT64_C(543686656),  // BPXCCA
218
1.85k
    UINT64_C(543162368),  // BPXCCANT
219
1.85k
    UINT64_C(6291456),  // BPXCCNT
220
1.85k
    UINT64_C(583008256),  // BPZapn
221
1.85k
    UINT64_C(583532544),  // BPZapt
222
1.85k
    UINT64_C(46137344), // BPZnapn
223
1.85k
    UINT64_C(46661632), // BPZnapt
224
1.85k
    UINT64_C(2175796096), // BSHUFFLE
225
1.85k
    UINT64_C(1073741824), // CALL
226
1.85k
    UINT64_C(2680168448), // CALLri
227
1.85k
    UINT64_C(2680160256), // CALLrr
228
1.85k
    UINT64_C(3252683072), // CASAasi10
229
1.85k
    UINT64_C(3252682752), // CASArr
230
1.85k
    UINT64_C(3253735424), // CASXrr
231
1.85k
    UINT64_C(3252686848), // CASrr
232
1.85k
    UINT64_C(29360128), // CBCOND
233
1.85k
    UINT64_C(566231040),  // CBCONDA
234
1.85k
    UINT64_C(2175796128), // CMASK16
235
1.85k
    UINT64_C(2175796192), // CMASK32
236
1.85k
    UINT64_C(2175796064), // CMASK8
237
1.85k
    UINT64_C(2157977600), // CMPri
238
1.85k
    UINT64_C(2157969408), // CMPrr
239
1.85k
    UINT64_C(2175795328), // EDGE16
240
1.85k
    UINT64_C(2175795392), // EDGE16L
241
1.85k
    UINT64_C(2175795424), // EDGE16LN
242
1.85k
    UINT64_C(2175795360), // EDGE16N
243
1.85k
    UINT64_C(2175795456), // EDGE32
244
1.85k
    UINT64_C(2175795520), // EDGE32L
245
1.85k
    UINT64_C(2175795552), // EDGE32LN
246
1.85k
    UINT64_C(2175795488), // EDGE32N
247
1.85k
    UINT64_C(2175795200), // EDGE8
248
1.85k
    UINT64_C(2175795264), // EDGE8L
249
1.85k
    UINT64_C(2175795296), // EDGE8LN
250
1.85k
    UINT64_C(2175795232), // EDGE8N
251
1.85k
    UINT64_C(2174746944), // FABSD
252
1.85k
    UINT64_C(2174746976), // FABSQ
253
1.85k
    UINT64_C(2174746912), // FABSS
254
1.85k
    UINT64_C(2174748736), // FADDD
255
1.85k
    UINT64_C(2174748768), // FADDQ
256
1.85k
    UINT64_C(2174748704), // FADDS
257
1.85k
    UINT64_C(2175797504), // FALIGNADATA
258
1.85k
    UINT64_C(2175798784), // FAND
259
1.85k
    UINT64_C(2175798528), // FANDNOT1
260
1.85k
    UINT64_C(2175798560), // FANDNOT1S
261
1.85k
    UINT64_C(2175798400), // FANDNOT2
262
1.85k
    UINT64_C(2175798432), // FANDNOT2S
263
1.85k
    UINT64_C(2175798816), // FANDS
264
1.85k
    UINT64_C(25165824), // FBCOND
265
1.85k
    UINT64_C(562036736),  // FBCONDA
266
1.85k
    UINT64_C(2175797376), // FCHKSM16
267
1.85k
    UINT64_C(2175273536), // FCMPD
268
1.85k
    UINT64_C(2175796544), // FCMPEQ16
269
1.85k
    UINT64_C(2175796672), // FCMPEQ32
270
1.85k
    UINT64_C(2175796480), // FCMPGT16
271
1.85k
    UINT64_C(2175796608), // FCMPGT32
272
1.85k
    UINT64_C(2175796224), // FCMPLE16
273
1.85k
    UINT64_C(2175796352), // FCMPLE32
274
1.85k
    UINT64_C(2175796288), // FCMPNE16
275
1.85k
    UINT64_C(2175796416), // FCMPNE32
276
1.85k
    UINT64_C(2175273568), // FCMPQ
277
1.85k
    UINT64_C(2175273504), // FCMPS
278
1.85k
    UINT64_C(2174749120), // FDIVD
279
1.85k
    UINT64_C(2174749152), // FDIVQ
280
1.85k
    UINT64_C(2174749088), // FDIVS
281
1.85k
    UINT64_C(2174750144), // FDMULQ
282
1.85k
    UINT64_C(2174753344), // FDTOI
283
1.85k
    UINT64_C(2174753216), // FDTOQ
284
1.85k
    UINT64_C(2174752960), // FDTOS
285
1.85k
    UINT64_C(2174750784), // FDTOX
286
1.85k
    UINT64_C(2175797664), // FEXPAND
287
1.85k
    UINT64_C(2174749760), // FHADDD
288
1.85k
    UINT64_C(2174749728), // FHADDS
289
1.85k
    UINT64_C(2174749888), // FHSUBD
290
1.85k
    UINT64_C(2174749856), // FHSUBS
291
1.85k
    UINT64_C(2174753024), // FITOD
292
1.85k
    UINT64_C(2174753152), // FITOQ
293
1.85k
    UINT64_C(2174752896), // FITOS
294
1.85k
    UINT64_C(2175806016), // FLCMPD
295
1.85k
    UINT64_C(2175805984), // FLCMPS
296
1.85k
    UINT64_C(2178416640), // FLUSH
297
1.85k
    UINT64_C(2170028032), // FLUSHW
298
1.85k
    UINT64_C(2178424832), // FLUSHri
299
1.85k
    UINT64_C(2178416640), // FLUSHrr
300
1.85k
    UINT64_C(2175797248), // FMEAN16
301
1.85k
    UINT64_C(2174746688), // FMOVD
302
1.85k
    UINT64_C(2175270976), // FMOVD_FCC
303
1.85k
    UINT64_C(2175279168), // FMOVD_ICC
304
1.85k
    UINT64_C(2175283264), // FMOVD_XCC
305
1.85k
    UINT64_C(2174746720), // FMOVQ
306
1.85k
    UINT64_C(2175271008), // FMOVQ_FCC
307
1.85k
    UINT64_C(2175279200), // FMOVQ_ICC
308
1.85k
    UINT64_C(2175283296), // FMOVQ_XCC
309
1.85k
    UINT64_C(2175278272), // FMOVRGEZD
310
1.85k
    UINT64_C(2175278304), // FMOVRGEZQ
311
1.85k
    UINT64_C(2175278240), // FMOVRGEZS
312
1.85k
    UINT64_C(2175277248), // FMOVRGZD
313
1.85k
    UINT64_C(2175277280), // FMOVRGZQ
314
1.85k
    UINT64_C(2175277216), // FMOVRGZS
315
1.85k
    UINT64_C(2175273152), // FMOVRLEZD
316
1.85k
    UINT64_C(2175273184), // FMOVRLEZQ
317
1.85k
    UINT64_C(2175273120), // FMOVRLEZS
318
1.85k
    UINT64_C(2175274176), // FMOVRLZD
319
1.85k
    UINT64_C(2175274208), // FMOVRLZQ
320
1.85k
    UINT64_C(2175274144), // FMOVRLZS
321
1.85k
    UINT64_C(2175276224), // FMOVRNZD
322
1.85k
    UINT64_C(2175276256), // FMOVRNZQ
323
1.85k
    UINT64_C(2175276192), // FMOVRNZS
324
1.85k
    UINT64_C(2175272128), // FMOVRZD
325
1.85k
    UINT64_C(2175272160), // FMOVRZQ
326
1.85k
    UINT64_C(2175272096), // FMOVRZS
327
1.85k
    UINT64_C(2174746656), // FMOVS
328
1.85k
    UINT64_C(2175270944), // FMOVS_FCC
329
1.85k
    UINT64_C(2175279136), // FMOVS_ICC
330
1.85k
    UINT64_C(2175283232), // FMOVS_XCC
331
1.85k
    UINT64_C(2175796928), // FMUL8SUX16
332
1.85k
    UINT64_C(2175796960), // FMUL8ULX16
333
1.85k
    UINT64_C(2175796768), // FMUL8X16
334
1.85k
    UINT64_C(2175796896), // FMUL8X16AL
335
1.85k
    UINT64_C(2175796832), // FMUL8X16AU
336
1.85k
    UINT64_C(2174748992), // FMULD
337
1.85k
    UINT64_C(2175796992), // FMULD8SUX16
338
1.85k
    UINT64_C(2175797024), // FMULD8ULX16
339
1.85k
    UINT64_C(2174749024), // FMULQ
340
1.85k
    UINT64_C(2174748960), // FMULS
341
1.85k
    UINT64_C(2174749248), // FNADDD
342
1.85k
    UINT64_C(2174749216), // FNADDS
343
1.85k
    UINT64_C(2175798720), // FNAND
344
1.85k
    UINT64_C(2175798752), // FNANDS
345
1.85k
    UINT64_C(2174746816), // FNEGD
346
1.85k
    UINT64_C(2174746848), // FNEGQ
347
1.85k
    UINT64_C(2174746784), // FNEGS
348
1.85k
    UINT64_C(2174750272), // FNHADDD
349
1.85k
    UINT64_C(2174750240), // FNHADDS
350
1.85k
    UINT64_C(2174749504), // FNMULD
351
1.85k
    UINT64_C(2174749472), // FNMULS
352
1.85k
    UINT64_C(2175798336), // FNOR
353
1.85k
    UINT64_C(2175798368), // FNORS
354
1.85k
    UINT64_C(2175798592), // FNOT1
355
1.85k
    UINT64_C(2175798624), // FNOT1S
356
1.85k
    UINT64_C(2175798464), // FNOT2
357
1.85k
    UINT64_C(2175798496), // FNOT2S
358
1.85k
    UINT64_C(2174750496), // FNSMULD
359
1.85k
    UINT64_C(2175799232), // FONE
360
1.85k
    UINT64_C(2175799264), // FONES
361
1.85k
    UINT64_C(2175799168), // FOR
362
1.85k
    UINT64_C(2175799104), // FORNOT1
363
1.85k
    UINT64_C(2175799136), // FORNOT1S
364
1.85k
    UINT64_C(2175798976), // FORNOT2
365
1.85k
    UINT64_C(2175799008), // FORNOT2S
366
1.85k
    UINT64_C(2175799200), // FORS
367
1.85k
    UINT64_C(2175797088), // FPACK16
368
1.85k
    UINT64_C(2175797056), // FPACK32
369
1.85k
    UINT64_C(2175797152), // FPACKFIX
370
1.85k
    UINT64_C(2175797760), // FPADD16
371
1.85k
    UINT64_C(2175797792), // FPADD16S
372
1.85k
    UINT64_C(2175797824), // FPADD32
373
1.85k
    UINT64_C(2175797856), // FPADD32S
374
1.85k
    UINT64_C(2175797312), // FPADD64
375
1.85k
    UINT64_C(2175797600), // FPMERGE
376
1.85k
    UINT64_C(2175797888), // FPSUB16
377
1.85k
    UINT64_C(2175797920), // FPSUB16S
378
1.85k
    UINT64_C(2175797952), // FPSUB32
379
1.85k
    UINT64_C(2175797984), // FPSUB32S
380
1.85k
    UINT64_C(2174753120), // FQTOD
381
1.85k
    UINT64_C(2174753376), // FQTOI
382
1.85k
    UINT64_C(2174752992), // FQTOS
383
1.85k
    UINT64_C(2174750816), // FQTOX
384
1.85k
    UINT64_C(2175796512), // FSLAS16
385
1.85k
    UINT64_C(2175796640), // FSLAS32
386
1.85k
    UINT64_C(2175796256), // FSLL16
387
1.85k
    UINT64_C(2175796384), // FSLL32
388
1.85k
    UINT64_C(2174749984), // FSMULD
389
1.85k
    UINT64_C(2174747968), // FSQRTD
390
1.85k
    UINT64_C(2174748000), // FSQRTQ
391
1.85k
    UINT64_C(2174747936), // FSQRTS
392
1.85k
    UINT64_C(2175796576), // FSRA16
393
1.85k
    UINT64_C(2175796704), // FSRA32
394
1.85k
    UINT64_C(2175798912), // FSRC1
395
1.85k
    UINT64_C(2175798944), // FSRC1S
396
1.85k
    UINT64_C(2175799040), // FSRC2
397
1.85k
    UINT64_C(2175799072), // FSRC2S
398
1.85k
    UINT64_C(2175796320), // FSRL16
399
1.85k
    UINT64_C(2175796448), // FSRL32
400
1.85k
    UINT64_C(2174753056), // FSTOD
401
1.85k
    UINT64_C(2174753312), // FSTOI
402
1.85k
    UINT64_C(2174753184), // FSTOQ
403
1.85k
    UINT64_C(2174750752), // FSTOX
404
1.85k
    UINT64_C(2174748864), // FSUBD
405
1.85k
    UINT64_C(2174748896), // FSUBQ
406
1.85k
    UINT64_C(2174748832), // FSUBS
407
1.85k
    UINT64_C(2175798848), // FXNOR
408
1.85k
    UINT64_C(2175798880), // FXNORS
409
1.85k
    UINT64_C(2175798656), // FXOR
410
1.85k
    UINT64_C(2175798688), // FXORS
411
1.85k
    UINT64_C(2174750976), // FXTOD
412
1.85k
    UINT64_C(2174751104), // FXTOQ
413
1.85k
    UINT64_C(2174750848), // FXTOS
414
1.85k
    UINT64_C(2175798272), // FZERO
415
1.85k
    UINT64_C(2175798304), // FZEROS
416
1.85k
    UINT64_C(2176851968), // JMPLri
417
1.85k
    UINT64_C(2176843776), // JMPLrr
418
1.85k
    UINT64_C(3229614080), // LDArr
419
1.85k
    UINT64_C(3246923776), // LDCSRri
420
1.85k
    UINT64_C(3246915584), // LDCSRrr
421
1.85k
    UINT64_C(3246399488), // LDCri
422
1.85k
    UINT64_C(3246391296), // LDCrr
423
1.85k
    UINT64_C(3231186944), // LDDArr
424
1.85k
    UINT64_C(3247972352), // LDDCri
425
1.85k
    UINT64_C(3247964160), // LDDCrr
426
1.85k
    UINT64_C(3247964160), // LDDFArr
427
1.85k
    UINT64_C(3239583744), // LDDFri
428
1.85k
    UINT64_C(3239575552), // LDDFrr
429
1.85k
    UINT64_C(3222806528), // LDDri
430
1.85k
    UINT64_C(3222798336), // LDDrr
431
1.85k
    UINT64_C(3246391296), // LDFArr
432
1.85k
    UINT64_C(3238535168), // LDFSRri
433
1.85k
    UINT64_C(3238526976), // LDFSRrr
434
1.85k
    UINT64_C(3238010880), // LDFri
435
1.85k
    UINT64_C(3238002688), // LDFrr
436
1.85k
    UINT64_C(3247439872), // LDQFArr
437
1.85k
    UINT64_C(3239059456), // LDQFri
438
1.85k
    UINT64_C(3239051264), // LDQFrr
439
1.85k
    UINT64_C(3234332672), // LDSBArr
440
1.85k
    UINT64_C(3225952256), // LDSBri
441
1.85k
    UINT64_C(3225944064), // LDSBrr
442
1.85k
    UINT64_C(3234856960), // LDSHArr
443
1.85k
    UINT64_C(3226476544), // LDSHri
444
1.85k
    UINT64_C(3226468352), // LDSHrr
445
1.85k
    UINT64_C(3236429824), // LDSTUBArr
446
1.85k
    UINT64_C(3228049408), // LDSTUBri
447
1.85k
    UINT64_C(3228041216), // LDSTUBrr
448
1.85k
    UINT64_C(3225427968), // LDSWri
449
1.85k
    UINT64_C(3225419776), // LDSWrr
450
1.85k
    UINT64_C(3230138368), // LDUBArr
451
1.85k
    UINT64_C(3221757952), // LDUBri
452
1.85k
    UINT64_C(3221749760), // LDUBrr
453
1.85k
    UINT64_C(3230662656), // LDUHArr
454
1.85k
    UINT64_C(3222282240), // LDUHri
455
1.85k
    UINT64_C(3222274048), // LDUHrr
456
1.85k
    UINT64_C(3272089600), // LDXFSRri
457
1.85k
    UINT64_C(3272081408), // LDXFSRrr
458
1.85k
    UINT64_C(3227000832), // LDXri
459
1.85k
    UINT64_C(3226992640), // LDXrr
460
1.85k
    UINT64_C(3221233664), // LDri
461
1.85k
    UINT64_C(3221225472), // LDrr
462
1.85k
    UINT64_C(2147491840), // LEAX_ADDri
463
1.85k
    UINT64_C(2147491840), // LEA_ADDri
464
1.85k
    UINT64_C(2175795936), // LZCNT
465
1.85k
    UINT64_C(2168709120), // MEMBARi
466
1.85k
    UINT64_C(2175803904), // MOVDTOX
467
1.85k
    UINT64_C(2170560512), // MOVFCCri
468
1.85k
    UINT64_C(2170552320), // MOVFCCrr
469
1.85k
    UINT64_C(2170822656), // MOVICCri
470
1.85k
    UINT64_C(2170814464), // MOVICCrr
471
1.85k
    UINT64_C(2172140544), // MOVRGEZri
472
1.85k
    UINT64_C(2172132352), // MOVRGEZrr
473
1.85k
    UINT64_C(2172139520), // MOVRGZri
474
1.85k
    UINT64_C(2172131328), // MOVRGZrr
475
1.85k
    UINT64_C(2172135424), // MOVRLEZri
476
1.85k
    UINT64_C(2172127232), // MOVRLEZrr
477
1.85k
    UINT64_C(2172136448), // MOVRLZri
478
1.85k
    UINT64_C(2172128256), // MOVRLZrr
479
1.85k
    UINT64_C(2172138496), // MOVRNZri
480
1.85k
    UINT64_C(2172130304), // MOVRNZrr
481
1.85k
    UINT64_C(2172134400), // MOVRRZri
482
1.85k
    UINT64_C(2172126208), // MOVRRZrr
483
1.85k
    UINT64_C(2175804000), // MOVSTOSW
484
1.85k
    UINT64_C(2175803936), // MOVSTOUW
485
1.85k
    UINT64_C(2175804192), // MOVWTOS
486
1.85k
    UINT64_C(2170826752), // MOVXCCri
487
1.85k
    UINT64_C(2170818560), // MOVXCCrr
488
1.85k
    UINT64_C(2175804160), // MOVXTOD
489
1.85k
    UINT64_C(2166366208), // MULSCCri
490
1.85k
    UINT64_C(2166358016), // MULSCCrr
491
1.85k
    UINT64_C(2152210432), // MULXri
492
1.85k
    UINT64_C(2152202240), // MULXrr
493
1.85k
    UINT64_C(16777216), // NOP
494
1.85k
    UINT64_C(2156929024), // ORCCri
495
1.85k
    UINT64_C(2156920832), // ORCCrr
496
1.85k
    UINT64_C(2159026176), // ORNCCri
497
1.85k
    UINT64_C(2159017984), // ORNCCrr
498
1.85k
    UINT64_C(2150637568), // ORNri
499
1.85k
    UINT64_C(2150629376), // ORNrr
500
1.85k
    UINT64_C(2150629376), // ORXNrr
501
1.85k
    UINT64_C(2148540416), // ORXri
502
1.85k
    UINT64_C(2148532224), // ORXrr
503
1.85k
    UINT64_C(2148540416), // ORri
504
1.85k
    UINT64_C(2148532224), // ORrr
505
1.85k
    UINT64_C(2175797184), // PDIST
506
1.85k
    UINT64_C(2175797216), // PDISTN
507
1.85k
    UINT64_C(2171600896), // POPCrr
508
1.85k
    UINT64_C(2168455168), // RDASR
509
1.85k
    UINT64_C(2169503744), // RDPR
510
1.85k
    UINT64_C(2168979456), // RDPSR
511
1.85k
    UINT64_C(2170028032), // RDTBR
512
1.85k
    UINT64_C(2169503744), // RDWIM
513
1.85k
    UINT64_C(2179473408), // RESTOREri
514
1.85k
    UINT64_C(2179465216), // RESTORErr
515
1.85k
    UINT64_C(2177359872), // RET
516
1.85k
    UINT64_C(2177097728), // RETL
517
1.85k
    UINT64_C(2177376256), // RETTri
518
1.85k
    UINT64_C(2177368064), // RETTrr
519
1.85k
    UINT64_C(2178949120), // SAVEri
520
1.85k
    UINT64_C(2178940928), // SAVErr
521
1.85k
    UINT64_C(2163744768), // SDIVCCri
522
1.85k
    UINT64_C(2163736576), // SDIVCCrr
523
1.85k
    UINT64_C(2171084800), // SDIVXri
524
1.85k
    UINT64_C(2171076608), // SDIVXrr
525
1.85k
    UINT64_C(2155356160), // SDIVri
526
1.85k
    UINT64_C(2155347968), // SDIVrr
527
1.85k
    UINT64_C(16777216), // SETHIXi
528
1.85k
    UINT64_C(16777216), // SETHIi
529
1.85k
    UINT64_C(2175799296), // SHUTDOWN
530
1.85k
    UINT64_C(2175799328), // SIAM
531
1.85k
    UINT64_C(2166894592), // SLLXri
532
1.85k
    UINT64_C(2166886400), // SLLXrr
533
1.85k
    UINT64_C(2166890496), // SLLri
534
1.85k
    UINT64_C(2166882304), // SLLrr
535
1.85k
    UINT64_C(2180521984), // SMACri
536
1.85k
    UINT64_C(2180513792), // SMACrr
537
1.85k
    UINT64_C(2161647616), // SMULCCri
538
1.85k
    UINT64_C(2161639424), // SMULCCrr
539
1.85k
    UINT64_C(2153259008), // SMULri
540
1.85k
    UINT64_C(2153250816), // SMULrr
541
1.85k
    UINT64_C(2167943168), // SRAXri
542
1.85k
    UINT64_C(2167934976), // SRAXrr
543
1.85k
    UINT64_C(2167939072), // SRAri
544
1.85k
    UINT64_C(2167930880), // SRArr
545
1.85k
    UINT64_C(2167418880), // SRLXri
546
1.85k
    UINT64_C(2167410688), // SRLXrr
547
1.85k
    UINT64_C(2167414784), // SRLri
548
1.85k
    UINT64_C(2167406592), // SRLrr
549
1.85k
    UINT64_C(3231711232), // STArr
550
1.85k
    UINT64_C(2168700928), // STBAR
551
1.85k
    UINT64_C(3232235520), // STBArr
552
1.85k
    UINT64_C(3223855104), // STBri
553
1.85k
    UINT64_C(3223846912), // STBrr
554
1.85k
    UINT64_C(3249020928), // STCSRri
555
1.85k
    UINT64_C(3249012736), // STCSRrr
556
1.85k
    UINT64_C(3248496640), // STCri
557
1.85k
    UINT64_C(3248488448), // STCrr
558
1.85k
    UINT64_C(3233284096), // STDArr
559
1.85k
    UINT64_C(3249545216), // STDCQri
560
1.85k
    UINT64_C(3249537024), // STDCQrr
561
1.85k
    UINT64_C(3250069504), // STDCri
562
1.85k
    UINT64_C(3250061312), // STDCrr
563
1.85k
    UINT64_C(3250061312), // STDFArr
564
1.85k
    UINT64_C(3241156608), // STDFQri
565
1.85k
    UINT64_C(3241148416), // STDFQrr
566
1.85k
    UINT64_C(3241680896), // STDFri
567
1.85k
    UINT64_C(3241672704), // STDFrr
568
1.85k
    UINT64_C(3224903680), // STDri
569
1.85k
    UINT64_C(3224895488), // STDrr
570
1.85k
    UINT64_C(3248488448), // STFArr
571
1.85k
    UINT64_C(3240632320), // STFSRri
572
1.85k
    UINT64_C(3240624128), // STFSRrr
573
1.85k
    UINT64_C(3240108032), // STFri
574
1.85k
    UINT64_C(3240099840), // STFrr
575
1.85k
    UINT64_C(3232759808), // STHArr
576
1.85k
    UINT64_C(3224379392), // STHri
577
1.85k
    UINT64_C(3224371200), // STHrr
578
1.85k
    UINT64_C(3249537024), // STQFArr
579
1.85k
    UINT64_C(3241156608), // STQFri
580
1.85k
    UINT64_C(3241148416), // STQFrr
581
1.85k
    UINT64_C(3274186752), // STXFSRri
582
1.85k
    UINT64_C(3274178560), // STXFSRrr
583
1.85k
    UINT64_C(3228573696), // STXri
584
1.85k
    UINT64_C(3228565504), // STXrr
585
1.85k
    UINT64_C(3223330816), // STri
586
1.85k
    UINT64_C(3223322624), // STrr
587
1.85k
    UINT64_C(2157977600), // SUBCCri
588
1.85k
    UINT64_C(2157969408), // SUBCCrr
589
1.85k
    UINT64_C(2153783296), // SUBCri
590
1.85k
    UINT64_C(2153775104), // SUBCrr
591
1.85k
    UINT64_C(2162171904), // SUBEri
592
1.85k
    UINT64_C(2162163712), // SUBErr
593
1.85k
    UINT64_C(2149588992), // SUBXri
594
1.85k
    UINT64_C(2149580800), // SUBXrr
595
1.85k
    UINT64_C(2149588992), // SUBri
596
1.85k
    UINT64_C(2149580800), // SUBrr
597
1.85k
    UINT64_C(3237478400), // SWAPArr
598
1.85k
    UINT64_C(3229097984), // SWAPri
599
1.85k
    UINT64_C(3229089792), // SWAPrr
600
1.85k
    UINT64_C(2177916931), // TA3
601
1.85k
    UINT64_C(2446336005), // TA5
602
1.85k
    UINT64_C(2165317632), // TADDCCTVri
603
1.85k
    UINT64_C(2165309440), // TADDCCTVrr
604
1.85k
    UINT64_C(2164269056), // TADDCCri
605
1.85k
    UINT64_C(2164260864), // TADDCCrr
606
1.85k
    UINT64_C(2177900544), // TICCri
607
1.85k
    UINT64_C(2177892352), // TICCrr
608
1.85k
    UINT64_C(2147483648), // TLS_ADDXrr
609
1.85k
    UINT64_C(2147483648), // TLS_ADDrr
610
1.85k
    UINT64_C(1073741824), // TLS_CALL
611
1.85k
    UINT64_C(3226992640), // TLS_LDXrr
612
1.85k
    UINT64_C(3221225472), // TLS_LDrr
613
1.85k
    UINT64_C(2177900544), // TRAPri
614
1.85k
    UINT64_C(2177892352), // TRAPrr
615
1.85k
    UINT64_C(2165841920), // TSUBCCTVri
616
1.85k
    UINT64_C(2165833728), // TSUBCCTVrr
617
1.85k
    UINT64_C(2164793344), // TSUBCCri
618
1.85k
    UINT64_C(2164785152), // TSUBCCrr
619
1.85k
    UINT64_C(2177904640), // TXCCri
620
1.85k
    UINT64_C(2177896448), // TXCCrr
621
1.85k
    UINT64_C(2163220480), // UDIVCCri
622
1.85k
    UINT64_C(2163212288), // UDIVCCrr
623
1.85k
    UINT64_C(2154307584), // UDIVXri
624
1.85k
    UINT64_C(2154299392), // UDIVXrr
625
1.85k
    UINT64_C(2154831872), // UDIVri
626
1.85k
    UINT64_C(2154823680), // UDIVrr
627
1.85k
    UINT64_C(2179997696), // UMACri
628
1.85k
    UINT64_C(2179989504), // UMACrr
629
1.85k
    UINT64_C(2161123328), // UMULCCri
630
1.85k
    UINT64_C(2161115136), // UMULCCrr
631
1.85k
    UINT64_C(2175795904), // UMULXHI
632
1.85k
    UINT64_C(2152734720), // UMULri
633
1.85k
    UINT64_C(2152726528), // UMULrr
634
1.85k
    UINT64_C(0),  // UNIMP
635
1.85k
    UINT64_C(2175273536), // V9FCMPD
636
1.85k
    UINT64_C(2175273664), // V9FCMPED
637
1.85k
    UINT64_C(2175273696), // V9FCMPEQ
638
1.85k
    UINT64_C(2175273632), // V9FCMPES
639
1.85k
    UINT64_C(2175273568), // V9FCMPQ
640
1.85k
    UINT64_C(2175273504), // V9FCMPS
641
1.85k
    UINT64_C(2175270976), // V9FMOVD_FCC
642
1.85k
    UINT64_C(2175271008), // V9FMOVQ_FCC
643
1.85k
    UINT64_C(2175270944), // V9FMOVS_FCC
644
1.85k
    UINT64_C(2170560512), // V9MOVFCCri
645
1.85k
    UINT64_C(2170552320), // V9MOVFCCrr
646
1.85k
    UINT64_C(2172657664), // WRASRri
647
1.85k
    UINT64_C(2172649472), // WRASRrr
648
1.85k
    UINT64_C(2173706240), // WRPRri
649
1.85k
    UINT64_C(2173698048), // WRPRrr
650
1.85k
    UINT64_C(2173181952), // WRPSRri
651
1.85k
    UINT64_C(2173173760), // WRPSRrr
652
1.85k
    UINT64_C(2174230528), // WRTBRri
653
1.85k
    UINT64_C(2174222336), // WRTBRrr
654
1.85k
    UINT64_C(2173706240), // WRWIMri
655
1.85k
    UINT64_C(2173698048), // WRWIMrr
656
1.85k
    UINT64_C(2175804064), // XMULX
657
1.85k
    UINT64_C(2175804128), // XMULXHI
658
1.85k
    UINT64_C(2159550464), // XNORCCri
659
1.85k
    UINT64_C(2159542272), // XNORCCrr
660
1.85k
    UINT64_C(2151153664), // XNORXrr
661
1.85k
    UINT64_C(2151161856), // XNORri
662
1.85k
    UINT64_C(2151153664), // XNORrr
663
1.85k
    UINT64_C(2157453312), // XORCCri
664
1.85k
    UINT64_C(2157445120), // XORCCrr
665
1.85k
    UINT64_C(2149064704), // XORXri
666
1.85k
    UINT64_C(2149056512), // XORXrr
667
1.85k
    UINT64_C(2149064704), // XORri
668
1.85k
    UINT64_C(2149056512), // XORrr
669
1.85k
    UINT64_C(0)
670
1.85k
  };
671
1.85k
  const unsigned opcode = MI.getOpcode();
672
1.85k
  uint64_t Value = InstBits[opcode];
673
1.85k
  uint64_t op = 0;
674
1.85k
  (void)op;  // suppress warning
675
1.85k
  switch (opcode) {
676
1.85k
    case SP::FLUSH:
677
14
    case SP::FLUSHW:
678
14
    case SP::NOP:
679
14
    case SP::SHUTDOWN:
680
14
    case SP::SIAM:
681
14
    case SP::STBAR:
682
14
    case SP::TA3:
683
14
    case SP::TA5: {
684
14
      break;
685
14
    }
686
94
    case SP::BPFCC:
687
94
    case SP::BPFCCA:
688
94
    case SP::BPFCCANT:
689
94
    case SP::BPFCCNT: {
690
94
      // op: cc
691
94
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
692
94
      Value |= (op & UINT64_C(3)) << 20;
693
94
      // op: cond
694
94
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
695
94
      Value |= (op & UINT64_C(15)) << 25;
696
94
      // op: imm19
697
94
      op = getBranchPredTargetOpValue(MI, 0, Fixups, STI);
698
94
      Value |= op & UINT64_C(524287);
699
94
      break;
700
94
    }
701
148
    case SP::BPICC:
702
148
    case SP::BPICCA:
703
148
    case SP::BPICCANT:
704
148
    case SP::BPICCNT:
705
148
    case SP::BPXCC:
706
148
    case SP::BPXCCA:
707
148
    case SP::BPXCCANT:
708
148
    case SP::BPXCCNT: {
709
148
      // op: cond
710
148
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
711
148
      Value |= (op & UINT64_C(15)) << 25;
712
148
      // op: imm19
713
148
      op = getBranchPredTargetOpValue(MI, 0, Fixups, STI);
714
148
      Value |= op & UINT64_C(524287);
715
148
      break;
716
148
    }
717
148
    case SP::CALL:
718
24
    case SP::TLS_CALL: {
719
24
      // op: disp
720
24
      op = getCallTargetOpValue(MI, 0, Fixups, STI);
721
24
      Value |= op & UINT64_C(1073741823);
722
24
      break;
723
24
    }
724
24
    case SP::BPGEZapn:
725
11
    case SP::BPGEZapt:
726
11
    case SP::BPGEZnapn:
727
11
    case SP::BPGEZnapt:
728
11
    case SP::BPGZapn:
729
11
    case SP::BPGZapt:
730
11
    case SP::BPGZnapn:
731
11
    case SP::BPGZnapt:
732
11
    case SP::BPLEZapn:
733
11
    case SP::BPLEZapt:
734
11
    case SP::BPLEZnapn:
735
11
    case SP::BPLEZnapt:
736
11
    case SP::BPLZapn:
737
11
    case SP::BPLZapt:
738
11
    case SP::BPLZnapn:
739
11
    case SP::BPLZnapt:
740
11
    case SP::BPNZapn:
741
11
    case SP::BPNZapt:
742
11
    case SP::BPNZnapn:
743
11
    case SP::BPNZnapt:
744
11
    case SP::BPZapn:
745
11
    case SP::BPZapt:
746
11
    case SP::BPZnapn:
747
11
    case SP::BPZnapt: {
748
11
      // op: imm16
749
11
      op = getBranchOnRegTargetOpValue(MI, 1, Fixups, STI);
750
11
      Value |= (op & UINT64_C(49152)) << 6;
751
11
      Value |= op & UINT64_C(16383);
752
11
      // op: rs1
753
11
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
754
11
      Value |= (op & UINT64_C(31)) << 14;
755
11
      break;
756
11
    }
757
11
    case SP::BA: {
758
4
      // op: imm22
759
4
      op = getBranchTargetOpValue(MI, 0, Fixups, STI);
760
4
      Value |= op & UINT64_C(4194303);
761
4
      break;
762
11
    }
763
225
    case SP::BCOND:
764
225
    case SP::BCONDA:
765
225
    case SP::CBCOND:
766
225
    case SP::CBCONDA:
767
225
    case SP::FBCOND:
768
225
    case SP::FBCONDA: {
769
225
      // op: imm22
770
225
      op = getBranchTargetOpValue(MI, 0, Fixups, STI);
771
225
      Value |= op & UINT64_C(4194303);
772
225
      // op: cond
773
225
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
774
225
      Value |= (op & UINT64_C(15)) << 25;
775
225
      break;
776
225
    }
777
225
    case SP::UNIMP: {
778
1
      // op: imm22
779
1
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
780
1
      Value |= op & UINT64_C(4194303);
781
1
      break;
782
225
    }
783
225
    case SP::SETHIXi:
784
99
    case SP::SETHIi: {
785
99
      // op: imm22
786
99
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
787
99
      Value |= op & UINT64_C(4194303);
788
99
      // op: rd
789
99
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
790
99
      Value |= (op & UINT64_C(31)) << 25;
791
99
      break;
792
99
    }
793
99
    case SP::FONE:
794
19
    case SP::FONES:
795
19
    case SP::FZERO:
796
19
    case SP::FZEROS:
797
19
    case SP::RDPSR:
798
19
    case SP::RDTBR:
799
19
    case SP::RDWIM: {
800
19
      // op: rd
801
19
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
802
19
      Value |= (op & UINT64_C(31)) << 25;
803
19
      break;
804
19
    }
805
19
    case SP::V9MOVFCCrr: {
806
15
      // op: rd
807
15
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
808
15
      Value |= (op & UINT64_C(31)) << 25;
809
15
      // op: cc
810
15
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
811
15
      Value |= (op & UINT64_C(3)) << 11;
812
15
      // op: cond
813
15
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
814
15
      Value |= (op & UINT64_C(15)) << 14;
815
15
      // op: rs2
816
15
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
817
15
      Value |= op & UINT64_C(31);
818
15
      break;
819
19
    }
820
19
    case SP::V9MOVFCCri: {
821
0
      // op: rd
822
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
823
0
      Value |= (op & UINT64_C(31)) << 25;
824
0
      // op: cc
825
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
826
0
      Value |= (op & UINT64_C(3)) << 11;
827
0
      // op: cond
828
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
829
0
      Value |= (op & UINT64_C(15)) << 14;
830
0
      // op: simm11
831
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
832
0
      Value |= op & UINT64_C(2047);
833
0
      break;
834
19
    }
835
56
    case SP::FMOVD_FCC:
836
56
    case SP::FMOVD_ICC:
837
56
    case SP::FMOVD_XCC:
838
56
    case SP::FMOVQ_FCC:
839
56
    case SP::FMOVQ_ICC:
840
56
    case SP::FMOVQ_XCC:
841
56
    case SP::FMOVS_FCC:
842
56
    case SP::FMOVS_ICC:
843
56
    case SP::FMOVS_XCC:
844
56
    case SP::MOVFCCrr:
845
56
    case SP::MOVICCrr:
846
56
    case SP::MOVXCCrr: {
847
56
      // op: rd
848
56
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
849
56
      Value |= (op & UINT64_C(31)) << 25;
850
56
      // op: cond
851
56
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
852
56
      Value |= (op & UINT64_C(15)) << 14;
853
56
      // op: rs2
854
56
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
855
56
      Value |= op & UINT64_C(31);
856
56
      break;
857
56
    }
858
56
    case SP::MOVFCCri:
859
0
    case SP::MOVICCri:
860
0
    case SP::MOVXCCri: {
861
0
      // op: rd
862
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
863
0
      Value |= (op & UINT64_C(31)) << 25;
864
0
      // op: cond
865
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
866
0
      Value |= (op & UINT64_C(15)) << 14;
867
0
      // op: simm11
868
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
869
0
      Value |= op & UINT64_C(2047);
870
0
      break;
871
0
    }
872
15
    case SP::V9FMOVD_FCC:
873
15
    case SP::V9FMOVQ_FCC:
874
15
    case SP::V9FMOVS_FCC: {
875
15
      // op: rd
876
15
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
877
15
      Value |= (op & UINT64_C(31)) << 25;
878
15
      // op: cond
879
15
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
880
15
      Value |= (op & UINT64_C(15)) << 14;
881
15
      // op: opf_cc
882
15
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
883
15
      Value |= (op & UINT64_C(3)) << 11;
884
15
      // op: rs2
885
15
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
886
15
      Value |= op & UINT64_C(31);
887
15
      break;
888
15
    }
889
31
    case SP::FNOT1:
890
31
    case SP::FNOT1S:
891
31
    case SP::FSRC1:
892
31
    case SP::FSRC1S:
893
31
    case SP::RDASR:
894
31
    case SP::RDPR: {
895
31
      // op: rd
896
31
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
897
31
      Value |= (op & UINT64_C(31)) << 25;
898
31
      // op: rs1
899
31
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
900
31
      Value |= (op & UINT64_C(31)) << 14;
901
31
      break;
902
31
    }
903
31
    case SP::LDArr:
904
20
    case SP::LDDArr:
905
20
    case SP::LDDFArr:
906
20
    case SP::LDFArr:
907
20
    case SP::LDQFArr:
908
20
    case SP::LDSBArr:
909
20
    case SP::LDSHArr:
910
20
    case SP::LDSTUBArr:
911
20
    case SP::LDUBArr:
912
20
    case SP::LDUHArr:
913
20
    case SP::SWAPArr: {
914
20
      // op: rd
915
20
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
916
20
      Value |= (op & UINT64_C(31)) << 25;
917
20
      // op: rs1
918
20
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
919
20
      Value |= (op & UINT64_C(31)) << 14;
920
20
      // op: asi
921
20
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
922
20
      Value |= (op & UINT64_C(255)) << 5;
923
20
      // op: rs2
924
20
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
925
20
      Value |= op & UINT64_C(31);
926
20
      break;
927
20
    }
928
20
    case SP::CASArr: {
929
10
      // op: rd
930
10
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
931
10
      Value |= (op & UINT64_C(31)) << 25;
932
10
      // op: rs1
933
10
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
934
10
      Value |= (op & UINT64_C(31)) << 14;
935
10
      // op: asi
936
10
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
937
10
      Value |= (op & UINT64_C(255)) << 5;
938
10
      // op: rs2
939
10
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
940
10
      Value |= op & UINT64_C(31);
941
10
      break;
942
20
    }
943
354
    case SP::ADDCCrr:
944
354
    case SP::ADDCrr:
945
354
    case SP::ADDErr:
946
354
    case SP::ADDXC:
947
354
    case SP::ADDXCCC:
948
354
    case SP::ADDXrr:
949
354
    case SP::ADDrr:
950
354
    case SP::ALIGNADDR:
951
354
    case SP::ALIGNADDRL:
952
354
    case SP::ANDCCrr:
953
354
    case SP::ANDNCCrr:
954
354
    case SP::ANDNrr:
955
354
    case SP::ANDXNrr:
956
354
    case SP::ANDXrr:
957
354
    case SP::ANDrr:
958
354
    case SP::ARRAY16:
959
354
    case SP::ARRAY32:
960
354
    case SP::ARRAY8:
961
354
    case SP::BMASK:
962
354
    case SP::BSHUFFLE:
963
354
    case SP::CASAasi10:
964
354
    case SP::CASXrr:
965
354
    case SP::CASrr:
966
354
    case SP::EDGE16:
967
354
    case SP::EDGE16L:
968
354
    case SP::EDGE16LN:
969
354
    case SP::EDGE16N:
970
354
    case SP::EDGE32:
971
354
    case SP::EDGE32L:
972
354
    case SP::EDGE32LN:
973
354
    case SP::EDGE32N:
974
354
    case SP::EDGE8:
975
354
    case SP::EDGE8L:
976
354
    case SP::EDGE8LN:
977
354
    case SP::EDGE8N:
978
354
    case SP::FADDD:
979
354
    case SP::FADDQ:
980
354
    case SP::FADDS:
981
354
    case SP::FALIGNADATA:
982
354
    case SP::FAND:
983
354
    case SP::FANDNOT1:
984
354
    case SP::FANDNOT1S:
985
354
    case SP::FANDNOT2:
986
354
    case SP::FANDNOT2S:
987
354
    case SP::FANDS:
988
354
    case SP::FCHKSM16:
989
354
    case SP::FCMPEQ16:
990
354
    case SP::FCMPEQ32:
991
354
    case SP::FCMPGT16:
992
354
    case SP::FCMPGT32:
993
354
    case SP::FCMPLE16:
994
354
    case SP::FCMPLE32:
995
354
    case SP::FCMPNE16:
996
354
    case SP::FCMPNE32:
997
354
    case SP::FDIVD:
998
354
    case SP::FDIVQ:
999
354
    case SP::FDIVS:
1000
354
    case SP::FDMULQ:
1001
354
    case SP::FHADDD:
1002
354
    case SP::FHADDS:
1003
354
    case SP::FHSUBD:
1004
354
    case SP::FHSUBS:
1005
354
    case SP::FLCMPD:
1006
354
    case SP::FLCMPS:
1007
354
    case SP::FMEAN16:
1008
354
    case SP::FMOVRGEZD:
1009
354
    case SP::FMOVRGEZQ:
1010
354
    case SP::FMOVRGEZS:
1011
354
    case SP::FMOVRGZD:
1012
354
    case SP::FMOVRGZQ:
1013
354
    case SP::FMOVRGZS:
1014
354
    case SP::FMOVRLEZD:
1015
354
    case SP::FMOVRLEZQ:
1016
354
    case SP::FMOVRLEZS:
1017
354
    case SP::FMOVRLZD:
1018
354
    case SP::FMOVRLZQ:
1019
354
    case SP::FMOVRLZS:
1020
354
    case SP::FMOVRNZD:
1021
354
    case SP::FMOVRNZQ:
1022
354
    case SP::FMOVRNZS:
1023
354
    case SP::FMOVRZD:
1024
354
    case SP::FMOVRZQ:
1025
354
    case SP::FMOVRZS:
1026
354
    case SP::FMUL8SUX16:
1027
354
    case SP::FMUL8ULX16:
1028
354
    case SP::FMUL8X16:
1029
354
    case SP::FMUL8X16AL:
1030
354
    case SP::FMUL8X16AU:
1031
354
    case SP::FMULD:
1032
354
    case SP::FMULD8SUX16:
1033
354
    case SP::FMULD8ULX16:
1034
354
    case SP::FMULQ:
1035
354
    case SP::FMULS:
1036
354
    case SP::FNADDD:
1037
354
    case SP::FNADDS:
1038
354
    case SP::FNAND:
1039
354
    case SP::FNANDS:
1040
354
    case SP::FNHADDD:
1041
354
    case SP::FNHADDS:
1042
354
    case SP::FNMULD:
1043
354
    case SP::FNMULS:
1044
354
    case SP::FNOR:
1045
354
    case SP::FNORS:
1046
354
    case SP::FNSMULD:
1047
354
    case SP::FOR:
1048
354
    case SP::FORNOT1:
1049
354
    case SP::FORNOT1S:
1050
354
    case SP::FORNOT2:
1051
354
    case SP::FORNOT2S:
1052
354
    case SP::FORS:
1053
354
    case SP::FPACK32:
1054
354
    case SP::FPADD16:
1055
354
    case SP::FPADD16S:
1056
354
    case SP::FPADD32:
1057
354
    case SP::FPADD32S:
1058
354
    case SP::FPADD64:
1059
354
    case SP::FPMERGE:
1060
354
    case SP::FPSUB16:
1061
354
    case SP::FPSUB16S:
1062
354
    case SP::FPSUB32:
1063
354
    case SP::FPSUB32S:
1064
354
    case SP::FSLAS16:
1065
354
    case SP::FSLAS32:
1066
354
    case SP::FSLL16:
1067
354
    case SP::FSLL32:
1068
354
    case SP::FSMULD:
1069
354
    case SP::FSRA16:
1070
354
    case SP::FSRA32:
1071
354
    case SP::FSRL16:
1072
354
    case SP::FSRL32:
1073
354
    case SP::FSUBD:
1074
354
    case SP::FSUBQ:
1075
354
    case SP::FSUBS:
1076
354
    case SP::FXNOR:
1077
354
    case SP::FXNORS:
1078
354
    case SP::FXOR:
1079
354
    case SP::FXORS:
1080
354
    case SP::JMPLrr:
1081
354
    case SP::LDCrr:
1082
354
    case SP::LDDCrr:
1083
354
    case SP::LDDFrr:
1084
354
    case SP::LDDrr:
1085
354
    case SP::LDFrr:
1086
354
    case SP::LDQFrr:
1087
354
    case SP::LDSBrr:
1088
354
    case SP::LDSHrr:
1089
354
    case SP::LDSTUBrr:
1090
354
    case SP::LDSWrr:
1091
354
    case SP::LDUBrr:
1092
354
    case SP::LDUHrr:
1093
354
    case SP::LDXrr:
1094
354
    case SP::LDrr:
1095
354
    case SP::MOVRGEZrr:
1096
354
    case SP::MOVRGZrr:
1097
354
    case SP::MOVRLEZrr:
1098
354
    case SP::MOVRLZrr:
1099
354
    case SP::MOVRNZrr:
1100
354
    case SP::MOVRRZrr:
1101
354
    case SP::MULSCCrr:
1102
354
    case SP::MULXrr:
1103
354
    case SP::ORCCrr:
1104
354
    case SP::ORNCCrr:
1105
354
    case SP::ORNrr:
1106
354
    case SP::ORXNrr:
1107
354
    case SP::ORXrr:
1108
354
    case SP::ORrr:
1109
354
    case SP::PDIST:
1110
354
    case SP::PDISTN:
1111
354
    case SP::RESTORErr:
1112
354
    case SP::SAVErr:
1113
354
    case SP::SDIVCCrr:
1114
354
    case SP::SDIVXrr:
1115
354
    case SP::SDIVrr:
1116
354
    case SP::SLLXrr:
1117
354
    case SP::SLLrr:
1118
354
    case SP::SMACrr:
1119
354
    case SP::SMULCCrr:
1120
354
    case SP::SMULrr:
1121
354
    case SP::SRAXrr:
1122
354
    case SP::SRArr:
1123
354
    case SP::SRLXrr:
1124
354
    case SP::SRLrr:
1125
354
    case SP::SUBCCrr:
1126
354
    case SP::SUBCrr:
1127
354
    case SP::SUBErr:
1128
354
    case SP::SUBXrr:
1129
354
    case SP::SUBrr:
1130
354
    case SP::SWAPrr:
1131
354
    case SP::TADDCCTVrr:
1132
354
    case SP::TADDCCrr:
1133
354
    case SP::TLS_ADDXrr:
1134
354
    case SP::TLS_ADDrr:
1135
354
    case SP::TLS_LDXrr:
1136
354
    case SP::TLS_LDrr:
1137
354
    case SP::TSUBCCTVrr:
1138
354
    case SP::TSUBCCrr:
1139
354
    case SP::UDIVCCrr:
1140
354
    case SP::UDIVXrr:
1141
354
    case SP::UDIVrr:
1142
354
    case SP::UMACrr:
1143
354
    case SP::UMULCCrr:
1144
354
    case SP::UMULXHI:
1145
354
    case SP::UMULrr:
1146
354
    case SP::V9FCMPD:
1147
354
    case SP::V9FCMPED:
1148
354
    case SP::V9FCMPEQ:
1149
354
    case SP::V9FCMPES:
1150
354
    case SP::V9FCMPQ:
1151
354
    case SP::V9FCMPS:
1152
354
    case SP::WRASRrr:
1153
354
    case SP::WRPRrr:
1154
354
    case SP::XMULX:
1155
354
    case SP::XMULXHI:
1156
354
    case SP::XNORCCrr:
1157
354
    case SP::XNORXrr:
1158
354
    case SP::XNORrr:
1159
354
    case SP::XORCCrr:
1160
354
    case SP::XORXrr:
1161
354
    case SP::XORrr: {
1162
354
      // op: rd
1163
354
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1164
354
      Value |= (op & UINT64_C(31)) << 25;
1165
354
      // op: rs1
1166
354
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
1167
354
      Value |= (op & UINT64_C(31)) << 14;
1168
354
      // op: rs2
1169
354
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
1170
354
      Value |= op & UINT64_C(31);
1171
354
      break;
1172
354
    }
1173
354
    case SP::SLLXri:
1174
6
    case SP::SRAXri:
1175
6
    case SP::SRLXri: {
1176
6
      // op: rd
1177
6
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1178
6
      Value |= (op & UINT64_C(31)) << 25;
1179
6
      // op: rs1
1180
6
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
1181
6
      Value |= (op & UINT64_C(31)) << 14;
1182
6
      // op: shcnt
1183
6
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
1184
6
      Value |= op & UINT64_C(63);
1185
6
      break;
1186
6
    }
1187
6
    case SP::MOVRGEZri:
1188
0
    case SP::MOVRGZri:
1189
0
    case SP::MOVRLEZri:
1190
0
    case SP::MOVRLZri:
1191
0
    case SP::MOVRNZri:
1192
0
    case SP::MOVRRZri: {
1193
0
      // op: rd
1194
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1195
0
      Value |= (op & UINT64_C(31)) << 25;
1196
0
      // op: rs1
1197
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
1198
0
      Value |= (op & UINT64_C(31)) << 14;
1199
0
      // op: simm10
1200
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
1201
0
      Value |= op & UINT64_C(1023);
1202
0
      break;
1203
0
    }
1204
260
    case SP::ADDCCri:
1205
260
    case SP::ADDCri:
1206
260
    case SP::ADDEri:
1207
260
    case SP::ADDXri:
1208
260
    case SP::ADDri:
1209
260
    case SP::ANDCCri:
1210
260
    case SP::ANDNCCri:
1211
260
    case SP::ANDNri:
1212
260
    case SP::ANDXri:
1213
260
    case SP::ANDri:
1214
260
    case SP::JMPLri:
1215
260
    case SP::LDCri:
1216
260
    case SP::LDDCri:
1217
260
    case SP::LDDFri:
1218
260
    case SP::LDDri:
1219
260
    case SP::LDFri:
1220
260
    case SP::LDQFri:
1221
260
    case SP::LDSBri:
1222
260
    case SP::LDSHri:
1223
260
    case SP::LDSTUBri:
1224
260
    case SP::LDSWri:
1225
260
    case SP::LDUBri:
1226
260
    case SP::LDUHri:
1227
260
    case SP::LDXri:
1228
260
    case SP::LDri:
1229
260
    case SP::LEAX_ADDri:
1230
260
    case SP::LEA_ADDri:
1231
260
    case SP::MULSCCri:
1232
260
    case SP::MULXri:
1233
260
    case SP::ORCCri:
1234
260
    case SP::ORNCCri:
1235
260
    case SP::ORNri:
1236
260
    case SP::ORXri:
1237
260
    case SP::ORri:
1238
260
    case SP::RESTOREri:
1239
260
    case SP::SAVEri:
1240
260
    case SP::SDIVCCri:
1241
260
    case SP::SDIVXri:
1242
260
    case SP::SDIVri:
1243
260
    case SP::SLLri:
1244
260
    case SP::SMACri:
1245
260
    case SP::SMULCCri:
1246
260
    case SP::SMULri:
1247
260
    case SP::SRAri:
1248
260
    case SP::SRLri:
1249
260
    case SP::SUBCCri:
1250
260
    case SP::SUBCri:
1251
260
    case SP::SUBEri:
1252
260
    case SP::SUBXri:
1253
260
    case SP::SUBri:
1254
260
    case SP::SWAPri:
1255
260
    case SP::TADDCCTVri:
1256
260
    case SP::TADDCCri:
1257
260
    case SP::TSUBCCTVri:
1258
260
    case SP::TSUBCCri:
1259
260
    case SP::UDIVCCri:
1260
260
    case SP::UDIVXri:
1261
260
    case SP::UDIVri:
1262
260
    case SP::UMACri:
1263
260
    case SP::UMULCCri:
1264
260
    case SP::UMULri:
1265
260
    case SP::WRASRri:
1266
260
    case SP::WRPRri:
1267
260
    case SP::XNORCCri:
1268
260
    case SP::XNORri:
1269
260
    case SP::XORCCri:
1270
260
    case SP::XORXri:
1271
260
    case SP::XORri: {
1272
260
      // op: rd
1273
260
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1274
260
      Value |= (op & UINT64_C(31)) << 25;
1275
260
      // op: rs1
1276
260
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
1277
260
      Value |= (op & UINT64_C(31)) << 14;
1278
260
      // op: simm13
1279
260
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
1280
260
      Value |= op & UINT64_C(8191);
1281
260
      break;
1282
260
    }
1283
260
    case SP::FABSD:
1284
31
    case SP::FABSQ:
1285
31
    case SP::FABSS:
1286
31
    case SP::FDTOI:
1287
31
    case SP::FDTOQ:
1288
31
    case SP::FDTOS:
1289
31
    case SP::FDTOX:
1290
31
    case SP::FEXPAND:
1291
31
    case SP::FITOD:
1292
31
    case SP::FITOQ:
1293
31
    case SP::FITOS:
1294
31
    case SP::FMOVD:
1295
31
    case SP::FMOVQ:
1296
31
    case SP::FMOVS:
1297
31
    case SP::FNEGD:
1298
31
    case SP::FNEGQ:
1299
31
    case SP::FNEGS:
1300
31
    case SP::FNOT2:
1301
31
    case SP::FNOT2S:
1302
31
    case SP::FPACK16:
1303
31
    case SP::FPACKFIX:
1304
31
    case SP::FQTOD:
1305
31
    case SP::FQTOI:
1306
31
    case SP::FQTOS:
1307
31
    case SP::FQTOX:
1308
31
    case SP::FSQRTD:
1309
31
    case SP::FSQRTQ:
1310
31
    case SP::FSQRTS:
1311
31
    case SP::FSRC2:
1312
31
    case SP::FSRC2S:
1313
31
    case SP::FSTOD:
1314
31
    case SP::FSTOI:
1315
31
    case SP::FSTOQ:
1316
31
    case SP::FSTOX:
1317
31
    case SP::FXTOD:
1318
31
    case SP::FXTOQ:
1319
31
    case SP::FXTOS:
1320
31
    case SP::LZCNT:
1321
31
    case SP::MOVDTOX:
1322
31
    case SP::MOVSTOSW:
1323
31
    case SP::MOVSTOUW:
1324
31
    case SP::MOVWTOS:
1325
31
    case SP::MOVXTOD:
1326
31
    case SP::POPCrr: {
1327
31
      // op: rd
1328
31
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1329
31
      Value |= (op & UINT64_C(31)) << 25;
1330
31
      // op: rs2
1331
31
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
1332
31
      Value |= op & UINT64_C(31);
1333
31
      break;
1334
31
    }
1335
31
    case SP::STArr:
1336
19
    case SP::STBArr:
1337
19
    case SP::STDArr:
1338
19
    case SP::STDFArr:
1339
19
    case SP::STFArr:
1340
19
    case SP::STHArr:
1341
19
    case SP::STQFArr: {
1342
19
      // op: rd
1343
19
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
1344
19
      Value |= (op & UINT64_C(31)) << 25;
1345
19
      // op: rs1
1346
19
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1347
19
      Value |= (op & UINT64_C(31)) << 14;
1348
19
      // op: asi
1349
19
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
1350
19
      Value |= (op & UINT64_C(255)) << 5;
1351
19
      // op: rs2
1352
19
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
1353
19
      Value |= op & UINT64_C(31);
1354
19
      break;
1355
19
    }
1356
55
    case SP::STBrr:
1357
55
    case SP::STCrr:
1358
55
    case SP::STDCrr:
1359
55
    case SP::STDFrr:
1360
55
    case SP::STDrr:
1361
55
    case SP::STFrr:
1362
55
    case SP::STHrr:
1363
55
    case SP::STQFrr:
1364
55
    case SP::STXrr:
1365
55
    case SP::STrr: {
1366
55
      // op: rd
1367
55
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
1368
55
      Value |= (op & UINT64_C(31)) << 25;
1369
55
      // op: rs1
1370
55
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1371
55
      Value |= (op & UINT64_C(31)) << 14;
1372
55
      // op: rs2
1373
55
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
1374
55
      Value |= op & UINT64_C(31);
1375
55
      break;
1376
55
    }
1377
55
    case SP::STBri:
1378
17
    case SP::STCri:
1379
17
    case SP::STDCri:
1380
17
    case SP::STDFri:
1381
17
    case SP::STDri:
1382
17
    case SP::STFri:
1383
17
    case SP::STHri:
1384
17
    case SP::STQFri:
1385
17
    case SP::STXri:
1386
17
    case SP::STri: {
1387
17
      // op: rd
1388
17
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
1389
17
      Value |= (op & UINT64_C(31)) << 25;
1390
17
      // op: rs1
1391
17
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1392
17
      Value |= (op & UINT64_C(31)) << 14;
1393
17
      // op: simm13
1394
17
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
1395
17
      Value |= op & UINT64_C(8191);
1396
17
      break;
1397
17
    }
1398
97
    case SP::TICCri:
1399
97
    case SP::TRAPri:
1400
97
    case SP::TXCCri: {
1401
97
      // op: rs1
1402
97
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1403
97
      Value |= (op & UINT64_C(31)) << 14;
1404
97
      // op: cond
1405
97
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
1406
97
      Value |= (op & UINT64_C(15)) << 25;
1407
97
      // op: imm
1408
97
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
1409
97
      Value |= op & UINT64_C(255);
1410
97
      break;
1411
97
    }
1412
102
    case SP::TICCrr:
1413
102
    case SP::TRAPrr:
1414
102
    case SP::TXCCrr: {
1415
102
      // op: rs1
1416
102
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1417
102
      Value |= (op & UINT64_C(31)) << 14;
1418
102
      // op: cond
1419
102
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
1420
102
      Value |= (op & UINT64_C(15)) << 25;
1421
102
      // op: rs2
1422
102
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
1423
102
      Value |= op & UINT64_C(31);
1424
102
      break;
1425
102
    }
1426
102
    case SP::BINDrr:
1427
48
    case SP::CALLrr:
1428
48
    case SP::CMPrr:
1429
48
    case SP::FCMPD:
1430
48
    case SP::FCMPQ:
1431
48
    case SP::FCMPS:
1432
48
    case SP::FLUSHrr:
1433
48
    case SP::LDCSRrr:
1434
48
    case SP::LDFSRrr:
1435
48
    case SP::LDXFSRrr:
1436
48
    case SP::RETTrr:
1437
48
    case SP::STCSRrr:
1438
48
    case SP::STDCQrr:
1439
48
    case SP::STDFQrr:
1440
48
    case SP::STFSRrr:
1441
48
    case SP::STXFSRrr:
1442
48
    case SP::WRPSRrr:
1443
48
    case SP::WRTBRrr:
1444
48
    case SP::WRWIMrr: {
1445
48
      // op: rs1
1446
48
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1447
48
      Value |= (op & UINT64_C(31)) << 14;
1448
48
      // op: rs2
1449
48
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
1450
48
      Value |= op & UINT64_C(31);
1451
48
      break;
1452
48
    }
1453
51
    case SP::BINDri:
1454
51
    case SP::CALLri:
1455
51
    case SP::CMPri:
1456
51
    case SP::FLUSHri:
1457
51
    case SP::LDCSRri:
1458
51
    case SP::LDFSRri:
1459
51
    case SP::LDXFSRri:
1460
51
    case SP::RETTri:
1461
51
    case SP::STCSRri:
1462
51
    case SP::STDCQri:
1463
51
    case SP::STDFQri:
1464
51
    case SP::STFSRri:
1465
51
    case SP::STXFSRri:
1466
51
    case SP::WRPSRri:
1467
51
    case SP::WRTBRri:
1468
51
    case SP::WRWIMri: {
1469
51
      // op: rs1
1470
51
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1471
51
      Value |= (op & UINT64_C(31)) << 14;
1472
51
      // op: simm13
1473
51
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
1474
51
      Value |= op & UINT64_C(8191);
1475
51
      break;
1476
51
    }
1477
51
    case SP::CMASK16:
1478
0
    case SP::CMASK32:
1479
0
    case SP::CMASK8: {
1480
0
      // op: rs2
1481
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1482
0
      Value |= op & UINT64_C(31);
1483
0
      break;
1484
0
    }
1485
27
    case SP::MEMBARi:
1486
27
    case SP::RET:
1487
27
    case SP::RETL: {
1488
27
      // op: simm13
1489
27
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
1490
27
      Value |= op & UINT64_C(8191);
1491
27
      break;
1492
27
    }
1493
27
  default:
1494
0
    std::string msg;
1495
0
    raw_string_ostream Msg(msg);
1496
0
    Msg << "Not supported instr: " << MI;
1497
0
    report_fatal_error(Msg.str());
1498
1.85k
  }
1499
1.85k
  return Value;
1500
1.85k
}
1501
1502
#ifdef ENABLE_INSTR_PREDICATE_VERIFIER
1503
#undef ENABLE_INSTR_PREDICATE_VERIFIER
1504
#include <sstream>
1505
1506
// Flags for subtarget features that participate in instruction matching.
1507
enum SubtargetFeatureFlag : uint8_t {
1508
  Feature_UseSoftMulDiv = (1ULL << 4),
1509
  Feature_HasV9 = (1ULL << 0),
1510
  Feature_HasVIS = (1ULL << 1),
1511
  Feature_HasVIS2 = (1ULL << 2),
1512
  Feature_HasVIS3 = (1ULL << 3),
1513
  Feature_None = 0
1514
};
1515
1516
#ifndef NDEBUG
1517
static const char *SubtargetFeatureNames[] = {
1518
  "Feature_HasV9",
1519
  "Feature_HasVIS",
1520
  "Feature_HasVIS2",
1521
  "Feature_HasVIS3",
1522
  "Feature_UseSoftMulDiv",
1523
  nullptr
1524
};
1525
1526
#endif // NDEBUG
1527
uint64_t SparcMCCodeEmitter::
1528
1.85k
computeAvailableFeatures(const FeatureBitset& FB) const {
1529
1.85k
  uint64_t Features = 0;
1530
1.85k
  if ((FB[Sparc::FeatureSoftMulDiv]))
1531
0
    Features |= Feature_UseSoftMulDiv;
1532
1.85k
  if ((FB[Sparc::FeatureV9]))
1533
1.23k
    Features |= Feature_HasV9;
1534
1.85k
  if ((FB[Sparc::FeatureVIS]))
1535
1
    Features |= Feature_HasVIS;
1536
1.85k
  if ((FB[Sparc::FeatureVIS2]))
1537
1
    Features |= Feature_HasVIS2;
1538
1.85k
  if ((FB[Sparc::FeatureVIS3]))
1539
0
    Features |= Feature_HasVIS3;
1540
1.85k
  return Features;
1541
1.85k
}
1542
1543
void SparcMCCodeEmitter::verifyInstructionPredicates(
1544
1.85k
    const MCInst &Inst, uint64_t AvailableFeatures) const {
1545
#ifndef NDEBUG
1546
  static uint64_t RequiredFeatures[] = {
1547
    0, // PHI = 0
1548
    0, // INLINEASM = 1
1549
    0, // CFI_INSTRUCTION = 2
1550
    0, // EH_LABEL = 3
1551
    0, // GC_LABEL = 4
1552
    0, // ANNOTATION_LABEL = 5
1553
    0, // KILL = 6
1554
    0, // EXTRACT_SUBREG = 7
1555
    0, // INSERT_SUBREG = 8
1556
    0, // IMPLICIT_DEF = 9
1557
    0, // SUBREG_TO_REG = 10
1558
    0, // COPY_TO_REGCLASS = 11
1559
    0, // DBG_VALUE = 12
1560
    0, // DBG_LABEL = 13
1561
    0, // REG_SEQUENCE = 14
1562
    0, // COPY = 15
1563
    0, // BUNDLE = 16
1564
    0, // LIFETIME_START = 17
1565
    0, // LIFETIME_END = 18
1566
    0, // STACKMAP = 19
1567
    0, // FENTRY_CALL = 20
1568
    0, // PATCHPOINT = 21
1569
    0, // LOAD_STACK_GUARD = 22
1570
    0, // STATEPOINT = 23
1571
    0, // LOCAL_ESCAPE = 24
1572
    0, // FAULTING_OP = 25
1573
    0, // PATCHABLE_OP = 26
1574
    0, // PATCHABLE_FUNCTION_ENTER = 27
1575
    0, // PATCHABLE_RET = 28
1576
    0, // PATCHABLE_FUNCTION_EXIT = 29
1577
    0, // PATCHABLE_TAIL_CALL = 30
1578
    0, // PATCHABLE_EVENT_CALL = 31
1579
    0, // PATCHABLE_TYPED_EVENT_CALL = 32
1580
    0, // ICALL_BRANCH_FUNNEL = 33
1581
    0, // G_ADD = 34
1582
    0, // G_SUB = 35
1583
    0, // G_MUL = 36
1584
    0, // G_SDIV = 37
1585
    0, // G_UDIV = 38
1586
    0, // G_SREM = 39
1587
    0, // G_UREM = 40
1588
    0, // G_AND = 41
1589
    0, // G_OR = 42
1590
    0, // G_XOR = 43
1591
    0, // G_IMPLICIT_DEF = 44
1592
    0, // G_PHI = 45
1593
    0, // G_FRAME_INDEX = 46
1594
    0, // G_GLOBAL_VALUE = 47
1595
    0, // G_EXTRACT = 48
1596
    0, // G_UNMERGE_VALUES = 49
1597
    0, // G_INSERT = 50
1598
    0, // G_MERGE_VALUES = 51
1599
    0, // G_PTRTOINT = 52
1600
    0, // G_INTTOPTR = 53
1601
    0, // G_BITCAST = 54
1602
    0, // G_LOAD = 55
1603
    0, // G_SEXTLOAD = 56
1604
    0, // G_ZEXTLOAD = 57
1605
    0, // G_STORE = 58
1606
    0, // G_ATOMIC_CMPXCHG_WITH_SUCCESS = 59
1607
    0, // G_ATOMIC_CMPXCHG = 60
1608
    0, // G_ATOMICRMW_XCHG = 61
1609
    0, // G_ATOMICRMW_ADD = 62
1610
    0, // G_ATOMICRMW_SUB = 63
1611
    0, // G_ATOMICRMW_AND = 64
1612
    0, // G_ATOMICRMW_NAND = 65
1613
    0, // G_ATOMICRMW_OR = 66
1614
    0, // G_ATOMICRMW_XOR = 67
1615
    0, // G_ATOMICRMW_MAX = 68
1616
    0, // G_ATOMICRMW_MIN = 69
1617
    0, // G_ATOMICRMW_UMAX = 70
1618
    0, // G_ATOMICRMW_UMIN = 71
1619
    0, // G_BRCOND = 72
1620
    0, // G_BRINDIRECT = 73
1621
    0, // G_INTRINSIC = 74
1622
    0, // G_INTRINSIC_W_SIDE_EFFECTS = 75
1623
    0, // G_ANYEXT = 76
1624
    0, // G_TRUNC = 77
1625
    0, // G_CONSTANT = 78
1626
    0, // G_FCONSTANT = 79
1627
    0, // G_VASTART = 80
1628
    0, // G_VAARG = 81
1629
    0, // G_SEXT = 82
1630
    0, // G_ZEXT = 83
1631
    0, // G_SHL = 84
1632
    0, // G_LSHR = 85
1633
    0, // G_ASHR = 86
1634
    0, // G_ICMP = 87
1635
    0, // G_FCMP = 88
1636
    0, // G_SELECT = 89
1637
    0, // G_UADDE = 90
1638
    0, // G_USUBE = 91
1639
    0, // G_SADDO = 92
1640
    0, // G_SSUBO = 93
1641
    0, // G_UMULO = 94
1642
    0, // G_SMULO = 95
1643
    0, // G_UMULH = 96
1644
    0, // G_SMULH = 97
1645
    0, // G_FADD = 98
1646
    0, // G_FSUB = 99
1647
    0, // G_FMUL = 100
1648
    0, // G_FMA = 101
1649
    0, // G_FDIV = 102
1650
    0, // G_FREM = 103
1651
    0, // G_FPOW = 104
1652
    0, // G_FEXP = 105
1653
    0, // G_FEXP2 = 106
1654
    0, // G_FLOG = 107
1655
    0, // G_FLOG2 = 108
1656
    0, // G_FNEG = 109
1657
    0, // G_FPEXT = 110
1658
    0, // G_FPTRUNC = 111
1659
    0, // G_FPTOSI = 112
1660
    0, // G_FPTOUI = 113
1661
    0, // G_SITOFP = 114
1662
    0, // G_UITOFP = 115
1663
    0, // G_FABS = 116
1664
    0, // G_GEP = 117
1665
    0, // G_PTR_MASK = 118
1666
    0, // G_BR = 119
1667
    0, // G_INSERT_VECTOR_ELT = 120
1668
    0, // G_EXTRACT_VECTOR_ELT = 121
1669
    0, // G_SHUFFLE_VECTOR = 122
1670
    0, // G_BSWAP = 123
1671
    0, // G_ADDRSPACE_CAST = 124
1672
    0, // ADJCALLSTACKDOWN = 125
1673
    0, // ADJCALLSTACKUP = 126
1674
    0, // EH_SJLJ_LONGJMP32ri = 127
1675
    0, // EH_SJLJ_LONGJMP32rr = 128
1676
    0, // EH_SJLJ_SETJMP32ri = 129
1677
    0, // EH_SJLJ_SETJMP32rr = 130
1678
    0, // GETPCX = 131
1679
    0, // SELECT_CC_DFP_FCC = 132
1680
    0, // SELECT_CC_DFP_ICC = 133
1681
    0, // SELECT_CC_FP_FCC = 134
1682
    0, // SELECT_CC_FP_ICC = 135
1683
    0, // SELECT_CC_Int_FCC = 136
1684
    0, // SELECT_CC_Int_ICC = 137
1685
    0, // SELECT_CC_QFP_FCC = 138
1686
    0, // SELECT_CC_QFP_ICC = 139
1687
    0, // SET = 140
1688
    0, // ADDCCri = 141
1689
    0, // ADDCCrr = 142
1690
    0, // ADDCri = 143
1691
    0, // ADDCrr = 144
1692
    0, // ADDEri = 145
1693
    0, // ADDErr = 146
1694
    Feature_HasVIS3 | 0, // ADDXC = 147
1695
    Feature_HasVIS3 | 0, // ADDXCCC = 148
1696
    0, // ADDXri = 149
1697
    0, // ADDXrr = 150
1698
    0, // ADDri = 151
1699
    0, // ADDrr = 152
1700
    Feature_HasVIS | 0, // ALIGNADDR = 153
1701
    Feature_HasVIS | 0, // ALIGNADDRL = 154
1702
    0, // ANDCCri = 155
1703
    0, // ANDCCrr = 156
1704
    0, // ANDNCCri = 157
1705
    0, // ANDNCCrr = 158
1706
    0, // ANDNri = 159
1707
    0, // ANDNrr = 160
1708
    0, // ANDXNrr = 161
1709
    0, // ANDXri = 162
1710
    0, // ANDXrr = 163
1711
    0, // ANDri = 164
1712
    0, // ANDrr = 165
1713
    Feature_HasVIS | 0, // ARRAY16 = 166
1714
    Feature_HasVIS | 0, // ARRAY32 = 167
1715
    Feature_HasVIS | 0, // ARRAY8 = 168
1716
    0, // BA = 169
1717
    0, // BCOND = 170
1718
    0, // BCONDA = 171
1719
    0, // BINDri = 172
1720
    0, // BINDrr = 173
1721
    Feature_HasVIS2 | 0, // BMASK = 174
1722
    Feature_HasV9 | 0, // BPFCC = 175
1723
    Feature_HasV9 | 0, // BPFCCA = 176
1724
    Feature_HasV9 | 0, // BPFCCANT = 177
1725
    Feature_HasV9 | 0, // BPFCCNT = 178
1726
    0, // BPGEZapn = 179
1727
    0, // BPGEZapt = 180
1728
    0, // BPGEZnapn = 181
1729
    0, // BPGEZnapt = 182
1730
    0, // BPGZapn = 183
1731
    0, // BPGZapt = 184
1732
    0, // BPGZnapn = 185
1733
    0, // BPGZnapt = 186
1734
    Feature_HasV9 | 0, // BPICC = 187
1735
    Feature_HasV9 | 0, // BPICCA = 188
1736
    Feature_HasV9 | 0, // BPICCANT = 189
1737
    Feature_HasV9 | 0, // BPICCNT = 190
1738
    0, // BPLEZapn = 191
1739
    0, // BPLEZapt = 192
1740
    0, // BPLEZnapn = 193
1741
    0, // BPLEZnapt = 194
1742
    0, // BPLZapn = 195
1743
    0, // BPLZapt = 196
1744
    0, // BPLZnapn = 197
1745
    0, // BPLZnapt = 198
1746
    0, // BPNZapn = 199
1747
    0, // BPNZapt = 200
1748
    0, // BPNZnapn = 201
1749
    0, // BPNZnapt = 202
1750
    0, // BPXCC = 203
1751
    0, // BPXCCA = 204
1752
    0, // BPXCCANT = 205
1753
    0, // BPXCCNT = 206
1754
    0, // BPZapn = 207
1755
    0, // BPZapt = 208
1756
    0, // BPZnapn = 209
1757
    0, // BPZnapt = 210
1758
    Feature_HasVIS2 | 0, // BSHUFFLE = 211
1759
    0, // CALL = 212
1760
    0, // CALLri = 213
1761
    0, // CALLrr = 214
1762
    0, // CASAasi10 = 215
1763
    0, // CASArr = 216
1764
    0, // CASXrr = 217
1765
    Feature_HasV9 | 0, // CASrr = 218
1766
    0, // CBCOND = 219
1767
    0, // CBCONDA = 220
1768
    Feature_HasVIS3 | 0, // CMASK16 = 221
1769
    Feature_HasVIS3 | 0, // CMASK32 = 222
1770
    Feature_HasVIS3 | 0, // CMASK8 = 223
1771
    0, // CMPri = 224
1772
    0, // CMPrr = 225
1773
    Feature_HasVIS | 0, // EDGE16 = 226
1774
    Feature_HasVIS | 0, // EDGE16L = 227
1775
    Feature_HasVIS2 | 0, // EDGE16LN = 228
1776
    Feature_HasVIS2 | 0, // EDGE16N = 229
1777
    Feature_HasVIS | 0, // EDGE32 = 230
1778
    Feature_HasVIS | 0, // EDGE32L = 231
1779
    Feature_HasVIS2 | 0, // EDGE32LN = 232
1780
    Feature_HasVIS2 | 0, // EDGE32N = 233
1781
    Feature_HasVIS | 0, // EDGE8 = 234
1782
    Feature_HasVIS | 0, // EDGE8L = 235
1783
    Feature_HasVIS2 | 0, // EDGE8LN = 236
1784
    Feature_HasVIS2 | 0, // EDGE8N = 237
1785
    Feature_HasV9 | 0, // FABSD = 238
1786
    Feature_HasV9 | 0, // FABSQ = 239
1787
    0, // FABSS = 240
1788
    0, // FADDD = 241
1789
    0, // FADDQ = 242
1790
    0, // FADDS = 243
1791
    Feature_HasVIS | 0, // FALIGNADATA = 244
1792
    Feature_HasVIS | 0, // FAND = 245
1793
    Feature_HasVIS | 0, // FANDNOT1 = 246
1794
    Feature_HasVIS | 0, // FANDNOT1S = 247
1795
    Feature_HasVIS | 0, // FANDNOT2 = 248
1796
    Feature_HasVIS | 0, // FANDNOT2S = 249
1797
    Feature_HasVIS | 0, // FANDS = 250
1798
    0, // FBCOND = 251
1799
    0, // FBCONDA = 252
1800
    Feature_HasVIS3 | 0, // FCHKSM16 = 253
1801
    0, // FCMPD = 254
1802
    Feature_HasVIS | 0, // FCMPEQ16 = 255
1803
    Feature_HasVIS | 0, // FCMPEQ32 = 256
1804
    Feature_HasVIS | 0, // FCMPGT16 = 257
1805
    Feature_HasVIS | 0, // FCMPGT32 = 258
1806
    Feature_HasVIS | 0, // FCMPLE16 = 259
1807
    Feature_HasVIS | 0, // FCMPLE32 = 260
1808
    Feature_HasVIS | 0, // FCMPNE16 = 261
1809
    Feature_HasVIS | 0, // FCMPNE32 = 262
1810
    0, // FCMPQ = 263
1811
    0, // FCMPS = 264
1812
    0, // FDIVD = 265
1813
    0, // FDIVQ = 266
1814
    0, // FDIVS = 267
1815
    0, // FDMULQ = 268
1816
    0, // FDTOI = 269
1817
    0, // FDTOQ = 270
1818
    0, // FDTOS = 271
1819
    0, // FDTOX = 272
1820
    Feature_HasVIS | 0, // FEXPAND = 273
1821
    Feature_HasVIS3 | 0, // FHADDD = 274
1822
    Feature_HasVIS3 | 0, // FHADDS = 275
1823
    Feature_HasVIS3 | 0, // FHSUBD = 276
1824
    Feature_HasVIS3 | 0, // FHSUBS = 277
1825
    0, // FITOD = 278
1826
    0, // FITOQ = 279
1827
    0, // FITOS = 280
1828
    Feature_HasVIS3 | 0, // FLCMPD = 281
1829
    Feature_HasVIS3 | 0, // FLCMPS = 282
1830
    0, // FLUSH = 283
1831
    Feature_HasV9 | 0, // FLUSHW = 284
1832
    0, // FLUSHri = 285
1833
    0, // FLUSHrr = 286
1834
    Feature_HasVIS3 | 0, // FMEAN16 = 287
1835
    Feature_HasV9 | 0, // FMOVD = 288
1836
    Feature_HasV9 | 0, // FMOVD_FCC = 289
1837
    Feature_HasV9 | 0, // FMOVD_ICC = 290
1838
    0, // FMOVD_XCC = 291
1839
    Feature_HasV9 | 0, // FMOVQ = 292
1840
    Feature_HasV9 | 0, // FMOVQ_FCC = 293
1841
    Feature_HasV9 | 0, // FMOVQ_ICC = 294
1842
    0, // FMOVQ_XCC = 295
1843
    Feature_HasV9 | 0, // FMOVRGEZD = 296
1844
    Feature_HasV9 | 0, // FMOVRGEZQ = 297
1845
    Feature_HasV9 | 0, // FMOVRGEZS = 298
1846
    Feature_HasV9 | 0, // FMOVRGZD = 299
1847
    Feature_HasV9 | 0, // FMOVRGZQ = 300
1848
    Feature_HasV9 | 0, // FMOVRGZS = 301
1849
    Feature_HasV9 | 0, // FMOVRLEZD = 302
1850
    Feature_HasV9 | 0, // FMOVRLEZQ = 303
1851
    Feature_HasV9 | 0, // FMOVRLEZS = 304
1852
    Feature_HasV9 | 0, // FMOVRLZD = 305
1853
    Feature_HasV9 | 0, // FMOVRLZQ = 306
1854
    Feature_HasV9 | 0, // FMOVRLZS = 307
1855
    Feature_HasV9 | 0, // FMOVRNZD = 308
1856
    Feature_HasV9 | 0, // FMOVRNZQ = 309
1857
    Feature_HasV9 | 0, // FMOVRNZS = 310
1858
    Feature_HasV9 | 0, // FMOVRZD = 311
1859
    Feature_HasV9 | 0, // FMOVRZQ = 312
1860
    Feature_HasV9 | 0, // FMOVRZS = 313
1861
    0, // FMOVS = 314
1862
    Feature_HasV9 | 0, // FMOVS_FCC = 315
1863
    Feature_HasV9 | 0, // FMOVS_ICC = 316
1864
    0, // FMOVS_XCC = 317
1865
    Feature_HasVIS | 0, // FMUL8SUX16 = 318
1866
    Feature_HasVIS | 0, // FMUL8ULX16 = 319
1867
    Feature_HasVIS | 0, // FMUL8X16 = 320
1868
    Feature_HasVIS | 0, // FMUL8X16AL = 321
1869
    Feature_HasVIS | 0, // FMUL8X16AU = 322
1870
    0, // FMULD = 323
1871
    Feature_HasVIS | 0, // FMULD8SUX16 = 324
1872
    Feature_HasVIS | 0, // FMULD8ULX16 = 325
1873
    0, // FMULQ = 326
1874
    0, // FMULS = 327
1875
    Feature_HasVIS3 | 0, // FNADDD = 328
1876
    Feature_HasVIS3 | 0, // FNADDS = 329
1877
    Feature_HasVIS | 0, // FNAND = 330
1878
    Feature_HasVIS | 0, // FNANDS = 331
1879
    Feature_HasV9 | 0, // FNEGD = 332
1880
    Feature_HasV9 | 0, // FNEGQ = 333
1881
    0, // FNEGS = 334
1882
    Feature_HasVIS3 | 0, // FNHADDD = 335
1883
    Feature_HasVIS3 | 0, // FNHADDS = 336
1884
    Feature_HasVIS3 | 0, // FNMULD = 337
1885
    Feature_HasVIS3 | 0, // FNMULS = 338
1886
    Feature_HasVIS | 0, // FNOR = 339
1887
    Feature_HasVIS | 0, // FNORS = 340
1888
    Feature_HasVIS | 0, // FNOT1 = 341
1889
    Feature_HasVIS | 0, // FNOT1S = 342
1890
    Feature_HasVIS | 0, // FNOT2 = 343
1891
    Feature_HasVIS | 0, // FNOT2S = 344
1892
    Feature_HasVIS3 | 0, // FNSMULD = 345
1893
    Feature_HasVIS | 0, // FONE = 346
1894
    Feature_HasVIS | 0, // FONES = 347
1895
    Feature_HasVIS | 0, // FOR = 348
1896
    Feature_HasVIS | 0, // FORNOT1 = 349
1897
    Feature_HasVIS | 0, // FORNOT1S = 350
1898
    Feature_HasVIS | 0, // FORNOT2 = 351
1899
    Feature_HasVIS | 0, // FORNOT2S = 352
1900
    Feature_HasVIS | 0, // FORS = 353
1901
    Feature_HasVIS | 0, // FPACK16 = 354
1902
    Feature_HasVIS | 0, // FPACK32 = 355
1903
    Feature_HasVIS | 0, // FPACKFIX = 356
1904
    Feature_HasVIS | 0, // FPADD16 = 357
1905
    Feature_HasVIS | 0, // FPADD16S = 358
1906
    Feature_HasVIS | 0, // FPADD32 = 359
1907
    Feature_HasVIS | 0, // FPADD32S = 360
1908
    Feature_HasVIS3 | 0, // FPADD64 = 361
1909
    Feature_HasVIS | 0, // FPMERGE = 362
1910
    Feature_HasVIS | 0, // FPSUB16 = 363
1911
    Feature_HasVIS | 0, // FPSUB16S = 364
1912
    Feature_HasVIS | 0, // FPSUB32 = 365
1913
    Feature_HasVIS | 0, // FPSUB32S = 366
1914
    0, // FQTOD = 367
1915
    0, // FQTOI = 368
1916
    0, // FQTOS = 369
1917
    0, // FQTOX = 370
1918
    Feature_HasVIS3 | 0, // FSLAS16 = 371
1919
    Feature_HasVIS3 | 0, // FSLAS32 = 372
1920
    Feature_HasVIS3 | 0, // FSLL16 = 373
1921
    Feature_HasVIS3 | 0, // FSLL32 = 374
1922
    0, // FSMULD = 375
1923
    0, // FSQRTD = 376
1924
    0, // FSQRTQ = 377
1925
    0, // FSQRTS = 378
1926
    Feature_HasVIS3 | 0, // FSRA16 = 379
1927
    Feature_HasVIS3 | 0, // FSRA32 = 380
1928
    Feature_HasVIS | 0, // FSRC1 = 381
1929
    Feature_HasVIS | 0, // FSRC1S = 382
1930
    Feature_HasVIS | 0, // FSRC2 = 383
1931
    Feature_HasVIS | 0, // FSRC2S = 384
1932
    Feature_HasVIS3 | 0, // FSRL16 = 385
1933
    Feature_HasVIS3 | 0, // FSRL32 = 386
1934
    0, // FSTOD = 387
1935
    0, // FSTOI = 388
1936
    0, // FSTOQ = 389
1937
    0, // FSTOX = 390
1938
    0, // FSUBD = 391
1939
    0, // FSUBQ = 392
1940
    0, // FSUBS = 393
1941
    Feature_HasVIS | 0, // FXNOR = 394
1942
    Feature_HasVIS | 0, // FXNORS = 395
1943
    Feature_HasVIS | 0, // FXOR = 396
1944
    Feature_HasVIS | 0, // FXORS = 397
1945
    0, // FXTOD = 398
1946
    0, // FXTOQ = 399
1947
    0, // FXTOS = 400
1948
    Feature_HasVIS | 0, // FZERO = 401
1949
    Feature_HasVIS | 0, // FZEROS = 402
1950
    0, // JMPLri = 403
1951
    0, // JMPLrr = 404
1952
    0, // LDArr = 405
1953
    0, // LDCSRri = 406
1954
    0, // LDCSRrr = 407
1955
    0, // LDCri = 408
1956
    0, // LDCrr = 409
1957
    0, // LDDArr = 410
1958
    0, // LDDCri = 411
1959
    0, // LDDCrr = 412
1960
    Feature_HasV9 | 0, // LDDFArr = 413
1961
    0, // LDDFri = 414
1962
    0, // LDDFrr = 415
1963
    0, // LDDri = 416
1964
    0, // LDDrr = 417
1965
    Feature_HasV9 | 0, // LDFArr = 418
1966
    0, // LDFSRri = 419
1967
    0, // LDFSRrr = 420
1968
    0, // LDFri = 421
1969
    0, // LDFrr = 422
1970
    Feature_HasV9 | 0, // LDQFArr = 423
1971
    Feature_HasV9 | 0, // LDQFri = 424
1972
    Feature_HasV9 | 0, // LDQFrr = 425
1973
    0, // LDSBArr = 426
1974
    0, // LDSBri = 427
1975
    0, // LDSBrr = 428
1976
    0, // LDSHArr = 429
1977
    0, // LDSHri = 430
1978
    0, // LDSHrr = 431
1979
    0, // LDSTUBArr = 432
1980
    0, // LDSTUBri = 433
1981
    0, // LDSTUBrr = 434
1982
    0, // LDSWri = 435
1983
    0, // LDSWrr = 436
1984
    0, // LDUBArr = 437
1985
    0, // LDUBri = 438
1986
    0, // LDUBrr = 439
1987
    0, // LDUHArr = 440
1988
    0, // LDUHri = 441
1989
    0, // LDUHrr = 442
1990
    Feature_HasV9 | 0, // LDXFSRri = 443
1991
    Feature_HasV9 | 0, // LDXFSRrr = 444
1992
    0, // LDXri = 445
1993
    0, // LDXrr = 446
1994
    0, // LDri = 447
1995
    0, // LDrr = 448
1996
    0, // LEAX_ADDri = 449
1997
    0, // LEA_ADDri = 450
1998
    Feature_HasVIS3 | 0, // LZCNT = 451
1999
    Feature_HasV9 | 0, // MEMBARi = 452
2000
    Feature_HasVIS3 | 0, // MOVDTOX = 453
2001
    Feature_HasV9 | 0, // MOVFCCri = 454
2002
    Feature_HasV9 | 0, // MOVFCCrr = 455
2003
    Feature_HasV9 | 0, // MOVICCri = 456
2004
    Feature_HasV9 | 0, // MOVICCrr = 457
2005
    0, // MOVRGEZri = 458
2006
    0, // MOVRGEZrr = 459
2007
    0, // MOVRGZri = 460
2008
    0, // MOVRGZrr = 461
2009
    0, // MOVRLEZri = 462
2010
    0, // MOVRLEZrr = 463
2011
    0, // MOVRLZri = 464
2012
    0, // MOVRLZrr = 465
2013
    0, // MOVRNZri = 466
2014
    0, // MOVRNZrr = 467
2015
    0, // MOVRRZri = 468
2016
    0, // MOVRRZrr = 469
2017
    Feature_HasVIS3 | 0, // MOVSTOSW = 470
2018
    Feature_HasVIS3 | 0, // MOVSTOUW = 471
2019
    Feature_HasVIS3 | 0, // MOVWTOS = 472
2020
    0, // MOVXCCri = 473
2021
    0, // MOVXCCrr = 474
2022
    Feature_HasVIS3 | 0, // MOVXTOD = 475
2023
    0, // MULSCCri = 476
2024
    0, // MULSCCrr = 477
2025
    0, // MULXri = 478
2026
    0, // MULXrr = 479
2027
    0, // NOP = 480
2028
    0, // ORCCri = 481
2029
    0, // ORCCrr = 482
2030
    0, // ORNCCri = 483
2031
    0, // ORNCCrr = 484
2032
    0, // ORNri = 485
2033
    0, // ORNrr = 486
2034
    0, // ORXNrr = 487
2035
    0, // ORXri = 488
2036
    0, // ORXrr = 489
2037
    0, // ORri = 490
2038
    0, // ORrr = 491
2039
    Feature_HasVIS | 0, // PDIST = 492
2040
    Feature_HasVIS3 | 0, // PDISTN = 493
2041
    Feature_HasV9 | 0, // POPCrr = 494
2042
    0, // RDASR = 495
2043
    Feature_HasV9 | 0, // RDPR = 496
2044
    0, // RDPSR = 497
2045
    0, // RDTBR = 498
2046
    0, // RDWIM = 499
2047
    0, // RESTOREri = 500
2048
    0, // RESTORErr = 501
2049
    0, // RET = 502
2050
    0, // RETL = 503
2051
    0, // RETTri = 504
2052
    0, // RETTrr = 505
2053
    0, // SAVEri = 506
2054
    0, // SAVErr = 507
2055
    0, // SDIVCCri = 508
2056
    0, // SDIVCCrr = 509
2057
    0, // SDIVXri = 510
2058
    0, // SDIVXrr = 511
2059
    0, // SDIVri = 512
2060
    0, // SDIVrr = 513
2061
    0, // SETHIXi = 514
2062
    0, // SETHIi = 515
2063
    Feature_HasVIS | 0, // SHUTDOWN = 516
2064
    Feature_HasVIS2 | 0, // SIAM = 517
2065
    0, // SLLXri = 518
2066
    0, // SLLXrr = 519
2067
    0, // SLLri = 520
2068
    0, // SLLrr = 521
2069
    0, // SMACri = 522
2070
    0, // SMACrr = 523
2071
    0, // SMULCCri = 524
2072
    0, // SMULCCrr = 525
2073
    0, // SMULri = 526
2074
    0, // SMULrr = 527
2075
    0, // SRAXri = 528
2076
    0, // SRAXrr = 529
2077
    0, // SRAri = 530
2078
    0, // SRArr = 531
2079
    0, // SRLXri = 532
2080
    0, // SRLXrr = 533
2081
    0, // SRLri = 534
2082
    0, // SRLrr = 535
2083
    0, // STArr = 536
2084
    0, // STBAR = 537
2085
    0, // STBArr = 538
2086
    0, // STBri = 539
2087
    0, // STBrr = 540
2088
    0, // STCSRri = 541
2089
    0, // STCSRrr = 542
2090
    0, // STCri = 543
2091
    0, // STCrr = 544
2092
    0, // STDArr = 545
2093
    0, // STDCQri = 546
2094
    0, // STDCQrr = 547
2095
    0, // STDCri = 548
2096
    0, // STDCrr = 549
2097
    Feature_HasV9 | 0, // STDFArr = 550
2098
    0, // STDFQri = 551
2099
    0, // STDFQrr = 552
2100
    0, // STDFri = 553
2101
    0, // STDFrr = 554
2102
    0, // STDri = 555
2103
    0, // STDrr = 556
2104
    Feature_HasV9 | 0, // STFArr = 557
2105
    0, // STFSRri = 558
2106
    0, // STFSRrr = 559
2107
    0, // STFri = 560
2108
    0, // STFrr = 561
2109
    0, // STHArr = 562
2110
    0, // STHri = 563
2111
    0, // STHrr = 564
2112
    Feature_HasV9 | 0, // STQFArr = 565
2113
    Feature_HasV9 | 0, // STQFri = 566
2114
    Feature_HasV9 | 0, // STQFrr = 567
2115
    Feature_HasV9 | 0, // STXFSRri = 568
2116
    Feature_HasV9 | 0, // STXFSRrr = 569
2117
    0, // STXri = 570
2118
    0, // STXrr = 571
2119
    0, // STri = 572
2120
    0, // STrr = 573
2121
    0, // SUBCCri = 574
2122
    0, // SUBCCrr = 575
2123
    0, // SUBCri = 576
2124
    0, // SUBCrr = 577
2125
    0, // SUBEri = 578
2126
    0, // SUBErr = 579
2127
    0, // SUBXri = 580
2128
    0, // SUBXrr = 581
2129
    0, // SUBri = 582
2130
    0, // SUBrr = 583
2131
    0, // SWAPArr = 584
2132
    0, // SWAPri = 585
2133
    0, // SWAPrr = 586
2134
    0, // TA3 = 587
2135
    0, // TA5 = 588
2136
    0, // TADDCCTVri = 589
2137
    0, // TADDCCTVrr = 590
2138
    0, // TADDCCri = 591
2139
    0, // TADDCCrr = 592
2140
    Feature_HasV9 | 0, // TICCri = 593
2141
    Feature_HasV9 | 0, // TICCrr = 594
2142
    0, // TLS_ADDXrr = 595
2143
    0, // TLS_ADDrr = 596
2144
    0, // TLS_CALL = 597
2145
    0, // TLS_LDXrr = 598
2146
    0, // TLS_LDrr = 599
2147
    0, // TRAPri = 600
2148
    0, // TRAPrr = 601
2149
    0, // TSUBCCTVri = 602
2150
    0, // TSUBCCTVrr = 603
2151
    0, // TSUBCCri = 604
2152
    0, // TSUBCCrr = 605
2153
    0, // TXCCri = 606
2154
    0, // TXCCrr = 607
2155
    0, // UDIVCCri = 608
2156
    0, // UDIVCCrr = 609
2157
    0, // UDIVXri = 610
2158
    0, // UDIVXrr = 611
2159
    0, // UDIVri = 612
2160
    0, // UDIVrr = 613
2161
    0, // UMACri = 614
2162
    0, // UMACrr = 615
2163
    0, // UMULCCri = 616
2164
    0, // UMULCCrr = 617
2165
    Feature_HasVIS3 | 0, // UMULXHI = 618
2166
    0, // UMULri = 619
2167
    0, // UMULrr = 620
2168
    0, // UNIMP = 621
2169
    0, // V9FCMPD = 622
2170
    0, // V9FCMPED = 623
2171
    0, // V9FCMPEQ = 624
2172
    0, // V9FCMPES = 625
2173
    0, // V9FCMPQ = 626
2174
    0, // V9FCMPS = 627
2175
    Feature_HasV9 | 0, // V9FMOVD_FCC = 628
2176
    Feature_HasV9 | 0, // V9FMOVQ_FCC = 629
2177
    Feature_HasV9 | 0, // V9FMOVS_FCC = 630
2178
    Feature_HasV9 | 0, // V9MOVFCCri = 631
2179
    Feature_HasV9 | 0, // V9MOVFCCrr = 632
2180
    0, // WRASRri = 633
2181
    0, // WRASRrr = 634
2182
    Feature_HasV9 | 0, // WRPRri = 635
2183
    Feature_HasV9 | 0, // WRPRrr = 636
2184
    0, // WRPSRri = 637
2185
    0, // WRPSRrr = 638
2186
    0, // WRTBRri = 639
2187
    0, // WRTBRrr = 640
2188
    0, // WRWIMri = 641
2189
    0, // WRWIMrr = 642
2190
    Feature_HasVIS3 | 0, // XMULX = 643
2191
    Feature_HasVIS3 | 0, // XMULXHI = 644
2192
    0, // XNORCCri = 645
2193
    0, // XNORCCrr = 646
2194
    0, // XNORXrr = 647
2195
    0, // XNORri = 648
2196
    0, // XNORrr = 649
2197
    0, // XORCCri = 650
2198
    0, // XORCCrr = 651
2199
    0, // XORXri = 652
2200
    0, // XORXrr = 653
2201
    0, // XORri = 654
2202
    0, // XORrr = 655
2203
  };
2204
2205
  assert(Inst.getOpcode() < 656);
2206
  uint64_t MissingFeatures =
2207
      (AvailableFeatures & RequiredFeatures[Inst.getOpcode()]) ^
2208
      RequiredFeatures[Inst.getOpcode()];
2209
  if (MissingFeatures) {
2210
    std::ostringstream Msg;
2211
    Msg << "Attempting to emit " << MCII.getName(Inst.getOpcode()).str()
2212
        << " instruction but the ";
2213
    for (unsigned i = 0; i < 8 * sizeof(MissingFeatures); ++i)
2214
      if (MissingFeatures & (1ULL << i))
2215
        Msg << SubtargetFeatureNames[i] << " ";
2216
    Msg << "predicate(s) are not met";
2217
    report_fatal_error(Msg.str());
2218
  }
2219
#else
2220
// Silence unused variable warning on targets that don't use MCII for other purposes (e.g. BPF).
2221
1.85k
(void)MCII;
2222
1.85k
#endif // NDEBUG
2223
1.85k
}
2224
#endif