Coverage Report

Created: 2018-07-12 09:57

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/clang-build/lib/Target/SystemZ/SystemZGenCallingConv.inc
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Source (jump to first uncovered line)
1
/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
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|*                                                                            *|
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|* Calling Convention Implementation Fragment                                 *|
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|*                                                                            *|
5
|* Automatically generated file, do not edit!                                 *|
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|*                                                                            *|
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\*===----------------------------------------------------------------------===*/
8
9
static bool CC_SystemZ(unsigned ValNo, MVT ValVT,
10
                       MVT LocVT, CCValAssign::LocInfo LocInfo,
11
                       ISD::ArgFlagsTy ArgFlags, CCState &State);
12
static bool RetCC_SystemZ(unsigned ValNo, MVT ValVT,
13
                          MVT LocVT, CCValAssign::LocInfo LocInfo,
14
                          ISD::ArgFlagsTy ArgFlags, CCState &State);
15
16
17
static bool CC_SystemZ(unsigned ValNo, MVT ValVT,
18
                       MVT LocVT, CCValAssign::LocInfo LocInfo,
19
15.0k
                       ISD::ArgFlagsTy ArgFlags, CCState &State) {
20
15.0k
21
15.0k
  if (LocVT == MVT::i32) {
22
2.45k
    if (ArgFlags.isSExt() || 
ArgFlags.isZExt()2.39k
) {
23
116
      LocVT = MVT::i64;
24
116
      if (ArgFlags.isSExt())
25
58
            LocInfo = CCValAssign::SExt;
26
58
      else if (ArgFlags.isZExt())
27
58
            LocInfo = CCValAssign::ZExt;
28
0
      else
29
0
            LocInfo = CCValAssign::AExt;
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116
    }
31
2.45k
  }
32
15.0k
33
15.0k
  if (ArgFlags.isSwiftSelf()) {
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10
    if (LocVT == MVT::i64) {
35
10
      if (unsigned Reg = State.AllocateReg(SystemZ::R10D)) {
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10
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
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10
        return false;
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10
      }
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15.0k
    }
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10
  }
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15.0k
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15.0k
  if (ArgFlags.isSwiftError()) {
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18
    if (LocVT == MVT::i64) {
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18
      if (unsigned Reg = State.AllocateReg(SystemZ::R9D)) {
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18
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
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18
        return false;
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18
      }
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15.0k
    }
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18
  }
50
15.0k
51
15.0k
  if (LocVT == MVT::f128) {
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95
    LocVT = MVT::i64;
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95
    LocInfo = CCValAssign::Indirect;
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95
  }
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15.0k
56
15.0k
  if (LocVT == MVT::i64) {
57
7.40k
    if (CC_SystemZ_I128Indirect(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
58
72
        return false;
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14.9k
  }
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14.9k
61
14.9k
  if (LocVT == MVT::i32) {
62
2.33k
    static const MCPhysReg RegList1[] = {
63
2.33k
      SystemZ::R2L, SystemZ::R3L, SystemZ::R4L, SystemZ::R5L, SystemZ::R6L
64
2.33k
    };
65
2.33k
    if (unsigned Reg = State.AllocateReg(RegList1)) {
66
2.31k
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
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2.31k
      return false;
68
2.31k
    }
69
12.6k
  }
70
12.6k
71
12.6k
  if (LocVT == MVT::i64) {
72
7.33k
    static const MCPhysReg RegList2[] = {
73
7.33k
      SystemZ::R2D, SystemZ::R3D, SystemZ::R4D, SystemZ::R5D, SystemZ::R6D
74
7.33k
    };
75
7.33k
    if (unsigned Reg = State.AllocateReg(RegList2)) {
76
7.14k
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
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7.14k
      return false;
78
7.14k
    }
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5.47k
  }
80
5.47k
81
5.47k
  if (LocVT == MVT::f32) {
82
674
    static const MCPhysReg RegList3[] = {
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674
      SystemZ::F0S, SystemZ::F2S, SystemZ::F4S, SystemZ::F6S
84
674
    };
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674
    if (unsigned Reg = State.AllocateReg(RegList3)) {
86
653
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
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653
      return false;
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653
    }
89
4.82k
  }
90
4.82k
91
4.82k
  if (LocVT == MVT::f64) {
92
1.28k
    static const MCPhysReg RegList4[] = {
93
1.28k
      SystemZ::F0D, SystemZ::F2D, SystemZ::F4D, SystemZ::F6D
94
1.28k
    };
95
1.28k
    if (unsigned Reg = State.AllocateReg(RegList4)) {
96
1.26k
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
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1.26k
      return false;
98
1.26k
    }
99
3.55k
  }
100
3.55k
101
3.55k
  if (static_cast<const SystemZSubtarget&>(State.getMachineFunction().getSubtarget()).hasVector()) {
102
3.31k
    if (LocVT == MVT::v16i8 ||
103
3.31k
        
LocVT == MVT::v8i162.58k
||
104
3.31k
        
LocVT == MVT::v4i321.97k
||
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3.31k
        
LocVT == MVT::v2i641.26k
||
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3.31k
        
LocVT == MVT::v4f32795
||
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3.31k
        
LocVT == MVT::v2f64354
) {
108
3.30k
      if (static_cast<SystemZCCState *>(&State)->IsFixed(ValNo)) {
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3.29k
        static const MCPhysReg RegList5[] = {
110
3.29k
          SystemZ::V24, SystemZ::V26, SystemZ::V28, SystemZ::V30, SystemZ::V25, SystemZ::V27, SystemZ::V29, SystemZ::V31
111
3.29k
        };
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3.29k
        if (unsigned Reg = State.AllocateReg(RegList5)) {
113
3.20k
          State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
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3.20k
          return false;
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3.20k
        }
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350
      }
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3.30k
    }
118
3.31k
  }
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350
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350
  if (static_cast<const SystemZSubtarget&>(State.getMachineFunction().getSubtarget()).hasVector()) {
121
104
    if (LocVT == MVT::v16i8 ||
122
104
        
LocVT == MVT::v8i1678
||
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104
        
LocVT == MVT::v4i3262
||
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104
        
LocVT == MVT::v2i6428
||
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104
        
LocVT == MVT::v4f3224
||
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104
        
LocVT == MVT::v2f6416
) {
127
100
      if (static_cast<SystemZCCState *>(&State)->IsShortVector(ValNo)) {
128
14
        LocVT = MVT::i64;
129
14
        LocInfo = CCValAssign::BCvt;
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14
      }
131
100
    }
132
104
  }
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350
134
350
  if (static_cast<const SystemZSubtarget&>(State.getMachineFunction().getSubtarget()).hasVector()) {
135
104
    if (LocVT == MVT::v16i8 ||
136
104
        
LocVT == MVT::v8i1692
||
137
104
        
LocVT == MVT::v4i3276
||
138
104
        
LocVT == MVT::v2i6442
||
139
104
        
LocVT == MVT::v4f3238
||
140
104
        
LocVT == MVT::v2f6430
) {
141
86
      unsigned Offset6 = State.AllocateStack(16, 8);
142
86
      State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset6, LocVT, LocInfo));
143
86
      return false;
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86
    }
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264
  }
146
264
147
264
  if (LocVT == MVT::i32 ||
148
264
      
LocVT == MVT::i64238
||
149
264
      
LocVT == MVT::f3239
||
150
264
      
LocVT == MVT::f6418
) {
151
264
    unsigned Offset7 = State.AllocateStack(8, 8);
152
264
    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset7, LocVT, LocInfo));
153
264
    return false;
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264
  }
155
0
156
0
  return true;  // CC didn't match.
157
0
}
158
159
160
static bool RetCC_SystemZ(unsigned ValNo, MVT ValVT,
161
                          MVT LocVT, CCValAssign::LocInfo LocInfo,
162
11.6k
                          ISD::ArgFlagsTy ArgFlags, CCState &State) {
163
11.6k
164
11.6k
  if (LocVT == MVT::i32) {
165
3.61k
    if (ArgFlags.isSExt() || 
ArgFlags.isZExt()3.54k
) {
166
817
      LocVT = MVT::i64;
167
817
      if (ArgFlags.isSExt())
168
73
            LocInfo = CCValAssign::SExt;
169
744
      else if (ArgFlags.isZExt())
170
744
            LocInfo = CCValAssign::ZExt;
171
0
      else
172
0
            LocInfo = CCValAssign::AExt;
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817
    }
174
3.61k
  }
175
11.6k
176
11.6k
  if (ArgFlags.isSwiftError()) {
177
20
    if (LocVT == MVT::i64) {
178
20
      if (unsigned Reg = State.AllocateReg(SystemZ::R9D)) {
179
20
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
180
20
        return false;
181
20
      }
182
11.6k
    }
183
20
  }
184
11.6k
185
11.6k
  if (LocVT == MVT::i32) {
186
2.80k
    static const MCPhysReg RegList1[] = {
187
2.80k
      SystemZ::R2L, SystemZ::R3L, SystemZ::R4L, SystemZ::R5L
188
2.80k
    };
189
2.80k
    if (unsigned Reg = State.AllocateReg(RegList1)) {
190
2.79k
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
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2.79k
      return false;
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2.79k
    }
193
8.83k
  }
194
8.83k
195
8.83k
  if (LocVT == MVT::i64) {
196
3.40k
    static const MCPhysReg RegList2[] = {
197
3.40k
      SystemZ::R2D, SystemZ::R3D, SystemZ::R4D, SystemZ::R5D
198
3.40k
    };
199
3.40k
    if (unsigned Reg = State.AllocateReg(RegList2)) {
200
3.40k
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
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3.40k
      return false;
202
3.40k
    }
203
5.43k
  }
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5.43k
205
5.43k
  if (LocVT == MVT::f32) {
206
662
    static const MCPhysReg RegList3[] = {
207
662
      SystemZ::F0S, SystemZ::F2S, SystemZ::F4S, SystemZ::F6S
208
662
    };
209
662
    if (unsigned Reg = State.AllocateReg(RegList3)) {
210
662
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
211
662
      return false;
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662
    }
213
4.77k
  }
214
4.77k
215
4.77k
  if (LocVT == MVT::f64) {
216
1.47k
    static const MCPhysReg RegList4[] = {
217
1.47k
      SystemZ::F0D, SystemZ::F2D, SystemZ::F4D, SystemZ::F6D
218
1.47k
    };
219
1.47k
    if (unsigned Reg = State.AllocateReg(RegList4)) {
220
1.47k
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
221
1.47k
      return false;
222
1.47k
    }
223
3.30k
  }
224
3.30k
225
3.30k
  if (static_cast<const SystemZSubtarget&>(State.getMachineFunction().getSubtarget()).hasVector()) {
226
3.26k
    if (LocVT == MVT::v16i8 ||
227
3.26k
        
LocVT == MVT::v8i162.52k
||
228
3.26k
        
LocVT == MVT::v4i321.90k
||
229
3.26k
        
LocVT == MVT::v2i641.21k
||
230
3.26k
        
LocVT == MVT::v4f32662
||
231
3.26k
        
LocVT == MVT::v2f64334
) {
232
3.25k
      static const MCPhysReg RegList5[] = {
233
3.25k
        SystemZ::V24, SystemZ::V26, SystemZ::V28, SystemZ::V30, SystemZ::V25, SystemZ::V27, SystemZ::V29, SystemZ::V31
234
3.25k
      };
235
3.25k
      if (unsigned Reg = State.AllocateReg(RegList5)) {
236
3.25k
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
237
3.25k
        return false;
238
3.25k
      }
239
47
    }
240
3.26k
  }
241
47
242
47
  return true;  // CC didn't match.
243
47
}