Coverage Report

Created: 2018-09-17 19:50

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/clang-build/lib/Target/SystemZ/SystemZGenInstrInfo.inc
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1
/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2
|*                                                                            *|
3
|* Target Instruction Enum Values and Descriptors                             *|
4
|*                                                                            *|
5
|* Automatically generated file, do not edit!                                 *|
6
|*                                                                            *|
7
\*===----------------------------------------------------------------------===*/
8
9
#ifdef GET_INSTRINFO_ENUM
10
#undef GET_INSTRINFO_ENUM
11
namespace llvm {
12
13
namespace SystemZ {
14
  enum {
15
    PHI = 0,
16
    INLINEASM = 1,
17
    CFI_INSTRUCTION = 2,
18
    EH_LABEL  = 3,
19
    GC_LABEL  = 4,
20
    ANNOTATION_LABEL  = 5,
21
    KILL  = 6,
22
    EXTRACT_SUBREG  = 7,
23
    INSERT_SUBREG = 8,
24
    IMPLICIT_DEF  = 9,
25
    SUBREG_TO_REG = 10,
26
    COPY_TO_REGCLASS  = 11,
27
    DBG_VALUE = 12,
28
    DBG_LABEL = 13,
29
    REG_SEQUENCE  = 14,
30
    COPY  = 15,
31
    BUNDLE  = 16,
32
    LIFETIME_START  = 17,
33
    LIFETIME_END  = 18,
34
    STACKMAP  = 19,
35
    FENTRY_CALL = 20,
36
    PATCHPOINT  = 21,
37
    LOAD_STACK_GUARD  = 22,
38
    STATEPOINT  = 23,
39
    LOCAL_ESCAPE  = 24,
40
    FAULTING_OP = 25,
41
    PATCHABLE_OP  = 26,
42
    PATCHABLE_FUNCTION_ENTER  = 27,
43
    PATCHABLE_RET = 28,
44
    PATCHABLE_FUNCTION_EXIT = 29,
45
    PATCHABLE_TAIL_CALL = 30,
46
    PATCHABLE_EVENT_CALL  = 31,
47
    PATCHABLE_TYPED_EVENT_CALL  = 32,
48
    ICALL_BRANCH_FUNNEL = 33,
49
    G_ADD = 34,
50
    G_SUB = 35,
51
    G_MUL = 36,
52
    G_SDIV  = 37,
53
    G_UDIV  = 38,
54
    G_SREM  = 39,
55
    G_UREM  = 40,
56
    G_AND = 41,
57
    G_OR  = 42,
58
    G_XOR = 43,
59
    G_IMPLICIT_DEF  = 44,
60
    G_PHI = 45,
61
    G_FRAME_INDEX = 46,
62
    G_GLOBAL_VALUE  = 47,
63
    G_EXTRACT = 48,
64
    G_UNMERGE_VALUES  = 49,
65
    G_INSERT  = 50,
66
    G_MERGE_VALUES  = 51,
67
    G_PTRTOINT  = 52,
68
    G_INTTOPTR  = 53,
69
    G_BITCAST = 54,
70
    G_INTRINSIC_TRUNC = 55,
71
    G_INTRINSIC_ROUND = 56,
72
    G_LOAD  = 57,
73
    G_SEXTLOAD  = 58,
74
    G_ZEXTLOAD  = 59,
75
    G_STORE = 60,
76
    G_ATOMIC_CMPXCHG_WITH_SUCCESS = 61,
77
    G_ATOMIC_CMPXCHG  = 62,
78
    G_ATOMICRMW_XCHG  = 63,
79
    G_ATOMICRMW_ADD = 64,
80
    G_ATOMICRMW_SUB = 65,
81
    G_ATOMICRMW_AND = 66,
82
    G_ATOMICRMW_NAND  = 67,
83
    G_ATOMICRMW_OR  = 68,
84
    G_ATOMICRMW_XOR = 69,
85
    G_ATOMICRMW_MAX = 70,
86
    G_ATOMICRMW_MIN = 71,
87
    G_ATOMICRMW_UMAX  = 72,
88
    G_ATOMICRMW_UMIN  = 73,
89
    G_BRCOND  = 74,
90
    G_BRINDIRECT  = 75,
91
    G_INTRINSIC = 76,
92
    G_INTRINSIC_W_SIDE_EFFECTS  = 77,
93
    G_ANYEXT  = 78,
94
    G_TRUNC = 79,
95
    G_CONSTANT  = 80,
96
    G_FCONSTANT = 81,
97
    G_VASTART = 82,
98
    G_VAARG = 83,
99
    G_SEXT  = 84,
100
    G_ZEXT  = 85,
101
    G_SHL = 86,
102
    G_LSHR  = 87,
103
    G_ASHR  = 88,
104
    G_ICMP  = 89,
105
    G_FCMP  = 90,
106
    G_SELECT  = 91,
107
    G_UADDO = 92,
108
    G_UADDE = 93,
109
    G_USUBO = 94,
110
    G_USUBE = 95,
111
    G_SADDO = 96,
112
    G_SADDE = 97,
113
    G_SSUBO = 98,
114
    G_SSUBE = 99,
115
    G_UMULO = 100,
116
    G_SMULO = 101,
117
    G_UMULH = 102,
118
    G_SMULH = 103,
119
    G_FADD  = 104,
120
    G_FSUB  = 105,
121
    G_FMUL  = 106,
122
    G_FMA = 107,
123
    G_FDIV  = 108,
124
    G_FREM  = 109,
125
    G_FPOW  = 110,
126
    G_FEXP  = 111,
127
    G_FEXP2 = 112,
128
    G_FLOG  = 113,
129
    G_FLOG2 = 114,
130
    G_FNEG  = 115,
131
    G_FPEXT = 116,
132
    G_FPTRUNC = 117,
133
    G_FPTOSI  = 118,
134
    G_FPTOUI  = 119,
135
    G_SITOFP  = 120,
136
    G_UITOFP  = 121,
137
    G_FABS  = 122,
138
    G_GEP = 123,
139
    G_PTR_MASK  = 124,
140
    G_BR  = 125,
141
    G_INSERT_VECTOR_ELT = 126,
142
    G_EXTRACT_VECTOR_ELT  = 127,
143
    G_SHUFFLE_VECTOR  = 128,
144
    G_CTTZ  = 129,
145
    G_CTTZ_ZERO_UNDEF = 130,
146
    G_CTLZ  = 131,
147
    G_CTLZ_ZERO_UNDEF = 132,
148
    G_CTPOP = 133,
149
    G_BSWAP = 134,
150
    G_ADDRSPACE_CAST  = 135,
151
    G_BLOCK_ADDR  = 136,
152
    ADJCALLSTACKDOWN  = 137,
153
    ADJCALLSTACKUP  = 138,
154
    ADJDYNALLOC = 139,
155
    AEXT128 = 140,
156
    AFIMux  = 141,
157
    AHIMux  = 142,
158
    AHIMuxK = 143,
159
    ATOMIC_CMP_SWAPW  = 144,
160
    ATOMIC_LOADW_AFI  = 145,
161
    ATOMIC_LOADW_AR = 146,
162
    ATOMIC_LOADW_MAX  = 147,
163
    ATOMIC_LOADW_MIN  = 148,
164
    ATOMIC_LOADW_NILH = 149,
165
    ATOMIC_LOADW_NILHi  = 150,
166
    ATOMIC_LOADW_NR = 151,
167
    ATOMIC_LOADW_NRi  = 152,
168
    ATOMIC_LOADW_OILH = 153,
169
    ATOMIC_LOADW_OR = 154,
170
    ATOMIC_LOADW_SR = 155,
171
    ATOMIC_LOADW_UMAX = 156,
172
    ATOMIC_LOADW_UMIN = 157,
173
    ATOMIC_LOADW_XILF = 158,
174
    ATOMIC_LOADW_XR = 159,
175
    ATOMIC_LOAD_AFI = 160,
176
    ATOMIC_LOAD_AGFI  = 161,
177
    ATOMIC_LOAD_AGHI  = 162,
178
    ATOMIC_LOAD_AGR = 163,
179
    ATOMIC_LOAD_AHI = 164,
180
    ATOMIC_LOAD_AR  = 165,
181
    ATOMIC_LOAD_MAX_32  = 166,
182
    ATOMIC_LOAD_MAX_64  = 167,
183
    ATOMIC_LOAD_MIN_32  = 168,
184
    ATOMIC_LOAD_MIN_64  = 169,
185
    ATOMIC_LOAD_NGR = 170,
186
    ATOMIC_LOAD_NGRi  = 171,
187
    ATOMIC_LOAD_NIHF64  = 172,
188
    ATOMIC_LOAD_NIHF64i = 173,
189
    ATOMIC_LOAD_NIHH64  = 174,
190
    ATOMIC_LOAD_NIHH64i = 175,
191
    ATOMIC_LOAD_NIHL64  = 176,
192
    ATOMIC_LOAD_NIHL64i = 177,
193
    ATOMIC_LOAD_NILF  = 178,
194
    ATOMIC_LOAD_NILF64  = 179,
195
    ATOMIC_LOAD_NILF64i = 180,
196
    ATOMIC_LOAD_NILFi = 181,
197
    ATOMIC_LOAD_NILH  = 182,
198
    ATOMIC_LOAD_NILH64  = 183,
199
    ATOMIC_LOAD_NILH64i = 184,
200
    ATOMIC_LOAD_NILHi = 185,
201
    ATOMIC_LOAD_NILL  = 186,
202
    ATOMIC_LOAD_NILL64  = 187,
203
    ATOMIC_LOAD_NILL64i = 188,
204
    ATOMIC_LOAD_NILLi = 189,
205
    ATOMIC_LOAD_NR  = 190,
206
    ATOMIC_LOAD_NRi = 191,
207
    ATOMIC_LOAD_OGR = 192,
208
    ATOMIC_LOAD_OIHF64  = 193,
209
    ATOMIC_LOAD_OIHH64  = 194,
210
    ATOMIC_LOAD_OIHL64  = 195,
211
    ATOMIC_LOAD_OILF  = 196,
212
    ATOMIC_LOAD_OILF64  = 197,
213
    ATOMIC_LOAD_OILH  = 198,
214
    ATOMIC_LOAD_OILH64  = 199,
215
    ATOMIC_LOAD_OILL  = 200,
216
    ATOMIC_LOAD_OILL64  = 201,
217
    ATOMIC_LOAD_OR  = 202,
218
    ATOMIC_LOAD_SGR = 203,
219
    ATOMIC_LOAD_SR  = 204,
220
    ATOMIC_LOAD_UMAX_32 = 205,
221
    ATOMIC_LOAD_UMAX_64 = 206,
222
    ATOMIC_LOAD_UMIN_32 = 207,
223
    ATOMIC_LOAD_UMIN_64 = 208,
224
    ATOMIC_LOAD_XGR = 209,
225
    ATOMIC_LOAD_XIHF64  = 210,
226
    ATOMIC_LOAD_XILF  = 211,
227
    ATOMIC_LOAD_XILF64  = 212,
228
    ATOMIC_LOAD_XR  = 213,
229
    ATOMIC_SWAPW  = 214,
230
    ATOMIC_SWAP_32  = 215,
231
    ATOMIC_SWAP_64  = 216,
232
    CFIMux  = 217,
233
    CGIBCall  = 218,
234
    CGIBReturn  = 219,
235
    CGRBCall  = 220,
236
    CGRBReturn  = 221,
237
    CHIMux  = 222,
238
    CIBCall = 223,
239
    CIBReturn = 224,
240
    CLCLoop = 225,
241
    CLCSequence = 226,
242
    CLFIMux = 227,
243
    CLGIBCall = 228,
244
    CLGIBReturn = 229,
245
    CLGRBCall = 230,
246
    CLGRBReturn = 231,
247
    CLIBCall  = 232,
248
    CLIBReturn  = 233,
249
    CLMux = 234,
250
    CLRBCall  = 235,
251
    CLRBReturn  = 236,
252
    CLSTLoop  = 237,
253
    CMux  = 238,
254
    CRBCall = 239,
255
    CRBReturn = 240,
256
    CallBASR  = 241,
257
    CallBCR = 242,
258
    CallBR  = 243,
259
    CallBRASL = 244,
260
    CallBRCL  = 245,
261
    CallJG  = 246,
262
    CondReturn  = 247,
263
    CondStore16 = 248,
264
    CondStore16Inv  = 249,
265
    CondStore16Mux  = 250,
266
    CondStore16MuxInv = 251,
267
    CondStore32 = 252,
268
    CondStore32Inv  = 253,
269
    CondStore32Mux  = 254,
270
    CondStore32MuxInv = 255,
271
    CondStore64 = 256,
272
    CondStore64Inv  = 257,
273
    CondStore8  = 258,
274
    CondStore8Inv = 259,
275
    CondStore8Mux = 260,
276
    CondStore8MuxInv  = 261,
277
    CondStoreF32  = 262,
278
    CondStoreF32Inv = 263,
279
    CondStoreF64  = 264,
280
    CondStoreF64Inv = 265,
281
    CondTrap  = 266,
282
    GOT = 267,
283
    IIFMux  = 268,
284
    IIHF64  = 269,
285
    IIHH64  = 270,
286
    IIHL64  = 271,
287
    IIHMux  = 272,
288
    IILF64  = 273,
289
    IILH64  = 274,
290
    IILL64  = 275,
291
    IILMux  = 276,
292
    L128  = 277,
293
    LBMux = 278,
294
    LEFR  = 279,
295
    LFER  = 280,
296
    LHIMux  = 281,
297
    LHMux = 282,
298
    LLCMux  = 283,
299
    LLCRMux = 284,
300
    LLHMux  = 285,
301
    LLHRMux = 286,
302
    LMux  = 287,
303
    LOCHIMux  = 288,
304
    LOCMux  = 289,
305
    LOCRMux = 290,
306
    LRMux = 291,
307
    LTDBRCompare_VecPseudo  = 292,
308
    LTEBRCompare_VecPseudo  = 293,
309
    LTXBRCompare_VecPseudo  = 294,
310
    LX  = 295,
311
    MVCLoop = 296,
312
    MVCSequence = 297,
313
    MVSTLoop  = 298,
314
    MemBarrier  = 299,
315
    NCLoop  = 300,
316
    NCSequence  = 301,
317
    NIFMux  = 302,
318
    NIHF64  = 303,
319
    NIHH64  = 304,
320
    NIHL64  = 305,
321
    NIHMux  = 306,
322
    NILF64  = 307,
323
    NILH64  = 308,
324
    NILL64  = 309,
325
    NILMux  = 310,
326
    OCLoop  = 311,
327
    OCSequence  = 312,
328
    OIFMux  = 313,
329
    OIHF64  = 314,
330
    OIHH64  = 315,
331
    OIHL64  = 316,
332
    OIHMux  = 317,
333
    OILF64  = 318,
334
    OILH64  = 319,
335
    OILL64  = 320,
336
    OILMux  = 321,
337
    PAIR128 = 322,
338
    RISBHH  = 323,
339
    RISBHL  = 324,
340
    RISBLH  = 325,
341
    RISBLL  = 326,
342
    RISBMux = 327,
343
    Return  = 328,
344
    SRSTLoop  = 329,
345
    ST128 = 330,
346
    STCMux  = 331,
347
    STHMux  = 332,
348
    STMux = 333,
349
    STOCMux = 334,
350
    STX = 335,
351
    Select32  = 336,
352
    Select64  = 337,
353
    SelectF128  = 338,
354
    SelectF32 = 339,
355
    SelectF64 = 340,
356
    SelectVR128 = 341,
357
    SelectVR32  = 342,
358
    SelectVR64  = 343,
359
    Serialize = 344,
360
    TBEGIN_nofloat  = 345,
361
    TLS_GDCALL  = 346,
362
    TLS_LDCALL  = 347,
363
    TMHH64  = 348,
364
    TMHL64  = 349,
365
    TMHMux  = 350,
366
    TMLH64  = 351,
367
    TMLL64  = 352,
368
    TMLMux  = 353,
369
    Trap  = 354,
370
    VL32  = 355,
371
    VL64  = 356,
372
    VLR32 = 357,
373
    VLR64 = 358,
374
    VLVGP32 = 359,
375
    VST32 = 360,
376
    VST64 = 361,
377
    XCLoop  = 362,
378
    XCSequence  = 363,
379
    XIFMux  = 364,
380
    XIHF64  = 365,
381
    XILF64  = 366,
382
    ZEXT128 = 367,
383
    A = 368,
384
    AD  = 369,
385
    ADB = 370,
386
    ADBR  = 371,
387
    ADR = 372,
388
    ADTR  = 373,
389
    ADTRA = 374,
390
    AE  = 375,
391
    AEB = 376,
392
    AEBR  = 377,
393
    AER = 378,
394
    AFI = 379,
395
    AG  = 380,
396
    AGF = 381,
397
    AGFI  = 382,
398
    AGFR  = 383,
399
    AGH = 384,
400
    AGHI  = 385,
401
    AGHIK = 386,
402
    AGR = 387,
403
    AGRK  = 388,
404
    AGSI  = 389,
405
    AH  = 390,
406
    AHHHR = 391,
407
    AHHLR = 392,
408
    AHI = 393,
409
    AHIK  = 394,
410
    AHY = 395,
411
    AIH = 396,
412
    AL  = 397,
413
    ALC = 398,
414
    ALCG  = 399,
415
    ALCGR = 400,
416
    ALCR  = 401,
417
    ALFI  = 402,
418
    ALG = 403,
419
    ALGF  = 404,
420
    ALGFI = 405,
421
    ALGFR = 406,
422
    ALGHSIK = 407,
423
    ALGR  = 408,
424
    ALGRK = 409,
425
    ALGSI = 410,
426
    ALHHHR  = 411,
427
    ALHHLR  = 412,
428
    ALHSIK  = 413,
429
    ALR = 414,
430
    ALRK  = 415,
431
    ALSI  = 416,
432
    ALSIH = 417,
433
    ALSIHN  = 418,
434
    ALY = 419,
435
    AP  = 420,
436
    AR  = 421,
437
    ARK = 422,
438
    ASI = 423,
439
    AU  = 424,
440
    AUR = 425,
441
    AW  = 426,
442
    AWR = 427,
443
    AXBR  = 428,
444
    AXR = 429,
445
    AXTR  = 430,
446
    AXTRA = 431,
447
    AY  = 432,
448
    B = 433,
449
    BAKR  = 434,
450
    BAL = 435,
451
    BALR  = 436,
452
    BAS = 437,
453
    BASR  = 438,
454
    BASSM = 439,
455
    BAsmE = 440,
456
    BAsmH = 441,
457
    BAsmHE  = 442,
458
    BAsmL = 443,
459
    BAsmLE  = 444,
460
    BAsmLH  = 445,
461
    BAsmM = 446,
462
    BAsmNE  = 447,
463
    BAsmNH  = 448,
464
    BAsmNHE = 449,
465
    BAsmNL  = 450,
466
    BAsmNLE = 451,
467
    BAsmNLH = 452,
468
    BAsmNM  = 453,
469
    BAsmNO  = 454,
470
    BAsmNP  = 455,
471
    BAsmNZ  = 456,
472
    BAsmO = 457,
473
    BAsmP = 458,
474
    BAsmZ = 459,
475
    BC  = 460,
476
    BCAsm = 461,
477
    BCR = 462,
478
    BCRAsm  = 463,
479
    BCT = 464,
480
    BCTG  = 465,
481
    BCTGR = 466,
482
    BCTR  = 467,
483
    BI  = 468,
484
    BIAsmE  = 469,
485
    BIAsmH  = 470,
486
    BIAsmHE = 471,
487
    BIAsmL  = 472,
488
    BIAsmLE = 473,
489
    BIAsmLH = 474,
490
    BIAsmM  = 475,
491
    BIAsmNE = 476,
492
    BIAsmNH = 477,
493
    BIAsmNHE  = 478,
494
    BIAsmNL = 479,
495
    BIAsmNLE  = 480,
496
    BIAsmNLH  = 481,
497
    BIAsmNM = 482,
498
    BIAsmNO = 483,
499
    BIAsmNP = 484,
500
    BIAsmNZ = 485,
501
    BIAsmO  = 486,
502
    BIAsmP  = 487,
503
    BIAsmZ  = 488,
504
    BIC = 489,
505
    BICAsm  = 490,
506
    BPP = 491,
507
    BPRP  = 492,
508
    BR  = 493,
509
    BRAS  = 494,
510
    BRASL = 495,
511
    BRAsmE  = 496,
512
    BRAsmH  = 497,
513
    BRAsmHE = 498,
514
    BRAsmL  = 499,
515
    BRAsmLE = 500,
516
    BRAsmLH = 501,
517
    BRAsmM  = 502,
518
    BRAsmNE = 503,
519
    BRAsmNH = 504,
520
    BRAsmNHE  = 505,
521
    BRAsmNL = 506,
522
    BRAsmNLE  = 507,
523
    BRAsmNLH  = 508,
524
    BRAsmNM = 509,
525
    BRAsmNO = 510,
526
    BRAsmNP = 511,
527
    BRAsmNZ = 512,
528
    BRAsmO  = 513,
529
    BRAsmP  = 514,
530
    BRAsmZ  = 515,
531
    BRC = 516,
532
    BRCAsm  = 517,
533
    BRCL  = 518,
534
    BRCLAsm = 519,
535
    BRCT  = 520,
536
    BRCTG = 521,
537
    BRCTH = 522,
538
    BRXH  = 523,
539
    BRXHG = 524,
540
    BRXLE = 525,
541
    BRXLG = 526,
542
    BSA = 527,
543
    BSG = 528,
544
    BSM = 529,
545
    BXH = 530,
546
    BXHG  = 531,
547
    BXLE  = 532,
548
    BXLEG = 533,
549
    C = 534,
550
    CD  = 535,
551
    CDB = 536,
552
    CDBR  = 537,
553
    CDFBR = 538,
554
    CDFBRA  = 539,
555
    CDFR  = 540,
556
    CDFTR = 541,
557
    CDGBR = 542,
558
    CDGBRA  = 543,
559
    CDGR  = 544,
560
    CDGTR = 545,
561
    CDGTRA  = 546,
562
    CDLFBR  = 547,
563
    CDLFTR  = 548,
564
    CDLGBR  = 549,
565
    CDLGTR  = 550,
566
    CDPT  = 551,
567
    CDR = 552,
568
    CDS = 553,
569
    CDSG  = 554,
570
    CDSTR = 555,
571
    CDSY  = 556,
572
    CDTR  = 557,
573
    CDUTR = 558,
574
    CDZT  = 559,
575
    CE  = 560,
576
    CEB = 561,
577
    CEBR  = 562,
578
    CEDTR = 563,
579
    CEFBR = 564,
580
    CEFBRA  = 565,
581
    CEFR  = 566,
582
    CEGBR = 567,
583
    CEGBRA  = 568,
584
    CEGR  = 569,
585
    CELFBR  = 570,
586
    CELGBR  = 571,
587
    CER = 572,
588
    CEXTR = 573,
589
    CFC = 574,
590
    CFDBR = 575,
591
    CFDBRA  = 576,
592
    CFDR  = 577,
593
    CFDTR = 578,
594
    CFEBR = 579,
595
    CFEBRA  = 580,
596
    CFER  = 581,
597
    CFI = 582,
598
    CFXBR = 583,
599
    CFXBRA  = 584,
600
    CFXR  = 585,
601
    CFXTR = 586,
602
    CG  = 587,
603
    CGDBR = 588,
604
    CGDBRA  = 589,
605
    CGDR  = 590,
606
    CGDTR = 591,
607
    CGDTRA  = 592,
608
    CGEBR = 593,
609
    CGEBRA  = 594,
610
    CGER  = 595,
611
    CGF = 596,
612
    CGFI  = 597,
613
    CGFR  = 598,
614
    CGFRL = 599,
615
    CGH = 600,
616
    CGHI  = 601,
617
    CGHRL = 602,
618
    CGHSI = 603,
619
    CGIB  = 604,
620
    CGIBAsm = 605,
621
    CGIBAsmE  = 606,
622
    CGIBAsmH  = 607,
623
    CGIBAsmHE = 608,
624
    CGIBAsmL  = 609,
625
    CGIBAsmLE = 610,
626
    CGIBAsmLH = 611,
627
    CGIBAsmNE = 612,
628
    CGIBAsmNH = 613,
629
    CGIBAsmNHE  = 614,
630
    CGIBAsmNL = 615,
631
    CGIBAsmNLE  = 616,
632
    CGIBAsmNLH  = 617,
633
    CGIJ  = 618,
634
    CGIJAsm = 619,
635
    CGIJAsmE  = 620,
636
    CGIJAsmH  = 621,
637
    CGIJAsmHE = 622,
638
    CGIJAsmL  = 623,
639
    CGIJAsmLE = 624,
640
    CGIJAsmLH = 625,
641
    CGIJAsmNE = 626,
642
    CGIJAsmNH = 627,
643
    CGIJAsmNHE  = 628,
644
    CGIJAsmNL = 629,
645
    CGIJAsmNLE  = 630,
646
    CGIJAsmNLH  = 631,
647
    CGIT  = 632,
648
    CGITAsm = 633,
649
    CGITAsmE  = 634,
650
    CGITAsmH  = 635,
651
    CGITAsmHE = 636,
652
    CGITAsmL  = 637,
653
    CGITAsmLE = 638,
654
    CGITAsmLH = 639,
655
    CGITAsmNE = 640,
656
    CGITAsmNH = 641,
657
    CGITAsmNHE  = 642,
658
    CGITAsmNL = 643,
659
    CGITAsmNLE  = 644,
660
    CGITAsmNLH  = 645,
661
    CGR = 646,
662
    CGRB  = 647,
663
    CGRBAsm = 648,
664
    CGRBAsmE  = 649,
665
    CGRBAsmH  = 650,
666
    CGRBAsmHE = 651,
667
    CGRBAsmL  = 652,
668
    CGRBAsmLE = 653,
669
    CGRBAsmLH = 654,
670
    CGRBAsmNE = 655,
671
    CGRBAsmNH = 656,
672
    CGRBAsmNHE  = 657,
673
    CGRBAsmNL = 658,
674
    CGRBAsmNLE  = 659,
675
    CGRBAsmNLH  = 660,
676
    CGRJ  = 661,
677
    CGRJAsm = 662,
678
    CGRJAsmE  = 663,
679
    CGRJAsmH  = 664,
680
    CGRJAsmHE = 665,
681
    CGRJAsmL  = 666,
682
    CGRJAsmLE = 667,
683
    CGRJAsmLH = 668,
684
    CGRJAsmNE = 669,
685
    CGRJAsmNH = 670,
686
    CGRJAsmNHE  = 671,
687
    CGRJAsmNL = 672,
688
    CGRJAsmNLE  = 673,
689
    CGRJAsmNLH  = 674,
690
    CGRL  = 675,
691
    CGRT  = 676,
692
    CGRTAsm = 677,
693
    CGRTAsmE  = 678,
694
    CGRTAsmH  = 679,
695
    CGRTAsmHE = 680,
696
    CGRTAsmL  = 681,
697
    CGRTAsmLE = 682,
698
    CGRTAsmLH = 683,
699
    CGRTAsmNE = 684,
700
    CGRTAsmNH = 685,
701
    CGRTAsmNHE  = 686,
702
    CGRTAsmNL = 687,
703
    CGRTAsmNLE  = 688,
704
    CGRTAsmNLH  = 689,
705
    CGXBR = 690,
706
    CGXBRA  = 691,
707
    CGXR  = 692,
708
    CGXTR = 693,
709
    CGXTRA  = 694,
710
    CH  = 695,
711
    CHF = 696,
712
    CHHR  = 697,
713
    CHHSI = 698,
714
    CHI = 699,
715
    CHLR  = 700,
716
    CHRL  = 701,
717
    CHSI  = 702,
718
    CHY = 703,
719
    CIB = 704,
720
    CIBAsm  = 705,
721
    CIBAsmE = 706,
722
    CIBAsmH = 707,
723
    CIBAsmHE  = 708,
724
    CIBAsmL = 709,
725
    CIBAsmLE  = 710,
726
    CIBAsmLH  = 711,
727
    CIBAsmNE  = 712,
728
    CIBAsmNH  = 713,
729
    CIBAsmNHE = 714,
730
    CIBAsmNL  = 715,
731
    CIBAsmNLE = 716,
732
    CIBAsmNLH = 717,
733
    CIH = 718,
734
    CIJ = 719,
735
    CIJAsm  = 720,
736
    CIJAsmE = 721,
737
    CIJAsmH = 722,
738
    CIJAsmHE  = 723,
739
    CIJAsmL = 724,
740
    CIJAsmLE  = 725,
741
    CIJAsmLH  = 726,
742
    CIJAsmNE  = 727,
743
    CIJAsmNH  = 728,
744
    CIJAsmNHE = 729,
745
    CIJAsmNL  = 730,
746
    CIJAsmNLE = 731,
747
    CIJAsmNLH = 732,
748
    CIT = 733,
749
    CITAsm  = 734,
750
    CITAsmE = 735,
751
    CITAsmH = 736,
752
    CITAsmHE  = 737,
753
    CITAsmL = 738,
754
    CITAsmLE  = 739,
755
    CITAsmLH  = 740,
756
    CITAsmNE  = 741,
757
    CITAsmNH  = 742,
758
    CITAsmNHE = 743,
759
    CITAsmNL  = 744,
760
    CITAsmNLE = 745,
761
    CITAsmNLH = 746,
762
    CKSM  = 747,
763
    CL  = 748,
764
    CLC = 749,
765
    CLCL  = 750,
766
    CLCLE = 751,
767
    CLCLU = 752,
768
    CLFDBR  = 753,
769
    CLFDTR  = 754,
770
    CLFEBR  = 755,
771
    CLFHSI  = 756,
772
    CLFI  = 757,
773
    CLFIT = 758,
774
    CLFITAsm  = 759,
775
    CLFITAsmE = 760,
776
    CLFITAsmH = 761,
777
    CLFITAsmHE  = 762,
778
    CLFITAsmL = 763,
779
    CLFITAsmLE  = 764,
780
    CLFITAsmLH  = 765,
781
    CLFITAsmNE  = 766,
782
    CLFITAsmNH  = 767,
783
    CLFITAsmNHE = 768,
784
    CLFITAsmNL  = 769,
785
    CLFITAsmNLE = 770,
786
    CLFITAsmNLH = 771,
787
    CLFXBR  = 772,
788
    CLFXTR  = 773,
789
    CLG = 774,
790
    CLGDBR  = 775,
791
    CLGDTR  = 776,
792
    CLGEBR  = 777,
793
    CLGF  = 778,
794
    CLGFI = 779,
795
    CLGFR = 780,
796
    CLGFRL  = 781,
797
    CLGHRL  = 782,
798
    CLGHSI  = 783,
799
    CLGIB = 784,
800
    CLGIBAsm  = 785,
801
    CLGIBAsmE = 786,
802
    CLGIBAsmH = 787,
803
    CLGIBAsmHE  = 788,
804
    CLGIBAsmL = 789,
805
    CLGIBAsmLE  = 790,
806
    CLGIBAsmLH  = 791,
807
    CLGIBAsmNE  = 792,
808
    CLGIBAsmNH  = 793,
809
    CLGIBAsmNHE = 794,
810
    CLGIBAsmNL  = 795,
811
    CLGIBAsmNLE = 796,
812
    CLGIBAsmNLH = 797,
813
    CLGIJ = 798,
814
    CLGIJAsm  = 799,
815
    CLGIJAsmE = 800,
816
    CLGIJAsmH = 801,
817
    CLGIJAsmHE  = 802,
818
    CLGIJAsmL = 803,
819
    CLGIJAsmLE  = 804,
820
    CLGIJAsmLH  = 805,
821
    CLGIJAsmNE  = 806,
822
    CLGIJAsmNH  = 807,
823
    CLGIJAsmNHE = 808,
824
    CLGIJAsmNL  = 809,
825
    CLGIJAsmNLE = 810,
826
    CLGIJAsmNLH = 811,
827
    CLGIT = 812,
828
    CLGITAsm  = 813,
829
    CLGITAsmE = 814,
830
    CLGITAsmH = 815,
831
    CLGITAsmHE  = 816,
832
    CLGITAsmL = 817,
833
    CLGITAsmLE  = 818,
834
    CLGITAsmLH  = 819,
835
    CLGITAsmNE  = 820,
836
    CLGITAsmNH  = 821,
837
    CLGITAsmNHE = 822,
838
    CLGITAsmNL  = 823,
839
    CLGITAsmNLE = 824,
840
    CLGITAsmNLH = 825,
841
    CLGR  = 826,
842
    CLGRB = 827,
843
    CLGRBAsm  = 828,
844
    CLGRBAsmE = 829,
845
    CLGRBAsmH = 830,
846
    CLGRBAsmHE  = 831,
847
    CLGRBAsmL = 832,
848
    CLGRBAsmLE  = 833,
849
    CLGRBAsmLH  = 834,
850
    CLGRBAsmNE  = 835,
851
    CLGRBAsmNH  = 836,
852
    CLGRBAsmNHE = 837,
853
    CLGRBAsmNL  = 838,
854
    CLGRBAsmNLE = 839,
855
    CLGRBAsmNLH = 840,
856
    CLGRJ = 841,
857
    CLGRJAsm  = 842,
858
    CLGRJAsmE = 843,
859
    CLGRJAsmH = 844,
860
    CLGRJAsmHE  = 845,
861
    CLGRJAsmL = 846,
862
    CLGRJAsmLE  = 847,
863
    CLGRJAsmLH  = 848,
864
    CLGRJAsmNE  = 849,
865
    CLGRJAsmNH  = 850,
866
    CLGRJAsmNHE = 851,
867
    CLGRJAsmNL  = 852,
868
    CLGRJAsmNLE = 853,
869
    CLGRJAsmNLH = 854,
870
    CLGRL = 855,
871
    CLGRT = 856,
872
    CLGRTAsm  = 857,
873
    CLGRTAsmE = 858,
874
    CLGRTAsmH = 859,
875
    CLGRTAsmHE  = 860,
876
    CLGRTAsmL = 861,
877
    CLGRTAsmLE  = 862,
878
    CLGRTAsmLH  = 863,
879
    CLGRTAsmNE  = 864,
880
    CLGRTAsmNH  = 865,
881
    CLGRTAsmNHE = 866,
882
    CLGRTAsmNL  = 867,
883
    CLGRTAsmNLE = 868,
884
    CLGRTAsmNLH = 869,
885
    CLGT  = 870,
886
    CLGTAsm = 871,
887
    CLGTAsmE  = 872,
888
    CLGTAsmH  = 873,
889
    CLGTAsmHE = 874,
890
    CLGTAsmL  = 875,
891
    CLGTAsmLE = 876,
892
    CLGTAsmLH = 877,
893
    CLGTAsmNE = 878,
894
    CLGTAsmNH = 879,
895
    CLGTAsmNHE  = 880,
896
    CLGTAsmNL = 881,
897
    CLGTAsmNLE  = 882,
898
    CLGTAsmNLH  = 883,
899
    CLGXBR  = 884,
900
    CLGXTR  = 885,
901
    CLHF  = 886,
902
    CLHHR = 887,
903
    CLHHSI  = 888,
904
    CLHLR = 889,
905
    CLHRL = 890,
906
    CLI = 891,
907
    CLIB  = 892,
908
    CLIBAsm = 893,
909
    CLIBAsmE  = 894,
910
    CLIBAsmH  = 895,
911
    CLIBAsmHE = 896,
912
    CLIBAsmL  = 897,
913
    CLIBAsmLE = 898,
914
    CLIBAsmLH = 899,
915
    CLIBAsmNE = 900,
916
    CLIBAsmNH = 901,
917
    CLIBAsmNHE  = 902,
918
    CLIBAsmNL = 903,
919
    CLIBAsmNLE  = 904,
920
    CLIBAsmNLH  = 905,
921
    CLIH  = 906,
922
    CLIJ  = 907,
923
    CLIJAsm = 908,
924
    CLIJAsmE  = 909,
925
    CLIJAsmH  = 910,
926
    CLIJAsmHE = 911,
927
    CLIJAsmL  = 912,
928
    CLIJAsmLE = 913,
929
    CLIJAsmLH = 914,
930
    CLIJAsmNE = 915,
931
    CLIJAsmNH = 916,
932
    CLIJAsmNHE  = 917,
933
    CLIJAsmNL = 918,
934
    CLIJAsmNLE  = 919,
935
    CLIJAsmNLH  = 920,
936
    CLIY  = 921,
937
    CLM = 922,
938
    CLMH  = 923,
939
    CLMY  = 924,
940
    CLR = 925,
941
    CLRB  = 926,
942
    CLRBAsm = 927,
943
    CLRBAsmE  = 928,
944
    CLRBAsmH  = 929,
945
    CLRBAsmHE = 930,
946
    CLRBAsmL  = 931,
947
    CLRBAsmLE = 932,
948
    CLRBAsmLH = 933,
949
    CLRBAsmNE = 934,
950
    CLRBAsmNH = 935,
951
    CLRBAsmNHE  = 936,
952
    CLRBAsmNL = 937,
953
    CLRBAsmNLE  = 938,
954
    CLRBAsmNLH  = 939,
955
    CLRJ  = 940,
956
    CLRJAsm = 941,
957
    CLRJAsmE  = 942,
958
    CLRJAsmH  = 943,
959
    CLRJAsmHE = 944,
960
    CLRJAsmL  = 945,
961
    CLRJAsmLE = 946,
962
    CLRJAsmLH = 947,
963
    CLRJAsmNE = 948,
964
    CLRJAsmNH = 949,
965
    CLRJAsmNHE  = 950,
966
    CLRJAsmNL = 951,
967
    CLRJAsmNLE  = 952,
968
    CLRJAsmNLH  = 953,
969
    CLRL  = 954,
970
    CLRT  = 955,
971
    CLRTAsm = 956,
972
    CLRTAsmE  = 957,
973
    CLRTAsmH  = 958,
974
    CLRTAsmHE = 959,
975
    CLRTAsmL  = 960,
976
    CLRTAsmLE = 961,
977
    CLRTAsmLH = 962,
978
    CLRTAsmNE = 963,
979
    CLRTAsmNH = 964,
980
    CLRTAsmNHE  = 965,
981
    CLRTAsmNL = 966,
982
    CLRTAsmNLE  = 967,
983
    CLRTAsmNLH  = 968,
984
    CLST  = 969,
985
    CLT = 970,
986
    CLTAsm  = 971,
987
    CLTAsmE = 972,
988
    CLTAsmH = 973,
989
    CLTAsmHE  = 974,
990
    CLTAsmL = 975,
991
    CLTAsmLE  = 976,
992
    CLTAsmLH  = 977,
993
    CLTAsmNE  = 978,
994
    CLTAsmNH  = 979,
995
    CLTAsmNHE = 980,
996
    CLTAsmNL  = 981,
997
    CLTAsmNLE = 982,
998
    CLTAsmNLH = 983,
999
    CLY = 984,
1000
    CMPSC = 985,
1001
    CP  = 986,
1002
    CPDT  = 987,
1003
    CPSDRdd = 988,
1004
    CPSDRds = 989,
1005
    CPSDRsd = 990,
1006
    CPSDRss = 991,
1007
    CPXT  = 992,
1008
    CPYA  = 993,
1009
    CR  = 994,
1010
    CRB = 995,
1011
    CRBAsm  = 996,
1012
    CRBAsmE = 997,
1013
    CRBAsmH = 998,
1014
    CRBAsmHE  = 999,
1015
    CRBAsmL = 1000,
1016
    CRBAsmLE  = 1001,
1017
    CRBAsmLH  = 1002,
1018
    CRBAsmNE  = 1003,
1019
    CRBAsmNH  = 1004,
1020
    CRBAsmNHE = 1005,
1021
    CRBAsmNL  = 1006,
1022
    CRBAsmNLE = 1007,
1023
    CRBAsmNLH = 1008,
1024
    CRDTE = 1009,
1025
    CRDTEOpt  = 1010,
1026
    CRJ = 1011,
1027
    CRJAsm  = 1012,
1028
    CRJAsmE = 1013,
1029
    CRJAsmH = 1014,
1030
    CRJAsmHE  = 1015,
1031
    CRJAsmL = 1016,
1032
    CRJAsmLE  = 1017,
1033
    CRJAsmLH  = 1018,
1034
    CRJAsmNE  = 1019,
1035
    CRJAsmNH  = 1020,
1036
    CRJAsmNHE = 1021,
1037
    CRJAsmNL  = 1022,
1038
    CRJAsmNLE = 1023,
1039
    CRJAsmNLH = 1024,
1040
    CRL = 1025,
1041
    CRT = 1026,
1042
    CRTAsm  = 1027,
1043
    CRTAsmE = 1028,
1044
    CRTAsmH = 1029,
1045
    CRTAsmHE  = 1030,
1046
    CRTAsmL = 1031,
1047
    CRTAsmLE  = 1032,
1048
    CRTAsmLH  = 1033,
1049
    CRTAsmNE  = 1034,
1050
    CRTAsmNH  = 1035,
1051
    CRTAsmNHE = 1036,
1052
    CRTAsmNL  = 1037,
1053
    CRTAsmNLE = 1038,
1054
    CRTAsmNLH = 1039,
1055
    CS  = 1040,
1056
    CSCH  = 1041,
1057
    CSDTR = 1042,
1058
    CSG = 1043,
1059
    CSP = 1044,
1060
    CSPG  = 1045,
1061
    CSST  = 1046,
1062
    CSXTR = 1047,
1063
    CSY = 1048,
1064
    CU12  = 1049,
1065
    CU12Opt = 1050,
1066
    CU14  = 1051,
1067
    CU14Opt = 1052,
1068
    CU21  = 1053,
1069
    CU21Opt = 1054,
1070
    CU24  = 1055,
1071
    CU24Opt = 1056,
1072
    CU41  = 1057,
1073
    CU42  = 1058,
1074
    CUDTR = 1059,
1075
    CUSE  = 1060,
1076
    CUTFU = 1061,
1077
    CUTFUOpt  = 1062,
1078
    CUUTF = 1063,
1079
    CUUTFOpt  = 1064,
1080
    CUXTR = 1065,
1081
    CVB = 1066,
1082
    CVBG  = 1067,
1083
    CVBY  = 1068,
1084
    CVD = 1069,
1085
    CVDG  = 1070,
1086
    CVDY  = 1071,
1087
    CXBR  = 1072,
1088
    CXFBR = 1073,
1089
    CXFBRA  = 1074,
1090
    CXFR  = 1075,
1091
    CXFTR = 1076,
1092
    CXGBR = 1077,
1093
    CXGBRA  = 1078,
1094
    CXGR  = 1079,
1095
    CXGTR = 1080,
1096
    CXGTRA  = 1081,
1097
    CXLFBR  = 1082,
1098
    CXLFTR  = 1083,
1099
    CXLGBR  = 1084,
1100
    CXLGTR  = 1085,
1101
    CXPT  = 1086,
1102
    CXR = 1087,
1103
    CXSTR = 1088,
1104
    CXTR  = 1089,
1105
    CXUTR = 1090,
1106
    CXZT  = 1091,
1107
    CY  = 1092,
1108
    CZDT  = 1093,
1109
    CZXT  = 1094,
1110
    D = 1095,
1111
    DD  = 1096,
1112
    DDB = 1097,
1113
    DDBR  = 1098,
1114
    DDR = 1099,
1115
    DDTR  = 1100,
1116
    DDTRA = 1101,
1117
    DE  = 1102,
1118
    DEB = 1103,
1119
    DEBR  = 1104,
1120
    DER = 1105,
1121
    DIAG  = 1106,
1122
    DIDBR = 1107,
1123
    DIEBR = 1108,
1124
    DL  = 1109,
1125
    DLG = 1110,
1126
    DLGR  = 1111,
1127
    DLR = 1112,
1128
    DP  = 1113,
1129
    DR  = 1114,
1130
    DSG = 1115,
1131
    DSGF  = 1116,
1132
    DSGFR = 1117,
1133
    DSGR  = 1118,
1134
    DXBR  = 1119,
1135
    DXR = 1120,
1136
    DXTR  = 1121,
1137
    DXTRA = 1122,
1138
    EAR = 1123,
1139
    ECAG  = 1124,
1140
    ECCTR = 1125,
1141
    ECPGA = 1126,
1142
    ECTG  = 1127,
1143
    ED  = 1128,
1144
    EDMK  = 1129,
1145
    EEDTR = 1130,
1146
    EEXTR = 1131,
1147
    EFPC  = 1132,
1148
    EPAIR = 1133,
1149
    EPAR  = 1134,
1150
    EPCTR = 1135,
1151
    EPSW  = 1136,
1152
    EREG  = 1137,
1153
    EREGG = 1138,
1154
    ESAIR = 1139,
1155
    ESAR  = 1140,
1156
    ESDTR = 1141,
1157
    ESEA  = 1142,
1158
    ESTA  = 1143,
1159
    ESXTR = 1144,
1160
    ETND  = 1145,
1161
    EX  = 1146,
1162
    EXRL  = 1147,
1163
    FIDBR = 1148,
1164
    FIDBRA  = 1149,
1165
    FIDR  = 1150,
1166
    FIDTR = 1151,
1167
    FIEBR = 1152,
1168
    FIEBRA  = 1153,
1169
    FIER  = 1154,
1170
    FIXBR = 1155,
1171
    FIXBRA  = 1156,
1172
    FIXR  = 1157,
1173
    FIXTR = 1158,
1174
    FLOGR = 1159,
1175
    HDR = 1160,
1176
    HER = 1161,
1177
    HSCH  = 1162,
1178
    IAC = 1163,
1179
    IC  = 1164,
1180
    IC32  = 1165,
1181
    IC32Y = 1166,
1182
    ICM = 1167,
1183
    ICMH  = 1168,
1184
    ICMY  = 1169,
1185
    ICY = 1170,
1186
    IDTE  = 1171,
1187
    IDTEOpt = 1172,
1188
    IEDTR = 1173,
1189
    IEXTR = 1174,
1190
    IIHF  = 1175,
1191
    IIHH  = 1176,
1192
    IIHL  = 1177,
1193
    IILF  = 1178,
1194
    IILH  = 1179,
1195
    IILL  = 1180,
1196
    IPK = 1181,
1197
    IPM = 1182,
1198
    IPTE  = 1183,
1199
    IPTEOpt = 1184,
1200
    IPTEOptOpt  = 1185,
1201
    IRBM  = 1186,
1202
    ISKE  = 1187,
1203
    IVSK  = 1188,
1204
    InsnE = 1189,
1205
    InsnRI  = 1190,
1206
    InsnRIE = 1191,
1207
    InsnRIL = 1192,
1208
    InsnRILU  = 1193,
1209
    InsnRIS = 1194,
1210
    InsnRR  = 1195,
1211
    InsnRRE = 1196,
1212
    InsnRRF = 1197,
1213
    InsnRRS = 1198,
1214
    InsnRS  = 1199,
1215
    InsnRSE = 1200,
1216
    InsnRSI = 1201,
1217
    InsnRSY = 1202,
1218
    InsnRX  = 1203,
1219
    InsnRXE = 1204,
1220
    InsnRXF = 1205,
1221
    InsnRXY = 1206,
1222
    InsnS = 1207,
1223
    InsnSI  = 1208,
1224
    InsnSIL = 1209,
1225
    InsnSIY = 1210,
1226
    InsnSS  = 1211,
1227
    InsnSSE = 1212,
1228
    InsnSSF = 1213,
1229
    J = 1214,
1230
    JAsmE = 1215,
1231
    JAsmH = 1216,
1232
    JAsmHE  = 1217,
1233
    JAsmL = 1218,
1234
    JAsmLE  = 1219,
1235
    JAsmLH  = 1220,
1236
    JAsmM = 1221,
1237
    JAsmNE  = 1222,
1238
    JAsmNH  = 1223,
1239
    JAsmNHE = 1224,
1240
    JAsmNL  = 1225,
1241
    JAsmNLE = 1226,
1242
    JAsmNLH = 1227,
1243
    JAsmNM  = 1228,
1244
    JAsmNO  = 1229,
1245
    JAsmNP  = 1230,
1246
    JAsmNZ  = 1231,
1247
    JAsmO = 1232,
1248
    JAsmP = 1233,
1249
    JAsmZ = 1234,
1250
    JG  = 1235,
1251
    JGAsmE  = 1236,
1252
    JGAsmH  = 1237,
1253
    JGAsmHE = 1238,
1254
    JGAsmL  = 1239,
1255
    JGAsmLE = 1240,
1256
    JGAsmLH = 1241,
1257
    JGAsmM  = 1242,
1258
    JGAsmNE = 1243,
1259
    JGAsmNH = 1244,
1260
    JGAsmNHE  = 1245,
1261
    JGAsmNL = 1246,
1262
    JGAsmNLE  = 1247,
1263
    JGAsmNLH  = 1248,
1264
    JGAsmNM = 1249,
1265
    JGAsmNO = 1250,
1266
    JGAsmNP = 1251,
1267
    JGAsmNZ = 1252,
1268
    JGAsmO  = 1253,
1269
    JGAsmP  = 1254,
1270
    JGAsmZ  = 1255,
1271
    KDB = 1256,
1272
    KDBR  = 1257,
1273
    KDTR  = 1258,
1274
    KEB = 1259,
1275
    KEBR  = 1260,
1276
    KIMD  = 1261,
1277
    KLMD  = 1262,
1278
    KM  = 1263,
1279
    KMA = 1264,
1280
    KMAC  = 1265,
1281
    KMC = 1266,
1282
    KMCTR = 1267,
1283
    KMF = 1268,
1284
    KMO = 1269,
1285
    KXBR  = 1270,
1286
    KXTR  = 1271,
1287
    L = 1272,
1288
    LA  = 1273,
1289
    LAA = 1274,
1290
    LAAG  = 1275,
1291
    LAAL  = 1276,
1292
    LAALG = 1277,
1293
    LAE = 1278,
1294
    LAEY  = 1279,
1295
    LAM = 1280,
1296
    LAMY  = 1281,
1297
    LAN = 1282,
1298
    LANG  = 1283,
1299
    LAO = 1284,
1300
    LAOG  = 1285,
1301
    LARL  = 1286,
1302
    LASP  = 1287,
1303
    LAT = 1288,
1304
    LAX = 1289,
1305
    LAXG  = 1290,
1306
    LAY = 1291,
1307
    LB  = 1292,
1308
    LBH = 1293,
1309
    LBR = 1294,
1310
    LCBB  = 1295,
1311
    LCCTL = 1296,
1312
    LCDBR = 1297,
1313
    LCDFR = 1298,
1314
    LCDFR_32  = 1299,
1315
    LCDR  = 1300,
1316
    LCEBR = 1301,
1317
    LCER  = 1302,
1318
    LCGFR = 1303,
1319
    LCGR  = 1304,
1320
    LCR = 1305,
1321
    LCTL  = 1306,
1322
    LCTLG = 1307,
1323
    LCXBR = 1308,
1324
    LCXR  = 1309,
1325
    LD  = 1310,
1326
    LDE = 1311,
1327
    LDE32 = 1312,
1328
    LDEB  = 1313,
1329
    LDEBR = 1314,
1330
    LDER  = 1315,
1331
    LDETR = 1316,
1332
    LDGR  = 1317,
1333
    LDR = 1318,
1334
    LDR32 = 1319,
1335
    LDXBR = 1320,
1336
    LDXBRA  = 1321,
1337
    LDXR  = 1322,
1338
    LDXTR = 1323,
1339
    LDY = 1324,
1340
    LE  = 1325,
1341
    LEDBR = 1326,
1342
    LEDBRA  = 1327,
1343
    LEDR  = 1328,
1344
    LEDTR = 1329,
1345
    LER = 1330,
1346
    LEXBR = 1331,
1347
    LEXBRA  = 1332,
1348
    LEXR  = 1333,
1349
    LEY = 1334,
1350
    LFAS  = 1335,
1351
    LFH = 1336,
1352
    LFHAT = 1337,
1353
    LFPC  = 1338,
1354
    LG  = 1339,
1355
    LGAT  = 1340,
1356
    LGB = 1341,
1357
    LGBR  = 1342,
1358
    LGDR  = 1343,
1359
    LGF = 1344,
1360
    LGFI  = 1345,
1361
    LGFR  = 1346,
1362
    LGFRL = 1347,
1363
    LGG = 1348,
1364
    LGH = 1349,
1365
    LGHI  = 1350,
1366
    LGHR  = 1351,
1367
    LGHRL = 1352,
1368
    LGR = 1353,
1369
    LGRL  = 1354,
1370
    LGSC  = 1355,
1371
    LH  = 1356,
1372
    LHH = 1357,
1373
    LHI = 1358,
1374
    LHR = 1359,
1375
    LHRL  = 1360,
1376
    LHY = 1361,
1377
    LLC = 1362,
1378
    LLCH  = 1363,
1379
    LLCR  = 1364,
1380
    LLGC  = 1365,
1381
    LLGCR = 1366,
1382
    LLGF  = 1367,
1383
    LLGFAT  = 1368,
1384
    LLGFR = 1369,
1385
    LLGFRL  = 1370,
1386
    LLGFSG  = 1371,
1387
    LLGH  = 1372,
1388
    LLGHR = 1373,
1389
    LLGHRL  = 1374,
1390
    LLGT  = 1375,
1391
    LLGTAT  = 1376,
1392
    LLGTR = 1377,
1393
    LLH = 1378,
1394
    LLHH  = 1379,
1395
    LLHR  = 1380,
1396
    LLHRL = 1381,
1397
    LLIHF = 1382,
1398
    LLIHH = 1383,
1399
    LLIHL = 1384,
1400
    LLILF = 1385,
1401
    LLILH = 1386,
1402
    LLILL = 1387,
1403
    LLZRGF  = 1388,
1404
    LM  = 1389,
1405
    LMD = 1390,
1406
    LMG = 1391,
1407
    LMH = 1392,
1408
    LMY = 1393,
1409
    LNDBR = 1394,
1410
    LNDFR = 1395,
1411
    LNDFR_32  = 1396,
1412
    LNDR  = 1397,
1413
    LNEBR = 1398,
1414
    LNER  = 1399,
1415
    LNGFR = 1400,
1416
    LNGR  = 1401,
1417
    LNR = 1402,
1418
    LNXBR = 1403,
1419
    LNXR  = 1404,
1420
    LOC = 1405,
1421
    LOCAsm  = 1406,
1422
    LOCAsmE = 1407,
1423
    LOCAsmH = 1408,
1424
    LOCAsmHE  = 1409,
1425
    LOCAsmL = 1410,
1426
    LOCAsmLE  = 1411,
1427
    LOCAsmLH  = 1412,
1428
    LOCAsmM = 1413,
1429
    LOCAsmNE  = 1414,
1430
    LOCAsmNH  = 1415,
1431
    LOCAsmNHE = 1416,
1432
    LOCAsmNL  = 1417,
1433
    LOCAsmNLE = 1418,
1434
    LOCAsmNLH = 1419,
1435
    LOCAsmNM  = 1420,
1436
    LOCAsmNO  = 1421,
1437
    LOCAsmNP  = 1422,
1438
    LOCAsmNZ  = 1423,
1439
    LOCAsmO = 1424,
1440
    LOCAsmP = 1425,
1441
    LOCAsmZ = 1426,
1442
    LOCFH = 1427,
1443
    LOCFHAsm  = 1428,
1444
    LOCFHAsmE = 1429,
1445
    LOCFHAsmH = 1430,
1446
    LOCFHAsmHE  = 1431,
1447
    LOCFHAsmL = 1432,
1448
    LOCFHAsmLE  = 1433,
1449
    LOCFHAsmLH  = 1434,
1450
    LOCFHAsmM = 1435,
1451
    LOCFHAsmNE  = 1436,
1452
    LOCFHAsmNH  = 1437,
1453
    LOCFHAsmNHE = 1438,
1454
    LOCFHAsmNL  = 1439,
1455
    LOCFHAsmNLE = 1440,
1456
    LOCFHAsmNLH = 1441,
1457
    LOCFHAsmNM  = 1442,
1458
    LOCFHAsmNO  = 1443,
1459
    LOCFHAsmNP  = 1444,
1460
    LOCFHAsmNZ  = 1445,
1461
    LOCFHAsmO = 1446,
1462
    LOCFHAsmP = 1447,
1463
    LOCFHAsmZ = 1448,
1464
    LOCFHR  = 1449,
1465
    LOCFHRAsm = 1450,
1466
    LOCFHRAsmE  = 1451,
1467
    LOCFHRAsmH  = 1452,
1468
    LOCFHRAsmHE = 1453,
1469
    LOCFHRAsmL  = 1454,
1470
    LOCFHRAsmLE = 1455,
1471
    LOCFHRAsmLH = 1456,
1472
    LOCFHRAsmM  = 1457,
1473
    LOCFHRAsmNE = 1458,
1474
    LOCFHRAsmNH = 1459,
1475
    LOCFHRAsmNHE  = 1460,
1476
    LOCFHRAsmNL = 1461,
1477
    LOCFHRAsmNLE  = 1462,
1478
    LOCFHRAsmNLH  = 1463,
1479
    LOCFHRAsmNM = 1464,
1480
    LOCFHRAsmNO = 1465,
1481
    LOCFHRAsmNP = 1466,
1482
    LOCFHRAsmNZ = 1467,
1483
    LOCFHRAsmO  = 1468,
1484
    LOCFHRAsmP  = 1469,
1485
    LOCFHRAsmZ  = 1470,
1486
    LOCG  = 1471,
1487
    LOCGAsm = 1472,
1488
    LOCGAsmE  = 1473,
1489
    LOCGAsmH  = 1474,
1490
    LOCGAsmHE = 1475,
1491
    LOCGAsmL  = 1476,
1492
    LOCGAsmLE = 1477,
1493
    LOCGAsmLH = 1478,
1494
    LOCGAsmM  = 1479,
1495
    LOCGAsmNE = 1480,
1496
    LOCGAsmNH = 1481,
1497
    LOCGAsmNHE  = 1482,
1498
    LOCGAsmNL = 1483,
1499
    LOCGAsmNLE  = 1484,
1500
    LOCGAsmNLH  = 1485,
1501
    LOCGAsmNM = 1486,
1502
    LOCGAsmNO = 1487,
1503
    LOCGAsmNP = 1488,
1504
    LOCGAsmNZ = 1489,
1505
    LOCGAsmO  = 1490,
1506
    LOCGAsmP  = 1491,
1507
    LOCGAsmZ  = 1492,
1508
    LOCGHI  = 1493,
1509
    LOCGHIAsm = 1494,
1510
    LOCGHIAsmE  = 1495,
1511
    LOCGHIAsmH  = 1496,
1512
    LOCGHIAsmHE = 1497,
1513
    LOCGHIAsmL  = 1498,
1514
    LOCGHIAsmLE = 1499,
1515
    LOCGHIAsmLH = 1500,
1516
    LOCGHIAsmM  = 1501,
1517
    LOCGHIAsmNE = 1502,
1518
    LOCGHIAsmNH = 1503,
1519
    LOCGHIAsmNHE  = 1504,
1520
    LOCGHIAsmNL = 1505,
1521
    LOCGHIAsmNLE  = 1506,
1522
    LOCGHIAsmNLH  = 1507,
1523
    LOCGHIAsmNM = 1508,
1524
    LOCGHIAsmNO = 1509,
1525
    LOCGHIAsmNP = 1510,
1526
    LOCGHIAsmNZ = 1511,
1527
    LOCGHIAsmO  = 1512,
1528
    LOCGHIAsmP  = 1513,
1529
    LOCGHIAsmZ  = 1514,
1530
    LOCGR = 1515,
1531
    LOCGRAsm  = 1516,
1532
    LOCGRAsmE = 1517,
1533
    LOCGRAsmH = 1518,
1534
    LOCGRAsmHE  = 1519,
1535
    LOCGRAsmL = 1520,
1536
    LOCGRAsmLE  = 1521,
1537
    LOCGRAsmLH  = 1522,
1538
    LOCGRAsmM = 1523,
1539
    LOCGRAsmNE  = 1524,
1540
    LOCGRAsmNH  = 1525,
1541
    LOCGRAsmNHE = 1526,
1542
    LOCGRAsmNL  = 1527,
1543
    LOCGRAsmNLE = 1528,
1544
    LOCGRAsmNLH = 1529,
1545
    LOCGRAsmNM  = 1530,
1546
    LOCGRAsmNO  = 1531,
1547
    LOCGRAsmNP  = 1532,
1548
    LOCGRAsmNZ  = 1533,
1549
    LOCGRAsmO = 1534,
1550
    LOCGRAsmP = 1535,
1551
    LOCGRAsmZ = 1536,
1552
    LOCHHI  = 1537,
1553
    LOCHHIAsm = 1538,
1554
    LOCHHIAsmE  = 1539,
1555
    LOCHHIAsmH  = 1540,
1556
    LOCHHIAsmHE = 1541,
1557
    LOCHHIAsmL  = 1542,
1558
    LOCHHIAsmLE = 1543,
1559
    LOCHHIAsmLH = 1544,
1560
    LOCHHIAsmM  = 1545,
1561
    LOCHHIAsmNE = 1546,
1562
    LOCHHIAsmNH = 1547,
1563
    LOCHHIAsmNHE  = 1548,
1564
    LOCHHIAsmNL = 1549,
1565
    LOCHHIAsmNLE  = 1550,
1566
    LOCHHIAsmNLH  = 1551,
1567
    LOCHHIAsmNM = 1552,
1568
    LOCHHIAsmNO = 1553,
1569
    LOCHHIAsmNP = 1554,
1570
    LOCHHIAsmNZ = 1555,
1571
    LOCHHIAsmO  = 1556,
1572
    LOCHHIAsmP  = 1557,
1573
    LOCHHIAsmZ  = 1558,
1574
    LOCHI = 1559,
1575
    LOCHIAsm  = 1560,
1576
    LOCHIAsmE = 1561,
1577
    LOCHIAsmH = 1562,
1578
    LOCHIAsmHE  = 1563,
1579
    LOCHIAsmL = 1564,
1580
    LOCHIAsmLE  = 1565,
1581
    LOCHIAsmLH  = 1566,
1582
    LOCHIAsmM = 1567,
1583
    LOCHIAsmNE  = 1568,
1584
    LOCHIAsmNH  = 1569,
1585
    LOCHIAsmNHE = 1570,
1586
    LOCHIAsmNL  = 1571,
1587
    LOCHIAsmNLE = 1572,
1588
    LOCHIAsmNLH = 1573,
1589
    LOCHIAsmNM  = 1574,
1590
    LOCHIAsmNO  = 1575,
1591
    LOCHIAsmNP  = 1576,
1592
    LOCHIAsmNZ  = 1577,
1593
    LOCHIAsmO = 1578,
1594
    LOCHIAsmP = 1579,
1595
    LOCHIAsmZ = 1580,
1596
    LOCR  = 1581,
1597
    LOCRAsm = 1582,
1598
    LOCRAsmE  = 1583,
1599
    LOCRAsmH  = 1584,
1600
    LOCRAsmHE = 1585,
1601
    LOCRAsmL  = 1586,
1602
    LOCRAsmLE = 1587,
1603
    LOCRAsmLH = 1588,
1604
    LOCRAsmM  = 1589,
1605
    LOCRAsmNE = 1590,
1606
    LOCRAsmNH = 1591,
1607
    LOCRAsmNHE  = 1592,
1608
    LOCRAsmNL = 1593,
1609
    LOCRAsmNLE  = 1594,
1610
    LOCRAsmNLH  = 1595,
1611
    LOCRAsmNM = 1596,
1612
    LOCRAsmNO = 1597,
1613
    LOCRAsmNP = 1598,
1614
    LOCRAsmNZ = 1599,
1615
    LOCRAsmO  = 1600,
1616
    LOCRAsmP  = 1601,
1617
    LOCRAsmZ  = 1602,
1618
    LPCTL = 1603,
1619
    LPD = 1604,
1620
    LPDBR = 1605,
1621
    LPDFR = 1606,
1622
    LPDFR_32  = 1607,
1623
    LPDG  = 1608,
1624
    LPDR  = 1609,
1625
    LPEBR = 1610,
1626
    LPER  = 1611,
1627
    LPGFR = 1612,
1628
    LPGR  = 1613,
1629
    LPP = 1614,
1630
    LPQ = 1615,
1631
    LPR = 1616,
1632
    LPSW  = 1617,
1633
    LPSWE = 1618,
1634
    LPTEA = 1619,
1635
    LPXBR = 1620,
1636
    LPXR  = 1621,
1637
    LR  = 1622,
1638
    LRA = 1623,
1639
    LRAG  = 1624,
1640
    LRAY  = 1625,
1641
    LRDR  = 1626,
1642
    LRER  = 1627,
1643
    LRL = 1628,
1644
    LRV = 1629,
1645
    LRVG  = 1630,
1646
    LRVGR = 1631,
1647
    LRVH  = 1632,
1648
    LRVR  = 1633,
1649
    LSCTL = 1634,
1650
    LT  = 1635,
1651
    LTDBR = 1636,
1652
    LTDBRCompare  = 1637,
1653
    LTDR  = 1638,
1654
    LTDTR = 1639,
1655
    LTEBR = 1640,
1656
    LTEBRCompare  = 1641,
1657
    LTER  = 1642,
1658
    LTG = 1643,
1659
    LTGF  = 1644,
1660
    LTGFR = 1645,
1661
    LTGR  = 1646,
1662
    LTR = 1647,
1663
    LTXBR = 1648,
1664
    LTXBRCompare  = 1649,
1665
    LTXR  = 1650,
1666
    LTXTR = 1651,
1667
    LURA  = 1652,
1668
    LURAG = 1653,
1669
    LXD = 1654,
1670
    LXDB  = 1655,
1671
    LXDBR = 1656,
1672
    LXDR  = 1657,
1673
    LXDTR = 1658,
1674
    LXE = 1659,
1675
    LXEB  = 1660,
1676
    LXEBR = 1661,
1677
    LXER  = 1662,
1678
    LXR = 1663,
1679
    LY  = 1664,
1680
    LZDR  = 1665,
1681
    LZER  = 1666,
1682
    LZRF  = 1667,
1683
    LZRG  = 1668,
1684
    LZXR  = 1669,
1685
    M = 1670,
1686
    MAD = 1671,
1687
    MADB  = 1672,
1688
    MADBR = 1673,
1689
    MADR  = 1674,
1690
    MAE = 1675,
1691
    MAEB  = 1676,
1692
    MAEBR = 1677,
1693
    MAER  = 1678,
1694
    MAY = 1679,
1695
    MAYH  = 1680,
1696
    MAYHR = 1681,
1697
    MAYL  = 1682,
1698
    MAYLR = 1683,
1699
    MAYR  = 1684,
1700
    MC  = 1685,
1701
    MD  = 1686,
1702
    MDB = 1687,
1703
    MDBR  = 1688,
1704
    MDE = 1689,
1705
    MDEB  = 1690,
1706
    MDEBR = 1691,
1707
    MDER  = 1692,
1708
    MDR = 1693,
1709
    MDTR  = 1694,
1710
    MDTRA = 1695,
1711
    ME  = 1696,
1712
    MEE = 1697,
1713
    MEEB  = 1698,
1714
    MEEBR = 1699,
1715
    MEER  = 1700,
1716
    MER = 1701,
1717
    MFY = 1702,
1718
    MG  = 1703,
1719
    MGH = 1704,
1720
    MGHI  = 1705,
1721
    MGRK  = 1706,
1722
    MH  = 1707,
1723
    MHI = 1708,
1724
    MHY = 1709,
1725
    ML  = 1710,
1726
    MLG = 1711,
1727
    MLGR  = 1712,
1728
    MLR = 1713,
1729
    MP  = 1714,
1730
    MR  = 1715,
1731
    MS  = 1716,
1732
    MSC = 1717,
1733
    MSCH  = 1718,
1734
    MSD = 1719,
1735
    MSDB  = 1720,
1736
    MSDBR = 1721,
1737
    MSDR  = 1722,
1738
    MSE = 1723,
1739
    MSEB  = 1724,
1740
    MSEBR = 1725,
1741
    MSER  = 1726,
1742
    MSFI  = 1727,
1743
    MSG = 1728,
1744
    MSGC  = 1729,
1745
    MSGF  = 1730,
1746
    MSGFI = 1731,
1747
    MSGFR = 1732,
1748
    MSGR  = 1733,
1749
    MSGRKC  = 1734,
1750
    MSR = 1735,
1751
    MSRKC = 1736,
1752
    MSTA  = 1737,
1753
    MSY = 1738,
1754
    MVC = 1739,
1755
    MVCDK = 1740,
1756
    MVCIN = 1741,
1757
    MVCK  = 1742,
1758
    MVCL  = 1743,
1759
    MVCLE = 1744,
1760
    MVCLU = 1745,
1761
    MVCOS = 1746,
1762
    MVCP  = 1747,
1763
    MVCS  = 1748,
1764
    MVCSK = 1749,
1765
    MVGHI = 1750,
1766
    MVHHI = 1751,
1767
    MVHI  = 1752,
1768
    MVI = 1753,
1769
    MVIY  = 1754,
1770
    MVN = 1755,
1771
    MVO = 1756,
1772
    MVPG  = 1757,
1773
    MVST  = 1758,
1774
    MVZ = 1759,
1775
    MXBR  = 1760,
1776
    MXD = 1761,
1777
    MXDB  = 1762,
1778
    MXDBR = 1763,
1779
    MXDR  = 1764,
1780
    MXR = 1765,
1781
    MXTR  = 1766,
1782
    MXTRA = 1767,
1783
    MY  = 1768,
1784
    MYH = 1769,
1785
    MYHR  = 1770,
1786
    MYL = 1771,
1787
    MYLR  = 1772,
1788
    MYR = 1773,
1789
    N = 1774,
1790
    NC  = 1775,
1791
    NG  = 1776,
1792
    NGR = 1777,
1793
    NGRK  = 1778,
1794
    NI  = 1779,
1795
    NIAI  = 1780,
1796
    NIHF  = 1781,
1797
    NIHH  = 1782,
1798
    NIHL  = 1783,
1799
    NILF  = 1784,
1800
    NILH  = 1785,
1801
    NILL  = 1786,
1802
    NIY = 1787,
1803
    NR  = 1788,
1804
    NRK = 1789,
1805
    NTSTG = 1790,
1806
    NY  = 1791,
1807
    O = 1792,
1808
    OC  = 1793,
1809
    OG  = 1794,
1810
    OGR = 1795,
1811
    OGRK  = 1796,
1812
    OI  = 1797,
1813
    OIHF  = 1798,
1814
    OIHH  = 1799,
1815
    OIHL  = 1800,
1816
    OILF  = 1801,
1817
    OILH  = 1802,
1818
    OILL  = 1803,
1819
    OIY = 1804,
1820
    OR  = 1805,
1821
    ORK = 1806,
1822
    OY  = 1807,
1823
    PACK  = 1808,
1824
    PALB  = 1809,
1825
    PC  = 1810,
1826
    PCC = 1811,
1827
    PCKMO = 1812,
1828
    PFD = 1813,
1829
    PFDRL = 1814,
1830
    PFMF  = 1815,
1831
    PFPO  = 1816,
1832
    PGIN  = 1817,
1833
    PGOUT = 1818,
1834
    PKA = 1819,
1835
    PKU = 1820,
1836
    PLO = 1821,
1837
    POPCNT  = 1822,
1838
    PPA = 1823,
1839
    PPNO  = 1824,
1840
    PR  = 1825,
1841
    PRNO  = 1826,
1842
    PT  = 1827,
1843
    PTF = 1828,
1844
    PTFF  = 1829,
1845
    PTI = 1830,
1846
    PTLB  = 1831,
1847
    QADTR = 1832,
1848
    QAXTR = 1833,
1849
    QCTRI = 1834,
1850
    QSI = 1835,
1851
    RCHP  = 1836,
1852
    RISBG = 1837,
1853
    RISBG32 = 1838,
1854
    RISBGN  = 1839,
1855
    RISBHG  = 1840,
1856
    RISBLG  = 1841,
1857
    RLL = 1842,
1858
    RLLG  = 1843,
1859
    RNSBG = 1844,
1860
    ROSBG = 1845,
1861
    RP  = 1846,
1862
    RRBE  = 1847,
1863
    RRBM  = 1848,
1864
    RRDTR = 1849,
1865
    RRXTR = 1850,
1866
    RSCH  = 1851,
1867
    RXSBG = 1852,
1868
    S = 1853,
1869
    SAC = 1854,
1870
    SACF  = 1855,
1871
    SAL = 1856,
1872
    SAM24 = 1857,
1873
    SAM31 = 1858,
1874
    SAM64 = 1859,
1875
    SAR = 1860,
1876
    SCCTR = 1861,
1877
    SCHM  = 1862,
1878
    SCK = 1863,
1879
    SCKC  = 1864,
1880
    SCKPF = 1865,
1881
    SD  = 1866,
1882
    SDB = 1867,
1883
    SDBR  = 1868,
1884
    SDR = 1869,
1885
    SDTR  = 1870,
1886
    SDTRA = 1871,
1887
    SE  = 1872,
1888
    SEB = 1873,
1889
    SEBR  = 1874,
1890
    SER = 1875,
1891
    SFASR = 1876,
1892
    SFPC  = 1877,
1893
    SG  = 1878,
1894
    SGF = 1879,
1895
    SGFR  = 1880,
1896
    SGH = 1881,
1897
    SGR = 1882,
1898
    SGRK  = 1883,
1899
    SH  = 1884,
1900
    SHHHR = 1885,
1901
    SHHLR = 1886,
1902
    SHY = 1887,
1903
    SIE = 1888,
1904
    SIGA  = 1889,
1905
    SIGP  = 1890,
1906
    SL  = 1891,
1907
    SLA = 1892,
1908
    SLAG  = 1893,
1909
    SLAK  = 1894,
1910
    SLB = 1895,
1911
    SLBG  = 1896,
1912
    SLBGR = 1897,
1913
    SLBR  = 1898,
1914
    SLDA  = 1899,
1915
    SLDL  = 1900,
1916
    SLDT  = 1901,
1917
    SLFI  = 1902,
1918
    SLG = 1903,
1919
    SLGF  = 1904,
1920
    SLGFI = 1905,
1921
    SLGFR = 1906,
1922
    SLGR  = 1907,
1923
    SLGRK = 1908,
1924
    SLHHHR  = 1909,
1925
    SLHHLR  = 1910,
1926
    SLL = 1911,
1927
    SLLG  = 1912,
1928
    SLLK  = 1913,
1929
    SLR = 1914,
1930
    SLRK  = 1915,
1931
    SLXT  = 1916,
1932
    SLY = 1917,
1933
    SP  = 1918,
1934
    SPCTR = 1919,
1935
    SPKA  = 1920,
1936
    SPM = 1921,
1937
    SPT = 1922,
1938
    SPX = 1923,
1939
    SQD = 1924,
1940
    SQDB  = 1925,
1941
    SQDBR = 1926,
1942
    SQDR  = 1927,
1943
    SQE = 1928,
1944
    SQEB  = 1929,
1945
    SQEBR = 1930,
1946
    SQER  = 1931,
1947
    SQXBR = 1932,
1948
    SQXR  = 1933,
1949
    SR  = 1934,
1950
    SRA = 1935,
1951
    SRAG  = 1936,
1952
    SRAK  = 1937,
1953
    SRDA  = 1938,
1954
    SRDL  = 1939,
1955
    SRDT  = 1940,
1956
    SRK = 1941,
1957
    SRL = 1942,
1958
    SRLG  = 1943,
1959
    SRLK  = 1944,
1960
    SRNM  = 1945,
1961
    SRNMB = 1946,
1962
    SRNMT = 1947,
1963
    SRP = 1948,
1964
    SRST  = 1949,
1965
    SRSTU = 1950,
1966
    SRXT  = 1951,
1967
    SSAIR = 1952,
1968
    SSAR  = 1953,
1969
    SSCH  = 1954,
1970
    SSKE  = 1955,
1971
    SSKEOpt = 1956,
1972
    SSM = 1957,
1973
    ST  = 1958,
1974
    STAM  = 1959,
1975
    STAMY = 1960,
1976
    STAP  = 1961,
1977
    STC = 1962,
1978
    STCH  = 1963,
1979
    STCK  = 1964,
1980
    STCKC = 1965,
1981
    STCKE = 1966,
1982
    STCKF = 1967,
1983
    STCM  = 1968,
1984
    STCMH = 1969,
1985
    STCMY = 1970,
1986
    STCPS = 1971,
1987
    STCRW = 1972,
1988
    STCTG = 1973,
1989
    STCTL = 1974,
1990
    STCY  = 1975,
1991
    STD = 1976,
1992
    STDY  = 1977,
1993
    STE = 1978,
1994
    STEY  = 1979,
1995
    STFH  = 1980,
1996
    STFL  = 1981,
1997
    STFLE = 1982,
1998
    STFPC = 1983,
1999
    STG = 1984,
2000
    STGRL = 1985,
2001
    STGSC = 1986,
2002
    STH = 1987,
2003
    STHH  = 1988,
2004
    STHRL = 1989,
2005
    STHY  = 1990,
2006
    STIDP = 1991,
2007
    STM = 1992,
2008
    STMG  = 1993,
2009
    STMH  = 1994,
2010
    STMY  = 1995,
2011
    STNSM = 1996,
2012
    STOC  = 1997,
2013
    STOCAsm = 1998,
2014
    STOCAsmE  = 1999,
2015
    STOCAsmH  = 2000,
2016
    STOCAsmHE = 2001,
2017
    STOCAsmL  = 2002,
2018
    STOCAsmLE = 2003,
2019
    STOCAsmLH = 2004,
2020
    STOCAsmM  = 2005,
2021
    STOCAsmNE = 2006,
2022
    STOCAsmNH = 2007,
2023
    STOCAsmNHE  = 2008,
2024
    STOCAsmNL = 2009,
2025
    STOCAsmNLE  = 2010,
2026
    STOCAsmNLH  = 2011,
2027
    STOCAsmNM = 2012,
2028
    STOCAsmNO = 2013,
2029
    STOCAsmNP = 2014,
2030
    STOCAsmNZ = 2015,
2031
    STOCAsmO  = 2016,
2032
    STOCAsmP  = 2017,
2033
    STOCAsmZ  = 2018,
2034
    STOCFH  = 2019,
2035
    STOCFHAsm = 2020,
2036
    STOCFHAsmE  = 2021,
2037
    STOCFHAsmH  = 2022,
2038
    STOCFHAsmHE = 2023,
2039
    STOCFHAsmL  = 2024,
2040
    STOCFHAsmLE = 2025,
2041
    STOCFHAsmLH = 2026,
2042
    STOCFHAsmM  = 2027,
2043
    STOCFHAsmNE = 2028,
2044
    STOCFHAsmNH = 2029,
2045
    STOCFHAsmNHE  = 2030,
2046
    STOCFHAsmNL = 2031,
2047
    STOCFHAsmNLE  = 2032,
2048
    STOCFHAsmNLH  = 2033,
2049
    STOCFHAsmNM = 2034,
2050
    STOCFHAsmNO = 2035,
2051
    STOCFHAsmNP = 2036,
2052
    STOCFHAsmNZ = 2037,
2053
    STOCFHAsmO  = 2038,
2054
    STOCFHAsmP  = 2039,
2055
    STOCFHAsmZ  = 2040,
2056
    STOCG = 2041,
2057
    STOCGAsm  = 2042,
2058
    STOCGAsmE = 2043,
2059
    STOCGAsmH = 2044,
2060
    STOCGAsmHE  = 2045,
2061
    STOCGAsmL = 2046,
2062
    STOCGAsmLE  = 2047,
2063
    STOCGAsmLH  = 2048,
2064
    STOCGAsmM = 2049,
2065
    STOCGAsmNE  = 2050,
2066
    STOCGAsmNH  = 2051,
2067
    STOCGAsmNHE = 2052,
2068
    STOCGAsmNL  = 2053,
2069
    STOCGAsmNLE = 2054,
2070
    STOCGAsmNLH = 2055,
2071
    STOCGAsmNM  = 2056,
2072
    STOCGAsmNO  = 2057,
2073
    STOCGAsmNP  = 2058,
2074
    STOCGAsmNZ  = 2059,
2075
    STOCGAsmO = 2060,
2076
    STOCGAsmP = 2061,
2077
    STOCGAsmZ = 2062,
2078
    STOSM = 2063,
2079
    STPQ  = 2064,
2080
    STPT  = 2065,
2081
    STPX  = 2066,
2082
    STRAG = 2067,
2083
    STRL  = 2068,
2084
    STRV  = 2069,
2085
    STRVG = 2070,
2086
    STRVH = 2071,
2087
    STSCH = 2072,
2088
    STSI  = 2073,
2089
    STURA = 2074,
2090
    STURG = 2075,
2091
    STY = 2076,
2092
    SU  = 2077,
2093
    SUR = 2078,
2094
    SVC = 2079,
2095
    SW  = 2080,
2096
    SWR = 2081,
2097
    SXBR  = 2082,
2098
    SXR = 2083,
2099
    SXTR  = 2084,
2100
    SXTRA = 2085,
2101
    SY  = 2086,
2102
    TABORT  = 2087,
2103
    TAM = 2088,
2104
    TAR = 2089,
2105
    TB  = 2090,
2106
    TBDR  = 2091,
2107
    TBEDR = 2092,
2108
    TBEGIN  = 2093,
2109
    TBEGINC = 2094,
2110
    TCDB  = 2095,
2111
    TCEB  = 2096,
2112
    TCXB  = 2097,
2113
    TDCDT = 2098,
2114
    TDCET = 2099,
2115
    TDCXT = 2100,
2116
    TDGDT = 2101,
2117
    TDGET = 2102,
2118
    TDGXT = 2103,
2119
    TEND  = 2104,
2120
    THDER = 2105,
2121
    THDR  = 2106,
2122
    TM  = 2107,
2123
    TMHH  = 2108,
2124
    TMHL  = 2109,
2125
    TMLH  = 2110,
2126
    TMLL  = 2111,
2127
    TMY = 2112,
2128
    TP  = 2113,
2129
    TPI = 2114,
2130
    TPROT = 2115,
2131
    TR  = 2116,
2132
    TRACE = 2117,
2133
    TRACG = 2118,
2134
    TRAP2 = 2119,
2135
    TRAP4 = 2120,
2136
    TRE = 2121,
2137
    TROO  = 2122,
2138
    TROOOpt = 2123,
2139
    TROT  = 2124,
2140
    TROTOpt = 2125,
2141
    TRT = 2126,
2142
    TRTE  = 2127,
2143
    TRTEOpt = 2128,
2144
    TRTO  = 2129,
2145
    TRTOOpt = 2130,
2146
    TRTR  = 2131,
2147
    TRTRE = 2132,
2148
    TRTREOpt  = 2133,
2149
    TRTT  = 2134,
2150
    TRTTOpt = 2135,
2151
    TS  = 2136,
2152
    TSCH  = 2137,
2153
    UNPK  = 2138,
2154
    UNPKA = 2139,
2155
    UNPKU = 2140,
2156
    UPT = 2141,
2157
    VA  = 2142,
2158
    VAB = 2143,
2159
    VAC = 2144,
2160
    VACC  = 2145,
2161
    VACCB = 2146,
2162
    VACCC = 2147,
2163
    VACCCQ  = 2148,
2164
    VACCF = 2149,
2165
    VACCG = 2150,
2166
    VACCH = 2151,
2167
    VACCQ = 2152,
2168
    VACQ  = 2153,
2169
    VAF = 2154,
2170
    VAG = 2155,
2171
    VAH = 2156,
2172
    VAP = 2157,
2173
    VAQ = 2158,
2174
    VAVG  = 2159,
2175
    VAVGB = 2160,
2176
    VAVGF = 2161,
2177
    VAVGG = 2162,
2178
    VAVGH = 2163,
2179
    VAVGL = 2164,
2180
    VAVGLB  = 2165,
2181
    VAVGLF  = 2166,
2182
    VAVGLG  = 2167,
2183
    VAVGLH  = 2168,
2184
    VBPERM  = 2169,
2185
    VCDG  = 2170,
2186
    VCDGB = 2171,
2187
    VCDLG = 2172,
2188
    VCDLGB  = 2173,
2189
    VCEQ  = 2174,
2190
    VCEQB = 2175,
2191
    VCEQBS  = 2176,
2192
    VCEQF = 2177,
2193
    VCEQFS  = 2178,
2194
    VCEQG = 2179,
2195
    VCEQGS  = 2180,
2196
    VCEQH = 2181,
2197
    VCEQHS  = 2182,
2198
    VCGD  = 2183,
2199
    VCGDB = 2184,
2200
    VCH = 2185,
2201
    VCHB  = 2186,
2202
    VCHBS = 2187,
2203
    VCHF  = 2188,
2204
    VCHFS = 2189,
2205
    VCHG  = 2190,
2206
    VCHGS = 2191,
2207
    VCHH  = 2192,
2208
    VCHHS = 2193,
2209
    VCHL  = 2194,
2210
    VCHLB = 2195,
2211
    VCHLBS  = 2196,
2212
    VCHLF = 2197,
2213
    VCHLFS  = 2198,
2214
    VCHLG = 2199,
2215
    VCHLGS  = 2200,
2216
    VCHLH = 2201,
2217
    VCHLHS  = 2202,
2218
    VCKSM = 2203,
2219
    VCLGD = 2204,
2220
    VCLGDB  = 2205,
2221
    VCLZ  = 2206,
2222
    VCLZB = 2207,
2223
    VCLZF = 2208,
2224
    VCLZG = 2209,
2225
    VCLZH = 2210,
2226
    VCP = 2211,
2227
    VCTZ  = 2212,
2228
    VCTZB = 2213,
2229
    VCTZF = 2214,
2230
    VCTZG = 2215,
2231
    VCTZH = 2216,
2232
    VCVB  = 2217,
2233
    VCVBG = 2218,
2234
    VCVD  = 2219,
2235
    VCVDG = 2220,
2236
    VDP = 2221,
2237
    VEC = 2222,
2238
    VECB  = 2223,
2239
    VECF  = 2224,
2240
    VECG  = 2225,
2241
    VECH  = 2226,
2242
    VECL  = 2227,
2243
    VECLB = 2228,
2244
    VECLF = 2229,
2245
    VECLG = 2230,
2246
    VECLH = 2231,
2247
    VERIM = 2232,
2248
    VERIMB  = 2233,
2249
    VERIMF  = 2234,
2250
    VERIMG  = 2235,
2251
    VERIMH  = 2236,
2252
    VERLL = 2237,
2253
    VERLLB  = 2238,
2254
    VERLLF  = 2239,
2255
    VERLLG  = 2240,
2256
    VERLLH  = 2241,
2257
    VERLLV  = 2242,
2258
    VERLLVB = 2243,
2259
    VERLLVF = 2244,
2260
    VERLLVG = 2245,
2261
    VERLLVH = 2246,
2262
    VESL  = 2247,
2263
    VESLB = 2248,
2264
    VESLF = 2249,
2265
    VESLG = 2250,
2266
    VESLH = 2251,
2267
    VESLV = 2252,
2268
    VESLVB  = 2253,
2269
    VESLVF  = 2254,
2270
    VESLVG  = 2255,
2271
    VESLVH  = 2256,
2272
    VESRA = 2257,
2273
    VESRAB  = 2258,
2274
    VESRAF  = 2259,
2275
    VESRAG  = 2260,
2276
    VESRAH  = 2261,
2277
    VESRAV  = 2262,
2278
    VESRAVB = 2263,
2279
    VESRAVF = 2264,
2280
    VESRAVG = 2265,
2281
    VESRAVH = 2266,
2282
    VESRL = 2267,
2283
    VESRLB  = 2268,
2284
    VESRLF  = 2269,
2285
    VESRLG  = 2270,
2286
    VESRLH  = 2271,
2287
    VESRLV  = 2272,
2288
    VESRLVB = 2273,
2289
    VESRLVF = 2274,
2290
    VESRLVG = 2275,
2291
    VESRLVH = 2276,
2292
    VFA = 2277,
2293
    VFADB = 2278,
2294
    VFAE  = 2279,
2295
    VFAEB = 2280,
2296
    VFAEBS  = 2281,
2297
    VFAEF = 2282,
2298
    VFAEFS  = 2283,
2299
    VFAEH = 2284,
2300
    VFAEHS  = 2285,
2301
    VFAEZB  = 2286,
2302
    VFAEZBS = 2287,
2303
    VFAEZF  = 2288,
2304
    VFAEZFS = 2289,
2305
    VFAEZH  = 2290,
2306
    VFAEZHS = 2291,
2307
    VFASB = 2292,
2308
    VFCE  = 2293,
2309
    VFCEDB  = 2294,
2310
    VFCEDBS = 2295,
2311
    VFCESB  = 2296,
2312
    VFCESBS = 2297,
2313
    VFCH  = 2298,
2314
    VFCHDB  = 2299,
2315
    VFCHDBS = 2300,
2316
    VFCHE = 2301,
2317
    VFCHEDB = 2302,
2318
    VFCHEDBS  = 2303,
2319
    VFCHESB = 2304,
2320
    VFCHESBS  = 2305,
2321
    VFCHSB  = 2306,
2322
    VFCHSBS = 2307,
2323
    VFD = 2308,
2324
    VFDDB = 2309,
2325
    VFDSB = 2310,
2326
    VFEE  = 2311,
2327
    VFEEB = 2312,
2328
    VFEEBS  = 2313,
2329
    VFEEF = 2314,
2330
    VFEEFS  = 2315,
2331
    VFEEH = 2316,
2332
    VFEEHS  = 2317,
2333
    VFEEZB  = 2318,
2334
    VFEEZBS = 2319,
2335
    VFEEZF  = 2320,
2336
    VFEEZFS = 2321,
2337
    VFEEZH  = 2322,
2338
    VFEEZHS = 2323,
2339
    VFENE = 2324,
2340
    VFENEB  = 2325,
2341
    VFENEBS = 2326,
2342
    VFENEF  = 2327,
2343
    VFENEFS = 2328,
2344
    VFENEH  = 2329,
2345
    VFENEHS = 2330,
2346
    VFENEZB = 2331,
2347
    VFENEZBS  = 2332,
2348
    VFENEZF = 2333,
2349
    VFENEZFS  = 2334,
2350
    VFENEZH = 2335,
2351
    VFENEZHS  = 2336,
2352
    VFI = 2337,
2353
    VFIDB = 2338,
2354
    VFISB = 2339,
2355
    VFKEDB  = 2340,
2356
    VFKEDBS = 2341,
2357
    VFKESB  = 2342,
2358
    VFKESBS = 2343,
2359
    VFKHDB  = 2344,
2360
    VFKHDBS = 2345,
2361
    VFKHEDB = 2346,
2362
    VFKHEDBS  = 2347,
2363
    VFKHESB = 2348,
2364
    VFKHESBS  = 2349,
2365
    VFKHSB  = 2350,
2366
    VFKHSBS = 2351,
2367
    VFLCDB  = 2352,
2368
    VFLCSB  = 2353,
2369
    VFLL  = 2354,
2370
    VFLLS = 2355,
2371
    VFLNDB  = 2356,
2372
    VFLNSB  = 2357,
2373
    VFLPDB  = 2358,
2374
    VFLPSB  = 2359,
2375
    VFLR  = 2360,
2376
    VFLRD = 2361,
2377
    VFM = 2362,
2378
    VFMA  = 2363,
2379
    VFMADB  = 2364,
2380
    VFMASB  = 2365,
2381
    VFMAX = 2366,
2382
    VFMAXDB = 2367,
2383
    VFMAXSB = 2368,
2384
    VFMDB = 2369,
2385
    VFMIN = 2370,
2386
    VFMINDB = 2371,
2387
    VFMINSB = 2372,
2388
    VFMS  = 2373,
2389
    VFMSB = 2374,
2390
    VFMSDB  = 2375,
2391
    VFMSSB  = 2376,
2392
    VFNMA = 2377,
2393
    VFNMADB = 2378,
2394
    VFNMASB = 2379,
2395
    VFNMS = 2380,
2396
    VFNMSDB = 2381,
2397
    VFNMSSB = 2382,
2398
    VFPSO = 2383,
2399
    VFPSODB = 2384,
2400
    VFPSOSB = 2385,
2401
    VFS = 2386,
2402
    VFSDB = 2387,
2403
    VFSQ  = 2388,
2404
    VFSQDB  = 2389,
2405
    VFSQSB  = 2390,
2406
    VFSSB = 2391,
2407
    VFTCI = 2392,
2408
    VFTCIDB = 2393,
2409
    VFTCISB = 2394,
2410
    VGBM  = 2395,
2411
    VGEF  = 2396,
2412
    VGEG  = 2397,
2413
    VGFM  = 2398,
2414
    VGFMA = 2399,
2415
    VGFMAB  = 2400,
2416
    VGFMAF  = 2401,
2417
    VGFMAG  = 2402,
2418
    VGFMAH  = 2403,
2419
    VGFMB = 2404,
2420
    VGFMF = 2405,
2421
    VGFMG = 2406,
2422
    VGFMH = 2407,
2423
    VGM = 2408,
2424
    VGMB  = 2409,
2425
    VGMF  = 2410,
2426
    VGMG  = 2411,
2427
    VGMH  = 2412,
2428
    VISTR = 2413,
2429
    VISTRB  = 2414,
2430
    VISTRBS = 2415,
2431
    VISTRF  = 2416,
2432
    VISTRFS = 2417,
2433
    VISTRH  = 2418,
2434
    VISTRHS = 2419,
2435
    VL  = 2420,
2436
    VLBB  = 2421,
2437
    VLC = 2422,
2438
    VLCB  = 2423,
2439
    VLCF  = 2424,
2440
    VLCG  = 2425,
2441
    VLCH  = 2426,
2442
    VLDE  = 2427,
2443
    VLDEB = 2428,
2444
    VLEB  = 2429,
2445
    VLED  = 2430,
2446
    VLEDB = 2431,
2447
    VLEF  = 2432,
2448
    VLEG  = 2433,
2449
    VLEH  = 2434,
2450
    VLEIB = 2435,
2451
    VLEIF = 2436,
2452
    VLEIG = 2437,
2453
    VLEIH = 2438,
2454
    VLGV  = 2439,
2455
    VLGVB = 2440,
2456
    VLGVF = 2441,
2457
    VLGVG = 2442,
2458
    VLGVH = 2443,
2459
    VLIP  = 2444,
2460
    VLL = 2445,
2461
    VLLEZ = 2446,
2462
    VLLEZB  = 2447,
2463
    VLLEZF  = 2448,
2464
    VLLEZG  = 2449,
2465
    VLLEZH  = 2450,
2466
    VLLEZLF = 2451,
2467
    VLM = 2452,
2468
    VLP = 2453,
2469
    VLPB  = 2454,
2470
    VLPF  = 2455,
2471
    VLPG  = 2456,
2472
    VLPH  = 2457,
2473
    VLR = 2458,
2474
    VLREP = 2459,
2475
    VLREPB  = 2460,
2476
    VLREPF  = 2461,
2477
    VLREPG  = 2462,
2478
    VLREPH  = 2463,
2479
    VLRL  = 2464,
2480
    VLRLR = 2465,
2481
    VLVG  = 2466,
2482
    VLVGB = 2467,
2483
    VLVGF = 2468,
2484
    VLVGG = 2469,
2485
    VLVGH = 2470,
2486
    VLVGP = 2471,
2487
    VMAE  = 2472,
2488
    VMAEB = 2473,
2489
    VMAEF = 2474,
2490
    VMAEH = 2475,
2491
    VMAH  = 2476,
2492
    VMAHB = 2477,
2493
    VMAHF = 2478,
2494
    VMAHH = 2479,
2495
    VMAL  = 2480,
2496
    VMALB = 2481,
2497
    VMALE = 2482,
2498
    VMALEB  = 2483,
2499
    VMALEF  = 2484,
2500
    VMALEH  = 2485,
2501
    VMALF = 2486,
2502
    VMALH = 2487,
2503
    VMALHB  = 2488,
2504
    VMALHF  = 2489,
2505
    VMALHH  = 2490,
2506
    VMALHW  = 2491,
2507
    VMALO = 2492,
2508
    VMALOB  = 2493,
2509
    VMALOF  = 2494,
2510
    VMALOH  = 2495,
2511
    VMAO  = 2496,
2512
    VMAOB = 2497,
2513
    VMAOF = 2498,
2514
    VMAOH = 2499,
2515
    VME = 2500,
2516
    VMEB  = 2501,
2517
    VMEF  = 2502,
2518
    VMEH  = 2503,
2519
    VMH = 2504,
2520
    VMHB  = 2505,
2521
    VMHF  = 2506,
2522
    VMHH  = 2507,
2523
    VML = 2508,
2524
    VMLB  = 2509,
2525
    VMLE  = 2510,
2526
    VMLEB = 2511,
2527
    VMLEF = 2512,
2528
    VMLEH = 2513,
2529
    VMLF  = 2514,
2530
    VMLH  = 2515,
2531
    VMLHB = 2516,
2532
    VMLHF = 2517,
2533
    VMLHH = 2518,
2534
    VMLHW = 2519,
2535
    VMLO  = 2520,
2536
    VMLOB = 2521,
2537
    VMLOF = 2522,
2538
    VMLOH = 2523,
2539
    VMN = 2524,
2540
    VMNB  = 2525,
2541
    VMNF  = 2526,
2542
    VMNG  = 2527,
2543
    VMNH  = 2528,
2544
    VMNL  = 2529,
2545
    VMNLB = 2530,
2546
    VMNLF = 2531,
2547
    VMNLG = 2532,
2548
    VMNLH = 2533,
2549
    VMO = 2534,
2550
    VMOB  = 2535,
2551
    VMOF  = 2536,
2552
    VMOH  = 2537,
2553
    VMP = 2538,
2554
    VMRH  = 2539,
2555
    VMRHB = 2540,
2556
    VMRHF = 2541,
2557
    VMRHG = 2542,
2558
    VMRHH = 2543,
2559
    VMRL  = 2544,
2560
    VMRLB = 2545,
2561
    VMRLF = 2546,
2562
    VMRLG = 2547,
2563
    VMRLH = 2548,
2564
    VMSL  = 2549,
2565
    VMSLG = 2550,
2566
    VMSP  = 2551,
2567
    VMX = 2552,
2568
    VMXB  = 2553,
2569
    VMXF  = 2554,
2570
    VMXG  = 2555,
2571
    VMXH  = 2556,
2572
    VMXL  = 2557,
2573
    VMXLB = 2558,
2574
    VMXLF = 2559,
2575
    VMXLG = 2560,
2576
    VMXLH = 2561,
2577
    VN  = 2562,
2578
    VNC = 2563,
2579
    VNN = 2564,
2580
    VNO = 2565,
2581
    VNX = 2566,
2582
    VO  = 2567,
2583
    VOC = 2568,
2584
    VONE  = 2569,
2585
    VPDI  = 2570,
2586
    VPERM = 2571,
2587
    VPK = 2572,
2588
    VPKF  = 2573,
2589
    VPKG  = 2574,
2590
    VPKH  = 2575,
2591
    VPKLS = 2576,
2592
    VPKLSF  = 2577,
2593
    VPKLSFS = 2578,
2594
    VPKLSG  = 2579,
2595
    VPKLSGS = 2580,
2596
    VPKLSH  = 2581,
2597
    VPKLSHS = 2582,
2598
    VPKS  = 2583,
2599
    VPKSF = 2584,
2600
    VPKSFS  = 2585,
2601
    VPKSG = 2586,
2602
    VPKSGS  = 2587,
2603
    VPKSH = 2588,
2604
    VPKSHS  = 2589,
2605
    VPKZ  = 2590,
2606
    VPOPCT  = 2591,
2607
    VPOPCTB = 2592,
2608
    VPOPCTF = 2593,
2609
    VPOPCTG = 2594,
2610
    VPOPCTH = 2595,
2611
    VPSOP = 2596,
2612
    VREP  = 2597,
2613
    VREPB = 2598,
2614
    VREPF = 2599,
2615
    VREPG = 2600,
2616
    VREPH = 2601,
2617
    VREPI = 2602,
2618
    VREPIB  = 2603,
2619
    VREPIF  = 2604,
2620
    VREPIG  = 2605,
2621
    VREPIH  = 2606,
2622
    VRP = 2607,
2623
    VS  = 2608,
2624
    VSB = 2609,
2625
    VSBCBI  = 2610,
2626
    VSBCBIQ = 2611,
2627
    VSBI  = 2612,
2628
    VSBIQ = 2613,
2629
    VSCBI = 2614,
2630
    VSCBIB  = 2615,
2631
    VSCBIF  = 2616,
2632
    VSCBIG  = 2617,
2633
    VSCBIH  = 2618,
2634
    VSCBIQ  = 2619,
2635
    VSCEF = 2620,
2636
    VSCEG = 2621,
2637
    VSDP  = 2622,
2638
    VSEG  = 2623,
2639
    VSEGB = 2624,
2640
    VSEGF = 2625,
2641
    VSEGH = 2626,
2642
    VSEL  = 2627,
2643
    VSF = 2628,
2644
    VSG = 2629,
2645
    VSH = 2630,
2646
    VSL = 2631,
2647
    VSLB  = 2632,
2648
    VSLDB = 2633,
2649
    VSP = 2634,
2650
    VSQ = 2635,
2651
    VSRA  = 2636,
2652
    VSRAB = 2637,
2653
    VSRL  = 2638,
2654
    VSRLB = 2639,
2655
    VSRP  = 2640,
2656
    VST = 2641,
2657
    VSTEB = 2642,
2658
    VSTEF = 2643,
2659
    VSTEG = 2644,
2660
    VSTEH = 2645,
2661
    VSTL  = 2646,
2662
    VSTM  = 2647,
2663
    VSTRC = 2648,
2664
    VSTRCB  = 2649,
2665
    VSTRCBS = 2650,
2666
    VSTRCF  = 2651,
2667
    VSTRCFS = 2652,
2668
    VSTRCH  = 2653,
2669
    VSTRCHS = 2654,
2670
    VSTRCZB = 2655,
2671
    VSTRCZBS  = 2656,
2672
    VSTRCZF = 2657,
2673
    VSTRCZFS  = 2658,
2674
    VSTRCZH = 2659,
2675
    VSTRCZHS  = 2660,
2676
    VSTRL = 2661,
2677
    VSTRLR  = 2662,
2678
    VSUM  = 2663,
2679
    VSUMB = 2664,
2680
    VSUMG = 2665,
2681
    VSUMGF  = 2666,
2682
    VSUMGH  = 2667,
2683
    VSUMH = 2668,
2684
    VSUMQ = 2669,
2685
    VSUMQF  = 2670,
2686
    VSUMQG  = 2671,
2687
    VTM = 2672,
2688
    VTP = 2673,
2689
    VUPH  = 2674,
2690
    VUPHB = 2675,
2691
    VUPHF = 2676,
2692
    VUPHH = 2677,
2693
    VUPKZ = 2678,
2694
    VUPL  = 2679,
2695
    VUPLB = 2680,
2696
    VUPLF = 2681,
2697
    VUPLH = 2682,
2698
    VUPLHB  = 2683,
2699
    VUPLHF  = 2684,
2700
    VUPLHH  = 2685,
2701
    VUPLHW  = 2686,
2702
    VUPLL = 2687,
2703
    VUPLLB  = 2688,
2704
    VUPLLF  = 2689,
2705
    VUPLLH  = 2690,
2706
    VX  = 2691,
2707
    VZERO = 2692,
2708
    WCDGB = 2693,
2709
    WCDLGB  = 2694,
2710
    WCGDB = 2695,
2711
    WCLGDB  = 2696,
2712
    WFADB = 2697,
2713
    WFASB = 2698,
2714
    WFAXB = 2699,
2715
    WFC = 2700,
2716
    WFCDB = 2701,
2717
    WFCEDB  = 2702,
2718
    WFCEDBS = 2703,
2719
    WFCESB  = 2704,
2720
    WFCESBS = 2705,
2721
    WFCEXB  = 2706,
2722
    WFCEXBS = 2707,
2723
    WFCHDB  = 2708,
2724
    WFCHDBS = 2709,
2725
    WFCHEDB = 2710,
2726
    WFCHEDBS  = 2711,
2727
    WFCHESB = 2712,
2728
    WFCHESBS  = 2713,
2729
    WFCHEXB = 2714,
2730
    WFCHEXBS  = 2715,
2731
    WFCHSB  = 2716,
2732
    WFCHSBS = 2717,
2733
    WFCHXB  = 2718,
2734
    WFCHXBS = 2719,
2735
    WFCSB = 2720,
2736
    WFCXB = 2721,
2737
    WFDDB = 2722,
2738
    WFDSB = 2723,
2739
    WFDXB = 2724,
2740
    WFIDB = 2725,
2741
    WFISB = 2726,
2742
    WFIXB = 2727,
2743
    WFK = 2728,
2744
    WFKDB = 2729,
2745
    WFKEDB  = 2730,
2746
    WFKEDBS = 2731,
2747
    WFKESB  = 2732,
2748
    WFKESBS = 2733,
2749
    WFKEXB  = 2734,
2750
    WFKEXBS = 2735,
2751
    WFKHDB  = 2736,
2752
    WFKHDBS = 2737,
2753
    WFKHEDB = 2738,
2754
    WFKHEDBS  = 2739,
2755
    WFKHESB = 2740,
2756
    WFKHESBS  = 2741,
2757
    WFKHEXB = 2742,
2758
    WFKHEXBS  = 2743,
2759
    WFKHSB  = 2744,
2760
    WFKHSBS = 2745,
2761
    WFKHXB  = 2746,
2762
    WFKHXBS = 2747,
2763
    WFKSB = 2748,
2764
    WFKXB = 2749,
2765
    WFLCDB  = 2750,
2766
    WFLCSB  = 2751,
2767
    WFLCXB  = 2752,
2768
    WFLLD = 2753,
2769
    WFLLS = 2754,
2770
    WFLNDB  = 2755,
2771
    WFLNSB  = 2756,
2772
    WFLNXB  = 2757,
2773
    WFLPDB  = 2758,
2774
    WFLPSB  = 2759,
2775
    WFLPXB  = 2760,
2776
    WFLRD = 2761,
2777
    WFLRX = 2762,
2778
    WFMADB  = 2763,
2779
    WFMASB  = 2764,
2780
    WFMAXB  = 2765,
2781
    WFMAXDB = 2766,
2782
    WFMAXSB = 2767,
2783
    WFMAXXB = 2768,
2784
    WFMDB = 2769,
2785
    WFMINDB = 2770,
2786
    WFMINSB = 2771,
2787
    WFMINXB = 2772,
2788
    WFMSB = 2773,
2789
    WFMSDB  = 2774,
2790
    WFMSSB  = 2775,
2791
    WFMSXB  = 2776,
2792
    WFMXB = 2777,
2793
    WFNMADB = 2778,
2794
    WFNMASB = 2779,
2795
    WFNMAXB = 2780,
2796
    WFNMSDB = 2781,
2797
    WFNMSSB = 2782,
2798
    WFNMSXB = 2783,
2799
    WFPSODB = 2784,
2800
    WFPSOSB = 2785,
2801
    WFPSOXB = 2786,
2802
    WFSDB = 2787,
2803
    WFSQDB  = 2788,
2804
    WFSQSB  = 2789,
2805
    WFSQXB  = 2790,
2806
    WFSSB = 2791,
2807
    WFSXB = 2792,
2808
    WFTCIDB = 2793,
2809
    WFTCISB = 2794,
2810
    WFTCIXB = 2795,
2811
    WLDEB = 2796,
2812
    WLEDB = 2797,
2813
    X = 2798,
2814
    XC  = 2799,
2815
    XG  = 2800,
2816
    XGR = 2801,
2817
    XGRK  = 2802,
2818
    XI  = 2803,
2819
    XIHF  = 2804,
2820
    XILF  = 2805,
2821
    XIY = 2806,
2822
    XR  = 2807,
2823
    XRK = 2808,
2824
    XSCH  = 2809,
2825
    XY  = 2810,
2826
    ZAP = 2811,
2827
    INSTRUCTION_LIST_END = 2812
2828
  };
2829
2830
} // end SystemZ namespace
2831
} // end llvm namespace
2832
#endif // GET_INSTRINFO_ENUM
2833
2834
#ifdef GET_INSTRINFO_SCHED_ENUM
2835
#undef GET_INSTRINFO_SCHED_ENUM
2836
namespace llvm {
2837
2838
namespace SystemZ {
2839
namespace Sched {
2840
  enum {
2841
    NoInstrModel  = 0,
2842
    ADJDYNALLOC = 1,
2843
    CallBRCL_BRC_BRCAsm_BRCL_BRCLAsm  = 2,
2844
    CallJG_J_JAsmE_JAsmH_JAsmHE_JAsmL_JAsmLE_JAsmLH_JAsmM_JAsmNE_JAsmNH_JAsmNHE_JAsmNL_JAsmNLE_JAsmNLH_JAsmNM_JAsmNO_JAsmNP_JAsmNZ_JAsmO_JAsmP_JAsmZ_JG_JGAsmE_JGAsmH_JGAsmHE_JGAsmL_JGAsmLE_JGAsmLH_JGAsmM_JGAsmNE_JGAsmNH_JGAsmNHE_JGAsmNL_JGAsmNLE_JGAsmNLH_JGAsmNM_JGAsmNO_JGAsmNP_JGAsmNZ_JGAsmO_JGAsmP_JGAsmZ = 3,
2845
    CallBCR_BC_BCAsm_BCR_BCRAsm = 4,
2846
    CallBR_B_BAsmE_BAsmH_BAsmHE_BAsmL_BAsmLE_BAsmLH_BAsmM_BAsmNE_BAsmNH_BAsmNHE_BAsmNL_BAsmNLE_BAsmNLH_BAsmNM_BAsmNO_BAsmNP_BAsmNZ_BAsmO_BAsmP_BAsmZ_BR_BRAsmE_BRAsmH_BRAsmHE_BRAsmL_BRAsmLE_BRAsmLH_BRAsmM_BRAsmNE_BRAsmNH_BRAsmNHE_BRAsmNL_BRAsmNLE_BRAsmNLH_BRAsmNM_BRAsmNO_BRAsmNP_BRAsmNZ_BRAsmO_BRAsmP_BRAsmZ = 5,
2847
    BI_BIAsmE_BIAsmH_BIAsmHE_BIAsmL_BIAsmLE_BIAsmLH_BIAsmM_BIAsmNE_BIAsmNH_BIAsmNHE_BIAsmNL_BIAsmNLE_BIAsmNLH_BIAsmNM_BIAsmNO_BIAsmNP_BIAsmNZ_BIAsmO_BIAsmP_BIAsmZ_BIC_BICAsm = 6,
2848
    BRCT_BRCTG  = 7,
2849
    BRCTH = 8,
2850
    BCT_BCTG_BCTGR_BCTR = 9,
2851
    BRXH_BRXHG_BRXLE_BRXLG_BXH_BXHG_BXLE_BXLEG  = 10,
2852
    CGIJ_CGIJAsm_CGIJAsmE_CGIJAsmH_CGIJAsmHE_CGIJAsmL_CGIJAsmLE_CGIJAsmLH_CGIJAsmNE_CGIJAsmNH_CGIJAsmNHE_CGIJAsmNL_CGIJAsmNLE_CGIJAsmNLH_CGRJ_CGRJAsm_CGRJAsmE_CGRJAsmH_CGRJAsmHE_CGRJAsmL_CGRJAsmLE_CGRJAsmLH_CGRJAsmNE_CGRJAsmNH_CGRJAsmNHE_CGRJAsmNL_CGRJAsmNLE_CGRJAsmNLH_CIJ_CIJAsm_CIJAsmE_CIJAsmH_CIJAsmHE_CIJAsmL_CIJAsmLE_CIJAsmLH_CIJAsmNE_CIJAsmNH_CIJAsmNHE_CIJAsmNL_CIJAsmNLE_CIJAsmNLH_CLGIJ_CLGIJAsm_CLGIJAsmE_CLGIJAsmH_CLGIJAsmHE_CLGIJAsmL_CLGIJAsmLE_CLGIJAsmLH_CLGIJAsmNE_CLGIJAsmNH_CLGIJAsmNHE_CLGIJAsmNL_CLGIJAsmNLE_CLGIJAsmNLH_CLGRJ_CLGRJAsm_CLGRJAsmE_CLGRJAsmH_CLGRJAsmHE_CLGRJAsmL_CLGRJAsmLE_CLGRJAsmLH_CLGRJAsmNE_CLGRJAsmNH_CLGRJAsmNHE_CLGRJAsmNL_CLGRJAsmNLE_CLGRJAsmNLH_CLIJ_CLIJAsm_CLIJAsmE_CLIJAsmH_CLIJAsmHE_CLIJAsmL_CLIJAsmLE_CLIJAsmLH_CLIJAsmNE_CLIJAsmNH_CLIJAsmNHE_CLIJAsmNL_CLIJAsmNLE_CLIJAsmNLH_CLRJ_CLRJAsm_CLRJAsmE_CLRJAsmH_CLRJAsmHE_CLRJAsmL_CLRJAsmLE_CLRJAsmLH_CLRJAsmNE_CLRJAsmNH_CLRJAsmNHE_CLRJAsmNL_CLRJAsmNLE_CLRJAsmNLH_CRJ_CRJAsm_CRJAsmE_CRJAsmH_CRJAsmHE_CRJAsmL_CRJAsmLE_CRJAsmLH_CRJAsmNE_CRJAsmNH_CRJAsmNHE_CRJAsmNL_CRJAsmNLE_CRJAsmNLH = 11,
2853
    CGIBCall_CGIBReturn_CGRBCall_CGRBReturn_CIBCall_CIBReturn_CLGIBCall_CLGIBReturn_CLGRBCall_CLGRBReturn_CLIBCall_CLIBReturn_CLRBCall_CLRBReturn_CRBCall_CRBReturn_CGIB_CGIBAsm_CGIBAsmE_CGIBAsmH_CGIBAsmHE_CGIBAsmL_CGIBAsmLE_CGIBAsmLH_CGIBAsmNE_CGIBAsmNH_CGIBAsmNHE_CGIBAsmNL_CGIBAsmNLE_CGIBAsmNLH_CGRB_CGRBAsm_CGRBAsmE_CGRBAsmH_CGRBAsmHE_CGRBAsmL_CGRBAsmLE_CGRBAsmLH_CGRBAsmNE_CGRBAsmNH_CGRBAsmNHE_CGRBAsmNL_CGRBAsmNLE_CGRBAsmNLH_CIB_CIBAsm_CIBAsmE_CIBAsmH_CIBAsmHE_CIBAsmL_CIBAsmLE_CIBAsmLH_CIBAsmNE_CIBAsmNH_CIBAsmNHE_CIBAsmNL_CIBAsmNLE_CIBAsmNLH_CLGIB_CLGIBAsm_CLGIBAsmE_CLGIBAsmH_CLGIBAsmHE_CLGIBAsmL_CLGIBAsmLE_CLGIBAsmLH_CLGIBAsmNE_CLGIBAsmNH_CLGIBAsmNHE_CLGIBAsmNL_CLGIBAsmNLE_CLGIBAsmNLH_CLGRB_CLGRBAsm_CLGRBAsmE_CLGRBAsmH_CLGRBAsmHE_CLGRBAsmL_CLGRBAsmLE_CLGRBAsmLH_CLGRBAsmNE_CLGRBAsmNH_CLGRBAsmNHE_CLGRBAsmNL_CLGRBAsmNLE_CLGRBAsmNLH_CLIB_CLIBAsm_CLIBAsmE_CLIBAsmH_CLIBAsmHE_CLIBAsmL_CLIBAsmLE_CLIBAsmLH_CLIBAsmNE_CLIBAsmNH_CLIBAsmNHE_CLIBAsmNL_CLIBAsmNLE_CLIBAsmNLH_CLRB_CLRBAsm_CLRBAsmE_CLRBAsmH_CLRBAsmHE_CLRBAsmL_CLRBAsmLE_CLRBAsmLH_CLRBAsmNE_CLRBAsmNH_CLRBAsmNHE_CLRBAsmNL_CLRBAsmNLE_CLRBAsmNLH_CRB_CRBAsm_CRBAsmE_CRBAsmH_CRBAsmHE_CRBAsmL_CRBAsmLE_CRBAsmLH_CRBAsmNE_CRBAsmNH_CRBAsmNHE_CRBAsmNL_CRBAsmNLE_CRBAsmNLH = 12,
2854
    CondTrap_Trap = 13,
2855
    CGIT_CGITAsm_CGITAsmE_CGITAsmH_CGITAsmHE_CGITAsmL_CGITAsmLE_CGITAsmLH_CGITAsmNE_CGITAsmNH_CGITAsmNHE_CGITAsmNL_CGITAsmNLE_CGITAsmNLH_CGRT_CGRTAsm_CGRTAsmE_CGRTAsmH_CGRTAsmHE_CGRTAsmL_CGRTAsmLE_CGRTAsmLH_CGRTAsmNE_CGRTAsmNH_CGRTAsmNHE_CGRTAsmNL_CGRTAsmNLE_CGRTAsmNLH_CIT_CITAsm_CITAsmE_CITAsmH_CITAsmHE_CITAsmL_CITAsmLE_CITAsmLH_CITAsmNE_CITAsmNH_CITAsmNHE_CITAsmNL_CITAsmNLE_CITAsmNLH_CRT_CRTAsm_CRTAsmE_CRTAsmH_CRTAsmHE_CRTAsmL_CRTAsmLE_CRTAsmLH_CRTAsmNE_CRTAsmNH_CRTAsmNHE_CRTAsmNL_CRTAsmNLE_CRTAsmNLH = 14,
2856
    CLGRT_CLGRTAsm_CLGRTAsmE_CLGRTAsmH_CLGRTAsmHE_CLGRTAsmL_CLGRTAsmLE_CLGRTAsmLH_CLGRTAsmNE_CLGRTAsmNH_CLGRTAsmNHE_CLGRTAsmNL_CLGRTAsmNLE_CLGRTAsmNLH_CLRT_CLRTAsm_CLRTAsmE_CLRTAsmH_CLRTAsmHE_CLRTAsmL_CLRTAsmLE_CLRTAsmLH_CLRTAsmNE_CLRTAsmNH_CLRTAsmNHE_CLRTAsmNL_CLRTAsmNLE_CLRTAsmNLH = 15,
2857
    CLFIT_CLFITAsm_CLFITAsmE_CLFITAsmH_CLFITAsmHE_CLFITAsmL_CLFITAsmLE_CLFITAsmLH_CLFITAsmNE_CLFITAsmNH_CLFITAsmNHE_CLFITAsmNL_CLFITAsmNLE_CLFITAsmNLH_CLGIT_CLGITAsm_CLGITAsmE_CLGITAsmH_CLGITAsmHE_CLGITAsmL_CLGITAsmLE_CLGITAsmLH_CLGITAsmNE_CLGITAsmNH_CLGITAsmNHE_CLGITAsmNL_CLGITAsmNLE_CLGITAsmNLH = 16,
2858
    CLGT_CLGTAsm_CLGTAsmE_CLGTAsmH_CLGTAsmHE_CLGTAsmL_CLGTAsmLE_CLGTAsmLH_CLGTAsmNE_CLGTAsmNH_CLGTAsmNHE_CLGTAsmNL_CLGTAsmNLE_CLGTAsmNLH_CLT_CLTAsm_CLTAsmE_CLTAsmH_CLTAsmHE_CLTAsmL_CLTAsmLE_CLTAsmLH_CLTAsmNE_CLTAsmNH_CLTAsmNHE_CLTAsmNL_CLTAsmNLE_CLTAsmNLH = 17,
2859
    BRAS  = 18,
2860
    CallBRASL_BRASL = 19,
2861
    CallBASR_BAS_BASR = 20,
2862
    TLS_GDCALL_TLS_LDCALL = 21,
2863
    Return  = 22,
2864
    CondReturn  = 23,
2865
    MVGHI_MVHHI_MVHI  = 24,
2866
    MVI_MVIY  = 25,
2867
    MVC = 26,
2868
    MVCL_MVCLE_MVCLU  = 27,
2869
    COPY_TO_REGCLASS_COPY = 28,
2870
    EXTRACT_SUBREG  = 29,
2871
    INSERT_SUBREG = 30,
2872
    REG_SEQUENCE  = 31,
2873
    LMux_L_LFH_LRL_LY = 32,
2874
    LCBB  = 33,
2875
    LG_LGRL = 34,
2876
    L128  = 35,
2877
    LLIHF_LLIHH_LLIHL = 36,
2878
    LLILF_LLILH_LLILL = 37,
2879
    LGFI_LGHI = 38,
2880
    LHIMux_LHI  = 39,
2881
    LRMux_LR  = 40,
2882
    LZRF_LZRG = 41,
2883
    LAT_LFHAT_LGAT  = 42,
2884
    LT_LTG  = 43,
2885
    LTGR_LTR  = 44,
2886
    STG_STGRL = 45,
2887
    ST128 = 46,
2888
    STMux_ST_STFH_STRL_STY  = 47,
2889
    MVST  = 48,
2890
    LOCRMux = 49,
2891
    LOCFHR_LOCFHRAsm_LOCFHRAsmE_LOCFHRAsmH_LOCFHRAsmHE_LOCFHRAsmL_LOCFHRAsmLE_LOCFHRAsmLH_LOCFHRAsmM_LOCFHRAsmNE_LOCFHRAsmNH_LOCFHRAsmNHE_LOCFHRAsmNL_LOCFHRAsmNLE_LOCFHRAsmNLH_LOCFHRAsmNM_LOCFHRAsmNO_LOCFHRAsmNP_LOCFHRAsmNZ_LOCFHRAsmO_LOCFHRAsmP_LOCFHRAsmZ_LOCGR_LOCGRAsm_LOCGRAsmE_LOCGRAsmH_LOCGRAsmHE_LOCGRAsmL_LOCGRAsmLE_LOCGRAsmLH_LOCGRAsmM_LOCGRAsmNE_LOCGRAsmNH_LOCGRAsmNHE_LOCGRAsmNL_LOCGRAsmNLE_LOCGRAsmNLH_LOCGRAsmNM_LOCGRAsmNO_LOCGRAsmNP_LOCGRAsmNZ_LOCGRAsmO_LOCGRAsmP_LOCGRAsmZ_LOCR_LOCRAsm_LOCRAsmE_LOCRAsmH_LOCRAsmHE_LOCRAsmL_LOCRAsmLE_LOCRAsmLH_LOCRAsmM_LOCRAsmNE_LOCRAsmNH_LOCRAsmNHE_LOCRAsmNL_LOCRAsmNLE_LOCRAsmNLH_LOCRAsmNM_LOCRAsmNO_LOCRAsmNP_LOCRAsmNZ_LOCRAsmO_LOCRAsmP_LOCRAsmZ  = 50,
2892
    LOCHIMux_LOCGHI_LOCGHIAsm_LOCGHIAsmE_LOCGHIAsmH_LOCGHIAsmHE_LOCGHIAsmL_LOCGHIAsmLE_LOCGHIAsmLH_LOCGHIAsmM_LOCGHIAsmNE_LOCGHIAsmNH_LOCGHIAsmNHE_LOCGHIAsmNL_LOCGHIAsmNLE_LOCGHIAsmNLH_LOCGHIAsmNM_LOCGHIAsmNO_LOCGHIAsmNP_LOCGHIAsmNZ_LOCGHIAsmO_LOCGHIAsmP_LOCGHIAsmZ_LOCHHI_LOCHHIAsm_LOCHHIAsmE_LOCHHIAsmH_LOCHHIAsmHE_LOCHHIAsmL_LOCHHIAsmLE_LOCHHIAsmLH_LOCHHIAsmM_LOCHHIAsmNE_LOCHHIAsmNH_LOCHHIAsmNHE_LOCHHIAsmNL_LOCHHIAsmNLE_LOCHHIAsmNLH_LOCHHIAsmNM_LOCHHIAsmNO_LOCHHIAsmNP_LOCHHIAsmNZ_LOCHHIAsmO_LOCHHIAsmP_LOCHHIAsmZ_LOCHI_LOCHIAsm_LOCHIAsmE_LOCHIAsmH_LOCHIAsmHE_LOCHIAsmL_LOCHIAsmLE_LOCHIAsmLH_LOCHIAsmM_LOCHIAsmNE_LOCHIAsmNH_LOCHIAsmNHE_LOCHIAsmNL_LOCHIAsmNLE_LOCHIAsmNLH_LOCHIAsmNM_LOCHIAsmNO_LOCHIAsmNP_LOCHIAsmNZ_LOCHIAsmO_LOCHIAsmP_LOCHIAsmZ = 51,
2893
    LOCMux_LOC_LOCAsm_LOCAsmE_LOCAsmH_LOCAsmHE_LOCAsmL_LOCAsmLE_LOCAsmLH_LOCAsmM_LOCAsmNE_LOCAsmNH_LOCAsmNHE_LOCAsmNL_LOCAsmNLE_LOCAsmNLH_LOCAsmNM_LOCAsmNO_LOCAsmNP_LOCAsmNZ_LOCAsmO_LOCAsmP_LOCAsmZ_LOCFH_LOCFHAsm_LOCFHAsmE_LOCFHAsmH_LOCFHAsmHE_LOCFHAsmL_LOCFHAsmLE_LOCFHAsmLH_LOCFHAsmM_LOCFHAsmNE_LOCFHAsmNH_LOCFHAsmNHE_LOCFHAsmNL_LOCFHAsmNLE_LOCFHAsmNLH_LOCFHAsmNM_LOCFHAsmNO_LOCFHAsmNP_LOCFHAsmNZ_LOCFHAsmO_LOCFHAsmP_LOCFHAsmZ_LOCG_LOCGAsm_LOCGAsmE_LOCGAsmH_LOCGAsmHE_LOCGAsmL_LOCGAsmLE_LOCGAsmLH_LOCGAsmM_LOCGAsmNE_LOCGAsmNH_LOCGAsmNHE_LOCGAsmNL_LOCGAsmNLE_LOCGAsmNLH_LOCGAsmNM_LOCGAsmNO_LOCGAsmNP_LOCGAsmNZ_LOCGAsmO_LOCGAsmP_LOCGAsmZ = 52,
2894
    STOCMux_STOC_STOCAsm_STOCAsmE_STOCAsmH_STOCAsmHE_STOCAsmL_STOCAsmLE_STOCAsmLH_STOCAsmM_STOCAsmNE_STOCAsmNH_STOCAsmNHE_STOCAsmNL_STOCAsmNLE_STOCAsmNLH_STOCAsmNM_STOCAsmNO_STOCAsmNP_STOCAsmNZ_STOCAsmO_STOCAsmP_STOCAsmZ_STOCFH_STOCFHAsm_STOCFHAsmE_STOCFHAsmH_STOCFHAsmHE_STOCFHAsmL_STOCFHAsmLE_STOCFHAsmLH_STOCFHAsmM_STOCFHAsmNE_STOCFHAsmNH_STOCFHAsmNHE_STOCFHAsmNL_STOCFHAsmNLE_STOCFHAsmNLH_STOCFHAsmNM_STOCFHAsmNO_STOCFHAsmNP_STOCFHAsmNZ_STOCFHAsmO_STOCFHAsmP_STOCFHAsmZ_STOCG_STOCGAsm_STOCGAsmE_STOCGAsmH_STOCGAsmHE_STOCGAsmL_STOCGAsmLE_STOCGAsmLH_STOCGAsmM_STOCGAsmNE_STOCGAsmNH_STOCGAsmNHE_STOCGAsmNL_STOCGAsmNLE_STOCGAsmNLH_STOCGAsmNM_STOCGAsmNO_STOCGAsmNP_STOCGAsmNZ_STOCGAsmO_STOCGAsmP_STOCGAsmZ  = 53,
2895
    LBR_LGR_LHR = 54,
2896
    LGBR_LGFR_LGHR  = 55,
2897
    LTGF  = 56,
2898
    LTGFR = 57,
2899
    LBMux_LB_LBH  = 58,
2900
    LH_LHY  = 59,
2901
    LHMux_LHH_LHRL  = 60,
2902
    LGB_LGF_LGH = 61,
2903
    LGFRL_LGHRL = 62,
2904
    LLCRMux_LLCR  = 63,
2905
    LLHRMux_LLHR  = 64,
2906
    LLGCR_LLGFR_LLGHR_LLGTR = 65,
2907
    LLCMux_LLC  = 66,
2908
    LLHMux_LLH  = 67,
2909
    LLCH_LLHH = 68,
2910
    LLHRL = 69,
2911
    LLGC_LLGF_LLGFRL_LLGH_LLGHRL_LLGT = 70,
2912
    LLZRGF  = 71,
2913
    LLGFAT_LLGTAT = 72,
2914
    STCMux_STC_STCH_STCY  = 73,
2915
    STHMux_STH_STHH_STHRL_STHY  = 74,
2916
    STCM_STCMH_STCMY  = 75,
2917
    LM_LMG_LMH_LMY  = 76,
2918
    LMD = 77,
2919
    STM_STMG_STMH_STMY  = 78,
2920
    LRVGR_LRVR  = 79,
2921
    LRV_LRVG_LRVH = 80,
2922
    STRV_STRVG_STRVH  = 81,
2923
    MVCIN = 82,
2924
    LA_LARL_LAY = 83,
2925
    GOT = 84,
2926
    LPGR_LPR  = 85,
2927
    LNGFR_LPGFR = 86,
2928
    LNGR_LNR  = 87,
2929
    LCGR_LCR  = 88,
2930
    LCGFR = 89,
2931
    IC_ICY  = 90,
2932
    IC32_IC32Y  = 91,
2933
    ICM_ICMH_ICMY = 92,
2934
    IIFMux_IIHMux_IILMux  = 93,
2935
    IIHF64_IIHF = 94,
2936
    IIHH64_IIHH = 95,
2937
    IIHL64_IIHL = 96,
2938
    IILF64_IILF = 97,
2939
    IILH64_IILH = 98,
2940
    IILL64_IILL = 99,
2941
    A_AY  = 100,
2942
    AH_AHY  = 101,
2943
    AIH = 102,
2944
    AFIMux_AFI  = 103,
2945
    AG  = 104,
2946
    AGFI  = 105,
2947
    AGHI_AGHIK  = 106,
2948
    AGR_AGRK  = 107,
2949
    AHI_AHIK  = 108,
2950
    AHIMux_AHIMuxK  = 109,
2951
    AL_ALY  = 110,
2952
    ALFI_ALHSIK = 111,
2953
    ALG_ALGF  = 112,
2954
    ALGHSIK = 113,
2955
    ALGFI_ALGFR = 114,
2956
    ALGR_ALGRK  = 115,
2957
    ALR_ALRK  = 116,
2958
    AR_ARK  = 117,
2959
    AHHHR_ALHHHR  = 118,
2960
    AHHLR_ALHHLR  = 119,
2961
    ALSIH_ALSIHN  = 120,
2962
    AGSI_ALGSI_ALSI_ASI = 121,
2963
    ALC_ALCG  = 122,
2964
    ALCGR_ALCR  = 123,
2965
    AGF_AGH = 124,
2966
    AGFR  = 125,
2967
    S_SG_SY = 126,
2968
    SH_SHY  = 127,
2969
    SGR_SGRK  = 128,
2970
    SLFI  = 129,
2971
    SL_SLG_SLGF_SLY = 130,
2972
    SLGFI_SLGFR = 131,
2973
    SLGR_SLGRK  = 132,
2974
    SLR_SLRK  = 133,
2975
    SR_SRK  = 134,
2976
    SHHHR_SLHHHR  = 135,
2977
    SHHLR_SLHHLR  = 136,
2978
    SLB_SLBG  = 137,
2979
    SLBGR_SLBR  = 138,
2980
    SGF_SGH = 139,
2981
    SGFR  = 140,
2982
    N_NG_NY = 141,
2983
    NGR_NGRK  = 142,
2984
    NIFMux_NIHMux_NILMux  = 143,
2985
    NI_NIY  = 144,
2986
    NIHF64_NIHF = 145,
2987
    NIHH64_NIHH = 146,
2988
    NIHL64_NIHL = 147,
2989
    NILF64_NILF = 148,
2990
    NILH64_NILH = 149,
2991
    NILL64_NILL = 150,
2992
    NR_NRK  = 151,
2993
    NC  = 152,
2994
    O_OG_OY = 153,
2995
    OGR_OGRK  = 154,
2996
    OI_OIY  = 155,
2997
    OIFMux_OIHMux_OILMux  = 156,
2998
    OIHF64_OIHF = 157,
2999
    OIHH64_OIHH = 158,
3000
    OIHL64_OIHL = 159,
3001
    OILF64_OILF = 160,
3002
    OILH64_OILH = 161,
3003
    OILL64_OILL = 162,
3004
    OR_ORK  = 163,
3005
    OC  = 164,
3006
    X_XG_XY = 165,
3007
    XI_XIY  = 166,
3008
    XIFMux  = 167,
3009
    XGR_XGRK  = 168,
3010
    XIHF64_XIHF = 169,
3011
    XILF64_XILF = 170,
3012
    XR_XRK  = 171,
3013
    XC  = 172,
3014
    MS_MSGF_MSY = 173,
3015
    MSFI_MSR  = 174,
3016
    MSG = 175,
3017
    MSGR  = 176,
3018
    MSGFI_MSGFR = 177,
3019
    MLG = 178,
3020
    MLGR  = 179,
3021
    MGHI  = 180,
3022
    MHI = 181,
3023
    MH_MHY  = 182,
3024
    MLR_MR  = 183,
3025
    M_MFY_ML  = 184,
3026
    MGH = 185,
3027
    MG  = 186,
3028
    MGRK  = 187,
3029
    MSC = 188,
3030
    MSGC  = 189,
3031
    MSRKC = 190,
3032
    MSGRKC  = 191,
3033
    DR  = 192,
3034
    D = 193,
3035
    DSGFR_DSGR  = 194,
3036
    DSG_DSGF  = 195,
3037
    DLR = 196,
3038
    DLGR  = 197,
3039
    DL_DLG  = 198,
3040
    SLL_SLLG_SLLK = 199,
3041
    SRL_SRLG_SRLK = 200,
3042
    SRA_SRAG_SRAK = 201,
3043
    SLA_SLAG_SLAK = 202,
3044
    SLDA_SLDL_SRDA_SRDL = 203,
3045
    RLL_RLLG  = 204,
3046
    RISBG_RISBG32_RISBGN  = 205,
3047
    RISBHH_RISBHL_RISBHG  = 206,
3048
    RISBLH_RISBLL_RISBLG  = 207,
3049
    RISBMux = 208,
3050
    RNSBG_ROSBG_RXSBG = 209,
3051
    CMux_C_CG_CY  = 210,
3052
    CRL = 211,
3053
    CFIMux_CHIMux_CFI_CHI = 212,
3054
    CGFI_CGHI = 213,
3055
    CGHSI_CGRL  = 214,
3056
    CGR_CR  = 215,
3057
    CIH = 216,
3058
    CHF = 217,
3059
    CHSI  = 218,
3060
    CLMux_CL_CLY  = 219,
3061
    CLFHSI  = 220,
3062
    CLFIMux_CLFI  = 221,
3063
    CLG = 222,
3064
    CLGHRL_CLGHSI = 223,
3065
    CLGF  = 224,
3066
    CLGFRL  = 225,
3067
    CLGFI_CLGFR = 226,
3068
    CLGR  = 227,
3069
    CLGRL = 228,
3070
    CLHF  = 229,
3071
    CLHHSI_CLHRL  = 230,
3072
    CLIH  = 231,
3073
    CLI_CLIY  = 232,
3074
    CLR = 233,
3075
    CLRL  = 234,
3076
    CHHR_CLHHR  = 235,
3077
    CHLR_CLHLR  = 236,
3078
    CH_CHY  = 237,
3079
    CHRL  = 238,
3080
    CGH = 239,
3081
    CGHRL = 240,
3082
    CHHSI = 241,
3083
    CGF = 242,
3084
    CGFRL = 243,
3085
    CGFR  = 244,
3086
    CLC = 245,
3087
    CLCL_CLCLE_CLCLU  = 246,
3088
    CLST  = 247,
3089
    TM_TMY  = 248,
3090
    TMHMux_TMLMux = 249,
3091
    TMHH64_TMHH = 250,
3092
    TMHL64_TMHL = 251,
3093
    TMLH64_TMLH = 252,
3094
    TMLL64_TMLL = 253,
3095
    CLM_CLMH_CLMY = 254,
3096
    PFD_PFDRL = 255,
3097
    BPP = 256,
3098
    BPRP  = 257,
3099
    NIAI  = 258,
3100
    Serialize = 259,
3101
    LAA_LAAG  = 260,
3102
    LAAL_LAALG  = 261,
3103
    LAN_LANG  = 262,
3104
    LAO_LAOG  = 263,
3105
    LAX_LAXG  = 264,
3106
    TS  = 265,
3107
    CS_CSG_CSY  = 266,
3108
    CDS_CDSY  = 267,
3109
    CDSG  = 268,
3110
    CSST  = 269,
3111
    PLO = 270,
3112
    LPQ = 271,
3113
    STPQ  = 272,
3114
    LPD_LPDG  = 273,
3115
    TR  = 274,
3116
    TRT = 275,
3117
    TRTR  = 276,
3118
    TRE = 277,
3119
    TRTE_TRTEOpt_TRTRE_TRTREOpt = 278,
3120
    TROO_TROOOpt_TROT_TROTOpt_TRTO_TRTOOpt_TRTT_TRTTOpt = 279,
3121
    CU12_CU12Opt_CU14_CU14Opt_CU21_CU21Opt_CU24_CU24Opt_CU41_CU42 = 280,
3122
    CUTFU_CUTFUOpt_CUUTF_CUUTFOpt = 281,
3123
    KM_KMA_KMC_KMCTR_KMF_KMO  = 282,
3124
    KIMD_KLMD_KMAC  = 283,
3125
    PCC_PPNO_PRNO = 284,
3126
    LGG = 285,
3127
    LLGFSG  = 286,
3128
    LGSC_STGSC  = 287,
3129
    CVBG  = 288,
3130
    CVB_CVBY  = 289,
3131
    CVDG  = 290,
3132
    CVD_CVDY  = 291,
3133
    MVN_MVO_MVZ = 292,
3134
    PACK_PKA_PKU  = 293,
3135
    UNPKA_UNPKU = 294,
3136
    UNPK  = 295,
3137
    AP_SP_ZAP = 296,
3138
    DP_MP = 297,
3139
    SRP = 298,
3140
    CP  = 299,
3141
    TP  = 300,
3142
    ED_EDMK = 301,
3143
    CPYA_EAR_SAR  = 302,
3144
    LAE_LAEY  = 303,
3145
    LAM_LAMY  = 304,
3146
    STAM_STAMY  = 305,
3147
    IPM = 306,
3148
    SPM = 307,
3149
    BAL_BALR  = 308,
3150
    TAM = 309,
3151
    SAM24_SAM31_SAM64 = 310,
3152
    BSM = 311,
3153
    BASSM = 312,
3154
    TBEGIN_TBEGINC  = 313,
3155
    TEND  = 314,
3156
    TABORT  = 315,
3157
    ETND  = 316,
3158
    NTSTG = 317,
3159
    PPA = 318,
3160
    FLOGR = 319,
3161
    POPCNT  = 320,
3162
    SRST_SRSTU  = 321,
3163
    CUSE  = 322,
3164
    CFC = 323,
3165
    UPT = 324,
3166
    CKSM  = 325,
3167
    CMPSC = 326,
3168
    EX_EXRL = 327,
3169
    InsnE_InsnRI_InsnRIE_InsnRIL_InsnRILU_InsnRIS_InsnRR_InsnRRE_InsnRRF_InsnRRS_InsnRS_InsnRSE_InsnRSI_InsnRSY_InsnRX_InsnRXE_InsnRXF_InsnRXY_InsnS_InsnSI_InsnSIL_InsnSIY_InsnSS_InsnSSE_InsnSSF  = 328,
3170
    LZDR_LZER = 329,
3171
    LZXR  = 330,
3172
    LER = 331,
3173
    LDGR_LDR_LDR32  = 332,
3174
    LGDR  = 333,
3175
    LXR = 334,
3176
    LTDBR_LTEBR = 335,
3177
    LTDBRCompare_LTEBRCompare = 336,
3178
    LTXBR_LTXBRCompare  = 337,
3179
    CPSDRdd_CPSDRds_CPSDRsd_CPSDRss = 338,
3180
    LE_LEY  = 339,
3181
    LD_LDE32_LDY  = 340,
3182
    LX  = 341,
3183
    STD_STDY_STE_STEY = 342,
3184
    STX = 343,
3185
    LEDBR_LEDBRA  = 344,
3186
    LDXBR_LDXBRA_LEXBR_LEXBRA = 345,
3187
    LDEB  = 346,
3188
    LDEBR = 347,
3189
    LXDB_LXEB = 348,
3190
    LXDBR_LXEBR = 349,
3191
    CDFBR_CDFBRA_CDGBR_CDGBRA_CEFBR_CEFBRA_CEGBR_CEGBRA = 350,
3192
    CXFBR_CXFBRA_CXGBR_CXGBRA = 351,
3193
    CDLFBR_CDLGBR_CELFBR_CELGBR = 352,
3194
    CXLFBR_CXLGBR = 353,
3195
    CFDBR_CFDBRA_CFEBR_CFEBRA_CGDBR_CGDBRA_CGEBR_CGEBRA = 354,
3196
    CFXBR_CFXBRA_CGXBR_CGXBRA = 355,
3197
    CLFEBR  = 356,
3198
    CLFDBR  = 357,
3199
    CLGDBR_CLGEBR = 358,
3200
    CLFXBR_CLGXBR = 359,
3201
    LCDBR_LCEBR_LNDBR_LNEBR_LPDBR_LPEBR = 360,
3202
    LCDFR_LCDFR_32_LNDFR_LNDFR_32_LPDFR_LPDFR_32  = 361,
3203
    LCXBR_LNXBR_LPXBR = 362,
3204
    SQDB_SQEB = 363,
3205
    SQDBR_SQEBR = 364,
3206
    SQXBR = 365,
3207
    FIDBR_FIDBRA_FIEBR_FIEBRA = 366,
3208
    FIXBR_FIXBRA  = 367,
3209
    ADB_AEB = 368,
3210
    ADBR_AEBR = 369,
3211
    AXBR  = 370,
3212
    SDB_SEB = 371,
3213
    SDBR_SEBR = 372,
3214
    SXBR  = 373,
3215
    MDB_MDEB_MEEB = 374,
3216
    MDBR_MDEBR_MEEBR  = 375,
3217
    MXDB  = 376,
3218
    MXDBR = 377,
3219
    MXBR  = 378,
3220
    MAEB_MSEB = 379,
3221
    MAEBR_MSEBR = 380,
3222
    MADB_MSDB = 381,
3223
    MADBR_MSDBR = 382,
3224
    DDB_DEB = 383,
3225
    DDBR_DEBR = 384,
3226
    DXBR  = 385,
3227
    DIDBR_DIEBR = 386,
3228
    CDB_CEB_KDB_KEB = 387,
3229
    CDBR_CEBR_KDBR_KEBR = 388,
3230
    CXBR_KXBR = 389,
3231
    TCDB_TCEB = 390,
3232
    TCXB  = 391,
3233
    EFPC  = 392,
3234
    STFPC = 393,
3235
    SFPC  = 394,
3236
    LFPC  = 395,
3237
    SFASR = 396,
3238
    LFAS  = 397,
3239
    SRNM_SRNMB_SRNMT  = 398,
3240
    LTDR_LTER = 399,
3241
    LTXR  = 400,
3242
    LEDR_LRER = 401,
3243
    LEXR  = 402,
3244
    LDXR_LRDR = 403,
3245
    LDE = 404,
3246
    LDER  = 405,
3247
    LXD_LXE = 406,
3248
    LXDR_LXER = 407,
3249
    CDFR_CDGR_CEFR_CEGR = 408,
3250
    CXFR_CXGR = 409,
3251
    CFDR_CFER_CGDR_CGER = 410,
3252
    CFXR_CGXR = 411,
3253
    THDER_THDR  = 412,
3254
    TBDR_TBEDR  = 413,
3255
    LCDR_LCER_LNDR_LNER_LPDR_LPER = 414,
3256
    LCXR_LNXR_LPXR  = 415,
3257
    HDR_HER = 416,
3258
    SQD_SQE = 417,
3259
    SQDR_SQER = 418,
3260
    SQXR  = 419,
3261
    FIDR_FIER = 420,
3262
    FIXR  = 421,
3263
    AD_AE_AU_AW = 422,
3264
    ADR_AER_AUR_AWR = 423,
3265
    AXR = 424,
3266
    SD_SE_SU_SW = 425,
3267
    SDR_SER_SUR_SWR = 426,
3268
    SXR = 427,
3269
    MD_MDE_ME_MEE = 428,
3270
    MDER_MDR_MEER_MER = 429,
3271
    MXD = 430,
3272
    MXDR  = 431,
3273
    MXR = 432,
3274
    MY  = 433,
3275
    MYH_MYL = 434,
3276
    MYR = 435,
3277
    MYHR_MYLR = 436,
3278
    MAD_MAE_MSD_MSE = 437,
3279
    MADR_MAER_MSDR_MSER = 438,
3280
    MAY = 439,
3281
    MAYH_MAYL = 440,
3282
    MAYR  = 441,
3283
    MAYHR_MAYLR = 442,
3284
    DD_DE = 443,
3285
    DDR_DER = 444,
3286
    DXR = 445,
3287
    CD_CE = 446,
3288
    CDR_CER = 447,
3289
    CXR = 448,
3290
    LTDTR = 449,
3291
    LTXTR = 450,
3292
    LEDTR = 451,
3293
    LDXTR = 452,
3294
    LDETR = 453,
3295
    LXDTR = 454,
3296
    CDFTR_CDGTR_CDGTRA  = 455,
3297
    CXFTR_CXGTR_CXGTRA  = 456,
3298
    CDLFTR_CDLGTR = 457,
3299
    CXLFTR_CXLGTR = 458,
3300
    CFDTR_CGDTR_CGDTRA  = 459,
3301
    CFXTR_CGXTR_CGXTRA  = 460,
3302
    CLFDTR_CLGDTR = 461,
3303
    CLFXTR_CLGXTR = 462,
3304
    CDSTR_CDUTR = 463,
3305
    CXSTR_CXUTR = 464,
3306
    CSDTR_CUDTR = 465,
3307
    CSXTR_CUXTR = 466,
3308
    CDZT  = 467,
3309
    CXZT  = 468,
3310
    CZDT  = 469,
3311
    CZXT  = 470,
3312
    CDPT  = 471,
3313
    CXPT  = 472,
3314
    CPDT  = 473,
3315
    CPXT  = 474,
3316
    PFPO  = 475,
3317
    FIDTR = 476,
3318
    FIXTR = 477,
3319
    EEDTR = 478,
3320
    EEXTR = 479,
3321
    ESDTR = 480,
3322
    ESXTR = 481,
3323
    ADTR_ADTRA  = 482,
3324
    AXTR_AXTRA  = 483,
3325
    SDTR_SDTRA  = 484,
3326
    SXTR_SXTRA  = 485,
3327
    MDTR_MDTRA  = 486,
3328
    MXTR_MXTRA  = 487,
3329
    DDTR_DDTRA  = 488,
3330
    DXTR_DXTRA  = 489,
3331
    QADTR = 490,
3332
    QAXTR = 491,
3333
    RRDTR = 492,
3334
    RRXTR = 493,
3335
    SLDT_SRDT = 494,
3336
    SLXT_SRXT = 495,
3337
    IEDTR = 496,
3338
    IEXTR = 497,
3339
    CDTR_KDTR = 498,
3340
    CXTR_KXTR = 499,
3341
    CEDTR = 500,
3342
    CEXTR = 501,
3343
    TDCDT_TDCET_TDGDT_TDGET = 502,
3344
    TDCXT_TDGXT = 503,
3345
    VLR32_VLR64_VLR = 504,
3346
    VLGV_VLGVB_VLGVF_VLGVG_VLGVH  = 505,
3347
    VLVG_VLVGB_VLVGF_VLVGG_VLVGH  = 506,
3348
    VLVGP32_VLVGP = 507,
3349
    VZERO = 508,
3350
    VONE  = 509,
3351
    VGBM  = 510,
3352
    VGM_VGMB_VGMF_VGMG_VGMH = 511,
3353
    VREPI_VREPIB_VREPIF_VREPIG_VREPIH = 512,
3354
    VLEIB_VLEIF_VLEIG_VLEIH = 513,
3355
    VL_VLBB = 514,
3356
    VLL = 515,
3357
    VL32_VL64 = 516,
3358
    VLLEZ_VLLEZB_VLLEZF_VLLEZG_VLLEZH_VLLEZLF = 517,
3359
    VLREP_VLREPB_VLREPF_VLREPG_VLREPH = 518,
3360
    VLEB_VLEF_VLEG_VLEH = 519,
3361
    VGEF_VGEG = 520,
3362
    VLM = 521,
3363
    VLRL_VLRLR  = 522,
3364
    VST32_VST64_VST_VSTL  = 523,
3365
    VSTEF_VSTEG = 524,
3366
    VSTEB_VSTEH = 525,
3367
    VSTM  = 526,
3368
    VSCEF_VSCEG = 527,
3369
    VSTRL_VSTRLR  = 528,
3370
    VMRH_VMRHB_VMRHF_VMRHG_VMRHH  = 529,
3371
    VMRL_VMRLB_VMRLF_VMRLG_VMRLH  = 530,
3372
    VPERM = 531,
3373
    VPDI  = 532,
3374
    VBPERM  = 533,
3375
    VREP_VREPB_VREPF_VREPG_VREPH  = 534,
3376
    VSEL  = 535,
3377
    VPK_VPKF_VPKG_VPKH  = 536,
3378
    VPKS_VPKSF_VPKSG_VPKSH  = 537,
3379
    VPKSFS_VPKSGS_VPKSHS  = 538,
3380
    VPKLS_VPKLSF_VPKLSG_VPKLSH  = 539,
3381
    VPKLSFS_VPKLSGS_VPKLSHS = 540,
3382
    VSEG_VSEGB_VSEGF_VSEGH  = 541,
3383
    VUPH_VUPHB_VUPHF_VUPHH  = 542,
3384
    VUPL_VUPLB_VUPLF  = 543,
3385
    VUPLH_VUPLHB_VUPLHF_VUPLHH_VUPLHW = 544,
3386
    VUPLL_VUPLLB_VUPLLF_VUPLLH  = 545,
3387
    VA_VAB_VAC_VACQ_VAF_VAG_VAH_VAQ = 546,
3388
    VACC_VACCB_VACCC_VACCCQ_VACCF_VACCG_VACCH_VACCQ = 547,
3389
    VAVG_VAVGB_VAVGF_VAVGG_VAVGH  = 548,
3390
    VAVGL_VAVGLB_VAVGLF_VAVGLG_VAVGLH = 549,
3391
    VN_VNC_VNN_VNO_VNX  = 550,
3392
    VO_VOC  = 551,
3393
    VCKSM = 552,
3394
    VCLZ_VCLZB_VCLZF_VCLZG_VCLZH  = 553,
3395
    VCTZ_VCTZB_VCTZF_VCTZG_VCTZH  = 554,
3396
    VX  = 555,
3397
    VGFM  = 556,
3398
    VGFMA_VGFMAB_VGFMAF_VGFMAG_VGFMAH = 557,
3399
    VGFMB_VGFMF_VGFMG_VGFMH = 558,
3400
    VLC_VLCB_VLCF_VLCG_VLCH = 559,
3401
    VLP_VLPB_VLPF_VLPG_VLPH = 560,
3402
    VMX_VMXB_VMXF_VMXG_VMXH = 561,
3403
    VMXL_VMXLB_VMXLF_VMXLG_VMXLH  = 562,
3404
    VMN_VMNB_VMNF_VMNG_VMNH = 563,
3405
    VMNL_VMNLB_VMNLF_VMNLG_VMNLH  = 564,
3406
    VMAL_VMALB_VMALF  = 565,
3407
    VMALE_VMALEB_VMALEF_VMALEH  = 566,
3408
    VMALH_VMALHB_VMALHF_VMALHH_VMALHW = 567,
3409
    VMALO_VMALOB_VMALOF_VMALOH  = 568,
3410
    VMAO_VMAOB_VMAOF_VMAOH  = 569,
3411
    VMAE_VMAEB_VMAEF_VMAEH  = 570,
3412
    VMAH_VMAHB_VMAHF_VMAHH  = 571,
3413
    VME_VMEB_VMEF_VMEH  = 572,
3414
    VMH_VMHB_VMHF_VMHH  = 573,
3415
    VML_VMLB_VMLF = 574,
3416
    VMLE_VMLEB_VMLEF_VMLEH  = 575,
3417
    VMLH_VMLHB_VMLHF_VMLHH_VMLHW  = 576,
3418
    VMLO_VMLOB_VMLOF_VMLOH  = 577,
3419
    VMO_VMOB_VMOF_VMOH  = 578,
3420
    VMSL_VMSLG  = 579,
3421
    VPOPCT_VPOPCTB_VPOPCTF_VPOPCTG_VPOPCTH  = 580,
3422
    VERLL_VERLLB_VERLLF_VERLLG_VERLLH = 581,
3423
    VERLLV_VERLLVB_VERLLVF_VERLLVG_VERLLVH  = 582,
3424
    VERIM_VERIMB_VERIMF_VERIMG_VERIMH = 583,
3425
    VESL_VESLB_VESLF_VESLG_VESLH  = 584,
3426
    VESLV_VESLVB_VESLVF_VESLVG_VESLVH = 585,
3427
    VESRA_VESRAB_VESRAF_VESRAG_VESRAH = 586,
3428
    VESRAV_VESRAVB_VESRAVF_VESRAVG_VESRAVH  = 587,
3429
    VESRL_VESRLB_VESRLF_VESRLG_VESRLH = 588,
3430
    VESRLV_VESRLVB_VESRLVF_VESRLVG_VESRLVH  = 589,
3431
    VSL_VSLDB = 590,
3432
    VSLB  = 591,
3433
    VSRA_VSRL = 592,
3434
    VSRAB_VSRLB = 593,
3435
    VSB_VSBCBI_VSBCBIQ_VSBI_VSBIQ = 594,
3436
    VSCBI_VSCBIB_VSCBIF_VSCBIG_VSCBIH_VSCBIQ  = 595,
3437
    VS_VSF_VSG_VSH_VSQ  = 596,
3438
    VSUM_VSUMB_VSUMH  = 597,
3439
    VSUMG_VSUMGF_VSUMGH = 598,
3440
    VSUMQ_VSUMQF_VSUMQG = 599,
3441
    VEC_VECB_VECF_VECG_VECH = 600,
3442
    VECL_VECLB_VECLF_VECLG_VECLH  = 601,
3443
    VCEQ_VCEQB_VCEQF_VCEQG_VCEQH  = 602,
3444
    VCEQBS_VCEQFS_VCEQGS_VCEQHS = 603,
3445
    VCH_VCHB_VCHF_VCHG_VCHH = 604,
3446
    VCHBS_VCHFS_VCHGS_VCHHS = 605,
3447
    VCHL_VCHLB_VCHLF_VCHLG_VCHLH  = 606,
3448
    VCHLBS_VCHLFS_VCHLGS_VCHLHS = 607,
3449
    VTM = 608,
3450
    VCDG_VCDLG  = 609,
3451
    VCDGB_VCDLGB  = 610,
3452
    WCDGB_WCDLGB  = 611,
3453
    VCGD_VCLGD  = 612,
3454
    VCGDB_VCLGDB  = 613,
3455
    WCGDB_WCLGDB  = 614,
3456
    VLDE_VLED = 615,
3457
    VLDEB_VLEDB = 616,
3458
    WLDEB_WLEDB = 617,
3459
    VFLL_VFLR = 618,
3460
    VFLLS_VFLRD = 619,
3461
    WFLLS_WFLRD = 620,
3462
    WFLLD = 621,
3463
    WFLRX = 622,
3464
    VFI = 623,
3465
    VFIDB = 624,
3466
    WFIDB = 625,
3467
    VFISB = 626,
3468
    WFISB = 627,
3469
    WFIXB = 628,
3470
    VFPSO = 629,
3471
    VFPSODB_WFPSODB = 630,
3472
    VFPSOSB_WFPSOSB = 631,
3473
    WFPSOXB = 632,
3474
    VFLCDB_VFLNDB_VFLPDB_WFLCDB_WFLNDB_WFLPDB = 633,
3475
    VFLCSB_VFLNSB_VFLPSB_WFLCSB_WFLNSB_WFLPSB = 634,
3476
    WFLCXB_WFLNXB_WFLPXB  = 635,
3477
    VFMAX_VFMIN = 636,
3478
    VFMAXDB_VFMINDB = 637,
3479
    WFMAXDB_WFMINDB = 638,
3480
    VFMAXSB_VFMINSB = 639,
3481
    WFMAXSB_WFMINSB = 640,
3482
    WFMAXXB_WFMINXB = 641,
3483
    VFTCI = 642,
3484
    VFTCIDB_WFTCIDB = 643,
3485
    VFTCISB_WFTCISB = 644,
3486
    WFTCIXB = 645,
3487
    VFA_VFS = 646,
3488
    VFADB_VFSDB = 647,
3489
    WFADB_WFSDB = 648,
3490
    VFASB_VFSSB = 649,
3491
    WFASB_WFSSB = 650,
3492
    WFAXB_WFSXB = 651,
3493
    VFM = 652,
3494
    VFMDB = 653,
3495
    WFMDB_WFMSB = 654,
3496
    VFMSB = 655,
3497
    WFMXB = 656,
3498
    VFMA_VFMS_VFNMA_VFNMS = 657,
3499
    VFMADB_VFMSDB_VFNMADB_VFNMSDB = 658,
3500
    WFMADB_WFMSDB_WFNMADB_WFNMSDB = 659,
3501
    VFMASB_VFMSSB_VFNMASB_VFNMSSB = 660,
3502
    WFMASB_WFMSSB_WFNMASB_WFNMSSB = 661,
3503
    WFMAXB_WFMSXB_WFNMAXB_WFNMSXB = 662,
3504
    VFD = 663,
3505
    VFDDB_WFDDB = 664,
3506
    VFDSB_WFDSB = 665,
3507
    WFDXB = 666,
3508
    VFSQ  = 667,
3509
    VFSQDB_WFSQDB = 668,
3510
    VFSQSB_WFSQSB = 669,
3511
    WFSQXB  = 670,
3512
    VFCE_VFCH_VFCHE = 671,
3513
    VFCEDB_VFCHDB_VFCHEDB_VFKEDB_VFKHDB_VFKHEDB = 672,
3514
    WFCEDB_WFCHDB_WFCHEDB = 673,
3515
    WFKEDB_WFKHDB_WFKHEDB = 674,
3516
    VFCESB_VFCHESB_VFCHSB_VFKESB_VFKHESB_VFKHSB = 675,
3517
    WFCESB_WFCHESB_WFCHSB = 676,
3518
    WFKESB_WFKHESB_WFKHSB = 677,
3519
    WFCEXB_WFCHEXB_WFCHXB = 678,
3520
    WFKEXB_WFKHEXB_WFKHXB = 679,
3521
    VFCEDBS_VFCHDBS_VFCHEDBS  = 680,
3522
    VFKEDBS_VFKHDBS_VFKHEDBS  = 681,
3523
    WFCEDBS_WFCHDBS_WFCHEDBS_WFKEDBS_WFKHDBS_WFKHEDBS = 682,
3524
    VFCESBS_VFCHESBS_VFCHSBS_VFKESBS_VFKHESBS_VFKHSBS = 683,
3525
    WFCESBS_WFCHESBS_WFCHSBS  = 684,
3526
    WFKESBS_WFKHESBS_WFKHSBS  = 685,
3527
    WFCEXBS_WFCHEXBS_WFCHXBS  = 686,
3528
    WFKEXBS_WFKHEXBS_WFKHXBS  = 687,
3529
    WFC_WFK = 688,
3530
    WFCDB_WFKDB = 689,
3531
    WFCSB_WFKSB = 690,
3532
    WFCXB_WFKXB = 691,
3533
    LEFR  = 692,
3534
    LFER  = 693,
3535
    VFAE_VFAEB  = 694,
3536
    VFAEF_VFAEH = 695,
3537
    VFAEBS_VFAEFS_VFAEHS  = 696,
3538
    VFAEZB_VFAEZF_VFAEZH  = 697,
3539
    VFAEZBS_VFAEZFS_VFAEZHS = 698,
3540
    VFEE_VFEEB_VFEEF_VFEEH_VFEEZB_VFEEZF_VFEEZH = 699,
3541
    VFEEBS_VFEEFS_VFEEHS_VFEEZBS_VFEEZFS_VFEEZHS  = 700,
3542
    VFENE_VFENEB_VFENEF_VFENEH_VFENEZB_VFENEZF_VFENEZH  = 701,
3543
    VFENEBS_VFENEFS_VFENEHS_VFENEZBS_VFENEZFS_VFENEZHS  = 702,
3544
    VISTR_VISTRB_VISTRF_VISTRH  = 703,
3545
    VISTRBS_VISTRFS_VISTRHS = 704,
3546
    VSTRC_VSTRCB_VSTRCF_VSTRCH  = 705,
3547
    VSTRCBS_VSTRCFS_VSTRCHS = 706,
3548
    VSTRCZB_VSTRCZF_VSTRCZH = 707,
3549
    VSTRCZBS_VSTRCZFS_VSTRCZHS  = 708,
3550
    VLIP  = 709,
3551
    VPKZ  = 710,
3552
    VUPKZ = 711,
3553
    VCVB_VCVBG  = 712,
3554
    VCVD_VCVDG  = 713,
3555
    VAP_VSP = 714,
3556
    VMP_VMSP  = 715,
3557
    VDP_VRP = 716,
3558
    VSDP  = 717,
3559
    VSRP  = 718,
3560
    VPSOP = 719,
3561
    VCP_VTP = 720,
3562
    EPSW  = 721,
3563
    LPSW_LPSWE  = 722,
3564
    IPK = 723,
3565
    SPKA  = 724,
3566
    SSM = 725,
3567
    STNSM_STOSM = 726,
3568
    IAC = 727,
3569
    SAC_SACF  = 728,
3570
    LCTL_LCTLG  = 729,
3571
    STCTG_STCTL = 730,
3572
    EPAIR_EPAR_ESAIR_ESAR = 731,
3573
    SSAIR_SSAR  = 732,
3574
    ESEA  = 733,
3575
    SPX_STPX  = 734,
3576
    ISKE  = 735,
3577
    IVSK  = 736,
3578
    SSKE_SSKEOpt  = 737,
3579
    RRBE_RRBM = 738,
3580
    IRBM  = 739,
3581
    PFMF  = 740,
3582
    TB  = 741,
3583
    PGIN  = 742,
3584
    PGOUT = 743,
3585
    IPTE_IPTEOpt_IPTEOptOpt = 744,
3586
    IDTE_IDTEOpt  = 745,
3587
    CRDTE_CRDTEOpt  = 746,
3588
    PTLB  = 747,
3589
    CSP_CSPG  = 748,
3590
    LPTEA = 749,
3591
    LRA_LRAG_LRAY = 750,
3592
    STRAG = 751,
3593
    LURA_LURAG  = 752,
3594
    STURA_STURG = 753,
3595
    TPROT = 754,
3596
    MVCK_MVCP_MVCS  = 755,
3597
    MVCDK_MVCSK = 756,
3598
    MVCOS = 757,
3599
    MVPG  = 758,
3600
    LASP  = 759,
3601
    PALB  = 760,
3602
    PC  = 761,
3603
    PR  = 762,
3604
    PT_PTI  = 763,
3605
    RP  = 764,
3606
    BSA_BSG = 765,
3607
    TAR = 766,
3608
    BAKR  = 767,
3609
    EREG_EREGG  = 768,
3610
    ESTA_MSTA = 769,
3611
    PTFF  = 770,
3612
    SCK_SCKC_SCKPF  = 771,
3613
    SPT = 772,
3614
    STCK_STCKF  = 773,
3615
    STCKE = 774,
3616
    STCKC = 775,
3617
    STPT  = 776,
3618
    STAP  = 777,
3619
    STIDP = 778,
3620
    STSI  = 779,
3621
    STFL_STFLE  = 780,
3622
    ECAG  = 781,
3623
    ECTG  = 782,
3624
    PTF = 783,
3625
    PCKMO = 784,
3626
    SVC = 785,
3627
    MC  = 786,
3628
    DIAG  = 787,
3629
    TRACE_TRACG = 788,
3630
    TRAP2_TRAP4 = 789,
3631
    SIGA_SIGP = 790,
3632
    SIE = 791,
3633
    LPP = 792,
3634
    ECPGA = 793,
3635
    ECCTR_EPCTR = 794,
3636
    LCCTL = 795,
3637
    LPCTL_LSCTL = 796,
3638
    QCTRI_QSI = 797,
3639
    SCCTR_SPCTR = 798,
3640
    CSCH_HSCH_RSCH_XSCH = 799,
3641
    MSCH_SSCH_STSCH_TSCH  = 800,
3642
    RCHP  = 801,
3643
    SCHM  = 802,
3644
    STCPS_STCRW = 803,
3645
    TPI = 804,
3646
    SAL = 805,
3647
    AGF = 806,
3648
    SGF = 807,
3649
    KM_KMC_KMCTR_KMF_KMO  = 808,
3650
    PCC_PPNO  = 809,
3651
    VLLEZ_VLLEZB_VLLEZF_VLLEZG_VLLEZH = 810,
3652
    VN_VNC_VNO  = 811,
3653
    VO  = 812,
3654
    VPOPCT  = 813,
3655
    WFMDB = 814,
3656
    VFMA_VFMS = 815,
3657
    VFMADB_VFMSDB = 816,
3658
    WFMADB_WFMSDB = 817,
3659
    VFCEDB_VFCHDB_VFCHEDB = 818,
3660
    WFCEDBS_WFCHDBS_WFCHEDBS  = 819,
3661
    LOCGR_LOCGRAsm_LOCGRAsmE_LOCGRAsmH_LOCGRAsmHE_LOCGRAsmL_LOCGRAsmLE_LOCGRAsmLH_LOCGRAsmM_LOCGRAsmNE_LOCGRAsmNH_LOCGRAsmNHE_LOCGRAsmNL_LOCGRAsmNLE_LOCGRAsmNLH_LOCGRAsmNM_LOCGRAsmNO_LOCGRAsmNP_LOCGRAsmNZ_LOCGRAsmO_LOCGRAsmP_LOCGRAsmZ_LOCR_LOCRAsm_LOCRAsmE_LOCRAsmH_LOCRAsmHE_LOCRAsmL_LOCRAsmLE_LOCRAsmLH_LOCRAsmM_LOCRAsmNE_LOCRAsmNH_LOCRAsmNHE_LOCRAsmNL_LOCRAsmNLE_LOCRAsmNLH_LOCRAsmNM_LOCRAsmNO_LOCRAsmNP_LOCRAsmNZ_LOCRAsmO_LOCRAsmP_LOCRAsmZ = 820,
3662
    LOC_LOCAsm_LOCAsmE_LOCAsmH_LOCAsmHE_LOCAsmL_LOCAsmLE_LOCAsmLH_LOCAsmM_LOCAsmNE_LOCAsmNH_LOCAsmNHE_LOCAsmNL_LOCAsmNLE_LOCAsmNLH_LOCAsmNM_LOCAsmNO_LOCAsmNP_LOCAsmNZ_LOCAsmO_LOCAsmP_LOCAsmZ_LOCG_LOCGAsm_LOCGAsmE_LOCGAsmH_LOCGAsmHE_LOCGAsmL_LOCGAsmLE_LOCGAsmLH_LOCGAsmM_LOCGAsmNE_LOCGAsmNH_LOCGAsmNHE_LOCGAsmNL_LOCGAsmNLE_LOCGAsmNLH_LOCGAsmNM_LOCGAsmNO_LOCGAsmNP_LOCGAsmNZ_LOCGAsmO_LOCGAsmP_LOCGAsmZ = 821,
3663
    STOC_STOCAsm_STOCAsmE_STOCAsmH_STOCAsmHE_STOCAsmL_STOCAsmLE_STOCAsmLH_STOCAsmM_STOCAsmNE_STOCAsmNH_STOCAsmNHE_STOCAsmNL_STOCAsmNLE_STOCAsmNLH_STOCAsmNM_STOCAsmNO_STOCAsmNP_STOCAsmNZ_STOCAsmO_STOCAsmP_STOCAsmZ_STOCG_STOCGAsm_STOCGAsmE_STOCGAsmH_STOCGAsmHE_STOCGAsmL_STOCGAsmLE_STOCGAsmLH_STOCGAsmM_STOCGAsmNE_STOCGAsmNH_STOCGAsmNHE_STOCGAsmNL_STOCGAsmNLE_STOCGAsmNLH_STOCGAsmNM_STOCGAsmNO_STOCGAsmNP_STOCGAsmNZ_STOCGAsmO_STOCGAsmP_STOCGAsmZ = 822,
3664
    ALSI_ASI  = 823,
3665
    ALGF  = 824,
3666
    PCC = 825,
3667
    CELFBR_CELGBR = 826,
3668
    MD_MEE  = 827,
3669
    MDR_MEER  = 828,
3670
    CDFTR = 829,
3671
    CXFTR = 830,
3672
    CXLFTR  = 831,
3673
    CFDTR = 832,
3674
    CFXTR = 833,
3675
    TDCDT_TDGDT = 834,
3676
    SCK = 835,
3677
    SCKPF = 836,
3678
    RISBG_RISBG32 = 837,
3679
    SCHED_LIST_END = 838
3680
  };
3681
} // end Sched namespace
3682
} // end SystemZ namespace
3683
} // end llvm namespace
3684
#endif // GET_INSTRINFO_SCHED_ENUM
3685
3686
#ifdef GET_INSTRINFO_MC_DESC
3687
#undef GET_INSTRINFO_MC_DESC
3688
namespace llvm {
3689
3690
static const MCPhysReg ImplicitList1[] = { SystemZ::CC, 0 };
3691
static const MCPhysReg ImplicitList2[] = { SystemZ::R1D, 0 };
3692
static const MCPhysReg ImplicitList3[] = { SystemZ::R14D, SystemZ::CC, 0 };
3693
static const MCPhysReg ImplicitList4[] = { SystemZ::R1D, SystemZ::R2D, SystemZ::R3D, 0 };
3694
static const MCPhysReg ImplicitList5[] = { SystemZ::CC, SystemZ::R1D, SystemZ::R2D, SystemZ::R3D, 0 };
3695
static const MCPhysReg ImplicitList6[] = { SystemZ::R0L, 0 };
3696
static const MCPhysReg ImplicitList7[] = { SystemZ::R0L, SystemZ::R1D, 0 };
3697
static const MCPhysReg ImplicitList8[] = { SystemZ::CC, SystemZ::R1D, 0 };
3698
static const MCPhysReg ImplicitList9[] = { SystemZ::R1L, 0 };
3699
static const MCPhysReg ImplicitList10[] = { SystemZ::R0L, SystemZ::R1L, 0 };
3700
static const MCPhysReg ImplicitList11[] = { SystemZ::R0D, SystemZ::R1D, 0 };
3701
static const MCPhysReg ImplicitList12[] = { SystemZ::R2L, 0 };
3702
static const MCPhysReg ImplicitList13[] = { SystemZ::R0L, SystemZ::F4Q, 0 };
3703
static const MCPhysReg ImplicitList14[] = { SystemZ::CC, SystemZ::R1L, SystemZ::F0Q, 0 };
3704
static const MCPhysReg ImplicitList15[] = { SystemZ::R1L, SystemZ::R2D, 0 };
3705
static const MCPhysReg ImplicitList16[] = { SystemZ::R0D, SystemZ::R1D, SystemZ::R2D, SystemZ::R3D, 0 };
3706
static const MCPhysReg ImplicitList17[] = { SystemZ::R0D, 0 };
3707
static const MCPhysReg ImplicitList18[] = { SystemZ::R0D, SystemZ::CC, 0 };
3708
static const MCPhysReg ImplicitList19[] = { SystemZ::R0L, SystemZ::CC, 0 };
3709
static const MCPhysReg ImplicitList20[] = { SystemZ::CC, SystemZ::R0L, SystemZ::R1D, 0 };
3710
static const MCPhysReg ImplicitList21[] = { SystemZ::R0D, SystemZ::R1D, SystemZ::R2D, SystemZ::R3D, SystemZ::R4D, SystemZ::R5D, 0 };
3711
static const MCPhysReg ImplicitList22[] = { SystemZ::CC, SystemZ::R0D, SystemZ::R1D, SystemZ::R2D, SystemZ::R3D, SystemZ::R5D, 0 };
3712
3713
static const MCOperandInfo OperandInfo2[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3714
static const MCOperandInfo OperandInfo3[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3715
static const MCOperandInfo OperandInfo4[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3716
static const MCOperandInfo OperandInfo5[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3717
static const MCOperandInfo OperandInfo6[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3718
static const MCOperandInfo OperandInfo7[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3719
static const MCOperandInfo OperandInfo8[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3720
static const MCOperandInfo OperandInfo9[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3721
static const MCOperandInfo OperandInfo10[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
3722
static const MCOperandInfo OperandInfo11[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3723
static const MCOperandInfo OperandInfo12[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3724
static const MCOperandInfo OperandInfo13[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, };
3725
static const MCOperandInfo OperandInfo14[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, };
3726
static const MCOperandInfo OperandInfo15[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3727
static const MCOperandInfo OperandInfo16[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3728
static const MCOperandInfo OperandInfo17[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, };
3729
static const MCOperandInfo OperandInfo18[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3730
static const MCOperandInfo OperandInfo19[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, };
3731
static const MCOperandInfo OperandInfo20[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, };
3732
static const MCOperandInfo OperandInfo21[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, };
3733
static const MCOperandInfo OperandInfo22[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, };
3734
static const MCOperandInfo OperandInfo23[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, };
3735
static const MCOperandInfo OperandInfo24[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, };
3736
static const MCOperandInfo OperandInfo25[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, };
3737
static const MCOperandInfo OperandInfo26[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, };
3738
static const MCOperandInfo OperandInfo27[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3739
static const MCOperandInfo OperandInfo28[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, };
3740
static const MCOperandInfo OperandInfo29[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, };
3741
static const MCOperandInfo OperandInfo30[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, };
3742
static const MCOperandInfo OperandInfo31[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3743
static const MCOperandInfo OperandInfo32[] = { { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3744
static const MCOperandInfo OperandInfo33[] = { { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3745
static const MCOperandInfo OperandInfo34[] = { { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3746
static const MCOperandInfo OperandInfo35[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3747
static const MCOperandInfo OperandInfo36[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3748
static const MCOperandInfo OperandInfo37[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3749
static const MCOperandInfo OperandInfo38[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3750
static const MCOperandInfo OperandInfo39[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3751
static const MCOperandInfo OperandInfo40[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3752
static const MCOperandInfo OperandInfo41[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3753
static const MCOperandInfo OperandInfo42[] = { { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3754
static const MCOperandInfo OperandInfo43[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3755
static const MCOperandInfo OperandInfo44[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3756
static const MCOperandInfo OperandInfo45[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3757
static const MCOperandInfo OperandInfo46[] = { { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3758
static const MCOperandInfo OperandInfo47[] = { { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3759
static const MCOperandInfo OperandInfo48[] = { { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3760
static const MCOperandInfo OperandInfo49[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3761
static const MCOperandInfo OperandInfo50[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3762
static const MCOperandInfo OperandInfo51[] = { { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3763
static const MCOperandInfo OperandInfo52[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3764
static const MCOperandInfo OperandInfo53[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3765
static const MCOperandInfo OperandInfo54[] = { { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3766
static const MCOperandInfo OperandInfo55[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3767
static const MCOperandInfo OperandInfo56[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3768
static const MCOperandInfo OperandInfo57[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3769
static const MCOperandInfo OperandInfo58[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3770
static const MCOperandInfo OperandInfo59[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3771
static const MCOperandInfo OperandInfo60[] = { { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3772
static const MCOperandInfo OperandInfo61[] = { { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3773
static const MCOperandInfo OperandInfo62[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3774
static const MCOperandInfo OperandInfo63[] = { { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3775
static const MCOperandInfo OperandInfo64[] = { { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3776
static const MCOperandInfo OperandInfo65[] = { { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3777
static const MCOperandInfo OperandInfo66[] = { { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3778
static const MCOperandInfo OperandInfo67[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3779
static const MCOperandInfo OperandInfo68[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3780
static const MCOperandInfo OperandInfo69[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3781
static const MCOperandInfo OperandInfo70[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3782
static const MCOperandInfo OperandInfo71[] = { { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3783
static const MCOperandInfo OperandInfo72[] = { { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3784
static const MCOperandInfo OperandInfo73[] = { { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3785
static const MCOperandInfo OperandInfo74[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3786
static const MCOperandInfo OperandInfo75[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3787
static const MCOperandInfo OperandInfo76[] = { { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3788
static const MCOperandInfo OperandInfo77[] = { { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3789
static const MCOperandInfo OperandInfo78[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3790
static const MCOperandInfo OperandInfo79[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3791
static const MCOperandInfo OperandInfo80[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3792
static const MCOperandInfo OperandInfo81[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3793
static const MCOperandInfo OperandInfo82[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3794
static const MCOperandInfo OperandInfo83[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3795
static const MCOperandInfo OperandInfo84[] = { { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3796
static const MCOperandInfo OperandInfo85[] = { { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3797
static const MCOperandInfo OperandInfo86[] = { { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3798
static const MCOperandInfo OperandInfo87[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3799
static const MCOperandInfo OperandInfo88[] = { { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3800
static const MCOperandInfo OperandInfo89[] = { { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3801
static const MCOperandInfo OperandInfo90[] = { { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3802
static const MCOperandInfo OperandInfo91[] = { { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3803
static const MCOperandInfo OperandInfo92[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3804
static const MCOperandInfo OperandInfo93[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3805
static const MCOperandInfo OperandInfo94[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3806
static const MCOperandInfo OperandInfo95[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3807
static const MCOperandInfo OperandInfo96[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3808
static const MCOperandInfo OperandInfo97[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3809
static const MCOperandInfo OperandInfo98[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3810
static const MCOperandInfo OperandInfo99[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3811
static const MCOperandInfo OperandInfo100[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3812
static const MCOperandInfo OperandInfo101[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3813
static const MCOperandInfo OperandInfo102[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3814
static const MCOperandInfo OperandInfo103[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3815
static const MCOperandInfo OperandInfo104[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3816
static const MCOperandInfo OperandInfo105[] = { { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3817
static const MCOperandInfo OperandInfo106[] = { { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3818
static const MCOperandInfo OperandInfo107[] = { { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3819
static const MCOperandInfo OperandInfo108[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3820
static const MCOperandInfo OperandInfo109[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3821
static const MCOperandInfo OperandInfo110[] = { { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3822
static const MCOperandInfo OperandInfo111[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3823
static const MCOperandInfo OperandInfo112[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3824
static const MCOperandInfo OperandInfo113[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3825
static const MCOperandInfo OperandInfo114[] = { { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3826
static const MCOperandInfo OperandInfo115[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3827
static const MCOperandInfo OperandInfo116[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3828
static const MCOperandInfo OperandInfo117[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3829
static const MCOperandInfo OperandInfo118[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3830
static const MCOperandInfo OperandInfo119[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3831
static const MCOperandInfo OperandInfo120[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3832
static const MCOperandInfo OperandInfo121[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3833
static const MCOperandInfo OperandInfo122[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3834
static const MCOperandInfo OperandInfo123[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3835
static const MCOperandInfo OperandInfo124[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3836
static const MCOperandInfo OperandInfo125[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3837
static const MCOperandInfo OperandInfo126[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3838
static const MCOperandInfo OperandInfo127[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3839
static const MCOperandInfo OperandInfo128[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3840
static const MCOperandInfo OperandInfo129[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3841
static const MCOperandInfo OperandInfo130[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3842
static const MCOperandInfo OperandInfo131[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3843
static const MCOperandInfo OperandInfo132[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3844
static const MCOperandInfo OperandInfo133[] = { { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3845
static const MCOperandInfo OperandInfo134[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3846
static const MCOperandInfo OperandInfo135[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3847
static const MCOperandInfo OperandInfo136[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3848
static const MCOperandInfo OperandInfo137[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3849
static const MCOperandInfo OperandInfo138[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3850
static const MCOperandInfo OperandInfo139[] = { { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3851
static const MCOperandInfo OperandInfo140[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3852
static const MCOperandInfo OperandInfo141[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3853
static const MCOperandInfo OperandInfo142[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3854
static const MCOperandInfo OperandInfo143[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3855
static const MCOperandInfo OperandInfo144[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3856
static const MCOperandInfo OperandInfo145[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3857
static const MCOperandInfo OperandInfo146[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3858
static const MCOperandInfo OperandInfo147[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3859
static const MCOperandInfo OperandInfo148[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3860
static const MCOperandInfo OperandInfo149[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3861
static const MCOperandInfo OperandInfo150[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3862
static const MCOperandInfo OperandInfo151[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3863
static const MCOperandInfo OperandInfo152[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3864
static const MCOperandInfo OperandInfo153[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3865
static const MCOperandInfo OperandInfo154[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3866
static const MCOperandInfo OperandInfo155[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3867
static const MCOperandInfo OperandInfo156[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3868
static const MCOperandInfo OperandInfo157[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3869
static const MCOperandInfo OperandInfo158[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3870
static const MCOperandInfo OperandInfo159[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3871
static const MCOperandInfo OperandInfo160[] = { { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3872
static const MCOperandInfo OperandInfo161[] = { { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3873
static const MCOperandInfo OperandInfo162[] = { { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3874
static const MCOperandInfo OperandInfo163[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3875
static const MCOperandInfo OperandInfo164[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3876
static const MCOperandInfo OperandInfo165[] = { { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3877
static const MCOperandInfo OperandInfo166[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3878
static const MCOperandInfo OperandInfo167[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, };
3879
static const MCOperandInfo OperandInfo168[] = { { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3880
static const MCOperandInfo OperandInfo169[] = { { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, };
3881
static const MCOperandInfo OperandInfo170[] = { { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3882
static const MCOperandInfo OperandInfo171[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3883
static const MCOperandInfo OperandInfo172[] = { { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3884
static const MCOperandInfo OperandInfo173[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3885
static const MCOperandInfo OperandInfo174[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3886
static const MCOperandInfo OperandInfo175[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3887
static const MCOperandInfo OperandInfo176[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3888
static const MCOperandInfo OperandInfo177[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, };
3889
static const MCOperandInfo OperandInfo178[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3890
static const MCOperandInfo OperandInfo179[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3891
static const MCOperandInfo OperandInfo180[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3892
static const MCOperandInfo OperandInfo181[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3893
static const MCOperandInfo OperandInfo182[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3894
static const MCOperandInfo OperandInfo183[] = { { SystemZ::AR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::AR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3895
static const MCOperandInfo OperandInfo184[] = { { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3896
static const MCOperandInfo OperandInfo185[] = { { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3897
static const MCOperandInfo OperandInfo186[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3898
static const MCOperandInfo OperandInfo187[] = { { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3899
static const MCOperandInfo OperandInfo188[] = { { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3900
static const MCOperandInfo OperandInfo189[] = { { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3901
static const MCOperandInfo OperandInfo190[] = { { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3902
static const MCOperandInfo OperandInfo191[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3903
static const MCOperandInfo OperandInfo192[] = { { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3904
static const MCOperandInfo OperandInfo193[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3905
static const MCOperandInfo OperandInfo194[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3906
static const MCOperandInfo OperandInfo195[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3907
static const MCOperandInfo OperandInfo196[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3908
static const MCOperandInfo OperandInfo197[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3909
static const MCOperandInfo OperandInfo198[] = { { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3910
static const MCOperandInfo OperandInfo199[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3911
static const MCOperandInfo OperandInfo200[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3912
static const MCOperandInfo OperandInfo201[] = { { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3913
static const MCOperandInfo OperandInfo202[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::AR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3914
static const MCOperandInfo OperandInfo203[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3915
static const MCOperandInfo OperandInfo204[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3916
static const MCOperandInfo OperandInfo205[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3917
static const MCOperandInfo OperandInfo206[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
3918
static const MCOperandInfo OperandInfo207[] = { { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3919
static const MCOperandInfo OperandInfo208[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3920
static const MCOperandInfo OperandInfo209[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3921
static const MCOperandInfo OperandInfo210[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3922
static const MCOperandInfo OperandInfo211[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3923
static const MCOperandInfo OperandInfo212[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3924
static const MCOperandInfo OperandInfo213[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3925
static const MCOperandInfo OperandInfo214[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3926
static const MCOperandInfo OperandInfo215[] = { { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3927
static const MCOperandInfo OperandInfo216[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3928
static const MCOperandInfo OperandInfo217[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3929
static const MCOperandInfo OperandInfo218[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3930
static const MCOperandInfo OperandInfo219[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3931
static const MCOperandInfo OperandInfo220[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3932
static const MCOperandInfo OperandInfo221[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3933
static const MCOperandInfo OperandInfo222[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3934
static const MCOperandInfo OperandInfo223[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3935
static const MCOperandInfo OperandInfo224[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3936
static const MCOperandInfo OperandInfo225[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3937
static const MCOperandInfo OperandInfo226[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3938
static const MCOperandInfo OperandInfo227[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3939
static const MCOperandInfo OperandInfo228[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3940
static const MCOperandInfo OperandInfo229[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3941
static const MCOperandInfo OperandInfo230[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3942
static const MCOperandInfo OperandInfo231[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3943
static const MCOperandInfo OperandInfo232[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3944
static const MCOperandInfo OperandInfo233[] = { { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
3945
static const MCOperandInfo OperandInfo234[] = { { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((2 << 16) | (1 << MCOI::TIED_TO)) }, };
3946
static const MCOperandInfo OperandInfo235[] = { { SystemZ::AR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::AR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3947
static const MCOperandInfo OperandInfo236[] = { { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3948
static const MCOperandInfo OperandInfo237[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3949
static const MCOperandInfo OperandInfo238[] = { { SystemZ::CR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::CR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3950
static const MCOperandInfo OperandInfo239[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3951
static const MCOperandInfo OperandInfo240[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3952
static const MCOperandInfo OperandInfo241[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3953
static const MCOperandInfo OperandInfo242[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3954
static const MCOperandInfo OperandInfo243[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3955
static const MCOperandInfo OperandInfo244[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3956
static const MCOperandInfo OperandInfo245[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3957
static const MCOperandInfo OperandInfo246[] = { { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3958
static const MCOperandInfo OperandInfo247[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3959
static const MCOperandInfo OperandInfo248[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3960
static const MCOperandInfo OperandInfo249[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3961
static const MCOperandInfo OperandInfo250[] = { { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3962
static const MCOperandInfo OperandInfo251[] = { { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3963
static const MCOperandInfo OperandInfo252[] = { { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3964
static const MCOperandInfo OperandInfo253[] = { { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3965
static const MCOperandInfo OperandInfo254[] = { { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3966
static const MCOperandInfo OperandInfo255[] = { { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3967
static const MCOperandInfo OperandInfo256[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3968
static const MCOperandInfo OperandInfo257[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3969
static const MCOperandInfo OperandInfo258[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3970
static const MCOperandInfo OperandInfo259[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3971
static const MCOperandInfo OperandInfo260[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3972
static const MCOperandInfo OperandInfo261[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3973
static const MCOperandInfo OperandInfo262[] = { { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3974
static const MCOperandInfo OperandInfo263[] = { { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3975
static const MCOperandInfo OperandInfo264[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3976
static const MCOperandInfo OperandInfo265[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3977
static const MCOperandInfo OperandInfo266[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3978
static const MCOperandInfo OperandInfo267[] = { { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3979
static const MCOperandInfo OperandInfo268[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3980
static const MCOperandInfo OperandInfo269[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3981
static const MCOperandInfo OperandInfo270[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3982
static const MCOperandInfo OperandInfo271[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3983
static const MCOperandInfo OperandInfo272[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3984
static const MCOperandInfo OperandInfo273[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3985
static const MCOperandInfo OperandInfo274[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3986
static const MCOperandInfo OperandInfo275[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3987
static const MCOperandInfo OperandInfo276[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3988
static const MCOperandInfo OperandInfo277[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3989
static const MCOperandInfo OperandInfo278[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3990
static const MCOperandInfo OperandInfo279[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3991
static const MCOperandInfo OperandInfo280[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3992
static const MCOperandInfo OperandInfo281[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3993
static const MCOperandInfo OperandInfo282[] = { { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3994
static const MCOperandInfo OperandInfo283[] = { { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3995
static const MCOperandInfo OperandInfo284[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3996
static const MCOperandInfo OperandInfo285[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3997
static const MCOperandInfo OperandInfo286[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3998
static const MCOperandInfo OperandInfo287[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3999
static const MCOperandInfo OperandInfo288[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
4000
static const MCOperandInfo OperandInfo289[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
4001
static const MCOperandInfo OperandInfo290[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4002
static const MCOperandInfo OperandInfo291[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
4003
static const MCOperandInfo OperandInfo292[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4004
static const MCOperandInfo OperandInfo293[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4005
static const MCOperandInfo OperandInfo294[] = { { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4006
static const MCOperandInfo OperandInfo295[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4007
static const MCOperandInfo OperandInfo296[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4008
static const MCOperandInfo OperandInfo297[] = { { SystemZ::AR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
4009
static const MCOperandInfo OperandInfo298[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4010
static const MCOperandInfo OperandInfo299[] = { { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4011
static const MCOperandInfo OperandInfo300[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4012
static const MCOperandInfo OperandInfo301[] = { { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4013
static const MCOperandInfo OperandInfo302[] = { { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4014
static const MCOperandInfo OperandInfo303[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4015
static const MCOperandInfo OperandInfo304[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4016
static const MCOperandInfo OperandInfo305[] = { { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4017
static const MCOperandInfo OperandInfo306[] = { { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4018
static const MCOperandInfo OperandInfo307[] = { { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4019
static const MCOperandInfo OperandInfo308[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4020
static const MCOperandInfo OperandInfo309[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
4021
static const MCOperandInfo OperandInfo310[] = { { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, };
4022
static const MCOperandInfo OperandInfo311[] = { { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4023
static const MCOperandInfo OperandInfo312[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4024
static const MCOperandInfo OperandInfo313[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, };
4025
static const MCOperandInfo OperandInfo314[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4026
static const MCOperandInfo OperandInfo315[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
4027
static const MCOperandInfo OperandInfo316[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4028
static const MCOperandInfo OperandInfo317[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
4029
static const MCOperandInfo OperandInfo318[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4030
static const MCOperandInfo OperandInfo319[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4031
static const MCOperandInfo OperandInfo320[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4032
static const MCOperandInfo OperandInfo321[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
4033
static const MCOperandInfo OperandInfo322[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4034
static const MCOperandInfo OperandInfo323[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4035
static const MCOperandInfo OperandInfo324[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4036
static const MCOperandInfo OperandInfo325[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4037
static const MCOperandInfo OperandInfo326[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4038
static const MCOperandInfo OperandInfo327[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4039
static const MCOperandInfo OperandInfo328[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4040
static const MCOperandInfo OperandInfo329[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4041
static const MCOperandInfo OperandInfo330[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4042
static const MCOperandInfo OperandInfo331[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4043
static const MCOperandInfo OperandInfo332[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4044
static const MCOperandInfo OperandInfo333[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4045
static const MCOperandInfo OperandInfo334[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4046
static const MCOperandInfo OperandInfo335[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4047
static const MCOperandInfo OperandInfo336[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4048
static const MCOperandInfo OperandInfo337[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4049
static const MCOperandInfo OperandInfo338[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4050
static const MCOperandInfo OperandInfo339[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4051
static const MCOperandInfo OperandInfo340[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4052
static const MCOperandInfo OperandInfo341[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4053
static const MCOperandInfo OperandInfo342[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4054
static const MCOperandInfo OperandInfo343[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4055
static const MCOperandInfo OperandInfo344[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4056
static const MCOperandInfo OperandInfo345[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4057
static const MCOperandInfo OperandInfo346[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4058
static const MCOperandInfo OperandInfo347[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4059
static const MCOperandInfo OperandInfo348[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
4060
static const MCOperandInfo OperandInfo349[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
4061
static const MCOperandInfo OperandInfo350[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4062
static const MCOperandInfo OperandInfo351[] = { { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4063
static const MCOperandInfo OperandInfo352[] = { { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
4064
static const MCOperandInfo OperandInfo353[] = { { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
4065
static const MCOperandInfo OperandInfo354[] = { { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4066
static const MCOperandInfo OperandInfo355[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
4067
static const MCOperandInfo OperandInfo356[] = { { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
4068
static const MCOperandInfo OperandInfo357[] = { { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4069
static const MCOperandInfo OperandInfo358[] = { { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4070
static const MCOperandInfo OperandInfo359[] = { { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
4071
static const MCOperandInfo OperandInfo360[] = { { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
4072
static const MCOperandInfo OperandInfo361[] = { { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4073
static const MCOperandInfo OperandInfo362[] = { { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4074
static const MCOperandInfo OperandInfo363[] = { { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4075
static const MCOperandInfo OperandInfo364[] = { { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4076
4077
extern const MCInstrDesc SystemZInsts[] = {
4078
  { 0,  1,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #0 = PHI
4079
  { 1,  0,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #1 = INLINEASM
4080
  { 2,  1,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr },  // Inst #2 = CFI_INSTRUCTION
4081
  { 3,  1,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr },  // Inst #3 = EH_LABEL
4082
  { 4,  1,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr },  // Inst #4 = GC_LABEL
4083
  { 5,  1,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr },  // Inst #5 = ANNOTATION_LABEL
4084
  { 6,  0,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #6 = KILL
4085
  { 7,  3,  1,  0,  29, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo4, -1 ,nullptr },  // Inst #7 = EXTRACT_SUBREG
4086
  { 8,  4,  1,  0,  30, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo5, -1 ,nullptr },  // Inst #8 = INSERT_SUBREG
4087
  { 9,  1,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #9 = IMPLICIT_DEF
4088
  { 10, 4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo6, -1 ,nullptr },  // Inst #10 = SUBREG_TO_REG
4089
  { 11, 3,  1,  0,  28, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo4, -1 ,nullptr },  // Inst #11 = COPY_TO_REGCLASS
4090
  { 12, 0,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #12 = DBG_VALUE
4091
  { 13, 1,  0,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #13 = DBG_LABEL
4092
  { 14, 2,  1,  0,  31, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo7, -1 ,nullptr },  // Inst #14 = REG_SEQUENCE
4093
  { 15, 2,  1,  0,  28, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo7, -1 ,nullptr },  // Inst #15 = COPY
4094
  { 16, 0,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #16 = BUNDLE
4095
  { 17, 1,  0,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr },  // Inst #17 = LIFETIME_START
4096
  { 18, 1,  0,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr },  // Inst #18 = LIFETIME_END
4097
  { 19, 2,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo8, -1 ,nullptr },  // Inst #19 = STACKMAP
4098
  { 20, 1,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #20 = FENTRY_CALL
4099
  { 21, 6,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo9, -1 ,nullptr },  // Inst #21 = PATCHPOINT
4100
  { 22, 1,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x0ULL, nullptr, nullptr, OperandInfo10, -1 ,nullptr },  // Inst #22 = LOAD_STACK_GUARD
4101
  { 23, 0,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #23 = STATEPOINT
4102
  { 24, 2,  0,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo11, -1 ,nullptr },  // Inst #24 = LOCAL_ESCAPE
4103
  { 25, 1,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #25 = FAULTING_OP
4104
  { 26, 1,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #26 = PATCHABLE_OP
4105
  { 27, 0,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #27 = PATCHABLE_FUNCTION_ENTER
4106
  { 28, 0,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #28 = PATCHABLE_RET
4107
  { 29, 0,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #29 = PATCHABLE_FUNCTION_EXIT
4108
  { 30, 0,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #30 = PATCHABLE_TAIL_CALL
4109
  { 31, 2,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo11, -1 ,nullptr },  // Inst #31 = PATCHABLE_EVENT_CALL
4110
  { 32, 3,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr },  // Inst #32 = PATCHABLE_TYPED_EVENT_CALL
4111
  { 33, 1,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #33 = ICALL_BRANCH_FUNNEL
4112
  { 34, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #34 = G_ADD
4113
  { 35, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #35 = G_SUB
4114
  { 36, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #36 = G_MUL
4115
  { 37, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #37 = G_SDIV
4116
  { 38, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #38 = G_UDIV
4117
  { 39, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #39 = G_SREM
4118
  { 40, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #40 = G_UREM
4119
  { 41, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #41 = G_AND
4120
  { 42, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #42 = G_OR
4121
  { 43, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #43 = G_XOR
4122
  { 44, 1,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo14, -1 ,nullptr },  // Inst #44 = G_IMPLICIT_DEF
4123
  { 45, 1,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, OperandInfo14, -1 ,nullptr },  // Inst #45 = G_PHI
4124
  { 46, 2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo15, -1 ,nullptr },  // Inst #46 = G_FRAME_INDEX
4125
  { 47, 2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo15, -1 ,nullptr },  // Inst #47 = G_GLOBAL_VALUE
4126
  { 48, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo16, -1 ,nullptr },  // Inst #48 = G_EXTRACT
4127
  { 49, 2,  2,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #49 = G_UNMERGE_VALUES
4128
  { 50, 4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr },  // Inst #50 = G_INSERT
4129
  { 51, 2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #51 = G_MERGE_VALUES
4130
  { 52, 2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #52 = G_PTRTOINT
4131
  { 53, 2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #53 = G_INTTOPTR
4132
  { 54, 2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #54 = G_BITCAST
4133
  { 55, 2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr },  // Inst #55 = G_INTRINSIC_TRUNC
4134
  { 56, 2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr },  // Inst #56 = G_INTRINSIC_ROUND
4135
  { 57, 2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #57 = G_LOAD
4136
  { 58, 2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #58 = G_SEXTLOAD
4137
  { 59, 2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #59 = G_ZEXTLOAD
4138
  { 60, 2,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #60 = G_STORE
4139
  { 61, 5,  2,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo20, -1 ,nullptr },  // Inst #61 = G_ATOMIC_CMPXCHG_WITH_SUCCESS
4140
  { 62, 4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo21, -1 ,nullptr },  // Inst #62 = G_ATOMIC_CMPXCHG
4141
  { 63, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo22, -1 ,nullptr },  // Inst #63 = G_ATOMICRMW_XCHG
4142
  { 64, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo22, -1 ,nullptr },  // Inst #64 = G_ATOMICRMW_ADD
4143
  { 65, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo22, -1 ,nullptr },  // Inst #65 = G_ATOMICRMW_SUB
4144
  { 66, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo22, -1 ,nullptr },  // Inst #66 = G_ATOMICRMW_AND
4145
  { 67, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo22, -1 ,nullptr },  // Inst #67 = G_ATOMICRMW_NAND
4146
  { 68, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo22, -1 ,nullptr },  // Inst #68 = G_ATOMICRMW_OR
4147
  { 69, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo22, -1 ,nullptr },  // Inst #69 = G_ATOMICRMW_XOR
4148
  { 70, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo22, -1 ,nullptr },  // Inst #70 = G_ATOMICRMW_MAX
4149
  { 71, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo22, -1 ,nullptr },  // Inst #71 = G_ATOMICRMW_MIN
4150
  { 72, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo22, -1 ,nullptr },  // Inst #72 = G_ATOMICRMW_UMAX
4151
  { 73, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo22, -1 ,nullptr },  // Inst #73 = G_ATOMICRMW_UMIN
4152
  { 74, 2,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo15, -1 ,nullptr },  // Inst #74 = G_BRCOND
4153
  { 75, 1,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo14, -1 ,nullptr },  // Inst #75 = G_BRINDIRECT
4154
  { 76, 1,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #76 = G_INTRINSIC
4155
  { 77, 1,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #77 = G_INTRINSIC_W_SIDE_EFFECTS
4156
  { 78, 2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #78 = G_ANYEXT
4157
  { 79, 2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #79 = G_TRUNC
4158
  { 80, 2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo15, -1 ,nullptr },  // Inst #80 = G_CONSTANT
4159
  { 81, 2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo15, -1 ,nullptr },  // Inst #81 = G_FCONSTANT
4160
  { 82, 1,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo14, -1 ,nullptr },  // Inst #82 = G_VASTART
4161
  { 83, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo16, -1 ,nullptr },  // Inst #83 = G_VAARG
4162
  { 84, 2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #84 = G_SEXT
4163
  { 85, 2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #85 = G_ZEXT
4164
  { 86, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #86 = G_SHL
4165
  { 87, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #87 = G_LSHR
4166
  { 88, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #88 = G_ASHR
4167
  { 89, 4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo23, -1 ,nullptr },  // Inst #89 = G_ICMP
4168
  { 90, 4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo23, -1 ,nullptr },  // Inst #90 = G_FCMP
4169
  { 91, 4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo21, -1 ,nullptr },  // Inst #91 = G_SELECT
4170
  { 92, 4,  2,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo21, -1 ,nullptr },  // Inst #92 = G_UADDO
4171
  { 93, 5,  2,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo24, -1 ,nullptr },  // Inst #93 = G_UADDE
4172
  { 94, 4,  2,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo21, -1 ,nullptr },  // Inst #94 = G_USUBO
4173
  { 95, 5,  2,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo24, -1 ,nullptr },  // Inst #95 = G_USUBE
4174
  { 96, 4,  2,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo21, -1 ,nullptr },  // Inst #96 = G_SADDO
4175
  { 97, 5,  2,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo24, -1 ,nullptr },  // Inst #97 = G_SADDE
4176
  { 98, 4,  2,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo21, -1 ,nullptr },  // Inst #98 = G_SSUBO
4177
  { 99, 5,  2,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo24, -1 ,nullptr },  // Inst #99 = G_SSUBE
4178
  { 100,  4,  2,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo21, -1 ,nullptr },  // Inst #100 = G_UMULO
4179
  { 101,  4,  2,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo21, -1 ,nullptr },  // Inst #101 = G_SMULO
4180
  { 102,  3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #102 = G_UMULH
4181
  { 103,  3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #103 = G_SMULH
4182
  { 104,  3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #104 = G_FADD
4183
  { 105,  3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #105 = G_FSUB
4184
  { 106,  3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #106 = G_FMUL
4185
  { 107,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo25, -1 ,nullptr },  // Inst #107 = G_FMA
4186
  { 108,  3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #108 = G_FDIV
4187
  { 109,  3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #109 = G_FREM
4188
  { 110,  3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #110 = G_FPOW
4189
  { 111,  2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr },  // Inst #111 = G_FEXP
4190
  { 112,  2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr },  // Inst #112 = G_FEXP2
4191
  { 113,  2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr },  // Inst #113 = G_FLOG
4192
  { 114,  2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr },  // Inst #114 = G_FLOG2
4193
  { 115,  2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr },  // Inst #115 = G_FNEG
4194
  { 116,  2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #116 = G_FPEXT
4195
  { 117,  2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #117 = G_FPTRUNC
4196
  { 118,  2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #118 = G_FPTOSI
4197
  { 119,  2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #119 = G_FPTOUI
4198
  { 120,  2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #120 = G_SITOFP
4199
  { 121,  2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #121 = G_UITOFP
4200
  { 122,  2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr },  // Inst #122 = G_FABS
4201
  { 123,  3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo26, -1 ,nullptr },  // Inst #123 = G_GEP
4202
  { 124,  3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo27, -1 ,nullptr },  // Inst #124 = G_PTR_MASK
4203
  { 125,  1,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #125 = G_BR
4204
  { 126,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo28, -1 ,nullptr },  // Inst #126 = G_INSERT_VECTOR_ELT
4205
  { 127,  3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo29, -1 ,nullptr },  // Inst #127 = G_EXTRACT_VECTOR_ELT
4206
  { 128,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo30, -1 ,nullptr },  // Inst #128 = G_SHUFFLE_VECTOR
4207
  { 129,  2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr },  // Inst #129 = G_CTTZ
4208
  { 130,  2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr },  // Inst #130 = G_CTTZ_ZERO_UNDEF
4209
  { 131,  2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr },  // Inst #131 = G_CTLZ
4210
  { 132,  2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr },  // Inst #132 = G_CTLZ_ZERO_UNDEF
4211
  { 133,  2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr },  // Inst #133 = G_CTPOP
4212
  { 134,  2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr },  // Inst #134 = G_BSWAP
4213
  { 135,  2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #135 = G_ADDRSPACE_CAST
4214
  { 136,  2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo15, -1 ,nullptr },  // Inst #136 = G_BLOCK_ADDR
4215
  { 137,  2,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo8, -1 ,nullptr },  // Inst #137 = ADJCALLSTACKDOWN
4216
  { 138,  2,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo8, -1 ,nullptr },  // Inst #138 = ADJCALLSTACKUP
4217
  { 139,  4,  1,  0,  1,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo31, -1 ,nullptr },  // Inst #139 = ADJDYNALLOC
4218
  { 140,  2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr },  // Inst #140 = AEXT128
4219
  { 141,  3,  1,  0,  103,  0|(1ULL<<MCID::Pseudo), 0x23c00ULL, nullptr, ImplicitList1, OperandInfo33, -1 ,nullptr },  // Inst #141 = AFIMux
4220
  { 142,  3,  1,  0,  109,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x23c00ULL, nullptr, ImplicitList1, OperandInfo33, -1 ,nullptr },  // Inst #142 = AHIMux
4221
  { 143,  3,  1,  0,  109,  0|(1ULL<<MCID::Pseudo), 0x23c00ULL, nullptr, ImplicitList1, OperandInfo34, -1 ,nullptr },  // Inst #143 = AHIMuxK
4222
  { 144,  8,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo35, -1 ,nullptr },  // Inst #144 = ATOMIC_CMP_SWAPW
4223
  { 145,  7,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo36, -1 ,nullptr },  // Inst #145 = ATOMIC_LOADW_AFI
4224
  { 146,  7,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo37, -1 ,nullptr },  // Inst #146 = ATOMIC_LOADW_AR
4225
  { 147,  7,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo37, -1 ,nullptr },  // Inst #147 = ATOMIC_LOADW_MAX
4226
  { 148,  7,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo37, -1 ,nullptr },  // Inst #148 = ATOMIC_LOADW_MIN
4227
  { 149,  7,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo36, -1 ,nullptr },  // Inst #149 = ATOMIC_LOADW_NILH
4228
  { 150,  7,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo36, -1 ,nullptr },  // Inst #150 = ATOMIC_LOADW_NILHi
4229
  { 151,  7,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo37, -1 ,nullptr },  // Inst #151 = ATOMIC_LOADW_NR
4230
  { 152,  7,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo37, -1 ,nullptr },  // Inst #152 = ATOMIC_LOADW_NRi
4231
  { 153,  7,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo36, -1 ,nullptr },  // Inst #153 = ATOMIC_LOADW_OILH
4232
  { 154,  7,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo37, -1 ,nullptr },  // Inst #154 = ATOMIC_LOADW_OR
4233
  { 155,  7,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo37, -1 ,nullptr },  // Inst #155 = ATOMIC_LOADW_SR
4234
  { 156,  7,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo37, -1 ,nullptr },  // Inst #156 = ATOMIC_LOADW_UMAX
4235
  { 157,  7,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo37, -1 ,nullptr },  // Inst #157 = ATOMIC_LOADW_UMIN
4236
  { 158,  7,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo36, -1 ,nullptr },  // Inst #158 = ATOMIC_LOADW_XILF
4237
  { 159,  7,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo37, -1 ,nullptr },  // Inst #159 = ATOMIC_LOADW_XR
4238
  { 160,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo38, -1 ,nullptr },  // Inst #160 = ATOMIC_LOAD_AFI
4239
  { 161,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr },  // Inst #161 = ATOMIC_LOAD_AGFI
4240
  { 162,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr },  // Inst #162 = ATOMIC_LOAD_AGHI
4241
  { 163,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo40, -1 ,nullptr },  // Inst #163 = ATOMIC_LOAD_AGR
4242
  { 164,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo38, -1 ,nullptr },  // Inst #164 = ATOMIC_LOAD_AHI
4243
  { 165,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo41, -1 ,nullptr },  // Inst #165 = ATOMIC_LOAD_AR
4244
  { 166,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo41, -1 ,nullptr },  // Inst #166 = ATOMIC_LOAD_MAX_32
4245
  { 167,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo40, -1 ,nullptr },  // Inst #167 = ATOMIC_LOAD_MAX_64
4246
  { 168,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo41, -1 ,nullptr },  // Inst #168 = ATOMIC_LOAD_MIN_32
4247
  { 169,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo40, -1 ,nullptr },  // Inst #169 = ATOMIC_LOAD_MIN_64
4248
  { 170,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo40, -1 ,nullptr },  // Inst #170 = ATOMIC_LOAD_NGR
4249
  { 171,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo40, -1 ,nullptr },  // Inst #171 = ATOMIC_LOAD_NGRi
4250
  { 172,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr },  // Inst #172 = ATOMIC_LOAD_NIHF64
4251
  { 173,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr },  // Inst #173 = ATOMIC_LOAD_NIHF64i
4252
  { 174,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr },  // Inst #174 = ATOMIC_LOAD_NIHH64
4253
  { 175,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr },  // Inst #175 = ATOMIC_LOAD_NIHH64i
4254
  { 176,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr },  // Inst #176 = ATOMIC_LOAD_NIHL64
4255
  { 177,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr },  // Inst #177 = ATOMIC_LOAD_NIHL64i
4256
  { 178,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo38, -1 ,nullptr },  // Inst #178 = ATOMIC_LOAD_NILF
4257
  { 179,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr },  // Inst #179 = ATOMIC_LOAD_NILF64
4258
  { 180,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr },  // Inst #180 = ATOMIC_LOAD_NILF64i
4259
  { 181,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo38, -1 ,nullptr },  // Inst #181 = ATOMIC_LOAD_NILFi
4260
  { 182,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo38, -1 ,nullptr },  // Inst #182 = ATOMIC_LOAD_NILH
4261
  { 183,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr },  // Inst #183 = ATOMIC_LOAD_NILH64
4262
  { 184,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr },  // Inst #184 = ATOMIC_LOAD_NILH64i
4263
  { 185,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo38, -1 ,nullptr },  // Inst #185 = ATOMIC_LOAD_NILHi
4264
  { 186,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo38, -1 ,nullptr },  // Inst #186 = ATOMIC_LOAD_NILL
4265
  { 187,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr },  // Inst #187 = ATOMIC_LOAD_NILL64
4266
  { 188,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr },  // Inst #188 = ATOMIC_LOAD_NILL64i
4267
  { 189,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo38, -1 ,nullptr },  // Inst #189 = ATOMIC_LOAD_NILLi
4268
  { 190,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo41, -1 ,nullptr },  // Inst #190 = ATOMIC_LOAD_NR
4269
  { 191,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo41, -1 ,nullptr },  // Inst #191 = ATOMIC_LOAD_NRi
4270
  { 192,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo40, -1 ,nullptr },  // Inst #192 = ATOMIC_LOAD_OGR
4271
  { 193,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr },  // Inst #193 = ATOMIC_LOAD_OIHF64
4272
  { 194,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr },  // Inst #194 = ATOMIC_LOAD_OIHH64
4273
  { 195,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr },  // Inst #195 = ATOMIC_LOAD_OIHL64
4274
  { 196,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo38, -1 ,nullptr },  // Inst #196 = ATOMIC_LOAD_OILF
4275
  { 197,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr },  // Inst #197 = ATOMIC_LOAD_OILF64
4276
  { 198,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo38, -1 ,nullptr },  // Inst #198 = ATOMIC_LOAD_OILH
4277
  { 199,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr },  // Inst #199 = ATOMIC_LOAD_OILH64
4278
  { 200,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo38, -1 ,nullptr },  // Inst #200 = ATOMIC_LOAD_OILL
4279
  { 201,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr },  // Inst #201 = ATOMIC_LOAD_OILL64
4280
  { 202,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo41, -1 ,nullptr },  // Inst #202 = ATOMIC_LOAD_OR
4281
  { 203,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo40, -1 ,nullptr },  // Inst #203 = ATOMIC_LOAD_SGR
4282
  { 204,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo41, -1 ,nullptr },  // Inst #204 = ATOMIC_LOAD_SR
4283
  { 205,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo41, -1 ,nullptr },  // Inst #205 = ATOMIC_LOAD_UMAX_32
4284
  { 206,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo40, -1 ,nullptr },  // Inst #206 = ATOMIC_LOAD_UMAX_64
4285
  { 207,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo41, -1 ,nullptr },  // Inst #207 = ATOMIC_LOAD_UMIN_32
4286
  { 208,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo40, -1 ,nullptr },  // Inst #208 = ATOMIC_LOAD_UMIN_64
4287
  { 209,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo40, -1 ,nullptr },  // Inst #209 = ATOMIC_LOAD_XGR
4288
  { 210,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr },  // Inst #210 = ATOMIC_LOAD_XIHF64
4289
  { 211,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo38, -1 ,nullptr },  // Inst #211 = ATOMIC_LOAD_XILF
4290
  { 212,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr },  // Inst #212 = ATOMIC_LOAD_XILF64
4291
  { 213,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo41, -1 ,nullptr },  // Inst #213 = ATOMIC_LOAD_XR
4292
  { 214,  7,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo37, -1 ,nullptr },  // Inst #214 = ATOMIC_SWAPW
4293
  { 215,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo41, -1 ,nullptr },  // Inst #215 = ATOMIC_SWAP_32
4294
  { 216,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo40, -1 ,nullptr },  // Inst #216 = ATOMIC_SWAP_64
4295
  { 217,  2,  0,  0,  212,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x3800ULL, nullptr, ImplicitList1, OperandInfo42, -1 ,nullptr },  // Inst #217 = CFIMux
4296
  { 218,  3,  0,  6,  12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList2, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #218 = CGIBCall
4297
  { 219,  3,  0,  6,  12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #219 = CGIBReturn
4298
  { 220,  3,  0,  6,  12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList2, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #220 = CGRBCall
4299
  { 221,  3,  0,  6,  12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #221 = CGRBReturn
4300
  { 222,  2,  0,  0,  212,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x3800ULL, nullptr, ImplicitList1, OperandInfo42, -1 ,nullptr },  // Inst #222 = CHIMux
4301
  { 223,  3,  0,  6,  12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList2, nullptr, OperandInfo45, -1 ,nullptr },  // Inst #223 = CIBCall
4302
  { 224,  3,  0,  6,  12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo45, -1 ,nullptr },  // Inst #224 = CIBReturn
4303
  { 225,  6,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo46, -1 ,nullptr },  // Inst #225 = CLCLoop
4304
  { 226,  5,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo47, -1 ,nullptr },  // Inst #226 = CLCSequence
4305
  { 227,  2,  0,  0,  221,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x103800ULL, nullptr, ImplicitList1, OperandInfo42, -1 ,nullptr },  // Inst #227 = CLFIMux
4306
  { 228,  3,  0,  6,  12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList2, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #228 = CLGIBCall
4307
  { 229,  3,  0,  6,  12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #229 = CLGIBReturn
4308
  { 230,  3,  0,  6,  12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList2, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #230 = CLGRBCall
4309
  { 231,  3,  0,  6,  12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #231 = CLGRBReturn
4310
  { 232,  3,  0,  6,  12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList2, nullptr, OperandInfo45, -1 ,nullptr },  // Inst #232 = CLIBCall
4311
  { 233,  3,  0,  6,  12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo45, -1 ,nullptr },  // Inst #233 = CLIBReturn
4312
  { 234,  4,  0,  0,  219,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x10388cULL, nullptr, ImplicitList1, OperandInfo48, -1 ,nullptr },  // Inst #234 = CLMux
4313
  { 235,  3,  0,  6,  12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList2, nullptr, OperandInfo49, -1 ,nullptr },  // Inst #235 = CLRBCall
4314
  { 236,  3,  0,  6,  12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo49, -1 ,nullptr },  // Inst #236 = CLRBReturn
4315
  { 237,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo50, -1 ,nullptr },  // Inst #237 = CLSTLoop
4316
  { 238,  4,  0,  0,  210,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x388cULL, nullptr, ImplicitList1, OperandInfo48, -1 ,nullptr },  // Inst #238 = CMux
4317
  { 239,  3,  0,  6,  12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList2, nullptr, OperandInfo49, -1 ,nullptr },  // Inst #239 = CRBCall
4318
  { 240,  3,  0,  6,  12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo49, -1 ,nullptr },  // Inst #240 = CRBReturn
4319
  { 241,  1,  0,  2,  20, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, ImplicitList3, OperandInfo51, -1 ,nullptr },  // Inst #241 = CallBASR
4320
  { 242,  2,  0,  2,  4,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x40000ULL, ImplicitList2, nullptr, OperandInfo7, -1 ,nullptr },  // Inst #242 = CallBCR
4321
  { 243,  0,  0,  2,  5,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList2, nullptr, nullptr, -1 ,nullptr },  // Inst #243 = CallBR
4322
  { 244,  1,  0,  6,  19, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, ImplicitList3, OperandInfo2, -1 ,nullptr },  // Inst #244 = CallBRASL
4323
  { 245,  3,  0,  6,  2,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x40000ULL, nullptr, nullptr, OperandInfo52, -1 ,nullptr },  // Inst #245 = CallBRCL
4324
  { 246,  1,  0,  6,  3,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #246 = CallJG
4325
  { 247,  2,  0,  2,  23, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator), 0x40000ULL, ImplicitList1, nullptr, OperandInfo7, -1 ,nullptr },  // Inst #247 = CondReturn
4326
  { 248,  6,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #248 = CondStore16
4327
  { 249,  6,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #249 = CondStore16Inv
4328
  { 250,  6,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #250 = CondStore16Mux
4329
  { 251,  6,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #251 = CondStore16MuxInv
4330
  { 252,  6,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #252 = CondStore32
4331
  { 253,  6,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #253 = CondStore32Inv
4332
  { 254,  6,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #254 = CondStore32Mux
4333
  { 255,  6,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #255 = CondStore32MuxInv
4334
  { 256,  6,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo55, -1 ,nullptr },  // Inst #256 = CondStore64
4335
  { 257,  6,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo55, -1 ,nullptr },  // Inst #257 = CondStore64Inv
4336
  { 258,  6,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #258 = CondStore8
4337
  { 259,  6,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #259 = CondStore8Inv
4338
  { 260,  6,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #260 = CondStore8Mux
4339
  { 261,  6,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #261 = CondStore8MuxInv
4340
  { 262,  6,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo56, -1 ,nullptr },  // Inst #262 = CondStoreF32
4341
  { 263,  6,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo56, -1 ,nullptr },  // Inst #263 = CondStoreF32Inv
4342
  { 264,  6,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo57, -1 ,nullptr },  // Inst #264 = CondStoreF64
4343
  { 265,  6,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo57, -1 ,nullptr },  // Inst #265 = CondStoreF64Inv
4344
  { 266,  2,  0,  4,  13, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, nullptr, OperandInfo7, -1 ,nullptr },  // Inst #266 = CondTrap
4345
  { 267,  1,  1,  6,  84, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo58, -1 ,nullptr },  // Inst #267 = GOT
4346
  { 268,  2,  1,  0,  93, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo42, -1 ,nullptr },  // Inst #268 = IIFMux
4347
  { 269,  3,  1,  6,  94, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo59, -1 ,nullptr },  // Inst #269 = IIHF64
4348
  { 270,  3,  1,  4,  95, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo59, -1 ,nullptr },  // Inst #270 = IIHH64
4349
  { 271,  3,  1,  4,  96, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo59, -1 ,nullptr },  // Inst #271 = IIHL64
4350
  { 272,  3,  1,  0,  93, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo33, -1 ,nullptr },  // Inst #272 = IIHMux
4351
  { 273,  3,  1,  6,  97, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo59, -1 ,nullptr },  // Inst #273 = IILF64
4352
  { 274,  3,  1,  4,  98, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo59, -1 ,nullptr },  // Inst #274 = IILH64
4353
  { 275,  3,  1,  4,  99, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo59, -1 ,nullptr },  // Inst #275 = IILL64
4354
  { 276,  3,  1,  0,  93, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo33, -1 ,nullptr },  // Inst #276 = IILMux
4355
  { 277,  4,  1,  0,  35, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x1dULL, nullptr, nullptr, OperandInfo60, -1 ,nullptr },  // Inst #277 = L128
4356
  { 278,  4,  1,  0,  58, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x2cULL, nullptr, nullptr, OperandInfo48, -1 ,nullptr },  // Inst #278 = LBMux
4357
  { 279,  2,  1,  6,  692,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo61, -1 ,nullptr },  // Inst #279 = LEFR
4358
  { 280,  2,  1,  6,  693,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo62, -1 ,nullptr },  // Inst #280 = LFER
4359
  { 281,  2,  1,  0,  39, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo42, -1 ,nullptr },  // Inst #281 = LHIMux
4360
  { 282,  4,  1,  0,  60, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x4cULL, nullptr, nullptr, OperandInfo48, -1 ,nullptr },  // Inst #282 = LHMux
4361
  { 283,  4,  1,  0,  66, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x2cULL, nullptr, nullptr, OperandInfo48, -1 ,nullptr },  // Inst #283 = LLCMux
4362
  { 284,  2,  1,  0,  63, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo63, -1 ,nullptr },  // Inst #284 = LLCRMux
4363
  { 285,  4,  1,  0,  67, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x4cULL, nullptr, nullptr, OperandInfo48, -1 ,nullptr },  // Inst #285 = LLHMux
4364
  { 286,  2,  1,  0,  64, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo63, -1 ,nullptr },  // Inst #286 = LLHRMux
4365
  { 287,  4,  1,  0,  32, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x8dULL, nullptr, nullptr, OperandInfo48, -1 ,nullptr },  // Inst #287 = LMux
4366
  { 288,  5,  1,  0,  51, 0|(1ULL<<MCID::Pseudo), 0x80000ULL, ImplicitList1, nullptr, OperandInfo64, -1 ,nullptr },  // Inst #288 = LOCHIMux
4367
  { 289,  6,  1,  0,  52, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80080ULL, ImplicitList1, nullptr, OperandInfo65, -1 ,nullptr },  // Inst #289 = LOCMux
4368
  { 290,  5,  1,  0,  49, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x80000ULL, ImplicitList1, nullptr, OperandInfo66, -1 ,nullptr },  // Inst #290 = LOCRMux
4369
  { 291,  2,  1,  0,  40, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo63, -1 ,nullptr },  // Inst #291 = LRMux
4370
  { 292,  2,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo67, -1 ,nullptr },  // Inst #292 = LTDBRCompare_VecPseudo
4371
  { 293,  2,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo68, -1 ,nullptr },  // Inst #293 = LTEBRCompare_VecPseudo
4372
  { 294,  2,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo69, -1 ,nullptr },  // Inst #294 = LTXBRCompare_VecPseudo
4373
  { 295,  4,  1,  0,  341,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x1dULL, nullptr, nullptr, OperandInfo70, -1 ,nullptr },  // Inst #295 = LX
4374
  { 296,  6,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo46, -1 ,nullptr },  // Inst #296 = MVCLoop
4375
  { 297,  5,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo47, -1 ,nullptr },  // Inst #297 = MVCSequence
4376
  { 298,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo50, -1 ,nullptr },  // Inst #298 = MVSTLoop
4377
  { 299,  0,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #299 = MemBarrier
4378
  { 300,  6,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo46, -1 ,nullptr },  // Inst #300 = NCLoop
4379
  { 301,  5,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo47, -1 ,nullptr },  // Inst #301 = NCSequence
4380
  { 302,  3,  1,  0,  143,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x23000ULL, nullptr, ImplicitList1, OperandInfo33, -1 ,nullptr },  // Inst #302 = NIFMux
4381
  { 303,  3,  1,  6,  145,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL, nullptr, ImplicitList1, OperandInfo59, -1 ,nullptr },  // Inst #303 = NIHF64
4382
  { 304,  3,  1,  4,  146,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL, nullptr, ImplicitList1, OperandInfo59, -1 ,nullptr },  // Inst #304 = NIHH64
4383
  { 305,  3,  1,  4,  147,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL, nullptr, ImplicitList1, OperandInfo59, -1 ,nullptr },  // Inst #305 = NIHL64
4384
  { 306,  3,  1,  0,  143,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL, nullptr, ImplicitList1, OperandInfo33, -1 ,nullptr },  // Inst #306 = NIHMux
4385
  { 307,  3,  1,  6,  148,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL, nullptr, ImplicitList1, OperandInfo59, -1 ,nullptr },  // Inst #307 = NILF64
4386
  { 308,  3,  1,  4,  149,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL, nullptr, ImplicitList1, OperandInfo59, -1 ,nullptr },  // Inst #308 = NILH64
4387
  { 309,  3,  1,  4,  150,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL, nullptr, ImplicitList1, OperandInfo59, -1 ,nullptr },  // Inst #309 = NILL64
4388
  { 310,  3,  1,  0,  143,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL, nullptr, ImplicitList1, OperandInfo33, -1 ,nullptr },  // Inst #310 = NILMux
4389
  { 311,  6,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo46, -1 ,nullptr },  // Inst #311 = OCLoop
4390
  { 312,  5,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo47, -1 ,nullptr },  // Inst #312 = OCSequence
4391
  { 313,  3,  1,  0,  156,  0|(1ULL<<MCID::Pseudo), 0x23000ULL, nullptr, ImplicitList1, OperandInfo33, -1 ,nullptr },  // Inst #313 = OIFMux
4392
  { 314,  3,  1,  6,  157,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, ImplicitList1, OperandInfo59, -1 ,nullptr },  // Inst #314 = OIHF64
4393
  { 315,  3,  1,  4,  158,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, ImplicitList1, OperandInfo59, -1 ,nullptr },  // Inst #315 = OIHH64
4394
  { 316,  3,  1,  4,  159,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, ImplicitList1, OperandInfo59, -1 ,nullptr },  // Inst #316 = OIHL64
4395
  { 317,  3,  1,  0,  156,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, ImplicitList1, OperandInfo33, -1 ,nullptr },  // Inst #317 = OIHMux
4396
  { 318,  3,  1,  6,  160,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, ImplicitList1, OperandInfo59, -1 ,nullptr },  // Inst #318 = OILF64
4397
  { 319,  3,  1,  4,  161,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, ImplicitList1, OperandInfo59, -1 ,nullptr },  // Inst #319 = OILH64
4398
  { 320,  3,  1,  4,  162,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, ImplicitList1, OperandInfo59, -1 ,nullptr },  // Inst #320 = OILL64
4399
  { 321,  3,  1,  0,  156,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, ImplicitList1, OperandInfo33, -1 ,nullptr },  // Inst #321 = OILMux
4400
  { 322,  3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, nullptr, OperandInfo71, -1 ,nullptr },  // Inst #322 = PAIR128
4401
  { 323,  6,  1,  6,  206,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr },  // Inst #323 = RISBHH
4402
  { 324,  6,  1,  6,  206,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo73, -1 ,nullptr },  // Inst #324 = RISBHL
4403
  { 325,  6,  1,  6,  207,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo74, -1 ,nullptr },  // Inst #325 = RISBLH
4404
  { 326,  6,  1,  6,  207,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo75, -1 ,nullptr },  // Inst #326 = RISBLL
4405
  { 327,  6,  1,  0,  208,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo76, -1 ,nullptr },  // Inst #327 = RISBMux
4406
  { 328,  0,  0,  2,  22, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #328 = Return
4407
  { 329,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo50, -1 ,nullptr },  // Inst #329 = SRSTLoop
4408
  { 330,  4,  0,  0,  46, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x1eULL, nullptr, nullptr, OperandInfo60, -1 ,nullptr },  // Inst #330 = ST128
4409
  { 331,  4,  0,  0,  73, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x2cULL, nullptr, nullptr, OperandInfo48, -1 ,nullptr },  // Inst #331 = STCMux
4410
  { 332,  4,  0,  0,  74, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x2cULL, nullptr, nullptr, OperandInfo48, -1 ,nullptr },  // Inst #332 = STHMux
4411
  { 333,  4,  0,  0,  47, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x8eULL, nullptr, nullptr, OperandInfo48, -1 ,nullptr },  // Inst #333 = STMux
4412
  { 334,  5,  0,  0,  53, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x80080ULL, ImplicitList1, nullptr, OperandInfo77, -1 ,nullptr },  // Inst #334 = STOCMux
4413
  { 335,  4,  0,  0,  343,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x1eULL, nullptr, nullptr, OperandInfo70, -1 ,nullptr },  // Inst #335 = STX
4414
  { 336,  5,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo78, -1 ,nullptr },  // Inst #336 = Select32
4415
  { 337,  5,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo79, -1 ,nullptr },  // Inst #337 = Select64
4416
  { 338,  5,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo80, -1 ,nullptr },  // Inst #338 = SelectF128
4417
  { 339,  5,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo81, -1 ,nullptr },  // Inst #339 = SelectF32
4418
  { 340,  5,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo82, -1 ,nullptr },  // Inst #340 = SelectF64
4419
  { 341,  5,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo83, -1 ,nullptr },  // Inst #341 = SelectVR128
4420
  { 342,  5,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #342 = SelectVR32
4421
  { 343,  5,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #343 = SelectVR64
4422
  { 344,  0,  0,  2,  259,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #344 = Serialize
4423
  { 345,  3,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo86, -1 ,nullptr },  // Inst #345 = TBEGIN_nofloat
4424
  { 346,  1,  0,  6,  21, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, ImplicitList3, OperandInfo2, -1 ,nullptr },  // Inst #346 = TLS_GDCALL
4425
  { 347,  1,  0,  6,  21, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, ImplicitList3, OperandInfo2, -1 ,nullptr },  // Inst #347 = TLS_LDCALL
4426
  { 348,  2,  0,  4,  250,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x0ULL, nullptr, ImplicitList1, OperandInfo87, -1 ,nullptr },  // Inst #348 = TMHH64
4427
  { 349,  2,  0,  4,  251,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x0ULL, nullptr, ImplicitList1, OperandInfo87, -1 ,nullptr },  // Inst #349 = TMHL64
4428
  { 350,  2,  0,  0,  249,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x0ULL, nullptr, ImplicitList1, OperandInfo42, -1 ,nullptr },  // Inst #350 = TMHMux
4429
  { 351,  2,  0,  4,  252,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x0ULL, nullptr, ImplicitList1, OperandInfo87, -1 ,nullptr },  // Inst #351 = TMLH64
4430
  { 352,  2,  0,  4,  253,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x0ULL, nullptr, ImplicitList1, OperandInfo87, -1 ,nullptr },  // Inst #352 = TMLL64
4431
  { 353,  2,  0,  0,  249,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x0ULL, nullptr, ImplicitList1, OperandInfo42, -1 ,nullptr },  // Inst #353 = TMLMux
4432
  { 354,  0,  0,  4,  13, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #354 = Trap
4433
  { 355,  4,  1,  6,  516,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo88, -1 ,nullptr },  // Inst #355 = VL32
4434
  { 356,  4,  1,  6,  516,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo89, -1 ,nullptr },  // Inst #356 = VL64
4435
  { 357,  2,  1,  6,  504,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo90, -1 ,nullptr },  // Inst #357 = VLR32
4436
  { 358,  2,  1,  6,  504,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo91, -1 ,nullptr },  // Inst #358 = VLR64
4437
  { 359,  3,  1,  6,  507,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo92, -1 ,nullptr },  // Inst #359 = VLVGP32
4438
  { 360,  4,  0,  6,  523,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo88, -1 ,nullptr },  // Inst #360 = VST32
4439
  { 361,  4,  0,  6,  523,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo89, -1 ,nullptr },  // Inst #361 = VST64
4440
  { 362,  6,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo46, -1 ,nullptr },  // Inst #362 = XCLoop
4441
  { 363,  5,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo47, -1 ,nullptr },  // Inst #363 = XCSequence
4442
  { 364,  3,  1,  0,  167,  0|(1ULL<<MCID::Pseudo), 0x23000ULL, nullptr, ImplicitList1, OperandInfo33, -1 ,nullptr },  // Inst #364 = XIFMux
4443
  { 365,  3,  1,  6,  169,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, ImplicitList1, OperandInfo59, -1 ,nullptr },  // Inst #365 = XIHF64
4444
  { 366,  3,  1,  6,  170,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, ImplicitList1, OperandInfo59, -1 ,nullptr },  // Inst #366 = XILF64
4445
  { 367,  2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr },  // Inst #367 = ZEXT128
4446
  { 368,  5,  1,  4,  100,  0|(1ULL<<MCID::MayLoad), 0x23c88ULL, nullptr, ImplicitList1, OperandInfo93, -1 ,nullptr },  // Inst #368 = A
4447
  { 369,  5,  1,  4,  422,  0|(1ULL<<MCID::MayLoad), 0x108ULL, nullptr, ImplicitList1, OperandInfo94, -1 ,nullptr },  // Inst #369 = AD
4448
  { 370,  5,  1,  6,  368,  0|(1ULL<<MCID::MayLoad), 0x3fd08ULL, nullptr, ImplicitList1, OperandInfo94, -1 ,nullptr },  // Inst #370 = ADB
4449
  { 371,  3,  1,  4,  369,  0|(1ULL<<MCID::Commutable), 0x3fc00ULL, nullptr, ImplicitList1, OperandInfo95, -1 ,nullptr },  // Inst #371 = ADBR
4450
  { 372,  3,  1,  2,  423,  0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, ImplicitList1, OperandInfo95, -1 ,nullptr },  // Inst #372 = ADR
4451
  { 373,  3,  1,  4,  482,  0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, ImplicitList1, OperandInfo96, -1 ,nullptr },  // Inst #373 = ADTR
4452
  { 374,  4,  1,  4,  482,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo97, -1 ,nullptr },  // Inst #374 = ADTRA
4453
  { 375,  5,  1,  4,  422,  0|(1ULL<<MCID::MayLoad), 0x88ULL, nullptr, ImplicitList1, OperandInfo98, -1 ,nullptr },  // Inst #375 = AE
4454
  { 376,  5,  1,  6,  368,  0|(1ULL<<MCID::MayLoad), 0x3fc88ULL, nullptr, ImplicitList1, OperandInfo98, -1 ,nullptr },  // Inst #376 = AEB
4455
  { 377,  3,  1,  4,  369,  0|(1ULL<<MCID::Commutable), 0x3fc00ULL, nullptr, ImplicitList1, OperandInfo99, -1 ,nullptr },  // Inst #377 = AEBR
4456
  { 378,  3,  1,  2,  423,  0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, ImplicitList1, OperandInfo99, -1 ,nullptr },  // Inst #378 = AER
4457
  { 379,  3,  1,  6,  103,  0, 0x23c00ULL, nullptr, ImplicitList1, OperandInfo100, -1 ,nullptr },  // Inst #379 = AFI
4458
  { 380,  5,  1,  6,  104,  0|(1ULL<<MCID::MayLoad), 0x23d0cULL, nullptr, ImplicitList1, OperandInfo101, -1 ,nullptr },  // Inst #380 = AG
4459
  { 381,  5,  1,  6,  806,  0|(1ULL<<MCID::MayLoad), 0x23c8cULL, nullptr, ImplicitList1, OperandInfo101, -1 ,nullptr },  // Inst #381 = AGF
4460
  { 382,  3,  1,  6,  105,  0, 0x23c00ULL, nullptr, ImplicitList1, OperandInfo59, -1 ,nullptr },  // Inst #382 = AGFI
4461
  { 383,  3,  1,  4,  125,  0, 0x23c00ULL, nullptr, ImplicitList1, OperandInfo102, -1 ,nullptr },  // Inst #383 = AGFR
4462
  { 384,  5,  1,  6,  124,  0|(1ULL<<MCID::MayLoad), 0x23c4cULL, nullptr, ImplicitList1, OperandInfo101, -1 ,nullptr },  // Inst #384 = AGH
4463
  { 385,  3,  1,  4,  106,  0|(1ULL<<MCID::ConvertibleTo3Addr), 0x23c00ULL, nullptr, ImplicitList1, OperandInfo59, -1 ,nullptr },  // Inst #385 = AGHI
4464
  { 386,  3,  1,  6,  106,  0, 0x23c00ULL, nullptr, ImplicitList1, OperandInfo44, -1 ,nullptr },  // Inst #386 = AGHIK
4465
  { 387,  3,  1,  4,  107,  0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x23c00ULL, nullptr, ImplicitList1, OperandInfo103, -1 ,nullptr },  // Inst #387 = AGR
4466
  { 388,  3,  1,  4,  107,  0|(1ULL<<MCID::Commutable), 0x23c00ULL, nullptr, ImplicitList1, OperandInfo104, -1 ,nullptr },  // Inst #388 = AGRK
4467
  { 389,  3,  0,  6,  121,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x23c04ULL, nullptr, ImplicitList1, OperandInfo86, -1 ,nullptr },  // Inst #389 = AGSI
4468
  { 390,  5,  1,  4,  101,  0|(1ULL<<MCID::MayLoad), 0x23c48ULL, nullptr, ImplicitList1, OperandInfo93, -1 ,nullptr },  // Inst #390 = AH
4469
  { 391,  3,  1,  4,  118,  0, 0x23c00ULL, nullptr, ImplicitList1, OperandInfo105, -1 ,nullptr },  // Inst #391 = AHHHR
4470
  { 392,  3,  1,  4,  119,  0, 0x23c00ULL, nullptr, ImplicitList1, OperandInfo106, -1 ,nullptr },  // Inst #392 = AHHLR
4471
  { 393,  3,  1,  4,  108,  0|(1ULL<<MCID::ConvertibleTo3Addr), 0x23c00ULL, nullptr, ImplicitList1, OperandInfo100, -1 ,nullptr },  // Inst #393 = AHI
4472
  { 394,  3,  1,  6,  108,  0, 0x23c00ULL, nullptr, ImplicitList1, OperandInfo49, -1 ,nullptr },  // Inst #394 = AHIK
4473
  { 395,  5,  1,  6,  101,  0|(1ULL<<MCID::MayLoad), 0x23c4cULL, nullptr, ImplicitList1, OperandInfo93, -1 ,nullptr },  // Inst #395 = AHY
4474
  { 396,  3,  1,  6,  102,  0, 0x23c00ULL, nullptr, ImplicitList1, OperandInfo107, -1 ,nullptr },  // Inst #396 = AIH
4475
  { 397,  5,  1,  4,  110,  0|(1ULL<<MCID::MayLoad), 0x88ULL, nullptr, ImplicitList1, OperandInfo93, -1 ,nullptr },  // Inst #397 = AL
4476
  { 398,  5,  1,  6,  122,  0|(1ULL<<MCID::MayLoad), 0x8cULL, ImplicitList1, ImplicitList1, OperandInfo93, -1 ,nullptr },  // Inst #398 = ALC
4477
  { 399,  5,  1,  6,  122,  0|(1ULL<<MCID::MayLoad), 0x10cULL, ImplicitList1, ImplicitList1, OperandInfo101, -1 ,nullptr },  // Inst #399 = ALCG
4478
  { 400,  3,  1,  4,  123,  0, 0x0ULL, ImplicitList1, ImplicitList1, OperandInfo103, -1 ,nullptr },  // Inst #400 = ALCGR
4479
  { 401,  3,  1,  4,  123,  0, 0x0ULL, ImplicitList1, ImplicitList1, OperandInfo108, -1 ,nullptr },  // Inst #401 = ALCR
4480
  { 402,  3,  1,  6,  111,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo100, -1 ,nullptr },  // Inst #402 = ALFI
4481
  { 403,  5,  1,  6,  112,  0|(1ULL<<MCID::MayLoad), 0x10cULL, nullptr, ImplicitList1, OperandInfo101, -1 ,nullptr },  // Inst #403 = ALG
4482
  { 404,  5,  1,  6,  824,  0|(1ULL<<MCID::MayLoad), 0x8cULL, nullptr, ImplicitList1, OperandInfo101, -1 ,nullptr },  // Inst #404 = ALGF
4483
  { 405,  3,  1,  6,  114,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo59, -1 ,nullptr },  // Inst #405 = ALGFI
4484
  { 406,  3,  1,  4,  114,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo102, -1 ,nullptr },  // Inst #406 = ALGFR
4485
  { 407,  3,  1,  6,  113,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo44, -1 ,nullptr },  // Inst #407 = ALGHSIK
4486
  { 408,  3,  1,  4,  115,  0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, ImplicitList1, OperandInfo103, -1 ,nullptr },  // Inst #408 = ALGR
4487
  { 409,  3,  1,  4,  115,  0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, ImplicitList1, OperandInfo104, -1 ,nullptr },  // Inst #409 = ALGRK
4488
  { 410,  3,  0,  6,  121,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL, nullptr, ImplicitList1, OperandInfo86, -1 ,nullptr },  // Inst #410 = ALGSI
4489
  { 411,  3,  1,  4,  118,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo105, -1 ,nullptr },  // Inst #411 = ALHHHR
4490
  { 412,  3,  1,  4,  119,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo106, -1 ,nullptr },  // Inst #412 = ALHHLR
4491
  { 413,  3,  1,  6,  111,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo49, -1 ,nullptr },  // Inst #413 = ALHSIK
4492
  { 414,  3,  1,  2,  116,  0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, ImplicitList1, OperandInfo108, -1 ,nullptr },  // Inst #414 = ALR
4493
  { 415,  3,  1,  4,  116,  0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, ImplicitList1, OperandInfo109, -1 ,nullptr },  // Inst #415 = ALRK
4494
  { 416,  3,  0,  6,  823,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL, nullptr, ImplicitList1, OperandInfo86, -1 ,nullptr },  // Inst #416 = ALSI
4495
  { 417,  3,  1,  6,  120,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo107, -1 ,nullptr },  // Inst #417 = ALSIH
4496
  { 418,  3,  1,  6,  120,  0, 0x0ULL, nullptr, nullptr, OperandInfo107, -1 ,nullptr },  // Inst #418 = ALSIHN
4497
  { 419,  5,  1,  6,  110,  0|(1ULL<<MCID::MayLoad), 0x8cULL, nullptr, ImplicitList1, OperandInfo93, -1 ,nullptr },  // Inst #419 = ALY
4498
  { 420,  6,  0,  6,  296,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList1, OperandInfo110, -1 ,nullptr },  // Inst #420 = AP
4499
  { 421,  3,  1,  2,  117,  0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x23c00ULL, nullptr, ImplicitList1, OperandInfo108, -1 ,nullptr },  // Inst #421 = AR
4500
  { 422,  3,  1,  4,  117,  0|(1ULL<<MCID::Commutable), 0x23c00ULL, nullptr, ImplicitList1, OperandInfo109, -1 ,nullptr },  // Inst #422 = ARK
4501
  { 423,  3,  0,  6,  823,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x23c04ULL, nullptr, ImplicitList1, OperandInfo86, -1 ,nullptr },  // Inst #423 = ASI
4502
  { 424,  5,  1,  4,  422,  0|(1ULL<<MCID::MayLoad), 0x88ULL, nullptr, ImplicitList1, OperandInfo98, -1 ,nullptr },  // Inst #424 = AU
4503
  { 425,  3,  1,  2,  423,  0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, ImplicitList1, OperandInfo99, -1 ,nullptr },  // Inst #425 = AUR
4504
  { 426,  5,  1,  4,  422,  0|(1ULL<<MCID::MayLoad), 0x108ULL, nullptr, ImplicitList1, OperandInfo94, -1 ,nullptr },  // Inst #426 = AW
4505
  { 427,  3,  1,  2,  423,  0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, ImplicitList1, OperandInfo95, -1 ,nullptr },  // Inst #427 = AWR
4506
  { 428,  3,  1,  4,  370,  0|(1ULL<<MCID::Commutable), 0x3fc00ULL, nullptr, ImplicitList1, OperandInfo111, -1 ,nullptr },  // Inst #428 = AXBR
4507
  { 429,  3,  1,  2,  424,  0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, ImplicitList1, OperandInfo111, -1 ,nullptr },  // Inst #429 = AXR
4508
  { 430,  3,  1,  4,  483,  0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, ImplicitList1, OperandInfo112, -1 ,nullptr },  // Inst #430 = AXTR
4509
  { 431,  4,  1,  4,  483,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo113, -1 ,nullptr },  // Inst #431 = AXTRA
4510
  { 432,  5,  1,  6,  100,  0|(1ULL<<MCID::MayLoad), 0x23c8cULL, nullptr, ImplicitList1, OperandInfo93, -1 ,nullptr },  // Inst #432 = AY
4511
  { 433,  3,  0,  4,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x8ULL, nullptr, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #433 = B
4512
  { 434,  2,  0,  4,  767,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #434 = BAKR
4513
  { 435,  4,  0,  4,  308,  0|(1ULL<<MCID::Call), 0x8ULL, ImplicitList1, ImplicitList1, OperandInfo31, -1 ,nullptr },  // Inst #435 = BAL
4514
  { 436,  2,  0,  2,  308,  0|(1ULL<<MCID::Call), 0x0ULL, ImplicitList1, ImplicitList1, OperandInfo116, -1 ,nullptr },  // Inst #436 = BALR
4515
  { 437,  4,  0,  4,  20, 0|(1ULL<<MCID::Call), 0x8ULL, nullptr, ImplicitList1, OperandInfo31, -1 ,nullptr },  // Inst #437 = BAS
4516
  { 438,  2,  0,  2,  20, 0|(1ULL<<MCID::Call), 0x0ULL, nullptr, ImplicitList1, OperandInfo116, -1 ,nullptr },  // Inst #438 = BASR
4517
  { 439,  2,  0,  2,  312,  0|(1ULL<<MCID::Call), 0x0ULL, nullptr, ImplicitList1, OperandInfo116, -1 ,nullptr },  // Inst #439 = BASSM
4518
  { 440,  3,  0,  4,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #440 = BAsmE
4519
  { 441,  3,  0,  4,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #441 = BAsmH
4520
  { 442,  3,  0,  4,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #442 = BAsmHE
4521
  { 443,  3,  0,  4,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #443 = BAsmL
4522
  { 444,  3,  0,  4,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #444 = BAsmLE
4523
  { 445,  3,  0,  4,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #445 = BAsmLH
4524
  { 446,  3,  0,  4,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #446 = BAsmM
4525
  { 447,  3,  0,  4,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #447 = BAsmNE
4526
  { 448,  3,  0,  4,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #448 = BAsmNH
4527
  { 449,  3,  0,  4,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #449 = BAsmNHE
4528
  { 450,  3,  0,  4,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #450 = BAsmNL
4529
  { 451,  3,  0,  4,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #451 = BAsmNLE
4530
  { 452,  3,  0,  4,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #452 = BAsmNLH
4531
  { 453,  3,  0,  4,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #453 = BAsmNM
4532
  { 454,  3,  0,  4,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #454 = BAsmNO
4533
  { 455,  3,  0,  4,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #455 = BAsmNP
4534
  { 456,  3,  0,  4,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #456 = BAsmNZ
4535
  { 457,  3,  0,  4,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #457 = BAsmO
4536
  { 458,  3,  0,  4,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #458 = BAsmP
4537
  { 459,  3,  0,  4,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #459 = BAsmZ
4538
  { 460,  5,  0,  4,  4,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x40008ULL, ImplicitList1, nullptr, OperandInfo117, -1 ,nullptr },  // Inst #460 = BC
4539
  { 461,  4,  0,  4,  4,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo118, -1 ,nullptr },  // Inst #461 = BCAsm
4540
  { 462,  3,  0,  2,  4,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x40000ULL, ImplicitList1, nullptr, OperandInfo119, -1 ,nullptr },  // Inst #462 = BCR
4541
  { 463,  2,  0,  2,  4,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo120, -1 ,nullptr },  // Inst #463 = BCRAsm
4542
  { 464,  5,  1,  4,  9,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x8ULL, nullptr, nullptr, OperandInfo93, -1 ,nullptr },  // Inst #464 = BCT
4543
  { 465,  5,  1,  6,  9,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0xcULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr },  // Inst #465 = BCTG
4544
  { 466,  3,  1,  4,  9,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr },  // Inst #466 = BCTGR
4545
  { 467,  3,  1,  2,  9,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo121, -1 ,nullptr },  // Inst #467 = BCTR
4546
  { 468,  3,  0,  6,  6,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, nullptr, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #468 = BI
4547
  { 469,  3,  0,  6,  6,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #469 = BIAsmE
4548
  { 470,  3,  0,  6,  6,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #470 = BIAsmH
4549
  { 471,  3,  0,  6,  6,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #471 = BIAsmHE
4550
  { 472,  3,  0,  6,  6,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #472 = BIAsmL
4551
  { 473,  3,  0,  6,  6,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #473 = BIAsmLE
4552
  { 474,  3,  0,  6,  6,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #474 = BIAsmLH
4553
  { 475,  3,  0,  6,  6,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #475 = BIAsmM
4554
  { 476,  3,  0,  6,  6,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #476 = BIAsmNE
4555
  { 477,  3,  0,  6,  6,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #477 = BIAsmNH
4556
  { 478,  3,  0,  6,  6,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #478 = BIAsmNHE
4557
  { 479,  3,  0,  6,  6,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #479 = BIAsmNL
4558
  { 480,  3,  0,  6,  6,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #480 = BIAsmNLE
4559
  { 481,  3,  0,  6,  6,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #481 = BIAsmNLH
4560
  { 482,  3,  0,  6,  6,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #482 = BIAsmNM
4561
  { 483,  3,  0,  6,  6,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #483 = BIAsmNO
4562
  { 484,  3,  0,  6,  6,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #484 = BIAsmNP
4563
  { 485,  3,  0,  6,  6,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #485 = BIAsmNZ
4564
  { 486,  3,  0,  6,  6,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #486 = BIAsmO
4565
  { 487,  3,  0,  6,  6,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #487 = BIAsmP
4566
  { 488,  3,  0,  6,  6,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #488 = BIAsmZ
4567
  { 489,  5,  0,  6,  6,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0x4000cULL, ImplicitList1, nullptr, OperandInfo117, -1 ,nullptr },  // Inst #489 = BIC
4568
  { 490,  4,  0,  6,  6,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo118, -1 ,nullptr },  // Inst #490 = BICAsm
4569
  { 491,  5,  0,  6,  256,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo117, -1 ,nullptr },  // Inst #491 = BPP
4570
  { 492,  3,  0,  6,  257,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo52, -1 ,nullptr },  // Inst #492 = BPRP
4571
  { 493,  1,  0,  2,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #493 = BR
4572
  { 494,  3,  0,  4,  18, 0|(1ULL<<MCID::Call), 0x0ULL, nullptr, ImplicitList1, OperandInfo43, -1 ,nullptr },  // Inst #494 = BRAS
4573
  { 495,  3,  0,  6,  19, 0|(1ULL<<MCID::Call), 0x0ULL, nullptr, ImplicitList1, OperandInfo43, -1 ,nullptr },  // Inst #495 = BRASL
4574
  { 496,  1,  0,  2,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #496 = BRAsmE
4575
  { 497,  1,  0,  2,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #497 = BRAsmH
4576
  { 498,  1,  0,  2,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #498 = BRAsmHE
4577
  { 499,  1,  0,  2,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #499 = BRAsmL
4578
  { 500,  1,  0,  2,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #500 = BRAsmLE
4579
  { 501,  1,  0,  2,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #501 = BRAsmLH
4580
  { 502,  1,  0,  2,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #502 = BRAsmM
4581
  { 503,  1,  0,  2,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #503 = BRAsmNE
4582
  { 504,  1,  0,  2,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #504 = BRAsmNH
4583
  { 505,  1,  0,  2,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #505 = BRAsmNHE
4584
  { 506,  1,  0,  2,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #506 = BRAsmNL
4585
  { 507,  1,  0,  2,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #507 = BRAsmNLE
4586
  { 508,  1,  0,  2,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #508 = BRAsmNLH
4587
  { 509,  1,  0,  2,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #509 = BRAsmNM
4588
  { 510,  1,  0,  2,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #510 = BRAsmNO
4589
  { 511,  1,  0,  2,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #511 = BRAsmNP
4590
  { 512,  1,  0,  2,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #512 = BRAsmNZ
4591
  { 513,  1,  0,  2,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #513 = BRAsmO
4592
  { 514,  1,  0,  2,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #514 = BRAsmP
4593
  { 515,  1,  0,  2,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #515 = BRAsmZ
4594
  { 516,  3,  0,  4,  2,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x40000ULL, ImplicitList1, nullptr, OperandInfo52, -1 ,nullptr },  // Inst #516 = BRC
4595
  { 517,  2,  0,  4,  2,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo7, -1 ,nullptr },  // Inst #517 = BRCAsm
4596
  { 518,  3,  0,  6,  2,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x40000ULL, ImplicitList1, nullptr, OperandInfo52, -1 ,nullptr },  // Inst #518 = BRCL
4597
  { 519,  2,  0,  6,  2,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo7, -1 ,nullptr },  // Inst #519 = BRCLAsm
4598
  { 520,  3,  1,  4,  7,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo100, -1 ,nullptr },  // Inst #520 = BRCT
4599
  { 521,  3,  1,  4,  7,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo59, -1 ,nullptr },  // Inst #521 = BRCTG
4600
  { 522,  3,  1,  6,  8,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo107, -1 ,nullptr },  // Inst #522 = BRCTH
4601
  { 523,  4,  1,  4,  10, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo122, -1 ,nullptr },  // Inst #523 = BRXH
4602
  { 524,  4,  1,  6,  10, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo123, -1 ,nullptr },  // Inst #524 = BRXHG
4603
  { 525,  4,  1,  4,  10, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo122, -1 ,nullptr },  // Inst #525 = BRXLE
4604
  { 526,  4,  1,  6,  10, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo123, -1 ,nullptr },  // Inst #526 = BRXLG
4605
  { 527,  2,  1,  4,  765,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #527 = BSA
4606
  { 528,  2,  1,  4,  765,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #528 = BSG
4607
  { 529,  2,  0,  2,  311,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo116, -1 ,nullptr },  // Inst #529 = BSM
4608
  { 530,  5,  1,  4,  10, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo124, -1 ,nullptr },  // Inst #530 = BXH
4609
  { 531,  5,  1,  6,  10, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4ULL, nullptr, nullptr, OperandInfo125, -1 ,nullptr },  // Inst #531 = BXHG
4610
  { 532,  5,  1,  4,  10, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo124, -1 ,nullptr },  // Inst #532 = BXLE
4611
  { 533,  5,  1,  6,  10, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4ULL, nullptr, nullptr, OperandInfo125, -1 ,nullptr },  // Inst #533 = BXLEG
4612
  { 534,  4,  0,  4,  210,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3888ULL, nullptr, ImplicitList1, OperandInfo126, -1 ,nullptr },  // Inst #534 = C
4613
  { 535,  4,  0,  4,  446,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x108ULL, nullptr, ImplicitList1, OperandInfo127, -1 ,nullptr },  // Inst #535 = CD
4614
  { 536,  4,  0,  6,  387,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3d08ULL, nullptr, ImplicitList1, OperandInfo127, -1 ,nullptr },  // Inst #536 = CDB
4615
  { 537,  2,  0,  4,  388,  0|(1ULL<<MCID::Compare), 0x3c00ULL, nullptr, ImplicitList1, OperandInfo67, -1 ,nullptr },  // Inst #537 = CDBR
4616
  { 538,  2,  1,  4,  350,  0, 0x0ULL, nullptr, nullptr, OperandInfo128, -1 ,nullptr },  // Inst #538 = CDFBR
4617
  { 539,  4,  1,  4,  350,  0, 0x0ULL, nullptr, nullptr, OperandInfo129, -1 ,nullptr },  // Inst #539 = CDFBRA
4618
  { 540,  2,  1,  4,  408,  0, 0x0ULL, nullptr, nullptr, OperandInfo128, -1 ,nullptr },  // Inst #540 = CDFR
4619
  { 541,  4,  1,  4,  829,  0, 0x0ULL, nullptr, nullptr, OperandInfo129, -1 ,nullptr },  // Inst #541 = CDFTR
4620
  { 542,  2,  1,  4,  350,  0, 0x0ULL, nullptr, nullptr, OperandInfo130, -1 ,nullptr },  // Inst #542 = CDGBR
4621
  { 543,  4,  1,  4,  350,  0, 0x0ULL, nullptr, nullptr, OperandInfo131, -1 ,nullptr },  // Inst #543 = CDGBRA
4622
  { 544,  2,  1,  4,  408,  0, 0x0ULL, nullptr, nullptr, OperandInfo130, -1 ,nullptr },  // Inst #544 = CDGR
4623
  { 545,  2,  1,  4,  455,  0, 0x0ULL, nullptr, nullptr, OperandInfo130, -1 ,nullptr },  // Inst #545 = CDGTR
4624
  { 546,  4,  1,  4,  455,  0, 0x0ULL, nullptr, nullptr, OperandInfo131, -1 ,nullptr },  // Inst #546 = CDGTRA
4625
  { 547,  4,  1,  4,  352,  0, 0x0ULL, nullptr, nullptr, OperandInfo129, -1 ,nullptr },  // Inst #547 = CDLFBR
4626
  { 548,  4,  1,  4,  457,  0, 0x0ULL, nullptr, nullptr, OperandInfo129, -1 ,nullptr },  // Inst #548 = CDLFTR
4627
  { 549,  4,  1,  4,  352,  0, 0x0ULL, nullptr, nullptr, OperandInfo131, -1 ,nullptr },  // Inst #549 = CDLGBR
4628
  { 550,  4,  1,  4,  457,  0, 0x0ULL, nullptr, nullptr, OperandInfo131, -1 ,nullptr },  // Inst #550 = CDLGTR
4629
  { 551,  5,  1,  6,  471,  0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo132, -1 ,nullptr },  // Inst #551 = CDPT
4630
  { 552,  2,  0,  2,  447,  0|(1ULL<<MCID::Compare), 0x0ULL, nullptr, ImplicitList1, OperandInfo67, -1 ,nullptr },  // Inst #552 = CDR
4631
  { 553,  5,  1,  4,  267,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList1, OperandInfo133, -1 ,nullptr },  // Inst #553 = CDS
4632
  { 554,  5,  1,  6,  268,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL, nullptr, ImplicitList1, OperandInfo133, -1 ,nullptr },  // Inst #554 = CDSG
4633
  { 555,  2,  1,  4,  463,  0, 0x0ULL, nullptr, nullptr, OperandInfo130, -1 ,nullptr },  // Inst #555 = CDSTR
4634
  { 556,  5,  1,  6,  267,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL, nullptr, ImplicitList1, OperandInfo133, -1 ,nullptr },  // Inst #556 = CDSY
4635
  { 557,  2,  0,  4,  498,  0|(1ULL<<MCID::Compare), 0x0ULL, nullptr, ImplicitList1, OperandInfo67, -1 ,nullptr },  // Inst #557 = CDTR
4636
  { 558,  2,  1,  4,  463,  0, 0x0ULL, nullptr, nullptr, OperandInfo130, -1 ,nullptr },  // Inst #558 = CDUTR
4637
  { 559,  5,  1,  6,  467,  0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo132, -1 ,nullptr },  // Inst #559 = CDZT
4638
  { 560,  4,  0,  4,  446,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x88ULL, nullptr, ImplicitList1, OperandInfo134, -1 ,nullptr },  // Inst #560 = CE
4639
  { 561,  4,  0,  6,  387,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3c88ULL, nullptr, ImplicitList1, OperandInfo134, -1 ,nullptr },  // Inst #561 = CEB
4640
  { 562,  2,  0,  4,  388,  0|(1ULL<<MCID::Compare), 0x3c00ULL, nullptr, ImplicitList1, OperandInfo68, -1 ,nullptr },  // Inst #562 = CEBR
4641
  { 563,  2,  0,  4,  500,  0|(1ULL<<MCID::Compare), 0x0ULL, nullptr, ImplicitList1, OperandInfo67, -1 ,nullptr },  // Inst #563 = CEDTR
4642
  { 564,  2,  1,  4,  350,  0, 0x0ULL, nullptr, nullptr, OperandInfo135, -1 ,nullptr },  // Inst #564 = CEFBR
4643
  { 565,  4,  1,  4,  350,  0, 0x0ULL, nullptr, nullptr, OperandInfo136, -1 ,nullptr },  // Inst #565 = CEFBRA
4644
  { 566,  2,  1,  4,  408,  0, 0x0ULL, nullptr, nullptr, OperandInfo135, -1 ,nullptr },  // Inst #566 = CEFR
4645
  { 567,  2,  1,  4,  350,  0, 0x0ULL, nullptr, nullptr, OperandInfo137, -1 ,nullptr },  // Inst #567 = CEGBR
4646
  { 568,  4,  1,  4,  350,  0, 0x0ULL, nullptr, nullptr, OperandInfo138, -1 ,nullptr },  // Inst #568 = CEGBRA
4647
  { 569,  2,  1,  4,  408,  0, 0x0ULL, nullptr, nullptr, OperandInfo137, -1 ,nullptr },  // Inst #569 = CEGR
4648
  { 570,  4,  1,  4,  826,  0, 0x0ULL, nullptr, nullptr, OperandInfo136, -1 ,nullptr },  // Inst #570 = CELFBR
4649
  { 571,  4,  1,  4,  826,  0, 0x0ULL, nullptr, nullptr, OperandInfo138, -1 ,nullptr },  // Inst #571 = CELGBR
4650
  { 572,  2,  0,  2,  447,  0|(1ULL<<MCID::Compare), 0x0ULL, nullptr, ImplicitList1, OperandInfo68, -1 ,nullptr },  // Inst #572 = CER
4651
  { 573,  2,  0,  4,  501,  0|(1ULL<<MCID::Compare), 0x0ULL, nullptr, ImplicitList1, OperandInfo69, -1 ,nullptr },  // Inst #573 = CEXTR
4652
  { 574,  2,  0,  4,  323,  0|(1ULL<<MCID::MayLoad), 0x0ULL, ImplicitList4, ImplicitList5, OperandInfo139, -1 ,nullptr },  // Inst #574 = CFC
4653
  { 575,  3,  1,  4,  354,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo140, -1 ,nullptr },  // Inst #575 = CFDBR
4654
  { 576,  4,  1,  4,  354,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo141, -1 ,nullptr },  // Inst #576 = CFDBRA
4655
  { 577,  3,  1,  4,  410,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo140, -1 ,nullptr },  // Inst #577 = CFDR
4656
  { 578,  4,  1,  4,  832,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo141, -1 ,nullptr },  // Inst #578 = CFDTR
4657
  { 579,  3,  1,  4,  354,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo142, -1 ,nullptr },  // Inst #579 = CFEBR
4658
  { 580,  4,  1,  4,  354,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo143, -1 ,nullptr },  // Inst #580 = CFEBRA
4659
  { 581,  3,  1,  4,  410,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo142, -1 ,nullptr },  // Inst #581 = CFER
4660
  { 582,  2,  0,  6,  212,  0|(1ULL<<MCID::Compare), 0x3800ULL, nullptr, ImplicitList1, OperandInfo144, -1 ,nullptr },  // Inst #582 = CFI
4661
  { 583,  3,  1,  4,  355,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo145, -1 ,nullptr },  // Inst #583 = CFXBR
4662
  { 584,  4,  1,  4,  355,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo146, -1 ,nullptr },  // Inst #584 = CFXBRA
4663
  { 585,  3,  1,  4,  411,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo145, -1 ,nullptr },  // Inst #585 = CFXR
4664
  { 586,  4,  1,  4,  833,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo146, -1 ,nullptr },  // Inst #586 = CFXTR
4665
  { 587,  4,  0,  6,  210,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x390cULL, nullptr, ImplicitList1, OperandInfo31, -1 ,nullptr },  // Inst #587 = CG
4666
  { 588,  3,  1,  4,  354,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo147, -1 ,nullptr },  // Inst #588 = CGDBR
4667
  { 589,  4,  1,  4,  354,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo148, -1 ,nullptr },  // Inst #589 = CGDBRA
4668
  { 590,  3,  1,  4,  410,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo147, -1 ,nullptr },  // Inst #590 = CGDR
4669
  { 591,  3,  1,  4,  459,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo147, -1 ,nullptr },  // Inst #591 = CGDTR
4670
  { 592,  4,  1,  4,  459,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo148, -1 ,nullptr },  // Inst #592 = CGDTRA
4671
  { 593,  3,  1,  4,  354,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo149, -1 ,nullptr },  // Inst #593 = CGEBR
4672
  { 594,  4,  1,  4,  354,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo150, -1 ,nullptr },  // Inst #594 = CGEBRA
4673
  { 595,  3,  1,  4,  410,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo149, -1 ,nullptr },  // Inst #595 = CGER
4674
  { 596,  4,  0,  6,  242,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x388cULL, nullptr, ImplicitList1, OperandInfo31, -1 ,nullptr },  // Inst #596 = CGF
4675
  { 597,  2,  0,  6,  213,  0|(1ULL<<MCID::Compare), 0x3800ULL, nullptr, ImplicitList1, OperandInfo87, -1 ,nullptr },  // Inst #597 = CGFI
4676
  { 598,  2,  0,  4,  244,  0|(1ULL<<MCID::Compare), 0x3800ULL, nullptr, ImplicitList1, OperandInfo151, -1 ,nullptr },  // Inst #598 = CGFR
4677
  { 599,  2,  0,  6,  243,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3800ULL, nullptr, ImplicitList1, OperandInfo87, -1 ,nullptr },  // Inst #599 = CGFRL
4678
  { 600,  4,  0,  6,  239,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x384cULL, nullptr, ImplicitList1, OperandInfo31, -1 ,nullptr },  // Inst #600 = CGH
4679
  { 601,  2,  0,  4,  213,  0|(1ULL<<MCID::Compare), 0x3800ULL, nullptr, ImplicitList1, OperandInfo87, -1 ,nullptr },  // Inst #601 = CGHI
4680
  { 602,  2,  0,  6,  240,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3800ULL, nullptr, ImplicitList1, OperandInfo87, -1 ,nullptr },  // Inst #602 = CGHRL
4681
  { 603,  3,  0,  6,  214,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3800ULL, nullptr, ImplicitList1, OperandInfo86, -1 ,nullptr },  // Inst #603 = CGHSI
4682
  { 604,  5,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr },  // Inst #604 = CGIB
4683
  { 605,  5,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr },  // Inst #605 = CGIBAsm
4684
  { 606,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #606 = CGIBAsmE
4685
  { 607,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #607 = CGIBAsmH
4686
  { 608,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #608 = CGIBAsmHE
4687
  { 609,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #609 = CGIBAsmL
4688
  { 610,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #610 = CGIBAsmLE
4689
  { 611,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #611 = CGIBAsmLH
4690
  { 612,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #612 = CGIBAsmNE
4691
  { 613,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #613 = CGIBAsmNH
4692
  { 614,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #614 = CGIBAsmNHE
4693
  { 615,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #615 = CGIBAsmNL
4694
  { 616,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #616 = CGIBAsmNLE
4695
  { 617,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #617 = CGIBAsmNLH
4696
  { 618,  4,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo154, -1 ,nullptr },  // Inst #618 = CGIJ
4697
  { 619,  4,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo154, -1 ,nullptr },  // Inst #619 = CGIJAsm
4698
  { 620,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo43, -1 ,nullptr },  // Inst #620 = CGIJAsmE
4699
  { 621,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo43, -1 ,nullptr },  // Inst #621 = CGIJAsmH
4700
  { 622,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo43, -1 ,nullptr },  // Inst #622 = CGIJAsmHE
4701
  { 623,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo43, -1 ,nullptr },  // Inst #623 = CGIJAsmL
4702
  { 624,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo43, -1 ,nullptr },  // Inst #624 = CGIJAsmLE
4703
  { 625,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo43, -1 ,nullptr },  // Inst #625 = CGIJAsmLH
4704
  { 626,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo43, -1 ,nullptr },  // Inst #626 = CGIJAsmNE
4705
  { 627,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo43, -1 ,nullptr },  // Inst #627 = CGIJAsmNH
4706
  { 628,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo43, -1 ,nullptr },  // Inst #628 = CGIJAsmNHE
4707
  { 629,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo43, -1 ,nullptr },  // Inst #629 = CGIJAsmNL
4708
  { 630,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo43, -1 ,nullptr },  // Inst #630 = CGIJAsmNLE
4709
  { 631,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo43, -1 ,nullptr },  // Inst #631 = CGIJAsmNLH
4710
  { 632,  3,  0,  6,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #632 = CGIT
4711
  { 633,  3,  0,  6,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #633 = CGITAsm
4712
  { 634,  2,  0,  6,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo87, -1 ,nullptr },  // Inst #634 = CGITAsmE
4713
  { 635,  2,  0,  6,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo87, -1 ,nullptr },  // Inst #635 = CGITAsmH
4714
  { 636,  2,  0,  6,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo87, -1 ,nullptr },  // Inst #636 = CGITAsmHE
4715
  { 637,  2,  0,  6,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo87, -1 ,nullptr },  // Inst #637 = CGITAsmL
4716
  { 638,  2,  0,  6,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo87, -1 ,nullptr },  // Inst #638 = CGITAsmLE
4717
  { 639,  2,  0,  6,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo87, -1 ,nullptr },  // Inst #639 = CGITAsmLH
4718
  { 640,  2,  0,  6,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo87, -1 ,nullptr },  // Inst #640 = CGITAsmNE
4719
  { 641,  2,  0,  6,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo87, -1 ,nullptr },  // Inst #641 = CGITAsmNH
4720
  { 642,  2,  0,  6,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo87, -1 ,nullptr },  // Inst #642 = CGITAsmNHE
4721
  { 643,  2,  0,  6,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo87, -1 ,nullptr },  // Inst #643 = CGITAsmNL
4722
  { 644,  2,  0,  6,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo87, -1 ,nullptr },  // Inst #644 = CGITAsmNLE
4723
  { 645,  2,  0,  6,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo87, -1 ,nullptr },  // Inst #645 = CGITAsmNLH
4724
  { 646,  2,  0,  4,  215,  0|(1ULL<<MCID::Compare), 0x3800ULL, nullptr, ImplicitList1, OperandInfo115, -1 ,nullptr },  // Inst #646 = CGR
4725
  { 647,  5,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #647 = CGRB
4726
  { 648,  5,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #648 = CGRBAsm
4727
  { 649,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #649 = CGRBAsmE
4728
  { 650,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #650 = CGRBAsmH
4729
  { 651,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #651 = CGRBAsmHE
4730
  { 652,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #652 = CGRBAsmL
4731
  { 653,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #653 = CGRBAsmLE
4732
  { 654,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #654 = CGRBAsmLH
4733
  { 655,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #655 = CGRBAsmNE
4734
  { 656,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #656 = CGRBAsmNH
4735
  { 657,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #657 = CGRBAsmNHE
4736
  { 658,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #658 = CGRBAsmNL
4737
  { 659,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #659 = CGRBAsmNLE
4738
  { 660,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #660 = CGRBAsmNLH
4739
  { 661,  4,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo157, -1 ,nullptr },  // Inst #661 = CGRJ
4740
  { 662,  4,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo157, -1 ,nullptr },  // Inst #662 = CGRJAsm
4741
  { 663,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo44, -1 ,nullptr },  // Inst #663 = CGRJAsmE
4742
  { 664,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo44, -1 ,nullptr },  // Inst #664 = CGRJAsmH
4743
  { 665,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo44, -1 ,nullptr },  // Inst #665 = CGRJAsmHE
4744
  { 666,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo44, -1 ,nullptr },  // Inst #666 = CGRJAsmL
4745
  { 667,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo44, -1 ,nullptr },  // Inst #667 = CGRJAsmLE
4746
  { 668,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo44, -1 ,nullptr },  // Inst #668 = CGRJAsmLH
4747
  { 669,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo44, -1 ,nullptr },  // Inst #669 = CGRJAsmNE
4748
  { 670,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo44, -1 ,nullptr },  // Inst #670 = CGRJAsmNH
4749
  { 671,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo44, -1 ,nullptr },  // Inst #671 = CGRJAsmNHE
4750
  { 672,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo44, -1 ,nullptr },  // Inst #672 = CGRJAsmNL
4751
  { 673,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo44, -1 ,nullptr },  // Inst #673 = CGRJAsmNLE
4752
  { 674,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo44, -1 ,nullptr },  // Inst #674 = CGRJAsmNLH
4753
  { 675,  2,  0,  6,  214,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3800ULL, nullptr, ImplicitList1, OperandInfo87, -1 ,nullptr },  // Inst #675 = CGRL
4754
  { 676,  3,  0,  4,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #676 = CGRT
4755
  { 677,  3,  0,  4,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #677 = CGRTAsm
4756
  { 678,  2,  0,  4,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #678 = CGRTAsmE
4757
  { 679,  2,  0,  4,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #679 = CGRTAsmH
4758
  { 680,  2,  0,  4,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #680 = CGRTAsmHE
4759
  { 681,  2,  0,  4,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #681 = CGRTAsmL
4760
  { 682,  2,  0,  4,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #682 = CGRTAsmLE
4761
  { 683,  2,  0,  4,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #683 = CGRTAsmLH
4762
  { 684,  2,  0,  4,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #684 = CGRTAsmNE
4763
  { 685,  2,  0,  4,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #685 = CGRTAsmNH
4764
  { 686,  2,  0,  4,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #686 = CGRTAsmNHE
4765
  { 687,  2,  0,  4,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #687 = CGRTAsmNL
4766
  { 688,  2,  0,  4,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #688 = CGRTAsmNLE
4767
  { 689,  2,  0,  4,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #689 = CGRTAsmNLH
4768
  { 690,  3,  1,  4,  355,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo158, -1 ,nullptr },  // Inst #690 = CGXBR
4769
  { 691,  4,  1,  4,  355,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo159, -1 ,nullptr },  // Inst #691 = CGXBRA
4770
  { 692,  3,  1,  4,  411,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo158, -1 ,nullptr },  // Inst #692 = CGXR
4771
  { 693,  3,  1,  4,  460,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo158, -1 ,nullptr },  // Inst #693 = CGXTR
4772
  { 694,  4,  1,  4,  460,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo159, -1 ,nullptr },  // Inst #694 = CGXTRA
4773
  { 695,  4,  0,  4,  237,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3848ULL, nullptr, ImplicitList1, OperandInfo126, -1 ,nullptr },  // Inst #695 = CH
4774
  { 696,  4,  0,  6,  217,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x388cULL, nullptr, ImplicitList1, OperandInfo160, -1 ,nullptr },  // Inst #696 = CHF
4775
  { 697,  2,  0,  4,  235,  0|(1ULL<<MCID::Compare), 0x3800ULL, nullptr, ImplicitList1, OperandInfo161, -1 ,nullptr },  // Inst #697 = CHHR
4776
  { 698,  3,  0,  6,  241,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3800ULL, nullptr, ImplicitList1, OperandInfo86, -1 ,nullptr },  // Inst #698 = CHHSI
4777
  { 699,  2,  0,  4,  212,  0|(1ULL<<MCID::Compare), 0x3800ULL, nullptr, ImplicitList1, OperandInfo144, -1 ,nullptr },  // Inst #699 = CHI
4778
  { 700,  2,  0,  4,  236,  0|(1ULL<<MCID::Compare), 0x3800ULL, nullptr, ImplicitList1, OperandInfo162, -1 ,nullptr },  // Inst #700 = CHLR
4779
  { 701,  2,  0,  6,  238,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3800ULL, nullptr, ImplicitList1, OperandInfo144, -1 ,nullptr },  // Inst #701 = CHRL
4780
  { 702,  3,  0,  6,  218,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3800ULL, nullptr, ImplicitList1, OperandInfo86, -1 ,nullptr },  // Inst #702 = CHSI
4781
  { 703,  4,  0,  6,  237,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x384cULL, nullptr, ImplicitList1, OperandInfo126, -1 ,nullptr },  // Inst #703 = CHY
4782
  { 704,  5,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo163, -1 ,nullptr },  // Inst #704 = CIB
4783
  { 705,  5,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo163, -1 ,nullptr },  // Inst #705 = CIBAsm
4784
  { 706,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr },  // Inst #706 = CIBAsmE
4785
  { 707,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr },  // Inst #707 = CIBAsmH
4786
  { 708,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr },  // Inst #708 = CIBAsmHE
4787
  { 709,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr },  // Inst #709 = CIBAsmL
4788
  { 710,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr },  // Inst #710 = CIBAsmLE
4789
  { 711,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr },  // Inst #711 = CIBAsmLH
4790
  { 712,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr },  // Inst #712 = CIBAsmNE
4791
  { 713,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr },  // Inst #713 = CIBAsmNH
4792
  { 714,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr },  // Inst #714 = CIBAsmNHE
4793
  { 715,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr },  // Inst #715 = CIBAsmNL
4794
  { 716,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr },  // Inst #716 = CIBAsmNLE
4795
  { 717,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr },  // Inst #717 = CIBAsmNLH
4796
  { 718,  2,  0,  6,  216,  0|(1ULL<<MCID::Compare), 0x3800ULL, nullptr, ImplicitList1, OperandInfo165, -1 ,nullptr },  // Inst #718 = CIH
4797
  { 719,  4,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo166, -1 ,nullptr },  // Inst #719 = CIJ
4798
  { 720,  4,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo166, -1 ,nullptr },  // Inst #720 = CIJAsm
4799
  { 721,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo45, -1 ,nullptr },  // Inst #721 = CIJAsmE
4800
  { 722,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo45, -1 ,nullptr },  // Inst #722 = CIJAsmH
4801
  { 723,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo45, -1 ,nullptr },  // Inst #723 = CIJAsmHE
4802
  { 724,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo45, -1 ,nullptr },  // Inst #724 = CIJAsmL
4803
  { 725,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo45, -1 ,nullptr },  // Inst #725 = CIJAsmLE
4804
  { 726,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo45, -1 ,nullptr },  // Inst #726 = CIJAsmLH
4805
  { 727,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo45, -1 ,nullptr },  // Inst #727 = CIJAsmNE
4806
  { 728,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo45, -1 ,nullptr },  // Inst #728 = CIJAsmNH
4807
  { 729,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo45, -1 ,nullptr },  // Inst #729 = CIJAsmNHE
4808
  { 730,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo45, -1 ,nullptr },  // Inst #730 = CIJAsmNL
4809
  { 731,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo45, -1 ,nullptr },  // Inst #731 = CIJAsmNLE
4810
  { 732,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo45, -1 ,nullptr },  // Inst #732 = CIJAsmNLH
4811
  { 733,  3,  0,  6,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo45, -1 ,nullptr },  // Inst #733 = CIT
4812
  { 734,  3,  0,  6,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo45, -1 ,nullptr },  // Inst #734 = CITAsm
4813
  { 735,  2,  0,  6,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo144, -1 ,nullptr },  // Inst #735 = CITAsmE
4814
  { 736,  2,  0,  6,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo144, -1 ,nullptr },  // Inst #736 = CITAsmH
4815
  { 737,  2,  0,  6,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo144, -1 ,nullptr },  // Inst #737 = CITAsmHE
4816
  { 738,  2,  0,  6,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo144, -1 ,nullptr },  // Inst #738 = CITAsmL
4817
  { 739,  2,  0,  6,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo144, -1 ,nullptr },  // Inst #739 = CITAsmLE
4818
  { 740,  2,  0,  6,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo144, -1 ,nullptr },  // Inst #740 = CITAsmLH
4819
  { 741,  2,  0,  6,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo144, -1 ,nullptr },  // Inst #741 = CITAsmNE
4820
  { 742,  2,  0,  6,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo144, -1 ,nullptr },  // Inst #742 = CITAsmNH
4821
  { 743,  2,  0,  6,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo144, -1 ,nullptr },  // Inst #743 = CITAsmNHE
4822
  { 744,  2,  0,  6,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo144, -1 ,nullptr },  // Inst #744 = CITAsmNL
4823
  { 745,  2,  0,  6,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo144, -1 ,nullptr },  // Inst #745 = CITAsmNLE
4824
  { 746,  2,  0,  6,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo144, -1 ,nullptr },  // Inst #746 = CITAsmNLH
4825
  { 747,  4,  2,  4,  325,  0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, ImplicitList1, OperandInfo167, -1 ,nullptr },  // Inst #747 = CKSM
4826
  { 748,  4,  0,  4,  219,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x103888ULL, nullptr, ImplicitList1, OperandInfo126, -1 ,nullptr },  // Inst #748 = CL
4827
  { 749,  5,  0,  6,  245,  0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, ImplicitList1, OperandInfo168, -1 ,nullptr },  // Inst #749 = CLC
4828
  { 750,  4,  2,  2,  246,  0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, ImplicitList1, OperandInfo169, -1 ,nullptr },  // Inst #750 = CLCL
4829
  { 751,  6,  2,  4,  246,  0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, ImplicitList1, OperandInfo170, -1 ,nullptr },  // Inst #751 = CLCLE
4830
  { 752,  6,  2,  6,  246,  0|(1ULL<<MCID::MayLoad), 0x4ULL, nullptr, ImplicitList1, OperandInfo170, -1 ,nullptr },  // Inst #752 = CLCLU
4831
  { 753,  4,  1,  4,  357,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo141, -1 ,nullptr },  // Inst #753 = CLFDBR
4832
  { 754,  4,  1,  4,  461,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo141, -1 ,nullptr },  // Inst #754 = CLFDTR
4833
  { 755,  4,  1,  4,  356,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo143, -1 ,nullptr },  // Inst #755 = CLFEBR
4834
  { 756,  3,  0,  6,  220,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x103800ULL, nullptr, ImplicitList1, OperandInfo86, -1 ,nullptr },  // Inst #756 = CLFHSI
4835
  { 757,  2,  0,  6,  221,  0|(1ULL<<MCID::Compare), 0x103800ULL, nullptr, ImplicitList1, OperandInfo144, -1 ,nullptr },  // Inst #757 = CLFI
4836
  { 758,  3,  0,  6,  16, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo45, -1 ,nullptr },  // Inst #758 = CLFIT
4837
  { 759,  3,  0,  6,  16, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo45, -1 ,nullptr },  // Inst #759 = CLFITAsm
4838
  { 760,  2,  0,  6,  16, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo144, -1 ,nullptr },  // Inst #760 = CLFITAsmE
4839
  { 761,  2,  0,  6,  16, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo144, -1 ,nullptr },  // Inst #761 = CLFITAsmH
4840
  { 762,  2,  0,  6,  16, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo144, -1 ,nullptr },  // Inst #762 = CLFITAsmHE
4841
  { 763,  2,  0,  6,  16, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo144, -1 ,nullptr },  // Inst #763 = CLFITAsmL
4842
  { 764,  2,  0,  6,  16, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo144, -1 ,nullptr },  // Inst #764 = CLFITAsmLE
4843
  { 765,  2,  0,  6,  16, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo144, -1 ,nullptr },  // Inst #765 = CLFITAsmLH
4844
  { 766,  2,  0,