Coverage Report

Created: 2018-07-19 03:59

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/clang-build/lib/Target/SystemZ/SystemZGenInstrInfo.inc
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1
/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2
|*                                                                            *|
3
|* Target Instruction Enum Values and Descriptors                             *|
4
|*                                                                            *|
5
|* Automatically generated file, do not edit!                                 *|
6
|*                                                                            *|
7
\*===----------------------------------------------------------------------===*/
8
9
#ifdef GET_INSTRINFO_ENUM
10
#undef GET_INSTRINFO_ENUM
11
namespace llvm {
12
13
namespace SystemZ {
14
  enum {
15
    PHI = 0,
16
    INLINEASM = 1,
17
    CFI_INSTRUCTION = 2,
18
    EH_LABEL  = 3,
19
    GC_LABEL  = 4,
20
    ANNOTATION_LABEL  = 5,
21
    KILL  = 6,
22
    EXTRACT_SUBREG  = 7,
23
    INSERT_SUBREG = 8,
24
    IMPLICIT_DEF  = 9,
25
    SUBREG_TO_REG = 10,
26
    COPY_TO_REGCLASS  = 11,
27
    DBG_VALUE = 12,
28
    DBG_LABEL = 13,
29
    REG_SEQUENCE  = 14,
30
    COPY  = 15,
31
    BUNDLE  = 16,
32
    LIFETIME_START  = 17,
33
    LIFETIME_END  = 18,
34
    STACKMAP  = 19,
35
    FENTRY_CALL = 20,
36
    PATCHPOINT  = 21,
37
    LOAD_STACK_GUARD  = 22,
38
    STATEPOINT  = 23,
39
    LOCAL_ESCAPE  = 24,
40
    FAULTING_OP = 25,
41
    PATCHABLE_OP  = 26,
42
    PATCHABLE_FUNCTION_ENTER  = 27,
43
    PATCHABLE_RET = 28,
44
    PATCHABLE_FUNCTION_EXIT = 29,
45
    PATCHABLE_TAIL_CALL = 30,
46
    PATCHABLE_EVENT_CALL  = 31,
47
    PATCHABLE_TYPED_EVENT_CALL  = 32,
48
    ICALL_BRANCH_FUNNEL = 33,
49
    G_ADD = 34,
50
    G_SUB = 35,
51
    G_MUL = 36,
52
    G_SDIV  = 37,
53
    G_UDIV  = 38,
54
    G_SREM  = 39,
55
    G_UREM  = 40,
56
    G_AND = 41,
57
    G_OR  = 42,
58
    G_XOR = 43,
59
    G_IMPLICIT_DEF  = 44,
60
    G_PHI = 45,
61
    G_FRAME_INDEX = 46,
62
    G_GLOBAL_VALUE  = 47,
63
    G_EXTRACT = 48,
64
    G_UNMERGE_VALUES  = 49,
65
    G_INSERT  = 50,
66
    G_MERGE_VALUES  = 51,
67
    G_PTRTOINT  = 52,
68
    G_INTTOPTR  = 53,
69
    G_BITCAST = 54,
70
    G_LOAD  = 55,
71
    G_SEXTLOAD  = 56,
72
    G_ZEXTLOAD  = 57,
73
    G_STORE = 58,
74
    G_ATOMIC_CMPXCHG_WITH_SUCCESS = 59,
75
    G_ATOMIC_CMPXCHG  = 60,
76
    G_ATOMICRMW_XCHG  = 61,
77
    G_ATOMICRMW_ADD = 62,
78
    G_ATOMICRMW_SUB = 63,
79
    G_ATOMICRMW_AND = 64,
80
    G_ATOMICRMW_NAND  = 65,
81
    G_ATOMICRMW_OR  = 66,
82
    G_ATOMICRMW_XOR = 67,
83
    G_ATOMICRMW_MAX = 68,
84
    G_ATOMICRMW_MIN = 69,
85
    G_ATOMICRMW_UMAX  = 70,
86
    G_ATOMICRMW_UMIN  = 71,
87
    G_BRCOND  = 72,
88
    G_BRINDIRECT  = 73,
89
    G_INTRINSIC = 74,
90
    G_INTRINSIC_W_SIDE_EFFECTS  = 75,
91
    G_ANYEXT  = 76,
92
    G_TRUNC = 77,
93
    G_CONSTANT  = 78,
94
    G_FCONSTANT = 79,
95
    G_VASTART = 80,
96
    G_VAARG = 81,
97
    G_SEXT  = 82,
98
    G_ZEXT  = 83,
99
    G_SHL = 84,
100
    G_LSHR  = 85,
101
    G_ASHR  = 86,
102
    G_ICMP  = 87,
103
    G_FCMP  = 88,
104
    G_SELECT  = 89,
105
    G_UADDE = 90,
106
    G_USUBE = 91,
107
    G_SADDO = 92,
108
    G_SSUBO = 93,
109
    G_UMULO = 94,
110
    G_SMULO = 95,
111
    G_UMULH = 96,
112
    G_SMULH = 97,
113
    G_FADD  = 98,
114
    G_FSUB  = 99,
115
    G_FMUL  = 100,
116
    G_FMA = 101,
117
    G_FDIV  = 102,
118
    G_FREM  = 103,
119
    G_FPOW  = 104,
120
    G_FEXP  = 105,
121
    G_FEXP2 = 106,
122
    G_FLOG  = 107,
123
    G_FLOG2 = 108,
124
    G_FNEG  = 109,
125
    G_FPEXT = 110,
126
    G_FPTRUNC = 111,
127
    G_FPTOSI  = 112,
128
    G_FPTOUI  = 113,
129
    G_SITOFP  = 114,
130
    G_UITOFP  = 115,
131
    G_FABS  = 116,
132
    G_GEP = 117,
133
    G_PTR_MASK  = 118,
134
    G_BR  = 119,
135
    G_INSERT_VECTOR_ELT = 120,
136
    G_EXTRACT_VECTOR_ELT  = 121,
137
    G_SHUFFLE_VECTOR  = 122,
138
    G_BSWAP = 123,
139
    G_ADDRSPACE_CAST  = 124,
140
    ADJCALLSTACKDOWN  = 125,
141
    ADJCALLSTACKUP  = 126,
142
    ADJDYNALLOC = 127,
143
    AEXT128 = 128,
144
    AFIMux  = 129,
145
    AHIMux  = 130,
146
    AHIMuxK = 131,
147
    ATOMIC_CMP_SWAPW  = 132,
148
    ATOMIC_LOADW_AFI  = 133,
149
    ATOMIC_LOADW_AR = 134,
150
    ATOMIC_LOADW_MAX  = 135,
151
    ATOMIC_LOADW_MIN  = 136,
152
    ATOMIC_LOADW_NILH = 137,
153
    ATOMIC_LOADW_NILHi  = 138,
154
    ATOMIC_LOADW_NR = 139,
155
    ATOMIC_LOADW_NRi  = 140,
156
    ATOMIC_LOADW_OILH = 141,
157
    ATOMIC_LOADW_OR = 142,
158
    ATOMIC_LOADW_SR = 143,
159
    ATOMIC_LOADW_UMAX = 144,
160
    ATOMIC_LOADW_UMIN = 145,
161
    ATOMIC_LOADW_XILF = 146,
162
    ATOMIC_LOADW_XR = 147,
163
    ATOMIC_LOAD_AFI = 148,
164
    ATOMIC_LOAD_AGFI  = 149,
165
    ATOMIC_LOAD_AGHI  = 150,
166
    ATOMIC_LOAD_AGR = 151,
167
    ATOMIC_LOAD_AHI = 152,
168
    ATOMIC_LOAD_AR  = 153,
169
    ATOMIC_LOAD_MAX_32  = 154,
170
    ATOMIC_LOAD_MAX_64  = 155,
171
    ATOMIC_LOAD_MIN_32  = 156,
172
    ATOMIC_LOAD_MIN_64  = 157,
173
    ATOMIC_LOAD_NGR = 158,
174
    ATOMIC_LOAD_NGRi  = 159,
175
    ATOMIC_LOAD_NIHF64  = 160,
176
    ATOMIC_LOAD_NIHF64i = 161,
177
    ATOMIC_LOAD_NIHH64  = 162,
178
    ATOMIC_LOAD_NIHH64i = 163,
179
    ATOMIC_LOAD_NIHL64  = 164,
180
    ATOMIC_LOAD_NIHL64i = 165,
181
    ATOMIC_LOAD_NILF  = 166,
182
    ATOMIC_LOAD_NILF64  = 167,
183
    ATOMIC_LOAD_NILF64i = 168,
184
    ATOMIC_LOAD_NILFi = 169,
185
    ATOMIC_LOAD_NILH  = 170,
186
    ATOMIC_LOAD_NILH64  = 171,
187
    ATOMIC_LOAD_NILH64i = 172,
188
    ATOMIC_LOAD_NILHi = 173,
189
    ATOMIC_LOAD_NILL  = 174,
190
    ATOMIC_LOAD_NILL64  = 175,
191
    ATOMIC_LOAD_NILL64i = 176,
192
    ATOMIC_LOAD_NILLi = 177,
193
    ATOMIC_LOAD_NR  = 178,
194
    ATOMIC_LOAD_NRi = 179,
195
    ATOMIC_LOAD_OGR = 180,
196
    ATOMIC_LOAD_OIHF64  = 181,
197
    ATOMIC_LOAD_OIHH64  = 182,
198
    ATOMIC_LOAD_OIHL64  = 183,
199
    ATOMIC_LOAD_OILF  = 184,
200
    ATOMIC_LOAD_OILF64  = 185,
201
    ATOMIC_LOAD_OILH  = 186,
202
    ATOMIC_LOAD_OILH64  = 187,
203
    ATOMIC_LOAD_OILL  = 188,
204
    ATOMIC_LOAD_OILL64  = 189,
205
    ATOMIC_LOAD_OR  = 190,
206
    ATOMIC_LOAD_SGR = 191,
207
    ATOMIC_LOAD_SR  = 192,
208
    ATOMIC_LOAD_UMAX_32 = 193,
209
    ATOMIC_LOAD_UMAX_64 = 194,
210
    ATOMIC_LOAD_UMIN_32 = 195,
211
    ATOMIC_LOAD_UMIN_64 = 196,
212
    ATOMIC_LOAD_XGR = 197,
213
    ATOMIC_LOAD_XIHF64  = 198,
214
    ATOMIC_LOAD_XILF  = 199,
215
    ATOMIC_LOAD_XILF64  = 200,
216
    ATOMIC_LOAD_XR  = 201,
217
    ATOMIC_SWAPW  = 202,
218
    ATOMIC_SWAP_32  = 203,
219
    ATOMIC_SWAP_64  = 204,
220
    CFIMux  = 205,
221
    CGIBCall  = 206,
222
    CGIBReturn  = 207,
223
    CGRBCall  = 208,
224
    CGRBReturn  = 209,
225
    CHIMux  = 210,
226
    CIBCall = 211,
227
    CIBReturn = 212,
228
    CLCLoop = 213,
229
    CLCSequence = 214,
230
    CLFIMux = 215,
231
    CLGIBCall = 216,
232
    CLGIBReturn = 217,
233
    CLGRBCall = 218,
234
    CLGRBReturn = 219,
235
    CLIBCall  = 220,
236
    CLIBReturn  = 221,
237
    CLMux = 222,
238
    CLRBCall  = 223,
239
    CLRBReturn  = 224,
240
    CLSTLoop  = 225,
241
    CMux  = 226,
242
    CRBCall = 227,
243
    CRBReturn = 228,
244
    CallBASR  = 229,
245
    CallBCR = 230,
246
    CallBR  = 231,
247
    CallBRASL = 232,
248
    CallBRCL  = 233,
249
    CallJG  = 234,
250
    CondReturn  = 235,
251
    CondStore16 = 236,
252
    CondStore16Inv  = 237,
253
    CondStore16Mux  = 238,
254
    CondStore16MuxInv = 239,
255
    CondStore32 = 240,
256
    CondStore32Inv  = 241,
257
    CondStore32Mux  = 242,
258
    CondStore32MuxInv = 243,
259
    CondStore64 = 244,
260
    CondStore64Inv  = 245,
261
    CondStore8  = 246,
262
    CondStore8Inv = 247,
263
    CondStore8Mux = 248,
264
    CondStore8MuxInv  = 249,
265
    CondStoreF32  = 250,
266
    CondStoreF32Inv = 251,
267
    CondStoreF64  = 252,
268
    CondStoreF64Inv = 253,
269
    CondTrap  = 254,
270
    GOT = 255,
271
    IIFMux  = 256,
272
    IIHF64  = 257,
273
    IIHH64  = 258,
274
    IIHL64  = 259,
275
    IIHMux  = 260,
276
    IILF64  = 261,
277
    IILH64  = 262,
278
    IILL64  = 263,
279
    IILMux  = 264,
280
    L128  = 265,
281
    LBMux = 266,
282
    LEFR  = 267,
283
    LFER  = 268,
284
    LHIMux  = 269,
285
    LHMux = 270,
286
    LLCMux  = 271,
287
    LLCRMux = 272,
288
    LLHMux  = 273,
289
    LLHRMux = 274,
290
    LMux  = 275,
291
    LOCHIMux  = 276,
292
    LOCMux  = 277,
293
    LOCRMux = 278,
294
    LRMux = 279,
295
    LTDBRCompare_VecPseudo  = 280,
296
    LTEBRCompare_VecPseudo  = 281,
297
    LTXBRCompare_VecPseudo  = 282,
298
    LX  = 283,
299
    MVCLoop = 284,
300
    MVCSequence = 285,
301
    MVSTLoop  = 286,
302
    MemBarrier  = 287,
303
    NCLoop  = 288,
304
    NCSequence  = 289,
305
    NIFMux  = 290,
306
    NIHF64  = 291,
307
    NIHH64  = 292,
308
    NIHL64  = 293,
309
    NIHMux  = 294,
310
    NILF64  = 295,
311
    NILH64  = 296,
312
    NILL64  = 297,
313
    NILMux  = 298,
314
    OCLoop  = 299,
315
    OCSequence  = 300,
316
    OIFMux  = 301,
317
    OIHF64  = 302,
318
    OIHH64  = 303,
319
    OIHL64  = 304,
320
    OIHMux  = 305,
321
    OILF64  = 306,
322
    OILH64  = 307,
323
    OILL64  = 308,
324
    OILMux  = 309,
325
    PAIR128 = 310,
326
    RISBHH  = 311,
327
    RISBHL  = 312,
328
    RISBLH  = 313,
329
    RISBLL  = 314,
330
    RISBMux = 315,
331
    Return  = 316,
332
    SRSTLoop  = 317,
333
    ST128 = 318,
334
    STCMux  = 319,
335
    STHMux  = 320,
336
    STMux = 321,
337
    STOCMux = 322,
338
    STX = 323,
339
    Select32  = 324,
340
    Select64  = 325,
341
    SelectF128  = 326,
342
    SelectF32 = 327,
343
    SelectF64 = 328,
344
    SelectVR128 = 329,
345
    SelectVR32  = 330,
346
    SelectVR64  = 331,
347
    Serialize = 332,
348
    TBEGIN_nofloat  = 333,
349
    TLS_GDCALL  = 334,
350
    TLS_LDCALL  = 335,
351
    TMHH64  = 336,
352
    TMHL64  = 337,
353
    TMHMux  = 338,
354
    TMLH64  = 339,
355
    TMLL64  = 340,
356
    TMLMux  = 341,
357
    Trap  = 342,
358
    VL32  = 343,
359
    VL64  = 344,
360
    VLR32 = 345,
361
    VLR64 = 346,
362
    VLVGP32 = 347,
363
    VST32 = 348,
364
    VST64 = 349,
365
    XCLoop  = 350,
366
    XCSequence  = 351,
367
    XIFMux  = 352,
368
    XIHF64  = 353,
369
    XILF64  = 354,
370
    ZEXT128 = 355,
371
    A = 356,
372
    AD  = 357,
373
    ADB = 358,
374
    ADBR  = 359,
375
    ADR = 360,
376
    ADTR  = 361,
377
    ADTRA = 362,
378
    AE  = 363,
379
    AEB = 364,
380
    AEBR  = 365,
381
    AER = 366,
382
    AFI = 367,
383
    AG  = 368,
384
    AGF = 369,
385
    AGFI  = 370,
386
    AGFR  = 371,
387
    AGH = 372,
388
    AGHI  = 373,
389
    AGHIK = 374,
390
    AGR = 375,
391
    AGRK  = 376,
392
    AGSI  = 377,
393
    AH  = 378,
394
    AHHHR = 379,
395
    AHHLR = 380,
396
    AHI = 381,
397
    AHIK  = 382,
398
    AHY = 383,
399
    AIH = 384,
400
    AL  = 385,
401
    ALC = 386,
402
    ALCG  = 387,
403
    ALCGR = 388,
404
    ALCR  = 389,
405
    ALFI  = 390,
406
    ALG = 391,
407
    ALGF  = 392,
408
    ALGFI = 393,
409
    ALGFR = 394,
410
    ALGHSIK = 395,
411
    ALGR  = 396,
412
    ALGRK = 397,
413
    ALGSI = 398,
414
    ALHHHR  = 399,
415
    ALHHLR  = 400,
416
    ALHSIK  = 401,
417
    ALR = 402,
418
    ALRK  = 403,
419
    ALSI  = 404,
420
    ALSIH = 405,
421
    ALSIHN  = 406,
422
    ALY = 407,
423
    AP  = 408,
424
    AR  = 409,
425
    ARK = 410,
426
    ASI = 411,
427
    AU  = 412,
428
    AUR = 413,
429
    AW  = 414,
430
    AWR = 415,
431
    AXBR  = 416,
432
    AXR = 417,
433
    AXTR  = 418,
434
    AXTRA = 419,
435
    AY  = 420,
436
    B = 421,
437
    BAKR  = 422,
438
    BAL = 423,
439
    BALR  = 424,
440
    BAS = 425,
441
    BASR  = 426,
442
    BASSM = 427,
443
    BAsmE = 428,
444
    BAsmH = 429,
445
    BAsmHE  = 430,
446
    BAsmL = 431,
447
    BAsmLE  = 432,
448
    BAsmLH  = 433,
449
    BAsmM = 434,
450
    BAsmNE  = 435,
451
    BAsmNH  = 436,
452
    BAsmNHE = 437,
453
    BAsmNL  = 438,
454
    BAsmNLE = 439,
455
    BAsmNLH = 440,
456
    BAsmNM  = 441,
457
    BAsmNO  = 442,
458
    BAsmNP  = 443,
459
    BAsmNZ  = 444,
460
    BAsmO = 445,
461
    BAsmP = 446,
462
    BAsmZ = 447,
463
    BC  = 448,
464
    BCAsm = 449,
465
    BCR = 450,
466
    BCRAsm  = 451,
467
    BCT = 452,
468
    BCTG  = 453,
469
    BCTGR = 454,
470
    BCTR  = 455,
471
    BI  = 456,
472
    BIAsmE  = 457,
473
    BIAsmH  = 458,
474
    BIAsmHE = 459,
475
    BIAsmL  = 460,
476
    BIAsmLE = 461,
477
    BIAsmLH = 462,
478
    BIAsmM  = 463,
479
    BIAsmNE = 464,
480
    BIAsmNH = 465,
481
    BIAsmNHE  = 466,
482
    BIAsmNL = 467,
483
    BIAsmNLE  = 468,
484
    BIAsmNLH  = 469,
485
    BIAsmNM = 470,
486
    BIAsmNO = 471,
487
    BIAsmNP = 472,
488
    BIAsmNZ = 473,
489
    BIAsmO  = 474,
490
    BIAsmP  = 475,
491
    BIAsmZ  = 476,
492
    BIC = 477,
493
    BICAsm  = 478,
494
    BPP = 479,
495
    BPRP  = 480,
496
    BR  = 481,
497
    BRAS  = 482,
498
    BRASL = 483,
499
    BRAsmE  = 484,
500
    BRAsmH  = 485,
501
    BRAsmHE = 486,
502
    BRAsmL  = 487,
503
    BRAsmLE = 488,
504
    BRAsmLH = 489,
505
    BRAsmM  = 490,
506
    BRAsmNE = 491,
507
    BRAsmNH = 492,
508
    BRAsmNHE  = 493,
509
    BRAsmNL = 494,
510
    BRAsmNLE  = 495,
511
    BRAsmNLH  = 496,
512
    BRAsmNM = 497,
513
    BRAsmNO = 498,
514
    BRAsmNP = 499,
515
    BRAsmNZ = 500,
516
    BRAsmO  = 501,
517
    BRAsmP  = 502,
518
    BRAsmZ  = 503,
519
    BRC = 504,
520
    BRCAsm  = 505,
521
    BRCL  = 506,
522
    BRCLAsm = 507,
523
    BRCT  = 508,
524
    BRCTG = 509,
525
    BRCTH = 510,
526
    BRXH  = 511,
527
    BRXHG = 512,
528
    BRXLE = 513,
529
    BRXLG = 514,
530
    BSA = 515,
531
    BSG = 516,
532
    BSM = 517,
533
    BXH = 518,
534
    BXHG  = 519,
535
    BXLE  = 520,
536
    BXLEG = 521,
537
    C = 522,
538
    CD  = 523,
539
    CDB = 524,
540
    CDBR  = 525,
541
    CDFBR = 526,
542
    CDFBRA  = 527,
543
    CDFR  = 528,
544
    CDFTR = 529,
545
    CDGBR = 530,
546
    CDGBRA  = 531,
547
    CDGR  = 532,
548
    CDGTR = 533,
549
    CDGTRA  = 534,
550
    CDLFBR  = 535,
551
    CDLFTR  = 536,
552
    CDLGBR  = 537,
553
    CDLGTR  = 538,
554
    CDPT  = 539,
555
    CDR = 540,
556
    CDS = 541,
557
    CDSG  = 542,
558
    CDSTR = 543,
559
    CDSY  = 544,
560
    CDTR  = 545,
561
    CDUTR = 546,
562
    CDZT  = 547,
563
    CE  = 548,
564
    CEB = 549,
565
    CEBR  = 550,
566
    CEDTR = 551,
567
    CEFBR = 552,
568
    CEFBRA  = 553,
569
    CEFR  = 554,
570
    CEGBR = 555,
571
    CEGBRA  = 556,
572
    CEGR  = 557,
573
    CELFBR  = 558,
574
    CELGBR  = 559,
575
    CER = 560,
576
    CEXTR = 561,
577
    CFC = 562,
578
    CFDBR = 563,
579
    CFDBRA  = 564,
580
    CFDR  = 565,
581
    CFDTR = 566,
582
    CFEBR = 567,
583
    CFEBRA  = 568,
584
    CFER  = 569,
585
    CFI = 570,
586
    CFXBR = 571,
587
    CFXBRA  = 572,
588
    CFXR  = 573,
589
    CFXTR = 574,
590
    CG  = 575,
591
    CGDBR = 576,
592
    CGDBRA  = 577,
593
    CGDR  = 578,
594
    CGDTR = 579,
595
    CGDTRA  = 580,
596
    CGEBR = 581,
597
    CGEBRA  = 582,
598
    CGER  = 583,
599
    CGF = 584,
600
    CGFI  = 585,
601
    CGFR  = 586,
602
    CGFRL = 587,
603
    CGH = 588,
604
    CGHI  = 589,
605
    CGHRL = 590,
606
    CGHSI = 591,
607
    CGIB  = 592,
608
    CGIBAsm = 593,
609
    CGIBAsmE  = 594,
610
    CGIBAsmH  = 595,
611
    CGIBAsmHE = 596,
612
    CGIBAsmL  = 597,
613
    CGIBAsmLE = 598,
614
    CGIBAsmLH = 599,
615
    CGIBAsmNE = 600,
616
    CGIBAsmNH = 601,
617
    CGIBAsmNHE  = 602,
618
    CGIBAsmNL = 603,
619
    CGIBAsmNLE  = 604,
620
    CGIBAsmNLH  = 605,
621
    CGIJ  = 606,
622
    CGIJAsm = 607,
623
    CGIJAsmE  = 608,
624
    CGIJAsmH  = 609,
625
    CGIJAsmHE = 610,
626
    CGIJAsmL  = 611,
627
    CGIJAsmLE = 612,
628
    CGIJAsmLH = 613,
629
    CGIJAsmNE = 614,
630
    CGIJAsmNH = 615,
631
    CGIJAsmNHE  = 616,
632
    CGIJAsmNL = 617,
633
    CGIJAsmNLE  = 618,
634
    CGIJAsmNLH  = 619,
635
    CGIT  = 620,
636
    CGITAsm = 621,
637
    CGITAsmE  = 622,
638
    CGITAsmH  = 623,
639
    CGITAsmHE = 624,
640
    CGITAsmL  = 625,
641
    CGITAsmLE = 626,
642
    CGITAsmLH = 627,
643
    CGITAsmNE = 628,
644
    CGITAsmNH = 629,
645
    CGITAsmNHE  = 630,
646
    CGITAsmNL = 631,
647
    CGITAsmNLE  = 632,
648
    CGITAsmNLH  = 633,
649
    CGR = 634,
650
    CGRB  = 635,
651
    CGRBAsm = 636,
652
    CGRBAsmE  = 637,
653
    CGRBAsmH  = 638,
654
    CGRBAsmHE = 639,
655
    CGRBAsmL  = 640,
656
    CGRBAsmLE = 641,
657
    CGRBAsmLH = 642,
658
    CGRBAsmNE = 643,
659
    CGRBAsmNH = 644,
660
    CGRBAsmNHE  = 645,
661
    CGRBAsmNL = 646,
662
    CGRBAsmNLE  = 647,
663
    CGRBAsmNLH  = 648,
664
    CGRJ  = 649,
665
    CGRJAsm = 650,
666
    CGRJAsmE  = 651,
667
    CGRJAsmH  = 652,
668
    CGRJAsmHE = 653,
669
    CGRJAsmL  = 654,
670
    CGRJAsmLE = 655,
671
    CGRJAsmLH = 656,
672
    CGRJAsmNE = 657,
673
    CGRJAsmNH = 658,
674
    CGRJAsmNHE  = 659,
675
    CGRJAsmNL = 660,
676
    CGRJAsmNLE  = 661,
677
    CGRJAsmNLH  = 662,
678
    CGRL  = 663,
679
    CGRT  = 664,
680
    CGRTAsm = 665,
681
    CGRTAsmE  = 666,
682
    CGRTAsmH  = 667,
683
    CGRTAsmHE = 668,
684
    CGRTAsmL  = 669,
685
    CGRTAsmLE = 670,
686
    CGRTAsmLH = 671,
687
    CGRTAsmNE = 672,
688
    CGRTAsmNH = 673,
689
    CGRTAsmNHE  = 674,
690
    CGRTAsmNL = 675,
691
    CGRTAsmNLE  = 676,
692
    CGRTAsmNLH  = 677,
693
    CGXBR = 678,
694
    CGXBRA  = 679,
695
    CGXR  = 680,
696
    CGXTR = 681,
697
    CGXTRA  = 682,
698
    CH  = 683,
699
    CHF = 684,
700
    CHHR  = 685,
701
    CHHSI = 686,
702
    CHI = 687,
703
    CHLR  = 688,
704
    CHRL  = 689,
705
    CHSI  = 690,
706
    CHY = 691,
707
    CIB = 692,
708
    CIBAsm  = 693,
709
    CIBAsmE = 694,
710
    CIBAsmH = 695,
711
    CIBAsmHE  = 696,
712
    CIBAsmL = 697,
713
    CIBAsmLE  = 698,
714
    CIBAsmLH  = 699,
715
    CIBAsmNE  = 700,
716
    CIBAsmNH  = 701,
717
    CIBAsmNHE = 702,
718
    CIBAsmNL  = 703,
719
    CIBAsmNLE = 704,
720
    CIBAsmNLH = 705,
721
    CIH = 706,
722
    CIJ = 707,
723
    CIJAsm  = 708,
724
    CIJAsmE = 709,
725
    CIJAsmH = 710,
726
    CIJAsmHE  = 711,
727
    CIJAsmL = 712,
728
    CIJAsmLE  = 713,
729
    CIJAsmLH  = 714,
730
    CIJAsmNE  = 715,
731
    CIJAsmNH  = 716,
732
    CIJAsmNHE = 717,
733
    CIJAsmNL  = 718,
734
    CIJAsmNLE = 719,
735
    CIJAsmNLH = 720,
736
    CIT = 721,
737
    CITAsm  = 722,
738
    CITAsmE = 723,
739
    CITAsmH = 724,
740
    CITAsmHE  = 725,
741
    CITAsmL = 726,
742
    CITAsmLE  = 727,
743
    CITAsmLH  = 728,
744
    CITAsmNE  = 729,
745
    CITAsmNH  = 730,
746
    CITAsmNHE = 731,
747
    CITAsmNL  = 732,
748
    CITAsmNLE = 733,
749
    CITAsmNLH = 734,
750
    CKSM  = 735,
751
    CL  = 736,
752
    CLC = 737,
753
    CLCL  = 738,
754
    CLCLE = 739,
755
    CLCLU = 740,
756
    CLFDBR  = 741,
757
    CLFDTR  = 742,
758
    CLFEBR  = 743,
759
    CLFHSI  = 744,
760
    CLFI  = 745,
761
    CLFIT = 746,
762
    CLFITAsm  = 747,
763
    CLFITAsmE = 748,
764
    CLFITAsmH = 749,
765
    CLFITAsmHE  = 750,
766
    CLFITAsmL = 751,
767
    CLFITAsmLE  = 752,
768
    CLFITAsmLH  = 753,
769
    CLFITAsmNE  = 754,
770
    CLFITAsmNH  = 755,
771
    CLFITAsmNHE = 756,
772
    CLFITAsmNL  = 757,
773
    CLFITAsmNLE = 758,
774
    CLFITAsmNLH = 759,
775
    CLFXBR  = 760,
776
    CLFXTR  = 761,
777
    CLG = 762,
778
    CLGDBR  = 763,
779
    CLGDTR  = 764,
780
    CLGEBR  = 765,
781
    CLGF  = 766,
782
    CLGFI = 767,
783
    CLGFR = 768,
784
    CLGFRL  = 769,
785
    CLGHRL  = 770,
786
    CLGHSI  = 771,
787
    CLGIB = 772,
788
    CLGIBAsm  = 773,
789
    CLGIBAsmE = 774,
790
    CLGIBAsmH = 775,
791
    CLGIBAsmHE  = 776,
792
    CLGIBAsmL = 777,
793
    CLGIBAsmLE  = 778,
794
    CLGIBAsmLH  = 779,
795
    CLGIBAsmNE  = 780,
796
    CLGIBAsmNH  = 781,
797
    CLGIBAsmNHE = 782,
798
    CLGIBAsmNL  = 783,
799
    CLGIBAsmNLE = 784,
800
    CLGIBAsmNLH = 785,
801
    CLGIJ = 786,
802
    CLGIJAsm  = 787,
803
    CLGIJAsmE = 788,
804
    CLGIJAsmH = 789,
805
    CLGIJAsmHE  = 790,
806
    CLGIJAsmL = 791,
807
    CLGIJAsmLE  = 792,
808
    CLGIJAsmLH  = 793,
809
    CLGIJAsmNE  = 794,
810
    CLGIJAsmNH  = 795,
811
    CLGIJAsmNHE = 796,
812
    CLGIJAsmNL  = 797,
813
    CLGIJAsmNLE = 798,
814
    CLGIJAsmNLH = 799,
815
    CLGIT = 800,
816
    CLGITAsm  = 801,
817
    CLGITAsmE = 802,
818
    CLGITAsmH = 803,
819
    CLGITAsmHE  = 804,
820
    CLGITAsmL = 805,
821
    CLGITAsmLE  = 806,
822
    CLGITAsmLH  = 807,
823
    CLGITAsmNE  = 808,
824
    CLGITAsmNH  = 809,
825
    CLGITAsmNHE = 810,
826
    CLGITAsmNL  = 811,
827
    CLGITAsmNLE = 812,
828
    CLGITAsmNLH = 813,
829
    CLGR  = 814,
830
    CLGRB = 815,
831
    CLGRBAsm  = 816,
832
    CLGRBAsmE = 817,
833
    CLGRBAsmH = 818,
834
    CLGRBAsmHE  = 819,
835
    CLGRBAsmL = 820,
836
    CLGRBAsmLE  = 821,
837
    CLGRBAsmLH  = 822,
838
    CLGRBAsmNE  = 823,
839
    CLGRBAsmNH  = 824,
840
    CLGRBAsmNHE = 825,
841
    CLGRBAsmNL  = 826,
842
    CLGRBAsmNLE = 827,
843
    CLGRBAsmNLH = 828,
844
    CLGRJ = 829,
845
    CLGRJAsm  = 830,
846
    CLGRJAsmE = 831,
847
    CLGRJAsmH = 832,
848
    CLGRJAsmHE  = 833,
849
    CLGRJAsmL = 834,
850
    CLGRJAsmLE  = 835,
851
    CLGRJAsmLH  = 836,
852
    CLGRJAsmNE  = 837,
853
    CLGRJAsmNH  = 838,
854
    CLGRJAsmNHE = 839,
855
    CLGRJAsmNL  = 840,
856
    CLGRJAsmNLE = 841,
857
    CLGRJAsmNLH = 842,
858
    CLGRL = 843,
859
    CLGRT = 844,
860
    CLGRTAsm  = 845,
861
    CLGRTAsmE = 846,
862
    CLGRTAsmH = 847,
863
    CLGRTAsmHE  = 848,
864
    CLGRTAsmL = 849,
865
    CLGRTAsmLE  = 850,
866
    CLGRTAsmLH  = 851,
867
    CLGRTAsmNE  = 852,
868
    CLGRTAsmNH  = 853,
869
    CLGRTAsmNHE = 854,
870
    CLGRTAsmNL  = 855,
871
    CLGRTAsmNLE = 856,
872
    CLGRTAsmNLH = 857,
873
    CLGT  = 858,
874
    CLGTAsm = 859,
875
    CLGTAsmE  = 860,
876
    CLGTAsmH  = 861,
877
    CLGTAsmHE = 862,
878
    CLGTAsmL  = 863,
879
    CLGTAsmLE = 864,
880
    CLGTAsmLH = 865,
881
    CLGTAsmNE = 866,
882
    CLGTAsmNH = 867,
883
    CLGTAsmNHE  = 868,
884
    CLGTAsmNL = 869,
885
    CLGTAsmNLE  = 870,
886
    CLGTAsmNLH  = 871,
887
    CLGXBR  = 872,
888
    CLGXTR  = 873,
889
    CLHF  = 874,
890
    CLHHR = 875,
891
    CLHHSI  = 876,
892
    CLHLR = 877,
893
    CLHRL = 878,
894
    CLI = 879,
895
    CLIB  = 880,
896
    CLIBAsm = 881,
897
    CLIBAsmE  = 882,
898
    CLIBAsmH  = 883,
899
    CLIBAsmHE = 884,
900
    CLIBAsmL  = 885,
901
    CLIBAsmLE = 886,
902
    CLIBAsmLH = 887,
903
    CLIBAsmNE = 888,
904
    CLIBAsmNH = 889,
905
    CLIBAsmNHE  = 890,
906
    CLIBAsmNL = 891,
907
    CLIBAsmNLE  = 892,
908
    CLIBAsmNLH  = 893,
909
    CLIH  = 894,
910
    CLIJ  = 895,
911
    CLIJAsm = 896,
912
    CLIJAsmE  = 897,
913
    CLIJAsmH  = 898,
914
    CLIJAsmHE = 899,
915
    CLIJAsmL  = 900,
916
    CLIJAsmLE = 901,
917
    CLIJAsmLH = 902,
918
    CLIJAsmNE = 903,
919
    CLIJAsmNH = 904,
920
    CLIJAsmNHE  = 905,
921
    CLIJAsmNL = 906,
922
    CLIJAsmNLE  = 907,
923
    CLIJAsmNLH  = 908,
924
    CLIY  = 909,
925
    CLM = 910,
926
    CLMH  = 911,
927
    CLMY  = 912,
928
    CLR = 913,
929
    CLRB  = 914,
930
    CLRBAsm = 915,
931
    CLRBAsmE  = 916,
932
    CLRBAsmH  = 917,
933
    CLRBAsmHE = 918,
934
    CLRBAsmL  = 919,
935
    CLRBAsmLE = 920,
936
    CLRBAsmLH = 921,
937
    CLRBAsmNE = 922,
938
    CLRBAsmNH = 923,
939
    CLRBAsmNHE  = 924,
940
    CLRBAsmNL = 925,
941
    CLRBAsmNLE  = 926,
942
    CLRBAsmNLH  = 927,
943
    CLRJ  = 928,
944
    CLRJAsm = 929,
945
    CLRJAsmE  = 930,
946
    CLRJAsmH  = 931,
947
    CLRJAsmHE = 932,
948
    CLRJAsmL  = 933,
949
    CLRJAsmLE = 934,
950
    CLRJAsmLH = 935,
951
    CLRJAsmNE = 936,
952
    CLRJAsmNH = 937,
953
    CLRJAsmNHE  = 938,
954
    CLRJAsmNL = 939,
955
    CLRJAsmNLE  = 940,
956
    CLRJAsmNLH  = 941,
957
    CLRL  = 942,
958
    CLRT  = 943,
959
    CLRTAsm = 944,
960
    CLRTAsmE  = 945,
961
    CLRTAsmH  = 946,
962
    CLRTAsmHE = 947,
963
    CLRTAsmL  = 948,
964
    CLRTAsmLE = 949,
965
    CLRTAsmLH = 950,
966
    CLRTAsmNE = 951,
967
    CLRTAsmNH = 952,
968
    CLRTAsmNHE  = 953,
969
    CLRTAsmNL = 954,
970
    CLRTAsmNLE  = 955,
971
    CLRTAsmNLH  = 956,
972
    CLST  = 957,
973
    CLT = 958,
974
    CLTAsm  = 959,
975
    CLTAsmE = 960,
976
    CLTAsmH = 961,
977
    CLTAsmHE  = 962,
978
    CLTAsmL = 963,
979
    CLTAsmLE  = 964,
980
    CLTAsmLH  = 965,
981
    CLTAsmNE  = 966,
982
    CLTAsmNH  = 967,
983
    CLTAsmNHE = 968,
984
    CLTAsmNL  = 969,
985
    CLTAsmNLE = 970,
986
    CLTAsmNLH = 971,
987
    CLY = 972,
988
    CMPSC = 973,
989
    CP  = 974,
990
    CPDT  = 975,
991
    CPSDRdd = 976,
992
    CPSDRds = 977,
993
    CPSDRsd = 978,
994
    CPSDRss = 979,
995
    CPXT  = 980,
996
    CPYA  = 981,
997
    CR  = 982,
998
    CRB = 983,
999
    CRBAsm  = 984,
1000
    CRBAsmE = 985,
1001
    CRBAsmH = 986,
1002
    CRBAsmHE  = 987,
1003
    CRBAsmL = 988,
1004
    CRBAsmLE  = 989,
1005
    CRBAsmLH  = 990,
1006
    CRBAsmNE  = 991,
1007
    CRBAsmNH  = 992,
1008
    CRBAsmNHE = 993,
1009
    CRBAsmNL  = 994,
1010
    CRBAsmNLE = 995,
1011
    CRBAsmNLH = 996,
1012
    CRDTE = 997,
1013
    CRDTEOpt  = 998,
1014
    CRJ = 999,
1015
    CRJAsm  = 1000,
1016
    CRJAsmE = 1001,
1017
    CRJAsmH = 1002,
1018
    CRJAsmHE  = 1003,
1019
    CRJAsmL = 1004,
1020
    CRJAsmLE  = 1005,
1021
    CRJAsmLH  = 1006,
1022
    CRJAsmNE  = 1007,
1023
    CRJAsmNH  = 1008,
1024
    CRJAsmNHE = 1009,
1025
    CRJAsmNL  = 1010,
1026
    CRJAsmNLE = 1011,
1027
    CRJAsmNLH = 1012,
1028
    CRL = 1013,
1029
    CRT = 1014,
1030
    CRTAsm  = 1015,
1031
    CRTAsmE = 1016,
1032
    CRTAsmH = 1017,
1033
    CRTAsmHE  = 1018,
1034
    CRTAsmL = 1019,
1035
    CRTAsmLE  = 1020,
1036
    CRTAsmLH  = 1021,
1037
    CRTAsmNE  = 1022,
1038
    CRTAsmNH  = 1023,
1039
    CRTAsmNHE = 1024,
1040
    CRTAsmNL  = 1025,
1041
    CRTAsmNLE = 1026,
1042
    CRTAsmNLH = 1027,
1043
    CS  = 1028,
1044
    CSCH  = 1029,
1045
    CSDTR = 1030,
1046
    CSG = 1031,
1047
    CSP = 1032,
1048
    CSPG  = 1033,
1049
    CSST  = 1034,
1050
    CSXTR = 1035,
1051
    CSY = 1036,
1052
    CU12  = 1037,
1053
    CU12Opt = 1038,
1054
    CU14  = 1039,
1055
    CU14Opt = 1040,
1056
    CU21  = 1041,
1057
    CU21Opt = 1042,
1058
    CU24  = 1043,
1059
    CU24Opt = 1044,
1060
    CU41  = 1045,
1061
    CU42  = 1046,
1062
    CUDTR = 1047,
1063
    CUSE  = 1048,
1064
    CUTFU = 1049,
1065
    CUTFUOpt  = 1050,
1066
    CUUTF = 1051,
1067
    CUUTFOpt  = 1052,
1068
    CUXTR = 1053,
1069
    CVB = 1054,
1070
    CVBG  = 1055,
1071
    CVBY  = 1056,
1072
    CVD = 1057,
1073
    CVDG  = 1058,
1074
    CVDY  = 1059,
1075
    CXBR  = 1060,
1076
    CXFBR = 1061,
1077
    CXFBRA  = 1062,
1078
    CXFR  = 1063,
1079
    CXFTR = 1064,
1080
    CXGBR = 1065,
1081
    CXGBRA  = 1066,
1082
    CXGR  = 1067,
1083
    CXGTR = 1068,
1084
    CXGTRA  = 1069,
1085
    CXLFBR  = 1070,
1086
    CXLFTR  = 1071,
1087
    CXLGBR  = 1072,
1088
    CXLGTR  = 1073,
1089
    CXPT  = 1074,
1090
    CXR = 1075,
1091
    CXSTR = 1076,
1092
    CXTR  = 1077,
1093
    CXUTR = 1078,
1094
    CXZT  = 1079,
1095
    CY  = 1080,
1096
    CZDT  = 1081,
1097
    CZXT  = 1082,
1098
    D = 1083,
1099
    DD  = 1084,
1100
    DDB = 1085,
1101
    DDBR  = 1086,
1102
    DDR = 1087,
1103
    DDTR  = 1088,
1104
    DDTRA = 1089,
1105
    DE  = 1090,
1106
    DEB = 1091,
1107
    DEBR  = 1092,
1108
    DER = 1093,
1109
    DIAG  = 1094,
1110
    DIDBR = 1095,
1111
    DIEBR = 1096,
1112
    DL  = 1097,
1113
    DLG = 1098,
1114
    DLGR  = 1099,
1115
    DLR = 1100,
1116
    DP  = 1101,
1117
    DR  = 1102,
1118
    DSG = 1103,
1119
    DSGF  = 1104,
1120
    DSGFR = 1105,
1121
    DSGR  = 1106,
1122
    DXBR  = 1107,
1123
    DXR = 1108,
1124
    DXTR  = 1109,
1125
    DXTRA = 1110,
1126
    EAR = 1111,
1127
    ECAG  = 1112,
1128
    ECCTR = 1113,
1129
    ECPGA = 1114,
1130
    ECTG  = 1115,
1131
    ED  = 1116,
1132
    EDMK  = 1117,
1133
    EEDTR = 1118,
1134
    EEXTR = 1119,
1135
    EFPC  = 1120,
1136
    EPAIR = 1121,
1137
    EPAR  = 1122,
1138
    EPCTR = 1123,
1139
    EPSW  = 1124,
1140
    EREG  = 1125,
1141
    EREGG = 1126,
1142
    ESAIR = 1127,
1143
    ESAR  = 1128,
1144
    ESDTR = 1129,
1145
    ESEA  = 1130,
1146
    ESTA  = 1131,
1147
    ESXTR = 1132,
1148
    ETND  = 1133,
1149
    EX  = 1134,
1150
    EXRL  = 1135,
1151
    FIDBR = 1136,
1152
    FIDBRA  = 1137,
1153
    FIDR  = 1138,
1154
    FIDTR = 1139,
1155
    FIEBR = 1140,
1156
    FIEBRA  = 1141,
1157
    FIER  = 1142,
1158
    FIXBR = 1143,
1159
    FIXBRA  = 1144,
1160
    FIXR  = 1145,
1161
    FIXTR = 1146,
1162
    FLOGR = 1147,
1163
    HDR = 1148,
1164
    HER = 1149,
1165
    HSCH  = 1150,
1166
    IAC = 1151,
1167
    IC  = 1152,
1168
    IC32  = 1153,
1169
    IC32Y = 1154,
1170
    ICM = 1155,
1171
    ICMH  = 1156,
1172
    ICMY  = 1157,
1173
    ICY = 1158,
1174
    IDTE  = 1159,
1175
    IDTEOpt = 1160,
1176
    IEDTR = 1161,
1177
    IEXTR = 1162,
1178
    IIHF  = 1163,
1179
    IIHH  = 1164,
1180
    IIHL  = 1165,
1181
    IILF  = 1166,
1182
    IILH  = 1167,
1183
    IILL  = 1168,
1184
    IPK = 1169,
1185
    IPM = 1170,
1186
    IPTE  = 1171,
1187
    IPTEOpt = 1172,
1188
    IPTEOptOpt  = 1173,
1189
    IRBM  = 1174,
1190
    ISKE  = 1175,
1191
    IVSK  = 1176,
1192
    InsnE = 1177,
1193
    InsnRI  = 1178,
1194
    InsnRIE = 1179,
1195
    InsnRIL = 1180,
1196
    InsnRILU  = 1181,
1197
    InsnRIS = 1182,
1198
    InsnRR  = 1183,
1199
    InsnRRE = 1184,
1200
    InsnRRF = 1185,
1201
    InsnRRS = 1186,
1202
    InsnRS  = 1187,
1203
    InsnRSE = 1188,
1204
    InsnRSI = 1189,
1205
    InsnRSY = 1190,
1206
    InsnRX  = 1191,
1207
    InsnRXE = 1192,
1208
    InsnRXF = 1193,
1209
    InsnRXY = 1194,
1210
    InsnS = 1195,
1211
    InsnSI  = 1196,
1212
    InsnSIL = 1197,
1213
    InsnSIY = 1198,
1214
    InsnSS  = 1199,
1215
    InsnSSE = 1200,
1216
    InsnSSF = 1201,
1217
    J = 1202,
1218
    JAsmE = 1203,
1219
    JAsmH = 1204,
1220
    JAsmHE  = 1205,
1221
    JAsmL = 1206,
1222
    JAsmLE  = 1207,
1223
    JAsmLH  = 1208,
1224
    JAsmM = 1209,
1225
    JAsmNE  = 1210,
1226
    JAsmNH  = 1211,
1227
    JAsmNHE = 1212,
1228
    JAsmNL  = 1213,
1229
    JAsmNLE = 1214,
1230
    JAsmNLH = 1215,
1231
    JAsmNM  = 1216,
1232
    JAsmNO  = 1217,
1233
    JAsmNP  = 1218,
1234
    JAsmNZ  = 1219,
1235
    JAsmO = 1220,
1236
    JAsmP = 1221,
1237
    JAsmZ = 1222,
1238
    JG  = 1223,
1239
    JGAsmE  = 1224,
1240
    JGAsmH  = 1225,
1241
    JGAsmHE = 1226,
1242
    JGAsmL  = 1227,
1243
    JGAsmLE = 1228,
1244
    JGAsmLH = 1229,
1245
    JGAsmM  = 1230,
1246
    JGAsmNE = 1231,
1247
    JGAsmNH = 1232,
1248
    JGAsmNHE  = 1233,
1249
    JGAsmNL = 1234,
1250
    JGAsmNLE  = 1235,
1251
    JGAsmNLH  = 1236,
1252
    JGAsmNM = 1237,
1253
    JGAsmNO = 1238,
1254
    JGAsmNP = 1239,
1255
    JGAsmNZ = 1240,
1256
    JGAsmO  = 1241,
1257
    JGAsmP  = 1242,
1258
    JGAsmZ  = 1243,
1259
    KDB = 1244,
1260
    KDBR  = 1245,
1261
    KDTR  = 1246,
1262
    KEB = 1247,
1263
    KEBR  = 1248,
1264
    KIMD  = 1249,
1265
    KLMD  = 1250,
1266
    KM  = 1251,
1267
    KMA = 1252,
1268
    KMAC  = 1253,
1269
    KMC = 1254,
1270
    KMCTR = 1255,
1271
    KMF = 1256,
1272
    KMO = 1257,
1273
    KXBR  = 1258,
1274
    KXTR  = 1259,
1275
    L = 1260,
1276
    LA  = 1261,
1277
    LAA = 1262,
1278
    LAAG  = 1263,
1279
    LAAL  = 1264,
1280
    LAALG = 1265,
1281
    LAE = 1266,
1282
    LAEY  = 1267,
1283
    LAM = 1268,
1284
    LAMY  = 1269,
1285
    LAN = 1270,
1286
    LANG  = 1271,
1287
    LAO = 1272,
1288
    LAOG  = 1273,
1289
    LARL  = 1274,
1290
    LASP  = 1275,
1291
    LAT = 1276,
1292
    LAX = 1277,
1293
    LAXG  = 1278,
1294
    LAY = 1279,
1295
    LB  = 1280,
1296
    LBH = 1281,
1297
    LBR = 1282,
1298
    LCBB  = 1283,
1299
    LCCTL = 1284,
1300
    LCDBR = 1285,
1301
    LCDFR = 1286,
1302
    LCDFR_32  = 1287,
1303
    LCDR  = 1288,
1304
    LCEBR = 1289,
1305
    LCER  = 1290,
1306
    LCGFR = 1291,
1307
    LCGR  = 1292,
1308
    LCR = 1293,
1309
    LCTL  = 1294,
1310
    LCTLG = 1295,
1311
    LCXBR = 1296,
1312
    LCXR  = 1297,
1313
    LD  = 1298,
1314
    LDE = 1299,
1315
    LDE32 = 1300,
1316
    LDEB  = 1301,
1317
    LDEBR = 1302,
1318
    LDER  = 1303,
1319
    LDETR = 1304,
1320
    LDGR  = 1305,
1321
    LDR = 1306,
1322
    LDR32 = 1307,
1323
    LDXBR = 1308,
1324
    LDXBRA  = 1309,
1325
    LDXR  = 1310,
1326
    LDXTR = 1311,
1327
    LDY = 1312,
1328
    LE  = 1313,
1329
    LEDBR = 1314,
1330
    LEDBRA  = 1315,
1331
    LEDR  = 1316,
1332
    LEDTR = 1317,
1333
    LER = 1318,
1334
    LEXBR = 1319,
1335
    LEXBRA  = 1320,
1336
    LEXR  = 1321,
1337
    LEY = 1322,
1338
    LFAS  = 1323,
1339
    LFH = 1324,
1340
    LFHAT = 1325,
1341
    LFPC  = 1326,
1342
    LG  = 1327,
1343
    LGAT  = 1328,
1344
    LGB = 1329,
1345
    LGBR  = 1330,
1346
    LGDR  = 1331,
1347
    LGF = 1332,
1348
    LGFI  = 1333,
1349
    LGFR  = 1334,
1350
    LGFRL = 1335,
1351
    LGG = 1336,
1352
    LGH = 1337,
1353
    LGHI  = 1338,
1354
    LGHR  = 1339,
1355
    LGHRL = 1340,
1356
    LGR = 1341,
1357
    LGRL  = 1342,
1358
    LGSC  = 1343,
1359
    LH  = 1344,
1360
    LHH = 1345,
1361
    LHI = 1346,
1362
    LHR = 1347,
1363
    LHRL  = 1348,
1364
    LHY = 1349,
1365
    LLC = 1350,
1366
    LLCH  = 1351,
1367
    LLCR  = 1352,
1368
    LLGC  = 1353,
1369
    LLGCR = 1354,
1370
    LLGF  = 1355,
1371
    LLGFAT  = 1356,
1372
    LLGFR = 1357,
1373
    LLGFRL  = 1358,
1374
    LLGFSG  = 1359,
1375
    LLGH  = 1360,
1376
    LLGHR = 1361,
1377
    LLGHRL  = 1362,
1378
    LLGT  = 1363,
1379
    LLGTAT  = 1364,
1380
    LLGTR = 1365,
1381
    LLH = 1366,
1382
    LLHH  = 1367,
1383
    LLHR  = 1368,
1384
    LLHRL = 1369,
1385
    LLIHF = 1370,
1386
    LLIHH = 1371,
1387
    LLIHL = 1372,
1388
    LLILF = 1373,
1389
    LLILH = 1374,
1390
    LLILL = 1375,
1391
    LLZRGF  = 1376,
1392
    LM  = 1377,
1393
    LMD = 1378,
1394
    LMG = 1379,
1395
    LMH = 1380,
1396
    LMY = 1381,
1397
    LNDBR = 1382,
1398
    LNDFR = 1383,
1399
    LNDFR_32  = 1384,
1400
    LNDR  = 1385,
1401
    LNEBR = 1386,
1402
    LNER  = 1387,
1403
    LNGFR = 1388,
1404
    LNGR  = 1389,
1405
    LNR = 1390,
1406
    LNXBR = 1391,
1407
    LNXR  = 1392,
1408
    LOC = 1393,
1409
    LOCAsm  = 1394,
1410
    LOCAsmE = 1395,
1411
    LOCAsmH = 1396,
1412
    LOCAsmHE  = 1397,
1413
    LOCAsmL = 1398,
1414
    LOCAsmLE  = 1399,
1415
    LOCAsmLH  = 1400,
1416
    LOCAsmM = 1401,
1417
    LOCAsmNE  = 1402,
1418
    LOCAsmNH  = 1403,
1419
    LOCAsmNHE = 1404,
1420
    LOCAsmNL  = 1405,
1421
    LOCAsmNLE = 1406,
1422
    LOCAsmNLH = 1407,
1423
    LOCAsmNM  = 1408,
1424
    LOCAsmNO  = 1409,
1425
    LOCAsmNP  = 1410,
1426
    LOCAsmNZ  = 1411,
1427
    LOCAsmO = 1412,
1428
    LOCAsmP = 1413,
1429
    LOCAsmZ = 1414,
1430
    LOCFH = 1415,
1431
    LOCFHAsm  = 1416,
1432
    LOCFHAsmE = 1417,
1433
    LOCFHAsmH = 1418,
1434
    LOCFHAsmHE  = 1419,
1435
    LOCFHAsmL = 1420,
1436
    LOCFHAsmLE  = 1421,
1437
    LOCFHAsmLH  = 1422,
1438
    LOCFHAsmM = 1423,
1439
    LOCFHAsmNE  = 1424,
1440
    LOCFHAsmNH  = 1425,
1441
    LOCFHAsmNHE = 1426,
1442
    LOCFHAsmNL  = 1427,
1443
    LOCFHAsmNLE = 1428,
1444
    LOCFHAsmNLH = 1429,
1445
    LOCFHAsmNM  = 1430,
1446
    LOCFHAsmNO  = 1431,
1447
    LOCFHAsmNP  = 1432,
1448
    LOCFHAsmNZ  = 1433,
1449
    LOCFHAsmO = 1434,
1450
    LOCFHAsmP = 1435,
1451
    LOCFHAsmZ = 1436,
1452
    LOCFHR  = 1437,
1453
    LOCFHRAsm = 1438,
1454
    LOCFHRAsmE  = 1439,
1455
    LOCFHRAsmH  = 1440,
1456
    LOCFHRAsmHE = 1441,
1457
    LOCFHRAsmL  = 1442,
1458
    LOCFHRAsmLE = 1443,
1459
    LOCFHRAsmLH = 1444,
1460
    LOCFHRAsmM  = 1445,
1461
    LOCFHRAsmNE = 1446,
1462
    LOCFHRAsmNH = 1447,
1463
    LOCFHRAsmNHE  = 1448,
1464
    LOCFHRAsmNL = 1449,
1465
    LOCFHRAsmNLE  = 1450,
1466
    LOCFHRAsmNLH  = 1451,
1467
    LOCFHRAsmNM = 1452,
1468
    LOCFHRAsmNO = 1453,
1469
    LOCFHRAsmNP = 1454,
1470
    LOCFHRAsmNZ = 1455,
1471
    LOCFHRAsmO  = 1456,
1472
    LOCFHRAsmP  = 1457,
1473
    LOCFHRAsmZ  = 1458,
1474
    LOCG  = 1459,
1475
    LOCGAsm = 1460,
1476
    LOCGAsmE  = 1461,
1477
    LOCGAsmH  = 1462,
1478
    LOCGAsmHE = 1463,
1479
    LOCGAsmL  = 1464,
1480
    LOCGAsmLE = 1465,
1481
    LOCGAsmLH = 1466,
1482
    LOCGAsmM  = 1467,
1483
    LOCGAsmNE = 1468,
1484
    LOCGAsmNH = 1469,
1485
    LOCGAsmNHE  = 1470,
1486
    LOCGAsmNL = 1471,
1487
    LOCGAsmNLE  = 1472,
1488
    LOCGAsmNLH  = 1473,
1489
    LOCGAsmNM = 1474,
1490
    LOCGAsmNO = 1475,
1491
    LOCGAsmNP = 1476,
1492
    LOCGAsmNZ = 1477,
1493
    LOCGAsmO  = 1478,
1494
    LOCGAsmP  = 1479,
1495
    LOCGAsmZ  = 1480,
1496
    LOCGHI  = 1481,
1497
    LOCGHIAsm = 1482,
1498
    LOCGHIAsmE  = 1483,
1499
    LOCGHIAsmH  = 1484,
1500
    LOCGHIAsmHE = 1485,
1501
    LOCGHIAsmL  = 1486,
1502
    LOCGHIAsmLE = 1487,
1503
    LOCGHIAsmLH = 1488,
1504
    LOCGHIAsmM  = 1489,
1505
    LOCGHIAsmNE = 1490,
1506
    LOCGHIAsmNH = 1491,
1507
    LOCGHIAsmNHE  = 1492,
1508
    LOCGHIAsmNL = 1493,
1509
    LOCGHIAsmNLE  = 1494,
1510
    LOCGHIAsmNLH  = 1495,
1511
    LOCGHIAsmNM = 1496,
1512
    LOCGHIAsmNO = 1497,
1513
    LOCGHIAsmNP = 1498,
1514
    LOCGHIAsmNZ = 1499,
1515
    LOCGHIAsmO  = 1500,
1516
    LOCGHIAsmP  = 1501,
1517
    LOCGHIAsmZ  = 1502,
1518
    LOCGR = 1503,
1519
    LOCGRAsm  = 1504,
1520
    LOCGRAsmE = 1505,
1521
    LOCGRAsmH = 1506,
1522
    LOCGRAsmHE  = 1507,
1523
    LOCGRAsmL = 1508,
1524
    LOCGRAsmLE  = 1509,
1525
    LOCGRAsmLH  = 1510,
1526
    LOCGRAsmM = 1511,
1527
    LOCGRAsmNE  = 1512,
1528
    LOCGRAsmNH  = 1513,
1529
    LOCGRAsmNHE = 1514,
1530
    LOCGRAsmNL  = 1515,
1531
    LOCGRAsmNLE = 1516,
1532
    LOCGRAsmNLH = 1517,
1533
    LOCGRAsmNM  = 1518,
1534
    LOCGRAsmNO  = 1519,
1535
    LOCGRAsmNP  = 1520,
1536
    LOCGRAsmNZ  = 1521,
1537
    LOCGRAsmO = 1522,
1538
    LOCGRAsmP = 1523,
1539
    LOCGRAsmZ = 1524,
1540
    LOCHHI  = 1525,
1541
    LOCHHIAsm = 1526,
1542
    LOCHHIAsmE  = 1527,
1543
    LOCHHIAsmH  = 1528,
1544
    LOCHHIAsmHE = 1529,
1545
    LOCHHIAsmL  = 1530,
1546
    LOCHHIAsmLE = 1531,
1547
    LOCHHIAsmLH = 1532,
1548
    LOCHHIAsmM  = 1533,
1549
    LOCHHIAsmNE = 1534,
1550
    LOCHHIAsmNH = 1535,
1551
    LOCHHIAsmNHE  = 1536,
1552
    LOCHHIAsmNL = 1537,
1553
    LOCHHIAsmNLE  = 1538,
1554
    LOCHHIAsmNLH  = 1539,
1555
    LOCHHIAsmNM = 1540,
1556
    LOCHHIAsmNO = 1541,
1557
    LOCHHIAsmNP = 1542,
1558
    LOCHHIAsmNZ = 1543,
1559
    LOCHHIAsmO  = 1544,
1560
    LOCHHIAsmP  = 1545,
1561
    LOCHHIAsmZ  = 1546,
1562
    LOCHI = 1547,
1563
    LOCHIAsm  = 1548,
1564
    LOCHIAsmE = 1549,
1565
    LOCHIAsmH = 1550,
1566
    LOCHIAsmHE  = 1551,
1567
    LOCHIAsmL = 1552,
1568
    LOCHIAsmLE  = 1553,
1569
    LOCHIAsmLH  = 1554,
1570
    LOCHIAsmM = 1555,
1571
    LOCHIAsmNE  = 1556,
1572
    LOCHIAsmNH  = 1557,
1573
    LOCHIAsmNHE = 1558,
1574
    LOCHIAsmNL  = 1559,
1575
    LOCHIAsmNLE = 1560,
1576
    LOCHIAsmNLH = 1561,
1577
    LOCHIAsmNM  = 1562,
1578
    LOCHIAsmNO  = 1563,
1579
    LOCHIAsmNP  = 1564,
1580
    LOCHIAsmNZ  = 1565,
1581
    LOCHIAsmO = 1566,
1582
    LOCHIAsmP = 1567,
1583
    LOCHIAsmZ = 1568,
1584
    LOCR  = 1569,
1585
    LOCRAsm = 1570,
1586
    LOCRAsmE  = 1571,
1587
    LOCRAsmH  = 1572,
1588
    LOCRAsmHE = 1573,
1589
    LOCRAsmL  = 1574,
1590
    LOCRAsmLE = 1575,
1591
    LOCRAsmLH = 1576,
1592
    LOCRAsmM  = 1577,
1593
    LOCRAsmNE = 1578,
1594
    LOCRAsmNH = 1579,
1595
    LOCRAsmNHE  = 1580,
1596
    LOCRAsmNL = 1581,
1597
    LOCRAsmNLE  = 1582,
1598
    LOCRAsmNLH  = 1583,
1599
    LOCRAsmNM = 1584,
1600
    LOCRAsmNO = 1585,
1601
    LOCRAsmNP = 1586,
1602
    LOCRAsmNZ = 1587,
1603
    LOCRAsmO  = 1588,
1604
    LOCRAsmP  = 1589,
1605
    LOCRAsmZ  = 1590,
1606
    LPCTL = 1591,
1607
    LPD = 1592,
1608
    LPDBR = 1593,
1609
    LPDFR = 1594,
1610
    LPDFR_32  = 1595,
1611
    LPDG  = 1596,
1612
    LPDR  = 1597,
1613
    LPEBR = 1598,
1614
    LPER  = 1599,
1615
    LPGFR = 1600,
1616
    LPGR  = 1601,
1617
    LPP = 1602,
1618
    LPQ = 1603,
1619
    LPR = 1604,
1620
    LPSW  = 1605,
1621
    LPSWE = 1606,
1622
    LPTEA = 1607,
1623
    LPXBR = 1608,
1624
    LPXR  = 1609,
1625
    LR  = 1610,
1626
    LRA = 1611,
1627
    LRAG  = 1612,
1628
    LRAY  = 1613,
1629
    LRDR  = 1614,
1630
    LRER  = 1615,
1631
    LRL = 1616,
1632
    LRV = 1617,
1633
    LRVG  = 1618,
1634
    LRVGR = 1619,
1635
    LRVH  = 1620,
1636
    LRVR  = 1621,
1637
    LSCTL = 1622,
1638
    LT  = 1623,
1639
    LTDBR = 1624,
1640
    LTDBRCompare  = 1625,
1641
    LTDR  = 1626,
1642
    LTDTR = 1627,
1643
    LTEBR = 1628,
1644
    LTEBRCompare  = 1629,
1645
    LTER  = 1630,
1646
    LTG = 1631,
1647
    LTGF  = 1632,
1648
    LTGFR = 1633,
1649
    LTGR  = 1634,
1650
    LTR = 1635,
1651
    LTXBR = 1636,
1652
    LTXBRCompare  = 1637,
1653
    LTXR  = 1638,
1654
    LTXTR = 1639,
1655
    LURA  = 1640,
1656
    LURAG = 1641,
1657
    LXD = 1642,
1658
    LXDB  = 1643,
1659
    LXDBR = 1644,
1660
    LXDR  = 1645,
1661
    LXDTR = 1646,
1662
    LXE = 1647,
1663
    LXEB  = 1648,
1664
    LXEBR = 1649,
1665
    LXER  = 1650,
1666
    LXR = 1651,
1667
    LY  = 1652,
1668
    LZDR  = 1653,
1669
    LZER  = 1654,
1670
    LZRF  = 1655,
1671
    LZRG  = 1656,
1672
    LZXR  = 1657,
1673
    M = 1658,
1674
    MAD = 1659,
1675
    MADB  = 1660,
1676
    MADBR = 1661,
1677
    MADR  = 1662,
1678
    MAE = 1663,
1679
    MAEB  = 1664,
1680
    MAEBR = 1665,
1681
    MAER  = 1666,
1682
    MAY = 1667,
1683
    MAYH  = 1668,
1684
    MAYHR = 1669,
1685
    MAYL  = 1670,
1686
    MAYLR = 1671,
1687
    MAYR  = 1672,
1688
    MC  = 1673,
1689
    MD  = 1674,
1690
    MDB = 1675,
1691
    MDBR  = 1676,
1692
    MDE = 1677,
1693
    MDEB  = 1678,
1694
    MDEBR = 1679,
1695
    MDER  = 1680,
1696
    MDR = 1681,
1697
    MDTR  = 1682,
1698
    MDTRA = 1683,
1699
    ME  = 1684,
1700
    MEE = 1685,
1701
    MEEB  = 1686,
1702
    MEEBR = 1687,
1703
    MEER  = 1688,
1704
    MER = 1689,
1705
    MFY = 1690,
1706
    MG  = 1691,
1707
    MGH = 1692,
1708
    MGHI  = 1693,
1709
    MGRK  = 1694,
1710
    MH  = 1695,
1711
    MHI = 1696,
1712
    MHY = 1697,
1713
    ML  = 1698,
1714
    MLG = 1699,
1715
    MLGR  = 1700,
1716
    MLR = 1701,
1717
    MP  = 1702,
1718
    MR  = 1703,
1719
    MS  = 1704,
1720
    MSC = 1705,
1721
    MSCH  = 1706,
1722
    MSD = 1707,
1723
    MSDB  = 1708,
1724
    MSDBR = 1709,
1725
    MSDR  = 1710,
1726
    MSE = 1711,
1727
    MSEB  = 1712,
1728
    MSEBR = 1713,
1729
    MSER  = 1714,
1730
    MSFI  = 1715,
1731
    MSG = 1716,
1732
    MSGC  = 1717,
1733
    MSGF  = 1718,
1734
    MSGFI = 1719,
1735
    MSGFR = 1720,
1736
    MSGR  = 1721,
1737
    MSGRKC  = 1722,
1738
    MSR = 1723,
1739
    MSRKC = 1724,
1740
    MSTA  = 1725,
1741
    MSY = 1726,
1742
    MVC = 1727,
1743
    MVCDK = 1728,
1744
    MVCIN = 1729,
1745
    MVCK  = 1730,
1746
    MVCL  = 1731,
1747
    MVCLE = 1732,
1748
    MVCLU = 1733,
1749
    MVCOS = 1734,
1750
    MVCP  = 1735,
1751
    MVCS  = 1736,
1752
    MVCSK = 1737,
1753
    MVGHI = 1738,
1754
    MVHHI = 1739,
1755
    MVHI  = 1740,
1756
    MVI = 1741,
1757
    MVIY  = 1742,
1758
    MVN = 1743,
1759
    MVO = 1744,
1760
    MVPG  = 1745,
1761
    MVST  = 1746,
1762
    MVZ = 1747,
1763
    MXBR  = 1748,
1764
    MXD = 1749,
1765
    MXDB  = 1750,
1766
    MXDBR = 1751,
1767
    MXDR  = 1752,
1768
    MXR = 1753,
1769
    MXTR  = 1754,
1770
    MXTRA = 1755,
1771
    MY  = 1756,
1772
    MYH = 1757,
1773
    MYHR  = 1758,
1774
    MYL = 1759,
1775
    MYLR  = 1760,
1776
    MYR = 1761,
1777
    N = 1762,
1778
    NC  = 1763,
1779
    NG  = 1764,
1780
    NGR = 1765,
1781
    NGRK  = 1766,
1782
    NI  = 1767,
1783
    NIAI  = 1768,
1784
    NIHF  = 1769,
1785
    NIHH  = 1770,
1786
    NIHL  = 1771,
1787
    NILF  = 1772,
1788
    NILH  = 1773,
1789
    NILL  = 1774,
1790
    NIY = 1775,
1791
    NR  = 1776,
1792
    NRK = 1777,
1793
    NTSTG = 1778,
1794
    NY  = 1779,
1795
    O = 1780,
1796
    OC  = 1781,
1797
    OG  = 1782,
1798
    OGR = 1783,
1799
    OGRK  = 1784,
1800
    OI  = 1785,
1801
    OIHF  = 1786,
1802
    OIHH  = 1787,
1803
    OIHL  = 1788,
1804
    OILF  = 1789,
1805
    OILH  = 1790,
1806
    OILL  = 1791,
1807
    OIY = 1792,
1808
    OR  = 1793,
1809
    ORK = 1794,
1810
    OY  = 1795,
1811
    PACK  = 1796,
1812
    PALB  = 1797,
1813
    PC  = 1798,
1814
    PCC = 1799,
1815
    PCKMO = 1800,
1816
    PFD = 1801,
1817
    PFDRL = 1802,
1818
    PFMF  = 1803,
1819
    PFPO  = 1804,
1820
    PGIN  = 1805,
1821
    PGOUT = 1806,
1822
    PKA = 1807,
1823
    PKU = 1808,
1824
    PLO = 1809,
1825
    POPCNT  = 1810,
1826
    PPA = 1811,
1827
    PPNO  = 1812,
1828
    PR  = 1813,
1829
    PRNO  = 1814,
1830
    PT  = 1815,
1831
    PTF = 1816,
1832
    PTFF  = 1817,
1833
    PTI = 1818,
1834
    PTLB  = 1819,
1835
    QADTR = 1820,
1836
    QAXTR = 1821,
1837
    QCTRI = 1822,
1838
    QSI = 1823,
1839
    RCHP  = 1824,
1840
    RISBG = 1825,
1841
    RISBG32 = 1826,
1842
    RISBGN  = 1827,
1843
    RISBHG  = 1828,
1844
    RISBLG  = 1829,
1845
    RLL = 1830,
1846
    RLLG  = 1831,
1847
    RNSBG = 1832,
1848
    ROSBG = 1833,
1849
    RP  = 1834,
1850
    RRBE  = 1835,
1851
    RRBM  = 1836,
1852
    RRDTR = 1837,
1853
    RRXTR = 1838,
1854
    RSCH  = 1839,
1855
    RXSBG = 1840,
1856
    S = 1841,
1857
    SAC = 1842,
1858
    SACF  = 1843,
1859
    SAL = 1844,
1860
    SAM24 = 1845,
1861
    SAM31 = 1846,
1862
    SAM64 = 1847,
1863
    SAR = 1848,
1864
    SCCTR = 1849,
1865
    SCHM  = 1850,
1866
    SCK = 1851,
1867
    SCKC  = 1852,
1868
    SCKPF = 1853,
1869
    SD  = 1854,
1870
    SDB = 1855,
1871
    SDBR  = 1856,
1872
    SDR = 1857,
1873
    SDTR  = 1858,
1874
    SDTRA = 1859,
1875
    SE  = 1860,
1876
    SEB = 1861,
1877
    SEBR  = 1862,
1878
    SER = 1863,
1879
    SFASR = 1864,
1880
    SFPC  = 1865,
1881
    SG  = 1866,
1882
    SGF = 1867,
1883
    SGFR  = 1868,
1884
    SGH = 1869,
1885
    SGR = 1870,
1886
    SGRK  = 1871,
1887
    SH  = 1872,
1888
    SHHHR = 1873,
1889
    SHHLR = 1874,
1890
    SHY = 1875,
1891
    SIE = 1876,
1892
    SIGA  = 1877,
1893
    SIGP  = 1878,
1894
    SL  = 1879,
1895
    SLA = 1880,
1896
    SLAG  = 1881,
1897
    SLAK  = 1882,
1898
    SLB = 1883,
1899
    SLBG  = 1884,
1900
    SLBGR = 1885,
1901
    SLBR  = 1886,
1902
    SLDA  = 1887,
1903
    SLDL  = 1888,
1904
    SLDT  = 1889,
1905
    SLFI  = 1890,
1906
    SLG = 1891,
1907
    SLGF  = 1892,
1908
    SLGFI = 1893,
1909
    SLGFR = 1894,
1910
    SLGR  = 1895,
1911
    SLGRK = 1896,
1912
    SLHHHR  = 1897,
1913
    SLHHLR  = 1898,
1914
    SLL = 1899,
1915
    SLLG  = 1900,
1916
    SLLK  = 1901,
1917
    SLR = 1902,
1918
    SLRK  = 1903,
1919
    SLXT  = 1904,
1920
    SLY = 1905,
1921
    SP  = 1906,
1922
    SPCTR = 1907,
1923
    SPKA  = 1908,
1924
    SPM = 1909,
1925
    SPT = 1910,
1926
    SPX = 1911,
1927
    SQD = 1912,
1928
    SQDB  = 1913,
1929
    SQDBR = 1914,
1930
    SQDR  = 1915,
1931
    SQE = 1916,
1932
    SQEB  = 1917,
1933
    SQEBR = 1918,
1934
    SQER  = 1919,
1935
    SQXBR = 1920,
1936
    SQXR  = 1921,
1937
    SR  = 1922,
1938
    SRA = 1923,
1939
    SRAG  = 1924,
1940
    SRAK  = 1925,
1941
    SRDA  = 1926,
1942
    SRDL  = 1927,
1943
    SRDT  = 1928,
1944
    SRK = 1929,
1945
    SRL = 1930,
1946
    SRLG  = 1931,
1947
    SRLK  = 1932,
1948
    SRNM  = 1933,
1949
    SRNMB = 1934,
1950
    SRNMT = 1935,
1951
    SRP = 1936,
1952
    SRST  = 1937,
1953
    SRSTU = 1938,
1954
    SRXT  = 1939,
1955
    SSAIR = 1940,
1956
    SSAR  = 1941,
1957
    SSCH  = 1942,
1958
    SSKE  = 1943,
1959
    SSKEOpt = 1944,
1960
    SSM = 1945,
1961
    ST  = 1946,
1962
    STAM  = 1947,
1963
    STAMY = 1948,
1964
    STAP  = 1949,
1965
    STC = 1950,
1966
    STCH  = 1951,
1967
    STCK  = 1952,
1968
    STCKC = 1953,
1969
    STCKE = 1954,
1970
    STCKF = 1955,
1971
    STCM  = 1956,
1972
    STCMH = 1957,
1973
    STCMY = 1958,
1974
    STCPS = 1959,
1975
    STCRW = 1960,
1976
    STCTG = 1961,
1977
    STCTL = 1962,
1978
    STCY  = 1963,
1979
    STD = 1964,
1980
    STDY  = 1965,
1981
    STE = 1966,
1982
    STEY  = 1967,
1983
    STFH  = 1968,
1984
    STFL  = 1969,
1985
    STFLE = 1970,
1986
    STFPC = 1971,
1987
    STG = 1972,
1988
    STGRL = 1973,
1989
    STGSC = 1974,
1990
    STH = 1975,
1991
    STHH  = 1976,
1992
    STHRL = 1977,
1993
    STHY  = 1978,
1994
    STIDP = 1979,
1995
    STM = 1980,
1996
    STMG  = 1981,
1997
    STMH  = 1982,
1998
    STMY  = 1983,
1999
    STNSM = 1984,
2000
    STOC  = 1985,
2001
    STOCAsm = 1986,
2002
    STOCAsmE  = 1987,
2003
    STOCAsmH  = 1988,
2004
    STOCAsmHE = 1989,
2005
    STOCAsmL  = 1990,
2006
    STOCAsmLE = 1991,
2007
    STOCAsmLH = 1992,
2008
    STOCAsmM  = 1993,
2009
    STOCAsmNE = 1994,
2010
    STOCAsmNH = 1995,
2011
    STOCAsmNHE  = 1996,
2012
    STOCAsmNL = 1997,
2013
    STOCAsmNLE  = 1998,
2014
    STOCAsmNLH  = 1999,
2015
    STOCAsmNM = 2000,
2016
    STOCAsmNO = 2001,
2017
    STOCAsmNP = 2002,
2018
    STOCAsmNZ = 2003,
2019
    STOCAsmO  = 2004,
2020
    STOCAsmP  = 2005,
2021
    STOCAsmZ  = 2006,
2022
    STOCFH  = 2007,
2023
    STOCFHAsm = 2008,
2024
    STOCFHAsmE  = 2009,
2025
    STOCFHAsmH  = 2010,
2026
    STOCFHAsmHE = 2011,
2027
    STOCFHAsmL  = 2012,
2028
    STOCFHAsmLE = 2013,
2029
    STOCFHAsmLH = 2014,
2030
    STOCFHAsmM  = 2015,
2031
    STOCFHAsmNE = 2016,
2032
    STOCFHAsmNH = 2017,
2033
    STOCFHAsmNHE  = 2018,
2034
    STOCFHAsmNL = 2019,
2035
    STOCFHAsmNLE  = 2020,
2036
    STOCFHAsmNLH  = 2021,
2037
    STOCFHAsmNM = 2022,
2038
    STOCFHAsmNO = 2023,
2039
    STOCFHAsmNP = 2024,
2040
    STOCFHAsmNZ = 2025,
2041
    STOCFHAsmO  = 2026,
2042
    STOCFHAsmP  = 2027,
2043
    STOCFHAsmZ  = 2028,
2044
    STOCG = 2029,
2045
    STOCGAsm  = 2030,
2046
    STOCGAsmE = 2031,
2047
    STOCGAsmH = 2032,
2048
    STOCGAsmHE  = 2033,
2049
    STOCGAsmL = 2034,
2050
    STOCGAsmLE  = 2035,
2051
    STOCGAsmLH  = 2036,
2052
    STOCGAsmM = 2037,
2053
    STOCGAsmNE  = 2038,
2054
    STOCGAsmNH  = 2039,
2055
    STOCGAsmNHE = 2040,
2056
    STOCGAsmNL  = 2041,
2057
    STOCGAsmNLE = 2042,
2058
    STOCGAsmNLH = 2043,
2059
    STOCGAsmNM  = 2044,
2060
    STOCGAsmNO  = 2045,
2061
    STOCGAsmNP  = 2046,
2062
    STOCGAsmNZ  = 2047,
2063
    STOCGAsmO = 2048,
2064
    STOCGAsmP = 2049,
2065
    STOCGAsmZ = 2050,
2066
    STOSM = 2051,
2067
    STPQ  = 2052,
2068
    STPT  = 2053,
2069
    STPX  = 2054,
2070
    STRAG = 2055,
2071
    STRL  = 2056,
2072
    STRV  = 2057,
2073
    STRVG = 2058,
2074
    STRVH = 2059,
2075
    STSCH = 2060,
2076
    STSI  = 2061,
2077
    STURA = 2062,
2078
    STURG = 2063,
2079
    STY = 2064,
2080
    SU  = 2065,
2081
    SUR = 2066,
2082
    SVC = 2067,
2083
    SW  = 2068,
2084
    SWR = 2069,
2085
    SXBR  = 2070,
2086
    SXR = 2071,
2087
    SXTR  = 2072,
2088
    SXTRA = 2073,
2089
    SY  = 2074,
2090
    TABORT  = 2075,
2091
    TAM = 2076,
2092
    TAR = 2077,
2093
    TB  = 2078,
2094
    TBDR  = 2079,
2095
    TBEDR = 2080,
2096
    TBEGIN  = 2081,
2097
    TBEGINC = 2082,
2098
    TCDB  = 2083,
2099
    TCEB  = 2084,
2100
    TCXB  = 2085,
2101
    TDCDT = 2086,
2102
    TDCET = 2087,
2103
    TDCXT = 2088,
2104
    TDGDT = 2089,
2105
    TDGET = 2090,
2106
    TDGXT = 2091,
2107
    TEND  = 2092,
2108
    THDER = 2093,
2109
    THDR  = 2094,
2110
    TM  = 2095,
2111
    TMHH  = 2096,
2112
    TMHL  = 2097,
2113
    TMLH  = 2098,
2114
    TMLL  = 2099,
2115
    TMY = 2100,
2116
    TP  = 2101,
2117
    TPI = 2102,
2118
    TPROT = 2103,
2119
    TR  = 2104,
2120
    TRACE = 2105,
2121
    TRACG = 2106,
2122
    TRAP2 = 2107,
2123
    TRAP4 = 2108,
2124
    TRE = 2109,
2125
    TROO  = 2110,
2126
    TROOOpt = 2111,
2127
    TROT  = 2112,
2128
    TROTOpt = 2113,
2129
    TRT = 2114,
2130
    TRTE  = 2115,
2131
    TRTEOpt = 2116,
2132
    TRTO  = 2117,
2133
    TRTOOpt = 2118,
2134
    TRTR  = 2119,
2135
    TRTRE = 2120,
2136
    TRTREOpt  = 2121,
2137
    TRTT  = 2122,
2138
    TRTTOpt = 2123,
2139
    TS  = 2124,
2140
    TSCH  = 2125,
2141
    UNPK  = 2126,
2142
    UNPKA = 2127,
2143
    UNPKU = 2128,
2144
    UPT = 2129,
2145
    VA  = 2130,
2146
    VAB = 2131,
2147
    VAC = 2132,
2148
    VACC  = 2133,
2149
    VACCB = 2134,
2150
    VACCC = 2135,
2151
    VACCCQ  = 2136,
2152
    VACCF = 2137,
2153
    VACCG = 2138,
2154
    VACCH = 2139,
2155
    VACCQ = 2140,
2156
    VACQ  = 2141,
2157
    VAF = 2142,
2158
    VAG = 2143,
2159
    VAH = 2144,
2160
    VAP = 2145,
2161
    VAQ = 2146,
2162
    VAVG  = 2147,
2163
    VAVGB = 2148,
2164
    VAVGF = 2149,
2165
    VAVGG = 2150,
2166
    VAVGH = 2151,
2167
    VAVGL = 2152,
2168
    VAVGLB  = 2153,
2169
    VAVGLF  = 2154,
2170
    VAVGLG  = 2155,
2171
    VAVGLH  = 2156,
2172
    VBPERM  = 2157,
2173
    VCDG  = 2158,
2174
    VCDGB = 2159,
2175
    VCDLG = 2160,
2176
    VCDLGB  = 2161,
2177
    VCEQ  = 2162,
2178
    VCEQB = 2163,
2179
    VCEQBS  = 2164,
2180
    VCEQF = 2165,
2181
    VCEQFS  = 2166,
2182
    VCEQG = 2167,
2183
    VCEQGS  = 2168,
2184
    VCEQH = 2169,
2185
    VCEQHS  = 2170,
2186
    VCGD  = 2171,
2187
    VCGDB = 2172,
2188
    VCH = 2173,
2189
    VCHB  = 2174,
2190
    VCHBS = 2175,
2191
    VCHF  = 2176,
2192
    VCHFS = 2177,
2193
    VCHG  = 2178,
2194
    VCHGS = 2179,
2195
    VCHH  = 2180,
2196
    VCHHS = 2181,
2197
    VCHL  = 2182,
2198
    VCHLB = 2183,
2199
    VCHLBS  = 2184,
2200
    VCHLF = 2185,
2201
    VCHLFS  = 2186,
2202
    VCHLG = 2187,
2203
    VCHLGS  = 2188,
2204
    VCHLH = 2189,
2205
    VCHLHS  = 2190,
2206
    VCKSM = 2191,
2207
    VCLGD = 2192,
2208
    VCLGDB  = 2193,
2209
    VCLZ  = 2194,
2210
    VCLZB = 2195,
2211
    VCLZF = 2196,
2212
    VCLZG = 2197,
2213
    VCLZH = 2198,
2214
    VCP = 2199,
2215
    VCTZ  = 2200,
2216
    VCTZB = 2201,
2217
    VCTZF = 2202,
2218
    VCTZG = 2203,
2219
    VCTZH = 2204,
2220
    VCVB  = 2205,
2221
    VCVBG = 2206,
2222
    VCVD  = 2207,
2223
    VCVDG = 2208,
2224
    VDP = 2209,
2225
    VEC = 2210,
2226
    VECB  = 2211,
2227
    VECF  = 2212,
2228
    VECG  = 2213,
2229
    VECH  = 2214,
2230
    VECL  = 2215,
2231
    VECLB = 2216,
2232
    VECLF = 2217,
2233
    VECLG = 2218,
2234
    VECLH = 2219,
2235
    VERIM = 2220,
2236
    VERIMB  = 2221,
2237
    VERIMF  = 2222,
2238
    VERIMG  = 2223,
2239
    VERIMH  = 2224,
2240
    VERLL = 2225,
2241
    VERLLB  = 2226,
2242
    VERLLF  = 2227,
2243
    VERLLG  = 2228,
2244
    VERLLH  = 2229,
2245
    VERLLV  = 2230,
2246
    VERLLVB = 2231,
2247
    VERLLVF = 2232,
2248
    VERLLVG = 2233,
2249
    VERLLVH = 2234,
2250
    VESL  = 2235,
2251
    VESLB = 2236,
2252
    VESLF = 2237,
2253
    VESLG = 2238,
2254
    VESLH = 2239,
2255
    VESLV = 2240,
2256
    VESLVB  = 2241,
2257
    VESLVF  = 2242,
2258
    VESLVG  = 2243,
2259
    VESLVH  = 2244,
2260
    VESRA = 2245,
2261
    VESRAB  = 2246,
2262
    VESRAF  = 2247,
2263
    VESRAG  = 2248,
2264
    VESRAH  = 2249,
2265
    VESRAV  = 2250,
2266
    VESRAVB = 2251,
2267
    VESRAVF = 2252,
2268
    VESRAVG = 2253,
2269
    VESRAVH = 2254,
2270
    VESRL = 2255,
2271
    VESRLB  = 2256,
2272
    VESRLF  = 2257,
2273
    VESRLG  = 2258,
2274
    VESRLH  = 2259,
2275
    VESRLV  = 2260,
2276
    VESRLVB = 2261,
2277
    VESRLVF = 2262,
2278
    VESRLVG = 2263,
2279
    VESRLVH = 2264,
2280
    VFA = 2265,
2281
    VFADB = 2266,
2282
    VFAE  = 2267,
2283
    VFAEB = 2268,
2284
    VFAEBS  = 2269,
2285
    VFAEF = 2270,
2286
    VFAEFS  = 2271,
2287
    VFAEH = 2272,
2288
    VFAEHS  = 2273,
2289
    VFAEZB  = 2274,
2290
    VFAEZBS = 2275,
2291
    VFAEZF  = 2276,
2292
    VFAEZFS = 2277,
2293
    VFAEZH  = 2278,
2294
    VFAEZHS = 2279,
2295
    VFASB = 2280,
2296
    VFCE  = 2281,
2297
    VFCEDB  = 2282,
2298
    VFCEDBS = 2283,
2299
    VFCESB  = 2284,
2300
    VFCESBS = 2285,
2301
    VFCH  = 2286,
2302
    VFCHDB  = 2287,
2303
    VFCHDBS = 2288,
2304
    VFCHE = 2289,
2305
    VFCHEDB = 2290,
2306
    VFCHEDBS  = 2291,
2307
    VFCHESB = 2292,
2308
    VFCHESBS  = 2293,
2309
    VFCHSB  = 2294,
2310
    VFCHSBS = 2295,
2311
    VFD = 2296,
2312
    VFDDB = 2297,
2313
    VFDSB = 2298,
2314
    VFEE  = 2299,
2315
    VFEEB = 2300,
2316
    VFEEBS  = 2301,
2317
    VFEEF = 2302,
2318
    VFEEFS  = 2303,
2319
    VFEEH = 2304,
2320
    VFEEHS  = 2305,
2321
    VFEEZB  = 2306,
2322
    VFEEZBS = 2307,
2323
    VFEEZF  = 2308,
2324
    VFEEZFS = 2309,
2325
    VFEEZH  = 2310,
2326
    VFEEZHS = 2311,
2327
    VFENE = 2312,
2328
    VFENEB  = 2313,
2329
    VFENEBS = 2314,
2330
    VFENEF  = 2315,
2331
    VFENEFS = 2316,
2332
    VFENEH  = 2317,
2333
    VFENEHS = 2318,
2334
    VFENEZB = 2319,
2335
    VFENEZBS  = 2320,
2336
    VFENEZF = 2321,
2337
    VFENEZFS  = 2322,
2338
    VFENEZH = 2323,
2339
    VFENEZHS  = 2324,
2340
    VFI = 2325,
2341
    VFIDB = 2326,
2342
    VFISB = 2327,
2343
    VFKEDB  = 2328,
2344
    VFKEDBS = 2329,
2345
    VFKESB  = 2330,
2346
    VFKESBS = 2331,
2347
    VFKHDB  = 2332,
2348
    VFKHDBS = 2333,
2349
    VFKHEDB = 2334,
2350
    VFKHEDBS  = 2335,
2351
    VFKHESB = 2336,
2352
    VFKHESBS  = 2337,
2353
    VFKHSB  = 2338,
2354
    VFKHSBS = 2339,
2355
    VFLCDB  = 2340,
2356
    VFLCSB  = 2341,
2357
    VFLL  = 2342,
2358
    VFLLS = 2343,
2359
    VFLNDB  = 2344,
2360
    VFLNSB  = 2345,
2361
    VFLPDB  = 2346,
2362
    VFLPSB  = 2347,
2363
    VFLR  = 2348,
2364
    VFLRD = 2349,
2365
    VFM = 2350,
2366
    VFMA  = 2351,
2367
    VFMADB  = 2352,
2368
    VFMASB  = 2353,
2369
    VFMAX = 2354,
2370
    VFMAXDB = 2355,
2371
    VFMAXSB = 2356,
2372
    VFMDB = 2357,
2373
    VFMIN = 2358,
2374
    VFMINDB = 2359,
2375
    VFMINSB = 2360,
2376
    VFMS  = 2361,
2377
    VFMSB = 2362,
2378
    VFMSDB  = 2363,
2379
    VFMSSB  = 2364,
2380
    VFNMA = 2365,
2381
    VFNMADB = 2366,
2382
    VFNMASB = 2367,
2383
    VFNMS = 2368,
2384
    VFNMSDB = 2369,
2385
    VFNMSSB = 2370,
2386
    VFPSO = 2371,
2387
    VFPSODB = 2372,
2388
    VFPSOSB = 2373,
2389
    VFS = 2374,
2390
    VFSDB = 2375,
2391
    VFSQ  = 2376,
2392
    VFSQDB  = 2377,
2393
    VFSQSB  = 2378,
2394
    VFSSB = 2379,
2395
    VFTCI = 2380,
2396
    VFTCIDB = 2381,
2397
    VFTCISB = 2382,
2398
    VGBM  = 2383,
2399
    VGEF  = 2384,
2400
    VGEG  = 2385,
2401
    VGFM  = 2386,
2402
    VGFMA = 2387,
2403
    VGFMAB  = 2388,
2404
    VGFMAF  = 2389,
2405
    VGFMAG  = 2390,
2406
    VGFMAH  = 2391,
2407
    VGFMB = 2392,
2408
    VGFMF = 2393,
2409
    VGFMG = 2394,
2410
    VGFMH = 2395,
2411
    VGM = 2396,
2412
    VGMB  = 2397,
2413
    VGMF  = 2398,
2414
    VGMG  = 2399,
2415
    VGMH  = 2400,
2416
    VISTR = 2401,
2417
    VISTRB  = 2402,
2418
    VISTRBS = 2403,
2419
    VISTRF  = 2404,
2420
    VISTRFS = 2405,
2421
    VISTRH  = 2406,
2422
    VISTRHS = 2407,
2423
    VL  = 2408,
2424
    VLBB  = 2409,
2425
    VLC = 2410,
2426
    VLCB  = 2411,
2427
    VLCF  = 2412,
2428
    VLCG  = 2413,
2429
    VLCH  = 2414,
2430
    VLDE  = 2415,
2431
    VLDEB = 2416,
2432
    VLEB  = 2417,
2433
    VLED  = 2418,
2434
    VLEDB = 2419,
2435
    VLEF  = 2420,
2436
    VLEG  = 2421,
2437
    VLEH  = 2422,
2438
    VLEIB = 2423,
2439
    VLEIF = 2424,
2440
    VLEIG = 2425,
2441
    VLEIH = 2426,
2442
    VLGV  = 2427,
2443
    VLGVB = 2428,
2444
    VLGVF = 2429,
2445
    VLGVG = 2430,
2446
    VLGVH = 2431,
2447
    VLIP  = 2432,
2448
    VLL = 2433,
2449
    VLLEZ = 2434,
2450
    VLLEZB  = 2435,
2451
    VLLEZF  = 2436,
2452
    VLLEZG  = 2437,
2453
    VLLEZH  = 2438,
2454
    VLLEZLF = 2439,
2455
    VLM = 2440,
2456
    VLP = 2441,
2457
    VLPB  = 2442,
2458
    VLPF  = 2443,
2459
    VLPG  = 2444,
2460
    VLPH  = 2445,
2461
    VLR = 2446,
2462
    VLREP = 2447,
2463
    VLREPB  = 2448,
2464
    VLREPF  = 2449,
2465
    VLREPG  = 2450,
2466
    VLREPH  = 2451,
2467
    VLRL  = 2452,
2468
    VLRLR = 2453,
2469
    VLVG  = 2454,
2470
    VLVGB = 2455,
2471
    VLVGF = 2456,
2472
    VLVGG = 2457,
2473
    VLVGH = 2458,
2474
    VLVGP = 2459,
2475
    VMAE  = 2460,
2476
    VMAEB = 2461,
2477
    VMAEF = 2462,
2478
    VMAEH = 2463,
2479
    VMAH  = 2464,
2480
    VMAHB = 2465,
2481
    VMAHF = 2466,
2482
    VMAHH = 2467,
2483
    VMAL  = 2468,
2484
    VMALB = 2469,
2485
    VMALE = 2470,
2486
    VMALEB  = 2471,
2487
    VMALEF  = 2472,
2488
    VMALEH  = 2473,
2489
    VMALF = 2474,
2490
    VMALH = 2475,
2491
    VMALHB  = 2476,
2492
    VMALHF  = 2477,
2493
    VMALHH  = 2478,
2494
    VMALHW  = 2479,
2495
    VMALO = 2480,
2496
    VMALOB  = 2481,
2497
    VMALOF  = 2482,
2498
    VMALOH  = 2483,
2499
    VMAO  = 2484,
2500
    VMAOB = 2485,
2501
    VMAOF = 2486,
2502
    VMAOH = 2487,
2503
    VME = 2488,
2504
    VMEB  = 2489,
2505
    VMEF  = 2490,
2506
    VMEH  = 2491,
2507
    VMH = 2492,
2508
    VMHB  = 2493,
2509
    VMHF  = 2494,
2510
    VMHH  = 2495,
2511
    VML = 2496,
2512
    VMLB  = 2497,
2513
    VMLE  = 2498,
2514
    VMLEB = 2499,
2515
    VMLEF = 2500,
2516
    VMLEH = 2501,
2517
    VMLF  = 2502,
2518
    VMLH  = 2503,
2519
    VMLHB = 2504,
2520
    VMLHF = 2505,
2521
    VMLHH = 2506,
2522
    VMLHW = 2507,
2523
    VMLO  = 2508,
2524
    VMLOB = 2509,
2525
    VMLOF = 2510,
2526
    VMLOH = 2511,
2527
    VMN = 2512,
2528
    VMNB  = 2513,
2529
    VMNF  = 2514,
2530
    VMNG  = 2515,
2531
    VMNH  = 2516,
2532
    VMNL  = 2517,
2533
    VMNLB = 2518,
2534
    VMNLF = 2519,
2535
    VMNLG = 2520,
2536
    VMNLH = 2521,
2537
    VMO = 2522,
2538
    VMOB  = 2523,
2539
    VMOF  = 2524,
2540
    VMOH  = 2525,
2541
    VMP = 2526,
2542
    VMRH  = 2527,
2543
    VMRHB = 2528,
2544
    VMRHF = 2529,
2545
    VMRHG = 2530,
2546
    VMRHH = 2531,
2547
    VMRL  = 2532,
2548
    VMRLB = 2533,
2549
    VMRLF = 2534,
2550
    VMRLG = 2535,
2551
    VMRLH = 2536,
2552
    VMSL  = 2537,
2553
    VMSLG = 2538,
2554
    VMSP  = 2539,
2555
    VMX = 2540,
2556
    VMXB  = 2541,
2557
    VMXF  = 2542,
2558
    VMXG  = 2543,
2559
    VMXH  = 2544,
2560
    VMXL  = 2545,
2561
    VMXLB = 2546,
2562
    VMXLF = 2547,
2563
    VMXLG = 2548,
2564
    VMXLH = 2549,
2565
    VN  = 2550,
2566
    VNC = 2551,
2567
    VNN = 2552,
2568
    VNO = 2553,
2569
    VNX = 2554,
2570
    VO  = 2555,
2571
    VOC = 2556,
2572
    VONE  = 2557,
2573
    VPDI  = 2558,
2574
    VPERM = 2559,
2575
    VPK = 2560,
2576
    VPKF  = 2561,
2577
    VPKG  = 2562,
2578
    VPKH  = 2563,
2579
    VPKLS = 2564,
2580
    VPKLSF  = 2565,
2581
    VPKLSFS = 2566,
2582
    VPKLSG  = 2567,
2583
    VPKLSGS = 2568,
2584
    VPKLSH  = 2569,
2585
    VPKLSHS = 2570,
2586
    VPKS  = 2571,
2587
    VPKSF = 2572,
2588
    VPKSFS  = 2573,
2589
    VPKSG = 2574,
2590
    VPKSGS  = 2575,
2591
    VPKSH = 2576,
2592
    VPKSHS  = 2577,
2593
    VPKZ  = 2578,
2594
    VPOPCT  = 2579,
2595
    VPOPCTB = 2580,
2596
    VPOPCTF = 2581,
2597
    VPOPCTG = 2582,
2598
    VPOPCTH = 2583,
2599
    VPSOP = 2584,
2600
    VREP  = 2585,
2601
    VREPB = 2586,
2602
    VREPF = 2587,
2603
    VREPG = 2588,
2604
    VREPH = 2589,
2605
    VREPI = 2590,
2606
    VREPIB  = 2591,
2607
    VREPIF  = 2592,
2608
    VREPIG  = 2593,
2609
    VREPIH  = 2594,
2610
    VRP = 2595,
2611
    VS  = 2596,
2612
    VSB = 2597,
2613
    VSBCBI  = 2598,
2614
    VSBCBIQ = 2599,
2615
    VSBI  = 2600,
2616
    VSBIQ = 2601,
2617
    VSCBI = 2602,
2618
    VSCBIB  = 2603,
2619
    VSCBIF  = 2604,
2620
    VSCBIG  = 2605,
2621
    VSCBIH  = 2606,
2622
    VSCBIQ  = 2607,
2623
    VSCEF = 2608,
2624
    VSCEG = 2609,
2625
    VSDP  = 2610,
2626
    VSEG  = 2611,
2627
    VSEGB = 2612,
2628
    VSEGF = 2613,
2629
    VSEGH = 2614,
2630
    VSEL  = 2615,
2631
    VSF = 2616,
2632
    VSG = 2617,
2633
    VSH = 2618,
2634
    VSL = 2619,
2635
    VSLB  = 2620,
2636
    VSLDB = 2621,
2637
    VSP = 2622,
2638
    VSQ = 2623,
2639
    VSRA  = 2624,
2640
    VSRAB = 2625,
2641
    VSRL  = 2626,
2642
    VSRLB = 2627,
2643
    VSRP  = 2628,
2644
    VST = 2629,
2645
    VSTEB = 2630,
2646
    VSTEF = 2631,
2647
    VSTEG = 2632,
2648
    VSTEH = 2633,
2649
    VSTL  = 2634,
2650
    VSTM  = 2635,
2651
    VSTRC = 2636,
2652
    VSTRCB  = 2637,
2653
    VSTRCBS = 2638,
2654
    VSTRCF  = 2639,
2655
    VSTRCFS = 2640,
2656
    VSTRCH  = 2641,
2657
    VSTRCHS = 2642,
2658
    VSTRCZB = 2643,
2659
    VSTRCZBS  = 2644,
2660
    VSTRCZF = 2645,
2661
    VSTRCZFS  = 2646,
2662
    VSTRCZH = 2647,
2663
    VSTRCZHS  = 2648,
2664
    VSTRL = 2649,
2665
    VSTRLR  = 2650,
2666
    VSUM  = 2651,
2667
    VSUMB = 2652,
2668
    VSUMG = 2653,
2669
    VSUMGF  = 2654,
2670
    VSUMGH  = 2655,
2671
    VSUMH = 2656,
2672
    VSUMQ = 2657,
2673
    VSUMQF  = 2658,
2674
    VSUMQG  = 2659,
2675
    VTM = 2660,
2676
    VTP = 2661,
2677
    VUPH  = 2662,
2678
    VUPHB = 2663,
2679
    VUPHF = 2664,
2680
    VUPHH = 2665,
2681
    VUPKZ = 2666,
2682
    VUPL  = 2667,
2683
    VUPLB = 2668,
2684
    VUPLF = 2669,
2685
    VUPLH = 2670,
2686
    VUPLHB  = 2671,
2687
    VUPLHF  = 2672,
2688
    VUPLHH  = 2673,
2689
    VUPLHW  = 2674,
2690
    VUPLL = 2675,
2691
    VUPLLB  = 2676,
2692
    VUPLLF  = 2677,
2693
    VUPLLH  = 2678,
2694
    VX  = 2679,
2695
    VZERO = 2680,
2696
    WCDGB = 2681,
2697
    WCDLGB  = 2682,
2698
    WCGDB = 2683,
2699
    WCLGDB  = 2684,
2700
    WFADB = 2685,
2701
    WFASB = 2686,
2702
    WFAXB = 2687,
2703
    WFC = 2688,
2704
    WFCDB = 2689,
2705
    WFCEDB  = 2690,
2706
    WFCEDBS = 2691,
2707
    WFCESB  = 2692,
2708
    WFCESBS = 2693,
2709
    WFCEXB  = 2694,
2710
    WFCEXBS = 2695,
2711
    WFCHDB  = 2696,
2712
    WFCHDBS = 2697,
2713
    WFCHEDB = 2698,
2714
    WFCHEDBS  = 2699,
2715
    WFCHESB = 2700,
2716
    WFCHESBS  = 2701,
2717
    WFCHEXB = 2702,
2718
    WFCHEXBS  = 2703,
2719
    WFCHSB  = 2704,
2720
    WFCHSBS = 2705,
2721
    WFCHXB  = 2706,
2722
    WFCHXBS = 2707,
2723
    WFCSB = 2708,
2724
    WFCXB = 2709,
2725
    WFDDB = 2710,
2726
    WFDSB = 2711,
2727
    WFDXB = 2712,
2728
    WFIDB = 2713,
2729
    WFISB = 2714,
2730
    WFIXB = 2715,
2731
    WFK = 2716,
2732
    WFKDB = 2717,
2733
    WFKEDB  = 2718,
2734
    WFKEDBS = 2719,
2735
    WFKESB  = 2720,
2736
    WFKESBS = 2721,
2737
    WFKEXB  = 2722,
2738
    WFKEXBS = 2723,
2739
    WFKHDB  = 2724,
2740
    WFKHDBS = 2725,
2741
    WFKHEDB = 2726,
2742
    WFKHEDBS  = 2727,
2743
    WFKHESB = 2728,
2744
    WFKHESBS  = 2729,
2745
    WFKHEXB = 2730,
2746
    WFKHEXBS  = 2731,
2747
    WFKHSB  = 2732,
2748
    WFKHSBS = 2733,
2749
    WFKHXB  = 2734,
2750
    WFKHXBS = 2735,
2751
    WFKSB = 2736,
2752
    WFKXB = 2737,
2753
    WFLCDB  = 2738,
2754
    WFLCSB  = 2739,
2755
    WFLCXB  = 2740,
2756
    WFLLD = 2741,
2757
    WFLLS = 2742,
2758
    WFLNDB  = 2743,
2759
    WFLNSB  = 2744,
2760
    WFLNXB  = 2745,
2761
    WFLPDB  = 2746,
2762
    WFLPSB  = 2747,
2763
    WFLPXB  = 2748,
2764
    WFLRD = 2749,
2765
    WFLRX = 2750,
2766
    WFMADB  = 2751,
2767
    WFMASB  = 2752,
2768
    WFMAXB  = 2753,
2769
    WFMAXDB = 2754,
2770
    WFMAXSB = 2755,
2771
    WFMAXXB = 2756,
2772
    WFMDB = 2757,
2773
    WFMINDB = 2758,
2774
    WFMINSB = 2759,
2775
    WFMINXB = 2760,
2776
    WFMSB = 2761,
2777
    WFMSDB  = 2762,
2778
    WFMSSB  = 2763,
2779
    WFMSXB  = 2764,
2780
    WFMXB = 2765,
2781
    WFNMADB = 2766,
2782
    WFNMASB = 2767,
2783
    WFNMAXB = 2768,
2784
    WFNMSDB = 2769,
2785
    WFNMSSB = 2770,
2786
    WFNMSXB = 2771,
2787
    WFPSODB = 2772,
2788
    WFPSOSB = 2773,
2789
    WFPSOXB = 2774,
2790
    WFSDB = 2775,
2791
    WFSQDB  = 2776,
2792
    WFSQSB  = 2777,
2793
    WFSQXB  = 2778,
2794
    WFSSB = 2779,
2795
    WFSXB = 2780,
2796
    WFTCIDB = 2781,
2797
    WFTCISB = 2782,
2798
    WFTCIXB = 2783,
2799
    WLDEB = 2784,
2800
    WLEDB = 2785,
2801
    X = 2786,
2802
    XC  = 2787,
2803
    XG  = 2788,
2804
    XGR = 2789,
2805
    XGRK  = 2790,
2806
    XI  = 2791,
2807
    XIHF  = 2792,
2808
    XILF  = 2793,
2809
    XIY = 2794,
2810
    XR  = 2795,
2811
    XRK = 2796,
2812
    XSCH  = 2797,
2813
    XY  = 2798,
2814
    ZAP = 2799,
2815
    INSTRUCTION_LIST_END = 2800
2816
  };
2817
2818
} // end SystemZ namespace
2819
} // end llvm namespace
2820
#endif // GET_INSTRINFO_ENUM
2821
2822
#ifdef GET_INSTRINFO_SCHED_ENUM
2823
#undef GET_INSTRINFO_SCHED_ENUM
2824
namespace llvm {
2825
2826
namespace SystemZ {
2827
namespace Sched {
2828
  enum {
2829
    NoInstrModel  = 0,
2830
    ADJDYNALLOC = 1,
2831
    CallBRCL_BRC_BRCAsm_BRCL_BRCLAsm  = 2,
2832
    CallJG_J_JAsmE_JAsmH_JAsmHE_JAsmL_JAsmLE_JAsmLH_JAsmM_JAsmNE_JAsmNH_JAsmNHE_JAsmNL_JAsmNLE_JAsmNLH_JAsmNM_JAsmNO_JAsmNP_JAsmNZ_JAsmO_JAsmP_JAsmZ_JG_JGAsmE_JGAsmH_JGAsmHE_JGAsmL_JGAsmLE_JGAsmLH_JGAsmM_JGAsmNE_JGAsmNH_JGAsmNHE_JGAsmNL_JGAsmNLE_JGAsmNLH_JGAsmNM_JGAsmNO_JGAsmNP_JGAsmNZ_JGAsmO_JGAsmP_JGAsmZ = 3,
2833
    CallBCR_BC_BCAsm_BCR_BCRAsm = 4,
2834
    CallBR_B_BAsmE_BAsmH_BAsmHE_BAsmL_BAsmLE_BAsmLH_BAsmM_BAsmNE_BAsmNH_BAsmNHE_BAsmNL_BAsmNLE_BAsmNLH_BAsmNM_BAsmNO_BAsmNP_BAsmNZ_BAsmO_BAsmP_BAsmZ_BR_BRAsmE_BRAsmH_BRAsmHE_BRAsmL_BRAsmLE_BRAsmLH_BRAsmM_BRAsmNE_BRAsmNH_BRAsmNHE_BRAsmNL_BRAsmNLE_BRAsmNLH_BRAsmNM_BRAsmNO_BRAsmNP_BRAsmNZ_BRAsmO_BRAsmP_BRAsmZ = 5,
2835
    BI_BIAsmE_BIAsmH_BIAsmHE_BIAsmL_BIAsmLE_BIAsmLH_BIAsmM_BIAsmNE_BIAsmNH_BIAsmNHE_BIAsmNL_BIAsmNLE_BIAsmNLH_BIAsmNM_BIAsmNO_BIAsmNP_BIAsmNZ_BIAsmO_BIAsmP_BIAsmZ_BIC_BICAsm = 6,
2836
    BRCT_BRCTG  = 7,
2837
    BRCTH = 8,
2838
    BCT_BCTG_BCTGR_BCTR = 9,
2839
    BRXH_BRXHG_BRXLE_BRXLG_BXH_BXHG_BXLE_BXLEG  = 10,
2840
    CGIJ_CGIJAsm_CGIJAsmE_CGIJAsmH_CGIJAsmHE_CGIJAsmL_CGIJAsmLE_CGIJAsmLH_CGIJAsmNE_CGIJAsmNH_CGIJAsmNHE_CGIJAsmNL_CGIJAsmNLE_CGIJAsmNLH_CGRJ_CGRJAsm_CGRJAsmE_CGRJAsmH_CGRJAsmHE_CGRJAsmL_CGRJAsmLE_CGRJAsmLH_CGRJAsmNE_CGRJAsmNH_CGRJAsmNHE_CGRJAsmNL_CGRJAsmNLE_CGRJAsmNLH_CIJ_CIJAsm_CIJAsmE_CIJAsmH_CIJAsmHE_CIJAsmL_CIJAsmLE_CIJAsmLH_CIJAsmNE_CIJAsmNH_CIJAsmNHE_CIJAsmNL_CIJAsmNLE_CIJAsmNLH_CLGIJ_CLGIJAsm_CLGIJAsmE_CLGIJAsmH_CLGIJAsmHE_CLGIJAsmL_CLGIJAsmLE_CLGIJAsmLH_CLGIJAsmNE_CLGIJAsmNH_CLGIJAsmNHE_CLGIJAsmNL_CLGIJAsmNLE_CLGIJAsmNLH_CLGRJ_CLGRJAsm_CLGRJAsmE_CLGRJAsmH_CLGRJAsmHE_CLGRJAsmL_CLGRJAsmLE_CLGRJAsmLH_CLGRJAsmNE_CLGRJAsmNH_CLGRJAsmNHE_CLGRJAsmNL_CLGRJAsmNLE_CLGRJAsmNLH_CLIJ_CLIJAsm_CLIJAsmE_CLIJAsmH_CLIJAsmHE_CLIJAsmL_CLIJAsmLE_CLIJAsmLH_CLIJAsmNE_CLIJAsmNH_CLIJAsmNHE_CLIJAsmNL_CLIJAsmNLE_CLIJAsmNLH_CLRJ_CLRJAsm_CLRJAsmE_CLRJAsmH_CLRJAsmHE_CLRJAsmL_CLRJAsmLE_CLRJAsmLH_CLRJAsmNE_CLRJAsmNH_CLRJAsmNHE_CLRJAsmNL_CLRJAsmNLE_CLRJAsmNLH_CRJ_CRJAsm_CRJAsmE_CRJAsmH_CRJAsmHE_CRJAsmL_CRJAsmLE_CRJAsmLH_CRJAsmNE_CRJAsmNH_CRJAsmNHE_CRJAsmNL_CRJAsmNLE_CRJAsmNLH = 11,
2841
    CGIBCall_CGIBReturn_CGRBCall_CGRBReturn_CIBCall_CIBReturn_CLGIBCall_CLGIBReturn_CLGRBCall_CLGRBReturn_CLIBCall_CLIBReturn_CLRBCall_CLRBReturn_CRBCall_CRBReturn_CGIB_CGIBAsm_CGIBAsmE_CGIBAsmH_CGIBAsmHE_CGIBAsmL_CGIBAsmLE_CGIBAsmLH_CGIBAsmNE_CGIBAsmNH_CGIBAsmNHE_CGIBAsmNL_CGIBAsmNLE_CGIBAsmNLH_CGRB_CGRBAsm_CGRBAsmE_CGRBAsmH_CGRBAsmHE_CGRBAsmL_CGRBAsmLE_CGRBAsmLH_CGRBAsmNE_CGRBAsmNH_CGRBAsmNHE_CGRBAsmNL_CGRBAsmNLE_CGRBAsmNLH_CIB_CIBAsm_CIBAsmE_CIBAsmH_CIBAsmHE_CIBAsmL_CIBAsmLE_CIBAsmLH_CIBAsmNE_CIBAsmNH_CIBAsmNHE_CIBAsmNL_CIBAsmNLE_CIBAsmNLH_CLGIB_CLGIBAsm_CLGIBAsmE_CLGIBAsmH_CLGIBAsmHE_CLGIBAsmL_CLGIBAsmLE_CLGIBAsmLH_CLGIBAsmNE_CLGIBAsmNH_CLGIBAsmNHE_CLGIBAsmNL_CLGIBAsmNLE_CLGIBAsmNLH_CLGRB_CLGRBAsm_CLGRBAsmE_CLGRBAsmH_CLGRBAsmHE_CLGRBAsmL_CLGRBAsmLE_CLGRBAsmLH_CLGRBAsmNE_CLGRBAsmNH_CLGRBAsmNHE_CLGRBAsmNL_CLGRBAsmNLE_CLGRBAsmNLH_CLIB_CLIBAsm_CLIBAsmE_CLIBAsmH_CLIBAsmHE_CLIBAsmL_CLIBAsmLE_CLIBAsmLH_CLIBAsmNE_CLIBAsmNH_CLIBAsmNHE_CLIBAsmNL_CLIBAsmNLE_CLIBAsmNLH_CLRB_CLRBAsm_CLRBAsmE_CLRBAsmH_CLRBAsmHE_CLRBAsmL_CLRBAsmLE_CLRBAsmLH_CLRBAsmNE_CLRBAsmNH_CLRBAsmNHE_CLRBAsmNL_CLRBAsmNLE_CLRBAsmNLH_CRB_CRBAsm_CRBAsmE_CRBAsmH_CRBAsmHE_CRBAsmL_CRBAsmLE_CRBAsmLH_CRBAsmNE_CRBAsmNH_CRBAsmNHE_CRBAsmNL_CRBAsmNLE_CRBAsmNLH = 12,
2842
    CondTrap_Trap = 13,
2843
    CGIT_CGITAsm_CGITAsmE_CGITAsmH_CGITAsmHE_CGITAsmL_CGITAsmLE_CGITAsmLH_CGITAsmNE_CGITAsmNH_CGITAsmNHE_CGITAsmNL_CGITAsmNLE_CGITAsmNLH_CGRT_CGRTAsm_CGRTAsmE_CGRTAsmH_CGRTAsmHE_CGRTAsmL_CGRTAsmLE_CGRTAsmLH_CGRTAsmNE_CGRTAsmNH_CGRTAsmNHE_CGRTAsmNL_CGRTAsmNLE_CGRTAsmNLH_CIT_CITAsm_CITAsmE_CITAsmH_CITAsmHE_CITAsmL_CITAsmLE_CITAsmLH_CITAsmNE_CITAsmNH_CITAsmNHE_CITAsmNL_CITAsmNLE_CITAsmNLH_CRT_CRTAsm_CRTAsmE_CRTAsmH_CRTAsmHE_CRTAsmL_CRTAsmLE_CRTAsmLH_CRTAsmNE_CRTAsmNH_CRTAsmNHE_CRTAsmNL_CRTAsmNLE_CRTAsmNLH = 14,
2844
    CLGRT_CLGRTAsm_CLGRTAsmE_CLGRTAsmH_CLGRTAsmHE_CLGRTAsmL_CLGRTAsmLE_CLGRTAsmLH_CLGRTAsmNE_CLGRTAsmNH_CLGRTAsmNHE_CLGRTAsmNL_CLGRTAsmNLE_CLGRTAsmNLH_CLRT_CLRTAsm_CLRTAsmE_CLRTAsmH_CLRTAsmHE_CLRTAsmL_CLRTAsmLE_CLRTAsmLH_CLRTAsmNE_CLRTAsmNH_CLRTAsmNHE_CLRTAsmNL_CLRTAsmNLE_CLRTAsmNLH = 15,
2845
    CLFIT_CLFITAsm_CLFITAsmE_CLFITAsmH_CLFITAsmHE_CLFITAsmL_CLFITAsmLE_CLFITAsmLH_CLFITAsmNE_CLFITAsmNH_CLFITAsmNHE_CLFITAsmNL_CLFITAsmNLE_CLFITAsmNLH_CLGIT_CLGITAsm_CLGITAsmE_CLGITAsmH_CLGITAsmHE_CLGITAsmL_CLGITAsmLE_CLGITAsmLH_CLGITAsmNE_CLGITAsmNH_CLGITAsmNHE_CLGITAsmNL_CLGITAsmNLE_CLGITAsmNLH = 16,
2846
    CLGT_CLGTAsm_CLGTAsmE_CLGTAsmH_CLGTAsmHE_CLGTAsmL_CLGTAsmLE_CLGTAsmLH_CLGTAsmNE_CLGTAsmNH_CLGTAsmNHE_CLGTAsmNL_CLGTAsmNLE_CLGTAsmNLH_CLT_CLTAsm_CLTAsmE_CLTAsmH_CLTAsmHE_CLTAsmL_CLTAsmLE_CLTAsmLH_CLTAsmNE_CLTAsmNH_CLTAsmNHE_CLTAsmNL_CLTAsmNLE_CLTAsmNLH = 17,
2847
    BRAS  = 18,
2848
    CallBRASL_BRASL = 19,
2849
    CallBASR_BAS_BASR = 20,
2850
    TLS_GDCALL_TLS_LDCALL = 21,
2851
    Return  = 22,
2852
    CondReturn  = 23,
2853
    MVGHI_MVHHI_MVHI  = 24,
2854
    MVI_MVIY  = 25,
2855
    MVC = 26,
2856
    MVCL_MVCLE_MVCLU  = 27,
2857
    COPY_TO_REGCLASS_COPY = 28,
2858
    EXTRACT_SUBREG  = 29,
2859
    INSERT_SUBREG = 30,
2860
    REG_SEQUENCE  = 31,
2861
    SUBREG_TO_REG = 32,
2862
    LMux_L_LCBB_LFH_LRL_LY  = 33,
2863
    LG_LGRL = 34,
2864
    L128  = 35,
2865
    LLIHF_LLIHH_LLIHL = 36,
2866
    LLILF_LLILH_LLILL = 37,
2867
    LGFI_LGHI = 38,
2868
    LHIMux_LHI  = 39,
2869
    LRMux_LR  = 40,
2870
    LZRF_LZRG = 41,
2871
    LAT_LFHAT_LGAT  = 42,
2872
    LT_LTG  = 43,
2873
    LTGR_LTR  = 44,
2874
    STG_STGRL = 45,
2875
    ST128 = 46,
2876
    STMux_ST_STFH_STRL_STY  = 47,
2877
    MVST  = 48,
2878
    LOCRMux = 49,
2879
    LOCFHR_LOCFHRAsm_LOCFHRAsmE_LOCFHRAsmH_LOCFHRAsmHE_LOCFHRAsmL_LOCFHRAsmLE_LOCFHRAsmLH_LOCFHRAsmM_LOCFHRAsmNE_LOCFHRAsmNH_LOCFHRAsmNHE_LOCFHRAsmNL_LOCFHRAsmNLE_LOCFHRAsmNLH_LOCFHRAsmNM_LOCFHRAsmNO_LOCFHRAsmNP_LOCFHRAsmNZ_LOCFHRAsmO_LOCFHRAsmP_LOCFHRAsmZ_LOCGR_LOCGRAsm_LOCGRAsmE_LOCGRAsmH_LOCGRAsmHE_LOCGRAsmL_LOCGRAsmLE_LOCGRAsmLH_LOCGRAsmM_LOCGRAsmNE_LOCGRAsmNH_LOCGRAsmNHE_LOCGRAsmNL_LOCGRAsmNLE_LOCGRAsmNLH_LOCGRAsmNM_LOCGRAsmNO_LOCGRAsmNP_LOCGRAsmNZ_LOCGRAsmO_LOCGRAsmP_LOCGRAsmZ_LOCR_LOCRAsm_LOCRAsmE_LOCRAsmH_LOCRAsmHE_LOCRAsmL_LOCRAsmLE_LOCRAsmLH_LOCRAsmM_LOCRAsmNE_LOCRAsmNH_LOCRAsmNHE_LOCRAsmNL_LOCRAsmNLE_LOCRAsmNLH_LOCRAsmNM_LOCRAsmNO_LOCRAsmNP_LOCRAsmNZ_LOCRAsmO_LOCRAsmP_LOCRAsmZ  = 50,
2880
    LOCHIMux_LOCGHI_LOCGHIAsm_LOCGHIAsmE_LOCGHIAsmH_LOCGHIAsmHE_LOCGHIAsmL_LOCGHIAsmLE_LOCGHIAsmLH_LOCGHIAsmM_LOCGHIAsmNE_LOCGHIAsmNH_LOCGHIAsmNHE_LOCGHIAsmNL_LOCGHIAsmNLE_LOCGHIAsmNLH_LOCGHIAsmNM_LOCGHIAsmNO_LOCGHIAsmNP_LOCGHIAsmNZ_LOCGHIAsmO_LOCGHIAsmP_LOCGHIAsmZ_LOCHHI_LOCHHIAsm_LOCHHIAsmE_LOCHHIAsmH_LOCHHIAsmHE_LOCHHIAsmL_LOCHHIAsmLE_LOCHHIAsmLH_LOCHHIAsmM_LOCHHIAsmNE_LOCHHIAsmNH_LOCHHIAsmNHE_LOCHHIAsmNL_LOCHHIAsmNLE_LOCHHIAsmNLH_LOCHHIAsmNM_LOCHHIAsmNO_LOCHHIAsmNP_LOCHHIAsmNZ_LOCHHIAsmO_LOCHHIAsmP_LOCHHIAsmZ_LOCHI_LOCHIAsm_LOCHIAsmE_LOCHIAsmH_LOCHIAsmHE_LOCHIAsmL_LOCHIAsmLE_LOCHIAsmLH_LOCHIAsmM_LOCHIAsmNE_LOCHIAsmNH_LOCHIAsmNHE_LOCHIAsmNL_LOCHIAsmNLE_LOCHIAsmNLH_LOCHIAsmNM_LOCHIAsmNO_LOCHIAsmNP_LOCHIAsmNZ_LOCHIAsmO_LOCHIAsmP_LOCHIAsmZ = 51,
2881
    LOCMux_LOC_LOCAsm_LOCAsmE_LOCAsmH_LOCAsmHE_LOCAsmL_LOCAsmLE_LOCAsmLH_LOCAsmM_LOCAsmNE_LOCAsmNH_LOCAsmNHE_LOCAsmNL_LOCAsmNLE_LOCAsmNLH_LOCAsmNM_LOCAsmNO_LOCAsmNP_LOCAsmNZ_LOCAsmO_LOCAsmP_LOCAsmZ_LOCFH_LOCFHAsm_LOCFHAsmE_LOCFHAsmH_LOCFHAsmHE_LOCFHAsmL_LOCFHAsmLE_LOCFHAsmLH_LOCFHAsmM_LOCFHAsmNE_LOCFHAsmNH_LOCFHAsmNHE_LOCFHAsmNL_LOCFHAsmNLE_LOCFHAsmNLH_LOCFHAsmNM_LOCFHAsmNO_LOCFHAsmNP_LOCFHAsmNZ_LOCFHAsmO_LOCFHAsmP_LOCFHAsmZ_LOCG_LOCGAsm_LOCGAsmE_LOCGAsmH_LOCGAsmHE_LOCGAsmL_LOCGAsmLE_LOCGAsmLH_LOCGAsmM_LOCGAsmNE_LOCGAsmNH_LOCGAsmNHE_LOCGAsmNL_LOCGAsmNLE_LOCGAsmNLH_LOCGAsmNM_LOCGAsmNO_LOCGAsmNP_LOCGAsmNZ_LOCGAsmO_LOCGAsmP_LOCGAsmZ = 52,
2882
    STOCMux_STOC_STOCAsm_STOCAsmE_STOCAsmH_STOCAsmHE_STOCAsmL_STOCAsmLE_STOCAsmLH_STOCAsmM_STOCAsmNE_STOCAsmNH_STOCAsmNHE_STOCAsmNL_STOCAsmNLE_STOCAsmNLH_STOCAsmNM_STOCAsmNO_STOCAsmNP_STOCAsmNZ_STOCAsmO_STOCAsmP_STOCAsmZ_STOCFH_STOCFHAsm_STOCFHAsmE_STOCFHAsmH_STOCFHAsmHE_STOCFHAsmL_STOCFHAsmLE_STOCFHAsmLH_STOCFHAsmM_STOCFHAsmNE_STOCFHAsmNH_STOCFHAsmNHE_STOCFHAsmNL_STOCFHAsmNLE_STOCFHAsmNLH_STOCFHAsmNM_STOCFHAsmNO_STOCFHAsmNP_STOCFHAsmNZ_STOCFHAsmO_STOCFHAsmP_STOCFHAsmZ_STOCG_STOCGAsm_STOCGAsmE_STOCGAsmH_STOCGAsmHE_STOCGAsmL_STOCGAsmLE_STOCGAsmLH_STOCGAsmM_STOCGAsmNE_STOCGAsmNH_STOCGAsmNHE_STOCGAsmNL_STOCGAsmNLE_STOCGAsmNLH_STOCGAsmNM_STOCGAsmNO_STOCGAsmNP_STOCGAsmNZ_STOCGAsmO_STOCGAsmP_STOCGAsmZ  = 53,
2883
    LBR_LGR_LHR = 54,
2884
    LGBR_LGFR_LGHR  = 55,
2885
    LTGF  = 56,
2886
    LTGFR = 57,
2887
    LBMux_LB_LBH  = 58,
2888
    LH_LHY  = 59,
2889
    LHMux_LHH_LHRL  = 60,
2890
    LGB_LGF_LGH = 61,
2891
    LGFRL_LGHRL = 62,
2892
    LLCRMux_LLCR  = 63,
2893
    LLHRMux_LLHR  = 64,
2894
    LLGCR_LLGFR_LLGHR_LLGTR = 65,
2895
    LLCMux_LLC  = 66,
2896
    LLHMux_LLH  = 67,
2897
    LLCH_LLHH = 68,
2898
    LLHRL = 69,
2899
    LLGC_LLGF_LLGFRL_LLGH_LLGHRL_LLGT = 70,
2900
    LLZRGF  = 71,
2901
    LLGFAT_LLGTAT = 72,
2902
    STCMux_STC_STCH_STCY  = 73,
2903
    STHMux_STH_STHH_STHRL_STHY  = 74,
2904
    STCM_STCMH_STCMY  = 75,
2905
    LM_LMG_LMH_LMY  = 76,
2906
    LMD = 77,
2907
    STM_STMG_STMH_STMY  = 78,
2908
    LRVGR_LRVR  = 79,
2909
    LRV_LRVG_LRVH = 80,
2910
    STRV_STRVG_STRVH  = 81,
2911
    MVCIN = 82,
2912
    LA_LARL_LAY = 83,
2913
    GOT = 84,
2914
    LPGR_LPR  = 85,
2915
    LNGFR_LPGFR = 86,
2916
    LNGR_LNR  = 87,
2917
    LCGR_LCR  = 88,
2918
    LCGFR = 89,
2919
    IC_ICY  = 90,
2920
    IC32_IC32Y  = 91,
2921
    ICM_ICMH_ICMY = 92,
2922
    IIFMux_IIHMux_IILMux  = 93,
2923
    IIHF64_IIHF = 94,
2924
    IIHH64_IIHH = 95,
2925
    IIHL64_IIHL = 96,
2926
    IILF64_IILF = 97,
2927
    IILH64_IILH = 98,
2928
    IILL64_IILL = 99,
2929
    A_AY  = 100,
2930
    AH_AHY  = 101,
2931
    AIH = 102,
2932
    AFIMux_AFI  = 103,
2933
    AG  = 104,
2934
    AGFI  = 105,
2935
    AGHI_AGHIK  = 106,
2936
    AGR_AGRK  = 107,
2937
    AHI_AHIK  = 108,
2938
    AHIMux_AHIMuxK  = 109,
2939
    AL_ALY  = 110,
2940
    ALFI_ALHSIK = 111,
2941
    ALG_ALGF  = 112,
2942
    ALGHSIK = 113,
2943
    ALGFI_ALGFR = 114,
2944
    ALGR_ALGRK  = 115,
2945
    ALR_ALRK  = 116,
2946
    AR_ARK  = 117,
2947
    AHHHR_ALHHHR  = 118,
2948
    AHHLR_ALHHLR  = 119,
2949
    ALSIH_ALSIHN  = 120,
2950
    AGSI_ALGSI_ALSI_ASI = 121,
2951
    ALC_ALCG  = 122,
2952
    ALCGR_ALCR  = 123,
2953
    AGF_AGH = 124,
2954
    AGFR  = 125,
2955
    S_SG_SY = 126,
2956
    SH_SHY  = 127,
2957
    SGR_SGRK  = 128,
2958
    SLFI  = 129,
2959
    SL_SLG_SLGF_SLY = 130,
2960
    SLGFI_SLGFR = 131,
2961
    SLGR_SLGRK  = 132,
2962
    SLR_SLRK  = 133,
2963
    SR_SRK  = 134,
2964
    SHHHR_SLHHHR  = 135,
2965
    SHHLR_SLHHLR  = 136,
2966
    SLB_SLBG  = 137,
2967
    SLBGR_SLBR  = 138,
2968
    SGF_SGH = 139,
2969
    SGFR  = 140,
2970
    N_NG_NY = 141,
2971
    NGR_NGRK  = 142,
2972
    NIFMux_NIHMux_NILMux  = 143,
2973
    NI_NIY  = 144,
2974
    NIHF64_NIHF = 145,
2975
    NIHH64_NIHH = 146,
2976
    NIHL64_NIHL = 147,
2977
    NILF64_NILF = 148,
2978
    NILH64_NILH = 149,
2979
    NILL64_NILL = 150,
2980
    NR_NRK  = 151,
2981
    NC  = 152,
2982
    O_OG_OY = 153,
2983
    OGR_OGRK  = 154,
2984
    OI_OIY  = 155,
2985
    OIFMux_OIHMux_OILMux  = 156,
2986
    OIHF64_OIHF = 157,
2987
    OIHH64_OIHH = 158,
2988
    OIHL64_OIHL = 159,
2989
    OILF64_OILF = 160,
2990
    OILH64_OILH = 161,
2991
    OILL64_OILL = 162,
2992
    OR_ORK  = 163,
2993
    OC  = 164,
2994
    X_XG_XY = 165,
2995
    XI_XIY  = 166,
2996
    XIFMux  = 167,
2997
    XGR_XGRK  = 168,
2998
    XIHF64_XIHF = 169,
2999
    XILF64_XILF = 170,
3000
    XR_XRK  = 171,
3001
    XC  = 172,
3002
    MS_MSGF_MSY = 173,
3003
    MSFI_MSR  = 174,
3004
    MSG = 175,
3005
    MSGR  = 176,
3006
    MSGFI_MSGFR = 177,
3007
    MLG = 178,
3008
    MLGR  = 179,
3009
    MGHI  = 180,
3010
    MHI = 181,
3011
    MH_MHY  = 182,
3012
    MLR_MR  = 183,
3013
    M_MFY_ML  = 184,
3014
    MGH = 185,
3015
    MG  = 186,
3016
    MGRK  = 187,
3017
    MSC = 188,
3018
    MSGC  = 189,
3019
    MSRKC = 190,
3020
    MSGRKC  = 191,
3021
    DR  = 192,
3022
    D = 193,
3023
    DSGFR_DSGR  = 194,
3024
    DSG_DSGF  = 195,
3025
    DLR = 196,
3026
    DLGR  = 197,
3027
    DL_DLG  = 198,
3028
    SLL_SLLG_SLLK = 199,
3029
    SRL_SRLG_SRLK = 200,
3030
    SRA_SRAG_SRAK = 201,
3031
    SLA_SLAG_SLAK = 202,
3032
    SLDA_SLDL_SRDA_SRDL = 203,
3033
    RLL_RLLG  = 204,
3034
    RISBG_RISBG32_RISBGN  = 205,
3035
    RISBHH_RISBHL_RISBHG  = 206,
3036
    RISBLH_RISBLL_RISBLG  = 207,
3037
    RISBMux = 208,
3038
    RNSBG_ROSBG_RXSBG = 209,
3039
    CMux_C_CG_CRL_CY  = 210,
3040
    CFIMux_CHIMux_CFI_CHI = 211,
3041
    CGFI_CGHI = 212,
3042
    CGHSI_CGRL  = 213,
3043
    CGR_CR  = 214,
3044
    CIH = 215,
3045
    CHF_CHSI  = 216,
3046
    CLMux_CL_CLFHSI_CLY = 217,
3047
    CLFIMux_CLFI  = 218,
3048
    CLG_CLGHRL_CLGHSI = 219,
3049
    CLGF_CLGFRL = 220,
3050
    CLGFI_CLGFR = 221,
3051
    CLGR  = 222,
3052
    CLGRL = 223,
3053
    CLHF_CLHHSI_CLHRL = 224,
3054
    CLIH  = 225,
3055
    CLI_CLIY  = 226,
3056
    CLR = 227,
3057
    CLRL  = 228,
3058
    CHHR_CLHHR  = 229,
3059
    CHLR_CLHLR  = 230,
3060
    CH_CHRL_CHY = 231,
3061
    CGH_CGHRL = 232,
3062
    CHHSI = 233,
3063
    CGF_CGFRL = 234,
3064
    CGFR  = 235,
3065
    CLC = 236,
3066
    CLCL_CLCLE_CLCLU  = 237,
3067
    CLST  = 238,
3068
    TM_TMY  = 239,
3069
    TMHMux_TMLMux = 240,
3070
    TMHH64_TMHH = 241,
3071
    TMHL64_TMHL = 242,
3072
    TMLH64_TMLH = 243,
3073
    TMLL64_TMLL = 244,
3074
    CLM_CLMH_CLMY = 245,
3075
    PFD_PFDRL = 246,
3076
    BPP = 247,
3077
    BPRP  = 248,
3078
    NIAI  = 249,
3079
    Serialize = 250,
3080
    LAA_LAAG  = 251,
3081
    LAAL_LAALG  = 252,
3082
    LAN_LANG  = 253,
3083
    LAO_LAOG  = 254,
3084
    LAX_LAXG  = 255,
3085
    TS  = 256,
3086
    CS_CSG_CSY  = 257,
3087
    CDS_CDSY  = 258,
3088
    CDSG  = 259,
3089
    CSST  = 260,
3090
    PLO = 261,
3091
    LPQ = 262,
3092
    STPQ  = 263,
3093
    LPD_LPDG  = 264,
3094
    TR  = 265,
3095
    TRT = 266,
3096
    TRTR  = 267,
3097
    TRE = 268,
3098
    TRTE_TRTEOpt_TRTRE_TRTREOpt = 269,
3099
    TROO_TROOOpt_TROT_TROTOpt_TRTO_TRTOOpt_TRTT_TRTTOpt = 270,
3100
    CU12_CU12Opt_CU14_CU14Opt_CU21_CU21Opt_CU24_CU24Opt_CU41_CU42 = 271,
3101
    CUTFU_CUTFUOpt_CUUTF_CUUTFOpt = 272,
3102
    KM_KMA_KMC_KMCTR_KMF_KMO  = 273,
3103
    KIMD_KLMD_KMAC  = 274,
3104
    PCC_PPNO_PRNO = 275,
3105
    LGG = 276,
3106
    LLGFSG  = 277,
3107
    LGSC_STGSC  = 278,
3108
    CVBG  = 279,
3109
    CVB_CVBY  = 280,
3110
    CVDG  = 281,
3111
    CVD_CVDY  = 282,
3112
    MVO = 283,
3113
    MVN_MVZ = 284,
3114
    PACK_PKA_PKU  = 285,
3115
    UNPKA_UNPKU = 286,
3116
    UNPK  = 287,
3117
    AP_SP_ZAP = 288,
3118
    DP_MP = 289,
3119
    SRP = 290,
3120
    CP  = 291,
3121
    TP  = 292,
3122
    ED_EDMK = 293,
3123
    CPYA_EAR_SAR  = 294,
3124
    LAE_LAEY  = 295,
3125
    LAM_LAMY_STAM_STAMY = 296,
3126
    IPM = 297,
3127
    SPM = 298,
3128
    BAL_BALR  = 299,
3129
    TAM = 300,
3130
    SAM24_SAM31_SAM64 = 301,
3131
    BSM = 302,
3132
    BASSM = 303,
3133
    TBEGIN_TBEGINC  = 304,
3134
    TEND  = 305,
3135
    TABORT  = 306,
3136
    ETND  = 307,
3137
    NTSTG = 308,
3138
    PPA = 309,
3139
    FLOGR = 310,
3140
    POPCNT  = 311,
3141
    SRST  = 312,
3142
    SRSTU = 313,
3143
    CUSE  = 314,
3144
    CFC = 315,
3145
    UPT = 316,
3146
    CKSM  = 317,
3147
    CMPSC = 318,
3148
    EX_EXRL = 319,
3149
    InsnE_InsnRI_InsnRIE_InsnRIL_InsnRILU_InsnRIS_InsnRR_InsnRRE_InsnRRF_InsnRRS_InsnRS_InsnRSE_InsnRSI_InsnRSY_InsnRX_InsnRXE_InsnRXF_InsnRXY_InsnS_InsnSI_InsnSIL_InsnSIY_InsnSS_InsnSSE_InsnSSF  = 320,
3150
    LZDR_LZER = 321,
3151
    LZXR  = 322,
3152
    LER = 323,
3153
    LDGR_LDR_LDR32  = 324,
3154
    LGDR  = 325,
3155
    LXR = 326,
3156
    LTDBR_LTEBR = 327,
3157
    LTEBRCompare  = 328,
3158
    LTDBRCompare  = 329,
3159
    LTXBR = 330,
3160
    LTXBRCompare  = 331,
3161
    CPSDRdd_CPSDRds = 332,
3162
    CPSDRsd_CPSDRss = 333,
3163
    LE_LEY  = 334,
3164
    LD_LDE32_LDY  = 335,
3165
    LX  = 336,
3166
    STD_STDY  = 337,
3167
    STE_STEY  = 338,
3168
    STX = 339,
3169
    LEDBR_LEDBRA  = 340,
3170
    LEXBR_LEXBRA  = 341,
3171
    LDXBR_LDXBRA  = 342,
3172
    LDEB  = 343,
3173
    LDEBR = 344,
3174
    LXDB_LXEB = 345,
3175
    LXDBR_LXEBR = 346,
3176
    CEFBR_CEFBRA_CEGBR_CEGBRA = 347,
3177
    CDFBR_CDFBRA_CDGBR_CDGBRA = 348,
3178
    CXFBR_CXFBRA_CXGBR_CXGBRA = 349,
3179
    CELFBR_CELGBR = 350,
3180
    CDLFBR_CDLGBR = 351,
3181
    CXLFBR_CXLGBR = 352,
3182
    CFDBR_CFDBRA_CFEBR_CFEBRA = 353,
3183
    CGDBR_CGDBRA_CGEBR_CGEBRA = 354,
3184
    CFXBR_CFXBRA_CGXBR_CGXBRA = 355,
3185
    CLFEBR  = 356,
3186
    CLFDBR  = 357,
3187
    CLGDBR_CLGEBR = 358,
3188
    CLFXBR_CLGXBR = 359,
3189
    LCDBR_LNDBR_LPDBR = 360,
3190
    LCEBR_LNEBR_LPEBR = 361,
3191
    LCDFR_LCDFR_32  = 362,
3192
    LNDFR_LNDFR_32  = 363,
3193
    LPDFR_LPDFR_32  = 364,
3194
    LCXBR_LNXBR_LPXBR = 365,
3195
    SQDB_SQEB = 366,
3196
    SQDBR_SQEBR = 367,
3197
    SQXBR = 368,
3198
    FIEBR_FIEBRA  = 369,
3199
    FIDBR_FIDBRA  = 370,
3200
    FIXBR_FIXBRA  = 371,
3201
    ADB_AEB = 372,
3202
    ADBR_AEBR = 373,
3203
    AXBR  = 374,
3204
    SDB_SEB = 375,
3205
    SDBR_SEBR = 376,
3206
    SXBR  = 377,
3207
    MDB_MDEB_MEEB = 378,
3208
    MDBR_MDEBR_MEEBR  = 379,
3209
    MXDB  = 380,
3210
    MXDBR = 381,
3211
    MXBR  = 382,
3212
    MAEB_MSEB = 383,
3213
    MAEBR_MSEBR = 384,
3214
    MADB_MSDB = 385,
3215
    MADBR_MSDBR = 386,
3216
    DDB_DEB = 387,
3217
    DDBR_DEBR = 388,
3218
    DXBR  = 389,
3219
    DIDBR_DIEBR = 390,
3220
    CDB_CEB_KDB_KEB = 391,
3221
    CDBR_CEBR_KDBR_KEBR = 392,
3222
    CXBR_KXBR = 393,
3223
    TCDB_TCEB = 394,
3224
    TCXB  = 395,
3225
    EFPC  = 396,
3226
    STFPC = 397,
3227
    SFPC  = 398,
3228
    LFPC  = 399,
3229
    SFASR = 400,
3230
    LFAS  = 401,
3231
    SRNM_SRNMB_SRNMT  = 402,
3232
    LTDR_LTER = 403,
3233
    LTXR  = 404,
3234
    LEDR_LRER = 405,
3235
    LEXR  = 406,
3236
    LDXR_LRDR = 407,
3237
    LDE = 408,
3238
    LDER  = 409,
3239
    LXD_LXE = 410,
3240
    LXDR_LXER = 411,
3241
    CEFR_CEGR = 412,
3242
    CDFR_CDGR = 413,
3243
    CXFR_CXGR = 414,
3244
    CFDR_CFER = 415,
3245
    CGDR_CGER = 416,
3246
    CFXR_CGXR = 417,
3247
    THDER_THDR  = 418,
3248
    TBDR_TBEDR  = 419,
3249
    LCDR_LNDR_LPDR  = 420,
3250
    LCER_LNER_LPER  = 421,
3251
    LCXR_LNXR_LPXR  = 422,
3252
    HDR_HER = 423,
3253
    SQD_SQE = 424,
3254
    SQDR_SQER = 425,
3255
    SQXR  = 426,
3256
    FIER  = 427,
3257
    FIDR  = 428,
3258
    FIXR  = 429,
3259
    AD_AE_AU_AW = 430,
3260
    ADR_AER_AUR_AWR = 431,
3261
    AXR = 432,
3262
    SD_SE_SU_SW = 433,
3263
    SDR_SER_SUR_SWR = 434,
3264
    SXR = 435,
3265
    MD_MDE_ME_MEE = 436,
3266
    MDER_MDR_MEER_MER = 437,
3267
    MXD = 438,
3268
    MXDR  = 439,
3269
    MXR = 440,
3270
    MY  = 441,
3271
    MYH_MYL = 442,
3272
    MYR = 443,
3273
    MYHR_MYLR = 444,
3274
    MAE_MSE = 445,
3275
    MAER_MSER = 446,
3276
    MAD_MSD = 447,
3277
    MADR_MSDR = 448,
3278
    MAYH_MAYL = 449,
3279
    MAY = 450,
3280
    MAYHR_MAYLR = 451,
3281
    MAYR  = 452,
3282
    DD_DE = 453,
3283
    DDR_DER = 454,
3284
    DXR = 455,
3285
    CD_CE = 456,
3286
    CDR_CER = 457,
3287
    CXR = 458,
3288
    LTDTR = 459,
3289
    LTXTR = 460,
3290
    LEDTR = 461,
3291
    LDXTR = 462,
3292
    LDETR = 463,
3293
    LXDTR = 464,
3294
    CDFTR_CDGTR_CDGTRA  = 465,
3295
    CXFTR_CXGTR_CXGTRA  = 466,
3296
    CDLFTR_CDLGTR = 467,
3297
    CXLFTR_CXLGTR = 468,
3298
    CFDTR_CGDTR_CGDTRA  = 469,
3299
    CFXTR_CGXTR_CGXTRA  = 470,
3300
    CLFDTR_CLGDTR = 471,
3301
    CLFXTR_CLGXTR = 472,
3302
    CDSTR_CDUTR = 473,
3303
    CXSTR_CXUTR = 474,
3304
    CSDTR_CUDTR = 475,
3305
    CSXTR_CUXTR = 476,
3306
    CDZT  = 477,
3307
    CXZT  = 478,
3308
    CZDT  = 479,
3309
    CZXT  = 480,
3310
    CDPT  = 481,
3311
    CXPT  = 482,
3312
    CPDT  = 483,
3313
    CPXT  = 484,
3314
    PFPO  = 485,
3315
    FIDTR = 486,
3316
    FIXTR = 487,
3317
    EEDTR = 488,
3318
    EEXTR = 489,
3319
    ESDTR = 490,
3320
    ESXTR = 491,
3321
    ADTR_ADTRA  = 492,
3322
    AXTR_AXTRA  = 493,
3323
    SDTR_SDTRA  = 494,
3324
    SXTR_SXTRA  = 495,
3325
    MDTR_MDTRA  = 496,
3326
    MXTR_MXTRA  = 497,
3327
    DDTR_DDTRA  = 498,
3328
    DXTR_DXTRA  = 499,
3329
    QADTR = 500,
3330
    QAXTR = 501,
3331
    RRDTR = 502,
3332
    RRXTR = 503,
3333
    SLDT_SRDT = 504,
3334
    SLXT_SRXT = 505,
3335
    IEDTR = 506,
3336
    IEXTR = 507,
3337
    CDTR_KDTR = 508,
3338
    CXTR_KXTR = 509,
3339
    CEDTR = 510,
3340
    CEXTR = 511,
3341
    TDCDT_TDCET_TDGDT_TDGET = 512,
3342
    TDCXT_TDGXT = 513,
3343
    VLR32_VLR64_VLR = 514,
3344
    VLGV_VLGVB_VLGVF_VLGVG_VLGVH  = 515,
3345
    VLVG_VLVGB_VLVGF_VLVGG_VLVGH  = 516,
3346
    VLVGP32_VLVGP = 517,
3347
    VZERO = 518,
3348
    VONE  = 519,
3349
    VGBM  = 520,
3350
    VGM_VGMB_VGMF_VGMG_VGMH = 521,
3351
    VREPI_VREPIB_VREPIF_VREPIG_VREPIH = 522,
3352
    VLEIB_VLEIF_VLEIG_VLEIH = 523,
3353
    VL_VLBB_VLL = 524,
3354
    VL32_VL64 = 525,
3355
    VLLEZ_VLLEZB_VLLEZF_VLLEZG_VLLEZH_VLLEZLF = 526,
3356
    VLREP_VLREPB_VLREPF_VLREPG_VLREPH = 527,
3357
    VLEB_VLEF_VLEG_VLEH = 528,
3358
    VGEF_VGEG = 529,
3359
    VLM = 530,
3360
    VLRL_VLRLR  = 531,
3361
    VST32_VST64_VST_VSTL  = 532,
3362
    VSTEF_VSTEG = 533,
3363
    VSTEB_VSTEH = 534,
3364
    VSTM  = 535,
3365
    VSCEF_VSCEG = 536,
3366
    VSTRL_VSTRLR  = 537,
3367
    VMRH_VMRHB_VMRHF_VMRHG_VMRHH  = 538,
3368
    VMRL_VMRLB_VMRLF_VMRLG_VMRLH  = 539,
3369
    VPERM = 540,
3370
    VPDI  = 541,
3371
    VBPERM  = 542,
3372
    VREP_VREPB_VREPF_VREPG_VREPH  = 543,
3373
    VSEL  = 544,
3374
    VPK_VPKF_VPKG_VPKH  = 545,
3375
    VPKS_VPKSF_VPKSG_VPKSH  = 546,
3376
    VPKSFS_VPKSGS_VPKSHS  = 547,
3377
    VPKLS_VPKLSF_VPKLSG_VPKLSH  = 548,
3378
    VPKLSFS_VPKLSGS_VPKLSHS = 549,
3379
    VSEG_VSEGB_VSEGF_VSEGH  = 550,
3380
    VUPH_VUPHB_VUPHF_VUPHH  = 551,
3381
    VUPL_VUPLB_VUPLF  = 552,
3382
    VUPLH_VUPLHB_VUPLHF_VUPLHH_VUPLHW = 553,
3383
    VUPLL_VUPLLB_VUPLLF_VUPLLH  = 554,
3384
    VA_VAB_VAC_VACQ_VAF_VAG_VAH_VAQ = 555,
3385
    VACC_VACCB_VACCC_VACCCQ_VACCF_VACCG_VACCH_VACCQ = 556,
3386
    VAVG_VAVGB_VAVGF_VAVGG_VAVGH  = 557,
3387
    VAVGL_VAVGLB_VAVGLF_VAVGLG_VAVGLH = 558,
3388
    VN_VNC_VNN_VNO_VNX  = 559,
3389
    VO_VOC  = 560,
3390
    VCKSM = 561,
3391
    VCLZ_VCLZB_VCLZF_VCLZG_VCLZH  = 562,
3392
    VCTZ_VCTZB_VCTZF_VCTZG_VCTZH  = 563,
3393
    VX  = 564,
3394
    VGFM  = 565,
3395
    VGFMA_VGFMAB_VGFMAF_VGFMAG_VGFMAH = 566,
3396
    VGFMB_VGFMF_VGFMG_VGFMH = 567,
3397
    VLC_VLCB_VLCF_VLCG_VLCH = 568,
3398
    VLP_VLPB_VLPF_VLPG_VLPH = 569,
3399
    VMX_VMXB_VMXF_VMXG_VMXH = 570,
3400
    VMXL_VMXLB_VMXLF_VMXLG_VMXLH  = 571,
3401
    VMN_VMNB_VMNF_VMNG_VMNH = 572,
3402
    VMNL_VMNLB_VMNLF_VMNLG_VMNLH  = 573,
3403
    VMAL_VMALB_VMALF  = 574,
3404
    VMALE_VMALEB_VMALEF_VMALEH  = 575,
3405
    VMALH_VMALHB_VMALHF_VMALHH_VMALHW = 576,
3406
    VMALO_VMALOB_VMALOF_VMALOH  = 577,
3407
    VMAO_VMAOB_VMAOF_VMAOH  = 578,
3408
    VMAE_VMAEB_VMAEF_VMAEH  = 579,
3409
    VMAH_VMAHB_VMAHF_VMAHH  = 580,
3410
    VME_VMEB_VMEF_VMEH  = 581,
3411
    VMH_VMHB_VMHF_VMHH  = 582,
3412
    VML_VMLB_VMLF = 583,
3413
    VMLE_VMLEB_VMLEF_VMLEH  = 584,
3414
    VMLH_VMLHB_VMLHF_VMLHH_VMLHW  = 585,
3415
    VMLO_VMLOB_VMLOF_VMLOH  = 586,
3416
    VMO_VMOB_VMOF_VMOH  = 587,
3417
    VMSL_VMSLG  = 588,
3418
    VPOPCT_VPOPCTB_VPOPCTF_VPOPCTG_VPOPCTH  = 589,
3419
    VERLL_VERLLB_VERLLF_VERLLG_VERLLH = 590,
3420
    VERLLV_VERLLVB_VERLLVF_VERLLVG_VERLLVH  = 591,
3421
    VERIM_VERIMB_VERIMF_VERIMG_VERIMH = 592,
3422
    VESL_VESLB_VESLF_VESLG_VESLH  = 593,
3423
    VESLV_VESLVB_VESLVF_VESLVG_VESLVH = 594,
3424
    VESRA_VESRAB_VESRAF_VESRAG_VESRAH = 595,
3425
    VESRAV_VESRAVB_VESRAVF_VESRAVG_VESRAVH  = 596,
3426
    VESRL_VESRLB_VESRLF_VESRLG_VESRLH = 597,
3427
    VESRLV_VESRLVB_VESRLVF_VESRLVG_VESRLVH  = 598,
3428
    VSL_VSLDB = 599,
3429
    VSLB  = 600,
3430
    VSRA_VSRL = 601,
3431
    VSRAB_VSRLB = 602,
3432
    VSB_VSBCBI_VSBCBIQ_VSBI_VSBIQ = 603,
3433
    VSCBI_VSCBIB_VSCBIF_VSCBIG_VSCBIH_VSCBIQ  = 604,
3434
    VS_VSF_VSG_VSH_VSQ  = 605,
3435
    VSUM_VSUMB_VSUMH  = 606,
3436
    VSUMG_VSUMGF_VSUMGH = 607,
3437
    VSUMQ_VSUMQF_VSUMQG = 608,
3438
    VEC_VECB_VECF_VECG_VECH = 609,
3439
    VECL_VECLB_VECLF_VECLG_VECLH  = 610,
3440
    VCEQ_VCEQB_VCEQF_VCEQG_VCEQH  = 611,
3441
    VCEQBS_VCEQFS_VCEQGS_VCEQHS = 612,
3442
    VCH_VCHB_VCHF_VCHG_VCHH = 613,
3443
    VCHBS_VCHFS_VCHGS_VCHHS = 614,
3444
    VCHL_VCHLB_VCHLF_VCHLG_VCHLH  = 615,
3445
    VCHLBS_VCHLFS_VCHLGS_VCHLHS = 616,
3446
    VTM = 617,
3447
    VCDG_VCDLG  = 618,
3448
    VCDGB_VCDLGB  = 619,
3449
    WCDGB_WCDLGB  = 620,
3450
    VCGD_VCLGD  = 621,
3451
    VCGDB_VCLGDB  = 622,
3452
    WCGDB_WCLGDB  = 623,
3453
    VLDE_VLED = 624,
3454
    VLDEB_VLEDB = 625,
3455
    WLDEB_WLEDB = 626,
3456
    VFLL_VFLR = 627,
3457
    VFLLS_VFLRD = 628,
3458
    WFLLS_WFLRD = 629,
3459
    WFLLD = 630,
3460
    WFLRX = 631,
3461
    VFI = 632,
3462
    VFIDB = 633,
3463
    WFIDB = 634,
3464
    VFISB = 635,
3465
    WFISB = 636,
3466
    WFIXB = 637,
3467
    VFPSO = 638,
3468
    VFPSODB_WFPSODB = 639,
3469
    VFPSOSB_WFPSOSB = 640,
3470
    WFPSOXB = 641,
3471
    VFLCDB_VFLNDB_VFLPDB_WFLCDB_WFLNDB_WFLPDB = 642,
3472
    VFLCSB_VFLNSB_VFLPSB_WFLCSB_WFLNSB_WFLPSB = 643,
3473
    WFLCXB_WFLNXB_WFLPXB  = 644,
3474
    VFMAX_VFMIN = 645,
3475
    VFMAXDB_VFMINDB = 646,
3476
    WFMAXDB_WFMINDB = 647,
3477
    VFMAXSB_VFMINSB = 648,
3478
    WFMAXSB_WFMINSB = 649,
3479
    WFMAXXB_WFMINXB = 650,
3480
    VFTCI = 651,
3481
    VFTCIDB_WFTCIDB = 652,
3482
    VFTCISB_WFTCISB = 653,
3483
    WFTCIXB = 654,
3484
    VFA_VFS = 655,
3485
    VFADB_VFSDB = 656,
3486
    WFADB_WFSDB = 657,
3487
    VFASB_VFSSB = 658,
3488
    WFASB_WFSSB = 659,
3489
    WFAXB_WFSXB = 660,
3490
    VFM = 661,
3491
    VFMDB = 662,
3492
    WFMDB = 663,
3493
    VFMSB = 664,
3494
    WFMSB = 665,
3495
    WFMXB = 666,
3496
    VFMA_VFMS_VFNMA_VFNMS = 667,
3497
    VFMADB_VFMSDB_VFNMADB_VFNMSDB = 668,
3498
    WFMADB_WFMSDB_WFNMADB_WFNMSDB = 669,
3499
    VFMASB_VFMSSB_VFNMASB_VFNMSSB = 670,
3500
    WFMASB_WFMSSB_WFNMASB_WFNMSSB = 671,
3501
    WFMAXB_WFMSXB_WFNMAXB_WFNMSXB = 672,
3502
    VFD = 673,
3503
    VFDDB_WFDDB = 674,
3504
    VFDSB_WFDSB = 675,
3505
    WFDXB = 676,
3506
    VFSQ  = 677,
3507
    VFSQDB_WFSQDB = 678,
3508
    VFSQSB_WFSQSB = 679,
3509
    WFSQXB  = 680,
3510
    VFCE_VFCH_VFCHE = 681,
3511
    VFCEDB_VFCHDB_VFCHEDB_VFKEDB_VFKHDB_VFKHEDB = 682,
3512
    WFCEDB_WFCHDB_WFCHEDB_WFKEDB_WFKHDB_WFKHEDB = 683,
3513
    VFCESB_VFCHESB_VFCHSB_VFKESB_VFKHESB_VFKHSB = 684,
3514
    WFCESB_WFCHESB_WFCHSB_WFKESB_WFKHESB_WFKHSB = 685,
3515
    WFCEXB_WFCHEXB_WFCHXB_WFKEXB_WFKHEXB_WFKHXB = 686,
3516
    VFCEDBS_VFCHDBS_VFCHEDBS_VFKEDBS_VFKHDBS_VFKHEDBS = 687,
3517
    WFCEDBS_WFCHDBS_WFCHEDBS_WFKEDBS_WFKHDBS_WFKHEDBS = 688,
3518
    VFCESBS_VFCHESBS_VFCHSBS_VFKESBS_VFKHESBS_VFKHSBS = 689,
3519
    WFCESBS_WFCHESBS_WFCHSBS_WFKESBS_WFKHESBS_WFKHSBS = 690,
3520
    WFCEXBS_WFCHEXBS_WFCHXBS_WFKEXBS_WFKHEXBS_WFKHXBS = 691,
3521
    WFC_WFK = 692,
3522
    WFCDB_WFKDB = 693,
3523
    WFCSB_WFKSB = 694,
3524
    WFCXB_WFKXB = 695,
3525
    LEFR  = 696,
3526
    LFER  = 697,
3527
    VFAE_VFAEB  = 698,
3528
    VFAEBS  = 699,
3529
    VFAEF_VFAEH = 700,
3530
    VFAEFS_VFAEHS = 701,
3531
    VFAEZB_VFAEZF_VFAEZH  = 702,
3532
    VFAEZBS_VFAEZFS_VFAEZHS = 703,
3533
    VFEE_VFEEB_VFEEF_VFEEH_VFEEZB_VFEEZF_VFEEZH = 704,
3534
    VFEEBS_VFEEFS_VFEEHS_VFEEZBS_VFEEZFS_VFEEZHS  = 705,
3535
    VFENE_VFENEB_VFENEF_VFENEH_VFENEZB_VFENEZF_VFENEZH  = 706,
3536
    VFENEBS_VFENEFS_VFENEHS_VFENEZBS_VFENEZFS_VFENEZHS  = 707,
3537
    VISTR_VISTRB_VISTRF_VISTRH  = 708,
3538
    VISTRBS_VISTRFS_VISTRHS = 709,
3539
    VSTRC_VSTRCB_VSTRCF_VSTRCH  = 710,
3540
    VSTRCBS_VSTRCFS_VSTRCHS = 711,
3541
    VSTRCZB_VSTRCZF_VSTRCZH = 712,
3542
    VSTRCZBS_VSTRCZFS_VSTRCZHS  = 713,
3543
    VLIP  = 714,
3544
    VPKZ  = 715,
3545
    VUPKZ = 716,
3546
    VCVB_VCVBG  = 717,
3547
    VCVD_VCVDG  = 718,
3548
    VAP_VSP = 719,
3549
    VMP_VMSP  = 720,
3550
    VDP_VRP = 721,
3551
    VSDP  = 722,
3552
    VSRP  = 723,
3553
    VPSOP = 724,
3554
    VCP_VTP = 725,
3555
    EPSW  = 726,
3556
    LPSW_LPSWE  = 727,
3557
    IPK = 728,
3558
    SPKA  = 729,
3559
    SSM = 730,
3560
    STNSM_STOSM = 731,
3561
    IAC = 732,
3562
    SAC_SACF  = 733,
3563
    LCTL_LCTLG  = 734,
3564
    STCTG_STCTL = 735,
3565
    EPAIR_EPAR_ESAIR_ESAR = 736,
3566
    SSAIR_SSAR  = 737,
3567
    ESEA  = 738,
3568
    SPX = 739,
3569
    STPX  = 740,
3570
    ISKE  = 741,
3571
    IVSK  = 742,
3572
    SSKE_SSKEOpt  = 743,
3573
    RRBE_RRBM = 744,
3574
    IRBM  = 745,
3575
    PFMF  = 746,
3576
    TB  = 747,
3577
    PGIN  = 748,
3578
    PGOUT = 749,
3579
    IPTE_IPTEOpt_IPTEOptOpt = 750,
3580
    IDTE_IDTEOpt  = 751,
3581
    CRDTE_CRDTEOpt  = 752,
3582
    PTLB  = 753,
3583
    CSP_CSPG  = 754,
3584
    LPTEA = 755,
3585
    LRA_LRAG_LRAY = 756,
3586
    STRAG = 757,
3587
    LURA_LURAG  = 758,
3588
    STURA_STURG = 759,
3589
    TPROT = 760,
3590
    MVCK_MVCP_MVCS  = 761,
3591
    MVCDK_MVCSK = 762,
3592
    MVCOS = 763,
3593
    MVPG  = 764,
3594
    LASP  = 765,
3595
    PALB  = 766,
3596
    PC  = 767,
3597
    PR  = 768,
3598
    PT_PTI  = 769,
3599
    RP  = 770,
3600
    BSA_BSG = 771,
3601
    TAR = 772,
3602
    BAKR  = 773,
3603
    EREG_EREGG  = 774,
3604
    ESTA_MSTA = 775,
3605
    PTFF  = 776,
3606
    SCK = 777,
3607
    SCKPF = 778,
3608
    SCKC  = 779,
3609
    SPT = 780,
3610
    STCK_STCKF  = 781,
3611
    STCKE = 782,
3612
    STCKC = 783,
3613
    STPT  = 784,
3614
    STAP  = 785,
3615
    STIDP = 786,
3616
    STSI  = 787,
3617
    STFL_STFLE  = 788,
3618
    ECAG  = 789,
3619
    ECTG  = 790,
3620
    PTF = 791,
3621
    PCKMO = 792,
3622
    SVC = 793,
3623
    MC  = 794,
3624
    DIAG  = 795,
3625
    TRACE_TRACG = 796,
3626
    TRAP2_TRAP4 = 797,
3627
    SIGP  = 798,
3628
    SIGA  = 799,
3629
    SIE = 800,
3630
    LPP = 801,
3631
    ECPGA = 802,
3632
    ECCTR_EPCTR = 803,
3633
    LCCTL = 804,
3634
    LPCTL_LSCTL = 805,
3635
    QCTRI_QSI = 806,
3636
    SCCTR_SPCTR = 807,
3637
    CSCH_HSCH_RSCH_XSCH = 808,
3638
    MSCH_SSCH_STSCH_TSCH  = 809,
3639
    RCHP  = 810,
3640
    SCHM  = 811,
3641
    STCPS_STCRW = 812,
3642
    TPI = 813,
3643
    SAL = 814,
3644
    AGF = 815,
3645
    SGF = 816,
3646
    KM_KMC_KMCTR_KMF_KMO  = 817,
3647
    PCC_PPNO  = 818,
3648
    VLLEZ_VLLEZB_VLLEZF_VLLEZG_VLLEZH = 819,
3649
    VN_VNC_VNO  = 820,
3650
    VO  = 821,
3651
    VPOPCT  = 822,
3652
    VFMA_VFMS = 823,
3653
    VFMADB_VFMSDB = 824,
3654
    WFMADB_WFMSDB = 825,
3655
    VFCEDB_VFCHDB_VFCHEDB = 826,
3656
    WFCEDB_WFCHDB_WFCHEDB = 827,
3657
    VFCEDBS_VFCHDBS_VFCHEDBS  = 828,
3658
    WFCEDBS_WFCHDBS_WFCHEDBS  = 829,
3659
    LMux_L_LFH_LRL_LY = 830,
3660
    LOCGR_LOCGRAsm_LOCGRAsmE_LOCGRAsmH_LOCGRAsmHE_LOCGRAsmL_LOCGRAsmLE_LOCGRAsmLH_LOCGRAsmM_LOCGRAsmNE_LOCGRAsmNH_LOCGRAsmNHE_LOCGRAsmNL_LOCGRAsmNLE_LOCGRAsmNLH_LOCGRAsmNM_LOCGRAsmNO_LOCGRAsmNP_LOCGRAsmNZ_LOCGRAsmO_LOCGRAsmP_LOCGRAsmZ_LOCR_LOCRAsm_LOCRAsmE_LOCRAsmH_LOCRAsmHE_LOCRAsmL_LOCRAsmLE_LOCRAsmLH_LOCRAsmM_LOCRAsmNE_LOCRAsmNH_LOCRAsmNHE_LOCRAsmNL_LOCRAsmNLE_LOCRAsmNLH_LOCRAsmNM_LOCRAsmNO_LOCRAsmNP_LOCRAsmNZ_LOCRAsmO_LOCRAsmP_LOCRAsmZ = 831,
3661
    LOC_LOCAsm_LOCAsmE_LOCAsmH_LOCAsmHE_LOCAsmL_LOCAsmLE_LOCAsmLH_LOCAsmM_LOCAsmNE_LOCAsmNH_LOCAsmNHE_LOCAsmNL_LOCAsmNLE_LOCAsmNLH_LOCAsmNM_LOCAsmNO_LOCAsmNP_LOCAsmNZ_LOCAsmO_LOCAsmP_LOCAsmZ_LOCG_LOCGAsm_LOCGAsmE_LOCGAsmH_LOCGAsmHE_LOCGAsmL_LOCGAsmLE_LOCGAsmLH_LOCGAsmM_LOCGAsmNE_LOCGAsmNH_LOCGAsmNHE_LOCGAsmNL_LOCGAsmNLE_LOCGAsmNLH_LOCGAsmNM_LOCGAsmNO_LOCGAsmNP_LOCGAsmNZ_LOCGAsmO_LOCGAsmP_LOCGAsmZ = 832,
3662
    STOC_STOCAsm_STOCAsmE_STOCAsmH_STOCAsmHE_STOCAsmL_STOCAsmLE_STOCAsmLH_STOCAsmM_STOCAsmNE_STOCAsmNH_STOCAsmNHE_STOCAsmNL_STOCAsmNLE_STOCAsmNLH_STOCAsmNM_STOCAsmNO_STOCAsmNP_STOCAsmNZ_STOCAsmO_STOCAsmP_STOCAsmZ_STOCG_STOCGAsm_STOCGAsmE_STOCGAsmH_STOCGAsmHE_STOCGAsmL_STOCGAsmLE_STOCGAsmLH_STOCGAsmM_STOCGAsmNE_STOCGAsmNH_STOCGAsmNHE_STOCGAsmNL_STOCGAsmNLE_STOCGAsmNLH_STOCGAsmNM_STOCGAsmNO_STOCGAsmNP_STOCGAsmNZ_STOCGAsmO_STOCGAsmP_STOCGAsmZ = 833,
3663
    ALSI_ASI  = 834,
3664
    ALGF  = 835,
3665
    PCC = 836,
3666
    CDFTR = 837,
3667
    CXFTR = 838,
3668
    CXLFTR  = 839,
3669
    CFDTR = 840,
3670
    CFXTR = 841,
3671
    MVCSK = 842,
3672
    RISBG_RISBG32 = 843,
3673
    STCK  = 844,
3674
    SCHED_LIST_END = 845
3675
  };
3676
} // end Sched namespace
3677
} // end SystemZ namespace
3678
} // end llvm namespace
3679
#endif // GET_INSTRINFO_SCHED_ENUM
3680
3681
#ifdef GET_INSTRINFO_MC_DESC
3682
#undef GET_INSTRINFO_MC_DESC
3683
namespace llvm {
3684
3685
static const MCPhysReg ImplicitList1[] = { SystemZ::CC, 0 };
3686
static const MCPhysReg ImplicitList2[] = { SystemZ::R1D, 0 };
3687
static const MCPhysReg ImplicitList3[] = { SystemZ::R14D, SystemZ::CC, 0 };
3688
static const MCPhysReg ImplicitList4[] = { SystemZ::R1D, SystemZ::R2D, SystemZ::R3D, 0 };
3689
static const MCPhysReg ImplicitList5[] = { SystemZ::CC, SystemZ::R1D, SystemZ::R2D, SystemZ::R3D, 0 };
3690
static const MCPhysReg ImplicitList6[] = { SystemZ::R0L, 0 };
3691
static const MCPhysReg ImplicitList7[] = { SystemZ::R0L, SystemZ::R1D, 0 };
3692
static const MCPhysReg ImplicitList8[] = { SystemZ::CC, SystemZ::R1D, 0 };
3693
static const MCPhysReg ImplicitList9[] = { SystemZ::R1L, 0 };
3694
static const MCPhysReg ImplicitList10[] = { SystemZ::R0L, SystemZ::R1L, 0 };
3695
static const MCPhysReg ImplicitList11[] = { SystemZ::R0D, SystemZ::R1D, 0 };
3696
static const MCPhysReg ImplicitList12[] = { SystemZ::R2L, 0 };
3697
static const MCPhysReg ImplicitList13[] = { SystemZ::R0L, SystemZ::F4Q, 0 };
3698
static const MCPhysReg ImplicitList14[] = { SystemZ::CC, SystemZ::R1L, SystemZ::F0Q, 0 };
3699
static const MCPhysReg ImplicitList15[] = { SystemZ::R1L, SystemZ::R2D, 0 };
3700
static const MCPhysReg ImplicitList16[] = { SystemZ::R0D, SystemZ::R1D, SystemZ::R2D, SystemZ::R3D, 0 };
3701
static const MCPhysReg ImplicitList17[] = { SystemZ::R0D, 0 };
3702
static const MCPhysReg ImplicitList18[] = { SystemZ::R0D, SystemZ::CC, 0 };
3703
static const MCPhysReg ImplicitList19[] = { SystemZ::R0L, SystemZ::CC, 0 };
3704
static const MCPhysReg ImplicitList20[] = { SystemZ::CC, SystemZ::R0L, SystemZ::R1D, 0 };
3705
static const MCPhysReg ImplicitList21[] = { SystemZ::R0D, SystemZ::R1D, SystemZ::R2D, SystemZ::R3D, SystemZ::R4D, SystemZ::R5D, 0 };
3706
static const MCPhysReg ImplicitList22[] = { SystemZ::CC, SystemZ::R0D, SystemZ::R1D, SystemZ::R2D, SystemZ::R3D, SystemZ::R5D, 0 };
3707
3708
static const MCOperandInfo OperandInfo2[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3709
static const MCOperandInfo OperandInfo3[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3710
static const MCOperandInfo OperandInfo4[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3711
static const MCOperandInfo OperandInfo5[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3712
static const MCOperandInfo OperandInfo6[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3713
static const MCOperandInfo OperandInfo7[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3714
static const MCOperandInfo OperandInfo8[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3715
static const MCOperandInfo OperandInfo9[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3716
static const MCOperandInfo OperandInfo10[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
3717
static const MCOperandInfo OperandInfo11[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3718
static const MCOperandInfo OperandInfo12[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
3719
static const MCOperandInfo OperandInfo13[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, };
3720
static const MCOperandInfo OperandInfo14[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, };
3721
static const MCOperandInfo OperandInfo15[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3722
static const MCOperandInfo OperandInfo16[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3723
static const MCOperandInfo OperandInfo17[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, };
3724
static const MCOperandInfo OperandInfo18[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3725
static const MCOperandInfo OperandInfo19[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, };
3726
static const MCOperandInfo OperandInfo20[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, };
3727
static const MCOperandInfo OperandInfo21[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, };
3728
static const MCOperandInfo OperandInfo22[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, };
3729
static const MCOperandInfo OperandInfo23[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, };
3730
static const MCOperandInfo OperandInfo24[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, };
3731
static const MCOperandInfo OperandInfo25[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, };
3732
static const MCOperandInfo OperandInfo26[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, };
3733
static const MCOperandInfo OperandInfo27[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3734
static const MCOperandInfo OperandInfo28[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, };
3735
static const MCOperandInfo OperandInfo29[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, };
3736
static const MCOperandInfo OperandInfo30[] = { { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, };
3737
static const MCOperandInfo OperandInfo31[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3738
static const MCOperandInfo OperandInfo32[] = { { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3739
static const MCOperandInfo OperandInfo33[] = { { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3740
static const MCOperandInfo OperandInfo34[] = { { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3741
static const MCOperandInfo OperandInfo35[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3742
static const MCOperandInfo OperandInfo36[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3743
static const MCOperandInfo OperandInfo37[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3744
static const MCOperandInfo OperandInfo38[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3745
static const MCOperandInfo OperandInfo39[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3746
static const MCOperandInfo OperandInfo40[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3747
static const MCOperandInfo OperandInfo41[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3748
static const MCOperandInfo OperandInfo42[] = { { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3749
static const MCOperandInfo OperandInfo43[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3750
static const MCOperandInfo OperandInfo44[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3751
static const MCOperandInfo OperandInfo45[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3752
static const MCOperandInfo OperandInfo46[] = { { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3753
static const MCOperandInfo OperandInfo47[] = { { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3754
static const MCOperandInfo OperandInfo48[] = { { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3755
static const MCOperandInfo OperandInfo49[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3756
static const MCOperandInfo OperandInfo50[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3757
static const MCOperandInfo OperandInfo51[] = { { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3758
static const MCOperandInfo OperandInfo52[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3759
static const MCOperandInfo OperandInfo53[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3760
static const MCOperandInfo OperandInfo54[] = { { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3761
static const MCOperandInfo OperandInfo55[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3762
static const MCOperandInfo OperandInfo56[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3763
static const MCOperandInfo OperandInfo57[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3764
static const MCOperandInfo OperandInfo58[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3765
static const MCOperandInfo OperandInfo59[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3766
static const MCOperandInfo OperandInfo60[] = { { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3767
static const MCOperandInfo OperandInfo61[] = { { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3768
static const MCOperandInfo OperandInfo62[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3769
static const MCOperandInfo OperandInfo63[] = { { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3770
static const MCOperandInfo OperandInfo64[] = { { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3771
static const MCOperandInfo OperandInfo65[] = { { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3772
static const MCOperandInfo OperandInfo66[] = { { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3773
static const MCOperandInfo OperandInfo67[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3774
static const MCOperandInfo OperandInfo68[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3775
static const MCOperandInfo OperandInfo69[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3776
static const MCOperandInfo OperandInfo70[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3777
static const MCOperandInfo OperandInfo71[] = { { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3778
static const MCOperandInfo OperandInfo72[] = { { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3779
static const MCOperandInfo OperandInfo73[] = { { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3780
static const MCOperandInfo OperandInfo74[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3781
static const MCOperandInfo OperandInfo75[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3782
static const MCOperandInfo OperandInfo76[] = { { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3783
static const MCOperandInfo OperandInfo77[] = { { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3784
static const MCOperandInfo OperandInfo78[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3785
static const MCOperandInfo OperandInfo79[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3786
static const MCOperandInfo OperandInfo80[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3787
static const MCOperandInfo OperandInfo81[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3788
static const MCOperandInfo OperandInfo82[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3789
static const MCOperandInfo OperandInfo83[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3790
static const MCOperandInfo OperandInfo84[] = { { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3791
static const MCOperandInfo OperandInfo85[] = { { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3792
static const MCOperandInfo OperandInfo86[] = { { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3793
static const MCOperandInfo OperandInfo87[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3794
static const MCOperandInfo OperandInfo88[] = { { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3795
static const MCOperandInfo OperandInfo89[] = { { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3796
static const MCOperandInfo OperandInfo90[] = { { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3797
static const MCOperandInfo OperandInfo91[] = { { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3798
static const MCOperandInfo OperandInfo92[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3799
static const MCOperandInfo OperandInfo93[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3800
static const MCOperandInfo OperandInfo94[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3801
static const MCOperandInfo OperandInfo95[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3802
static const MCOperandInfo OperandInfo96[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3803
static const MCOperandInfo OperandInfo97[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3804
static const MCOperandInfo OperandInfo98[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3805
static const MCOperandInfo OperandInfo99[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3806
static const MCOperandInfo OperandInfo100[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3807
static const MCOperandInfo OperandInfo101[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3808
static const MCOperandInfo OperandInfo102[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3809
static const MCOperandInfo OperandInfo103[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3810
static const MCOperandInfo OperandInfo104[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3811
static const MCOperandInfo OperandInfo105[] = { { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3812
static const MCOperandInfo OperandInfo106[] = { { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3813
static const MCOperandInfo OperandInfo107[] = { { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3814
static const MCOperandInfo OperandInfo108[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3815
static const MCOperandInfo OperandInfo109[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3816
static const MCOperandInfo OperandInfo110[] = { { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3817
static const MCOperandInfo OperandInfo111[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3818
static const MCOperandInfo OperandInfo112[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3819
static const MCOperandInfo OperandInfo113[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3820
static const MCOperandInfo OperandInfo114[] = { { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3821
static const MCOperandInfo OperandInfo115[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3822
static const MCOperandInfo OperandInfo116[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3823
static const MCOperandInfo OperandInfo117[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3824
static const MCOperandInfo OperandInfo118[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3825
static const MCOperandInfo OperandInfo119[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3826
static const MCOperandInfo OperandInfo120[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3827
static const MCOperandInfo OperandInfo121[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3828
static const MCOperandInfo OperandInfo122[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3829
static const MCOperandInfo OperandInfo123[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3830
static const MCOperandInfo OperandInfo124[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3831
static const MCOperandInfo OperandInfo125[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3832
static const MCOperandInfo OperandInfo126[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3833
static const MCOperandInfo OperandInfo127[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3834
static const MCOperandInfo OperandInfo128[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3835
static const MCOperandInfo OperandInfo129[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3836
static const MCOperandInfo OperandInfo130[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3837
static const MCOperandInfo OperandInfo131[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3838
static const MCOperandInfo OperandInfo132[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3839
static const MCOperandInfo OperandInfo133[] = { { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3840
static const MCOperandInfo OperandInfo134[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3841
static const MCOperandInfo OperandInfo135[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3842
static const MCOperandInfo OperandInfo136[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3843
static const MCOperandInfo OperandInfo137[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3844
static const MCOperandInfo OperandInfo138[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3845
static const MCOperandInfo OperandInfo139[] = { { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3846
static const MCOperandInfo OperandInfo140[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3847
static const MCOperandInfo OperandInfo141[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3848
static const MCOperandInfo OperandInfo142[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3849
static const MCOperandInfo OperandInfo143[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3850
static const MCOperandInfo OperandInfo144[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3851
static const MCOperandInfo OperandInfo145[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3852
static const MCOperandInfo OperandInfo146[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3853
static const MCOperandInfo OperandInfo147[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3854
static const MCOperandInfo OperandInfo148[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3855
static const MCOperandInfo OperandInfo149[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3856
static const MCOperandInfo OperandInfo150[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3857
static const MCOperandInfo OperandInfo151[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3858
static const MCOperandInfo OperandInfo152[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3859
static const MCOperandInfo OperandInfo153[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3860
static const MCOperandInfo OperandInfo154[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3861
static const MCOperandInfo OperandInfo155[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3862
static const MCOperandInfo OperandInfo156[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3863
static const MCOperandInfo OperandInfo157[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3864
static const MCOperandInfo OperandInfo158[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3865
static const MCOperandInfo OperandInfo159[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3866
static const MCOperandInfo OperandInfo160[] = { { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3867
static const MCOperandInfo OperandInfo161[] = { { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3868
static const MCOperandInfo OperandInfo162[] = { { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3869
static const MCOperandInfo OperandInfo163[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3870
static const MCOperandInfo OperandInfo164[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3871
static const MCOperandInfo OperandInfo165[] = { { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3872
static const MCOperandInfo OperandInfo166[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3873
static const MCOperandInfo OperandInfo167[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, };
3874
static const MCOperandInfo OperandInfo168[] = { { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3875
static const MCOperandInfo OperandInfo169[] = { { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, };
3876
static const MCOperandInfo OperandInfo170[] = { { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3877
static const MCOperandInfo OperandInfo171[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3878
static const MCOperandInfo OperandInfo172[] = { { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3879
static const MCOperandInfo OperandInfo173[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3880
static const MCOperandInfo OperandInfo174[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3881
static const MCOperandInfo OperandInfo175[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3882
static const MCOperandInfo OperandInfo176[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3883
static const MCOperandInfo OperandInfo177[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, };
3884
static const MCOperandInfo OperandInfo178[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3885
static const MCOperandInfo OperandInfo179[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3886
static const MCOperandInfo OperandInfo180[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3887
static const MCOperandInfo OperandInfo181[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3888
static const MCOperandInfo OperandInfo182[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3889
static const MCOperandInfo OperandInfo183[] = { { SystemZ::AR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::AR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3890
static const MCOperandInfo OperandInfo184[] = { { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3891
static const MCOperandInfo OperandInfo185[] = { { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3892
static const MCOperandInfo OperandInfo186[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3893
static const MCOperandInfo OperandInfo187[] = { { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3894
static const MCOperandInfo OperandInfo188[] = { { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3895
static const MCOperandInfo OperandInfo189[] = { { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3896
static const MCOperandInfo OperandInfo190[] = { { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3897
static const MCOperandInfo OperandInfo191[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3898
static const MCOperandInfo OperandInfo192[] = { { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3899
static const MCOperandInfo OperandInfo193[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3900
static const MCOperandInfo OperandInfo194[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3901
static const MCOperandInfo OperandInfo195[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3902
static const MCOperandInfo OperandInfo196[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3903
static const MCOperandInfo OperandInfo197[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3904
static const MCOperandInfo OperandInfo198[] = { { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3905
static const MCOperandInfo OperandInfo199[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3906
static const MCOperandInfo OperandInfo200[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3907
static const MCOperandInfo OperandInfo201[] = { { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3908
static const MCOperandInfo OperandInfo202[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::AR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3909
static const MCOperandInfo OperandInfo203[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3910
static const MCOperandInfo OperandInfo204[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3911
static const MCOperandInfo OperandInfo205[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3912
static const MCOperandInfo OperandInfo206[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
3913
static const MCOperandInfo OperandInfo207[] = { { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3914
static const MCOperandInfo OperandInfo208[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3915
static const MCOperandInfo OperandInfo209[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3916
static const MCOperandInfo OperandInfo210[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3917
static const MCOperandInfo OperandInfo211[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3918
static const MCOperandInfo OperandInfo212[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3919
static const MCOperandInfo OperandInfo213[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3920
static const MCOperandInfo OperandInfo214[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3921
static const MCOperandInfo OperandInfo215[] = { { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3922
static const MCOperandInfo OperandInfo216[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3923
static const MCOperandInfo OperandInfo217[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3924
static const MCOperandInfo OperandInfo218[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3925
static const MCOperandInfo OperandInfo219[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3926
static const MCOperandInfo OperandInfo220[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3927
static const MCOperandInfo OperandInfo221[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3928
static const MCOperandInfo OperandInfo222[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3929
static const MCOperandInfo OperandInfo223[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3930
static const MCOperandInfo OperandInfo224[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3931
static const MCOperandInfo OperandInfo225[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3932
static const MCOperandInfo OperandInfo226[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3933
static const MCOperandInfo OperandInfo227[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3934
static const MCOperandInfo OperandInfo228[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3935
static const MCOperandInfo OperandInfo229[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3936
static const MCOperandInfo OperandInfo230[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3937
static const MCOperandInfo OperandInfo231[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3938
static const MCOperandInfo OperandInfo232[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3939
static const MCOperandInfo OperandInfo233[] = { { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
3940
static const MCOperandInfo OperandInfo234[] = { { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((2 << 16) | (1 << MCOI::TIED_TO)) }, };
3941
static const MCOperandInfo OperandInfo235[] = { { SystemZ::AR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::AR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3942
static const MCOperandInfo OperandInfo236[] = { { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3943
static const MCOperandInfo OperandInfo237[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3944
static const MCOperandInfo OperandInfo238[] = { { SystemZ::CR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::CR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3945
static const MCOperandInfo OperandInfo239[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3946
static const MCOperandInfo OperandInfo240[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3947
static const MCOperandInfo OperandInfo241[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3948
static const MCOperandInfo OperandInfo242[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3949
static const MCOperandInfo OperandInfo243[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3950
static const MCOperandInfo OperandInfo244[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3951
static const MCOperandInfo OperandInfo245[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3952
static const MCOperandInfo OperandInfo246[] = { { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3953
static const MCOperandInfo OperandInfo247[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3954
static const MCOperandInfo OperandInfo248[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3955
static const MCOperandInfo OperandInfo249[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3956
static const MCOperandInfo OperandInfo250[] = { { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3957
static const MCOperandInfo OperandInfo251[] = { { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3958
static const MCOperandInfo OperandInfo252[] = { { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3959
static const MCOperandInfo OperandInfo253[] = { { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3960
static const MCOperandInfo OperandInfo254[] = { { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3961
static const MCOperandInfo OperandInfo255[] = { { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3962
static const MCOperandInfo OperandInfo256[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3963
static const MCOperandInfo OperandInfo257[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3964
static const MCOperandInfo OperandInfo258[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3965
static const MCOperandInfo OperandInfo259[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3966
static const MCOperandInfo OperandInfo260[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3967
static const MCOperandInfo OperandInfo261[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3968
static const MCOperandInfo OperandInfo262[] = { { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3969
static const MCOperandInfo OperandInfo263[] = { { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3970
static const MCOperandInfo OperandInfo264[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3971
static const MCOperandInfo OperandInfo265[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3972
static const MCOperandInfo OperandInfo266[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3973
static const MCOperandInfo OperandInfo267[] = { { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3974
static const MCOperandInfo OperandInfo268[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3975
static const MCOperandInfo OperandInfo269[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3976
static const MCOperandInfo OperandInfo270[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3977
static const MCOperandInfo OperandInfo271[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3978
static const MCOperandInfo OperandInfo272[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3979
static const MCOperandInfo OperandInfo273[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3980
static const MCOperandInfo OperandInfo274[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3981
static const MCOperandInfo OperandInfo275[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3982
static const MCOperandInfo OperandInfo276[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3983
static const MCOperandInfo OperandInfo277[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3984
static const MCOperandInfo OperandInfo278[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3985
static const MCOperandInfo OperandInfo279[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3986
static const MCOperandInfo OperandInfo280[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3987
static const MCOperandInfo OperandInfo281[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3988
static const MCOperandInfo OperandInfo282[] = { { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3989
static const MCOperandInfo OperandInfo283[] = { { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3990
static const MCOperandInfo OperandInfo284[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3991
static const MCOperandInfo OperandInfo285[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3992
static const MCOperandInfo OperandInfo286[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3993
static const MCOperandInfo OperandInfo287[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3994
static const MCOperandInfo OperandInfo288[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
3995
static const MCOperandInfo OperandInfo289[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
3996
static const MCOperandInfo OperandInfo290[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3997
static const MCOperandInfo OperandInfo291[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
3998
static const MCOperandInfo OperandInfo292[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
3999
static const MCOperandInfo OperandInfo293[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4000
static const MCOperandInfo OperandInfo294[] = { { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4001
static const MCOperandInfo OperandInfo295[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4002
static const MCOperandInfo OperandInfo296[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4003
static const MCOperandInfo OperandInfo297[] = { { SystemZ::AR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
4004
static const MCOperandInfo OperandInfo298[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4005
static const MCOperandInfo OperandInfo299[] = { { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4006
static const MCOperandInfo OperandInfo300[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4007
static const MCOperandInfo OperandInfo301[] = { { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4008
static const MCOperandInfo OperandInfo302[] = { { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4009
static const MCOperandInfo OperandInfo303[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4010
static const MCOperandInfo OperandInfo304[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4011
static const MCOperandInfo OperandInfo305[] = { { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4012
static const MCOperandInfo OperandInfo306[] = { { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4013
static const MCOperandInfo OperandInfo307[] = { { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4014
static const MCOperandInfo OperandInfo308[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4015
static const MCOperandInfo OperandInfo309[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
4016
static const MCOperandInfo OperandInfo310[] = { { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, };
4017
static const MCOperandInfo OperandInfo311[] = { { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4018
static const MCOperandInfo OperandInfo312[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4019
static const MCOperandInfo OperandInfo313[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, };
4020
static const MCOperandInfo OperandInfo314[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4021
static const MCOperandInfo OperandInfo315[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
4022
static const MCOperandInfo OperandInfo316[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4023
static const MCOperandInfo OperandInfo317[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
4024
static const MCOperandInfo OperandInfo318[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4025
static const MCOperandInfo OperandInfo319[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4026
static const MCOperandInfo OperandInfo320[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4027
static const MCOperandInfo OperandInfo321[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
4028
static const MCOperandInfo OperandInfo322[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4029
static const MCOperandInfo OperandInfo323[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4030
static const MCOperandInfo OperandInfo324[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4031
static const MCOperandInfo OperandInfo325[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4032
static const MCOperandInfo OperandInfo326[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4033
static const MCOperandInfo OperandInfo327[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4034
static const MCOperandInfo OperandInfo328[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4035
static const MCOperandInfo OperandInfo329[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4036
static const MCOperandInfo OperandInfo330[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4037
static const MCOperandInfo OperandInfo331[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4038
static const MCOperandInfo OperandInfo332[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4039
static const MCOperandInfo OperandInfo333[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4040
static const MCOperandInfo OperandInfo334[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4041
static const MCOperandInfo OperandInfo335[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4042
static const MCOperandInfo OperandInfo336[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4043
static const MCOperandInfo OperandInfo337[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4044
static const MCOperandInfo OperandInfo338[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4045
static const MCOperandInfo OperandInfo339[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4046
static const MCOperandInfo OperandInfo340[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4047
static const MCOperandInfo OperandInfo341[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4048
static const MCOperandInfo OperandInfo342[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4049
static const MCOperandInfo OperandInfo343[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4050
static const MCOperandInfo OperandInfo344[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4051
static const MCOperandInfo OperandInfo345[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4052
static const MCOperandInfo OperandInfo346[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4053
static const MCOperandInfo OperandInfo347[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4054
static const MCOperandInfo OperandInfo348[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
4055
static const MCOperandInfo OperandInfo349[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
4056
static const MCOperandInfo OperandInfo350[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4057
static const MCOperandInfo OperandInfo351[] = { { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4058
static const MCOperandInfo OperandInfo352[] = { { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
4059
static const MCOperandInfo OperandInfo353[] = { { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
4060
static const MCOperandInfo OperandInfo354[] = { { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4061
static const MCOperandInfo OperandInfo355[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
4062
static const MCOperandInfo OperandInfo356[] = { { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
4063
static const MCOperandInfo OperandInfo357[] = { { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4064
static const MCOperandInfo OperandInfo358[] = { { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4065
static const MCOperandInfo OperandInfo359[] = { { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
4066
static const MCOperandInfo OperandInfo360[] = { { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
4067
static const MCOperandInfo OperandInfo361[] = { { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4068
static const MCOperandInfo OperandInfo362[] = { { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4069
static const MCOperandInfo OperandInfo363[] = { { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4070
static const MCOperandInfo OperandInfo364[] = { { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
4071
4072
extern const MCInstrDesc SystemZInsts[] = {
4073
  { 0,  1,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #0 = PHI
4074
  { 1,  0,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #1 = INLINEASM
4075
  { 2,  1,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr },  // Inst #2 = CFI_INSTRUCTION
4076
  { 3,  1,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr },  // Inst #3 = EH_LABEL
4077
  { 4,  1,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr },  // Inst #4 = GC_LABEL
4078
  { 5,  1,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr },  // Inst #5 = ANNOTATION_LABEL
4079
  { 6,  0,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #6 = KILL
4080
  { 7,  3,  1,  0,  29, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo4, -1 ,nullptr },  // Inst #7 = EXTRACT_SUBREG
4081
  { 8,  4,  1,  0,  30, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo5, -1 ,nullptr },  // Inst #8 = INSERT_SUBREG
4082
  { 9,  1,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #9 = IMPLICIT_DEF
4083
  { 10, 4,  1,  0,  32, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo6, -1 ,nullptr },  // Inst #10 = SUBREG_TO_REG
4084
  { 11, 3,  1,  0,  28, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo4, -1 ,nullptr },  // Inst #11 = COPY_TO_REGCLASS
4085
  { 12, 0,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #12 = DBG_VALUE
4086
  { 13, 1,  0,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #13 = DBG_LABEL
4087
  { 14, 2,  1,  0,  31, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo7, -1 ,nullptr },  // Inst #14 = REG_SEQUENCE
4088
  { 15, 2,  1,  0,  28, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo7, -1 ,nullptr },  // Inst #15 = COPY
4089
  { 16, 0,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #16 = BUNDLE
4090
  { 17, 1,  0,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr },  // Inst #17 = LIFETIME_START
4091
  { 18, 1,  0,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr },  // Inst #18 = LIFETIME_END
4092
  { 19, 2,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo8, -1 ,nullptr },  // Inst #19 = STACKMAP
4093
  { 20, 1,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #20 = FENTRY_CALL
4094
  { 21, 6,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo9, -1 ,nullptr },  // Inst #21 = PATCHPOINT
4095
  { 22, 1,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x0ULL, nullptr, nullptr, OperandInfo10, -1 ,nullptr },  // Inst #22 = LOAD_STACK_GUARD
4096
  { 23, 0,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #23 = STATEPOINT
4097
  { 24, 2,  0,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo11, -1 ,nullptr },  // Inst #24 = LOCAL_ESCAPE
4098
  { 25, 1,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #25 = FAULTING_OP
4099
  { 26, 1,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #26 = PATCHABLE_OP
4100
  { 27, 0,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #27 = PATCHABLE_FUNCTION_ENTER
4101
  { 28, 0,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #28 = PATCHABLE_RET
4102
  { 29, 0,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #29 = PATCHABLE_FUNCTION_EXIT
4103
  { 30, 0,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #30 = PATCHABLE_TAIL_CALL
4104
  { 31, 2,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo11, -1 ,nullptr },  // Inst #31 = PATCHABLE_EVENT_CALL
4105
  { 32, 3,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr },  // Inst #32 = PATCHABLE_TYPED_EVENT_CALL
4106
  { 33, 1,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #33 = ICALL_BRANCH_FUNNEL
4107
  { 34, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #34 = G_ADD
4108
  { 35, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #35 = G_SUB
4109
  { 36, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #36 = G_MUL
4110
  { 37, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #37 = G_SDIV
4111
  { 38, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #38 = G_UDIV
4112
  { 39, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #39 = G_SREM
4113
  { 40, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #40 = G_UREM
4114
  { 41, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #41 = G_AND
4115
  { 42, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #42 = G_OR
4116
  { 43, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #43 = G_XOR
4117
  { 44, 1,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo14, -1 ,nullptr },  // Inst #44 = G_IMPLICIT_DEF
4118
  { 45, 1,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, OperandInfo14, -1 ,nullptr },  // Inst #45 = G_PHI
4119
  { 46, 2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo15, -1 ,nullptr },  // Inst #46 = G_FRAME_INDEX
4120
  { 47, 2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo15, -1 ,nullptr },  // Inst #47 = G_GLOBAL_VALUE
4121
  { 48, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo16, -1 ,nullptr },  // Inst #48 = G_EXTRACT
4122
  { 49, 2,  2,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #49 = G_UNMERGE_VALUES
4123
  { 50, 4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr },  // Inst #50 = G_INSERT
4124
  { 51, 2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #51 = G_MERGE_VALUES
4125
  { 52, 2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #52 = G_PTRTOINT
4126
  { 53, 2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #53 = G_INTTOPTR
4127
  { 54, 2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #54 = G_BITCAST
4128
  { 55, 2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #55 = G_LOAD
4129
  { 56, 2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #56 = G_SEXTLOAD
4130
  { 57, 2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #57 = G_ZEXTLOAD
4131
  { 58, 2,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #58 = G_STORE
4132
  { 59, 5,  2,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr },  // Inst #59 = G_ATOMIC_CMPXCHG_WITH_SUCCESS
4133
  { 60, 4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo20, -1 ,nullptr },  // Inst #60 = G_ATOMIC_CMPXCHG
4134
  { 61, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo21, -1 ,nullptr },  // Inst #61 = G_ATOMICRMW_XCHG
4135
  { 62, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo21, -1 ,nullptr },  // Inst #62 = G_ATOMICRMW_ADD
4136
  { 63, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo21, -1 ,nullptr },  // Inst #63 = G_ATOMICRMW_SUB
4137
  { 64, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo21, -1 ,nullptr },  // Inst #64 = G_ATOMICRMW_AND
4138
  { 65, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo21, -1 ,nullptr },  // Inst #65 = G_ATOMICRMW_NAND
4139
  { 66, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo21, -1 ,nullptr },  // Inst #66 = G_ATOMICRMW_OR
4140
  { 67, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo21, -1 ,nullptr },  // Inst #67 = G_ATOMICRMW_XOR
4141
  { 68, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo21, -1 ,nullptr },  // Inst #68 = G_ATOMICRMW_MAX
4142
  { 69, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo21, -1 ,nullptr },  // Inst #69 = G_ATOMICRMW_MIN
4143
  { 70, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo21, -1 ,nullptr },  // Inst #70 = G_ATOMICRMW_UMAX
4144
  { 71, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo21, -1 ,nullptr },  // Inst #71 = G_ATOMICRMW_UMIN
4145
  { 72, 2,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo15, -1 ,nullptr },  // Inst #72 = G_BRCOND
4146
  { 73, 1,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo14, -1 ,nullptr },  // Inst #73 = G_BRINDIRECT
4147
  { 74, 1,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #74 = G_INTRINSIC
4148
  { 75, 1,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #75 = G_INTRINSIC_W_SIDE_EFFECTS
4149
  { 76, 2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #76 = G_ANYEXT
4150
  { 77, 2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #77 = G_TRUNC
4151
  { 78, 2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo15, -1 ,nullptr },  // Inst #78 = G_CONSTANT
4152
  { 79, 2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo15, -1 ,nullptr },  // Inst #79 = G_FCONSTANT
4153
  { 80, 1,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo14, -1 ,nullptr },  // Inst #80 = G_VASTART
4154
  { 81, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo16, -1 ,nullptr },  // Inst #81 = G_VAARG
4155
  { 82, 2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #82 = G_SEXT
4156
  { 83, 2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #83 = G_ZEXT
4157
  { 84, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #84 = G_SHL
4158
  { 85, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #85 = G_LSHR
4159
  { 86, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #86 = G_ASHR
4160
  { 87, 4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo22, -1 ,nullptr },  // Inst #87 = G_ICMP
4161
  { 88, 4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo22, -1 ,nullptr },  // Inst #88 = G_FCMP
4162
  { 89, 4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo20, -1 ,nullptr },  // Inst #89 = G_SELECT
4163
  { 90, 5,  2,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo23, -1 ,nullptr },  // Inst #90 = G_UADDE
4164
  { 91, 5,  2,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo23, -1 ,nullptr },  // Inst #91 = G_USUBE
4165
  { 92, 4,  2,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo20, -1 ,nullptr },  // Inst #92 = G_SADDO
4166
  { 93, 4,  2,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo20, -1 ,nullptr },  // Inst #93 = G_SSUBO
4167
  { 94, 4,  2,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo20, -1 ,nullptr },  // Inst #94 = G_UMULO
4168
  { 95, 4,  2,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo20, -1 ,nullptr },  // Inst #95 = G_SMULO
4169
  { 96, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #96 = G_UMULH
4170
  { 97, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #97 = G_SMULH
4171
  { 98, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #98 = G_FADD
4172
  { 99, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #99 = G_FSUB
4173
  { 100,  3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #100 = G_FMUL
4174
  { 101,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo24, -1 ,nullptr },  // Inst #101 = G_FMA
4175
  { 102,  3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #102 = G_FDIV
4176
  { 103,  3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #103 = G_FREM
4177
  { 104,  3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr },  // Inst #104 = G_FPOW
4178
  { 105,  2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo25, -1 ,nullptr },  // Inst #105 = G_FEXP
4179
  { 106,  2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo25, -1 ,nullptr },  // Inst #106 = G_FEXP2
4180
  { 107,  2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo25, -1 ,nullptr },  // Inst #107 = G_FLOG
4181
  { 108,  2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo25, -1 ,nullptr },  // Inst #108 = G_FLOG2
4182
  { 109,  2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo25, -1 ,nullptr },  // Inst #109 = G_FNEG
4183
  { 110,  2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #110 = G_FPEXT
4184
  { 111,  2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #111 = G_FPTRUNC
4185
  { 112,  2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #112 = G_FPTOSI
4186
  { 113,  2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #113 = G_FPTOUI
4187
  { 114,  2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #114 = G_SITOFP
4188
  { 115,  2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #115 = G_UITOFP
4189
  { 116,  2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo25, -1 ,nullptr },  // Inst #116 = G_FABS
4190
  { 117,  3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo26, -1 ,nullptr },  // Inst #117 = G_GEP
4191
  { 118,  3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo27, -1 ,nullptr },  // Inst #118 = G_PTR_MASK
4192
  { 119,  1,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #119 = G_BR
4193
  { 120,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo28, -1 ,nullptr },  // Inst #120 = G_INSERT_VECTOR_ELT
4194
  { 121,  3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo29, -1 ,nullptr },  // Inst #121 = G_EXTRACT_VECTOR_ELT
4195
  { 122,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo30, -1 ,nullptr },  // Inst #122 = G_SHUFFLE_VECTOR
4196
  { 123,  2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo25, -1 ,nullptr },  // Inst #123 = G_BSWAP
4197
  { 124,  2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #124 = G_ADDRSPACE_CAST
4198
  { 125,  2,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo8, -1 ,nullptr },  // Inst #125 = ADJCALLSTACKDOWN
4199
  { 126,  2,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo8, -1 ,nullptr },  // Inst #126 = ADJCALLSTACKUP
4200
  { 127,  4,  1,  0,  1,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo31, -1 ,nullptr },  // Inst #127 = ADJDYNALLOC
4201
  { 128,  2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr },  // Inst #128 = AEXT128
4202
  { 129,  3,  1,  0,  103,  0|(1ULL<<MCID::Pseudo), 0x23c00ULL, nullptr, ImplicitList1, OperandInfo33, -1 ,nullptr },  // Inst #129 = AFIMux
4203
  { 130,  3,  1,  0,  109,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x23c00ULL, nullptr, ImplicitList1, OperandInfo33, -1 ,nullptr },  // Inst #130 = AHIMux
4204
  { 131,  3,  1,  0,  109,  0|(1ULL<<MCID::Pseudo), 0x23c00ULL, nullptr, ImplicitList1, OperandInfo34, -1 ,nullptr },  // Inst #131 = AHIMuxK
4205
  { 132,  8,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo35, -1 ,nullptr },  // Inst #132 = ATOMIC_CMP_SWAPW
4206
  { 133,  7,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo36, -1 ,nullptr },  // Inst #133 = ATOMIC_LOADW_AFI
4207
  { 134,  7,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo37, -1 ,nullptr },  // Inst #134 = ATOMIC_LOADW_AR
4208
  { 135,  7,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo37, -1 ,nullptr },  // Inst #135 = ATOMIC_LOADW_MAX
4209
  { 136,  7,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo37, -1 ,nullptr },  // Inst #136 = ATOMIC_LOADW_MIN
4210
  { 137,  7,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo36, -1 ,nullptr },  // Inst #137 = ATOMIC_LOADW_NILH
4211
  { 138,  7,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo36, -1 ,nullptr },  // Inst #138 = ATOMIC_LOADW_NILHi
4212
  { 139,  7,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo37, -1 ,nullptr },  // Inst #139 = ATOMIC_LOADW_NR
4213
  { 140,  7,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo37, -1 ,nullptr },  // Inst #140 = ATOMIC_LOADW_NRi
4214
  { 141,  7,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo36, -1 ,nullptr },  // Inst #141 = ATOMIC_LOADW_OILH
4215
  { 142,  7,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo37, -1 ,nullptr },  // Inst #142 = ATOMIC_LOADW_OR
4216
  { 143,  7,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo37, -1 ,nullptr },  // Inst #143 = ATOMIC_LOADW_SR
4217
  { 144,  7,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo37, -1 ,nullptr },  // Inst #144 = ATOMIC_LOADW_UMAX
4218
  { 145,  7,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo37, -1 ,nullptr },  // Inst #145 = ATOMIC_LOADW_UMIN
4219
  { 146,  7,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo36, -1 ,nullptr },  // Inst #146 = ATOMIC_LOADW_XILF
4220
  { 147,  7,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo37, -1 ,nullptr },  // Inst #147 = ATOMIC_LOADW_XR
4221
  { 148,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo38, -1 ,nullptr },  // Inst #148 = ATOMIC_LOAD_AFI
4222
  { 149,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr },  // Inst #149 = ATOMIC_LOAD_AGFI
4223
  { 150,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr },  // Inst #150 = ATOMIC_LOAD_AGHI
4224
  { 151,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo40, -1 ,nullptr },  // Inst #151 = ATOMIC_LOAD_AGR
4225
  { 152,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo38, -1 ,nullptr },  // Inst #152 = ATOMIC_LOAD_AHI
4226
  { 153,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo41, -1 ,nullptr },  // Inst #153 = ATOMIC_LOAD_AR
4227
  { 154,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo41, -1 ,nullptr },  // Inst #154 = ATOMIC_LOAD_MAX_32
4228
  { 155,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo40, -1 ,nullptr },  // Inst #155 = ATOMIC_LOAD_MAX_64
4229
  { 156,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo41, -1 ,nullptr },  // Inst #156 = ATOMIC_LOAD_MIN_32
4230
  { 157,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo40, -1 ,nullptr },  // Inst #157 = ATOMIC_LOAD_MIN_64
4231
  { 158,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo40, -1 ,nullptr },  // Inst #158 = ATOMIC_LOAD_NGR
4232
  { 159,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo40, -1 ,nullptr },  // Inst #159 = ATOMIC_LOAD_NGRi
4233
  { 160,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr },  // Inst #160 = ATOMIC_LOAD_NIHF64
4234
  { 161,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr },  // Inst #161 = ATOMIC_LOAD_NIHF64i
4235
  { 162,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr },  // Inst #162 = ATOMIC_LOAD_NIHH64
4236
  { 163,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr },  // Inst #163 = ATOMIC_LOAD_NIHH64i
4237
  { 164,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr },  // Inst #164 = ATOMIC_LOAD_NIHL64
4238
  { 165,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr },  // Inst #165 = ATOMIC_LOAD_NIHL64i
4239
  { 166,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo38, -1 ,nullptr },  // Inst #166 = ATOMIC_LOAD_NILF
4240
  { 167,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr },  // Inst #167 = ATOMIC_LOAD_NILF64
4241
  { 168,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr },  // Inst #168 = ATOMIC_LOAD_NILF64i
4242
  { 169,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo38, -1 ,nullptr },  // Inst #169 = ATOMIC_LOAD_NILFi
4243
  { 170,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo38, -1 ,nullptr },  // Inst #170 = ATOMIC_LOAD_NILH
4244
  { 171,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr },  // Inst #171 = ATOMIC_LOAD_NILH64
4245
  { 172,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr },  // Inst #172 = ATOMIC_LOAD_NILH64i
4246
  { 173,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo38, -1 ,nullptr },  // Inst #173 = ATOMIC_LOAD_NILHi
4247
  { 174,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo38, -1 ,nullptr },  // Inst #174 = ATOMIC_LOAD_NILL
4248
  { 175,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr },  // Inst #175 = ATOMIC_LOAD_NILL64
4249
  { 176,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr },  // Inst #176 = ATOMIC_LOAD_NILL64i
4250
  { 177,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo38, -1 ,nullptr },  // Inst #177 = ATOMIC_LOAD_NILLi
4251
  { 178,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo41, -1 ,nullptr },  // Inst #178 = ATOMIC_LOAD_NR
4252
  { 179,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo41, -1 ,nullptr },  // Inst #179 = ATOMIC_LOAD_NRi
4253
  { 180,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo40, -1 ,nullptr },  // Inst #180 = ATOMIC_LOAD_OGR
4254
  { 181,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr },  // Inst #181 = ATOMIC_LOAD_OIHF64
4255
  { 182,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr },  // Inst #182 = ATOMIC_LOAD_OIHH64
4256
  { 183,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr },  // Inst #183 = ATOMIC_LOAD_OIHL64
4257
  { 184,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo38, -1 ,nullptr },  // Inst #184 = ATOMIC_LOAD_OILF
4258
  { 185,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr },  // Inst #185 = ATOMIC_LOAD_OILF64
4259
  { 186,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo38, -1 ,nullptr },  // Inst #186 = ATOMIC_LOAD_OILH
4260
  { 187,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr },  // Inst #187 = ATOMIC_LOAD_OILH64
4261
  { 188,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo38, -1 ,nullptr },  // Inst #188 = ATOMIC_LOAD_OILL
4262
  { 189,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr },  // Inst #189 = ATOMIC_LOAD_OILL64
4263
  { 190,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo41, -1 ,nullptr },  // Inst #190 = ATOMIC_LOAD_OR
4264
  { 191,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo40, -1 ,nullptr },  // Inst #191 = ATOMIC_LOAD_SGR
4265
  { 192,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo41, -1 ,nullptr },  // Inst #192 = ATOMIC_LOAD_SR
4266
  { 193,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo41, -1 ,nullptr },  // Inst #193 = ATOMIC_LOAD_UMAX_32
4267
  { 194,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo40, -1 ,nullptr },  // Inst #194 = ATOMIC_LOAD_UMAX_64
4268
  { 195,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo41, -1 ,nullptr },  // Inst #195 = ATOMIC_LOAD_UMIN_32
4269
  { 196,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo40, -1 ,nullptr },  // Inst #196 = ATOMIC_LOAD_UMIN_64
4270
  { 197,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo40, -1 ,nullptr },  // Inst #197 = ATOMIC_LOAD_XGR
4271
  { 198,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr },  // Inst #198 = ATOMIC_LOAD_XIHF64
4272
  { 199,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo38, -1 ,nullptr },  // Inst #199 = ATOMIC_LOAD_XILF
4273
  { 200,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr },  // Inst #200 = ATOMIC_LOAD_XILF64
4274
  { 201,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo41, -1 ,nullptr },  // Inst #201 = ATOMIC_LOAD_XR
4275
  { 202,  7,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo37, -1 ,nullptr },  // Inst #202 = ATOMIC_SWAPW
4276
  { 203,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo41, -1 ,nullptr },  // Inst #203 = ATOMIC_SWAP_32
4277
  { 204,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo40, -1 ,nullptr },  // Inst #204 = ATOMIC_SWAP_64
4278
  { 205,  2,  0,  0,  211,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x3800ULL, nullptr, ImplicitList1, OperandInfo42, -1 ,nullptr },  // Inst #205 = CFIMux
4279
  { 206,  3,  0,  6,  12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList2, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #206 = CGIBCall
4280
  { 207,  3,  0,  6,  12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #207 = CGIBReturn
4281
  { 208,  3,  0,  6,  12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList2, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #208 = CGRBCall
4282
  { 209,  3,  0,  6,  12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #209 = CGRBReturn
4283
  { 210,  2,  0,  0,  211,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x3800ULL, nullptr, ImplicitList1, OperandInfo42, -1 ,nullptr },  // Inst #210 = CHIMux
4284
  { 211,  3,  0,  6,  12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList2, nullptr, OperandInfo45, -1 ,nullptr },  // Inst #211 = CIBCall
4285
  { 212,  3,  0,  6,  12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo45, -1 ,nullptr },  // Inst #212 = CIBReturn
4286
  { 213,  6,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo46, -1 ,nullptr },  // Inst #213 = CLCLoop
4287
  { 214,  5,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo47, -1 ,nullptr },  // Inst #214 = CLCSequence
4288
  { 215,  2,  0,  0,  218,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x103800ULL, nullptr, ImplicitList1, OperandInfo42, -1 ,nullptr },  // Inst #215 = CLFIMux
4289
  { 216,  3,  0,  6,  12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList2, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #216 = CLGIBCall
4290
  { 217,  3,  0,  6,  12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #217 = CLGIBReturn
4291
  { 218,  3,  0,  6,  12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList2, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #218 = CLGRBCall
4292
  { 219,  3,  0,  6,  12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #219 = CLGRBReturn
4293
  { 220,  3,  0,  6,  12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList2, nullptr, OperandInfo45, -1 ,nullptr },  // Inst #220 = CLIBCall
4294
  { 221,  3,  0,  6,  12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo45, -1 ,nullptr },  // Inst #221 = CLIBReturn
4295
  { 222,  4,  0,  0,  217,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x10388cULL, nullptr, ImplicitList1, OperandInfo48, -1 ,nullptr },  // Inst #222 = CLMux
4296
  { 223,  3,  0,  6,  12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList2, nullptr, OperandInfo49, -1 ,nullptr },  // Inst #223 = CLRBCall
4297
  { 224,  3,  0,  6,  12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo49, -1 ,nullptr },  // Inst #224 = CLRBReturn
4298
  { 225,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo50, -1 ,nullptr },  // Inst #225 = CLSTLoop
4299
  { 226,  4,  0,  0,  210,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x388cULL, nullptr, ImplicitList1, OperandInfo48, -1 ,nullptr },  // Inst #226 = CMux
4300
  { 227,  3,  0,  6,  12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList2, nullptr, OperandInfo49, -1 ,nullptr },  // Inst #227 = CRBCall
4301
  { 228,  3,  0,  6,  12, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo49, -1 ,nullptr },  // Inst #228 = CRBReturn
4302
  { 229,  1,  0,  2,  20, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, ImplicitList3, OperandInfo51, -1 ,nullptr },  // Inst #229 = CallBASR
4303
  { 230,  2,  0,  2,  4,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x40000ULL, ImplicitList2, nullptr, OperandInfo7, -1 ,nullptr },  // Inst #230 = CallBCR
4304
  { 231,  0,  0,  2,  5,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList2, nullptr, nullptr, -1 ,nullptr },  // Inst #231 = CallBR
4305
  { 232,  1,  0,  6,  19, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, ImplicitList3, OperandInfo2, -1 ,nullptr },  // Inst #232 = CallBRASL
4306
  { 233,  3,  0,  6,  2,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x40000ULL, nullptr, nullptr, OperandInfo52, -1 ,nullptr },  // Inst #233 = CallBRCL
4307
  { 234,  1,  0,  6,  3,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #234 = CallJG
4308
  { 235,  2,  0,  2,  23, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator), 0x40000ULL, ImplicitList1, nullptr, OperandInfo7, -1 ,nullptr },  // Inst #235 = CondReturn
4309
  { 236,  6,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #236 = CondStore16
4310
  { 237,  6,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #237 = CondStore16Inv
4311
  { 238,  6,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #238 = CondStore16Mux
4312
  { 239,  6,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #239 = CondStore16MuxInv
4313
  { 240,  6,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #240 = CondStore32
4314
  { 241,  6,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #241 = CondStore32Inv
4315
  { 242,  6,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #242 = CondStore32Mux
4316
  { 243,  6,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #243 = CondStore32MuxInv
4317
  { 244,  6,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo55, -1 ,nullptr },  // Inst #244 = CondStore64
4318
  { 245,  6,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo55, -1 ,nullptr },  // Inst #245 = CondStore64Inv
4319
  { 246,  6,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #246 = CondStore8
4320
  { 247,  6,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #247 = CondStore8Inv
4321
  { 248,  6,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #248 = CondStore8Mux
4322
  { 249,  6,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #249 = CondStore8MuxInv
4323
  { 250,  6,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo56, -1 ,nullptr },  // Inst #250 = CondStoreF32
4324
  { 251,  6,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo56, -1 ,nullptr },  // Inst #251 = CondStoreF32Inv
4325
  { 252,  6,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo57, -1 ,nullptr },  // Inst #252 = CondStoreF64
4326
  { 253,  6,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo57, -1 ,nullptr },  // Inst #253 = CondStoreF64Inv
4327
  { 254,  2,  0,  4,  13, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, nullptr, OperandInfo7, -1 ,nullptr },  // Inst #254 = CondTrap
4328
  { 255,  1,  1,  6,  84, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo58, -1 ,nullptr },  // Inst #255 = GOT
4329
  { 256,  2,  1,  0,  93, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo42, -1 ,nullptr },  // Inst #256 = IIFMux
4330
  { 257,  3,  1,  6,  94, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo59, -1 ,nullptr },  // Inst #257 = IIHF64
4331
  { 258,  3,  1,  4,  95, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo59, -1 ,nullptr },  // Inst #258 = IIHH64
4332
  { 259,  3,  1,  4,  96, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo59, -1 ,nullptr },  // Inst #259 = IIHL64
4333
  { 260,  3,  1,  0,  93, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo33, -1 ,nullptr },  // Inst #260 = IIHMux
4334
  { 261,  3,  1,  6,  97, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo59, -1 ,nullptr },  // Inst #261 = IILF64
4335
  { 262,  3,  1,  4,  98, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo59, -1 ,nullptr },  // Inst #262 = IILH64
4336
  { 263,  3,  1,  4,  99, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo59, -1 ,nullptr },  // Inst #263 = IILL64
4337
  { 264,  3,  1,  0,  93, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo33, -1 ,nullptr },  // Inst #264 = IILMux
4338
  { 265,  4,  1,  0,  35, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x1dULL, nullptr, nullptr, OperandInfo60, -1 ,nullptr },  // Inst #265 = L128
4339
  { 266,  4,  1,  0,  58, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x2cULL, nullptr, nullptr, OperandInfo48, -1 ,nullptr },  // Inst #266 = LBMux
4340
  { 267,  2,  1,  6,  696,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo61, -1 ,nullptr },  // Inst #267 = LEFR
4341
  { 268,  2,  1,  6,  697,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo62, -1 ,nullptr },  // Inst #268 = LFER
4342
  { 269,  2,  1,  0,  39, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo42, -1 ,nullptr },  // Inst #269 = LHIMux
4343
  { 270,  4,  1,  0,  60, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x4cULL, nullptr, nullptr, OperandInfo48, -1 ,nullptr },  // Inst #270 = LHMux
4344
  { 271,  4,  1,  0,  66, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x2cULL, nullptr, nullptr, OperandInfo48, -1 ,nullptr },  // Inst #271 = LLCMux
4345
  { 272,  2,  1,  0,  63, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo63, -1 ,nullptr },  // Inst #272 = LLCRMux
4346
  { 273,  4,  1,  0,  67, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x4cULL, nullptr, nullptr, OperandInfo48, -1 ,nullptr },  // Inst #273 = LLHMux
4347
  { 274,  2,  1,  0,  64, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo63, -1 ,nullptr },  // Inst #274 = LLHRMux
4348
  { 275,  4,  1,  0,  830,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x8dULL, nullptr, nullptr, OperandInfo48, -1 ,nullptr },  // Inst #275 = LMux
4349
  { 276,  5,  1,  0,  51, 0|(1ULL<<MCID::Pseudo), 0x80000ULL, ImplicitList1, nullptr, OperandInfo64, -1 ,nullptr },  // Inst #276 = LOCHIMux
4350
  { 277,  6,  1,  0,  52, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80080ULL, ImplicitList1, nullptr, OperandInfo65, -1 ,nullptr },  // Inst #277 = LOCMux
4351
  { 278,  5,  1,  0,  49, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x80000ULL, ImplicitList1, nullptr, OperandInfo66, -1 ,nullptr },  // Inst #278 = LOCRMux
4352
  { 279,  2,  1,  0,  40, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo63, -1 ,nullptr },  // Inst #279 = LRMux
4353
  { 280,  2,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo67, -1 ,nullptr },  // Inst #280 = LTDBRCompare_VecPseudo
4354
  { 281,  2,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo68, -1 ,nullptr },  // Inst #281 = LTEBRCompare_VecPseudo
4355
  { 282,  2,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo69, -1 ,nullptr },  // Inst #282 = LTXBRCompare_VecPseudo
4356
  { 283,  4,  1,  0,  336,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x1dULL, nullptr, nullptr, OperandInfo70, -1 ,nullptr },  // Inst #283 = LX
4357
  { 284,  6,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo46, -1 ,nullptr },  // Inst #284 = MVCLoop
4358
  { 285,  5,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo47, -1 ,nullptr },  // Inst #285 = MVCSequence
4359
  { 286,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo50, -1 ,nullptr },  // Inst #286 = MVSTLoop
4360
  { 287,  0,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #287 = MemBarrier
4361
  { 288,  6,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo46, -1 ,nullptr },  // Inst #288 = NCLoop
4362
  { 289,  5,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo47, -1 ,nullptr },  // Inst #289 = NCSequence
4363
  { 290,  3,  1,  0,  143,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x23000ULL, nullptr, ImplicitList1, OperandInfo33, -1 ,nullptr },  // Inst #290 = NIFMux
4364
  { 291,  3,  1,  6,  145,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL, nullptr, ImplicitList1, OperandInfo59, -1 ,nullptr },  // Inst #291 = NIHF64
4365
  { 292,  3,  1,  4,  146,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL, nullptr, ImplicitList1, OperandInfo59, -1 ,nullptr },  // Inst #292 = NIHH64
4366
  { 293,  3,  1,  4,  147,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL, nullptr, ImplicitList1, OperandInfo59, -1 ,nullptr },  // Inst #293 = NIHL64
4367
  { 294,  3,  1,  0,  143,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL, nullptr, ImplicitList1, OperandInfo33, -1 ,nullptr },  // Inst #294 = NIHMux
4368
  { 295,  3,  1,  6,  148,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL, nullptr, ImplicitList1, OperandInfo59, -1 ,nullptr },  // Inst #295 = NILF64
4369
  { 296,  3,  1,  4,  149,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL, nullptr, ImplicitList1, OperandInfo59, -1 ,nullptr },  // Inst #296 = NILH64
4370
  { 297,  3,  1,  4,  150,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL, nullptr, ImplicitList1, OperandInfo59, -1 ,nullptr },  // Inst #297 = NILL64
4371
  { 298,  3,  1,  0,  143,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL, nullptr, ImplicitList1, OperandInfo33, -1 ,nullptr },  // Inst #298 = NILMux
4372
  { 299,  6,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo46, -1 ,nullptr },  // Inst #299 = OCLoop
4373
  { 300,  5,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo47, -1 ,nullptr },  // Inst #300 = OCSequence
4374
  { 301,  3,  1,  0,  156,  0|(1ULL<<MCID::Pseudo), 0x23000ULL, nullptr, ImplicitList1, OperandInfo33, -1 ,nullptr },  // Inst #301 = OIFMux
4375
  { 302,  3,  1,  6,  157,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, ImplicitList1, OperandInfo59, -1 ,nullptr },  // Inst #302 = OIHF64
4376
  { 303,  3,  1,  4,  158,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, ImplicitList1, OperandInfo59, -1 ,nullptr },  // Inst #303 = OIHH64
4377
  { 304,  3,  1,  4,  159,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, ImplicitList1, OperandInfo59, -1 ,nullptr },  // Inst #304 = OIHL64
4378
  { 305,  3,  1,  0,  156,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, ImplicitList1, OperandInfo33, -1 ,nullptr },  // Inst #305 = OIHMux
4379
  { 306,  3,  1,  6,  160,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, ImplicitList1, OperandInfo59, -1 ,nullptr },  // Inst #306 = OILF64
4380
  { 307,  3,  1,  4,  161,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, ImplicitList1, OperandInfo59, -1 ,nullptr },  // Inst #307 = OILH64
4381
  { 308,  3,  1,  4,  162,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, ImplicitList1, OperandInfo59, -1 ,nullptr },  // Inst #308 = OILL64
4382
  { 309,  3,  1,  0,  156,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, ImplicitList1, OperandInfo33, -1 ,nullptr },  // Inst #309 = OILMux
4383
  { 310,  3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, nullptr, OperandInfo71, -1 ,nullptr },  // Inst #310 = PAIR128
4384
  { 311,  6,  1,  6,  206,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr },  // Inst #311 = RISBHH
4385
  { 312,  6,  1,  6,  206,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo73, -1 ,nullptr },  // Inst #312 = RISBHL
4386
  { 313,  6,  1,  6,  207,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo74, -1 ,nullptr },  // Inst #313 = RISBLH
4387
  { 314,  6,  1,  6,  207,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo75, -1 ,nullptr },  // Inst #314 = RISBLL
4388
  { 315,  6,  1,  0,  208,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo76, -1 ,nullptr },  // Inst #315 = RISBMux
4389
  { 316,  0,  0,  2,  22, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #316 = Return
4390
  { 317,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo50, -1 ,nullptr },  // Inst #317 = SRSTLoop
4391
  { 318,  4,  0,  0,  46, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x1eULL, nullptr, nullptr, OperandInfo60, -1 ,nullptr },  // Inst #318 = ST128
4392
  { 319,  4,  0,  0,  73, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x2cULL, nullptr, nullptr, OperandInfo48, -1 ,nullptr },  // Inst #319 = STCMux
4393
  { 320,  4,  0,  0,  74, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x2cULL, nullptr, nullptr, OperandInfo48, -1 ,nullptr },  // Inst #320 = STHMux
4394
  { 321,  4,  0,  0,  47, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x8eULL, nullptr, nullptr, OperandInfo48, -1 ,nullptr },  // Inst #321 = STMux
4395
  { 322,  5,  0,  0,  53, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x80080ULL, ImplicitList1, nullptr, OperandInfo77, -1 ,nullptr },  // Inst #322 = STOCMux
4396
  { 323,  4,  0,  0,  339,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x1eULL, nullptr, nullptr, OperandInfo70, -1 ,nullptr },  // Inst #323 = STX
4397
  { 324,  5,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo78, -1 ,nullptr },  // Inst #324 = Select32
4398
  { 325,  5,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo79, -1 ,nullptr },  // Inst #325 = Select64
4399
  { 326,  5,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo80, -1 ,nullptr },  // Inst #326 = SelectF128
4400
  { 327,  5,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo81, -1 ,nullptr },  // Inst #327 = SelectF32
4401
  { 328,  5,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo82, -1 ,nullptr },  // Inst #328 = SelectF64
4402
  { 329,  5,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo83, -1 ,nullptr },  // Inst #329 = SelectVR128
4403
  { 330,  5,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #330 = SelectVR32
4404
  { 331,  5,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #331 = SelectVR64
4405
  { 332,  0,  0,  2,  250,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #332 = Serialize
4406
  { 333,  3,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo86, -1 ,nullptr },  // Inst #333 = TBEGIN_nofloat
4407
  { 334,  1,  0,  6,  21, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, ImplicitList3, OperandInfo2, -1 ,nullptr },  // Inst #334 = TLS_GDCALL
4408
  { 335,  1,  0,  6,  21, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, ImplicitList3, OperandInfo2, -1 ,nullptr },  // Inst #335 = TLS_LDCALL
4409
  { 336,  2,  0,  4,  241,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x0ULL, nullptr, ImplicitList1, OperandInfo87, -1 ,nullptr },  // Inst #336 = TMHH64
4410
  { 337,  2,  0,  4,  242,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x0ULL, nullptr, ImplicitList1, OperandInfo87, -1 ,nullptr },  // Inst #337 = TMHL64
4411
  { 338,  2,  0,  0,  240,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x0ULL, nullptr, ImplicitList1, OperandInfo42, -1 ,nullptr },  // Inst #338 = TMHMux
4412
  { 339,  2,  0,  4,  243,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x0ULL, nullptr, ImplicitList1, OperandInfo87, -1 ,nullptr },  // Inst #339 = TMLH64
4413
  { 340,  2,  0,  4,  244,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x0ULL, nullptr, ImplicitList1, OperandInfo87, -1 ,nullptr },  // Inst #340 = TMLL64
4414
  { 341,  2,  0,  0,  240,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x0ULL, nullptr, ImplicitList1, OperandInfo42, -1 ,nullptr },  // Inst #341 = TMLMux
4415
  { 342,  0,  0,  4,  13, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #342 = Trap
4416
  { 343,  4,  1,  6,  525,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo88, -1 ,nullptr },  // Inst #343 = VL32
4417
  { 344,  4,  1,  6,  525,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo89, -1 ,nullptr },  // Inst #344 = VL64
4418
  { 345,  2,  1,  6,  514,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo90, -1 ,nullptr },  // Inst #345 = VLR32
4419
  { 346,  2,  1,  6,  514,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo91, -1 ,nullptr },  // Inst #346 = VLR64
4420
  { 347,  3,  1,  6,  517,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo92, -1 ,nullptr },  // Inst #347 = VLVGP32
4421
  { 348,  4,  0,  6,  532,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo88, -1 ,nullptr },  // Inst #348 = VST32
4422
  { 349,  4,  0,  6,  532,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo89, -1 ,nullptr },  // Inst #349 = VST64
4423
  { 350,  6,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo46, -1 ,nullptr },  // Inst #350 = XCLoop
4424
  { 351,  5,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo47, -1 ,nullptr },  // Inst #351 = XCSequence
4425
  { 352,  3,  1,  0,  167,  0|(1ULL<<MCID::Pseudo), 0x23000ULL, nullptr, ImplicitList1, OperandInfo33, -1 ,nullptr },  // Inst #352 = XIFMux
4426
  { 353,  3,  1,  6,  169,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, ImplicitList1, OperandInfo59, -1 ,nullptr },  // Inst #353 = XIHF64
4427
  { 354,  3,  1,  6,  170,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, ImplicitList1, OperandInfo59, -1 ,nullptr },  // Inst #354 = XILF64
4428
  { 355,  2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr },  // Inst #355 = ZEXT128
4429
  { 356,  5,  1,  4,  100,  0|(1ULL<<MCID::MayLoad), 0x23c88ULL, nullptr, ImplicitList1, OperandInfo93, -1 ,nullptr },  // Inst #356 = A
4430
  { 357,  5,  1,  4,  430,  0|(1ULL<<MCID::MayLoad), 0x108ULL, nullptr, ImplicitList1, OperandInfo94, -1 ,nullptr },  // Inst #357 = AD
4431
  { 358,  5,  1,  6,  372,  0|(1ULL<<MCID::MayLoad), 0x3fd08ULL, nullptr, ImplicitList1, OperandInfo94, -1 ,nullptr },  // Inst #358 = ADB
4432
  { 359,  3,  1,  4,  373,  0|(1ULL<<MCID::Commutable), 0x3fc00ULL, nullptr, ImplicitList1, OperandInfo95, -1 ,nullptr },  // Inst #359 = ADBR
4433
  { 360,  3,  1,  2,  431,  0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, ImplicitList1, OperandInfo95, -1 ,nullptr },  // Inst #360 = ADR
4434
  { 361,  3,  1,  4,  492,  0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, ImplicitList1, OperandInfo96, -1 ,nullptr },  // Inst #361 = ADTR
4435
  { 362,  4,  1,  4,  492,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo97, -1 ,nullptr },  // Inst #362 = ADTRA
4436
  { 363,  5,  1,  4,  430,  0|(1ULL<<MCID::MayLoad), 0x88ULL, nullptr, ImplicitList1, OperandInfo98, -1 ,nullptr },  // Inst #363 = AE
4437
  { 364,  5,  1,  6,  372,  0|(1ULL<<MCID::MayLoad), 0x3fc88ULL, nullptr, ImplicitList1, OperandInfo98, -1 ,nullptr },  // Inst #364 = AEB
4438
  { 365,  3,  1,  4,  373,  0|(1ULL<<MCID::Commutable), 0x3fc00ULL, nullptr, ImplicitList1, OperandInfo99, -1 ,nullptr },  // Inst #365 = AEBR
4439
  { 366,  3,  1,  2,  431,  0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, ImplicitList1, OperandInfo99, -1 ,nullptr },  // Inst #366 = AER
4440
  { 367,  3,  1,  6,  103,  0, 0x23c00ULL, nullptr, ImplicitList1, OperandInfo100, -1 ,nullptr },  // Inst #367 = AFI
4441
  { 368,  5,  1,  6,  104,  0|(1ULL<<MCID::MayLoad), 0x23d0cULL, nullptr, ImplicitList1, OperandInfo101, -1 ,nullptr },  // Inst #368 = AG
4442
  { 369,  5,  1,  6,  815,  0|(1ULL<<MCID::MayLoad), 0x23c8cULL, nullptr, ImplicitList1, OperandInfo101, -1 ,nullptr },  // Inst #369 = AGF
4443
  { 370,  3,  1,  6,  105,  0, 0x23c00ULL, nullptr, ImplicitList1, OperandInfo59, -1 ,nullptr },  // Inst #370 = AGFI
4444
  { 371,  3,  1,  4,  125,  0, 0x23c00ULL, nullptr, ImplicitList1, OperandInfo102, -1 ,nullptr },  // Inst #371 = AGFR
4445
  { 372,  5,  1,  6,  124,  0|(1ULL<<MCID::MayLoad), 0x23c4cULL, nullptr, ImplicitList1, OperandInfo101, -1 ,nullptr },  // Inst #372 = AGH
4446
  { 373,  3,  1,  4,  106,  0|(1ULL<<MCID::ConvertibleTo3Addr), 0x23c00ULL, nullptr, ImplicitList1, OperandInfo59, -1 ,nullptr },  // Inst #373 = AGHI
4447
  { 374,  3,  1,  6,  106,  0, 0x23c00ULL, nullptr, ImplicitList1, OperandInfo44, -1 ,nullptr },  // Inst #374 = AGHIK
4448
  { 375,  3,  1,  4,  107,  0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x23c00ULL, nullptr, ImplicitList1, OperandInfo103, -1 ,nullptr },  // Inst #375 = AGR
4449
  { 376,  3,  1,  4,  107,  0|(1ULL<<MCID::Commutable), 0x23c00ULL, nullptr, ImplicitList1, OperandInfo104, -1 ,nullptr },  // Inst #376 = AGRK
4450
  { 377,  3,  0,  6,  121,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x23c04ULL, nullptr, ImplicitList1, OperandInfo86, -1 ,nullptr },  // Inst #377 = AGSI
4451
  { 378,  5,  1,  4,  101,  0|(1ULL<<MCID::MayLoad), 0x23c48ULL, nullptr, ImplicitList1, OperandInfo93, -1 ,nullptr },  // Inst #378 = AH
4452
  { 379,  3,  1,  4,  118,  0, 0x23c00ULL, nullptr, ImplicitList1, OperandInfo105, -1 ,nullptr },  // Inst #379 = AHHHR
4453
  { 380,  3,  1,  4,  119,  0, 0x23c00ULL, nullptr, ImplicitList1, OperandInfo106, -1 ,nullptr },  // Inst #380 = AHHLR
4454
  { 381,  3,  1,  4,  108,  0|(1ULL<<MCID::ConvertibleTo3Addr), 0x23c00ULL, nullptr, ImplicitList1, OperandInfo100, -1 ,nullptr },  // Inst #381 = AHI
4455
  { 382,  3,  1,  6,  108,  0, 0x23c00ULL, nullptr, ImplicitList1, OperandInfo49, -1 ,nullptr },  // Inst #382 = AHIK
4456
  { 383,  5,  1,  6,  101,  0|(1ULL<<MCID::MayLoad), 0x23c4cULL, nullptr, ImplicitList1, OperandInfo93, -1 ,nullptr },  // Inst #383 = AHY
4457
  { 384,  3,  1,  6,  102,  0, 0x23c00ULL, nullptr, ImplicitList1, OperandInfo107, -1 ,nullptr },  // Inst #384 = AIH
4458
  { 385,  5,  1,  4,  110,  0|(1ULL<<MCID::MayLoad), 0x88ULL, nullptr, ImplicitList1, OperandInfo93, -1 ,nullptr },  // Inst #385 = AL
4459
  { 386,  5,  1,  6,  122,  0|(1ULL<<MCID::MayLoad), 0x8cULL, ImplicitList1, ImplicitList1, OperandInfo93, -1 ,nullptr },  // Inst #386 = ALC
4460
  { 387,  5,  1,  6,  122,  0|(1ULL<<MCID::MayLoad), 0x10cULL, ImplicitList1, ImplicitList1, OperandInfo101, -1 ,nullptr },  // Inst #387 = ALCG
4461
  { 388,  3,  1,  4,  123,  0, 0x0ULL, ImplicitList1, ImplicitList1, OperandInfo103, -1 ,nullptr },  // Inst #388 = ALCGR
4462
  { 389,  3,  1,  4,  123,  0, 0x0ULL, ImplicitList1, ImplicitList1, OperandInfo108, -1 ,nullptr },  // Inst #389 = ALCR
4463
  { 390,  3,  1,  6,  111,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo100, -1 ,nullptr },  // Inst #390 = ALFI
4464
  { 391,  5,  1,  6,  112,  0|(1ULL<<MCID::MayLoad), 0x10cULL, nullptr, ImplicitList1, OperandInfo101, -1 ,nullptr },  // Inst #391 = ALG
4465
  { 392,  5,  1,  6,  835,  0|(1ULL<<MCID::MayLoad), 0x8cULL, nullptr, ImplicitList1, OperandInfo101, -1 ,nullptr },  // Inst #392 = ALGF
4466
  { 393,  3,  1,  6,  114,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo59, -1 ,nullptr },  // Inst #393 = ALGFI
4467
  { 394,  3,  1,  4,  114,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo102, -1 ,nullptr },  // Inst #394 = ALGFR
4468
  { 395,  3,  1,  6,  113,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo44, -1 ,nullptr },  // Inst #395 = ALGHSIK
4469
  { 396,  3,  1,  4,  115,  0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, ImplicitList1, OperandInfo103, -1 ,nullptr },  // Inst #396 = ALGR
4470
  { 397,  3,  1,  4,  115,  0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, ImplicitList1, OperandInfo104, -1 ,nullptr },  // Inst #397 = ALGRK
4471
  { 398,  3,  0,  6,  121,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL, nullptr, ImplicitList1, OperandInfo86, -1 ,nullptr },  // Inst #398 = ALGSI
4472
  { 399,  3,  1,  4,  118,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo105, -1 ,nullptr },  // Inst #399 = ALHHHR
4473
  { 400,  3,  1,  4,  119,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo106, -1 ,nullptr },  // Inst #400 = ALHHLR
4474
  { 401,  3,  1,  6,  111,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo49, -1 ,nullptr },  // Inst #401 = ALHSIK
4475
  { 402,  3,  1,  2,  116,  0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, ImplicitList1, OperandInfo108, -1 ,nullptr },  // Inst #402 = ALR
4476
  { 403,  3,  1,  4,  116,  0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, ImplicitList1, OperandInfo109, -1 ,nullptr },  // Inst #403 = ALRK
4477
  { 404,  3,  0,  6,  834,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL, nullptr, ImplicitList1, OperandInfo86, -1 ,nullptr },  // Inst #404 = ALSI
4478
  { 405,  3,  1,  6,  120,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo107, -1 ,nullptr },  // Inst #405 = ALSIH
4479
  { 406,  3,  1,  6,  120,  0, 0x0ULL, nullptr, nullptr, OperandInfo107, -1 ,nullptr },  // Inst #406 = ALSIHN
4480
  { 407,  5,  1,  6,  110,  0|(1ULL<<MCID::MayLoad), 0x8cULL, nullptr, ImplicitList1, OperandInfo93, -1 ,nullptr },  // Inst #407 = ALY
4481
  { 408,  6,  0,  6,  288,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList1, OperandInfo110, -1 ,nullptr },  // Inst #408 = AP
4482
  { 409,  3,  1,  2,  117,  0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x23c00ULL, nullptr, ImplicitList1, OperandInfo108, -1 ,nullptr },  // Inst #409 = AR
4483
  { 410,  3,  1,  4,  117,  0|(1ULL<<MCID::Commutable), 0x23c00ULL, nullptr, ImplicitList1, OperandInfo109, -1 ,nullptr },  // Inst #410 = ARK
4484
  { 411,  3,  0,  6,  834,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x23c04ULL, nullptr, ImplicitList1, OperandInfo86, -1 ,nullptr },  // Inst #411 = ASI
4485
  { 412,  5,  1,  4,  430,  0|(1ULL<<MCID::MayLoad), 0x88ULL, nullptr, ImplicitList1, OperandInfo98, -1 ,nullptr },  // Inst #412 = AU
4486
  { 413,  3,  1,  2,  431,  0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, ImplicitList1, OperandInfo99, -1 ,nullptr },  // Inst #413 = AUR
4487
  { 414,  5,  1,  4,  430,  0|(1ULL<<MCID::MayLoad), 0x108ULL, nullptr, ImplicitList1, OperandInfo94, -1 ,nullptr },  // Inst #414 = AW
4488
  { 415,  3,  1,  2,  431,  0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, ImplicitList1, OperandInfo95, -1 ,nullptr },  // Inst #415 = AWR
4489
  { 416,  3,  1,  4,  374,  0|(1ULL<<MCID::Commutable), 0x3fc00ULL, nullptr, ImplicitList1, OperandInfo111, -1 ,nullptr },  // Inst #416 = AXBR
4490
  { 417,  3,  1,  2,  432,  0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, ImplicitList1, OperandInfo111, -1 ,nullptr },  // Inst #417 = AXR
4491
  { 418,  3,  1,  4,  493,  0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, ImplicitList1, OperandInfo112, -1 ,nullptr },  // Inst #418 = AXTR
4492
  { 419,  4,  1,  4,  493,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo113, -1 ,nullptr },  // Inst #419 = AXTRA
4493
  { 420,  5,  1,  6,  100,  0|(1ULL<<MCID::MayLoad), 0x23c8cULL, nullptr, ImplicitList1, OperandInfo93, -1 ,nullptr },  // Inst #420 = AY
4494
  { 421,  3,  0,  4,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x8ULL, nullptr, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #421 = B
4495
  { 422,  2,  0,  4,  773,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #422 = BAKR
4496
  { 423,  4,  0,  4,  299,  0|(1ULL<<MCID::Call), 0x8ULL, ImplicitList1, ImplicitList1, OperandInfo31, -1 ,nullptr },  // Inst #423 = BAL
4497
  { 424,  2,  0,  2,  299,  0|(1ULL<<MCID::Call), 0x0ULL, ImplicitList1, ImplicitList1, OperandInfo116, -1 ,nullptr },  // Inst #424 = BALR
4498
  { 425,  4,  0,  4,  20, 0|(1ULL<<MCID::Call), 0x8ULL, nullptr, ImplicitList1, OperandInfo31, -1 ,nullptr },  // Inst #425 = BAS
4499
  { 426,  2,  0,  2,  20, 0|(1ULL<<MCID::Call), 0x0ULL, nullptr, ImplicitList1, OperandInfo116, -1 ,nullptr },  // Inst #426 = BASR
4500
  { 427,  2,  0,  2,  303,  0|(1ULL<<MCID::Call), 0x0ULL, nullptr, ImplicitList1, OperandInfo116, -1 ,nullptr },  // Inst #427 = BASSM
4501
  { 428,  3,  0,  4,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #428 = BAsmE
4502
  { 429,  3,  0,  4,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #429 = BAsmH
4503
  { 430,  3,  0,  4,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #430 = BAsmHE
4504
  { 431,  3,  0,  4,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #431 = BAsmL
4505
  { 432,  3,  0,  4,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #432 = BAsmLE
4506
  { 433,  3,  0,  4,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #433 = BAsmLH
4507
  { 434,  3,  0,  4,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #434 = BAsmM
4508
  { 435,  3,  0,  4,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #435 = BAsmNE
4509
  { 436,  3,  0,  4,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #436 = BAsmNH
4510
  { 437,  3,  0,  4,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #437 = BAsmNHE
4511
  { 438,  3,  0,  4,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #438 = BAsmNL
4512
  { 439,  3,  0,  4,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #439 = BAsmNLE
4513
  { 440,  3,  0,  4,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #440 = BAsmNLH
4514
  { 441,  3,  0,  4,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #441 = BAsmNM
4515
  { 442,  3,  0,  4,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #442 = BAsmNO
4516
  { 443,  3,  0,  4,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #443 = BAsmNP
4517
  { 444,  3,  0,  4,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #444 = BAsmNZ
4518
  { 445,  3,  0,  4,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #445 = BAsmO
4519
  { 446,  3,  0,  4,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #446 = BAsmP
4520
  { 447,  3,  0,  4,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #447 = BAsmZ
4521
  { 448,  5,  0,  4,  4,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x40008ULL, ImplicitList1, nullptr, OperandInfo117, -1 ,nullptr },  // Inst #448 = BC
4522
  { 449,  4,  0,  4,  4,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL, ImplicitList1, nullptr, OperandInfo118, -1 ,nullptr },  // Inst #449 = BCAsm
4523
  { 450,  3,  0,  2,  4,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x40000ULL, ImplicitList1, nullptr, OperandInfo119, -1 ,nullptr },  // Inst #450 = BCR
4524
  { 451,  2,  0,  2,  4,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo120, -1 ,nullptr },  // Inst #451 = BCRAsm
4525
  { 452,  5,  1,  4,  9,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x8ULL, nullptr, nullptr, OperandInfo93, -1 ,nullptr },  // Inst #452 = BCT
4526
  { 453,  5,  1,  6,  9,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0xcULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr },  // Inst #453 = BCTG
4527
  { 454,  3,  1,  4,  9,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr },  // Inst #454 = BCTGR
4528
  { 455,  3,  1,  2,  9,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo121, -1 ,nullptr },  // Inst #455 = BCTR
4529
  { 456,  3,  0,  6,  6,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, nullptr, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #456 = BI
4530
  { 457,  3,  0,  6,  6,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #457 = BIAsmE
4531
  { 458,  3,  0,  6,  6,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #458 = BIAsmH
4532
  { 459,  3,  0,  6,  6,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #459 = BIAsmHE
4533
  { 460,  3,  0,  6,  6,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #460 = BIAsmL
4534
  { 461,  3,  0,  6,  6,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #461 = BIAsmLE
4535
  { 462,  3,  0,  6,  6,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #462 = BIAsmLH
4536
  { 463,  3,  0,  6,  6,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #463 = BIAsmM
4537
  { 464,  3,  0,  6,  6,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #464 = BIAsmNE
4538
  { 465,  3,  0,  6,  6,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #465 = BIAsmNH
4539
  { 466,  3,  0,  6,  6,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #466 = BIAsmNHE
4540
  { 467,  3,  0,  6,  6,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #467 = BIAsmNL
4541
  { 468,  3,  0,  6,  6,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #468 = BIAsmNLE
4542
  { 469,  3,  0,  6,  6,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #469 = BIAsmNLH
4543
  { 470,  3,  0,  6,  6,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #470 = BIAsmNM
4544
  { 471,  3,  0,  6,  6,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #471 = BIAsmNO
4545
  { 472,  3,  0,  6,  6,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #472 = BIAsmNP
4546
  { 473,  3,  0,  6,  6,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #473 = BIAsmNZ
4547
  { 474,  3,  0,  6,  6,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #474 = BIAsmO
4548
  { 475,  3,  0,  6,  6,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #475 = BIAsmP
4549
  { 476,  3,  0,  6,  6,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #476 = BIAsmZ
4550
  { 477,  5,  0,  6,  6,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0x4000cULL, ImplicitList1, nullptr, OperandInfo117, -1 ,nullptr },  // Inst #477 = BIC
4551
  { 478,  4,  0,  6,  6,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL, ImplicitList1, nullptr, OperandInfo118, -1 ,nullptr },  // Inst #478 = BICAsm
4552
  { 479,  5,  0,  6,  247,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo117, -1 ,nullptr },  // Inst #479 = BPP
4553
  { 480,  3,  0,  6,  248,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo52, -1 ,nullptr },  // Inst #480 = BPRP
4554
  { 481,  1,  0,  2,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #481 = BR
4555
  { 482,  3,  0,  4,  18, 0|(1ULL<<MCID::Call), 0x0ULL, nullptr, ImplicitList1, OperandInfo43, -1 ,nullptr },  // Inst #482 = BRAS
4556
  { 483,  3,  0,  6,  19, 0|(1ULL<<MCID::Call), 0x0ULL, nullptr, ImplicitList1, OperandInfo43, -1 ,nullptr },  // Inst #483 = BRASL
4557
  { 484,  1,  0,  2,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #484 = BRAsmE
4558
  { 485,  1,  0,  2,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #485 = BRAsmH
4559
  { 486,  1,  0,  2,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #486 = BRAsmHE
4560
  { 487,  1,  0,  2,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #487 = BRAsmL
4561
  { 488,  1,  0,  2,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #488 = BRAsmLE
4562
  { 489,  1,  0,  2,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #489 = BRAsmLH
4563
  { 490,  1,  0,  2,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #490 = BRAsmM
4564
  { 491,  1,  0,  2,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #491 = BRAsmNE
4565
  { 492,  1,  0,  2,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #492 = BRAsmNH
4566
  { 493,  1,  0,  2,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #493 = BRAsmNHE
4567
  { 494,  1,  0,  2,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #494 = BRAsmNL
4568
  { 495,  1,  0,  2,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #495 = BRAsmNLE
4569
  { 496,  1,  0,  2,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #496 = BRAsmNLH
4570
  { 497,  1,  0,  2,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #497 = BRAsmNM
4571
  { 498,  1,  0,  2,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #498 = BRAsmNO
4572
  { 499,  1,  0,  2,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #499 = BRAsmNP
4573
  { 500,  1,  0,  2,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #500 = BRAsmNZ
4574
  { 501,  1,  0,  2,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #501 = BRAsmO
4575
  { 502,  1,  0,  2,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #502 = BRAsmP
4576
  { 503,  1,  0,  2,  5,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #503 = BRAsmZ
4577
  { 504,  3,  0,  4,  2,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x40000ULL, ImplicitList1, nullptr, OperandInfo52, -1 ,nullptr },  // Inst #504 = BRC
4578
  { 505,  2,  0,  4,  2,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo7, -1 ,nullptr },  // Inst #505 = BRCAsm
4579
  { 506,  3,  0,  6,  2,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x40000ULL, ImplicitList1, nullptr, OperandInfo52, -1 ,nullptr },  // Inst #506 = BRCL
4580
  { 507,  2,  0,  6,  2,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList1, nullptr, OperandInfo7, -1 ,nullptr },  // Inst #507 = BRCLAsm
4581
  { 508,  3,  1,  4,  7,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo100, -1 ,nullptr },  // Inst #508 = BRCT
4582
  { 509,  3,  1,  4,  7,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo59, -1 ,nullptr },  // Inst #509 = BRCTG
4583
  { 510,  3,  1,  6,  8,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo107, -1 ,nullptr },  // Inst #510 = BRCTH
4584
  { 511,  4,  1,  4,  10, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo122, -1 ,nullptr },  // Inst #511 = BRXH
4585
  { 512,  4,  1,  6,  10, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo123, -1 ,nullptr },  // Inst #512 = BRXHG
4586
  { 513,  4,  1,  4,  10, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo122, -1 ,nullptr },  // Inst #513 = BRXLE
4587
  { 514,  4,  1,  6,  10, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo123, -1 ,nullptr },  // Inst #514 = BRXLG
4588
  { 515,  2,  1,  4,  771,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #515 = BSA
4589
  { 516,  2,  1,  4,  771,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #516 = BSG
4590
  { 517,  2,  0,  2,  302,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo116, -1 ,nullptr },  // Inst #517 = BSM
4591
  { 518,  5,  1,  4,  10, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo124, -1 ,nullptr },  // Inst #518 = BXH
4592
  { 519,  5,  1,  6,  10, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4ULL, nullptr, nullptr, OperandInfo125, -1 ,nullptr },  // Inst #519 = BXHG
4593
  { 520,  5,  1,  4,  10, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo124, -1 ,nullptr },  // Inst #520 = BXLE
4594
  { 521,  5,  1,  6,  10, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4ULL, nullptr, nullptr, OperandInfo125, -1 ,nullptr },  // Inst #521 = BXLEG
4595
  { 522,  4,  0,  4,  210,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3888ULL, nullptr, ImplicitList1, OperandInfo126, -1 ,nullptr },  // Inst #522 = C
4596
  { 523,  4,  0,  4,  456,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x108ULL, nullptr, ImplicitList1, OperandInfo127, -1 ,nullptr },  // Inst #523 = CD
4597
  { 524,  4,  0,  6,  391,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3d08ULL, nullptr, ImplicitList1, OperandInfo127, -1 ,nullptr },  // Inst #524 = CDB
4598
  { 525,  2,  0,  4,  392,  0|(1ULL<<MCID::Compare), 0x3c00ULL, nullptr, ImplicitList1, OperandInfo67, -1 ,nullptr },  // Inst #525 = CDBR
4599
  { 526,  2,  1,  4,  348,  0, 0x0ULL, nullptr, nullptr, OperandInfo128, -1 ,nullptr },  // Inst #526 = CDFBR
4600
  { 527,  4,  1,  4,  348,  0, 0x0ULL, nullptr, nullptr, OperandInfo129, -1 ,nullptr },  // Inst #527 = CDFBRA
4601
  { 528,  2,  1,  4,  413,  0, 0x0ULL, nullptr, nullptr, OperandInfo128, -1 ,nullptr },  // Inst #528 = CDFR
4602
  { 529,  4,  1,  4,  837,  0, 0x0ULL, nullptr, nullptr, OperandInfo129, -1 ,nullptr },  // Inst #529 = CDFTR
4603
  { 530,  2,  1,  4,  348,  0, 0x0ULL, nullptr, nullptr, OperandInfo130, -1 ,nullptr },  // Inst #530 = CDGBR
4604
  { 531,  4,  1,  4,  348,  0, 0x0ULL, nullptr, nullptr, OperandInfo131, -1 ,nullptr },  // Inst #531 = CDGBRA
4605
  { 532,  2,  1,  4,  413,  0, 0x0ULL, nullptr, nullptr, OperandInfo130, -1 ,nullptr },  // Inst #532 = CDGR
4606
  { 533,  2,  1,  4,  465,  0, 0x0ULL, nullptr, nullptr, OperandInfo130, -1 ,nullptr },  // Inst #533 = CDGTR
4607
  { 534,  4,  1,  4,  465,  0, 0x0ULL, nullptr, nullptr, OperandInfo131, -1 ,nullptr },  // Inst #534 = CDGTRA
4608
  { 535,  4,  1,  4,  351,  0, 0x0ULL, nullptr, nullptr, OperandInfo129, -1 ,nullptr },  // Inst #535 = CDLFBR
4609
  { 536,  4,  1,  4,  467,  0, 0x0ULL, nullptr, nullptr, OperandInfo129, -1 ,nullptr },  // Inst #536 = CDLFTR
4610
  { 537,  4,  1,  4,  351,  0, 0x0ULL, nullptr, nullptr, OperandInfo131, -1 ,nullptr },  // Inst #537 = CDLGBR
4611
  { 538,  4,  1,  4,  467,  0, 0x0ULL, nullptr, nullptr, OperandInfo131, -1 ,nullptr },  // Inst #538 = CDLGTR
4612
  { 539,  5,  1,  6,  481,  0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo132, -1 ,nullptr },  // Inst #539 = CDPT
4613
  { 540,  2,  0,  2,  457,  0|(1ULL<<MCID::Compare), 0x0ULL, nullptr, ImplicitList1, OperandInfo67, -1 ,nullptr },  // Inst #540 = CDR
4614
  { 541,  5,  1,  4,  258,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList1, OperandInfo133, -1 ,nullptr },  // Inst #541 = CDS
4615
  { 542,  5,  1,  6,  259,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL, nullptr, ImplicitList1, OperandInfo133, -1 ,nullptr },  // Inst #542 = CDSG
4616
  { 543,  2,  1,  4,  473,  0, 0x0ULL, nullptr, nullptr, OperandInfo130, -1 ,nullptr },  // Inst #543 = CDSTR
4617
  { 544,  5,  1,  6,  258,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL, nullptr, ImplicitList1, OperandInfo133, -1 ,nullptr },  // Inst #544 = CDSY
4618
  { 545,  2,  0,  4,  508,  0|(1ULL<<MCID::Compare), 0x0ULL, nullptr, ImplicitList1, OperandInfo67, -1 ,nullptr },  // Inst #545 = CDTR
4619
  { 546,  2,  1,  4,  473,  0, 0x0ULL, nullptr, nullptr, OperandInfo130, -1 ,nullptr },  // Inst #546 = CDUTR
4620
  { 547,  5,  1,  6,  477,  0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo132, -1 ,nullptr },  // Inst #547 = CDZT
4621
  { 548,  4,  0,  4,  456,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x88ULL, nullptr, ImplicitList1, OperandInfo134, -1 ,nullptr },  // Inst #548 = CE
4622
  { 549,  4,  0,  6,  391,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3c88ULL, nullptr, ImplicitList1, OperandInfo134, -1 ,nullptr },  // Inst #549 = CEB
4623
  { 550,  2,  0,  4,  392,  0|(1ULL<<MCID::Compare), 0x3c00ULL, nullptr, ImplicitList1, OperandInfo68, -1 ,nullptr },  // Inst #550 = CEBR
4624
  { 551,  2,  0,  4,  510,  0|(1ULL<<MCID::Compare), 0x0ULL, nullptr, ImplicitList1, OperandInfo67, -1 ,nullptr },  // Inst #551 = CEDTR
4625
  { 552,  2,  1,  4,  347,  0, 0x0ULL, nullptr, nullptr, OperandInfo135, -1 ,nullptr },  // Inst #552 = CEFBR
4626
  { 553,  4,  1,  4,  347,  0, 0x0ULL, nullptr, nullptr, OperandInfo136, -1 ,nullptr },  // Inst #553 = CEFBRA
4627
  { 554,  2,  1,  4,  412,  0, 0x0ULL, nullptr, nullptr, OperandInfo135, -1 ,nullptr },  // Inst #554 = CEFR
4628
  { 555,  2,  1,  4,  347,  0, 0x0ULL, nullptr, nullptr, OperandInfo137, -1 ,nullptr },  // Inst #555 = CEGBR
4629
  { 556,  4,  1,  4,  347,  0, 0x0ULL, nullptr, nullptr, OperandInfo138, -1 ,nullptr },  // Inst #556 = CEGBRA
4630
  { 557,  2,  1,  4,  412,  0, 0x0ULL, nullptr, nullptr, OperandInfo137, -1 ,nullptr },  // Inst #557 = CEGR
4631
  { 558,  4,  1,  4,  350,  0, 0x0ULL, nullptr, nullptr, OperandInfo136, -1 ,nullptr },  // Inst #558 = CELFBR
4632
  { 559,  4,  1,  4,  350,  0, 0x0ULL, nullptr, nullptr, OperandInfo138, -1 ,nullptr },  // Inst #559 = CELGBR
4633
  { 560,  2,  0,  2,  457,  0|(1ULL<<MCID::Compare), 0x0ULL, nullptr, ImplicitList1, OperandInfo68, -1 ,nullptr },  // Inst #560 = CER
4634
  { 561,  2,  0,  4,  511,  0|(1ULL<<MCID::Compare), 0x0ULL, nullptr, ImplicitList1, OperandInfo69, -1 ,nullptr },  // Inst #561 = CEXTR
4635
  { 562,  2,  0,  4,  315,  0|(1ULL<<MCID::MayLoad), 0x0ULL, ImplicitList4, ImplicitList5, OperandInfo139, -1 ,nullptr },  // Inst #562 = CFC
4636
  { 563,  3,  1,  4,  353,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo140, -1 ,nullptr },  // Inst #563 = CFDBR
4637
  { 564,  4,  1,  4,  353,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo141, -1 ,nullptr },  // Inst #564 = CFDBRA
4638
  { 565,  3,  1,  4,  415,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo140, -1 ,nullptr },  // Inst #565 = CFDR
4639
  { 566,  4,  1,  4,  840,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo141, -1 ,nullptr },  // Inst #566 = CFDTR
4640
  { 567,  3,  1,  4,  353,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo142, -1 ,nullptr },  // Inst #567 = CFEBR
4641
  { 568,  4,  1,  4,  353,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo143, -1 ,nullptr },  // Inst #568 = CFEBRA
4642
  { 569,  3,  1,  4,  415,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo142, -1 ,nullptr },  // Inst #569 = CFER
4643
  { 570,  2,  0,  6,  211,  0|(1ULL<<MCID::Compare), 0x3800ULL, nullptr, ImplicitList1, OperandInfo144, -1 ,nullptr },  // Inst #570 = CFI
4644
  { 571,  3,  1,  4,  355,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo145, -1 ,nullptr },  // Inst #571 = CFXBR
4645
  { 572,  4,  1,  4,  355,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo146, -1 ,nullptr },  // Inst #572 = CFXBRA
4646
  { 573,  3,  1,  4,  417,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo145, -1 ,nullptr },  // Inst #573 = CFXR
4647
  { 574,  4,  1,  4,  841,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo146, -1 ,nullptr },  // Inst #574 = CFXTR
4648
  { 575,  4,  0,  6,  210,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x390cULL, nullptr, ImplicitList1, OperandInfo31, -1 ,nullptr },  // Inst #575 = CG
4649
  { 576,  3,  1,  4,  354,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo147, -1 ,nullptr },  // Inst #576 = CGDBR
4650
  { 577,  4,  1,  4,  354,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo148, -1 ,nullptr },  // Inst #577 = CGDBRA
4651
  { 578,  3,  1,  4,  416,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo147, -1 ,nullptr },  // Inst #578 = CGDR
4652
  { 579,  3,  1,  4,  469,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo147, -1 ,nullptr },  // Inst #579 = CGDTR
4653
  { 580,  4,  1,  4,  469,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo148, -1 ,nullptr },  // Inst #580 = CGDTRA
4654
  { 581,  3,  1,  4,  354,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo149, -1 ,nullptr },  // Inst #581 = CGEBR
4655
  { 582,  4,  1,  4,  354,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo150, -1 ,nullptr },  // Inst #582 = CGEBRA
4656
  { 583,  3,  1,  4,  416,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo149, -1 ,nullptr },  // Inst #583 = CGER
4657
  { 584,  4,  0,  6,  234,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x388cULL, nullptr, ImplicitList1, OperandInfo31, -1 ,nullptr },  // Inst #584 = CGF
4658
  { 585,  2,  0,  6,  212,  0|(1ULL<<MCID::Compare), 0x3800ULL, nullptr, ImplicitList1, OperandInfo87, -1 ,nullptr },  // Inst #585 = CGFI
4659
  { 586,  2,  0,  4,  235,  0|(1ULL<<MCID::Compare), 0x3800ULL, nullptr, ImplicitList1, OperandInfo151, -1 ,nullptr },  // Inst #586 = CGFR
4660
  { 587,  2,  0,  6,  234,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3800ULL, nullptr, ImplicitList1, OperandInfo87, -1 ,nullptr },  // Inst #587 = CGFRL
4661
  { 588,  4,  0,  6,  232,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x384cULL, nullptr, ImplicitList1, OperandInfo31, -1 ,nullptr },  // Inst #588 = CGH
4662
  { 589,  2,  0,  4,  212,  0|(1ULL<<MCID::Compare), 0x3800ULL, nullptr, ImplicitList1, OperandInfo87, -1 ,nullptr },  // Inst #589 = CGHI
4663
  { 590,  2,  0,  6,  232,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3800ULL, nullptr, ImplicitList1, OperandInfo87, -1 ,nullptr },  // Inst #590 = CGHRL
4664
  { 591,  3,  0,  6,  213,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3800ULL, nullptr, ImplicitList1, OperandInfo86, -1 ,nullptr },  // Inst #591 = CGHSI
4665
  { 592,  5,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr },  // Inst #592 = CGIB
4666
  { 593,  5,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr },  // Inst #593 = CGIBAsm
4667
  { 594,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #594 = CGIBAsmE
4668
  { 595,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #595 = CGIBAsmH
4669
  { 596,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #596 = CGIBAsmHE
4670
  { 597,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #597 = CGIBAsmL
4671
  { 598,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #598 = CGIBAsmLE
4672
  { 599,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #599 = CGIBAsmLH
4673
  { 600,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #600 = CGIBAsmNE
4674
  { 601,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #601 = CGIBAsmNH
4675
  { 602,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #602 = CGIBAsmNHE
4676
  { 603,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #603 = CGIBAsmNL
4677
  { 604,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #604 = CGIBAsmNLE
4678
  { 605,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #605 = CGIBAsmNLH
4679
  { 606,  4,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo154, -1 ,nullptr },  // Inst #606 = CGIJ
4680
  { 607,  4,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo154, -1 ,nullptr },  // Inst #607 = CGIJAsm
4681
  { 608,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo43, -1 ,nullptr },  // Inst #608 = CGIJAsmE
4682
  { 609,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo43, -1 ,nullptr },  // Inst #609 = CGIJAsmH
4683
  { 610,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo43, -1 ,nullptr },  // Inst #610 = CGIJAsmHE
4684
  { 611,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo43, -1 ,nullptr },  // Inst #611 = CGIJAsmL
4685
  { 612,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo43, -1 ,nullptr },  // Inst #612 = CGIJAsmLE
4686
  { 613,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo43, -1 ,nullptr },  // Inst #613 = CGIJAsmLH
4687
  { 614,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo43, -1 ,nullptr },  // Inst #614 = CGIJAsmNE
4688
  { 615,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo43, -1 ,nullptr },  // Inst #615 = CGIJAsmNH
4689
  { 616,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo43, -1 ,nullptr },  // Inst #616 = CGIJAsmNHE
4690
  { 617,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo43, -1 ,nullptr },  // Inst #617 = CGIJAsmNL
4691
  { 618,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo43, -1 ,nullptr },  // Inst #618 = CGIJAsmNLE
4692
  { 619,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo43, -1 ,nullptr },  // Inst #619 = CGIJAsmNLH
4693
  { 620,  3,  0,  6,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #620 = CGIT
4694
  { 621,  3,  0,  6,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #621 = CGITAsm
4695
  { 622,  2,  0,  6,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo87, -1 ,nullptr },  // Inst #622 = CGITAsmE
4696
  { 623,  2,  0,  6,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo87, -1 ,nullptr },  // Inst #623 = CGITAsmH
4697
  { 624,  2,  0,  6,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo87, -1 ,nullptr },  // Inst #624 = CGITAsmHE
4698
  { 625,  2,  0,  6,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo87, -1 ,nullptr },  // Inst #625 = CGITAsmL
4699
  { 626,  2,  0,  6,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo87, -1 ,nullptr },  // Inst #626 = CGITAsmLE
4700
  { 627,  2,  0,  6,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo87, -1 ,nullptr },  // Inst #627 = CGITAsmLH
4701
  { 628,  2,  0,  6,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo87, -1 ,nullptr },  // Inst #628 = CGITAsmNE
4702
  { 629,  2,  0,  6,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo87, -1 ,nullptr },  // Inst #629 = CGITAsmNH
4703
  { 630,  2,  0,  6,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo87, -1 ,nullptr },  // Inst #630 = CGITAsmNHE
4704
  { 631,  2,  0,  6,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo87, -1 ,nullptr },  // Inst #631 = CGITAsmNL
4705
  { 632,  2,  0,  6,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo87, -1 ,nullptr },  // Inst #632 = CGITAsmNLE
4706
  { 633,  2,  0,  6,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo87, -1 ,nullptr },  // Inst #633 = CGITAsmNLH
4707
  { 634,  2,  0,  4,  214,  0|(1ULL<<MCID::Compare), 0x3800ULL, nullptr, ImplicitList1, OperandInfo115, -1 ,nullptr },  // Inst #634 = CGR
4708
  { 635,  5,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #635 = CGRB
4709
  { 636,  5,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #636 = CGRBAsm
4710
  { 637,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #637 = CGRBAsmE
4711
  { 638,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #638 = CGRBAsmH
4712
  { 639,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #639 = CGRBAsmHE
4713
  { 640,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #640 = CGRBAsmL
4714
  { 641,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #641 = CGRBAsmLE
4715
  { 642,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #642 = CGRBAsmLH
4716
  { 643,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #643 = CGRBAsmNE
4717
  { 644,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #644 = CGRBAsmNH
4718
  { 645,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #645 = CGRBAsmNHE
4719
  { 646,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #646 = CGRBAsmNL
4720
  { 647,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #647 = CGRBAsmNLE
4721
  { 648,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #648 = CGRBAsmNLH
4722
  { 649,  4,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo157, -1 ,nullptr },  // Inst #649 = CGRJ
4723
  { 650,  4,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo157, -1 ,nullptr },  // Inst #650 = CGRJAsm
4724
  { 651,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo44, -1 ,nullptr },  // Inst #651 = CGRJAsmE
4725
  { 652,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo44, -1 ,nullptr },  // Inst #652 = CGRJAsmH
4726
  { 653,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo44, -1 ,nullptr },  // Inst #653 = CGRJAsmHE
4727
  { 654,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo44, -1 ,nullptr },  // Inst #654 = CGRJAsmL
4728
  { 655,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo44, -1 ,nullptr },  // Inst #655 = CGRJAsmLE
4729
  { 656,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo44, -1 ,nullptr },  // Inst #656 = CGRJAsmLH
4730
  { 657,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo44, -1 ,nullptr },  // Inst #657 = CGRJAsmNE
4731
  { 658,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo44, -1 ,nullptr },  // Inst #658 = CGRJAsmNH
4732
  { 659,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo44, -1 ,nullptr },  // Inst #659 = CGRJAsmNHE
4733
  { 660,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo44, -1 ,nullptr },  // Inst #660 = CGRJAsmNL
4734
  { 661,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo44, -1 ,nullptr },  // Inst #661 = CGRJAsmNLE
4735
  { 662,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo44, -1 ,nullptr },  // Inst #662 = CGRJAsmNLH
4736
  { 663,  2,  0,  6,  213,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3800ULL, nullptr, ImplicitList1, OperandInfo87, -1 ,nullptr },  // Inst #663 = CGRL
4737
  { 664,  3,  0,  4,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #664 = CGRT
4738
  { 665,  3,  0,  4,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #665 = CGRTAsm
4739
  { 666,  2,  0,  4,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #666 = CGRTAsmE
4740
  { 667,  2,  0,  4,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #667 = CGRTAsmH
4741
  { 668,  2,  0,  4,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #668 = CGRTAsmHE
4742
  { 669,  2,  0,  4,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #669 = CGRTAsmL
4743
  { 670,  2,  0,  4,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #670 = CGRTAsmLE
4744
  { 671,  2,  0,  4,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #671 = CGRTAsmLH
4745
  { 672,  2,  0,  4,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #672 = CGRTAsmNE
4746
  { 673,  2,  0,  4,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #673 = CGRTAsmNH
4747
  { 674,  2,  0,  4,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #674 = CGRTAsmNHE
4748
  { 675,  2,  0,  4,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #675 = CGRTAsmNL
4749
  { 676,  2,  0,  4,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #676 = CGRTAsmNLE
4750
  { 677,  2,  0,  4,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #677 = CGRTAsmNLH
4751
  { 678,  3,  1,  4,  355,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo158, -1 ,nullptr },  // Inst #678 = CGXBR
4752
  { 679,  4,  1,  4,  355,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo159, -1 ,nullptr },  // Inst #679 = CGXBRA
4753
  { 680,  3,  1,  4,  417,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo158, -1 ,nullptr },  // Inst #680 = CGXR
4754
  { 681,  3,  1,  4,  470,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo158, -1 ,nullptr },  // Inst #681 = CGXTR
4755
  { 682,  4,  1,  4,  470,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo159, -1 ,nullptr },  // Inst #682 = CGXTRA
4756
  { 683,  4,  0,  4,  231,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3848ULL, nullptr, ImplicitList1, OperandInfo126, -1 ,nullptr },  // Inst #683 = CH
4757
  { 684,  4,  0,  6,  216,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x388cULL, nullptr, ImplicitList1, OperandInfo160, -1 ,nullptr },  // Inst #684 = CHF
4758
  { 685,  2,  0,  4,  229,  0|(1ULL<<MCID::Compare), 0x3800ULL, nullptr, ImplicitList1, OperandInfo161, -1 ,nullptr },  // Inst #685 = CHHR
4759
  { 686,  3,  0,  6,  233,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3800ULL, nullptr, ImplicitList1, OperandInfo86, -1 ,nullptr },  // Inst #686 = CHHSI
4760
  { 687,  2,  0,  4,  211,  0|(1ULL<<MCID::Compare), 0x3800ULL, nullptr, ImplicitList1, OperandInfo144, -1 ,nullptr },  // Inst #687 = CHI
4761
  { 688,  2,  0,  4,  230,  0|(1ULL<<MCID::Compare), 0x3800ULL, nullptr, ImplicitList1, OperandInfo162, -1 ,nullptr },  // Inst #688 = CHLR
4762
  { 689,  2,  0,  6,  231,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3800ULL, nullptr, ImplicitList1, OperandInfo144, -1 ,nullptr },  // Inst #689 = CHRL
4763
  { 690,  3,  0,  6,  216,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3800ULL, nullptr, ImplicitList1, OperandInfo86, -1 ,nullptr },  // Inst #690 = CHSI
4764
  { 691,  4,  0,  6,  231,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x384cULL, nullptr, ImplicitList1, OperandInfo126, -1 ,nullptr },  // Inst #691 = CHY
4765
  { 692,  5,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo163, -1 ,nullptr },  // Inst #692 = CIB
4766
  { 693,  5,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo163, -1 ,nullptr },  // Inst #693 = CIBAsm
4767
  { 694,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr },  // Inst #694 = CIBAsmE
4768
  { 695,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr },  // Inst #695 = CIBAsmH
4769
  { 696,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr },  // Inst #696 = CIBAsmHE
4770
  { 697,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr },  // Inst #697 = CIBAsmL
4771
  { 698,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr },  // Inst #698 = CIBAsmLE
4772
  { 699,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr },  // Inst #699 = CIBAsmLH
4773
  { 700,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr },  // Inst #700 = CIBAsmNE
4774
  { 701,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr },  // Inst #701 = CIBAsmNH
4775
  { 702,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr },  // Inst #702 = CIBAsmNHE
4776
  { 703,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr },  // Inst #703 = CIBAsmNL
4777
  { 704,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr },  // Inst #704 = CIBAsmNLE
4778
  { 705,  4,  0,  6,  12, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr },  // Inst #705 = CIBAsmNLH
4779
  { 706,  2,  0,  6,  215,  0|(1ULL<<MCID::Compare), 0x3800ULL, nullptr, ImplicitList1, OperandInfo165, -1 ,nullptr },  // Inst #706 = CIH
4780
  { 707,  4,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo166, -1 ,nullptr },  // Inst #707 = CIJ
4781
  { 708,  4,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo166, -1 ,nullptr },  // Inst #708 = CIJAsm
4782
  { 709,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo45, -1 ,nullptr },  // Inst #709 = CIJAsmE
4783
  { 710,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo45, -1 ,nullptr },  // Inst #710 = CIJAsmH
4784
  { 711,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo45, -1 ,nullptr },  // Inst #711 = CIJAsmHE
4785
  { 712,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo45, -1 ,nullptr },  // Inst #712 = CIJAsmL
4786
  { 713,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo45, -1 ,nullptr },  // Inst #713 = CIJAsmLE
4787
  { 714,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo45, -1 ,nullptr },  // Inst #714 = CIJAsmLH
4788
  { 715,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo45, -1 ,nullptr },  // Inst #715 = CIJAsmNE
4789
  { 716,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo45, -1 ,nullptr },  // Inst #716 = CIJAsmNH
4790
  { 717,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo45, -1 ,nullptr },  // Inst #717 = CIJAsmNHE
4791
  { 718,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo45, -1 ,nullptr },  // Inst #718 = CIJAsmNL
4792
  { 719,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo45, -1 ,nullptr },  // Inst #719 = CIJAsmNLE
4793
  { 720,  3,  0,  6,  11, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, ImplicitList1, OperandInfo45, -1 ,nullptr },  // Inst #720 = CIJAsmNLH
4794
  { 721,  3,  0,  6,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo45, -1 ,nullptr },  // Inst #721 = CIT
4795
  { 722,  3,  0,  6,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo45, -1 ,nullptr },  // Inst #722 = CITAsm
4796
  { 723,  2,  0,  6,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo144, -1 ,nullptr },  // Inst #723 = CITAsmE
4797
  { 724,  2,  0,  6,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo144, -1 ,nullptr },  // Inst #724 = CITAsmH
4798
  { 725,  2,  0,  6,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo144, -1 ,nullptr },  // Inst #725 = CITAsmHE
4799
  { 726,  2,  0,  6,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo144, -1 ,nullptr },  // Inst #726 = CITAsmL
4800
  { 727,  2,  0,  6,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo144, -1 ,nullptr },  // Inst #727 = CITAsmLE
4801
  { 728,  2,  0,  6,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo144, -1 ,nullptr },  // Inst #728 = CITAsmLH
4802
  { 729,  2,  0,  6,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo144, -1 ,nullptr },  // Inst #729 = CITAsmNE
4803
  { 730,  2,  0,  6,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo144, -1 ,nullptr },  // Inst #730 = CITAsmNH
4804
  { 731,  2,  0,  6,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo144, -1 ,nullptr },  // Inst #731 = CITAsmNHE
4805
  { 732,  2,  0,  6,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo144, -1 ,nullptr },  // Inst #732 = CITAsmNL
4806
  { 733,  2,  0,  6,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo144, -1 ,nullptr },  // Inst #733 = CITAsmNLE
4807
  { 734,  2,  0,  6,  14, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo144, -1 ,nullptr },  // Inst #734 = CITAsmNLH
4808
  { 735,  4,  2,  4,  317,  0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, ImplicitList1, OperandInfo167, -1 ,nullptr },  // Inst #735 = CKSM
4809
  { 736,  4,  0,  4,  217,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x103888ULL, nullptr, ImplicitList1, OperandInfo126, -1 ,nullptr },  // Inst #736 = CL
4810
  { 737,  5,  0,  6,  236,  0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, ImplicitList1, OperandInfo168, -1 ,nullptr },  // Inst #737 = CLC
4811
  { 738,  4,  2,  2,  237,  0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, ImplicitList1, OperandInfo169, -1 ,nullptr },  // Inst #738 = CLCL
4812
  { 739,  6,  2,  4,  237,  0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, ImplicitList1, OperandInfo170, -1 ,nullptr },  // Inst #739 = CLCLE
4813
  { 740,  6,  2,  6,  237,  0|(1ULL<<MCID::MayLoad), 0x4ULL, nullptr, ImplicitList1, OperandInfo170, -1 ,nullptr },  // Inst #740 = CLCLU
4814
  { 741,  4,  1,  4,  357,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo141, -1 ,nullptr },  // Inst #741 = CLFDBR
4815
  { 742,  4,  1,  4,  471,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo141, -1 ,nullptr },  // Inst #742 = CLFDTR
4816
  { 743,  4,  1,  4,  356,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo143, -1 ,nullptr },  // Inst #743 = CLFEBR
4817
  { 744,  3,  0,  6,  217,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x103800ULL, nullptr, ImplicitList1, OperandInfo86, -1 ,nullptr },  // Inst #744 = CLFHSI
4818
  { 745,  2,  0,  6,  218,  0|(1ULL<<MCID::Compare), 0x103800ULL, nullptr, ImplicitList1, OperandInfo144, -1 ,nullptr },  // Inst #745 = CLFI
4819
  { 746,  3,  0,  6,  16, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo45, -1 ,nullptr },  // Inst #746 = CLFIT
4820
  { 747,  3,  0,  6,  16, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo45, -1 ,nullptr },  // Inst #747 = CLFITAsm
4821
  { 748,  2,  0,  6,  16, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo144, -1 ,nullptr },  // Inst #748 = CLFITAsmE
4822
  { 749,  2,  0,  6,  16, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo144, -1 ,nullptr },  // Inst #749 = CLFITAsmH
4823
  { 750,  2,  0,  6,  16, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo144, -1 ,nullptr },  // Inst #750 = CLFITAsmHE
4824
  { 751,  2,  0,  6,  16, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo144, -1 ,nullptr },  // Inst #751 = CLFITAsmL
4825
  { 752,  2,  0,  6,  16, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo144, -1 ,nullptr },  // Inst #752 = CLFITAsmLE
4826
  { 753,  2,  0,  6,  16, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo144, -1 ,nullptr },  // Inst #753 = CLFITAsmLH
4827
  { 754,  2,  0,  6,  16, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo144, -1 ,nullptr },  // Inst #754 = CLFITAsmNE
4828
  { 755,  2,  0,  6,  16, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo144, -1 ,nullptr },  // Inst #755 = CLFITAsmNH
4829
  { 756,  2,  0,  6,  16, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo144, -1 ,nullptr },  // Inst #756 = CLFITAsmNHE
4830
  { 757,  2,  0,  6,  16, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo144, -1 ,nullptr },  // Inst #757 = CLFITAsmNL
4831
  { 758,  2,  0,  6,  16, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo144, -1 ,nullptr },  // Inst #758 = CLFITAsmNLE
4832
  { 759,  2,  0,  6,  16, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo144, -1 ,nullptr },  // Inst #759 = CLFITAsmNLH
4833
  { 760,  4,  1,  4,  359,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo146, -1 ,nullptr },  // Inst #760 = CLFXBR
4834
  { 761,  4,  1,  4,  472,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo146, -1 ,nullptr },  // Inst #761 = CLFXTR
4835
  { 762,  4,  0,  6,  219,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x10390cULL, nullptr, ImplicitList1, OperandInfo31, -1 ,nullptr },  // Inst #762 = CLG
4836
  { 763,  4,  1,  4,  358,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo148, -1 ,nullptr },  // Inst #763 = CLGDBR
4837
  { 764,  4,  1,  4,  471,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo148, -1 ,nullptr },  // Inst #764 = CLGDTR
4838
  { 765,  4,  1,  4,  358,  0, 0x0ULL, nullptr, ImplicitList1, OperandInfo150, -1 ,nullptr },  // Inst #765 = CLGEBR
4839
  { 766,  4,  0,  6,  220,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x10388cULL, nullptr, ImplicitList1, OperandInfo31, -1 ,nullptr },  // Inst #766 = CLGF
4840
  { 767,  2,  0,  6,  221,  0|(1ULL<<MCID::Compare), 0x103800ULL, nullptr, ImplicitList1, OperandInfo87, -1 ,nullptr },  // Inst #767 = CLGFI
4841
  { 768,  2,  0,  4,  221,  0|(1ULL<<MCID::Compare), 0x103800ULL, nullptr, ImplicitList1, OperandInfo151, -1 ,nullptr },  // Inst #768 = CLGFR
4842
  { 769,  2,  0,  6,  220,  0|(1ULL<&l