Coverage Report

Created: 2018-12-14 11:24

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/clang-build/lib/Target/X86/X86GenFastISel.inc
Line
Count
Source (jump to first uncovered line)
1
/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2
|*                                                                            *|
3
|* "Fast" Instruction Selector for the X86 target                             *|
4
|*                                                                            *|
5
|* Automatically generated file, do not edit!                                 *|
6
|*                                                                            *|
7
\*===----------------------------------------------------------------------===*/
8
9
10
// FastEmit Immediate Predicate functions.
11
16
static bool Predicate_i16immSExt8(int64_t Imm) {
12
16
 return isInt<8>(Imm); 
13
16
}
14
299
static bool Predicate_i32immSExt8(int64_t Imm) {
15
299
 return isInt<8>(Imm); 
16
299
}
17
86
static bool Predicate_i64immSExt8(int64_t Imm) {
18
86
 return isInt<8>(Imm); 
19
86
}
20
26
static bool Predicate_i64immSExt32(int64_t Imm) {
21
26
 return isInt<32>(Imm); 
22
26
}
23
0
static bool Predicate_BTRMask64(int64_t Imm) {
24
0
25
0
  return !isUInt<32>(Imm) && !isInt<32>(Imm) && isPowerOf2_64(~Imm);
26
0
27
0
}
28
0
static bool Predicate_BTCBTSMask64(int64_t Imm) {
29
0
30
0
  return !isInt<32>(Imm) && isPowerOf2_64(Imm);
31
0
32
0
}
33
0
static bool Predicate_AndMask64(int64_t Imm) {
34
0
35
0
  return isMask_64(Imm) && !isUInt<32>(Imm);
36
0
37
0
}
38
39
40
// FastEmit functions for ISD::ABS.
41
42
0
unsigned fastEmit_ISD_ABS_MVT_v16i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
43
0
  if (RetVT.SimpleTy != MVT::v16i8)
44
0
    return 0;
45
0
  if ((Subtarget->hasBWI()) && (Subtarget->hasVLX())) {
46
0
    return fastEmitInst_r(X86::VPABSBZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
47
0
  }
48
0
  if ((Subtarget->hasSSSE3() && !Subtarget->hasAVX())) {
49
0
    return fastEmitInst_r(X86::PABSBrr, &X86::VR128RegClass, Op0, Op0IsKill);
50
0
  }
51
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX() || !Subtarget->hasBWI())) {
52
0
    return fastEmitInst_r(X86::VPABSBrr, &X86::VR128RegClass, Op0, Op0IsKill);
53
0
  }
54
0
  return 0;
55
0
}
56
57
0
unsigned fastEmit_ISD_ABS_MVT_v32i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
58
0
  if (RetVT.SimpleTy != MVT::v32i8)
59
0
    return 0;
60
0
  if ((Subtarget->hasBWI()) && (Subtarget->hasVLX())) {
61
0
    return fastEmitInst_r(X86::VPABSBZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
62
0
  }
63
0
  if ((Subtarget->hasAVX2()) && (!Subtarget->hasVLX() || !Subtarget->hasBWI())) {
64
0
    return fastEmitInst_r(X86::VPABSBYrr, &X86::VR256RegClass, Op0, Op0IsKill);
65
0
  }
66
0
  return 0;
67
0
}
68
69
0
unsigned fastEmit_ISD_ABS_MVT_v64i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
70
0
  if (RetVT.SimpleTy != MVT::v64i8)
71
0
    return 0;
72
0
  if ((Subtarget->hasBWI())) {
73
0
    return fastEmitInst_r(X86::VPABSBZrr, &X86::VR512RegClass, Op0, Op0IsKill);
74
0
  }
75
0
  return 0;
76
0
}
77
78
0
unsigned fastEmit_ISD_ABS_MVT_v8i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
79
0
  if (RetVT.SimpleTy != MVT::v8i16)
80
0
    return 0;
81
0
  if ((Subtarget->hasBWI()) && (Subtarget->hasVLX())) {
82
0
    return fastEmitInst_r(X86::VPABSWZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
83
0
  }
84
0
  if ((Subtarget->hasSSSE3() && !Subtarget->hasAVX())) {
85
0
    return fastEmitInst_r(X86::PABSWrr, &X86::VR128RegClass, Op0, Op0IsKill);
86
0
  }
87
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX() || !Subtarget->hasBWI())) {
88
0
    return fastEmitInst_r(X86::VPABSWrr, &X86::VR128RegClass, Op0, Op0IsKill);
89
0
  }
90
0
  return 0;
91
0
}
92
93
0
unsigned fastEmit_ISD_ABS_MVT_v16i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
94
0
  if (RetVT.SimpleTy != MVT::v16i16)
95
0
    return 0;
96
0
  if ((Subtarget->hasBWI()) && (Subtarget->hasVLX())) {
97
0
    return fastEmitInst_r(X86::VPABSWZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
98
0
  }
99
0
  if ((Subtarget->hasAVX2()) && (!Subtarget->hasVLX() || !Subtarget->hasBWI())) {
100
0
    return fastEmitInst_r(X86::VPABSWYrr, &X86::VR256RegClass, Op0, Op0IsKill);
101
0
  }
102
0
  return 0;
103
0
}
104
105
0
unsigned fastEmit_ISD_ABS_MVT_v32i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
106
0
  if (RetVT.SimpleTy != MVT::v32i16)
107
0
    return 0;
108
0
  if ((Subtarget->hasBWI())) {
109
0
    return fastEmitInst_r(X86::VPABSWZrr, &X86::VR512RegClass, Op0, Op0IsKill);
110
0
  }
111
0
  return 0;
112
0
}
113
114
0
unsigned fastEmit_ISD_ABS_MVT_v4i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
115
0
  if (RetVT.SimpleTy != MVT::v4i32)
116
0
    return 0;
117
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
118
0
    return fastEmitInst_r(X86::VPABSDZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
119
0
  }
120
0
  if ((Subtarget->hasSSSE3() && !Subtarget->hasAVX())) {
121
0
    return fastEmitInst_r(X86::PABSDrr, &X86::VR128RegClass, Op0, Op0IsKill);
122
0
  }
123
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
124
0
    return fastEmitInst_r(X86::VPABSDrr, &X86::VR128RegClass, Op0, Op0IsKill);
125
0
  }
126
0
  return 0;
127
0
}
128
129
0
unsigned fastEmit_ISD_ABS_MVT_v8i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
130
0
  if (RetVT.SimpleTy != MVT::v8i32)
131
0
    return 0;
132
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
133
0
    return fastEmitInst_r(X86::VPABSDZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
134
0
  }
135
0
  if ((Subtarget->hasAVX2()) && (!Subtarget->hasVLX())) {
136
0
    return fastEmitInst_r(X86::VPABSDYrr, &X86::VR256RegClass, Op0, Op0IsKill);
137
0
  }
138
0
  return 0;
139
0
}
140
141
0
unsigned fastEmit_ISD_ABS_MVT_v16i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
142
0
  if (RetVT.SimpleTy != MVT::v16i32)
143
0
    return 0;
144
0
  if ((Subtarget->hasAVX512())) {
145
0
    return fastEmitInst_r(X86::VPABSDZrr, &X86::VR512RegClass, Op0, Op0IsKill);
146
0
  }
147
0
  return 0;
148
0
}
149
150
0
unsigned fastEmit_ISD_ABS_MVT_v2i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
151
0
  if (RetVT.SimpleTy != MVT::v2i64)
152
0
    return 0;
153
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
154
0
    return fastEmitInst_r(X86::VPABSQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
155
0
  }
156
0
  return 0;
157
0
}
158
159
0
unsigned fastEmit_ISD_ABS_MVT_v4i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
160
0
  if (RetVT.SimpleTy != MVT::v4i64)
161
0
    return 0;
162
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
163
0
    return fastEmitInst_r(X86::VPABSQZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
164
0
  }
165
0
  return 0;
166
0
}
167
168
0
unsigned fastEmit_ISD_ABS_MVT_v8i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
169
0
  if (RetVT.SimpleTy != MVT::v8i64)
170
0
    return 0;
171
0
  if ((Subtarget->hasAVX512())) {
172
0
    return fastEmitInst_r(X86::VPABSQZrr, &X86::VR512RegClass, Op0, Op0IsKill);
173
0
  }
174
0
  return 0;
175
0
}
176
177
unsigned fastEmit_ISD_ABS_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
178
  switch (VT.SimpleTy) {
179
  case MVT::v16i8: return fastEmit_ISD_ABS_MVT_v16i8_r(RetVT, Op0, Op0IsKill);
180
  case MVT::v32i8: return fastEmit_ISD_ABS_MVT_v32i8_r(RetVT, Op0, Op0IsKill);
181
  case MVT::v64i8: return fastEmit_ISD_ABS_MVT_v64i8_r(RetVT, Op0, Op0IsKill);
182
  case MVT::v8i16: return fastEmit_ISD_ABS_MVT_v8i16_r(RetVT, Op0, Op0IsKill);
183
  case MVT::v16i16: return fastEmit_ISD_ABS_MVT_v16i16_r(RetVT, Op0, Op0IsKill);
184
  case MVT::v32i16: return fastEmit_ISD_ABS_MVT_v32i16_r(RetVT, Op0, Op0IsKill);
185
  case MVT::v4i32: return fastEmit_ISD_ABS_MVT_v4i32_r(RetVT, Op0, Op0IsKill);
186
  case MVT::v8i32: return fastEmit_ISD_ABS_MVT_v8i32_r(RetVT, Op0, Op0IsKill);
187
  case MVT::v16i32: return fastEmit_ISD_ABS_MVT_v16i32_r(RetVT, Op0, Op0IsKill);
188
  case MVT::v2i64: return fastEmit_ISD_ABS_MVT_v2i64_r(RetVT, Op0, Op0IsKill);
189
  case MVT::v4i64: return fastEmit_ISD_ABS_MVT_v4i64_r(RetVT, Op0, Op0IsKill);
190
  case MVT::v8i64: return fastEmit_ISD_ABS_MVT_v8i64_r(RetVT, Op0, Op0IsKill);
191
  default: return 0;
192
  }
193
}
194
195
// FastEmit functions for ISD::ANY_EXTEND.
196
197
3
unsigned fastEmit_ISD_ANY_EXTEND_MVT_i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
198
3
  if (RetVT.SimpleTy != MVT::i32)
199
0
    return 0;
200
3
  return fastEmitInst_r(X86::MOVZX32rr8, &X86::GR32RegClass, Op0, Op0IsKill);
201
3
}
202
203
0
unsigned fastEmit_ISD_ANY_EXTEND_MVT_v2i1_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
204
0
  if (RetVT.SimpleTy != MVT::v2i64)
205
0
    return 0;
206
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
207
0
    return fastEmitInst_r(X86::VPMOVM2QZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
208
0
  }
209
0
  return 0;
210
0
}
211
212
0
unsigned fastEmit_ISD_ANY_EXTEND_MVT_v4i1_MVT_v4i32_r(unsigned Op0, bool Op0IsKill) {
213
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
214
0
    return fastEmitInst_r(X86::VPMOVM2DZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
215
0
  }
216
0
  return 0;
217
0
}
218
219
0
unsigned fastEmit_ISD_ANY_EXTEND_MVT_v4i1_MVT_v4i64_r(unsigned Op0, bool Op0IsKill) {
220
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
221
0
    return fastEmitInst_r(X86::VPMOVM2QZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
222
0
  }
223
0
  return 0;
224
0
}
225
226
unsigned fastEmit_ISD_ANY_EXTEND_MVT_v4i1_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
227
switch (RetVT.SimpleTy) {
228
  case MVT::v4i32: return fastEmit_ISD_ANY_EXTEND_MVT_v4i1_MVT_v4i32_r(Op0, Op0IsKill);
229
  case MVT::v4i64: return fastEmit_ISD_ANY_EXTEND_MVT_v4i1_MVT_v4i64_r(Op0, Op0IsKill);
230
  default: return 0;
231
}
232
}
233
234
0
unsigned fastEmit_ISD_ANY_EXTEND_MVT_v8i1_MVT_v8i16_r(unsigned Op0, bool Op0IsKill) {
235
0
  if ((Subtarget->hasBWI()) && (Subtarget->hasVLX())) {
236
0
    return fastEmitInst_r(X86::VPMOVM2WZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
237
0
  }
238
0
  return 0;
239
0
}
240
241
0
unsigned fastEmit_ISD_ANY_EXTEND_MVT_v8i1_MVT_v8i32_r(unsigned Op0, bool Op0IsKill) {
242
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
243
0
    return fastEmitInst_r(X86::VPMOVM2DZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
244
0
  }
245
0
  return 0;
246
0
}
247
248
0
unsigned fastEmit_ISD_ANY_EXTEND_MVT_v8i1_MVT_v8i64_r(unsigned Op0, bool Op0IsKill) {
249
0
  if ((Subtarget->hasDQI())) {
250
0
    return fastEmitInst_r(X86::VPMOVM2QZrr, &X86::VR512RegClass, Op0, Op0IsKill);
251
0
  }
252
0
  return 0;
253
0
}
254
255
unsigned fastEmit_ISD_ANY_EXTEND_MVT_v8i1_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
256
switch (RetVT.SimpleTy) {
257
  case MVT::v8i16: return fastEmit_ISD_ANY_EXTEND_MVT_v8i1_MVT_v8i16_r(Op0, Op0IsKill);
258
  case MVT::v8i32: return fastEmit_ISD_ANY_EXTEND_MVT_v8i1_MVT_v8i32_r(Op0, Op0IsKill);
259
  case MVT::v8i64: return fastEmit_ISD_ANY_EXTEND_MVT_v8i1_MVT_v8i64_r(Op0, Op0IsKill);
260
  default: return 0;
261
}
262
}
263
264
0
unsigned fastEmit_ISD_ANY_EXTEND_MVT_v16i1_MVT_v16i8_r(unsigned Op0, bool Op0IsKill) {
265
0
  if ((Subtarget->hasBWI()) && (Subtarget->hasVLX())) {
266
0
    return fastEmitInst_r(X86::VPMOVM2BZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
267
0
  }
268
0
  return 0;
269
0
}
270
271
0
unsigned fastEmit_ISD_ANY_EXTEND_MVT_v16i1_MVT_v16i16_r(unsigned Op0, bool Op0IsKill) {
272
0
  if ((Subtarget->hasBWI()) && (Subtarget->hasVLX())) {
273
0
    return fastEmitInst_r(X86::VPMOVM2WZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
274
0
  }
275
0
  return 0;
276
0
}
277
278
0
unsigned fastEmit_ISD_ANY_EXTEND_MVT_v16i1_MVT_v16i32_r(unsigned Op0, bool Op0IsKill) {
279
0
  if ((Subtarget->hasDQI())) {
280
0
    return fastEmitInst_r(X86::VPMOVM2DZrr, &X86::VR512RegClass, Op0, Op0IsKill);
281
0
  }
282
0
  return 0;
283
0
}
284
285
unsigned fastEmit_ISD_ANY_EXTEND_MVT_v16i1_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
286
switch (RetVT.SimpleTy) {
287
  case MVT::v16i8: return fastEmit_ISD_ANY_EXTEND_MVT_v16i1_MVT_v16i8_r(Op0, Op0IsKill);
288
  case MVT::v16i16: return fastEmit_ISD_ANY_EXTEND_MVT_v16i1_MVT_v16i16_r(Op0, Op0IsKill);
289
  case MVT::v16i32: return fastEmit_ISD_ANY_EXTEND_MVT_v16i1_MVT_v16i32_r(Op0, Op0IsKill);
290
  default: return 0;
291
}
292
}
293
294
0
unsigned fastEmit_ISD_ANY_EXTEND_MVT_v32i1_MVT_v32i8_r(unsigned Op0, bool Op0IsKill) {
295
0
  if ((Subtarget->hasBWI()) && (Subtarget->hasVLX())) {
296
0
    return fastEmitInst_r(X86::VPMOVM2BZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
297
0
  }
298
0
  return 0;
299
0
}
300
301
0
unsigned fastEmit_ISD_ANY_EXTEND_MVT_v32i1_MVT_v32i16_r(unsigned Op0, bool Op0IsKill) {
302
0
  if ((Subtarget->hasBWI())) {
303
0
    return fastEmitInst_r(X86::VPMOVM2WZrr, &X86::VR512RegClass, Op0, Op0IsKill);
304
0
  }
305
0
  return 0;
306
0
}
307
308
unsigned fastEmit_ISD_ANY_EXTEND_MVT_v32i1_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
309
switch (RetVT.SimpleTy) {
310
  case MVT::v32i8: return fastEmit_ISD_ANY_EXTEND_MVT_v32i1_MVT_v32i8_r(Op0, Op0IsKill);
311
  case MVT::v32i16: return fastEmit_ISD_ANY_EXTEND_MVT_v32i1_MVT_v32i16_r(Op0, Op0IsKill);
312
  default: return 0;
313
}
314
}
315
316
0
unsigned fastEmit_ISD_ANY_EXTEND_MVT_v64i1_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
317
0
  if (RetVT.SimpleTy != MVT::v64i8)
318
0
    return 0;
319
0
  if ((Subtarget->hasBWI())) {
320
0
    return fastEmitInst_r(X86::VPMOVM2BZrr, &X86::VR512RegClass, Op0, Op0IsKill);
321
0
  }
322
0
  return 0;
323
0
}
324
325
0
unsigned fastEmit_ISD_ANY_EXTEND_MVT_v16i8_MVT_v16i16_r(unsigned Op0, bool Op0IsKill) {
326
0
  if ((Subtarget->hasBWI()) && (Subtarget->hasVLX())) {
327
0
    return fastEmitInst_r(X86::VPMOVZXBWZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
328
0
  }
329
0
  if ((Subtarget->hasAVX2()) && (!Subtarget->hasVLX() || !Subtarget->hasBWI())) {
330
0
    return fastEmitInst_r(X86::VPMOVZXBWYrr, &X86::VR256RegClass, Op0, Op0IsKill);
331
0
  }
332
0
  return 0;
333
0
}
334
335
0
unsigned fastEmit_ISD_ANY_EXTEND_MVT_v16i8_MVT_v16i32_r(unsigned Op0, bool Op0IsKill) {
336
0
  if ((Subtarget->hasAVX512())) {
337
0
    return fastEmitInst_r(X86::VPMOVZXBDZrr, &X86::VR512RegClass, Op0, Op0IsKill);
338
0
  }
339
0
  return 0;
340
0
}
341
342
unsigned fastEmit_ISD_ANY_EXTEND_MVT_v16i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
343
switch (RetVT.SimpleTy) {
344
  case MVT::v16i16: return fastEmit_ISD_ANY_EXTEND_MVT_v16i8_MVT_v16i16_r(Op0, Op0IsKill);
345
  case MVT::v16i32: return fastEmit_ISD_ANY_EXTEND_MVT_v16i8_MVT_v16i32_r(Op0, Op0IsKill);
346
  default: return 0;
347
}
348
}
349
350
0
unsigned fastEmit_ISD_ANY_EXTEND_MVT_v32i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
351
0
  if (RetVT.SimpleTy != MVT::v32i16)
352
0
    return 0;
353
0
  if ((Subtarget->hasBWI())) {
354
0
    return fastEmitInst_r(X86::VPMOVZXBWZrr, &X86::VR512RegClass, Op0, Op0IsKill);
355
0
  }
356
0
  return 0;
357
0
}
358
359
0
unsigned fastEmit_ISD_ANY_EXTEND_MVT_v8i16_MVT_v8i32_r(unsigned Op0, bool Op0IsKill) {
360
0
  if ((Subtarget->hasVLX())) {
361
0
    return fastEmitInst_r(X86::VPMOVZXWDZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
362
0
  }
363
0
  if ((Subtarget->hasAVX2()) && (!Subtarget->hasVLX())) {
364
0
    return fastEmitInst_r(X86::VPMOVZXWDYrr, &X86::VR256RegClass, Op0, Op0IsKill);
365
0
  }
366
0
  return 0;
367
0
}
368
369
0
unsigned fastEmit_ISD_ANY_EXTEND_MVT_v8i16_MVT_v8i64_r(unsigned Op0, bool Op0IsKill) {
370
0
  if ((Subtarget->hasAVX512())) {
371
0
    return fastEmitInst_r(X86::VPMOVZXWQZrr, &X86::VR512RegClass, Op0, Op0IsKill);
372
0
  }
373
0
  return 0;
374
0
}
375
376
unsigned fastEmit_ISD_ANY_EXTEND_MVT_v8i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
377
switch (RetVT.SimpleTy) {
378
  case MVT::v8i32: return fastEmit_ISD_ANY_EXTEND_MVT_v8i16_MVT_v8i32_r(Op0, Op0IsKill);
379
  case MVT::v8i64: return fastEmit_ISD_ANY_EXTEND_MVT_v8i16_MVT_v8i64_r(Op0, Op0IsKill);
380
  default: return 0;
381
}
382
}
383
384
0
unsigned fastEmit_ISD_ANY_EXTEND_MVT_v16i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
385
0
  if (RetVT.SimpleTy != MVT::v16i32)
386
0
    return 0;
387
0
  if ((Subtarget->hasAVX512())) {
388
0
    return fastEmitInst_r(X86::VPMOVZXWDZrr, &X86::VR512RegClass, Op0, Op0IsKill);
389
0
  }
390
0
  return 0;
391
0
}
392
393
0
unsigned fastEmit_ISD_ANY_EXTEND_MVT_v4i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
394
0
  if (RetVT.SimpleTy != MVT::v4i64)
395
0
    return 0;
396
0
  if ((Subtarget->hasVLX())) {
397
0
    return fastEmitInst_r(X86::VPMOVZXDQZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
398
0
  }
399
0
  if ((Subtarget->hasAVX2()) && (!Subtarget->hasVLX())) {
400
0
    return fastEmitInst_r(X86::VPMOVZXDQYrr, &X86::VR256RegClass, Op0, Op0IsKill);
401
0
  }
402
0
  return 0;
403
0
}
404
405
0
unsigned fastEmit_ISD_ANY_EXTEND_MVT_v8i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
406
0
  if (RetVT.SimpleTy != MVT::v8i64)
407
0
    return 0;
408
0
  if ((Subtarget->hasAVX512())) {
409
0
    return fastEmitInst_r(X86::VPMOVZXDQZrr, &X86::VR512RegClass, Op0, Op0IsKill);
410
0
  }
411
0
  return 0;
412
0
}
413
414
6
unsigned fastEmit_ISD_ANY_EXTEND_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
415
6
  switch (VT.SimpleTy) {
416
6
  
case MVT::i8: return fastEmit_ISD_ANY_EXTEND_MVT_i8_r(RetVT, Op0, Op0IsKill)3
;
417
6
  
case MVT::v2i1: return fastEmit_ISD_ANY_EXTEND_MVT_v2i1_r(RetVT, Op0, Op0IsKill)0
;
418
6
  
case MVT::v4i1: return fastEmit_ISD_ANY_EXTEND_MVT_v4i1_r(RetVT, Op0, Op0IsKill)0
;
419
6
  
case MVT::v8i1: return fastEmit_ISD_ANY_EXTEND_MVT_v8i1_r(RetVT, Op0, Op0IsKill)0
;
420
6
  
case MVT::v16i1: return fastEmit_ISD_ANY_EXTEND_MVT_v16i1_r(RetVT, Op0, Op0IsKill)0
;
421
6
  
case MVT::v32i1: return fastEmit_ISD_ANY_EXTEND_MVT_v32i1_r(RetVT, Op0, Op0IsKill)0
;
422
6
  
case MVT::v64i1: return fastEmit_ISD_ANY_EXTEND_MVT_v64i1_r(RetVT, Op0, Op0IsKill)0
;
423
6
  
case MVT::v16i8: return fastEmit_ISD_ANY_EXTEND_MVT_v16i8_r(RetVT, Op0, Op0IsKill)0
;
424
6
  
case MVT::v32i8: return fastEmit_ISD_ANY_EXTEND_MVT_v32i8_r(RetVT, Op0, Op0IsKill)0
;
425
6
  
case MVT::v8i16: return fastEmit_ISD_ANY_EXTEND_MVT_v8i16_r(RetVT, Op0, Op0IsKill)0
;
426
6
  
case MVT::v16i16: return fastEmit_ISD_ANY_EXTEND_MVT_v16i16_r(RetVT, Op0, Op0IsKill)0
;
427
6
  
case MVT::v4i32: return fastEmit_ISD_ANY_EXTEND_MVT_v4i32_r(RetVT, Op0, Op0IsKill)0
;
428
6
  
case MVT::v8i32: return fastEmit_ISD_ANY_EXTEND_MVT_v8i32_r(RetVT, Op0, Op0IsKill)0
;
429
6
  
default: return 03
;
430
6
  }
431
6
}
432
433
// FastEmit functions for ISD::BITCAST.
434
435
13
unsigned fastEmit_ISD_BITCAST_MVT_i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
436
13
  if (RetVT.SimpleTy != MVT::f32)
437
12
    return 0;
438
1
  if ((Subtarget->hasAVX512())) {
439
0
    return fastEmitInst_r(X86::VMOVDI2SSZrr, &X86::FR32XRegClass, Op0, Op0IsKill);
440
0
  }
441
1
  if ((Subtarget->hasSSE2() && !Subtarget->hasAVX())) {
442
1
    return fastEmitInst_r(X86::MOVDI2SSrr, &X86::FR32RegClass, Op0, Op0IsKill);
443
1
  }
444
0
  if ((Subtarget->hasAVX() && !Subtarget->hasAVX512())) {
445
0
    return fastEmitInst_r(X86::VMOVDI2SSrr, &X86::FR32RegClass, Op0, Op0IsKill);
446
0
  }
447
0
  return 0;
448
0
}
449
450
1
unsigned fastEmit_ISD_BITCAST_MVT_i64_MVT_f64_r(unsigned Op0, bool Op0IsKill) {
451
1
  if ((Subtarget->hasAVX512())) {
452
0
    return fastEmitInst_r(X86::VMOV64toSDZrr, &X86::FR64XRegClass, Op0, Op0IsKill);
453
0
  }
454
1
  if ((Subtarget->hasSSE2() && !Subtarget->hasAVX())) {
455
1
    return fastEmitInst_r(X86::MOV64toSDrr, &X86::FR64RegClass, Op0, Op0IsKill);
456
1
  }
457
0
  if ((Subtarget->hasAVX() && !Subtarget->hasAVX512())) {
458
0
    return fastEmitInst_r(X86::VMOV64toSDrr, &X86::FR64RegClass, Op0, Op0IsKill);
459
0
  }
460
0
  return 0;
461
0
}
462
463
0
unsigned fastEmit_ISD_BITCAST_MVT_i64_MVT_x86mmx_r(unsigned Op0, bool Op0IsKill) {
464
0
  if ((Subtarget->hasMMX())) {
465
0
    return fastEmitInst_r(X86::MMX_MOVD64to64rr, &X86::VR64RegClass, Op0, Op0IsKill);
466
0
  }
467
0
  return 0;
468
0
}
469
470
4
unsigned fastEmit_ISD_BITCAST_MVT_i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
471
4
switch (RetVT.SimpleTy) {
472
4
  
case MVT::f64: return fastEmit_ISD_BITCAST_MVT_i64_MVT_f64_r(Op0, Op0IsKill)1
;
473
4
  
case MVT::x86mmx: return fastEmit_ISD_BITCAST_MVT_i64_MVT_x86mmx_r(Op0, Op0IsKill)0
;
474
4
  
default: return 03
;
475
4
}
476
4
}
477
478
7
unsigned fastEmit_ISD_BITCAST_MVT_f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
479
7
  if (RetVT.SimpleTy != MVT::i32)
480
0
    return 0;
481
7
  if ((Subtarget->hasAVX512())) {
482
2
    return fastEmitInst_r(X86::VMOVSS2DIZrr, &X86::GR32RegClass, Op0, Op0IsKill);
483
2
  }
484
5
  if ((Subtarget->hasSSE2() && !Subtarget->hasAVX())) {
485
3
    return fastEmitInst_r(X86::MOVSS2DIrr, &X86::GR32RegClass, Op0, Op0IsKill);
486
3
  }
487
2
  if ((Subtarget->hasAVX() && !Subtarget->hasAVX512())) {
488
2
    return fastEmitInst_r(X86::VMOVSS2DIrr, &X86::GR32RegClass, Op0, Op0IsKill);
489
2
  }
490
0
  return 0;
491
0
}
492
493
2
unsigned fastEmit_ISD_BITCAST_MVT_f64_MVT_i64_r(unsigned Op0, bool Op0IsKill) {
494
2
  if ((Subtarget->hasAVX512())) {
495
0
    return fastEmitInst_r(X86::VMOVSDto64Zrr, &X86::GR64RegClass, Op0, Op0IsKill);
496
0
  }
497
2
  if ((Subtarget->hasSSE2() && !Subtarget->hasAVX())) {
498
1
    return fastEmitInst_r(X86::MOVSDto64rr, &X86::GR64RegClass, Op0, Op0IsKill);
499
1
  }
500
1
  if ((Subtarget->hasAVX() && !Subtarget->hasAVX512())) {
501
1
    return fastEmitInst_r(X86::VMOVSDto64rr, &X86::GR64RegClass, Op0, Op0IsKill);
502
1
  }
503
0
  return 0;
504
0
}
505
506
0
unsigned fastEmit_ISD_BITCAST_MVT_f64_MVT_x86mmx_r(unsigned Op0, bool Op0IsKill) {
507
0
  if ((Subtarget->hasMMX()) && (Subtarget->hasSSE2())) {
508
0
    return fastEmitInst_r(X86::MMX_MOVFR642Qrr, &X86::VR64RegClass, Op0, Op0IsKill);
509
0
  }
510
0
  return 0;
511
0
}
512
513
2
unsigned fastEmit_ISD_BITCAST_MVT_f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
514
2
switch (RetVT.SimpleTy) {
515
2
  case MVT::i64: return fastEmit_ISD_BITCAST_MVT_f64_MVT_i64_r(Op0, Op0IsKill);
516
2
  
case MVT::x86mmx: return fastEmit_ISD_BITCAST_MVT_f64_MVT_x86mmx_r(Op0, Op0IsKill)0
;
517
2
  
default: return 00
;
518
2
}
519
2
}
520
521
0
unsigned fastEmit_ISD_BITCAST_MVT_x86mmx_MVT_i64_r(unsigned Op0, bool Op0IsKill) {
522
0
  if ((Subtarget->hasMMX())) {
523
0
    return fastEmitInst_r(X86::MMX_MOVD64from64rr, &X86::GR64RegClass, Op0, Op0IsKill);
524
0
  }
525
0
  return 0;
526
0
}
527
528
0
unsigned fastEmit_ISD_BITCAST_MVT_x86mmx_MVT_f64_r(unsigned Op0, bool Op0IsKill) {
529
0
  if ((Subtarget->hasMMX()) && (Subtarget->hasSSE2())) {
530
0
    return fastEmitInst_r(X86::MMX_MOVQ2FR64rr, &X86::FR64RegClass, Op0, Op0IsKill);
531
0
  }
532
0
  return 0;
533
0
}
534
535
unsigned fastEmit_ISD_BITCAST_MVT_x86mmx_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
536
switch (RetVT.SimpleTy) {
537
  case MVT::i64: return fastEmit_ISD_BITCAST_MVT_x86mmx_MVT_i64_r(Op0, Op0IsKill);
538
  case MVT::f64: return fastEmit_ISD_BITCAST_MVT_x86mmx_MVT_f64_r(Op0, Op0IsKill);
539
  default: return 0;
540
}
541
}
542
543
4.05k
unsigned fastEmit_ISD_BITCAST_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
544
4.05k
  switch (VT.SimpleTy) {
545
4.05k
  
case MVT::i32: return fastEmit_ISD_BITCAST_MVT_i32_r(RetVT, Op0, Op0IsKill)13
;
546
4.05k
  
case MVT::i64: return fastEmit_ISD_BITCAST_MVT_i64_r(RetVT, Op0, Op0IsKill)4
;
547
4.05k
  
case MVT::f32: return fastEmit_ISD_BITCAST_MVT_f32_r(RetVT, Op0, Op0IsKill)7
;
548
4.05k
  
case MVT::f64: return fastEmit_ISD_BITCAST_MVT_f64_r(RetVT, Op0, Op0IsKill)2
;
549
4.05k
  
case MVT::x86mmx: return fastEmit_ISD_BITCAST_MVT_x86mmx_r(RetVT, Op0, Op0IsKill)0
;
550
4.05k
  
default: return 04.02k
;
551
4.05k
  }
552
4.05k
}
553
554
// FastEmit functions for ISD::BRIND.
555
556
0
unsigned fastEmit_ISD_BRIND_MVT_i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
557
0
  if (RetVT.SimpleTy != MVT::isVoid)
558
0
    return 0;
559
0
  if ((!Subtarget->is64Bit())) {
560
0
    return fastEmitInst_r(X86::JMP16r, &X86::GR16RegClass, Op0, Op0IsKill);
561
0
  }
562
0
  return 0;
563
0
}
564
565
0
unsigned fastEmit_ISD_BRIND_MVT_i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
566
0
  if (RetVT.SimpleTy != MVT::isVoid)
567
0
    return 0;
568
0
  if ((!Subtarget->is64Bit())) {
569
0
    return fastEmitInst_r(X86::JMP32r, &X86::GR32RegClass, Op0, Op0IsKill);
570
0
  }
571
0
  return 0;
572
0
}
573
574
0
unsigned fastEmit_ISD_BRIND_MVT_i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
575
0
  if (RetVT.SimpleTy != MVT::isVoid)
576
0
    return 0;
577
0
  if ((Subtarget->is64Bit())) {
578
0
    return fastEmitInst_r(X86::JMP64r, &X86::GR64RegClass, Op0, Op0IsKill);
579
0
  }
580
0
  return 0;
581
0
}
582
583
unsigned fastEmit_ISD_BRIND_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
584
  switch (VT.SimpleTy) {
585
  case MVT::i16: return fastEmit_ISD_BRIND_MVT_i16_r(RetVT, Op0, Op0IsKill);
586
  case MVT::i32: return fastEmit_ISD_BRIND_MVT_i32_r(RetVT, Op0, Op0IsKill);
587
  case MVT::i64: return fastEmit_ISD_BRIND_MVT_i64_r(RetVT, Op0, Op0IsKill);
588
  default: return 0;
589
  }
590
}
591
592
// FastEmit functions for ISD::BSWAP.
593
594
0
unsigned fastEmit_ISD_BSWAP_MVT_i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
595
0
  if (RetVT.SimpleTy != MVT::i32)
596
0
    return 0;
597
0
  return fastEmitInst_r(X86::BSWAP32r, &X86::GR32RegClass, Op0, Op0IsKill);
598
0
}
599
600
0
unsigned fastEmit_ISD_BSWAP_MVT_i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
601
0
  if (RetVT.SimpleTy != MVT::i64)
602
0
    return 0;
603
0
  return fastEmitInst_r(X86::BSWAP64r, &X86::GR64RegClass, Op0, Op0IsKill);
604
0
}
605
606
unsigned fastEmit_ISD_BSWAP_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
607
  switch (VT.SimpleTy) {
608
  case MVT::i32: return fastEmit_ISD_BSWAP_MVT_i32_r(RetVT, Op0, Op0IsKill);
609
  case MVT::i64: return fastEmit_ISD_BSWAP_MVT_i64_r(RetVT, Op0, Op0IsKill);
610
  default: return 0;
611
  }
612
}
613
614
// FastEmit functions for ISD::CTLZ.
615
616
0
unsigned fastEmit_ISD_CTLZ_MVT_i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
617
0
  if (RetVT.SimpleTy != MVT::i16)
618
0
    return 0;
619
0
  if ((Subtarget->hasLZCNT())) {
620
0
    return fastEmitInst_r(X86::LZCNT16rr, &X86::GR16RegClass, Op0, Op0IsKill);
621
0
  }
622
0
  return 0;
623
0
}
624
625
0
unsigned fastEmit_ISD_CTLZ_MVT_i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
626
0
  if (RetVT.SimpleTy != MVT::i32)
627
0
    return 0;
628
0
  if ((Subtarget->hasLZCNT())) {
629
0
    return fastEmitInst_r(X86::LZCNT32rr, &X86::GR32RegClass, Op0, Op0IsKill);
630
0
  }
631
0
  return 0;
632
0
}
633
634
0
unsigned fastEmit_ISD_CTLZ_MVT_i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
635
0
  if (RetVT.SimpleTy != MVT::i64)
636
0
    return 0;
637
0
  if ((Subtarget->hasLZCNT())) {
638
0
    return fastEmitInst_r(X86::LZCNT64rr, &X86::GR64RegClass, Op0, Op0IsKill);
639
0
  }
640
0
  return 0;
641
0
}
642
643
0
unsigned fastEmit_ISD_CTLZ_MVT_v4i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
644
0
  if (RetVT.SimpleTy != MVT::v4i32)
645
0
    return 0;
646
0
  if ((Subtarget->hasCDI()) && (Subtarget->hasVLX())) {
647
0
    return fastEmitInst_r(X86::VPLZCNTDZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
648
0
  }
649
0
  return 0;
650
0
}
651
652
0
unsigned fastEmit_ISD_CTLZ_MVT_v8i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
653
0
  if (RetVT.SimpleTy != MVT::v8i32)
654
0
    return 0;
655
0
  if ((Subtarget->hasCDI()) && (Subtarget->hasVLX())) {
656
0
    return fastEmitInst_r(X86::VPLZCNTDZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
657
0
  }
658
0
  return 0;
659
0
}
660
661
0
unsigned fastEmit_ISD_CTLZ_MVT_v16i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
662
0
  if (RetVT.SimpleTy != MVT::v16i32)
663
0
    return 0;
664
0
  if ((Subtarget->hasCDI())) {
665
0
    return fastEmitInst_r(X86::VPLZCNTDZrr, &X86::VR512RegClass, Op0, Op0IsKill);
666
0
  }
667
0
  return 0;
668
0
}
669
670
0
unsigned fastEmit_ISD_CTLZ_MVT_v2i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
671
0
  if (RetVT.SimpleTy != MVT::v2i64)
672
0
    return 0;
673
0
  if ((Subtarget->hasCDI()) && (Subtarget->hasVLX())) {
674
0
    return fastEmitInst_r(X86::VPLZCNTQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
675
0
  }
676
0
  return 0;
677
0
}
678
679
0
unsigned fastEmit_ISD_CTLZ_MVT_v4i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
680
0
  if (RetVT.SimpleTy != MVT::v4i64)
681
0
    return 0;
682
0
  if ((Subtarget->hasCDI()) && (Subtarget->hasVLX())) {
683
0
    return fastEmitInst_r(X86::VPLZCNTQZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
684
0
  }
685
0
  return 0;
686
0
}
687
688
0
unsigned fastEmit_ISD_CTLZ_MVT_v8i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
689
0
  if (RetVT.SimpleTy != MVT::v8i64)
690
0
    return 0;
691
0
  if ((Subtarget->hasCDI())) {
692
0
    return fastEmitInst_r(X86::VPLZCNTQZrr, &X86::VR512RegClass, Op0, Op0IsKill);
693
0
  }
694
0
  return 0;
695
0
}
696
697
unsigned fastEmit_ISD_CTLZ_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
698
  switch (VT.SimpleTy) {
699
  case MVT::i16: return fastEmit_ISD_CTLZ_MVT_i16_r(RetVT, Op0, Op0IsKill);
700
  case MVT::i32: return fastEmit_ISD_CTLZ_MVT_i32_r(RetVT, Op0, Op0IsKill);
701
  case MVT::i64: return fastEmit_ISD_CTLZ_MVT_i64_r(RetVT, Op0, Op0IsKill);
702
  case MVT::v4i32: return fastEmit_ISD_CTLZ_MVT_v4i32_r(RetVT, Op0, Op0IsKill);
703
  case MVT::v8i32: return fastEmit_ISD_CTLZ_MVT_v8i32_r(RetVT, Op0, Op0IsKill);
704
  case MVT::v16i32: return fastEmit_ISD_CTLZ_MVT_v16i32_r(RetVT, Op0, Op0IsKill);
705
  case MVT::v2i64: return fastEmit_ISD_CTLZ_MVT_v2i64_r(RetVT, Op0, Op0IsKill);
706
  case MVT::v4i64: return fastEmit_ISD_CTLZ_MVT_v4i64_r(RetVT, Op0, Op0IsKill);
707
  case MVT::v8i64: return fastEmit_ISD_CTLZ_MVT_v8i64_r(RetVT, Op0, Op0IsKill);
708
  default: return 0;
709
  }
710
}
711
712
// FastEmit functions for ISD::CTPOP.
713
714
0
unsigned fastEmit_ISD_CTPOP_MVT_i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
715
0
  if (RetVT.SimpleTy != MVT::i16)
716
0
    return 0;
717
0
  if ((Subtarget->hasPOPCNT())) {
718
0
    return fastEmitInst_r(X86::POPCNT16rr, &X86::GR16RegClass, Op0, Op0IsKill);
719
0
  }
720
0
  return 0;
721
0
}
722
723
0
unsigned fastEmit_ISD_CTPOP_MVT_i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
724
0
  if (RetVT.SimpleTy != MVT::i32)
725
0
    return 0;
726
0
  if ((Subtarget->hasPOPCNT())) {
727
0
    return fastEmitInst_r(X86::POPCNT32rr, &X86::GR32RegClass, Op0, Op0IsKill);
728
0
  }
729
0
  return 0;
730
0
}
731
732
0
unsigned fastEmit_ISD_CTPOP_MVT_i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
733
0
  if (RetVT.SimpleTy != MVT::i64)
734
0
    return 0;
735
0
  if ((Subtarget->hasPOPCNT())) {
736
0
    return fastEmitInst_r(X86::POPCNT64rr, &X86::GR64RegClass, Op0, Op0IsKill);
737
0
  }
738
0
  return 0;
739
0
}
740
741
0
unsigned fastEmit_ISD_CTPOP_MVT_v16i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
742
0
  if (RetVT.SimpleTy != MVT::v16i8)
743
0
    return 0;
744
0
  if ((Subtarget->hasBITALG()) && (Subtarget->hasVLX())) {
745
0
    return fastEmitInst_r(X86::VPOPCNTBZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
746
0
  }
747
0
  return 0;
748
0
}
749
750
0
unsigned fastEmit_ISD_CTPOP_MVT_v32i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
751
0
  if (RetVT.SimpleTy != MVT::v32i8)
752
0
    return 0;
753
0
  if ((Subtarget->hasBITALG()) && (Subtarget->hasVLX())) {
754
0
    return fastEmitInst_r(X86::VPOPCNTBZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
755
0
  }
756
0
  return 0;
757
0
}
758
759
0
unsigned fastEmit_ISD_CTPOP_MVT_v64i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
760
0
  if (RetVT.SimpleTy != MVT::v64i8)
761
0
    return 0;
762
0
  if ((Subtarget->hasBITALG())) {
763
0
    return fastEmitInst_r(X86::VPOPCNTBZrr, &X86::VR512RegClass, Op0, Op0IsKill);
764
0
  }
765
0
  return 0;
766
0
}
767
768
0
unsigned fastEmit_ISD_CTPOP_MVT_v8i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
769
0
  if (RetVT.SimpleTy != MVT::v8i16)
770
0
    return 0;
771
0
  if ((Subtarget->hasBITALG()) && (Subtarget->hasVLX())) {
772
0
    return fastEmitInst_r(X86::VPOPCNTWZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
773
0
  }
774
0
  return 0;
775
0
}
776
777
0
unsigned fastEmit_ISD_CTPOP_MVT_v16i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
778
0
  if (RetVT.SimpleTy != MVT::v16i16)
779
0
    return 0;
780
0
  if ((Subtarget->hasBITALG()) && (Subtarget->hasVLX())) {
781
0
    return fastEmitInst_r(X86::VPOPCNTWZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
782
0
  }
783
0
  return 0;
784
0
}
785
786
0
unsigned fastEmit_ISD_CTPOP_MVT_v32i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
787
0
  if (RetVT.SimpleTy != MVT::v32i16)
788
0
    return 0;
789
0
  if ((Subtarget->hasBITALG())) {
790
0
    return fastEmitInst_r(X86::VPOPCNTWZrr, &X86::VR512RegClass, Op0, Op0IsKill);
791
0
  }
792
0
  return 0;
793
0
}
794
795
0
unsigned fastEmit_ISD_CTPOP_MVT_v4i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
796
0
  if (RetVT.SimpleTy != MVT::v4i32)
797
0
    return 0;
798
0
  if ((Subtarget->hasVLX()) && (Subtarget->hasVPOPCNTDQ())) {
799
0
    return fastEmitInst_r(X86::VPOPCNTDZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
800
0
  }
801
0
  return 0;
802
0
}
803
804
0
unsigned fastEmit_ISD_CTPOP_MVT_v8i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
805
0
  if (RetVT.SimpleTy != MVT::v8i32)
806
0
    return 0;
807
0
  if ((Subtarget->hasVLX()) && (Subtarget->hasVPOPCNTDQ())) {
808
0
    return fastEmitInst_r(X86::VPOPCNTDZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
809
0
  }
810
0
  return 0;
811
0
}
812
813
0
unsigned fastEmit_ISD_CTPOP_MVT_v16i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
814
0
  if (RetVT.SimpleTy != MVT::v16i32)
815
0
    return 0;
816
0
  if ((Subtarget->hasVPOPCNTDQ())) {
817
0
    return fastEmitInst_r(X86::VPOPCNTDZrr, &X86::VR512RegClass, Op0, Op0IsKill);
818
0
  }
819
0
  return 0;
820
0
}
821
822
0
unsigned fastEmit_ISD_CTPOP_MVT_v2i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
823
0
  if (RetVT.SimpleTy != MVT::v2i64)
824
0
    return 0;
825
0
  if ((Subtarget->hasVLX()) && (Subtarget->hasVPOPCNTDQ())) {
826
0
    return fastEmitInst_r(X86::VPOPCNTQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
827
0
  }
828
0
  return 0;
829
0
}
830
831
0
unsigned fastEmit_ISD_CTPOP_MVT_v4i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
832
0
  if (RetVT.SimpleTy != MVT::v4i64)
833
0
    return 0;
834
0
  if ((Subtarget->hasVLX()) && (Subtarget->hasVPOPCNTDQ())) {
835
0
    return fastEmitInst_r(X86::VPOPCNTQZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
836
0
  }
837
0
  return 0;
838
0
}
839
840
0
unsigned fastEmit_ISD_CTPOP_MVT_v8i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
841
0
  if (RetVT.SimpleTy != MVT::v8i64)
842
0
    return 0;
843
0
  if ((Subtarget->hasVPOPCNTDQ())) {
844
0
    return fastEmitInst_r(X86::VPOPCNTQZrr, &X86::VR512RegClass, Op0, Op0IsKill);
845
0
  }
846
0
  return 0;
847
0
}
848
849
unsigned fastEmit_ISD_CTPOP_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
850
  switch (VT.SimpleTy) {
851
  case MVT::i16: return fastEmit_ISD_CTPOP_MVT_i16_r(RetVT, Op0, Op0IsKill);
852
  case MVT::i32: return fastEmit_ISD_CTPOP_MVT_i32_r(RetVT, Op0, Op0IsKill);
853
  case MVT::i64: return fastEmit_ISD_CTPOP_MVT_i64_r(RetVT, Op0, Op0IsKill);
854
  case MVT::v16i8: return fastEmit_ISD_CTPOP_MVT_v16i8_r(RetVT, Op0, Op0IsKill);
855
  case MVT::v32i8: return fastEmit_ISD_CTPOP_MVT_v32i8_r(RetVT, Op0, Op0IsKill);
856
  case MVT::v64i8: return fastEmit_ISD_CTPOP_MVT_v64i8_r(RetVT, Op0, Op0IsKill);
857
  case MVT::v8i16: return fastEmit_ISD_CTPOP_MVT_v8i16_r(RetVT, Op0, Op0IsKill);
858
  case MVT::v16i16: return fastEmit_ISD_CTPOP_MVT_v16i16_r(RetVT, Op0, Op0IsKill);
859
  case MVT::v32i16: return fastEmit_ISD_CTPOP_MVT_v32i16_r(RetVT, Op0, Op0IsKill);
860
  case MVT::v4i32: return fastEmit_ISD_CTPOP_MVT_v4i32_r(RetVT, Op0, Op0IsKill);
861
  case MVT::v8i32: return fastEmit_ISD_CTPOP_MVT_v8i32_r(RetVT, Op0, Op0IsKill);
862
  case MVT::v16i32: return fastEmit_ISD_CTPOP_MVT_v16i32_r(RetVT, Op0, Op0IsKill);
863
  case MVT::v2i64: return fastEmit_ISD_CTPOP_MVT_v2i64_r(RetVT, Op0, Op0IsKill);
864
  case MVT::v4i64: return fastEmit_ISD_CTPOP_MVT_v4i64_r(RetVT, Op0, Op0IsKill);
865
  case MVT::v8i64: return fastEmit_ISD_CTPOP_MVT_v8i64_r(RetVT, Op0, Op0IsKill);
866
  default: return 0;
867
  }
868
}
869
870
// FastEmit functions for ISD::CTTZ.
871
872
0
unsigned fastEmit_ISD_CTTZ_MVT_i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
873
0
  if (RetVT.SimpleTy != MVT::i16)
874
0
    return 0;
875
0
  if ((Subtarget->hasBMI())) {
876
0
    return fastEmitInst_r(X86::TZCNT16rr, &X86::GR16RegClass, Op0, Op0IsKill);
877
0
  }
878
0
  return 0;
879
0
}
880
881
0
unsigned fastEmit_ISD_CTTZ_MVT_i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
882
0
  if (RetVT.SimpleTy != MVT::i32)
883
0
    return 0;
884
0
  if ((Subtarget->hasBMI())) {
885
0
    return fastEmitInst_r(X86::TZCNT32rr, &X86::GR32RegClass, Op0, Op0IsKill);
886
0
  }
887
0
  return 0;
888
0
}
889
890
0
unsigned fastEmit_ISD_CTTZ_MVT_i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
891
0
  if (RetVT.SimpleTy != MVT::i64)
892
0
    return 0;
893
0
  if ((Subtarget->hasBMI())) {
894
0
    return fastEmitInst_r(X86::TZCNT64rr, &X86::GR64RegClass, Op0, Op0IsKill);
895
0
  }
896
0
  return 0;
897
0
}
898
899
unsigned fastEmit_ISD_CTTZ_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
900
  switch (VT.SimpleTy) {
901
  case MVT::i16: return fastEmit_ISD_CTTZ_MVT_i16_r(RetVT, Op0, Op0IsKill);
902
  case MVT::i32: return fastEmit_ISD_CTTZ_MVT_i32_r(RetVT, Op0, Op0IsKill);
903
  case MVT::i64: return fastEmit_ISD_CTTZ_MVT_i64_r(RetVT, Op0, Op0IsKill);
904
  default: return 0;
905
  }
906
}
907
908
// FastEmit functions for ISD::CTTZ_ZERO_UNDEF.
909
910
0
unsigned fastEmit_ISD_CTTZ_ZERO_UNDEF_MVT_i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
911
0
  if (RetVT.SimpleTy != MVT::i16)
912
0
    return 0;
913
0
  return fastEmitInst_r(X86::BSF16rr, &X86::GR16RegClass, Op0, Op0IsKill);
914
0
}
915
916
0
unsigned fastEmit_ISD_CTTZ_ZERO_UNDEF_MVT_i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
917
0
  if (RetVT.SimpleTy != MVT::i32)
918
0
    return 0;
919
0
  return fastEmitInst_r(X86::BSF32rr, &X86::GR32RegClass, Op0, Op0IsKill);
920
0
}
921
922
0
unsigned fastEmit_ISD_CTTZ_ZERO_UNDEF_MVT_i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
923
0
  if (RetVT.SimpleTy != MVT::i64)
924
0
    return 0;
925
0
  return fastEmitInst_r(X86::BSF64rr, &X86::GR64RegClass, Op0, Op0IsKill);
926
0
}
927
928
unsigned fastEmit_ISD_CTTZ_ZERO_UNDEF_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
929
  switch (VT.SimpleTy) {
930
  case MVT::i16: return fastEmit_ISD_CTTZ_ZERO_UNDEF_MVT_i16_r(RetVT, Op0, Op0IsKill);
931
  case MVT::i32: return fastEmit_ISD_CTTZ_ZERO_UNDEF_MVT_i32_r(RetVT, Op0, Op0IsKill);
932
  case MVT::i64: return fastEmit_ISD_CTTZ_ZERO_UNDEF_MVT_i64_r(RetVT, Op0, Op0IsKill);
933
  default: return 0;
934
  }
935
}
936
937
// FastEmit functions for ISD::FABS.
938
939
0
unsigned fastEmit_ISD_FABS_MVT_f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
940
0
  if (RetVT.SimpleTy != MVT::f32)
941
0
    return 0;
942
0
  if ((!Subtarget->hasSSE1())) {
943
0
    return fastEmitInst_r(X86::ABS_Fp32, &X86::RFP32RegClass, Op0, Op0IsKill);
944
0
  }
945
0
  return 0;
946
0
}
947
948
0
unsigned fastEmit_ISD_FABS_MVT_f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
949
0
  if (RetVT.SimpleTy != MVT::f64)
950
0
    return 0;
951
0
  if ((!Subtarget->hasSSE2())) {
952
0
    return fastEmitInst_r(X86::ABS_Fp64, &X86::RFP64RegClass, Op0, Op0IsKill);
953
0
  }
954
0
  return 0;
955
0
}
956
957
0
unsigned fastEmit_ISD_FABS_MVT_f80_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
958
0
  if (RetVT.SimpleTy != MVT::f80)
959
0
    return 0;
960
0
  return fastEmitInst_r(X86::ABS_Fp80, &X86::RFP80RegClass, Op0, Op0IsKill);
961
0
}
962
963
unsigned fastEmit_ISD_FABS_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
964
  switch (VT.SimpleTy) {
965
  case MVT::f32: return fastEmit_ISD_FABS_MVT_f32_r(RetVT, Op0, Op0IsKill);
966
  case MVT::f64: return fastEmit_ISD_FABS_MVT_f64_r(RetVT, Op0, Op0IsKill);
967
  case MVT::f80: return fastEmit_ISD_FABS_MVT_f80_r(RetVT, Op0, Op0IsKill);
968
  default: return 0;
969
  }
970
}
971
972
// FastEmit functions for ISD::FCOS.
973
974
0
unsigned fastEmit_ISD_FCOS_MVT_f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
975
0
  if (RetVT.SimpleTy != MVT::f32)
976
0
    return 0;
977
0
  if ((!Subtarget->hasSSE1())) {
978
0
    return fastEmitInst_r(X86::COS_Fp32, &X86::RFP32RegClass, Op0, Op0IsKill);
979
0
  }
980
0
  return 0;
981
0
}
982
983
0
unsigned fastEmit_ISD_FCOS_MVT_f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
984
0
  if (RetVT.SimpleTy != MVT::f64)
985
0
    return 0;
986
0
  if ((!Subtarget->hasSSE2())) {
987
0
    return fastEmitInst_r(X86::COS_Fp64, &X86::RFP64RegClass, Op0, Op0IsKill);
988
0
  }
989
0
  return 0;
990
0
}
991
992
0
unsigned fastEmit_ISD_FCOS_MVT_f80_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
993
0
  if (RetVT.SimpleTy != MVT::f80)
994
0
    return 0;
995
0
  return fastEmitInst_r(X86::COS_Fp80, &X86::RFP80RegClass, Op0, Op0IsKill);
996
0
}
997
998
unsigned fastEmit_ISD_FCOS_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
999
  switch (VT.SimpleTy) {
1000
  case MVT::f32: return fastEmit_ISD_FCOS_MVT_f32_r(RetVT, Op0, Op0IsKill);
1001
  case MVT::f64: return fastEmit_ISD_FCOS_MVT_f64_r(RetVT, Op0, Op0IsKill);
1002
  case MVT::f80: return fastEmit_ISD_FCOS_MVT_f80_r(RetVT, Op0, Op0IsKill);
1003
  default: return 0;
1004
  }
1005
}
1006
1007
// FastEmit functions for ISD::FNEG.
1008
1009
1
unsigned fastEmit_ISD_FNEG_MVT_f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1010
1
  if (RetVT.SimpleTy != MVT::f32)
1011
0
    return 0;
1012
1
  if ((!Subtarget->hasSSE1())) {
1013
0
    return fastEmitInst_r(X86::CHS_Fp32, &X86::RFP32RegClass, Op0, Op0IsKill);
1014
0
  }
1015
1
  return 0;
1016
1
}
1017
1018
1
unsigned fastEmit_ISD_FNEG_MVT_f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1019
1
  if (RetVT.SimpleTy != MVT::f64)
1020
0
    return 0;
1021
1
  if ((!Subtarget->hasSSE2())) {
1022
0
    return fastEmitInst_r(X86::CHS_Fp64, &X86::RFP64RegClass, Op0, Op0IsKill);
1023
0
  }
1024
1
  return 0;
1025
1
}
1026
1027
0
unsigned fastEmit_ISD_FNEG_MVT_f80_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1028
0
  if (RetVT.SimpleTy != MVT::f80)
1029
0
    return 0;
1030
0
  return fastEmitInst_r(X86::CHS_Fp80, &X86::RFP80RegClass, Op0, Op0IsKill);
1031
0
}
1032
1033
42
unsigned fastEmit_ISD_FNEG_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
1034
42
  switch (VT.SimpleTy) {
1035
42
  
case MVT::f32: return fastEmit_ISD_FNEG_MVT_f32_r(RetVT, Op0, Op0IsKill)1
;
1036
42
  
case MVT::f64: return fastEmit_ISD_FNEG_MVT_f64_r(RetVT, Op0, Op0IsKill)1
;
1037
42
  
case MVT::f80: return fastEmit_ISD_FNEG_MVT_f80_r(RetVT, Op0, Op0IsKill)0
;
1038
42
  
default: return 040
;
1039
42
  }
1040
42
}
1041
1042
// FastEmit functions for ISD::FP_EXTEND.
1043
1044
0
unsigned fastEmit_ISD_FP_EXTEND_MVT_f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1045
0
  if (RetVT.SimpleTy != MVT::f64)
1046
0
    return 0;
1047
0
  if ((Subtarget->hasSSE2() && !Subtarget->hasAVX())) {
1048
0
    return fastEmitInst_r(X86::CVTSS2SDrr, &X86::FR64RegClass, Op0, Op0IsKill);
1049
0
  }
1050
0
  return 0;
1051
0
}
1052
1053
0
unsigned fastEmit_ISD_FP_EXTEND_MVT_v4f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1054
0
  if (RetVT.SimpleTy != MVT::v4f64)
1055
0
    return 0;
1056
0
  if ((Subtarget->hasVLX())) {
1057
0
    return fastEmitInst_r(X86::VCVTPS2PDZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
1058
0
  }
1059
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
1060
0
    return fastEmitInst_r(X86::VCVTPS2PDYrr, &X86::VR256RegClass, Op0, Op0IsKill);
1061
0
  }
1062
0
  return 0;
1063
0
}
1064
1065
0
unsigned fastEmit_ISD_FP_EXTEND_MVT_v8f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1066
0
  if (RetVT.SimpleTy != MVT::v8f64)
1067
0
    return 0;
1068
0
  if ((Subtarget->hasAVX512())) {
1069
0
    return fastEmitInst_r(X86::VCVTPS2PDZrr, &X86::VR512RegClass, Op0, Op0IsKill);
1070
0
  }
1071
0
  return 0;
1072
0
}
1073
1074
unsigned fastEmit_ISD_FP_EXTEND_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
1075
  switch (VT.SimpleTy) {
1076
  case MVT::f32: return fastEmit_ISD_FP_EXTEND_MVT_f32_r(RetVT, Op0, Op0IsKill);
1077
  case MVT::v4f32: return fastEmit_ISD_FP_EXTEND_MVT_v4f32_r(RetVT, Op0, Op0IsKill);
1078
  case MVT::v8f32: return fastEmit_ISD_FP_EXTEND_MVT_v8f32_r(RetVT, Op0, Op0IsKill);
1079
  default: return 0;
1080
  }
1081
}
1082
1083
// FastEmit functions for ISD::FP_ROUND.
1084
1085
0
unsigned fastEmit_ISD_FP_ROUND_MVT_f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1086
0
  if (RetVT.SimpleTy != MVT::f32)
1087
0
    return 0;
1088
0
  if ((Subtarget->hasSSE2() && !Subtarget->hasAVX())) {
1089
0
    return fastEmitInst_r(X86::CVTSD2SSrr, &X86::FR32RegClass, Op0, Op0IsKill);
1090
0
  }
1091
0
  return 0;
1092
0
}
1093
1094
0
unsigned fastEmit_ISD_FP_ROUND_MVT_v4f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1095
0
  if (RetVT.SimpleTy != MVT::v4f32)
1096
0
    return 0;
1097
0
  if ((Subtarget->hasVLX())) {
1098
0
    return fastEmitInst_r(X86::VCVTPD2PSZ256rr, &X86::VR128XRegClass, Op0, Op0IsKill);
1099
0
  }
1100
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
1101
0
    return fastEmitInst_r(X86::VCVTPD2PSYrr, &X86::VR128RegClass, Op0, Op0IsKill);
1102
0
  }
1103
0
  return 0;
1104
0
}
1105
1106
0
unsigned fastEmit_ISD_FP_ROUND_MVT_v8f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1107
0
  if (RetVT.SimpleTy != MVT::v8f32)
1108
0
    return 0;
1109
0
  if ((Subtarget->hasAVX512())) {
1110
0
    return fastEmitInst_r(X86::VCVTPD2PSZrr, &X86::VR256XRegClass, Op0, Op0IsKill);
1111
0
  }
1112
0
  return 0;
1113
0
}
1114
1115
unsigned fastEmit_ISD_FP_ROUND_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
1116
  switch (VT.SimpleTy) {
1117
  case MVT::f64: return fastEmit_ISD_FP_ROUND_MVT_f64_r(RetVT, Op0, Op0IsKill);
1118
  case MVT::v4f64: return fastEmit_ISD_FP_ROUND_MVT_v4f64_r(RetVT, Op0, Op0IsKill);
1119
  case MVT::v8f64: return fastEmit_ISD_FP_ROUND_MVT_v8f64_r(RetVT, Op0, Op0IsKill);
1120
  default: return 0;
1121
  }
1122
}
1123
1124
// FastEmit functions for ISD::FP_TO_SINT.
1125
1126
0
unsigned fastEmit_ISD_FP_TO_SINT_MVT_f32_MVT_i32_r(unsigned Op0, bool Op0IsKill) {
1127
0
  if ((Subtarget->hasAVX512())) {
1128
0
    return fastEmitInst_r(X86::VCVTTSS2SIZrr, &X86::GR32RegClass, Op0, Op0IsKill);
1129
0
  }
1130
0
  if ((Subtarget->hasSSE1() && !Subtarget->hasAVX())) {
1131
0
    return fastEmitInst_r(X86::CVTTSS2SIrr, &X86::GR32RegClass, Op0, Op0IsKill);
1132
0
  }
1133
0
  if ((Subtarget->hasAVX() && !Subtarget->hasAVX512())) {
1134
0
    return fastEmitInst_r(X86::VCVTTSS2SIrr, &X86::GR32RegClass, Op0, Op0IsKill);
1135
0
  }
1136
0
  return 0;
1137
0
}
1138
1139
0
unsigned fastEmit_ISD_FP_TO_SINT_MVT_f32_MVT_i64_r(unsigned Op0, bool Op0IsKill) {
1140
0
  if ((Subtarget->hasAVX512())) {
1141
0
    return fastEmitInst_r(X86::VCVTTSS2SI64Zrr, &X86::GR64RegClass, Op0, Op0IsKill);
1142
0
  }
1143
0
  if ((Subtarget->hasSSE1() && !Subtarget->hasAVX())) {
1144
0
    return fastEmitInst_r(X86::CVTTSS2SI64rr, &X86::GR64RegClass, Op0, Op0IsKill);
1145
0
  }
1146
0
  if ((Subtarget->hasAVX() && !Subtarget->hasAVX512())) {
1147
0
    return fastEmitInst_r(X86::VCVTTSS2SI64rr, &X86::GR64RegClass, Op0, Op0IsKill);
1148
0
  }
1149
0
  return 0;
1150
0
}
1151
1152
unsigned fastEmit_ISD_FP_TO_SINT_MVT_f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1153
switch (RetVT.SimpleTy) {
1154
  case MVT::i32: return fastEmit_ISD_FP_TO_SINT_MVT_f32_MVT_i32_r(Op0, Op0IsKill);
1155
  case MVT::i64: return fastEmit_ISD_FP_TO_SINT_MVT_f32_MVT_i64_r(Op0, Op0IsKill);
1156
  default: return 0;
1157
}
1158
}
1159
1160
0
unsigned fastEmit_ISD_FP_TO_SINT_MVT_f64_MVT_i32_r(unsigned Op0, bool Op0IsKill) {
1161
0
  if ((Subtarget->hasAVX512())) {
1162
0
    return fastEmitInst_r(X86::VCVTTSD2SIZrr, &X86::GR32RegClass, Op0, Op0IsKill);
1163
0
  }
1164
0
  if ((Subtarget->hasSSE2() && !Subtarget->hasAVX())) {
1165
0
    return fastEmitInst_r(X86::CVTTSD2SIrr, &X86::GR32RegClass, Op0, Op0IsKill);
1166
0
  }
1167
0
  if ((Subtarget->hasAVX() && !Subtarget->hasAVX512())) {
1168
0
    return fastEmitInst_r(X86::VCVTTSD2SIrr, &X86::GR32RegClass, Op0, Op0IsKill);
1169
0
  }
1170
0
  return 0;
1171
0
}
1172
1173
0
unsigned fastEmit_ISD_FP_TO_SINT_MVT_f64_MVT_i64_r(unsigned Op0, bool Op0IsKill) {
1174
0
  if ((Subtarget->hasAVX512())) {
1175
0
    return fastEmitInst_r(X86::VCVTTSD2SI64Zrr, &X86::GR64RegClass, Op0, Op0IsKill);
1176
0
  }
1177
0
  if ((Subtarget->hasSSE2() && !Subtarget->hasAVX())) {
1178
0
    return fastEmitInst_r(X86::CVTTSD2SI64rr, &X86::GR64RegClass, Op0, Op0IsKill);
1179
0
  }
1180
0
  if ((Subtarget->hasAVX() && !Subtarget->hasAVX512())) {
1181
0
    return fastEmitInst_r(X86::VCVTTSD2SI64rr, &X86::GR64RegClass, Op0, Op0IsKill);
1182
0
  }
1183
0
  return 0;
1184
0
}
1185
1186
unsigned fastEmit_ISD_FP_TO_SINT_MVT_f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1187
switch (RetVT.SimpleTy) {
1188
  case MVT::i32: return fastEmit_ISD_FP_TO_SINT_MVT_f64_MVT_i32_r(Op0, Op0IsKill);
1189
  case MVT::i64: return fastEmit_ISD_FP_TO_SINT_MVT_f64_MVT_i64_r(Op0, Op0IsKill);
1190
  default: return 0;
1191
}
1192
}
1193
1194
0
unsigned fastEmit_ISD_FP_TO_SINT_MVT_v4f32_MVT_v4i32_r(unsigned Op0, bool Op0IsKill) {
1195
0
  if ((Subtarget->hasVLX())) {
1196
0
    return fastEmitInst_r(X86::VCVTTPS2DQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
1197
0
  }
1198
0
  if ((Subtarget->hasSSE2() && !Subtarget->hasAVX())) {
1199
0
    return fastEmitInst_r(X86::CVTTPS2DQrr, &X86::VR128RegClass, Op0, Op0IsKill);
1200
0
  }
1201
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
1202
0
    return fastEmitInst_r(X86::VCVTTPS2DQrr, &X86::VR128RegClass, Op0, Op0IsKill);
1203
0
  }
1204
0
  return 0;
1205
0
}
1206
1207
0
unsigned fastEmit_ISD_FP_TO_SINT_MVT_v4f32_MVT_v4i64_r(unsigned Op0, bool Op0IsKill) {
1208
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
1209
0
    return fastEmitInst_r(X86::VCVTTPS2QQZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
1210
0
  }
1211
0
  return 0;
1212
0
}
1213
1214
unsigned fastEmit_ISD_FP_TO_SINT_MVT_v4f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1215
switch (RetVT.SimpleTy) {
1216
  case MVT::v4i32: return fastEmit_ISD_FP_TO_SINT_MVT_v4f32_MVT_v4i32_r(Op0, Op0IsKill);
1217
  case MVT::v4i64: return fastEmit_ISD_FP_TO_SINT_MVT_v4f32_MVT_v4i64_r(Op0, Op0IsKill);
1218
  default: return 0;
1219
}
1220
}
1221
1222
0
unsigned fastEmit_ISD_FP_TO_SINT_MVT_v8f32_MVT_v8i32_r(unsigned Op0, bool Op0IsKill) {
1223
0
  if ((Subtarget->hasVLX())) {
1224
0
    return fastEmitInst_r(X86::VCVTTPS2DQZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
1225
0
  }
1226
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
1227
0
    return fastEmitInst_r(X86::VCVTTPS2DQYrr, &X86::VR256RegClass, Op0, Op0IsKill);
1228
0
  }
1229
0
  return 0;
1230
0
}
1231
1232
0
unsigned fastEmit_ISD_FP_TO_SINT_MVT_v8f32_MVT_v8i64_r(unsigned Op0, bool Op0IsKill) {
1233
0
  if ((Subtarget->hasDQI())) {
1234
0
    return fastEmitInst_r(X86::VCVTTPS2QQZrr, &X86::VR512RegClass, Op0, Op0IsKill);
1235
0
  }
1236
0
  return 0;
1237
0
}
1238
1239
unsigned fastEmit_ISD_FP_TO_SINT_MVT_v8f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1240
switch (RetVT.SimpleTy) {
1241
  case MVT::v8i32: return fastEmit_ISD_FP_TO_SINT_MVT_v8f32_MVT_v8i32_r(Op0, Op0IsKill);
1242
  case MVT::v8i64: return fastEmit_ISD_FP_TO_SINT_MVT_v8f32_MVT_v8i64_r(Op0, Op0IsKill);
1243
  default: return 0;
1244
}
1245
}
1246
1247
0
unsigned fastEmit_ISD_FP_TO_SINT_MVT_v16f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1248
0
  if (RetVT.SimpleTy != MVT::v16i32)
1249
0
    return 0;
1250
0
  if ((Subtarget->hasAVX512())) {
1251
0
    return fastEmitInst_r(X86::VCVTTPS2DQZrr, &X86::VR512RegClass, Op0, Op0IsKill);
1252
0
  }
1253
0
  return 0;
1254
0
}
1255
1256
0
unsigned fastEmit_ISD_FP_TO_SINT_MVT_v2f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1257
0
  if (RetVT.SimpleTy != MVT::v2i64)
1258
0
    return 0;
1259
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
1260
0
    return fastEmitInst_r(X86::VCVTTPD2QQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
1261
0
  }
1262
0
  return 0;
1263
0
}
1264
1265
0
unsigned fastEmit_ISD_FP_TO_SINT_MVT_v4f64_MVT_v4i32_r(unsigned Op0, bool Op0IsKill) {
1266
0
  if ((Subtarget->hasVLX())) {
1267
0
    return fastEmitInst_r(X86::VCVTTPD2DQZ256rr, &X86::VR128XRegClass, Op0, Op0IsKill);
1268
0
  }
1269
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
1270
0
    return fastEmitInst_r(X86::VCVTTPD2DQYrr, &X86::VR128RegClass, Op0, Op0IsKill);
1271
0
  }
1272
0
  return 0;
1273
0
}
1274
1275
0
unsigned fastEmit_ISD_FP_TO_SINT_MVT_v4f64_MVT_v4i64_r(unsigned Op0, bool Op0IsKill) {
1276
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
1277
0
    return fastEmitInst_r(X86::VCVTTPD2QQZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
1278
0
  }
1279
0
  return 0;
1280
0
}
1281
1282
unsigned fastEmit_ISD_FP_TO_SINT_MVT_v4f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1283
switch (RetVT.SimpleTy) {
1284
  case MVT::v4i32: return fastEmit_ISD_FP_TO_SINT_MVT_v4f64_MVT_v4i32_r(Op0, Op0IsKill);
1285
  case MVT::v4i64: return fastEmit_ISD_FP_TO_SINT_MVT_v4f64_MVT_v4i64_r(Op0, Op0IsKill);
1286
  default: return 0;
1287
}
1288
}
1289
1290
0
unsigned fastEmit_ISD_FP_TO_SINT_MVT_v8f64_MVT_v8i32_r(unsigned Op0, bool Op0IsKill) {
1291
0
  if ((Subtarget->hasAVX512())) {
1292
0
    return fastEmitInst_r(X86::VCVTTPD2DQZrr, &X86::VR256XRegClass, Op0, Op0IsKill);
1293
0
  }
1294
0
  return 0;
1295
0
}
1296
1297
0
unsigned fastEmit_ISD_FP_TO_SINT_MVT_v8f64_MVT_v8i64_r(unsigned Op0, bool Op0IsKill) {
1298
0
  if ((Subtarget->hasDQI())) {
1299
0
    return fastEmitInst_r(X86::VCVTTPD2QQZrr, &X86::VR512RegClass, Op0, Op0IsKill);
1300
0
  }
1301
0
  return 0;
1302
0
}
1303
1304
unsigned fastEmit_ISD_FP_TO_SINT_MVT_v8f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1305
switch (RetVT.SimpleTy) {
1306
  case MVT::v8i32: return fastEmit_ISD_FP_TO_SINT_MVT_v8f64_MVT_v8i32_r(Op0, Op0IsKill);
1307
  case MVT::v8i64: return fastEmit_ISD_FP_TO_SINT_MVT_v8f64_MVT_v8i64_r(Op0, Op0IsKill);
1308
  default: return 0;
1309
}
1310
}
1311
1312
unsigned fastEmit_ISD_FP_TO_SINT_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
1313
  switch (VT.SimpleTy) {
1314
  case MVT::f32: return fastEmit_ISD_FP_TO_SINT_MVT_f32_r(RetVT, Op0, Op0IsKill);
1315
  case MVT::f64: return fastEmit_ISD_FP_TO_SINT_MVT_f64_r(RetVT, Op0, Op0IsKill);
1316
  case MVT::v4f32: return fastEmit_ISD_FP_TO_SINT_MVT_v4f32_r(RetVT, Op0, Op0IsKill);
1317
  case MVT::v8f32: return fastEmit_ISD_FP_TO_SINT_MVT_v8f32_r(RetVT, Op0, Op0IsKill);
1318
  case MVT::v16f32: return fastEmit_ISD_FP_TO_SINT_MVT_v16f32_r(RetVT, Op0, Op0IsKill);
1319
  case MVT::v2f64: return fastEmit_ISD_FP_TO_SINT_MVT_v2f64_r(RetVT, Op0, Op0IsKill);
1320
  case MVT::v4f64: return fastEmit_ISD_FP_TO_SINT_MVT_v4f64_r(RetVT, Op0, Op0IsKill);
1321
  case MVT::v8f64: return fastEmit_ISD_FP_TO_SINT_MVT_v8f64_r(RetVT, Op0, Op0IsKill);
1322
  default: return 0;
1323
  }
1324
}
1325
1326
// FastEmit functions for ISD::FP_TO_UINT.
1327
1328
0
unsigned fastEmit_ISD_FP_TO_UINT_MVT_f32_MVT_i32_r(unsigned Op0, bool Op0IsKill) {
1329
0
  if ((Subtarget->hasAVX512())) {
1330
0
    return fastEmitInst_r(X86::VCVTTSS2USIZrr, &X86::GR32RegClass, Op0, Op0IsKill);
1331
0
  }
1332
0
  return 0;
1333
0
}
1334
1335
0
unsigned fastEmit_ISD_FP_TO_UINT_MVT_f32_MVT_i64_r(unsigned Op0, bool Op0IsKill) {
1336
0
  if ((Subtarget->hasAVX512())) {
1337
0
    return fastEmitInst_r(X86::VCVTTSS2USI64Zrr, &X86::GR64RegClass, Op0, Op0IsKill);
1338
0
  }
1339
0
  return 0;
1340
0
}
1341
1342
unsigned fastEmit_ISD_FP_TO_UINT_MVT_f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1343
switch (RetVT.SimpleTy) {
1344
  case MVT::i32: return fastEmit_ISD_FP_TO_UINT_MVT_f32_MVT_i32_r(Op0, Op0IsKill);
1345
  case MVT::i64: return fastEmit_ISD_FP_TO_UINT_MVT_f32_MVT_i64_r(Op0, Op0IsKill);
1346
  default: return 0;
1347
}
1348
}
1349
1350
0
unsigned fastEmit_ISD_FP_TO_UINT_MVT_f64_MVT_i32_r(unsigned Op0, bool Op0IsKill) {
1351
0
  if ((Subtarget->hasAVX512())) {
1352
0
    return fastEmitInst_r(X86::VCVTTSD2USIZrr, &X86::GR32RegClass, Op0, Op0IsKill);
1353
0
  }
1354
0
  return 0;
1355
0
}
1356
1357
0
unsigned fastEmit_ISD_FP_TO_UINT_MVT_f64_MVT_i64_r(unsigned Op0, bool Op0IsKill) {
1358
0
  if ((Subtarget->hasAVX512())) {
1359
0
    return fastEmitInst_r(X86::VCVTTSD2USI64Zrr, &X86::GR64RegClass, Op0, Op0IsKill);
1360
0
  }
1361
0
  return 0;
1362
0
}
1363
1364
unsigned fastEmit_ISD_FP_TO_UINT_MVT_f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1365
switch (RetVT.SimpleTy) {
1366
  case MVT::i32: return fastEmit_ISD_FP_TO_UINT_MVT_f64_MVT_i32_r(Op0, Op0IsKill);
1367
  case MVT::i64: return fastEmit_ISD_FP_TO_UINT_MVT_f64_MVT_i64_r(Op0, Op0IsKill);
1368
  default: return 0;
1369
}
1370
}
1371
1372
0
unsigned fastEmit_ISD_FP_TO_UINT_MVT_v4f32_MVT_v4i32_r(unsigned Op0, bool Op0IsKill) {
1373
0
  if ((Subtarget->hasVLX())) {
1374
0
    return fastEmitInst_r(X86::VCVTTPS2UDQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
1375
0
  }
1376
0
  return 0;
1377
0
}
1378
1379
0
unsigned fastEmit_ISD_FP_TO_UINT_MVT_v4f32_MVT_v4i64_r(unsigned Op0, bool Op0IsKill) {
1380
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
1381
0
    return fastEmitInst_r(X86::VCVTTPS2UQQZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
1382
0
  }
1383
0
  return 0;
1384
0
}
1385
1386
unsigned fastEmit_ISD_FP_TO_UINT_MVT_v4f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1387
switch (RetVT.SimpleTy) {
1388
  case MVT::v4i32: return fastEmit_ISD_FP_TO_UINT_MVT_v4f32_MVT_v4i32_r(Op0, Op0IsKill);
1389
  case MVT::v4i64: return fastEmit_ISD_FP_TO_UINT_MVT_v4f32_MVT_v4i64_r(Op0, Op0IsKill);
1390
  default: return 0;
1391
}
1392
}
1393
1394
0
unsigned fastEmit_ISD_FP_TO_UINT_MVT_v8f32_MVT_v8i32_r(unsigned Op0, bool Op0IsKill) {
1395
0
  if ((Subtarget->hasVLX())) {
1396
0
    return fastEmitInst_r(X86::VCVTTPS2UDQZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
1397
0
  }
1398
0
  return 0;
1399
0
}
1400
1401
0
unsigned fastEmit_ISD_FP_TO_UINT_MVT_v8f32_MVT_v8i64_r(unsigned Op0, bool Op0IsKill) {
1402
0
  if ((Subtarget->hasDQI())) {
1403
0
    return fastEmitInst_r(X86::VCVTTPS2UQQZrr, &X86::VR512RegClass, Op0, Op0IsKill);
1404
0
  }
1405
0
  return 0;
1406
0
}
1407
1408
unsigned fastEmit_ISD_FP_TO_UINT_MVT_v8f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1409
switch (RetVT.SimpleTy) {
1410
  case MVT::v8i32: return fastEmit_ISD_FP_TO_UINT_MVT_v8f32_MVT_v8i32_r(Op0, Op0IsKill);
1411
  case MVT::v8i64: return fastEmit_ISD_FP_TO_UINT_MVT_v8f32_MVT_v8i64_r(Op0, Op0IsKill);
1412
  default: return 0;
1413
}
1414
}
1415
1416
0
unsigned fastEmit_ISD_FP_TO_UINT_MVT_v16f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1417
0
  if (RetVT.SimpleTy != MVT::v16i32)
1418
0
    return 0;
1419
0
  if ((Subtarget->hasAVX512())) {
1420
0
    return fastEmitInst_r(X86::VCVTTPS2UDQZrr, &X86::VR512RegClass, Op0, Op0IsKill);
1421
0
  }
1422
0
  return 0;
1423
0
}
1424
1425
0
unsigned fastEmit_ISD_FP_TO_UINT_MVT_v2f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1426
0
  if (RetVT.SimpleTy != MVT::v2i64)
1427
0
    return 0;
1428
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
1429
0
    return fastEmitInst_r(X86::VCVTTPD2UQQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
1430
0
  }
1431
0
  return 0;
1432
0
}
1433
1434
0
unsigned fastEmit_ISD_FP_TO_UINT_MVT_v4f64_MVT_v4i32_r(unsigned Op0, bool Op0IsKill) {
1435
0
  if ((Subtarget->hasVLX())) {
1436
0
    return fastEmitInst_r(X86::VCVTTPD2UDQZ256rr, &X86::VR128XRegClass, Op0, Op0IsKill);
1437
0
  }
1438
0
  return 0;
1439
0
}
1440
1441
0
unsigned fastEmit_ISD_FP_TO_UINT_MVT_v4f64_MVT_v4i64_r(unsigned Op0, bool Op0IsKill) {
1442
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
1443
0
    return fastEmitInst_r(X86::VCVTTPD2UQQZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
1444
0
  }
1445
0
  return 0;
1446
0
}
1447
1448
unsigned fastEmit_ISD_FP_TO_UINT_MVT_v4f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1449
switch (RetVT.SimpleTy) {
1450
  case MVT::v4i32: return fastEmit_ISD_FP_TO_UINT_MVT_v4f64_MVT_v4i32_r(Op0, Op0IsKill);
1451
  case MVT::v4i64: return fastEmit_ISD_FP_TO_UINT_MVT_v4f64_MVT_v4i64_r(Op0, Op0IsKill);
1452
  default: return 0;
1453
}
1454
}
1455
1456
0
unsigned fastEmit_ISD_FP_TO_UINT_MVT_v8f64_MVT_v8i32_r(unsigned Op0, bool Op0IsKill) {
1457
0
  if ((Subtarget->hasAVX512())) {
1458
0
    return fastEmitInst_r(X86::VCVTTPD2UDQZrr, &X86::VR256XRegClass, Op0, Op0IsKill);
1459
0
  }
1460
0
  return 0;
1461
0
}
1462
1463
0
unsigned fastEmit_ISD_FP_TO_UINT_MVT_v8f64_MVT_v8i64_r(unsigned Op0, bool Op0IsKill) {
1464
0
  if ((Subtarget->hasDQI())) {
1465
0
    return fastEmitInst_r(X86::VCVTTPD2UQQZrr, &X86::VR512RegClass, Op0, Op0IsKill);
1466
0
  }
1467
0
  return 0;
1468
0
}
1469
1470
unsigned fastEmit_ISD_FP_TO_UINT_MVT_v8f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1471
switch (RetVT.SimpleTy) {
1472
  case MVT::v8i32: return fastEmit_ISD_FP_TO_UINT_MVT_v8f64_MVT_v8i32_r(Op0, Op0IsKill);
1473
  case MVT::v8i64: return fastEmit_ISD_FP_TO_UINT_MVT_v8f64_MVT_v8i64_r(Op0, Op0IsKill);
1474
  default: return 0;
1475
}
1476
}
1477
1478
unsigned fastEmit_ISD_FP_TO_UINT_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
1479
  switch (VT.SimpleTy) {
1480
  case MVT::f32: return fastEmit_ISD_FP_TO_UINT_MVT_f32_r(RetVT, Op0, Op0IsKill);
1481
  case MVT::f64: return fastEmit_ISD_FP_TO_UINT_MVT_f64_r(RetVT, Op0, Op0IsKill);
1482
  case MVT::v4f32: return fastEmit_ISD_FP_TO_UINT_MVT_v4f32_r(RetVT, Op0, Op0IsKill);
1483
  case MVT::v8f32: return fastEmit_ISD_FP_TO_UINT_MVT_v8f32_r(RetVT, Op0, Op0IsKill);
1484
  case MVT::v16f32: return fastEmit_ISD_FP_TO_UINT_MVT_v16f32_r(RetVT, Op0, Op0IsKill);
1485
  case MVT::v2f64: return fastEmit_ISD_FP_TO_UINT_MVT_v2f64_r(RetVT, Op0, Op0IsKill);
1486
  case MVT::v4f64: return fastEmit_ISD_FP_TO_UINT_MVT_v4f64_r(RetVT, Op0, Op0IsKill);
1487
  case MVT::v8f64: return fastEmit_ISD_FP_TO_UINT_MVT_v8f64_r(RetVT, Op0, Op0IsKill);
1488
  default: return 0;
1489
  }
1490
}
1491
1492
// FastEmit functions for ISD::FSIN.
1493
1494
0
unsigned fastEmit_ISD_FSIN_MVT_f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1495
0
  if (RetVT.SimpleTy != MVT::f32)
1496
0
    return 0;
1497
0
  if ((!Subtarget->hasSSE1())) {
1498
0
    return fastEmitInst_r(X86::SIN_Fp32, &X86::RFP32RegClass, Op0, Op0IsKill);
1499
0
  }
1500
0
  return 0;
1501
0
}
1502
1503
0
unsigned fastEmit_ISD_FSIN_MVT_f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1504
0
  if (RetVT.SimpleTy != MVT::f64)
1505
0
    return 0;
1506
0
  if ((!Subtarget->hasSSE2())) {
1507
0
    return fastEmitInst_r(X86::SIN_Fp64, &X86::RFP64RegClass, Op0, Op0IsKill);
1508
0
  }
1509
0
  return 0;
1510
0
}
1511
1512
0
unsigned fastEmit_ISD_FSIN_MVT_f80_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1513
0
  if (RetVT.SimpleTy != MVT::f80)
1514
0
    return 0;
1515
0
  return fastEmitInst_r(X86::SIN_Fp80, &X86::RFP80RegClass, Op0, Op0IsKill);
1516
0
}
1517
1518
unsigned fastEmit_ISD_FSIN_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
1519
  switch (VT.SimpleTy) {
1520
  case MVT::f32: return fastEmit_ISD_FSIN_MVT_f32_r(RetVT, Op0, Op0IsKill);
1521
  case MVT::f64: return fastEmit_ISD_FSIN_MVT_f64_r(RetVT, Op0, Op0IsKill);
1522
  case MVT::f80: return fastEmit_ISD_FSIN_MVT_f80_r(RetVT, Op0, Op0IsKill);
1523
  default: return 0;
1524
  }
1525
}
1526
1527
// FastEmit functions for ISD::FSQRT.
1528
1529
0
unsigned fastEmit_ISD_FSQRT_MVT_f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1530
0
  if (RetVT.SimpleTy != MVT::f32)
1531
0
    return 0;
1532
0
  if ((Subtarget->hasSSE1() && !Subtarget->hasAVX())) {
1533
0
    return fastEmitInst_r(X86::SQRTSSr, &X86::FR32RegClass, Op0, Op0IsKill);
1534
0
  }
1535
0
  if ((!Subtarget->hasSSE1())) {
1536
0
    return fastEmitInst_r(X86::SQRT_Fp32, &X86::RFP32RegClass, Op0, Op0IsKill);
1537
0
  }
1538
0
  return 0;
1539
0
}
1540
1541
0
unsigned fastEmit_ISD_FSQRT_MVT_f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1542
0
  if (RetVT.SimpleTy != MVT::f64)
1543
0
    return 0;
1544
0
  if ((Subtarget->hasSSE2() && !Subtarget->hasAVX())) {
1545
0
    return fastEmitInst_r(X86::SQRTSDr, &X86::FR64RegClass, Op0, Op0IsKill);
1546
0
  }
1547
0
  if ((!Subtarget->hasSSE2())) {
1548
0
    return fastEmitInst_r(X86::SQRT_Fp64, &X86::RFP64RegClass, Op0, Op0IsKill);
1549
0
  }
1550
0
  return 0;
1551
0
}
1552
1553
0
unsigned fastEmit_ISD_FSQRT_MVT_f80_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1554
0
  if (RetVT.SimpleTy != MVT::f80)
1555
0
    return 0;
1556
0
  return fastEmitInst_r(X86::SQRT_Fp80, &X86::RFP80RegClass, Op0, Op0IsKill);
1557
0
}
1558
1559
0
unsigned fastEmit_ISD_FSQRT_MVT_v4f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1560
0
  if (RetVT.SimpleTy != MVT::v4f32)
1561
0
    return 0;
1562
0
  if ((Subtarget->hasVLX())) {
1563
0
    return fastEmitInst_r(X86::VSQRTPSZ128r, &X86::VR128XRegClass, Op0, Op0IsKill);
1564
0
  }
1565
0
  if ((Subtarget->hasSSE1() && !Subtarget->hasAVX())) {
1566
0
    return fastEmitInst_r(X86::SQRTPSr, &X86::VR128RegClass, Op0, Op0IsKill);
1567
0
  }
1568
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
1569
0
    return fastEmitInst_r(X86::VSQRTPSr, &X86::VR128RegClass, Op0, Op0IsKill);
1570
0
  }
1571
0
  return 0;
1572
0
}
1573
1574
0
unsigned fastEmit_ISD_FSQRT_MVT_v8f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1575
0
  if (RetVT.SimpleTy != MVT::v8f32)
1576
0
    return 0;
1577
0
  if ((Subtarget->hasVLX())) {
1578
0
    return fastEmitInst_r(X86::VSQRTPSZ256r, &X86::VR256XRegClass, Op0, Op0IsKill);
1579
0
  }
1580
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
1581
0
    return fastEmitInst_r(X86::VSQRTPSYr, &X86::VR256RegClass, Op0, Op0IsKill);
1582
0
  }
1583
0
  return 0;
1584
0
}
1585
1586
0
unsigned fastEmit_ISD_FSQRT_MVT_v16f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1587
0
  if (RetVT.SimpleTy != MVT::v16f32)
1588
0
    return 0;
1589
0
  if ((Subtarget->hasAVX512())) {
1590
0
    return fastEmitInst_r(X86::VSQRTPSZr, &X86::VR512RegClass, Op0, Op0IsKill);
1591
0
  }
1592
0
  return 0;
1593
0
}
1594
1595
0
unsigned fastEmit_ISD_FSQRT_MVT_v2f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1596
0
  if (RetVT.SimpleTy != MVT::v2f64)
1597
0
    return 0;
1598
0
  if ((Subtarget->hasVLX())) {
1599
0
    return fastEmitInst_r(X86::VSQRTPDZ128r, &X86::VR128XRegClass, Op0, Op0IsKill);
1600
0
  }
1601
0
  if ((Subtarget->hasSSE2() && !Subtarget->hasAVX())) {
1602
0
    return fastEmitInst_r(X86::SQRTPDr, &X86::VR128RegClass, Op0, Op0IsKill);
1603
0
  }
1604
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
1605
0
    return fastEmitInst_r(X86::VSQRTPDr, &X86::VR128RegClass, Op0, Op0IsKill);
1606
0
  }
1607
0
  return 0;
1608
0
}
1609
1610
0
unsigned fastEmit_ISD_FSQRT_MVT_v4f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1611
0
  if (RetVT.SimpleTy != MVT::v4f64)
1612
0
    return 0;
1613
0
  if ((Subtarget->hasVLX())) {
1614
0
    return fastEmitInst_r(X86::VSQRTPDZ256r, &X86::VR256XRegClass, Op0, Op0IsKill);
1615
0
  }
1616
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
1617
0
    return fastEmitInst_r(X86::VSQRTPDYr, &X86::VR256RegClass, Op0, Op0IsKill);
1618
0
  }
1619
0
  return 0;
1620
0
}
1621
1622
0
unsigned fastEmit_ISD_FSQRT_MVT_v8f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1623
0
  if (RetVT.SimpleTy != MVT::v8f64)
1624
0
    return 0;
1625
0
  if ((Subtarget->hasAVX512())) {
1626
0
    return fastEmitInst_r(X86::VSQRTPDZr, &X86::VR512RegClass, Op0, Op0IsKill);
1627
0
  }
1628
0
  return 0;
1629
0
}
1630
1631
unsigned fastEmit_ISD_FSQRT_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
1632
  switch (VT.SimpleTy) {
1633
  case MVT::f32: return fastEmit_ISD_FSQRT_MVT_f32_r(RetVT, Op0, Op0IsKill);
1634
  case MVT::f64: return fastEmit_ISD_FSQRT_MVT_f64_r(RetVT, Op0, Op0IsKill);
1635
  case MVT::f80: return fastEmit_ISD_FSQRT_MVT_f80_r(RetVT, Op0, Op0IsKill);
1636
  case MVT::v4f32: return fastEmit_ISD_FSQRT_MVT_v4f32_r(RetVT, Op0, Op0IsKill);
1637
  case MVT::v8f32: return fastEmit_ISD_FSQRT_MVT_v8f32_r(RetVT, Op0, Op0IsKill);
1638
  case MVT::v16f32: return fastEmit_ISD_FSQRT_MVT_v16f32_r(RetVT, Op0, Op0IsKill);
1639
  case MVT::v2f64: return fastEmit_ISD_FSQRT_MVT_v2f64_r(RetVT, Op0, Op0IsKill);
1640
  case MVT::v4f64: return fastEmit_ISD_FSQRT_MVT_v4f64_r(RetVT, Op0, Op0IsKill);
1641
  case MVT::v8f64: return fastEmit_ISD_FSQRT_MVT_v8f64_r(RetVT, Op0, Op0IsKill);
1642
  default: return 0;
1643
  }
1644
}
1645
1646
// FastEmit functions for ISD::SCALAR_TO_VECTOR.
1647
1648
1
unsigned fastEmit_ISD_SCALAR_TO_VECTOR_MVT_i32_MVT_v4i32_r(unsigned Op0, bool Op0IsKill) {
1649
1
  if ((Subtarget->hasAVX512())) {
1650
0
    return fastEmitInst_r(X86::VMOVDI2PDIZrr, &X86::VR128XRegClass, Op0, Op0IsKill);
1651
0
  }
1652
1
  if ((Subtarget->hasSSE2() && !Subtarget->hasAVX())) {
1653
0
    return fastEmitInst_r(X86::MOVDI2PDIrr, &X86::VR128RegClass, Op0, Op0IsKill);
1654
0
  }
1655
1
  if ((Subtarget->hasAVX() && !Subtarget->hasAVX512())) {
1656
1
    return fastEmitInst_r(X86::VMOVDI2PDIrr, &X86::VR128RegClass, Op0, Op0IsKill);
1657
1
  }
1658
0
  return 0;
1659
0
}
1660
1661
0
unsigned fastEmit_ISD_SCALAR_TO_VECTOR_MVT_i32_MVT_x86mmx_r(unsigned Op0, bool Op0IsKill) {
1662
0
  if ((Subtarget->hasMMX())) {
1663
0
    return fastEmitInst_r(X86::MMX_MOVD64rr, &X86::VR64RegClass, Op0, Op0IsKill);
1664
0
  }
1665
0
  return 0;
1666
0
}
1667
1668
1
unsigned fastEmit_ISD_SCALAR_TO_VECTOR_MVT_i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1669
1
switch (RetVT.SimpleTy) {
1670
1
  case MVT::v4i32: return fastEmit_ISD_SCALAR_TO_VECTOR_MVT_i32_MVT_v4i32_r(Op0, Op0IsKill);
1671
1
  
case MVT::x86mmx: return fastEmit_ISD_SCALAR_TO_VECTOR_MVT_i32_MVT_x86mmx_r(Op0, Op0IsKill)0
;
1672
1
  
default: return 00
;
1673
1
}
1674
1
}
1675
1676
0
unsigned fastEmit_ISD_SCALAR_TO_VECTOR_MVT_i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1677
0
  if (RetVT.SimpleTy != MVT::v2i64)
1678
0
    return 0;
1679
0
  if ((Subtarget->hasAVX512())) {
1680
0
    return fastEmitInst_r(X86::VMOV64toPQIZrr, &X86::VR128XRegClass, Op0, Op0IsKill);
1681
0
  }
1682
0
  if ((Subtarget->hasSSE2() && !Subtarget->hasAVX())) {
1683
0
    return fastEmitInst_r(X86::MOV64toPQIrr, &X86::VR128RegClass, Op0, Op0IsKill);
1684
0
  }
1685
0
  if ((Subtarget->hasAVX() && !Subtarget->hasAVX512())) {
1686
0
    return fastEmitInst_r(X86::VMOV64toPQIrr, &X86::VR128RegClass, Op0, Op0IsKill);
1687
0
  }
1688
0
  return 0;
1689
0
}
1690
1691
1
unsigned fastEmit_ISD_SCALAR_TO_VECTOR_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
1692
1
  switch (VT.SimpleTy) {
1693
1
  case MVT::i32: return fastEmit_ISD_SCALAR_TO_VECTOR_MVT_i32_r(RetVT, Op0, Op0IsKill);
1694
1
  
case MVT::i64: return fastEmit_ISD_SCALAR_TO_VECTOR_MVT_i64_r(RetVT, Op0, Op0IsKill)0
;
1695
1
  
default: return 00
;
1696
1
  }
1697
1
}
1698
1699
// FastEmit functions for ISD::SIGN_EXTEND.
1700
1701
42
unsigned fastEmit_ISD_SIGN_EXTEND_MVT_i8_MVT_i32_r(unsigned Op0, bool Op0IsKill) {
1702
42
  return fastEmitInst_r(X86::MOVSX32rr8, &X86::GR32RegClass, Op0, Op0IsKill);
1703
42
}
1704
1705
3
unsigned fastEmit_ISD_SIGN_EXTEND_MVT_i8_MVT_i64_r(unsigned Op0, bool Op0IsKill) {
1706
3
  return fastEmitInst_r(X86::MOVSX64rr8, &X86::GR64RegClass, Op0, Op0IsKill);
1707
3
}
1708
1709
48
unsigned fastEmit_ISD_SIGN_EXTEND_MVT_i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1710
48
switch (RetVT.SimpleTy) {
1711
48
  
case MVT::i32: return fastEmit_ISD_SIGN_EXTEND_MVT_i8_MVT_i32_r(Op0, Op0IsKill)42
;
1712
48
  
case MVT::i64: return fastEmit_ISD_SIGN_EXTEND_MVT_i8_MVT_i64_r(Op0, Op0IsKill)3
;
1713
48
  
default: return 03
;
1714
48
}
1715
48
}
1716
1717
9
unsigned fastEmit_ISD_SIGN_EXTEND_MVT_i16_MVT_i32_r(unsigned Op0, bool Op0IsKill) {
1718
9
  return fastEmitInst_r(X86::MOVSX32rr16, &X86::GR32RegClass, Op0, Op0IsKill);
1719
9
}
1720
1721
1
unsigned fastEmit_ISD_SIGN_EXTEND_MVT_i16_MVT_i64_r(unsigned Op0, bool Op0IsKill) {
1722
1
  return fastEmitInst_r(X86::MOVSX64rr16, &X86::GR64RegClass, Op0, Op0IsKill);
1723
1
}
1724
1725
10
unsigned fastEmit_ISD_SIGN_EXTEND_MVT_i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1726
10
switch (RetVT.SimpleTy) {
1727
10
  
case MVT::i32: return fastEmit_ISD_SIGN_EXTEND_MVT_i16_MVT_i32_r(Op0, Op0IsKill)9
;
1728
10
  
case MVT::i64: return fastEmit_ISD_SIGN_EXTEND_MVT_i16_MVT_i64_r(Op0, Op0IsKill)1
;
1729
10
  
default: return 00
;
1730
10
}
1731
10
}
1732
1733
59
unsigned fastEmit_ISD_SIGN_EXTEND_MVT_i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1734
59
  if (RetVT.SimpleTy != MVT::i64)
1735
0
    return 0;
1736
59
  if ((Subtarget->is64Bit())) {
1737
59
    return fastEmitInst_r(X86::MOVSX64rr32, &X86::GR64RegClass, Op0, Op0IsKill);
1738
59
  }
1739
0
  return 0;
1740
0
}
1741
1742
28
unsigned fastEmit_ISD_SIGN_EXTEND_MVT_v2i1_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1743
28
  if (RetVT.SimpleTy != MVT::v2i64)
1744
0
    return 0;
1745
28
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
1746
28
    return fastEmitInst_r(X86::VPMOVM2QZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
1747
28
  }
1748
0
  return 0;
1749
0
}
1750
1751
30
unsigned fastEmit_ISD_SIGN_EXTEND_MVT_v4i1_MVT_v4i32_r(unsigned Op0, bool Op0IsKill) {
1752
30
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
1753
30
    return fastEmitInst_r(X86::VPMOVM2DZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
1754
30
  }
1755
0
  return 0;
1756
0
}
1757
1758
0
unsigned fastEmit_ISD_SIGN_EXTEND_MVT_v4i1_MVT_v4i64_r(unsigned Op0, bool Op0IsKill) {
1759
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
1760
0
    return fastEmitInst_r(X86::VPMOVM2QZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
1761
0
  }
1762
0
  return 0;
1763
0
}
1764
1765
30
unsigned fastEmit_ISD_SIGN_EXTEND_MVT_v4i1_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1766
30
switch (RetVT.SimpleTy) {
1767
30
  case MVT::v4i32: return fastEmit_ISD_SIGN_EXTEND_MVT_v4i1_MVT_v4i32_r(Op0, Op0IsKill);
1768
30
  
case MVT::v4i64: return fastEmit_ISD_SIGN_EXTEND_MVT_v4i1_MVT_v4i64_r(Op0, Op0IsKill)0
;
1769
30
  
default: return 00
;
1770
30
}
1771
30
}
1772
1773
6
unsigned fastEmit_ISD_SIGN_EXTEND_MVT_v8i1_MVT_v8i16_r(unsigned Op0, bool Op0IsKill) {
1774
6
  if ((Subtarget->hasBWI()) && (Subtarget->hasVLX())) {
1775
6
    return fastEmitInst_r(X86::VPMOVM2WZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
1776
6
  }
1777
0
  return 0;
1778
0
}
1779
1780
0
unsigned fastEmit_ISD_SIGN_EXTEND_MVT_v8i1_MVT_v8i32_r(unsigned Op0, bool Op0IsKill) {
1781
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
1782
0
    return fastEmitInst_r(X86::VPMOVM2DZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
1783
0
  }
1784
0
  return 0;
1785
0
}
1786
1787
0
unsigned fastEmit_ISD_SIGN_EXTEND_MVT_v8i1_MVT_v8i64_r(unsigned Op0, bool Op0IsKill) {
1788
0
  if ((Subtarget->hasDQI())) {
1789
0
    return fastEmitInst_r(X86::VPMOVM2QZrr, &X86::VR512RegClass, Op0, Op0IsKill);
1790
0
  }
1791
0
  return 0;
1792
0
}
1793
1794
6
unsigned fastEmit_ISD_SIGN_EXTEND_MVT_v8i1_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1795
6
switch (RetVT.SimpleTy) {
1796
6
  case MVT::v8i16: return fastEmit_ISD_SIGN_EXTEND_MVT_v8i1_MVT_v8i16_r(Op0, Op0IsKill);
1797
6
  
case MVT::v8i32: return fastEmit_ISD_SIGN_EXTEND_MVT_v8i1_MVT_v8i32_r(Op0, Op0IsKill)0
;
1798
6
  
case MVT::v8i64: return fastEmit_ISD_SIGN_EXTEND_MVT_v8i1_MVT_v8i64_r(Op0, Op0IsKill)0
;
1799
6
  
default: return 00
;
1800
6
}
1801
6
}
1802
1803
6
unsigned fastEmit_ISD_SIGN_EXTEND_MVT_v16i1_MVT_v16i8_r(unsigned Op0, bool Op0IsKill) {
1804
6
  if ((Subtarget->hasBWI()) && (Subtarget->hasVLX())) {
1805
6
    return fastEmitInst_r(X86::VPMOVM2BZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
1806
6
  }
1807
0
  return 0;
1808
0
}
1809
1810
0
unsigned fastEmit_ISD_SIGN_EXTEND_MVT_v16i1_MVT_v16i16_r(unsigned Op0, bool Op0IsKill) {
1811
0
  if ((Subtarget->hasBWI()) && (Subtarget->hasVLX())) {
1812
0
    return fastEmitInst_r(X86::VPMOVM2WZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
1813
0
  }
1814
0
  return 0;
1815
0
}
1816
1817
0
unsigned fastEmit_ISD_SIGN_EXTEND_MVT_v16i1_MVT_v16i32_r(unsigned Op0, bool Op0IsKill) {
1818
0
  if ((Subtarget->hasDQI())) {
1819
0
    return fastEmitInst_r(X86::VPMOVM2DZrr, &X86::VR512RegClass, Op0, Op0IsKill);
1820
0
  }
1821
0
  return 0;
1822
0
}
1823
1824
6
unsigned fastEmit_ISD_SIGN_EXTEND_MVT_v16i1_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1825
6
switch (RetVT.SimpleTy) {
1826
6
  case MVT::v16i8: return fastEmit_ISD_SIGN_EXTEND_MVT_v16i1_MVT_v16i8_r(Op0, Op0IsKill);
1827
6
  
case MVT::v16i16: return fastEmit_ISD_SIGN_EXTEND_MVT_v16i1_MVT_v16i16_r(Op0, Op0IsKill)0
;
1828
6
  
case MVT::v16i32: return fastEmit_ISD_SIGN_EXTEND_MVT_v16i1_MVT_v16i32_r(Op0, Op0IsKill)0
;
1829
6
  
default: return 00
;
1830
6
}
1831
6
}
1832
1833
0
unsigned fastEmit_ISD_SIGN_EXTEND_MVT_v32i1_MVT_v32i8_r(unsigned Op0, bool Op0IsKill) {
1834
0
  if ((Subtarget->hasBWI()) && (Subtarget->hasVLX())) {
1835
0
    return fastEmitInst_r(X86::VPMOVM2BZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
1836
0
  }
1837
0
  return 0;
1838
0
}
1839
1840
0
unsigned fastEmit_ISD_SIGN_EXTEND_MVT_v32i1_MVT_v32i16_r(unsigned Op0, bool Op0IsKill) {
1841
0
  if ((Subtarget->hasBWI())) {
1842
0
    return fastEmitInst_r(X86::VPMOVM2WZrr, &X86::VR512RegClass, Op0, Op0IsKill);
1843
0
  }
1844
0
  return 0;
1845
0
}
1846
1847
unsigned fastEmit_ISD_SIGN_EXTEND_MVT_v32i1_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1848
switch (RetVT.SimpleTy) {
1849
  case MVT::v32i8: return fastEmit_ISD_SIGN_EXTEND_MVT_v32i1_MVT_v32i8_r(Op0, Op0IsKill);
1850
  case MVT::v32i16: return fastEmit_ISD_SIGN_EXTEND_MVT_v32i1_MVT_v32i16_r(Op0, Op0IsKill);
1851
  default: return 0;
1852
}
1853
}
1854
1855
0
unsigned fastEmit_ISD_SIGN_EXTEND_MVT_v64i1_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1856
0
  if (RetVT.SimpleTy != MVT::v64i8)
1857
0
    return 0;
1858
0
  if ((Subtarget->hasBWI())) {
1859
0
    return fastEmitInst_r(X86::VPMOVM2BZrr, &X86::VR512RegClass, Op0, Op0IsKill);
1860
0
  }
1861
0
  return 0;
1862
0
}
1863
1864
2
unsigned fastEmit_ISD_SIGN_EXTEND_MVT_v16i8_MVT_v16i16_r(unsigned Op0, bool Op0IsKill) {
1865
2
  if ((Subtarget->hasAVX2()) && (!Subtarget->hasVLX() || 
!Subtarget->hasBWI()0
)) {
1866
2
    return fastEmitInst_r(X86::VPMOVSXBWYrr, &X86::VR256RegClass, Op0, Op0IsKill);
1867
2
  }
1868
0
  if ((Subtarget->hasBWI()) && (Subtarget->hasVLX())) {
1869
0
    return fastEmitInst_r(X86::VPMOVSXBWZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
1870
0
  }
1871
0
  return 0;
1872
0
}
1873
1874
0
unsigned fastEmit_ISD_SIGN_EXTEND_MVT_v16i8_MVT_v16i32_r(unsigned Op0, bool Op0IsKill) {
1875
0
  if ((Subtarget->hasAVX512())) {
1876
0
    return fastEmitInst_r(X86::VPMOVSXBDZrr, &X86::VR512RegClass, Op0, Op0IsKill);
1877
0
  }
1878
0
  return 0;
1879
0
}
1880
1881
2
unsigned fastEmit_ISD_SIGN_EXTEND_MVT_v16i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1882
2
switch (RetVT.SimpleTy) {
1883
2
  case MVT::v16i16: return fastEmit_ISD_SIGN_EXTEND_MVT_v16i8_MVT_v16i16_r(Op0, Op0IsKill);
1884
2
  
case MVT::v16i32: return fastEmit_ISD_SIGN_EXTEND_MVT_v16i8_MVT_v16i32_r(Op0, Op0IsKill)0
;
1885
2
  
default: return 00
;
1886
2
}
1887
2
}
1888
1889
0
unsigned fastEmit_ISD_SIGN_EXTEND_MVT_v32i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1890
0
  if (RetVT.SimpleTy != MVT::v32i16)
1891
0
    return 0;
1892
0
  if ((Subtarget->hasBWI())) {
1893
0
    return fastEmitInst_r(X86::VPMOVSXBWZrr, &X86::VR512RegClass, Op0, Op0IsKill);
1894
0
  }
1895
0
  return 0;
1896
0
}
1897
1898
3
unsigned fastEmit_ISD_SIGN_EXTEND_MVT_v8i16_MVT_v8i32_r(unsigned Op0, bool Op0IsKill) {
1899
3
  if ((Subtarget->hasAVX2()) && 
(!Subtarget->hasVLX())2
) {
1900
2
    return fastEmitInst_r(X86::VPMOVSXWDYrr, &X86::VR256RegClass, Op0, Op0IsKill);
1901
2
  }
1902
1
  if ((Subtarget->hasAVX512()) && 
(Subtarget->hasVLX())0
) {
1903
0
    return fastEmitInst_r(X86::VPMOVSXWDZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
1904
0
  }
1905
1
  return 0;
1906
1
}
1907
1908
0
unsigned fastEmit_ISD_SIGN_EXTEND_MVT_v8i16_MVT_v8i64_r(unsigned Op0, bool Op0IsKill) {
1909
0
  if ((Subtarget->hasAVX512())) {
1910
0
    return fastEmitInst_r(X86::VPMOVSXWQZrr, &X86::VR512RegClass, Op0, Op0IsKill);
1911
0
  }
1912
0
  return 0;
1913
0
}
1914
1915
3
unsigned fastEmit_ISD_SIGN_EXTEND_MVT_v8i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1916
3
switch (RetVT.SimpleTy) {
1917
3
  case MVT::v8i32: return fastEmit_ISD_SIGN_EXTEND_MVT_v8i16_MVT_v8i32_r(Op0, Op0IsKill);
1918
3
  
case MVT::v8i64: return fastEmit_ISD_SIGN_EXTEND_MVT_v8i16_MVT_v8i64_r(Op0, Op0IsKill)0
;
1919
3
  
default: return 00
;
1920
3
}
1921
3
}
1922
1923
0
unsigned fastEmit_ISD_SIGN_EXTEND_MVT_v16i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1924
0
  if (RetVT.SimpleTy != MVT::v16i32)
1925
0
    return 0;
1926
0
  if ((Subtarget->hasAVX512())) {
1927
0
    return fastEmitInst_r(X86::VPMOVSXWDZrr, &X86::VR512RegClass, Op0, Op0IsKill);
1928
0
  }
1929
0
  return 0;
1930
0
}
1931
1932
2
unsigned fastEmit_ISD_SIGN_EXTEND_MVT_v4i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1933
2
  if (RetVT.SimpleTy != MVT::v4i64)
1934
0
    return 0;
1935
2
  if ((Subtarget->hasAVX2()) && (!Subtarget->hasVLX())) {
1936
2
    return fastEmitInst_r(X86::VPMOVSXDQYrr, &X86::VR256RegClass, Op0, Op0IsKill);
1937
2
  }
1938
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
1939
0
    return fastEmitInst_r(X86::VPMOVSXDQZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
1940
0
  }
1941
0
  return 0;
1942
0
}
1943
1944
0
unsigned fastEmit_ISD_SIGN_EXTEND_MVT_v8i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1945
0
  if (RetVT.SimpleTy != MVT::v8i64)
1946
0
    return 0;
1947
0
  if ((Subtarget->hasAVX512())) {
1948
0
    return fastEmitInst_r(X86::VPMOVSXDQZrr, &X86::VR512RegClass, Op0, Op0IsKill);
1949
0
  }
1950
0
  return 0;
1951
0
}
1952
1953
194
unsigned fastEmit_ISD_SIGN_EXTEND_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
1954
194
  switch (VT.SimpleTy) {
1955
194
  
case MVT::i8: return fastEmit_ISD_SIGN_EXTEND_MVT_i8_r(RetVT, Op0, Op0IsKill)48
;
1956
194
  
case MVT::i16: return fastEmit_ISD_SIGN_EXTEND_MVT_i16_r(RetVT, Op0, Op0IsKill)10
;
1957
194
  
case MVT::i32: return fastEmit_ISD_SIGN_EXTEND_MVT_i32_r(RetVT, Op0, Op0IsKill)59
;
1958
194
  
case MVT::v2i1: return fastEmit_ISD_SIGN_EXTEND_MVT_v2i1_r(RetVT, Op0, Op0IsKill)28
;
1959
194
  
case MVT::v4i1: return fastEmit_ISD_SIGN_EXTEND_MVT_v4i1_r(RetVT, Op0, Op0IsKill)30
;
1960
194
  
case MVT::v8i1: return fastEmit_ISD_SIGN_EXTEND_MVT_v8i1_r(RetVT, Op0, Op0IsKill)6
;
1961
194
  
case MVT::v16i1: return fastEmit_ISD_SIGN_EXTEND_MVT_v16i1_r(RetVT, Op0, Op0IsKill)6
;
1962
194
  
case MVT::v32i1: return fastEmit_ISD_SIGN_EXTEND_MVT_v32i1_r(RetVT, Op0, Op0IsKill)0
;
1963
194
  
case MVT::v64i1: return fastEmit_ISD_SIGN_EXTEND_MVT_v64i1_r(RetVT, Op0, Op0IsKill)0
;
1964
194
  
case MVT::v16i8: return fastEmit_ISD_SIGN_EXTEND_MVT_v16i8_r(RetVT, Op0, Op0IsKill)2
;
1965
194
  
case MVT::v32i8: return fastEmit_ISD_SIGN_EXTEND_MVT_v32i8_r(RetVT, Op0, Op0IsKill)0
;
1966
194
  
case MVT::v8i16: return fastEmit_ISD_SIGN_EXTEND_MVT_v8i16_r(RetVT, Op0, Op0IsKill)3
;
1967
194
  
case MVT::v16i16: return fastEmit_ISD_SIGN_EXTEND_MVT_v16i16_r(RetVT, Op0, Op0IsKill)0
;
1968
194
  
case MVT::v4i32: return fastEmit_ISD_SIGN_EXTEND_MVT_v4i32_r(RetVT, Op0, Op0IsKill)2
;
1969
194
  
case MVT::v8i32: return fastEmit_ISD_SIGN_EXTEND_MVT_v8i32_r(RetVT, Op0, Op0IsKill)0
;
1970
194
  
default: return 00
;
1971
194
  }
1972
194
}
1973
1974
// FastEmit functions for ISD::SIGN_EXTEND_VECTOR_INREG.
1975
1976
0
unsigned fastEmit_ISD_SIGN_EXTEND_VECTOR_INREG_MVT_v16i8_MVT_v8i16_r(unsigned Op0, bool Op0IsKill) {
1977
0
  if ((Subtarget->hasSSE41() && !Subtarget->hasAVX())) {
1978
0
    return fastEmitInst_r(X86::PMOVSXBWrr, &X86::VR128RegClass, Op0, Op0IsKill);
1979
0
  }
1980
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX() || !Subtarget->hasBWI())) {
1981
0
    return fastEmitInst_r(X86::VPMOVSXBWrr, &X86::VR128RegClass, Op0, Op0IsKill);
1982
0
  }
1983
0
  if ((Subtarget->hasBWI()) && (Subtarget->hasVLX())) {
1984
0
    return fastEmitInst_r(X86::VPMOVSXBWZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
1985
0
  }
1986
0
  return 0;
1987
0
}
1988
1989
0
unsigned fastEmit_ISD_SIGN_EXTEND_VECTOR_INREG_MVT_v16i8_MVT_v4i32_r(unsigned Op0, bool Op0IsKill) {
1990
0
  if ((Subtarget->hasSSE41() && !Subtarget->hasAVX())) {
1991
0
    return fastEmitInst_r(X86::PMOVSXBDrr, &X86::VR128RegClass, Op0, Op0IsKill);
1992
0
  }
1993
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
1994
0
    return fastEmitInst_r(X86::VPMOVSXBDrr, &X86::VR128RegClass, Op0, Op0IsKill);
1995
0
  }
1996
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
1997
0
    return fastEmitInst_r(X86::VPMOVSXBDZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
1998
0
  }
1999
0
  return 0;
2000
0
}
2001
2002
0
unsigned fastEmit_ISD_SIGN_EXTEND_VECTOR_INREG_MVT_v16i8_MVT_v8i32_r(unsigned Op0, bool Op0IsKill) {
2003
0
  if ((Subtarget->hasAVX2()) && (!Subtarget->hasVLX())) {
2004
0
    return fastEmitInst_r(X86::VPMOVSXBDYrr, &X86::VR256RegClass, Op0, Op0IsKill);
2005
0
  }
2006
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
2007
0
    return fastEmitInst_r(X86::VPMOVSXBDZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
2008
0
  }
2009
0
  return 0;
2010
0
}
2011
2012
0
unsigned fastEmit_ISD_SIGN_EXTEND_VECTOR_INREG_MVT_v16i8_MVT_v2i64_r(unsigned Op0, bool Op0IsKill) {
2013
0
  if ((Subtarget->hasSSE41() && !Subtarget->hasAVX())) {
2014
0
    return fastEmitInst_r(X86::PMOVSXBQrr, &X86::VR128RegClass, Op0, Op0IsKill);
2015
0
  }
2016
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
2017
0
    return fastEmitInst_r(X86::VPMOVSXBQrr, &X86::VR128RegClass, Op0, Op0IsKill);
2018
0
  }
2019
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
2020
0
    return fastEmitInst_r(X86::VPMOVSXBQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
2021
0
  }
2022
0
  return 0;
2023
0
}
2024
2025
0
unsigned fastEmit_ISD_SIGN_EXTEND_VECTOR_INREG_MVT_v16i8_MVT_v4i64_r(unsigned Op0, bool Op0IsKill) {
2026
0
  if ((Subtarget->hasAVX2()) && (!Subtarget->hasVLX())) {
2027
0
    return fastEmitInst_r(X86::VPMOVSXBQYrr, &X86::VR256RegClass, Op0, Op0IsKill);
2028
0
  }
2029
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
2030
0
    return fastEmitInst_r(X86::VPMOVSXBQZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
2031
0
  }
2032
0
  return 0;
2033
0
}
2034
2035
0
unsigned fastEmit_ISD_SIGN_EXTEND_VECTOR_INREG_MVT_v16i8_MVT_v8i64_r(unsigned Op0, bool Op0IsKill) {
2036
0
  if ((Subtarget->hasAVX512())) {
2037
0
    return fastEmitInst_r(X86::VPMOVSXBQZrr, &X86::VR512RegClass, Op0, Op0IsKill);
2038
0
  }
2039
0
  return 0;
2040
0
}
2041
2042
unsigned fastEmit_ISD_SIGN_EXTEND_VECTOR_INREG_MVT_v16i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2043
switch (RetVT.SimpleTy) {
2044
  case MVT::v8i16: return fastEmit_ISD_SIGN_EXTEND_VECTOR_INREG_MVT_v16i8_MVT_v8i16_r(Op0, Op0IsKill);
2045
  case MVT::v4i32: return fastEmit_ISD_SIGN_EXTEND_VECTOR_INREG_MVT_v16i8_MVT_v4i32_r(Op0, Op0IsKill);
2046
  case MVT::v8i32: return fastEmit_ISD_SIGN_EXTEND_VECTOR_INREG_MVT_v16i8_MVT_v8i32_r(Op0, Op0IsKill);
2047
  case MVT::v2i64: return fastEmit_ISD_SIGN_EXTEND_VECTOR_INREG_MVT_v16i8_MVT_v2i64_r(Op0, Op0IsKill);
2048
  case MVT::v4i64: return fastEmit_ISD_SIGN_EXTEND_VECTOR_INREG_MVT_v16i8_MVT_v4i64_r(Op0, Op0IsKill);
2049
  case MVT::v8i64: return fastEmit_ISD_SIGN_EXTEND_VECTOR_INREG_MVT_v16i8_MVT_v8i64_r(Op0, Op0IsKill);
2050
  default: return 0;
2051
}
2052
}
2053
2054
0
unsigned fastEmit_ISD_SIGN_EXTEND_VECTOR_INREG_MVT_v8i16_MVT_v4i32_r(unsigned Op0, bool Op0IsKill) {
2055
0
  if ((Subtarget->hasSSE41() && !Subtarget->hasAVX())) {
2056
0
    return fastEmitInst_r(X86::PMOVSXWDrr, &X86::VR128RegClass, Op0, Op0IsKill);
2057
0
  }
2058
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
2059
0
    return fastEmitInst_r(X86::VPMOVSXWDrr, &X86::VR128RegClass, Op0, Op0IsKill);
2060
0
  }
2061
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
2062
0
    return fastEmitInst_r(X86::VPMOVSXWDZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
2063
0
  }
2064
0
  return 0;
2065
0
}
2066
2067
0
unsigned fastEmit_ISD_SIGN_EXTEND_VECTOR_INREG_MVT_v8i16_MVT_v2i64_r(unsigned Op0, bool Op0IsKill) {
2068
0
  if ((Subtarget->hasSSE41() && !Subtarget->hasAVX())) {
2069
0
    return fastEmitInst_r(X86::PMOVSXWQrr, &X86::VR128RegClass, Op0, Op0IsKill);
2070
0
  }
2071
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
2072
0
    return fastEmitInst_r(X86::VPMOVSXWQrr, &X86::VR128RegClass, Op0, Op0IsKill);
2073
0
  }
2074
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
2075
0
    return fastEmitInst_r(X86::VPMOVSXWQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
2076
0
  }
2077
0
  return 0;
2078
0
}
2079
2080
0
unsigned fastEmit_ISD_SIGN_EXTEND_VECTOR_INREG_MVT_v8i16_MVT_v4i64_r(unsigned Op0, bool Op0IsKill) {
2081
0
  if ((Subtarget->hasAVX2()) && (!Subtarget->hasVLX())) {
2082
0
    return fastEmitInst_r(X86::VPMOVSXWQYrr, &X86::VR256RegClass, Op0, Op0IsKill);
2083
0
  }
2084
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
2085
0
    return fastEmitInst_r(X86::VPMOVSXWQZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
2086
0
  }
2087
0
  return 0;
2088
0
}
2089
2090
unsigned fastEmit_ISD_SIGN_EXTEND_VECTOR_INREG_MVT_v8i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2091
switch (RetVT.SimpleTy) {
2092
  case MVT::v4i32: return fastEmit_ISD_SIGN_EXTEND_VECTOR_INREG_MVT_v8i16_MVT_v4i32_r(Op0, Op0IsKill);
2093
  case MVT::v2i64: return fastEmit_ISD_SIGN_EXTEND_VECTOR_INREG_MVT_v8i16_MVT_v2i64_r(Op0, Op0IsKill);
2094
  case MVT::v4i64: return fastEmit_ISD_SIGN_EXTEND_VECTOR_INREG_MVT_v8i16_MVT_v4i64_r(Op0, Op0IsKill);
2095
  default: return 0;
2096
}
2097
}
2098
2099
0
unsigned fastEmit_ISD_SIGN_EXTEND_VECTOR_INREG_MVT_v4i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2100
0
  if (RetVT.SimpleTy != MVT::v2i64)
2101
0
    return 0;
2102
0
  if ((Subtarget->hasSSE41() && !Subtarget->hasAVX())) {
2103
0
    return fastEmitInst_r(X86::PMOVSXDQrr, &X86::VR128RegClass, Op0, Op0IsKill);
2104
0
  }
2105
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
2106
0
    return fastEmitInst_r(X86::VPMOVSXDQrr, &X86::VR128RegClass, Op0, Op0IsKill);
2107
0
  }
2108
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
2109
0
    return fastEmitInst_r(X86::VPMOVSXDQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
2110
0
  }
2111
0
  return 0;
2112
0
}
2113
2114
unsigned fastEmit_ISD_SIGN_EXTEND_VECTOR_INREG_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
2115
  switch (VT.SimpleTy) {
2116
  case MVT::v16i8: return fastEmit_ISD_SIGN_EXTEND_VECTOR_INREG_MVT_v16i8_r(RetVT, Op0, Op0IsKill);
2117
  case MVT::v8i16: return fastEmit_ISD_SIGN_EXTEND_VECTOR_INREG_MVT_v8i16_r(RetVT, Op0, Op0IsKill);
2118
  case MVT::v4i32: return fastEmit_ISD_SIGN_EXTEND_VECTOR_INREG_MVT_v4i32_r(RetVT, Op0, Op0IsKill);
2119
  default: return 0;
2120
  }
2121
}
2122
2123
// FastEmit functions for ISD::SINT_TO_FP.
2124
2125
9
unsigned fastEmit_ISD_SINT_TO_FP_MVT_i32_MVT_f32_r(unsigned Op0, bool Op0IsKill) {
2126
9
  if ((Subtarget->hasSSE1() && !Subtarget->hasAVX())) {
2127
3
    return fastEmitInst_r(X86::CVTSI2SSrr, &X86::FR32RegClass, Op0, Op0IsKill);
2128
3
  }
2129
6
  return 0;
2130
6
}
2131
2132
11
unsigned fastEmit_ISD_SINT_TO_FP_MVT_i32_MVT_f64_r(unsigned Op0, bool Op0IsKill) {
2133
11
  if ((Subtarget->hasSSE2() && 
!Subtarget->hasAVX()9
)) {
2134
3
    return fastEmitInst_r(X86::CVTSI2SDrr, &X86::FR64RegClass, Op0, Op0IsKill);
2135
3
  }
2136
8
  return 0;
2137
8
}
2138
2139
20
unsigned fastEmit_ISD_SINT_TO_FP_MVT_i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2140
20
switch (RetVT.SimpleTy) {
2141
20
  
case MVT::f32: return fastEmit_ISD_SINT_TO_FP_MVT_i32_MVT_f32_r(Op0, Op0IsKill)9
;
2142
20
  
case MVT::f64: return fastEmit_ISD_SINT_TO_FP_MVT_i32_MVT_f64_r(Op0, Op0IsKill)11
;
2143
20
  
default: return 00
;
2144
20
}
2145
20
}
2146
2147
9
unsigned fastEmit_ISD_SINT_TO_FP_MVT_i64_MVT_f32_r(unsigned Op0, bool Op0IsKill) {
2148
9
  if ((Subtarget->hasSSE1() && !Subtarget->hasAVX())) {
2149
3
    return fastEmitInst_r(X86::CVTSI642SSrr, &X86::FR32RegClass, Op0, Op0IsKill);
2150
3
  }
2151
6
  return 0;
2152
6
}
2153
2154
9
unsigned fastEmit_ISD_SINT_TO_FP_MVT_i64_MVT_f64_r(unsigned Op0, bool Op0IsKill) {
2155
9
  if ((Subtarget->hasSSE2() && !Subtarget->hasAVX())) {
2156
3
    return fastEmitInst_r(X86::CVTSI642SDrr, &X86::FR64RegClass, Op0, Op0IsKill);
2157
3
  }
2158
6
  return 0;
2159
6
}
2160
2161
18
unsigned fastEmit_ISD_SINT_TO_FP_MVT_i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2162
18
switch (RetVT.SimpleTy) {
2163
18
  
case MVT::f32: return fastEmit_ISD_SINT_TO_FP_MVT_i64_MVT_f32_r(Op0, Op0IsKill)9
;
2164
18
  
case MVT::f64: return fastEmit_ISD_SINT_TO_FP_MVT_i64_MVT_f64_r(Op0, Op0IsKill)9
;
2165
18
  
default: return 00
;
2166
18
}
2167
18
}
2168
2169
6
unsigned fastEmit_ISD_SINT_TO_FP_MVT_v4i32_MVT_v4f32_r(unsigned Op0, bool Op0IsKill) {
2170
6
  if ((Subtarget->hasVLX())) {
2171
2
    return fastEmitInst_r(X86::VCVTDQ2PSZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
2172
2
  }
2173
4
  if ((Subtarget->hasSSE2() && !Subtarget->hasAVX())) {
2174
2
    return fastEmitInst_r(X86::CVTDQ2PSrr, &X86::VR128RegClass, Op0, Op0IsKill);
2175
2
  }
2176
2
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
2177
2
    return fastEmitInst_r(X86::VCVTDQ2PSrr, &X86::VR128RegClass, Op0, Op0IsKill);
2178
2
  }
2179
0
  return 0;
2180
0
}
2181
2182
2
unsigned fastEmit_ISD_SINT_TO_FP_MVT_v4i32_MVT_v4f64_r(unsigned Op0, bool Op0IsKill) {
2183
2
  if ((Subtarget->hasVLX())) {
2184
0
    return fastEmitInst_r(X86::VCVTDQ2PDZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
2185
0
  }
2186
2
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
2187
2
    return fastEmitInst_r(X86::VCVTDQ2PDYrr, &X86::VR256RegClass, Op0, Op0IsKill);
2188
2
  }
2189
0
  return 0;
2190
0
}
2191
2192
8
unsigned fastEmit_ISD_SINT_TO_FP_MVT_v4i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2193
8
switch (RetVT.SimpleTy) {
2194
8
  
case MVT::v4f32: return fastEmit_ISD_SINT_TO_FP_MVT_v4i32_MVT_v4f32_r(Op0, Op0IsKill)6
;
2195
8
  
case MVT::v4f64: return fastEmit_ISD_SINT_TO_FP_MVT_v4i32_MVT_v4f64_r(Op0, Op0IsKill)2
;
2196
8
  
default: return 00
;
2197
8
}
2198
8
}
2199
2200
2
unsigned fastEmit_ISD_SINT_TO_FP_MVT_v8i32_MVT_v8f32_r(unsigned Op0, bool Op0IsKill) {
2201
2
  if ((Subtarget->hasVLX())) {
2202
0
    return fastEmitInst_r(X86::VCVTDQ2PSZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
2203
0
  }
2204
2
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
2205
2
    return fastEmitInst_r(X86::VCVTDQ2PSYrr, &X86::VR256RegClass, Op0, Op0IsKill);
2206
2
  }
2207
0
  return 0;
2208
0
}
2209
2210
0
unsigned fastEmit_ISD_SINT_TO_FP_MVT_v8i32_MVT_v8f64_r(unsigned Op0, bool Op0IsKill) {
2211
0
  if ((Subtarget->hasAVX512())) {
2212
0
    return fastEmitInst_r(X86::VCVTDQ2PDZrr, &X86::VR512RegClass, Op0, Op0IsKill);
2213
0
  }
2214
0
  return 0;
2215
0
}
2216
2217
2
unsigned fastEmit_ISD_SINT_TO_FP_MVT_v8i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2218
2
switch (RetVT.SimpleTy) {
2219
2
  case MVT::v8f32: return fastEmit_ISD_SINT_TO_FP_MVT_v8i32_MVT_v8f32_r(Op0, Op0IsKill);
2220
2
  
case MVT::v8f64: return fastEmit_ISD_SINT_TO_FP_MVT_v8i32_MVT_v8f64_r(Op0, Op0IsKill)0
;
2221
2
  
default: return 00
;
2222
2
}
2223
2
}
2224
2225
0
unsigned fastEmit_ISD_SINT_TO_FP_MVT_v16i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2226
0
  if (RetVT.SimpleTy != MVT::v16f32)
2227
0
    return 0;
2228
0
  if ((Subtarget->hasAVX512())) {
2229
0
    return fastEmitInst_r(X86::VCVTDQ2PSZrr, &X86::VR512RegClass, Op0, Op0IsKill);
2230
0
  }
2231
0
  return 0;
2232
0
}
2233
2234
0
unsigned fastEmit_ISD_SINT_TO_FP_MVT_v2i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2235
0
  if (RetVT.SimpleTy != MVT::v2f64)
2236
0
    return 0;
2237
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
2238
0
    return fastEmitInst_r(X86::VCVTQQ2PDZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
2239
0
  }
2240
0
  return 0;
2241
0
}
2242
2243
0
unsigned fastEmit_ISD_SINT_TO_FP_MVT_v4i64_MVT_v4f32_r(unsigned Op0, bool Op0IsKill) {
2244
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
2245
0
    return fastEmitInst_r(X86::VCVTQQ2PSZ256rr, &X86::VR128XRegClass, Op0, Op0IsKill);
2246
0
  }
2247
0
  return 0;
2248
0
}
2249
2250
0
unsigned fastEmit_ISD_SINT_TO_FP_MVT_v4i64_MVT_v4f64_r(unsigned Op0, bool Op0IsKill) {
2251
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
2252
0
    return fastEmitInst_r(X86::VCVTQQ2PDZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
2253
0
  }
2254
0
  return 0;
2255
0
}
2256
2257
unsigned fastEmit_ISD_SINT_TO_FP_MVT_v4i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2258
switch (RetVT.SimpleTy) {
2259
  case MVT::v4f32: return fastEmit_ISD_SINT_TO_FP_MVT_v4i64_MVT_v4f32_r(Op0, Op0IsKill);
2260
  case MVT::v4f64: return fastEmit_ISD_SINT_TO_FP_MVT_v4i64_MVT_v4f64_r(Op0, Op0IsKill);
2261
  default: return 0;
2262
}
2263
}
2264
2265
0
unsigned fastEmit_ISD_SINT_TO_FP_MVT_v8i64_MVT_v8f32_r(unsigned Op0, bool Op0IsKill) {
2266
0
  if ((Subtarget->hasDQI())) {
2267
0
    return fastEmitInst_r(X86::VCVTQQ2PSZrr, &X86::VR256XRegClass, Op0, Op0IsKill);
2268
0
  }
2269
0
  return 0;
2270
0
}
2271
2272
0
unsigned fastEmit_ISD_SINT_TO_FP_MVT_v8i64_MVT_v8f64_r(unsigned Op0, bool Op0IsKill) {
2273
0
  if ((Subtarget->hasDQI())) {
2274
0
    return fastEmitInst_r(X86::VCVTQQ2PDZrr, &X86::VR512RegClass, Op0, Op0IsKill);
2275
0
  }
2276
0
  return 0;
2277
0
}
2278
2279
unsigned fastEmit_ISD_SINT_TO_FP_MVT_v8i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2280
switch (RetVT.SimpleTy) {
2281
  case MVT::v8f32: return fastEmit_ISD_SINT_TO_FP_MVT_v8i64_MVT_v8f32_r(Op0, Op0IsKill);
2282
  case MVT::v8f64: return fastEmit_ISD_SINT_TO_FP_MVT_v8i64_MVT_v8f64_r(Op0, Op0IsKill);
2283
  default: return 0;
2284
}
2285
}
2286
2287
48
unsigned fastEmit_ISD_SINT_TO_FP_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
2288
48
  switch (VT.SimpleTy) {
2289
48
  
case MVT::i32: return fastEmit_ISD_SINT_TO_FP_MVT_i32_r(RetVT, Op0, Op0IsKill)20
;
2290
48
  
case MVT::i64: return fastEmit_ISD_SINT_TO_FP_MVT_i64_r(RetVT, Op0, Op0IsKill)18
;
2291
48
  
case MVT::v4i32: return fastEmit_ISD_SINT_TO_FP_MVT_v4i32_r(RetVT, Op0, Op0IsKill)8
;
2292
48
  
case MVT::v8i32: return fastEmit_ISD_SINT_TO_FP_MVT_v8i32_r(RetVT, Op0, Op0IsKill)2
;
2293
48
  
case MVT::v16i32: return fastEmit_ISD_SINT_TO_FP_MVT_v16i32_r(RetVT, Op0, Op0IsKill)0
;
2294
48
  
case MVT::v2i64: return fastEmit_ISD_SINT_TO_FP_MVT_v2i64_r(RetVT, Op0, Op0IsKill)0
;
2295
48
  
case MVT::v4i64: return fastEmit_ISD_SINT_TO_FP_MVT_v4i64_r(RetVT, Op0, Op0IsKill)0
;
2296
48
  
case MVT::v8i64: return fastEmit_ISD_SINT_TO_FP_MVT_v8i64_r(RetVT, Op0, Op0IsKill)0
;
2297
48
  
default: return 00
;
2298
48
  }
2299
48
}
2300
2301
// FastEmit functions for ISD::TRUNCATE.
2302
2303
2
unsigned fastEmit_ISD_TRUNCATE_MVT_i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2304
2
  if (RetVT.SimpleTy != MVT::i8)
2305
0
    return 0;
2306
2
  if ((Subtarget->is64Bit())) {
2307
1
    return fastEmitInst_extractsubreg(RetVT, Op0, Op0IsKill, X86::sub_8bit);
2308
1
  }
2309
1
  return 0;
2310
1
}
2311
2312
8
unsigned fastEmit_ISD_TRUNCATE_MVT_i32_MVT_i8_r(unsigned Op0, bool Op0IsKill) {
2313
8
  if ((Subtarget->is64Bit())) {
2314
4
    return fastEmitInst_extractsubreg(MVT::i8, Op0, Op0IsKill, X86::sub_8bit);
2315
4
  }
2316
4
  return 0;
2317
4
}
2318
2319
13
unsigned fastEmit_ISD_TRUNCATE_MVT_i32_MVT_i16_r(unsigned Op0, bool Op0IsKill) {
2320
13
  return fastEmitInst_extractsubreg(MVT::i16, Op0, Op0IsKill, X86::sub_16bit);
2321
13
}
2322
2323
21
unsigned fastEmit_ISD_TRUNCATE_MVT_i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2324
21
switch (RetVT.SimpleTy) {
2325
21
  
case MVT::i8: return fastEmit_ISD_TRUNCATE_MVT_i32_MVT_i8_r(Op0, Op0IsKill)8
;
2326
21
  
case MVT::i16: return fastEmit_ISD_TRUNCATE_MVT_i32_MVT_i16_r(Op0, Op0IsKill)13
;
2327
21
  
default: return 00
;
2328
21
}
2329
21
}
2330
2331
4
unsigned fastEmit_ISD_TRUNCATE_MVT_i64_MVT_i8_r(unsigned Op0, bool Op0IsKill) {
2332
4
  return fastEmitInst_extractsubreg(MVT::i8, Op0, Op0IsKill, X86::sub_8bit);
2333
4
}
2334
2335
2
unsigned fastEmit_ISD_TRUNCATE_MVT_i64_MVT_i16_r(unsigned Op0, bool Op0IsKill) {
2336
2
  return fastEmitInst_extractsubreg(MVT::i16, Op0, Op0IsKill, X86::sub_16bit);
2337
2
}
2338
2339
12
unsigned fastEmit_ISD_TRUNCATE_MVT_i64_MVT_i32_r(unsigned Op0, bool Op0IsKill) {
2340
12
  return fastEmitInst_extractsubreg(MVT::i32, Op0, Op0IsKill, X86::sub_32bit);
2341
12
}
2342
2343
18
unsigned fastEmit_ISD_TRUNCATE_MVT_i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2344
18
switch (RetVT.SimpleTy) {
2345
18
  
case MVT::i8: return fastEmit_ISD_TRUNCATE_MVT_i64_MVT_i8_r(Op0, Op0IsKill)4
;
2346
18
  
case MVT::i16: return fastEmit_ISD_TRUNCATE_MVT_i64_MVT_i16_r(Op0, Op0IsKill)2
;
2347
18
  
case MVT::i32: return fastEmit_ISD_TRUNCATE_MVT_i64_MVT_i32_r(Op0, Op0IsKill)12
;
2348
18
  
default: return 00
;
2349
18
}
2350
18
}
2351
2352
6
unsigned fastEmit_ISD_TRUNCATE_MVT_v16i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2353
6
  if (RetVT.SimpleTy != MVT::v16i8)
2354
0
    return 0;
2355
6
  if ((Subtarget->hasBWI()) && 
(Subtarget->hasVLX())4
) {
2356
4
    return fastEmitInst_r(X86::VPMOVWBZ256rr, &X86::VR128XRegClass, Op0, Op0IsKill);
2357
4
  }
2358
2
  return 0;
2359
2
}
2360
2361
2
unsigned fastEmit_ISD_TRUNCATE_MVT_v32i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2362
2
  if (RetVT.SimpleTy != MVT::v32i8)
2363
0
    return 0;
2364
2
  if ((Subtarget->hasBWI())) {
2365
2
    return fastEmitInst_r(X86::VPMOVWBZrr, &X86::VR256XRegClass, Op0, Op0IsKill);
2366
2
  }
2367
0
  return 0;
2368
0
}
2369
2370
6
unsigned fastEmit_ISD_TRUNCATE_MVT_v8i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2371
6
  if (RetVT.SimpleTy != MVT::v8i16)
2372
0
    return 0;
2373
6
  if ((Subtarget->hasAVX512()) && 
(Subtarget->hasVLX())4
) {
2374
4
    return fastEmitInst_r(X86::VPMOVDWZ256rr, &X86::VR128XRegClass, Op0, Op0IsKill);
2375
4
  }
2376
2
  return 0;
2377
2
}
2378
2379
2
unsigned fastEmit_ISD_TRUNCATE_MVT_v16i32_MVT_v16i8_r(unsigned Op0, bool Op0IsKill) {
2380
2
  if ((Subtarget->hasAVX512())) {
2381
2
    return fastEmitInst_r(X86::VPMOVDBZrr, &X86::VR128XRegClass, Op0, Op0IsKill);
2382
2
  }
2383
0
  return 0;
2384
0
}
2385
2386
0
unsigned fastEmit_ISD_TRUNCATE_MVT_v16i32_MVT_v16i16_r(unsigned Op0, bool Op0IsKill) {
2387
0
  if ((Subtarget->hasAVX512())) {
2388
0
    return fastEmitInst_r(X86::VPMOVDWZrr, &X86::VR256XRegClass, Op0, Op0IsKill);
2389
0
  }
2390
0
  return 0;
2391
0
}
2392
2393
2
unsigned fastEmit_ISD_TRUNCATE_MVT_v16i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2394
2
switch (RetVT.SimpleTy) {
2395
2
  case MVT::v16i8: return fastEmit_ISD_TRUNCATE_MVT_v16i32_MVT_v16i8_r(Op0, Op0IsKill);
2396
2
  
case MVT::v16i16: return fastEmit_ISD_TRUNCATE_MVT_v16i32_MVT_v16i16_r(Op0, Op0IsKill)0
;
2397
2
  
default: return 00
;
2398
2
}
2399
2
}
2400
2401
4
unsigned fastEmit_ISD_TRUNCATE_MVT_v4i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2402
4
  if (RetVT.SimpleTy != MVT::v4i32)
2403
2
    return 0;
2404
2
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
2405
2
    return fastEmitInst_r(X86::VPMOVQDZ256rr, &X86::VR128XRegClass, Op0, Op0IsKill);
2406
2
  }
2407
0
  return 0;
2408
0
}
2409
2410
2
unsigned fastEmit_ISD_TRUNCATE_MVT_v8i64_MVT_v8i16_r(unsigned Op0, bool Op0IsKill) {
2411
2
  if ((Subtarget->hasAVX512())) {
2412
2
    return fastEmitInst_r(X86::VPMOVQWZrr, &X86::VR128XRegClass, Op0, Op0IsKill);
2413
2
  }
2414
0
  return 0;
2415
0
}
2416
2417
2
unsigned fastEmit_ISD_TRUNCATE_MVT_v8i64_MVT_v8i32_r(unsigned Op0, bool Op0IsKill) {
2418
2
  if ((Subtarget->hasAVX512())) {
2419
2
    return fastEmitInst_r(X86::VPMOVQDZrr, &X86::VR256XRegClass, Op0, Op0IsKill);
2420
2
  }
2421
0
  return 0;
2422
0
}
2423
2424
8
unsigned fastEmit_ISD_TRUNCATE_MVT_v8i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2425
8
switch (RetVT.SimpleTy) {
2426
8
  
case MVT::v8i16: return fastEmit_ISD_TRUNCATE_MVT_v8i64_MVT_v8i16_r(Op0, Op0IsKill)2
;
2427
8
  
case MVT::v8i32: return fastEmit_ISD_TRUNCATE_MVT_v8i64_MVT_v8i32_r(Op0, Op0IsKill)2
;
2428
8
  
default: return 04
;
2429
8
}
2430
8
}
2431
2432
72
unsigned fastEmit_ISD_TRUNCATE_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
2433
72
  switch (VT.SimpleTy) {
2434
72
  
case MVT::i16: return fastEmit_ISD_TRUNCATE_MVT_i16_r(RetVT, Op0, Op0IsKill)2
;
2435
72
  
case MVT::i32: return fastEmit_ISD_TRUNCATE_MVT_i32_r(RetVT, Op0, Op0IsKill)21
;
2436
72
  
case MVT::i64: return fastEmit_ISD_TRUNCATE_MVT_i64_r(RetVT, Op0, Op0IsKill)18
;
2437
72
  
case MVT::v16i16: return fastEmit_ISD_TRUNCATE_MVT_v16i16_r(RetVT, Op0, Op0IsKill)6
;
2438
72
  
case MVT::v32i16: return fastEmit_ISD_TRUNCATE_MVT_v32i16_r(RetVT, Op0, Op0IsKill)2
;
2439
72
  
case MVT::v8i32: return fastEmit_ISD_TRUNCATE_MVT_v8i32_r(RetVT, Op0, Op0IsKill)6
;
2440
72
  
case MVT::v16i32: return fastEmit_ISD_TRUNCATE_MVT_v16i32_r(RetVT, Op0, Op0IsKill)2
;
2441
72
  
case MVT::v4i64: return fastEmit_ISD_TRUNCATE_MVT_v4i64_r(RetVT, Op0, Op0IsKill)4
;
2442
72
  
case MVT::v8i64: return fastEmit_ISD_TRUNCATE_MVT_v8i64_r(RetVT, Op0, Op0IsKill)8
;
2443
72
  
default: return 03
;
2444
72
  }
2445
72
}
2446
2447
// FastEmit functions for ISD::UINT_TO_FP.
2448
2449
0
unsigned fastEmit_ISD_UINT_TO_FP_MVT_v4i32_MVT_v4f32_r(unsigned Op0, bool Op0IsKill) {
2450
0
  if ((Subtarget->hasVLX())) {
2451
0
    return fastEmitInst_r(X86::VCVTUDQ2PSZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
2452
0
  }
2453
0
  return 0;
2454
0
}
2455
2456
0
unsigned fastEmit_ISD_UINT_TO_FP_MVT_v4i32_MVT_v4f64_r(unsigned Op0, bool Op0IsKill) {
2457
0
  if ((Subtarget->hasVLX())) {
2458
0
    return fastEmitInst_r(X86::VCVTUDQ2PDZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
2459
0
  }
2460
0
  return 0;
2461
0
}
2462
2463
unsigned fastEmit_ISD_UINT_TO_FP_MVT_v4i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2464
switch (RetVT.SimpleTy) {
2465
  case MVT::v4f32: return fastEmit_ISD_UINT_TO_FP_MVT_v4i32_MVT_v4f32_r(Op0, Op0IsKill);
2466
  case MVT::v4f64: return fastEmit_ISD_UINT_TO_FP_MVT_v4i32_MVT_v4f64_r(Op0, Op0IsKill);
2467
  default: return 0;
2468
}
2469
}
2470
2471
0
unsigned fastEmit_ISD_UINT_TO_FP_MVT_v8i32_MVT_v8f32_r(unsigned Op0, bool Op0IsKill) {
2472
0
  if ((Subtarget->hasVLX())) {
2473
0
    return fastEmitInst_r(X86::VCVTUDQ2PSZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
2474
0
  }
2475
0
  return 0;
2476
0
}
2477
2478
0
unsigned fastEmit_ISD_UINT_TO_FP_MVT_v8i32_MVT_v8f64_r(unsigned Op0, bool Op0IsKill) {
2479
0
  if ((Subtarget->hasAVX512())) {
2480
0
    return fastEmitInst_r(X86::VCVTUDQ2PDZrr, &X86::VR512RegClass, Op0, Op0IsKill);
2481
0
  }
2482
0
  return 0;
2483
0
}
2484
2485
unsigned fastEmit_ISD_UINT_TO_FP_MVT_v8i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2486
switch (RetVT.SimpleTy) {
2487
  case MVT::v8f32: return fastEmit_ISD_UINT_TO_FP_MVT_v8i32_MVT_v8f32_r(Op0, Op0IsKill);
2488
  case MVT::v8f64: return fastEmit_ISD_UINT_TO_FP_MVT_v8i32_MVT_v8f64_r(Op0, Op0IsKill);
2489
  default: return 0;
2490
}
2491
}
2492
2493
0
unsigned fastEmit_ISD_UINT_TO_FP_MVT_v16i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2494
0
  if (RetVT.SimpleTy != MVT::v16f32)
2495
0
    return 0;
2496
0
  if ((Subtarget->hasAVX512())) {
2497
0
    return fastEmitInst_r(X86::VCVTUDQ2PSZrr, &X86::VR512RegClass, Op0, Op0IsKill);
2498
0
  }
2499
0
  return 0;
2500
0
}
2501
2502
0
unsigned fastEmit_ISD_UINT_TO_FP_MVT_v2i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2503
0
  if (RetVT.SimpleTy != MVT::v2f64)
2504
0
    return 0;
2505
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
2506
0
    return fastEmitInst_r(X86::VCVTUQQ2PDZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
2507
0
  }
2508
0
  return 0;
2509
0
}
2510
2511
0
unsigned fastEmit_ISD_UINT_TO_FP_MVT_v4i64_MVT_v4f32_r(unsigned Op0, bool Op0IsKill) {
2512
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
2513
0
    return fastEmitInst_r(X86::VCVTUQQ2PSZ256rr, &X86::VR128XRegClass, Op0, Op0IsKill);
2514
0
  }
2515
0
  return 0;
2516
0
}
2517
2518
0
unsigned fastEmit_ISD_UINT_TO_FP_MVT_v4i64_MVT_v4f64_r(unsigned Op0, bool Op0IsKill) {
2519
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
2520
0
    return fastEmitInst_r(X86::VCVTUQQ2PDZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
2521
0
  }
2522
0
  return 0;
2523
0
}
2524
2525
unsigned fastEmit_ISD_UINT_TO_FP_MVT_v4i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2526
switch (RetVT.SimpleTy) {
2527
  case MVT::v4f32: return fastEmit_ISD_UINT_TO_FP_MVT_v4i64_MVT_v4f32_r(Op0, Op0IsKill);
2528
  case MVT::v4f64: return fastEmit_ISD_UINT_TO_FP_MVT_v4i64_MVT_v4f64_r(Op0, Op0IsKill);
2529
  default: return 0;
2530
}
2531
}
2532
2533
0
unsigned fastEmit_ISD_UINT_TO_FP_MVT_v8i64_MVT_v8f32_r(unsigned Op0, bool Op0IsKill) {
2534
0
  if ((Subtarget->hasDQI())) {
2535
0
    return fastEmitInst_r(X86::VCVTUQQ2PSZrr, &X86::VR256XRegClass, Op0, Op0IsKill);
2536
0
  }
2537
0
  return 0;
2538
0
}
2539
2540
0
unsigned fastEmit_ISD_UINT_TO_FP_MVT_v8i64_MVT_v8f64_r(unsigned Op0, bool Op0IsKill) {
2541
0
  if ((Subtarget->hasDQI())) {
2542
0
    return fastEmitInst_r(X86::VCVTUQQ2PDZrr, &X86::VR512RegClass, Op0, Op0IsKill);
2543
0
  }
2544
0
  return 0;
2545
0
}
2546
2547
unsigned fastEmit_ISD_UINT_TO_FP_MVT_v8i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2548
switch (RetVT.SimpleTy) {
2549
  case MVT::v8f32: return fastEmit_ISD_UINT_TO_FP_MVT_v8i64_MVT_v8f32_r(Op0, Op0IsKill);
2550
  case MVT::v8f64: return fastEmit_ISD_UINT_TO_FP_MVT_v8i64_MVT_v8f64_r(Op0, Op0IsKill);
2551
  default: return 0;
2552
}
2553
}
2554
2555
unsigned fastEmit_ISD_UINT_TO_FP_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
2556
  switch (VT.SimpleTy) {
2557
  case MVT::v4i32: return fastEmit_ISD_UINT_TO_FP_MVT_v4i32_r(RetVT, Op0, Op0IsKill);
2558
  case MVT::v8i32: return fastEmit_ISD_UINT_TO_FP_MVT_v8i32_r(RetVT, Op0, Op0IsKill);
2559
  case MVT::v16i32: return fastEmit_ISD_UINT_TO_FP_MVT_v16i32_r(RetVT, Op0, Op0IsKill);
2560
  case MVT::v2i64: return fastEmit_ISD_UINT_TO_FP_MVT_v2i64_r(RetVT, Op0, Op0IsKill);
2561
  case MVT::v4i64: return fastEmit_ISD_UINT_TO_FP_MVT_v4i64_r(RetVT, Op0, Op0IsKill);
2562
  case MVT::v8i64: return fastEmit_ISD_UINT_TO_FP_MVT_v8i64_r(RetVT, Op0, Op0IsKill);
2563
  default: return 0;
2564
  }
2565
}
2566
2567
// FastEmit functions for ISD::ZERO_EXTEND.
2568
2569
384
unsigned fastEmit_ISD_ZERO_EXTEND_MVT_i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2570
384
  if (RetVT.SimpleTy != MVT::i32)
2571
6
    return 0;
2572
378
  return fastEmitInst_r(X86::MOVZX32rr8, &X86::GR32RegClass, Op0, Op0IsKill);
2573
378
}
2574
2575
61
unsigned fastEmit_ISD_ZERO_EXTEND_MVT_i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2576
61
  if (RetVT.SimpleTy != MVT::i32)
2577
2
    return 0;
2578
59
  return fastEmitInst_r(X86::MOVZX32rr16, &X86::GR32RegClass, Op0, Op0IsKill);
2579
59
}
2580
2581
2
unsigned fastEmit_ISD_ZERO_EXTEND_MVT_v16i8_MVT_v16i16_r(unsigned Op0, bool Op0IsKill) {
2582
2
  if ((Subtarget->hasAVX2()) && (!Subtarget->hasVLX() || 
!Subtarget->hasBWI()0
)) {
2583
2
    return fastEmitInst_r(X86::VPMOVZXBWYrr, &X86::VR256RegClass, Op0, Op0IsKill);
2584
2
  }
2585
0
  if ((Subtarget->hasBWI()) && (Subtarget->hasVLX())) {
2586
0
    return fastEmitInst_r(X86::VPMOVZXBWZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
2587
0
  }
2588
0
  return 0;
2589
0
}
2590
2591
0
unsigned fastEmit_ISD_ZERO_EXTEND_MVT_v16i8_MVT_v16i32_r(unsigned Op0, bool Op0IsKill) {
2592
0
  if ((Subtarget->hasAVX512())) {
2593
0
    return fastEmitInst_r(X86::VPMOVZXBDZrr, &X86::VR512RegClass, Op0, Op0IsKill);
2594
0
  }
2595
0
  return 0;
2596
0
}
2597
2598
2
unsigned fastEmit_ISD_ZERO_EXTEND_MVT_v16i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2599
2
switch (RetVT.SimpleTy) {
2600
2
  case MVT::v16i16: return fastEmit_ISD_ZERO_EXTEND_MVT_v16i8_MVT_v16i16_r(Op0, Op0IsKill);
2601
2
  
case MVT::v16i32: return fastEmit_ISD_ZERO_EXTEND_MVT_v16i8_MVT_v16i32_r(Op0, Op0IsKill)0
;
2602
2
  
default: return 00
;
2603
2
}
2604
2
}
2605
2606
0
unsigned fastEmit_ISD_ZERO_EXTEND_MVT_v32i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2607
0
  if (RetVT.SimpleTy != MVT::v32i16)
2608
0
    return 0;
2609
0
  if ((Subtarget->hasBWI())) {
2610
0
    return fastEmitInst_r(X86::VPMOVZXBWZrr, &X86::VR512RegClass, Op0, Op0IsKill);
2611
0
  }
2612
0
  return 0;
2613
0
}
2614
2615
2
unsigned fastEmit_ISD_ZERO_EXTEND_MVT_v8i16_MVT_v8i32_r(unsigned Op0, bool Op0IsKill) {
2616
2
  if ((Subtarget->hasAVX2()) && (!Subtarget->hasVLX())) {
2617
2
    return fastEmitInst_r(X86::VPMOVZXWDYrr, &X86::VR256RegClass, Op0, Op0IsKill);
2618
2
  }
2619
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
2620
0
    return fastEmitInst_r(X86::VPMOVZXWDZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
2621
0
  }
2622
0
  return 0;
2623
0
}
2624
2625
0
unsigned fastEmit_ISD_ZERO_EXTEND_MVT_v8i16_MVT_v8i64_r(unsigned Op0, bool Op0IsKill) {
2626
0
  if ((Subtarget->hasAVX512())) {
2627
0
    return fastEmitInst_r(X86::VPMOVZXWQZrr, &X86::VR512RegClass, Op0, Op0IsKill);
2628
0
  }
2629
0
  return 0;
2630
0
}
2631
2632
2
unsigned fastEmit_ISD_ZERO_EXTEND_MVT_v8i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2633
2
switch (RetVT.SimpleTy) {
2634
2
  case MVT::v8i32: return fastEmit_ISD_ZERO_EXTEND_MVT_v8i16_MVT_v8i32_r(Op0, Op0IsKill);
2635
2
  
case MVT::v8i64: return fastEmit_ISD_ZERO_EXTEND_MVT_v8i16_MVT_v8i64_r(Op0, Op0IsKill)0
;
2636
2
  
default: return 00
;
2637
2
}
2638
2
}
2639
2640
0
unsigned fastEmit_ISD_ZERO_EXTEND_MVT_v16i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2641
0
  if (RetVT.SimpleTy != MVT::v16i32)
2642
0
    return 0;
2643
0
  if ((Subtarget->hasAVX512())) {
2644
0
    return fastEmitInst_r(X86::VPMOVZXWDZrr, &X86::VR512RegClass, Op0, Op0IsKill);
2645
0
  }
2646
0
  return 0;
2647
0
}
2648
2649
2
unsigned fastEmit_ISD_ZERO_EXTEND_MVT_v4i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2650
2
  if (RetVT.SimpleTy != MVT::v4i64)
2651
0
    return 0;
2652
2
  if ((Subtarget->hasAVX2()) && (!Subtarget->hasVLX())) {
2653
2
    return fastEmitInst_r(X86::VPMOVZXDQYrr, &X86::VR256RegClass, Op0, Op0IsKill);
2654
2
  }
2655
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
2656
0
    return fastEmitInst_r(X86::VPMOVZXDQZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
2657
0
  }
2658
0
  return 0;
2659
0
}
2660
2661
0
unsigned fastEmit_ISD_ZERO_EXTEND_MVT_v8i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2662
0
  if (RetVT.SimpleTy != MVT::v8i64)
2663
0
    return 0;
2664
0
  if ((Subtarget->hasAVX512())) {
2665
0
    return fastEmitInst_r(X86::VPMOVZXDQZrr, &X86::VR512RegClass, Op0, Op0IsKill);
2666
0
  }
2667
0
  return 0;
2668
0
}
2669
2670
463
unsigned fastEmit_ISD_ZERO_EXTEND_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
2671
463
  switch (VT.SimpleTy) {
2672
463
  
case MVT::i8: return fastEmit_ISD_ZERO_EXTEND_MVT_i8_r(RetVT, Op0, Op0IsKill)384
;
2673
463
  
case MVT::i16: return fastEmit_ISD_ZERO_EXTEND_MVT_i16_r(RetVT, Op0, Op0IsKill)61
;
2674
463
  
case MVT::v16i8: return fastEmit_ISD_ZERO_EXTEND_MVT_v16i8_r(RetVT, Op0, Op0IsKill)2
;
2675
463
  
case MVT::v32i8: return fastEmit_ISD_ZERO_EXTEND_MVT_v32i8_r(RetVT, Op0, Op0IsKill)0
;
2676
463
  
case MVT::v8i16: return fastEmit_ISD_ZERO_EXTEND_MVT_v8i16_r(RetVT, Op0, Op0IsKill)2
;
2677
463
  
case MVT::v16i16: return fastEmit_ISD_ZERO_EXTEND_MVT_v16i16_r(RetVT, Op0, Op0IsKill)0
;
2678
463
  
case MVT::v4i32: return fastEmit_ISD_ZERO_EXTEND_MVT_v4i32_r(RetVT, Op0, Op0IsKill)2
;
2679
463
  
case MVT::v8i32: return fastEmit_ISD_ZERO_EXTEND_MVT_v8i32_r(RetVT, Op0, Op0IsKill)0
;
2680
463
  
default: return 012
;
2681
463
  }
2682
463
}
2683
2684
// FastEmit functions for ISD::ZERO_EXTEND_VECTOR_INREG.
2685
2686
0
unsigned fastEmit_ISD_ZERO_EXTEND_VECTOR_INREG_MVT_v16i8_MVT_v8i16_r(unsigned Op0, bool Op0IsKill) {
2687
0
  if ((Subtarget->hasSSE41() && !Subtarget->hasAVX())) {
2688
0
    return fastEmitInst_r(X86::PMOVZXBWrr, &X86::VR128RegClass, Op0, Op0IsKill);
2689
0
  }
2690
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX() || !Subtarget->hasBWI())) {
2691
0
    return fastEmitInst_r(X86::VPMOVZXBWrr, &X86::VR128RegClass, Op0, Op0IsKill);
2692
0
  }
2693
0
  if ((Subtarget->hasBWI()) && (Subtarget->hasVLX())) {
2694
0
    return fastEmitInst_r(X86::VPMOVZXBWZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
2695
0
  }
2696
0
  return 0;
2697
0
}
2698
2699
0
unsigned fastEmit_ISD_ZERO_EXTEND_VECTOR_INREG_MVT_v16i8_MVT_v4i32_r(unsigned Op0, bool Op0IsKill) {
2700
0
  if ((Subtarget->hasSSE41() && !Subtarget->hasAVX())) {
2701
0
    return fastEmitInst_r(X86::PMOVZXBDrr, &X86::VR128RegClass, Op0, Op0IsKill);
2702
0
  }
2703
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
2704
0
    return fastEmitInst_r(X86::VPMOVZXBDrr, &X86::VR128RegClass, Op0, Op0IsKill);
2705
0
  }
2706
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
2707
0
    return fastEmitInst_r(X86::VPMOVZXBDZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
2708
0
  }
2709
0
  return 0;
2710
0
}
2711
2712
0
unsigned fastEmit_ISD_ZERO_EXTEND_VECTOR_INREG_MVT_v16i8_MVT_v8i32_r(unsigned Op0, bool Op0IsKill) {
2713
0
  if ((Subtarget->hasAVX2()) && (!Subtarget->hasVLX())) {
2714
0
    return fastEmitInst_r(X86::VPMOVZXBDYrr, &X86::VR256RegClass, Op0, Op0IsKill);
2715
0
  }
2716
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
2717
0
    return fastEmitInst_r(X86::VPMOVZXBDZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
2718
0
  }
2719
0
  return 0;
2720
0
}
2721
2722
0
unsigned fastEmit_ISD_ZERO_EXTEND_VECTOR_INREG_MVT_v16i8_MVT_v2i64_r(unsigned Op0, bool Op0IsKill) {
2723
0
  if ((Subtarget->hasSSE41() && !Subtarget->hasAVX())) {
2724
0
    return fastEmitInst_r(X86::PMOVZXBQrr, &X86::VR128RegClass, Op0, Op0IsKill);
2725
0
  }
2726
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
2727
0
    return fastEmitInst_r(X86::VPMOVZXBQrr, &X86::VR128RegClass, Op0, Op0IsKill);
2728
0
  }
2729
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
2730
0
    return fastEmitInst_r(X86::VPMOVZXBQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
2731
0
  }
2732
0
  return 0;
2733
0
}
2734
2735
0
unsigned fastEmit_ISD_ZERO_EXTEND_VECTOR_INREG_MVT_v16i8_MVT_v4i64_r(unsigned Op0, bool Op0IsKill) {
2736
0
  if ((Subtarget->hasAVX2()) && (!Subtarget->hasVLX())) {
2737
0
    return fastEmitInst_r(X86::VPMOVZXBQYrr, &X86::VR256RegClass, Op0, Op0IsKill);
2738
0
  }
2739
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
2740
0
    return fastEmitInst_r(X86::VPMOVZXBQZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
2741
0
  }
2742
0
  return 0;
2743
0
}
2744
2745
0
unsigned fastEmit_ISD_ZERO_EXTEND_VECTOR_INREG_MVT_v16i8_MVT_v8i64_r(unsigned Op0, bool Op0IsKill) {
2746
0
  if ((Subtarget->hasAVX512())) {
2747
0
    return fastEmitInst_r(X86::VPMOVZXBQZrr, &X86::VR512RegClass, Op0, Op0IsKill);
2748
0
  }
2749
0
  return 0;
2750
0
}
2751
2752
unsigned fastEmit_ISD_ZERO_EXTEND_VECTOR_INREG_MVT_v16i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2753
switch (RetVT.SimpleTy) {
2754
  case MVT::v8i16: return fastEmit_ISD_ZERO_EXTEND_VECTOR_INREG_MVT_v16i8_MVT_v8i16_r(Op0, Op0IsKill);
2755
  case MVT::v4i32: return fastEmit_ISD_ZERO_EXTEND_VECTOR_INREG_MVT_v16i8_MVT_v4i32_r(Op0, Op0IsKill);
2756
  case MVT::v8i32: return fastEmit_ISD_ZERO_EXTEND_VECTOR_INREG_MVT_v16i8_MVT_v8i32_r(Op0, Op0IsKill);
2757
  case MVT::v2i64: return fastEmit_ISD_ZERO_EXTEND_VECTOR_INREG_MVT_v16i8_MVT_v2i64_r(Op0, Op0IsKill);
2758
  case MVT::v4i64: return fastEmit_ISD_ZERO_EXTEND_VECTOR_INREG_MVT_v16i8_MVT_v4i64_r(Op0, Op0IsKill);
2759
  case MVT::v8i64: return fastEmit_ISD_ZERO_EXTEND_VECTOR_INREG_MVT_v16i8_MVT_v8i64_r(Op0, Op0IsKill);
2760
  default: return 0;
2761
}
2762
}
2763
2764
0
unsigned fastEmit_ISD_ZERO_EXTEND_VECTOR_INREG_MVT_v8i16_MVT_v4i32_r(unsigned Op0, bool Op0IsKill) {
2765
0
  if ((Subtarget->hasSSE41() && !Subtarget->hasAVX())) {
2766
0
    return fastEmitInst_r(X86::PMOVZXWDrr, &X86::VR128RegClass, Op0, Op0IsKill);
2767
0
  }
2768
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
2769
0
    return fastEmitInst_r(X86::VPMOVZXWDrr, &X86::VR128RegClass, Op0, Op0IsKill);
2770
0
  }
2771
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
2772
0
    return fastEmitInst_r(X86::VPMOVZXWDZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
2773
0
  }
2774
0
  return 0;
2775
0
}
2776
2777
0
unsigned fastEmit_ISD_ZERO_EXTEND_VECTOR_INREG_MVT_v8i16_MVT_v2i64_r(unsigned Op0, bool Op0IsKill) {
2778
0
  if ((Subtarget->hasSSE41() && !Subtarget->hasAVX())) {
2779
0
    return fastEmitInst_r(X86::PMOVZXWQrr, &X86::VR128RegClass, Op0, Op0IsKill);
2780
0
  }
2781
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
2782
0
    return fastEmitInst_r(X86::VPMOVZXWQrr, &X86::VR128RegClass, Op0, Op0IsKill);
2783
0
  }
2784
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
2785
0
    return fastEmitInst_r(X86::VPMOVZXWQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
2786
0
  }
2787
0
  return 0;
2788
0
}
2789
2790
0
unsigned fastEmit_ISD_ZERO_EXTEND_VECTOR_INREG_MVT_v8i16_MVT_v4i64_r(unsigned Op0, bool Op0IsKill) {
2791
0
  if ((Subtarget->hasAVX2()) && (!Subtarget->hasVLX())) {
2792
0
    return fastEmitInst_r(X86::VPMOVZXWQYrr, &X86::VR256RegClass, Op0, Op0IsKill);
2793
0
  }
2794
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
2795
0
    return fastEmitInst_r(X86::VPMOVZXWQZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
2796
0
  }
2797
0
  return 0;
2798
0
}
2799
2800
unsigned fastEmit_ISD_ZERO_EXTEND_VECTOR_INREG_MVT_v8i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2801
switch (RetVT.SimpleTy) {
2802
  case MVT::v4i32: return fastEmit_ISD_ZERO_EXTEND_VECTOR_INREG_MVT_v8i16_MVT_v4i32_r(Op0, Op0IsKill);
2803
  case MVT::v2i64: return fastEmit_ISD_ZERO_EXTEND_VECTOR_INREG_MVT_v8i16_MVT_v2i64_r(Op0, Op0IsKill);
2804
  case MVT::v4i64: return fastEmit_ISD_ZERO_EXTEND_VECTOR_INREG_MVT_v8i16_MVT_v4i64_r(Op0, Op0IsKill);
2805
  default: return 0;
2806
}
2807
}
2808
2809
0
unsigned fastEmit_ISD_ZERO_EXTEND_VECTOR_INREG_MVT_v4i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2810
0
  if (RetVT.SimpleTy != MVT::v2i64)
2811
0
    return 0;
2812
0
  if ((Subtarget->hasSSE41() && !Subtarget->hasAVX())) {
2813
0
    return fastEmitInst_r(X86::PMOVZXDQrr, &X86::VR128RegClass, Op0, Op0IsKill);
2814
0
  }
2815
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
2816
0
    return fastEmitInst_r(X86::VPMOVZXDQrr, &X86::VR128RegClass, Op0, Op0IsKill);
2817
0
  }
2818
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
2819
0
    return fastEmitInst_r(X86::VPMOVZXDQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
2820
0
  }
2821
0
  return 0;
2822
0
}
2823
2824
unsigned fastEmit_ISD_ZERO_EXTEND_VECTOR_INREG_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
2825
  switch (VT.SimpleTy) {
2826
  case MVT::v16i8: return fastEmit_ISD_ZERO_EXTEND_VECTOR_INREG_MVT_v16i8_r(RetVT, Op0, Op0IsKill);
2827
  case MVT::v8i16: return fastEmit_ISD_ZERO_EXTEND_VECTOR_INREG_MVT_v8i16_r(RetVT, Op0, Op0IsKill);
2828
  case MVT::v4i32: return fastEmit_ISD_ZERO_EXTEND_VECTOR_INREG_MVT_v4i32_r(RetVT, Op0, Op0IsKill);
2829
  default: return 0;
2830
  }
2831
}
2832
2833
// FastEmit functions for X86ISD::CALL.
2834
2835
0
unsigned fastEmit_X86ISD_CALL_MVT_i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2836
0
  if (RetVT.SimpleTy != MVT::isVoid)
2837
0
    return 0;
2838
0
  if ((!Subtarget->is64Bit())) {
2839
0
    return fastEmitInst_r(X86::CALL16r, &X86::GR16RegClass, Op0, Op0IsKill);
2840
0
  }
2841
0
  return 0;
2842
0
}
2843
2844
0
unsigned fastEmit_X86ISD_CALL_MVT_i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2845
0
  if (RetVT.SimpleTy != MVT::isVoid)
2846
0
    return 0;
2847
0
  if ((!Subtarget->is64Bit()) && (Subtarget->useRetpolineIndirectCalls())) {
2848
0
    return fastEmitInst_r(X86::RETPOLINE_CALL32, &X86::GR32RegClass, Op0, Op0IsKill);
2849
0
  }
2850
0
  if ((!Subtarget->is64Bit()) && (!Subtarget->useRetpolineIndirectCalls())) {
2851
0
    return fastEmitInst_r(X86::CALL32r, &X86::GR32RegClass, Op0, Op0IsKill);
2852
0
  }
2853
0
  return 0;
2854
0
}
2855
2856
0
unsigned fastEmit_X86ISD_CALL_MVT_i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2857
0
  if (RetVT.SimpleTy != MVT::isVoid)
2858
0
    return 0;
2859
0
  if ((Subtarget->is64Bit()) && (Subtarget->useRetpolineIndirectCalls())) {
2860
0
    return fastEmitInst_r(X86::RETPOLINE_CALL64, &X86::GR64RegClass, Op0, Op0IsKill);
2861
0
  }
2862
0
  if ((Subtarget->is64Bit()) && (!Subtarget->useRetpolineIndirectCalls())) {
2863
0
    return fastEmitInst_r(X86::CALL64r, &X86::GR64RegClass, Op0, Op0IsKill);
2864
0
  }
2865
0
  return 0;
2866
0
}
2867
2868
unsigned fastEmit_X86ISD_CALL_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
2869
  switch (VT.SimpleTy) {
2870
  case MVT::i16: return fastEmit_X86ISD_CALL_MVT_i16_r(RetVT, Op0, Op0IsKill);
2871
  case MVT::i32: return fastEmit_X86ISD_CALL_MVT_i32_r(RetVT, Op0, Op0IsKill);
2872
  case MVT::i64: return fastEmit_X86ISD_CALL_MVT_i64_r(RetVT, Op0, Op0IsKill);
2873
  default: return 0;
2874
  }
2875
}
2876
2877
// FastEmit functions for X86ISD::COMPRESS.
2878
2879
0
unsigned fastEmit_X86ISD_COMPRESS_MVT_v16i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2880
0
  if (RetVT.SimpleTy != MVT::v16i8)
2881
0
    return 0;
2882
0
  if ((Subtarget->hasVBMI2()) && (Subtarget->hasVLX())) {
2883
0
    return fastEmitInst_r(X86::VPCOMPRESSBZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
2884
0
  }
2885
0
  return 0;
2886
0
}
2887
2888
0
unsigned fastEmit_X86ISD_COMPRESS_MVT_v32i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2889
0
  if (RetVT.SimpleTy != MVT::v32i8)
2890
0
    return 0;
2891
0
  if ((Subtarget->hasVBMI2()) && (Subtarget->hasVLX())) {
2892
0
    return fastEmitInst_r(X86::VPCOMPRESSBZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
2893
0
  }
2894
0
  return 0;
2895
0
}
2896
2897
0
unsigned fastEmit_X86ISD_COMPRESS_MVT_v64i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2898
0
  if (RetVT.SimpleTy != MVT::v64i8)
2899
0
    return 0;
2900
0
  if ((Subtarget->hasVBMI2())) {
2901
0
    return fastEmitInst_r(X86::VPCOMPRESSBZrr, &X86::VR512RegClass, Op0, Op0IsKill);
2902
0
  }
2903
0
  return 0;
2904
0
}
2905
2906
0
unsigned fastEmit_X86ISD_COMPRESS_MVT_v8i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2907
0
  if (RetVT.SimpleTy != MVT::v8i16)
2908
0
    return 0;
2909
0
  if ((Subtarget->hasVBMI2()) && (Subtarget->hasVLX())) {
2910
0
    return fastEmitInst_r(X86::VPCOMPRESSWZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
2911
0
  }
2912
0
  return 0;
2913
0
}
2914
2915
0
unsigned fastEmit_X86ISD_COMPRESS_MVT_v16i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2916
0
  if (RetVT.SimpleTy != MVT::v16i16)
2917
0
    return 0;
2918
0
  if ((Subtarget->hasVBMI2()) && (Subtarget->hasVLX())) {
2919
0
    return fastEmitInst_r(X86::VPCOMPRESSWZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
2920
0
  }
2921
0
  return 0;
2922
0
}
2923
2924
0
unsigned fastEmit_X86ISD_COMPRESS_MVT_v32i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2925
0
  if (RetVT.SimpleTy != MVT::v32i16)
2926
0
    return 0;
2927
0
  if ((Subtarget->hasVBMI2())) {
2928
0
    return fastEmitInst_r(X86::VPCOMPRESSWZrr, &X86::VR512RegClass, Op0, Op0IsKill);
2929
0
  }
2930
0
  return 0;
2931
0
}
2932
2933
0
unsigned fastEmit_X86ISD_COMPRESS_MVT_v4i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2934
0
  if (RetVT.SimpleTy != MVT::v4i32)
2935
0
    return 0;
2936
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
2937
0
    return fastEmitInst_r(X86::VPCOMPRESSDZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
2938
0
  }
2939
0
  return 0;
2940
0
}
2941
2942
0
unsigned fastEmit_X86ISD_COMPRESS_MVT_v8i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2943
0
  if (RetVT.SimpleTy != MVT::v8i32)
2944
0
    return 0;
2945
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
2946
0
    return fastEmitInst_r(X86::VPCOMPRESSDZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
2947
0
  }
2948
0
  return 0;
2949
0
}
2950
2951
0
unsigned fastEmit_X86ISD_COMPRESS_MVT_v16i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2952
0
  if (RetVT.SimpleTy != MVT::v16i32)
2953
0
    return 0;
2954
0
  if ((Subtarget->hasAVX512())) {
2955
0
    return fastEmitInst_r(X86::VPCOMPRESSDZrr, &X86::VR512RegClass, Op0, Op0IsKill);
2956
0
  }
2957
0
  return 0;
2958
0
}
2959
2960
0
unsigned fastEmit_X86ISD_COMPRESS_MVT_v2i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2961
0
  if (RetVT.SimpleTy != MVT::v2i64)
2962
0
    return 0;
2963
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
2964
0
    return fastEmitInst_r(X86::VPCOMPRESSQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
2965
0
  }
2966
0
  return 0;
2967
0
}
2968
2969
0
unsigned fastEmit_X86ISD_COMPRESS_MVT_v4i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2970
0
  if (RetVT.SimpleTy != MVT::v4i64)
2971
0
    return 0;
2972
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
2973
0
    return fastEmitInst_r(X86::VPCOMPRESSQZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
2974
0
  }
2975
0
  return 0;
2976
0
}
2977
2978
0
unsigned fastEmit_X86ISD_COMPRESS_MVT_v8i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2979
0
  if (RetVT.SimpleTy != MVT::v8i64)
2980
0
    return 0;
2981
0
  if ((Subtarget->hasAVX512())) {
2982
0
    return fastEmitInst_r(X86::VPCOMPRESSQZrr, &X86::VR512RegClass, Op0, Op0IsKill);
2983
0
  }
2984
0
  return 0;
2985
0
}
2986
2987
0
unsigned fastEmit_X86ISD_COMPRESS_MVT_v4f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2988
0
  if (RetVT.SimpleTy != MVT::v4f32)
2989
0
    return 0;
2990
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
2991
0
    return fastEmitInst_r(X86::VCOMPRESSPSZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
2992
0
  }
2993
0
  return 0;
2994
0
}
2995
2996
0
unsigned fastEmit_X86ISD_COMPRESS_MVT_v8f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2997
0
  if (RetVT.SimpleTy != MVT::v8f32)
2998
0
    return 0;
2999
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
3000
0
    return fastEmitInst_r(X86::VCOMPRESSPSZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
3001
0
  }
3002
0
  return 0;
3003
0
}
3004
3005
0
unsigned fastEmit_X86ISD_COMPRESS_MVT_v16f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3006
0
  if (RetVT.SimpleTy != MVT::v16f32)
3007
0
    return 0;
3008
0
  if ((Subtarget->hasAVX512())) {
3009
0
    return fastEmitInst_r(X86::VCOMPRESSPSZrr, &X86::VR512RegClass, Op0, Op0IsKill);
3010
0
  }
3011
0
  return 0;
3012
0
}
3013
3014
0
unsigned fastEmit_X86ISD_COMPRESS_MVT_v2f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3015
0
  if (RetVT.SimpleTy != MVT::v2f64)
3016
0
    return 0;
3017
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
3018
0
    return fastEmitInst_r(X86::VCOMPRESSPDZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
3019
0
  }
3020
0
  return 0;
3021
0
}
3022
3023
0
unsigned fastEmit_X86ISD_COMPRESS_MVT_v4f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3024
0
  if (RetVT.SimpleTy != MVT::v4f64)
3025
0
    return 0;
3026
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
3027
0
    return fastEmitInst_r(X86::VCOMPRESSPDZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
3028
0
  }
3029
0
  return 0;
3030
0
}
3031
3032
0
unsigned fastEmit_X86ISD_COMPRESS_MVT_v8f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3033
0
  if (RetVT.SimpleTy != MVT::v8f64)
3034
0
    return 0;
3035
0
  if ((Subtarget->hasAVX512())) {
3036
0
    return fastEmitInst_r(X86::VCOMPRESSPDZrr, &X86::VR512RegClass, Op0, Op0IsKill);
3037
0
  }
3038
0
  return 0;
3039
0
}
3040
3041
unsigned fastEmit_X86ISD_COMPRESS_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
3042
  switch (VT.SimpleTy) {
3043
  case MVT::v16i8: return fastEmit_X86ISD_COMPRESS_MVT_v16i8_r(RetVT, Op0, Op0IsKill);
3044
  case MVT::v32i8: return fastEmit_X86ISD_COMPRESS_MVT_v32i8_r(RetVT, Op0, Op0IsKill);
3045
  case MVT::v64i8: return fastEmit_X86ISD_COMPRESS_MVT_v64i8_r(RetVT, Op0, Op0IsKill);
3046
  case MVT::v8i16: return fastEmit_X86ISD_COMPRESS_MVT_v8i16_r(RetVT, Op0, Op0IsKill);
3047
  case MVT::v16i16: return fastEmit_X86ISD_COMPRESS_MVT_v16i16_r(RetVT, Op0, Op0IsKill);
3048
  case MVT::v32i16: return fastEmit_X86ISD_COMPRESS_MVT_v32i16_r(RetVT, Op0, Op0IsKill);
3049
  case MVT::v4i32: return fastEmit_X86ISD_COMPRESS_MVT_v4i32_r(RetVT, Op0, Op0IsKill);
3050
  case MVT::v8i32: return fastEmit_X86ISD_COMPRESS_MVT_v8i32_r(RetVT, Op0, Op0IsKill);
3051
  case MVT::v16i32: return fastEmit_X86ISD_COMPRESS_MVT_v16i32_r(RetVT, Op0, Op0IsKill);
3052
  case MVT::v2i64: return fastEmit_X86ISD_COMPRESS_MVT_v2i64_r(RetVT, Op0, Op0IsKill);
3053
  case MVT::v4i64: return fastEmit_X86ISD_COMPRESS_MVT_v4i64_r(RetVT, Op0, Op0IsKill);
3054
  case MVT::v8i64: return fastEmit_X86ISD_COMPRESS_MVT_v8i64_r(RetVT, Op0, Op0IsKill);
3055
  case MVT::v4f32: return fastEmit_X86ISD_COMPRESS_MVT_v4f32_r(RetVT, Op0, Op0IsKill);
3056
  case MVT::v8f32: return fastEmit_X86ISD_COMPRESS_MVT_v8f32_r(RetVT, Op0, Op0IsKill);
3057
  case MVT::v16f32: return fastEmit_X86ISD_COMPRESS_MVT_v16f32_r(RetVT, Op0, Op0IsKill);
3058
  case MVT::v2f64: return fastEmit_X86ISD_COMPRESS_MVT_v2f64_r(RetVT, Op0, Op0IsKill);
3059
  case MVT::v4f64: return fastEmit_X86ISD_COMPRESS_MVT_v4f64_r(RetVT, Op0, Op0IsKill);
3060
  case MVT::v8f64: return fastEmit_X86ISD_COMPRESS_MVT_v8f64_r(RetVT, Op0, Op0IsKill);
3061
  default: return 0;
3062
  }
3063
}
3064
3065
// FastEmit functions for X86ISD::CONFLICT.
3066
3067
0
unsigned fastEmit_X86ISD_CONFLICT_MVT_v4i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3068
0
  if (RetVT.SimpleTy != MVT::v4i32)
3069
0
    return 0;
3070
0
  if ((Subtarget->hasCDI()) && (Subtarget->hasVLX())) {
3071
0
    return fastEmitInst_r(X86::VPCONFLICTDZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
3072
0
  }
3073
0
  return 0;
3074
0
}
3075
3076
0
unsigned fastEmit_X86ISD_CONFLICT_MVT_v8i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3077
0
  if (RetVT.SimpleTy != MVT::v8i32)
3078
0
    return 0;
3079
0
  if ((Subtarget->hasCDI()) && (Subtarget->hasVLX())) {
3080
0
    return fastEmitInst_r(X86::VPCONFLICTDZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
3081
0
  }
3082
0
  return 0;
3083
0
}
3084
3085
0
unsigned fastEmit_X86ISD_CONFLICT_MVT_v16i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3086
0
  if (RetVT.SimpleTy != MVT::v16i32)
3087
0
    return 0;
3088
0
  if ((Subtarget->hasCDI())) {
3089
0
    return fastEmitInst_r(X86::VPCONFLICTDZrr, &X86::VR512RegClass, Op0, Op0IsKill);
3090
0
  }
3091
0
  return 0;
3092
0
}
3093
3094
0
unsigned fastEmit_X86ISD_CONFLICT_MVT_v2i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3095
0
  if (RetVT.SimpleTy != MVT::v2i64)
3096
0
    return 0;
3097
0
  if ((Subtarget->hasCDI()) && (Subtarget->hasVLX())) {
3098
0
    return fastEmitInst_r(X86::VPCONFLICTQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
3099
0
  }
3100
0
  return 0;
3101
0
}
3102
3103
0
unsigned fastEmit_X86ISD_CONFLICT_MVT_v4i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3104
0
  if (RetVT.SimpleTy != MVT::v4i64)
3105
0
    return 0;
3106
0
  if ((Subtarget->hasCDI()) && (Subtarget->hasVLX())) {
3107
0
    return fastEmitInst_r(X86::VPCONFLICTQZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
3108
0
  }
3109
0
  return 0;
3110
0
}
3111
3112
0
unsigned fastEmit_X86ISD_CONFLICT_MVT_v8i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3113
0
  if (RetVT.SimpleTy != MVT::v8i64)
3114
0
    return 0;
3115
0
  if ((Subtarget->hasCDI())) {
3116
0
    return fastEmitInst_r(X86::VPCONFLICTQZrr, &X86::VR512RegClass, Op0, Op0IsKill);
3117
0
  }
3118
0
  return 0;
3119
0
}
3120
3121
unsigned fastEmit_X86ISD_CONFLICT_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
3122
  switch (VT.SimpleTy) {
3123
  case MVT::v4i32: return fastEmit_X86ISD_CONFLICT_MVT_v4i32_r(RetVT, Op0, Op0IsKill);
3124
  case MVT::v8i32: return fastEmit_X86ISD_CONFLICT_MVT_v8i32_r(RetVT, Op0, Op0IsKill);
3125
  case MVT::v16i32: return fastEmit_X86ISD_CONFLICT_MVT_v16i32_r(RetVT, Op0, Op0IsKill);
3126
  case MVT::v2i64: return fastEmit_X86ISD_CONFLICT_MVT_v2i64_r(RetVT, Op0, Op0IsKill);
3127
  case MVT::v4i64: return fastEmit_X86ISD_CONFLICT_MVT_v4i64_r(RetVT, Op0, Op0IsKill);
3128
  case MVT::v8i64: return fastEmit_X86ISD_CONFLICT_MVT_v8i64_r(RetVT, Op0, Op0IsKill);
3129
  default: return 0;
3130
  }
3131
}
3132
3133
// FastEmit functions for X86ISD::CVTP2SI.
3134
3135
0
unsigned fastEmit_X86ISD_CVTP2SI_MVT_v4f32_MVT_v4i32_r(unsigned Op0, bool Op0IsKill) {
3136
0
  if ((Subtarget->hasVLX())) {
3137
0
    return fastEmitInst_r(X86::VCVTPS2DQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
3138
0
  }
3139
0
  if ((Subtarget->hasSSE2() && !Subtarget->hasAVX())) {
3140
0
    return fastEmitInst_r(X86::CVTPS2DQrr, &X86::VR128RegClass, Op0, Op0IsKill);
3141
0
  }
3142
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
3143
0
    return fastEmitInst_r(X86::VCVTPS2DQrr, &X86::VR128RegClass, Op0, Op0IsKill);
3144
0
  }
3145
0
  return 0;
3146
0
}
3147
3148
0
unsigned fastEmit_X86ISD_CVTP2SI_MVT_v4f32_MVT_v2i64_r(unsigned Op0, bool Op0IsKill) {
3149
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
3150
0
    return fastEmitInst_r(X86::VCVTPS2QQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
3151
0
  }
3152
0
  return 0;
3153
0
}
3154
3155
0
unsigned fastEmit_X86ISD_CVTP2SI_MVT_v4f32_MVT_v4i64_r(unsigned Op0, bool Op0IsKill) {
3156
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
3157
0
    return fastEmitInst_r(X86::VCVTPS2QQZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
3158
0
  }
3159
0
  return 0;
3160
0
}
3161
3162
unsigned fastEmit_X86ISD_CVTP2SI_MVT_v4f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3163
switch (RetVT.SimpleTy) {
3164
  case MVT::v4i32: return fastEmit_X86ISD_CVTP2SI_MVT_v4f32_MVT_v4i32_r(Op0, Op0IsKill);
3165
  case MVT::v2i64: return fastEmit_X86ISD_CVTP2SI_MVT_v4f32_MVT_v2i64_r(Op0, Op0IsKill);
3166
  case MVT::v4i64: return fastEmit_X86ISD_CVTP2SI_MVT_v4f32_MVT_v4i64_r(Op0, Op0IsKill);
3167
  default: return 0;
3168
}
3169
}
3170
3171
0
unsigned fastEmit_X86ISD_CVTP2SI_MVT_v8f32_MVT_v8i32_r(unsigned Op0, bool Op0IsKill) {
3172
0
  if ((Subtarget->hasVLX())) {
3173
0
    return fastEmitInst_r(X86::VCVTPS2DQZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
3174
0
  }
3175
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
3176
0
    return fastEmitInst_r(X86::VCVTPS2DQYrr, &X86::VR256RegClass, Op0, Op0IsKill);
3177
0
  }
3178
0
  return 0;
3179
0
}
3180
3181
0
unsigned fastEmit_X86ISD_CVTP2SI_MVT_v8f32_MVT_v8i64_r(unsigned Op0, bool Op0IsKill) {
3182
0
  if ((Subtarget->hasDQI())) {
3183
0
    return fastEmitInst_r(X86::VCVTPS2QQZrr, &X86::VR512RegClass, Op0, Op0IsKill);
3184
0
  }
3185
0
  return 0;
3186
0
}
3187
3188
unsigned fastEmit_X86ISD_CVTP2SI_MVT_v8f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3189
switch (RetVT.SimpleTy) {
3190
  case MVT::v8i32: return fastEmit_X86ISD_CVTP2SI_MVT_v8f32_MVT_v8i32_r(Op0, Op0IsKill);
3191
  case MVT::v8i64: return fastEmit_X86ISD_CVTP2SI_MVT_v8f32_MVT_v8i64_r(Op0, Op0IsKill);
3192
  default: return 0;
3193
}
3194
}
3195
3196
0
unsigned fastEmit_X86ISD_CVTP2SI_MVT_v16f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3197
0
  if (RetVT.SimpleTy != MVT::v16i32)
3198
0
    return 0;
3199
0
  if ((Subtarget->hasAVX512())) {
3200
0
    return fastEmitInst_r(X86::VCVTPS2DQZrr, &X86::VR512RegClass, Op0, Op0IsKill);
3201
0
  }
3202
0
  return 0;
3203
0
}
3204
3205
0
unsigned fastEmit_X86ISD_CVTP2SI_MVT_v2f64_MVT_v4i32_r(unsigned Op0, bool Op0IsKill) {
3206
0
  if ((Subtarget->hasVLX())) {
3207
0
    return fastEmitInst_r(X86::VCVTPD2DQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
3208
0
  }
3209
0
  if ((Subtarget->hasSSE2() && !Subtarget->hasAVX())) {
3210
0
    return fastEmitInst_r(X86::CVTPD2DQrr, &X86::VR128RegClass, Op0, Op0IsKill);
3211
0
  }
3212
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
3213
0
    return fastEmitInst_r(X86::VCVTPD2DQrr, &X86::VR128RegClass, Op0, Op0IsKill);
3214
0
  }
3215
0
  return 0;
3216
0
}
3217
3218
0
unsigned fastEmit_X86ISD_CVTP2SI_MVT_v2f64_MVT_v2i64_r(unsigned Op0, bool Op0IsKill) {
3219
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
3220
0
    return fastEmitInst_r(X86::VCVTPD2QQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
3221
0
  }
3222
0
  return 0;
3223
0
}
3224
3225
unsigned fastEmit_X86ISD_CVTP2SI_MVT_v2f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3226
switch (RetVT.SimpleTy) {
3227
  case MVT::v4i32: return fastEmit_X86ISD_CVTP2SI_MVT_v2f64_MVT_v4i32_r(Op0, Op0IsKill);
3228
  case MVT::v2i64: return fastEmit_X86ISD_CVTP2SI_MVT_v2f64_MVT_v2i64_r(Op0, Op0IsKill);
3229
  default: return 0;
3230
}
3231
}
3232
3233
0
unsigned fastEmit_X86ISD_CVTP2SI_MVT_v4f64_MVT_v4i32_r(unsigned Op0, bool Op0IsKill) {
3234
0
  if ((Subtarget->hasVLX())) {
3235
0
    return fastEmitInst_r(X86::VCVTPD2DQZ256rr, &X86::VR128XRegClass, Op0, Op0IsKill);
3236
0
  }
3237
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
3238
0
    return fastEmitInst_r(X86::VCVTPD2DQYrr, &X86::VR128RegClass, Op0, Op0IsKill);
3239
0
  }
3240
0
  return 0;
3241
0
}
3242
3243
0
unsigned fastEmit_X86ISD_CVTP2SI_MVT_v4f64_MVT_v4i64_r(unsigned Op0, bool Op0IsKill) {
3244
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
3245
0
    return fastEmitInst_r(X86::VCVTPD2QQZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
3246
0
  }
3247
0
  return 0;
3248
0
}
3249
3250
unsigned fastEmit_X86ISD_CVTP2SI_MVT_v4f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3251
switch (RetVT.SimpleTy) {
3252
  case MVT::v4i32: return fastEmit_X86ISD_CVTP2SI_MVT_v4f64_MVT_v4i32_r(Op0, Op0IsKill);
3253
  case MVT::v4i64: return fastEmit_X86ISD_CVTP2SI_MVT_v4f64_MVT_v4i64_r(Op0, Op0IsKill);
3254
  default: return 0;
3255
}
3256
}
3257
3258
0
unsigned fastEmit_X86ISD_CVTP2SI_MVT_v8f64_MVT_v8i32_r(unsigned Op0, bool Op0IsKill) {
3259
0
  if ((Subtarget->hasAVX512())) {
3260
0
    return fastEmitInst_r(X86::VCVTPD2DQZrr, &X86::VR256XRegClass, Op0, Op0IsKill);
3261
0
  }
3262
0
  return 0;
3263
0
}
3264
3265
0
unsigned fastEmit_X86ISD_CVTP2SI_MVT_v8f64_MVT_v8i64_r(unsigned Op0, bool Op0IsKill) {
3266
0
  if ((Subtarget->hasDQI())) {
3267
0
    return fastEmitInst_r(X86::VCVTPD2QQZrr, &X86::VR512RegClass, Op0, Op0IsKill);
3268
0
  }
3269
0
  return 0;
3270
0
}
3271
3272
unsigned fastEmit_X86ISD_CVTP2SI_MVT_v8f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3273
switch (RetVT.SimpleTy) {
3274
  case MVT::v8i32: return fastEmit_X86ISD_CVTP2SI_MVT_v8f64_MVT_v8i32_r(Op0, Op0IsKill);
3275
  case MVT::v8i64: return fastEmit_X86ISD_CVTP2SI_MVT_v8f64_MVT_v8i64_r(Op0, Op0IsKill);
3276
  default: return 0;
3277
}
3278
}
3279
3280
unsigned fastEmit_X86ISD_CVTP2SI_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
3281
  switch (VT.SimpleTy) {
3282
  case MVT::v4f32: return fastEmit_X86ISD_CVTP2SI_MVT_v4f32_r(RetVT, Op0, Op0IsKill);
3283
  case MVT::v8f32: return fastEmit_X86ISD_CVTP2SI_MVT_v8f32_r(RetVT, Op0, Op0IsKill);
3284
  case MVT::v16f32: return fastEmit_X86ISD_CVTP2SI_MVT_v16f32_r(RetVT, Op0, Op0IsKill);
3285
  case MVT::v2f64: return fastEmit_X86ISD_CVTP2SI_MVT_v2f64_r(RetVT, Op0, Op0IsKill);
3286
  case MVT::v4f64: return fastEmit_X86ISD_CVTP2SI_MVT_v4f64_r(RetVT, Op0, Op0IsKill);
3287
  case MVT::v8f64: return fastEmit_X86ISD_CVTP2SI_MVT_v8f64_r(RetVT, Op0, Op0IsKill);
3288
  default: return 0;
3289
  }
3290
}
3291
3292
// FastEmit functions for X86ISD::CVTP2UI.
3293
3294
0
unsigned fastEmit_X86ISD_CVTP2UI_MVT_v4f32_MVT_v4i32_r(unsigned Op0, bool Op0IsKill) {
3295
0
  if ((Subtarget->hasVLX())) {
3296
0
    return fastEmitInst_r(X86::VCVTPS2UDQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
3297
0
  }
3298
0
  return 0;
3299
0
}
3300
3301
0
unsigned fastEmit_X86ISD_CVTP2UI_MVT_v4f32_MVT_v2i64_r(unsigned Op0, bool Op0IsKill) {
3302
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
3303
0
    return fastEmitInst_r(X86::VCVTPS2UQQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
3304
0
  }
3305
0
  return 0;
3306
0
}
3307
3308
0
unsigned fastEmit_X86ISD_CVTP2UI_MVT_v4f32_MVT_v4i64_r(unsigned Op0, bool Op0IsKill) {
3309
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
3310
0
    return fastEmitInst_r(X86::VCVTPS2UQQZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
3311
0
  }
3312
0
  return 0;
3313
0
}
3314
3315
unsigned fastEmit_X86ISD_CVTP2UI_MVT_v4f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3316
switch (RetVT.SimpleTy) {
3317
  case MVT::v4i32: return fastEmit_X86ISD_CVTP2UI_MVT_v4f32_MVT_v4i32_r(Op0, Op0IsKill);
3318
  case MVT::v2i64: return fastEmit_X86ISD_CVTP2UI_MVT_v4f32_MVT_v2i64_r(Op0, Op0IsKill);
3319
  case MVT::v4i64: return fastEmit_X86ISD_CVTP2UI_MVT_v4f32_MVT_v4i64_r(Op0, Op0IsKill);
3320
  default: return 0;
3321
}
3322
}
3323
3324
0
unsigned fastEmit_X86ISD_CVTP2UI_MVT_v8f32_MVT_v8i32_r(unsigned Op0, bool Op0IsKill) {
3325
0
  if ((Subtarget->hasVLX())) {
3326
0
    return fastEmitInst_r(X86::VCVTPS2UDQZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
3327
0
  }
3328
0
  return 0;
3329
0
}
3330
3331
0
unsigned fastEmit_X86ISD_CVTP2UI_MVT_v8f32_MVT_v8i64_r(unsigned Op0, bool Op0IsKill) {
3332
0
  if ((Subtarget->hasDQI())) {
3333
0
    return fastEmitInst_r(X86::VCVTPS2UQQZrr, &X86::VR512RegClass, Op0, Op0IsKill);
3334
0
  }
3335
0
  return 0;
3336
0
}
3337
3338
unsigned fastEmit_X86ISD_CVTP2UI_MVT_v8f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3339
switch (RetVT.SimpleTy) {
3340
  case MVT::v8i32: return fastEmit_X86ISD_CVTP2UI_MVT_v8f32_MVT_v8i32_r(Op0, Op0IsKill);
3341
  case MVT::v8i64: return fastEmit_X86ISD_CVTP2UI_MVT_v8f32_MVT_v8i64_r(Op0, Op0IsKill);
3342
  default: return 0;
3343
}
3344
}
3345
3346
0
unsigned fastEmit_X86ISD_CVTP2UI_MVT_v16f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3347
0
  if (RetVT.SimpleTy != MVT::v16i32)
3348
0
    return 0;
3349
0
  if ((Subtarget->hasAVX512())) {
3350
0
    return fastEmitInst_r(X86::VCVTPS2UDQZrr, &X86::VR512RegClass, Op0, Op0IsKill);
3351
0
  }
3352
0
  return 0;
3353
0
}
3354
3355
0
unsigned fastEmit_X86ISD_CVTP2UI_MVT_v2f64_MVT_v4i32_r(unsigned Op0, bool Op0IsKill) {
3356
0
  if ((Subtarget->hasVLX())) {
3357
0
    return fastEmitInst_r(X86::VCVTPD2UDQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
3358
0
  }
3359
0
  return 0;
3360
0
}
3361
3362
0
unsigned fastEmit_X86ISD_CVTP2UI_MVT_v2f64_MVT_v2i64_r(unsigned Op0, bool Op0IsKill) {
3363
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
3364
0
    return fastEmitInst_r(X86::VCVTPD2UQQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
3365
0
  }
3366
0
  return 0;
3367
0
}
3368
3369
unsigned fastEmit_X86ISD_CVTP2UI_MVT_v2f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3370
switch (RetVT.SimpleTy) {
3371
  case MVT::v4i32: return fastEmit_X86ISD_CVTP2UI_MVT_v2f64_MVT_v4i32_r(Op0, Op0IsKill);
3372
  case MVT::v2i64: return fastEmit_X86ISD_CVTP2UI_MVT_v2f64_MVT_v2i64_r(Op0, Op0IsKill);
3373
  default: return 0;
3374
}
3375
}
3376
3377
0
unsigned fastEmit_X86ISD_CVTP2UI_MVT_v4f64_MVT_v4i32_r(unsigned Op0, bool Op0IsKill) {
3378
0
  if ((Subtarget->hasVLX())) {
3379
0
    return fastEmitInst_r(X86::VCVTPD2UDQZ256rr, &X86::VR128XRegClass, Op0, Op0IsKill);
3380
0
  }
3381
0
  return 0;
3382
0
}
3383
3384
0
unsigned fastEmit_X86ISD_CVTP2UI_MVT_v4f64_MVT_v4i64_r(unsigned Op0, bool Op0IsKill) {
3385
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
3386
0
    return fastEmitInst_r(X86::VCVTPD2UQQZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
3387
0
  }
3388
0
  return 0;
3389
0
}
3390
3391
unsigned fastEmit_X86ISD_CVTP2UI_MVT_v4f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3392
switch (RetVT.SimpleTy) {
3393
  case MVT::v4i32: return fastEmit_X86ISD_CVTP2UI_MVT_v4f64_MVT_v4i32_r(Op0, Op0IsKill);
3394
  case MVT::v4i64: return fastEmit_X86ISD_CVTP2UI_MVT_v4f64_MVT_v4i64_r(Op0, Op0IsKill);
3395
  default: return 0;
3396
}
3397
}
3398
3399
0
unsigned fastEmit_X86ISD_CVTP2UI_MVT_v8f64_MVT_v8i32_r(unsigned Op0, bool Op0IsKill) {
3400
0
  if ((Subtarget->hasAVX512())) {
3401
0
    return fastEmitInst_r(X86::VCVTPD2UDQZrr, &X86::VR256XRegClass, Op0, Op0IsKill);
3402
0
  }
3403
0
  return 0;
3404
0
}
3405
3406
0
unsigned fastEmit_X86ISD_CVTP2UI_MVT_v8f64_MVT_v8i64_r(unsigned Op0, bool Op0IsKill) {
3407
0
  if ((Subtarget->hasDQI())) {
3408
0
    return fastEmitInst_r(X86::VCVTPD2UQQZrr, &X86::VR512RegClass, Op0, Op0IsKill);
3409
0
  }
3410
0
  return 0;
3411
0
}
3412
3413
unsigned fastEmit_X86ISD_CVTP2UI_MVT_v8f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3414
switch (RetVT.SimpleTy) {
3415
  case MVT::v8i32: return fastEmit_X86ISD_CVTP2UI_MVT_v8f64_MVT_v8i32_r(Op0, Op0IsKill);
3416
  case MVT::v8i64: return fastEmit_X86ISD_CVTP2UI_MVT_v8f64_MVT_v8i64_r(Op0, Op0IsKill);
3417
  default: return 0;
3418
}
3419
}
3420
3421
unsigned fastEmit_X86ISD_CVTP2UI_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
3422
  switch (VT.SimpleTy) {
3423
  case MVT::v4f32: return fastEmit_X86ISD_CVTP2UI_MVT_v4f32_r(RetVT, Op0, Op0IsKill);
3424
  case MVT::v8f32: return fastEmit_X86ISD_CVTP2UI_MVT_v8f32_r(RetVT, Op0, Op0IsKill);
3425
  case MVT::v16f32: return fastEmit_X86ISD_CVTP2UI_MVT_v16f32_r(RetVT, Op0, Op0IsKill);
3426
  case MVT::v2f64: return fastEmit_X86ISD_CVTP2UI_MVT_v2f64_r(RetVT, Op0, Op0IsKill);
3427
  case MVT::v4f64: return fastEmit_X86ISD_CVTP2UI_MVT_v4f64_r(RetVT, Op0, Op0IsKill);
3428
  case MVT::v8f64: return fastEmit_X86ISD_CVTP2UI_MVT_v8f64_r(RetVT, Op0, Op0IsKill);
3429
  default: return 0;
3430
  }
3431
}
3432
3433
// FastEmit functions for X86ISD::CVTPH2PS.
3434
3435
0
unsigned fastEmit_X86ISD_CVTPH2PS_MVT_v8i16_MVT_v4f32_r(unsigned Op0, bool Op0IsKill) {
3436
0
  if ((Subtarget->hasVLX())) {
3437
0
    return fastEmitInst_r(X86::VCVTPH2PSZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
3438
0
  }
3439
0
  if ((Subtarget->hasF16C()) && (!Subtarget->hasVLX())) {
3440
0
    return fastEmitInst_r(X86::VCVTPH2PSrr, &X86::VR128RegClass, Op0, Op0IsKill);
3441
0
  }
3442
0
  return 0;
3443
0
}
3444
3445
0
unsigned fastEmit_X86ISD_CVTPH2PS_MVT_v8i16_MVT_v8f32_r(unsigned Op0, bool Op0IsKill) {
3446
0
  if ((Subtarget->hasVLX())) {
3447
0
    return fastEmitInst_r(X86::VCVTPH2PSZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
3448
0
  }
3449
0
  if ((Subtarget->hasF16C()) && (!Subtarget->hasVLX())) {
3450
0
    return fastEmitInst_r(X86::VCVTPH2PSYrr, &X86::VR256RegClass, Op0, Op0IsKill);
3451
0
  }
3452
0
  return 0;
3453
0
}
3454
3455
unsigned fastEmit_X86ISD_CVTPH2PS_MVT_v8i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3456
switch (RetVT.SimpleTy) {
3457
  case MVT::v4f32: return fastEmit_X86ISD_CVTPH2PS_MVT_v8i16_MVT_v4f32_r(Op0, Op0IsKill);
3458
  case MVT::v8f32: return fastEmit_X86ISD_CVTPH2PS_MVT_v8i16_MVT_v8f32_r(Op0, Op0IsKill);
3459
  default: return 0;
3460
}
3461
}
3462
3463
0
unsigned fastEmit_X86ISD_CVTPH2PS_MVT_v16i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3464
0
  if (RetVT.SimpleTy != MVT::v16f32)
3465
0
    return 0;
3466
0
  if ((Subtarget->hasAVX512())) {
3467
0
    return fastEmitInst_r(X86::VCVTPH2PSZrr, &X86::VR512RegClass, Op0, Op0IsKill);
3468
0
  }
3469
0
  return 0;
3470
0
}
3471
3472
unsigned fastEmit_X86ISD_CVTPH2PS_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
3473
  switch (VT.SimpleTy) {
3474
  case MVT::v8i16: return fastEmit_X86ISD_CVTPH2PS_MVT_v8i16_r(RetVT, Op0, Op0IsKill);
3475
  case MVT::v16i16: return fastEmit_X86ISD_CVTPH2PS_MVT_v16i16_r(RetVT, Op0, Op0IsKill);
3476
  default: return 0;
3477
  }
3478
}
3479
3480
// FastEmit functions for X86ISD::CVTS2SI.
3481
3482
0
unsigned fastEmit_X86ISD_CVTS2SI_MVT_v4f32_MVT_i32_r(unsigned Op0, bool Op0IsKill) {
3483
0
  if ((Subtarget->hasAVX512())) {
3484
0
    return fastEmitInst_r(X86::VCVTSS2SIZrr_Int, &X86::GR32RegClass, Op0, Op0IsKill);
3485
0
  }
3486
0
  if ((Subtarget->hasSSE1() && !Subtarget->hasAVX())) {
3487
0
    return fastEmitInst_r(X86::CVTSS2SIrr_Int, &X86::GR32RegClass, Op0, Op0IsKill);
3488
0
  }
3489
0
  if ((Subtarget->hasAVX() && !Subtarget->hasAVX512())) {
3490
0
    return fastEmitInst_r(X86::VCVTSS2SIrr_Int, &X86::GR32RegClass, Op0, Op0IsKill);
3491
0
  }
3492
0
  return 0;
3493
0
}
3494
3495
0
unsigned fastEmit_X86ISD_CVTS2SI_MVT_v4f32_MVT_i64_r(unsigned Op0, bool Op0IsKill) {
3496
0
  if ((Subtarget->hasAVX512())) {
3497
0
    return fastEmitInst_r(X86::VCVTSS2SI64Zrr_Int, &X86::GR64RegClass, Op0, Op0IsKill);
3498
0
  }
3499
0
  if ((Subtarget->hasSSE1() && !Subtarget->hasAVX())) {
3500
0
    return fastEmitInst_r(X86::CVTSS2SI64rr_Int, &X86::GR64RegClass, Op0, Op0IsKill);
3501
0
  }
3502
0
  if ((Subtarget->hasAVX() && !Subtarget->hasAVX512())) {
3503
0
    return fastEmitInst_r(X86::VCVTSS2SI64rr_Int, &X86::GR64RegClass, Op0, Op0IsKill);
3504
0
  }
3505
0
  return 0;
3506
0
}
3507
3508
unsigned fastEmit_X86ISD_CVTS2SI_MVT_v4f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3509
switch (RetVT.SimpleTy) {
3510
  case MVT::i32: return fastEmit_X86ISD_CVTS2SI_MVT_v4f32_MVT_i32_r(Op0, Op0IsKill);
3511
  case MVT::i64: return fastEmit_X86ISD_CVTS2SI_MVT_v4f32_MVT_i64_r(Op0, Op0IsKill);
3512
  default: return 0;
3513
}
3514
}
3515
3516
0
unsigned fastEmit_X86ISD_CVTS2SI_MVT_v2f64_MVT_i32_r(unsigned Op0, bool Op0IsKill) {
3517
0
  if ((Subtarget->hasAVX512())) {
3518
0
    return fastEmitInst_r(X86::VCVTSD2SIZrr_Int, &X86::GR32RegClass, Op0, Op0IsKill);
3519
0
  }
3520
0
  if ((Subtarget->hasSSE2() && !Subtarget->hasAVX())) {
3521
0
    return fastEmitInst_r(X86::CVTSD2SIrr_Int, &X86::GR32RegClass, Op0, Op0IsKill);
3522
0
  }
3523
0
  if ((Subtarget->hasAVX() && !Subtarget->hasAVX512())) {
3524
0
    return fastEmitInst_r(X86::VCVTSD2SIrr_Int, &X86::GR32RegClass, Op0, Op0IsKill);
3525
0
  }
3526
0
  return 0;
3527
0
}
3528
3529
0
unsigned fastEmit_X86ISD_CVTS2SI_MVT_v2f64_MVT_i64_r(unsigned Op0, bool Op0IsKill) {
3530
0
  if ((Subtarget->hasAVX512())) {
3531
0
    return fastEmitInst_r(X86::VCVTSD2SI64Zrr_Int, &X86::GR64RegClass, Op0, Op0IsKill);
3532
0
  }
3533
0
  if ((Subtarget->hasSSE2() && !Subtarget->hasAVX())) {
3534
0
    return fastEmitInst_r(X86::CVTSD2SI64rr_Int, &X86::GR64RegClass, Op0, Op0IsKill);
3535
0
  }
3536
0
  if ((Subtarget->hasAVX() && !Subtarget->hasAVX512())) {
3537
0
    return fastEmitInst_r(X86::VCVTSD2SI64rr_Int, &X86::GR64RegClass, Op0, Op0IsKill);
3538
0
  }
3539
0
  return 0;
3540
0
}
3541
3542
unsigned fastEmit_X86ISD_CVTS2SI_MVT_v2f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3543
switch (RetVT.SimpleTy) {
3544
  case MVT::i32: return fastEmit_X86ISD_CVTS2SI_MVT_v2f64_MVT_i32_r(Op0, Op0IsKill);
3545
  case MVT::i64: return fastEmit_X86ISD_CVTS2SI_MVT_v2f64_MVT_i64_r(Op0, Op0IsKill);
3546
  default: return 0;
3547
}
3548
}
3549
3550
unsigned fastEmit_X86ISD_CVTS2SI_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
3551
  switch (VT.SimpleTy) {
3552
  case MVT::v4f32: return fastEmit_X86ISD_CVTS2SI_MVT_v4f32_r(RetVT, Op0, Op0IsKill);
3553
  case MVT::v2f64: return fastEmit_X86ISD_CVTS2SI_MVT_v2f64_r(RetVT, Op0, Op0IsKill);
3554
  default: return 0;
3555
  }
3556
}
3557
3558
// FastEmit functions for X86ISD::CVTS2UI.
3559
3560
0
unsigned fastEmit_X86ISD_CVTS2UI_MVT_v4f32_MVT_i32_r(unsigned Op0, bool Op0IsKill) {
3561
0
  if ((Subtarget->hasAVX512())) {
3562
0
    return fastEmitInst_r(X86::VCVTSS2USIZrr_Int, &X86::GR32RegClass, Op0, Op0IsKill);
3563
0
  }
3564
0
  return 0;
3565
0
}
3566
3567
0
unsigned fastEmit_X86ISD_CVTS2UI_MVT_v4f32_MVT_i64_r(unsigned Op0, bool Op0IsKill) {
3568
0
  if ((Subtarget->hasAVX512())) {
3569
0
    return fastEmitInst_r(X86::VCVTSS2USI64Zrr_Int, &X86::GR64RegClass, Op0, Op0IsKill);
3570
0
  }
3571
0
  return 0;
3572
0
}
3573
3574
unsigned fastEmit_X86ISD_CVTS2UI_MVT_v4f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3575
switch (RetVT.SimpleTy) {
3576
  case MVT::i32: return fastEmit_X86ISD_CVTS2UI_MVT_v4f32_MVT_i32_r(Op0, Op0IsKill);
3577
  case MVT::i64: return fastEmit_X86ISD_CVTS2UI_MVT_v4f32_MVT_i64_r(Op0, Op0IsKill);
3578
  default: return 0;
3579
}
3580
}
3581
3582
0
unsigned fastEmit_X86ISD_CVTS2UI_MVT_v2f64_MVT_i32_r(unsigned Op0, bool Op0IsKill) {
3583
0
  if ((Subtarget->hasAVX512())) {
3584
0
    return fastEmitInst_r(X86::VCVTSD2USIZrr_Int, &X86::GR32RegClass, Op0, Op0IsKill);
3585
0
  }
3586
0
  return 0;
3587
0
}
3588
3589
0
unsigned fastEmit_X86ISD_CVTS2UI_MVT_v2f64_MVT_i64_r(unsigned Op0, bool Op0IsKill) {
3590
0
  if ((Subtarget->hasAVX512())) {
3591
0
    return fastEmitInst_r(X86::VCVTSD2USI64Zrr_Int, &X86::GR64RegClass, Op0, Op0IsKill);
3592
0
  }
3593
0
  return 0;
3594
0
}
3595
3596
unsigned fastEmit_X86ISD_CVTS2UI_MVT_v2f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3597
switch (RetVT.SimpleTy) {
3598
  case MVT::i32: return fastEmit_X86ISD_CVTS2UI_MVT_v2f64_MVT_i32_r(Op0, Op0IsKill);
3599
  case MVT::i64: return fastEmit_X86ISD_CVTS2UI_MVT_v2f64_MVT_i64_r(Op0, Op0IsKill);
3600
  default: return 0;
3601
}
3602
}
3603
3604
unsigned fastEmit_X86ISD_CVTS2UI_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
3605
  switch (VT.SimpleTy) {
3606
  case MVT::v4f32: return fastEmit_X86ISD_CVTS2UI_MVT_v4f32_r(RetVT, Op0, Op0IsKill);
3607
  case MVT::v2f64: return fastEmit_X86ISD_CVTS2UI_MVT_v2f64_r(RetVT, Op0, Op0IsKill);
3608
  default: return 0;
3609
  }
3610
}
3611
3612
// FastEmit functions for X86ISD::CVTSI2P.
3613
3614
0
unsigned fastEmit_X86ISD_CVTSI2P_MVT_v4i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3615
0
  if (RetVT.SimpleTy != MVT::v2f64)
3616
0
    return 0;
3617
0
  if ((Subtarget->hasVLX())) {
3618
0
    return fastEmitInst_r(X86::VCVTDQ2PDZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
3619
0
  }
3620
0
  if ((Subtarget->hasSSE2() && !Subtarget->hasAVX())) {
3621
0
    return fastEmitInst_r(X86::CVTDQ2PDrr, &X86::VR128RegClass, Op0, Op0IsKill);
3622
0
  }
3623
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
3624
0
    return fastEmitInst_r(X86::VCVTDQ2PDrr, &X86::VR128RegClass, Op0, Op0IsKill);
3625
0
  }
3626
0
  return 0;
3627
0
}
3628
3629
0
unsigned fastEmit_X86ISD_CVTSI2P_MVT_v2i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3630
0
  if (RetVT.SimpleTy != MVT::v4f32)
3631
0
    return 0;
3632
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
3633
0
    return fastEmitInst_r(X86::VCVTQQ2PSZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
3634
0
  }
3635
0
  return 0;
3636
0
}
3637
3638
unsigned fastEmit_X86ISD_CVTSI2P_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
3639
  switch (VT.SimpleTy) {
3640
  case MVT::v4i32: return fastEmit_X86ISD_CVTSI2P_MVT_v4i32_r(RetVT, Op0, Op0IsKill);
3641
  case MVT::v2i64: return fastEmit_X86ISD_CVTSI2P_MVT_v2i64_r(RetVT, Op0, Op0IsKill);
3642
  default: return 0;
3643
  }
3644
}
3645
3646
// FastEmit functions for X86ISD::CVTTP2SI.
3647
3648
0
unsigned fastEmit_X86ISD_CVTTP2SI_MVT_v4f32_MVT_v4i32_r(unsigned Op0, bool Op0IsKill) {
3649
0
  if ((Subtarget->hasVLX())) {
3650
0
    return fastEmitInst_r(X86::VCVTTPS2DQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
3651
0
  }
3652
0
  if ((Subtarget->hasSSE2() && !Subtarget->hasAVX())) {
3653
0
    return fastEmitInst_r(X86::CVTTPS2DQrr, &X86::VR128RegClass, Op0, Op0IsKill);
3654
0
  }
3655
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
3656
0
    return fastEmitInst_r(X86::VCVTTPS2DQrr, &X86::VR128RegClass, Op0, Op0IsKill);
3657
0
  }
3658
0
  return 0;
3659
0
}
3660
3661
0
unsigned fastEmit_X86ISD_CVTTP2SI_MVT_v4f32_MVT_v2i64_r(unsigned Op0, bool Op0IsKill) {
3662
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
3663
0
    return fastEmitInst_r(X86::VCVTTPS2QQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
3664
0
  }
3665
0
  return 0;
3666
0
}
3667
3668
0
unsigned fastEmit_X86ISD_CVTTP2SI_MVT_v4f32_MVT_v4i64_r(unsigned Op0, bool Op0IsKill) {
3669
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
3670
0
    return fastEmitInst_r(X86::VCVTTPS2QQZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
3671
0
  }
3672
0
  return 0;
3673
0
}
3674
3675
unsigned fastEmit_X86ISD_CVTTP2SI_MVT_v4f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3676
switch (RetVT.SimpleTy) {
3677
  case MVT::v4i32: return fastEmit_X86ISD_CVTTP2SI_MVT_v4f32_MVT_v4i32_r(Op0, Op0IsKill);
3678
  case MVT::v2i64: return fastEmit_X86ISD_CVTTP2SI_MVT_v4f32_MVT_v2i64_r(Op0, Op0IsKill);
3679
  case MVT::v4i64: return fastEmit_X86ISD_CVTTP2SI_MVT_v4f32_MVT_v4i64_r(Op0, Op0IsKill);
3680
  default: return 0;
3681
}
3682
}
3683
3684
0
unsigned fastEmit_X86ISD_CVTTP2SI_MVT_v8f32_MVT_v8i32_r(unsigned Op0, bool Op0IsKill) {
3685
0
  if ((Subtarget->hasVLX())) {
3686
0
    return fastEmitInst_r(X86::VCVTTPS2DQZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
3687
0
  }
3688
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
3689
0
    return fastEmitInst_r(X86::VCVTTPS2DQYrr, &X86::VR256RegClass, Op0, Op0IsKill);
3690
0
  }
3691
0
  return 0;
3692
0
}
3693
3694
0
unsigned fastEmit_X86ISD_CVTTP2SI_MVT_v8f32_MVT_v8i64_r(unsigned Op0, bool Op0IsKill) {
3695
0
  if ((Subtarget->hasDQI())) {
3696
0
    return fastEmitInst_r(X86::VCVTTPS2QQZrr, &X86::VR512RegClass, Op0, Op0IsKill);
3697
0
  }
3698
0
  return 0;
3699
0
}
3700
3701
unsigned fastEmit_X86ISD_CVTTP2SI_MVT_v8f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3702
switch (RetVT.SimpleTy) {
3703
  case MVT::v8i32: return fastEmit_X86ISD_CVTTP2SI_MVT_v8f32_MVT_v8i32_r(Op0, Op0IsKill);
3704
  case MVT::v8i64: return fastEmit_X86ISD_CVTTP2SI_MVT_v8f32_MVT_v8i64_r(Op0, Op0IsKill);
3705
  default: return 0;
3706
}
3707
}
3708
3709
0
unsigned fastEmit_X86ISD_CVTTP2SI_MVT_v16f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3710
0
  if (RetVT.SimpleTy != MVT::v16i32)
3711
0
    return 0;
3712
0
  if ((Subtarget->hasAVX512())) {
3713
0
    return fastEmitInst_r(X86::VCVTTPS2DQZrr, &X86::VR512RegClass, Op0, Op0IsKill);
3714
0
  }
3715
0
  return 0;
3716
0
}
3717
3718
0
unsigned fastEmit_X86ISD_CVTTP2SI_MVT_v2f64_MVT_v4i32_r(unsigned Op0, bool Op0IsKill) {
3719
0
  if ((Subtarget->hasVLX())) {
3720
0
    return fastEmitInst_r(X86::VCVTTPD2DQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
3721
0
  }
3722
0
  if ((Subtarget->hasSSE2() && !Subtarget->hasAVX())) {
3723
0
    return fastEmitInst_r(X86::CVTTPD2DQrr, &X86::VR128RegClass, Op0, Op0IsKill);
3724
0
  }
3725
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
3726
0
    return fastEmitInst_r(X86::VCVTTPD2DQrr, &X86::VR128RegClass, Op0, Op0IsKill);
3727
0
  }
3728
0
  return 0;
3729
0
}
3730
3731
0
unsigned fastEmit_X86ISD_CVTTP2SI_MVT_v2f64_MVT_v2i64_r(unsigned Op0, bool Op0IsKill) {
3732
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
3733
0
    return fastEmitInst_r(X86::VCVTTPD2QQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
3734
0
  }
3735
0
  return 0;
3736
0
}
3737
3738
unsigned fastEmit_X86ISD_CVTTP2SI_MVT_v2f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3739
switch (RetVT.SimpleTy) {
3740
  case MVT::v4i32: return fastEmit_X86ISD_CVTTP2SI_MVT_v2f64_MVT_v4i32_r(Op0, Op0IsKill);
3741
  case MVT::v2i64: return fastEmit_X86ISD_CVTTP2SI_MVT_v2f64_MVT_v2i64_r(Op0, Op0IsKill);
3742
  default: return 0;
3743
}
3744
}
3745
3746
0
unsigned fastEmit_X86ISD_CVTTP2SI_MVT_v4f64_MVT_v4i32_r(unsigned Op0, bool Op0IsKill) {
3747
0
  if ((Subtarget->hasVLX())) {
3748
0
    return fastEmitInst_r(X86::VCVTTPD2DQZ256rr, &X86::VR128XRegClass, Op0, Op0IsKill);
3749
0
  }
3750
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
3751
0
    return fastEmitInst_r(X86::VCVTTPD2DQYrr, &X86::VR128RegClass, Op0, Op0IsKill);
3752
0
  }
3753
0
  return 0;
3754
0
}
3755
3756
0
unsigned fastEmit_X86ISD_CVTTP2SI_MVT_v4f64_MVT_v4i64_r(unsigned Op0, bool Op0IsKill) {
3757
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
3758
0
    return fastEmitInst_r(X86::VCVTTPD2QQZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
3759
0
  }
3760
0
  return 0;
3761
0
}
3762
3763
unsigned fastEmit_X86ISD_CVTTP2SI_MVT_v4f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3764
switch (RetVT.SimpleTy) {
3765
  case MVT::v4i32: return fastEmit_X86ISD_CVTTP2SI_MVT_v4f64_MVT_v4i32_r(Op0, Op0IsKill);
3766
  case MVT::v4i64: return fastEmit_X86ISD_CVTTP2SI_MVT_v4f64_MVT_v4i64_r(Op0, Op0IsKill);
3767
  default: return 0;
3768
}
3769
}
3770
3771
0
unsigned fastEmit_X86ISD_CVTTP2SI_MVT_v8f64_MVT_v8i32_r(unsigned Op0, bool Op0IsKill) {
3772
0
  if ((Subtarget->hasAVX512())) {
3773
0
    return fastEmitInst_r(X86::VCVTTPD2DQZrr, &X86::VR256XRegClass, Op0, Op0IsKill);
3774
0
  }
3775
0
  return 0;
3776
0
}
3777
3778
0
unsigned fastEmit_X86ISD_CVTTP2SI_MVT_v8f64_MVT_v8i64_r(unsigned Op0, bool Op0IsKill) {
3779
0
  if ((Subtarget->hasDQI())) {
3780
0
    return fastEmitInst_r(X86::VCVTTPD2QQZrr, &X86::VR512RegClass, Op0, Op0IsKill);
3781
0
  }
3782
0
  return 0;
3783
0
}
3784
3785
unsigned fastEmit_X86ISD_CVTTP2SI_MVT_v8f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3786
switch (RetVT.SimpleTy) {
3787
  case MVT::v8i32: return fastEmit_X86ISD_CVTTP2SI_MVT_v8f64_MVT_v8i32_r(Op0, Op0IsKill);
3788
  case MVT::v8i64: return fastEmit_X86ISD_CVTTP2SI_MVT_v8f64_MVT_v8i64_r(Op0, Op0IsKill);
3789
  default: return 0;
3790
}
3791
}
3792
3793
unsigned fastEmit_X86ISD_CVTTP2SI_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
3794
  switch (VT.SimpleTy) {
3795
  case MVT::v4f32: return fastEmit_X86ISD_CVTTP2SI_MVT_v4f32_r(RetVT, Op0, Op0IsKill);
3796
  case MVT::v8f32: return fastEmit_X86ISD_CVTTP2SI_MVT_v8f32_r(RetVT, Op0, Op0IsKill);
3797
  case MVT::v16f32: return fastEmit_X86ISD_CVTTP2SI_MVT_v16f32_r(RetVT, Op0, Op0IsKill);
3798
  case MVT::v2f64: return fastEmit_X86ISD_CVTTP2SI_MVT_v2f64_r(RetVT, Op0, Op0IsKill);
3799
  case MVT::v4f64: return fastEmit_X86ISD_CVTTP2SI_MVT_v4f64_r(RetVT, Op0, Op0IsKill);
3800
  case MVT::v8f64: return fastEmit_X86ISD_CVTTP2SI_MVT_v8f64_r(RetVT, Op0, Op0IsKill);
3801
  default: return 0;
3802
  }
3803
}
3804
3805
// FastEmit functions for X86ISD::CVTTP2UI.
3806
3807
0
unsigned fastEmit_X86ISD_CVTTP2UI_MVT_v4f32_MVT_v4i32_r(unsigned Op0, bool Op0IsKill) {
3808
0
  if ((Subtarget->hasVLX())) {
3809
0
    return fastEmitInst_r(X86::VCVTTPS2UDQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
3810
0
  }
3811
0
  return 0;
3812
0
}
3813
3814
0
unsigned fastEmit_X86ISD_CVTTP2UI_MVT_v4f32_MVT_v2i64_r(unsigned Op0, bool Op0IsKill) {
3815
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
3816
0
    return fastEmitInst_r(X86::VCVTTPS2UQQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
3817
0
  }
3818
0
  return 0;
3819
0
}
3820
3821
0
unsigned fastEmit_X86ISD_CVTTP2UI_MVT_v4f32_MVT_v4i64_r(unsigned Op0, bool Op0IsKill) {
3822
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
3823
0
    return fastEmitInst_r(X86::VCVTTPS2UQQZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
3824
0
  }
3825
0
  return 0;
3826
0
}
3827
3828
unsigned fastEmit_X86ISD_CVTTP2UI_MVT_v4f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3829
switch (RetVT.SimpleTy) {
3830
  case MVT::v4i32: return fastEmit_X86ISD_CVTTP2UI_MVT_v4f32_MVT_v4i32_r(Op0, Op0IsKill);
3831
  case MVT::v2i64: return fastEmit_X86ISD_CVTTP2UI_MVT_v4f32_MVT_v2i64_r(Op0, Op0IsKill);
3832
  case MVT::v4i64: return fastEmit_X86ISD_CVTTP2UI_MVT_v4f32_MVT_v4i64_r(Op0, Op0IsKill);
3833
  default: return 0;
3834
}
3835
}
3836
3837
0
unsigned fastEmit_X86ISD_CVTTP2UI_MVT_v8f32_MVT_v8i32_r(unsigned Op0, bool Op0IsKill) {
3838
0
  if ((Subtarget->hasVLX())) {
3839
0
    return fastEmitInst_r(X86::VCVTTPS2UDQZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
3840
0
  }
3841
0
  return 0;
3842
0
}
3843
3844
0
unsigned fastEmit_X86ISD_CVTTP2UI_MVT_v8f32_MVT_v8i64_r(unsigned Op0, bool Op0IsKill) {
3845
0
  if ((Subtarget->hasDQI())) {
3846
0
    return fastEmitInst_r(X86::VCVTTPS2UQQZrr, &X86::VR512RegClass, Op0, Op0IsKill);
3847
0
  }
3848
0
  return 0;
3849
0
}
3850
3851
unsigned fastEmit_X86ISD_CVTTP2UI_MVT_v8f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3852
switch (RetVT.SimpleTy) {
3853
  case MVT::v8i32: return fastEmit_X86ISD_CVTTP2UI_MVT_v8f32_MVT_v8i32_r(Op0, Op0IsKill);
3854
  case MVT::v8i64: return fastEmit_X86ISD_CVTTP2UI_MVT_v8f32_MVT_v8i64_r(Op0, Op0IsKill);
3855
  default: return 0;
3856
}
3857
}
3858
3859
0
unsigned fastEmit_X86ISD_CVTTP2UI_MVT_v16f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3860
0
  if (RetVT.SimpleTy != MVT::v16i32)
3861
0
    return 0;
3862
0
  if ((Subtarget->hasAVX512())) {
3863
0
    return fastEmitInst_r(X86::VCVTTPS2UDQZrr, &X86::VR512RegClass, Op0, Op0IsKill);
3864
0
  }
3865
0
  return 0;
3866
0
}
3867
3868
0
unsigned fastEmit_X86ISD_CVTTP2UI_MVT_v2f64_MVT_v4i32_r(unsigned Op0, bool Op0IsKill) {
3869
0
  if ((Subtarget->hasVLX())) {
3870
0
    return fastEmitInst_r(X86::VCVTTPD2UDQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
3871
0
  }
3872
0
  return 0;
3873
0
}
3874
3875
0
unsigned fastEmit_X86ISD_CVTTP2UI_MVT_v2f64_MVT_v2i64_r(unsigned Op0, bool Op0IsKill) {
3876
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
3877
0
    return fastEmitInst_r(X86::VCVTTPD2UQQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
3878
0
  }
3879
0
  return 0;
3880
0
}
3881
3882
unsigned fastEmit_X86ISD_CVTTP2UI_MVT_v2f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3883
switch (RetVT.SimpleTy) {
3884
  case MVT::v4i32: return fastEmit_X86ISD_CVTTP2UI_MVT_v2f64_MVT_v4i32_r(Op0, Op0IsKill);
3885
  case MVT::v2i64: return fastEmit_X86ISD_CVTTP2UI_MVT_v2f64_MVT_v2i64_r(Op0, Op0IsKill);
3886
  default: return 0;
3887
}
3888
}
3889
3890
0
unsigned fastEmit_X86ISD_CVTTP2UI_MVT_v4f64_MVT_v4i32_r(unsigned Op0, bool Op0IsKill) {
3891
0
  if ((Subtarget->hasVLX())) {
3892
0
    return fastEmitInst_r(X86::VCVTTPD2UDQZ256rr, &X86::VR128XRegClass, Op0, Op0IsKill);
3893
0
  }
3894
0
  return 0;
3895
0
}
3896
3897
0
unsigned fastEmit_X86ISD_CVTTP2UI_MVT_v4f64_MVT_v4i64_r(unsigned Op0, bool Op0IsKill) {
3898
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
3899
0
    return fastEmitInst_r(X86::VCVTTPD2UQQZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
3900
0
  }
3901
0
  return 0;
3902
0
}
3903
3904
unsigned fastEmit_X86ISD_CVTTP2UI_MVT_v4f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3905
switch (RetVT.SimpleTy) {
3906
  case MVT::v4i32: return fastEmit_X86ISD_CVTTP2UI_MVT_v4f64_MVT_v4i32_r(Op0, Op0IsKill);
3907
  case MVT::v4i64: return fastEmit_X86ISD_CVTTP2UI_MVT_v4f64_MVT_v4i64_r(Op0, Op0IsKill);
3908
  default: return 0;
3909
}
3910
}
3911
3912
0
unsigned fastEmit_X86ISD_CVTTP2UI_MVT_v8f64_MVT_v8i32_r(unsigned Op0, bool Op0IsKill) {
3913
0
  if ((Subtarget->hasAVX512())) {
3914
0
    return fastEmitInst_r(X86::VCVTTPD2UDQZrr, &X86::VR256XRegClass, Op0, Op0IsKill);
3915
0
  }
3916
0
  return 0;
3917
0
}
3918
3919
0
unsigned fastEmit_X86ISD_CVTTP2UI_MVT_v8f64_MVT_v8i64_r(unsigned Op0, bool Op0IsKill) {
3920
0
  if ((Subtarget->hasDQI())) {
3921
0
    return fastEmitInst_r(X86::VCVTTPD2UQQZrr, &X86::VR512RegClass, Op0, Op0IsKill);
3922
0
  }
3923
0
  return 0;
3924
0
}
3925
3926
unsigned fastEmit_X86ISD_CVTTP2UI_MVT_v8f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3927
switch (RetVT.SimpleTy) {
3928
  case MVT::v8i32: return fastEmit_X86ISD_CVTTP2UI_MVT_v8f64_MVT_v8i32_r(Op0, Op0IsKill);
3929
  case MVT::v8i64: return fastEmit_X86ISD_CVTTP2UI_MVT_v8f64_MVT_v8i64_r(Op0, Op0IsKill);
3930
  default: return 0;
3931
}
3932
}
3933
3934
unsigned fastEmit_X86ISD_CVTTP2UI_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
3935
  switch (VT.SimpleTy) {
3936
  case MVT::v4f32: return fastEmit_X86ISD_CVTTP2UI_MVT_v4f32_r(RetVT, Op0, Op0IsKill);
3937
  case MVT::v8f32: return fastEmit_X86ISD_CVTTP2UI_MVT_v8f32_r(RetVT, Op0, Op0IsKill);
3938
  case MVT::v16f32: return fastEmit_X86ISD_CVTTP2UI_MVT_v16f32_r(RetVT, Op0, Op0IsKill);
3939
  case MVT::v2f64: return fastEmit_X86ISD_CVTTP2UI_MVT_v2f64_r(RetVT, Op0, Op0IsKill);
3940
  case MVT::v4f64: return fastEmit_X86ISD_CVTTP2UI_MVT_v4f64_r(RetVT, Op0, Op0IsKill);
3941
  case MVT::v8f64: return fastEmit_X86ISD_CVTTP2UI_MVT_v8f64_r(RetVT, Op0, Op0IsKill);
3942
  default: return 0;
3943
  }
3944
}
3945
3946
// FastEmit functions for X86ISD::CVTTS2SI.
3947
3948
0
unsigned fastEmit_X86ISD_CVTTS2SI_MVT_v4f32_MVT_i32_r(unsigned Op0, bool Op0IsKill) {
3949
0
  if ((Subtarget->hasAVX512())) {
3950
0
    return fastEmitInst_r(X86::VCVTTSS2SIZrr_Int, &X86::GR32RegClass, Op0, Op0IsKill);
3951
0
  }
3952
0
  if ((Subtarget->hasSSE1() && !Subtarget->hasAVX())) {
3953
0
    return fastEmitInst_r(X86::CVTTSS2SIrr_Int, &X86::GR32RegClass, Op0, Op0IsKill);
3954
0
  }
3955
0
  if ((Subtarget->hasAVX() && !Subtarget->hasAVX512())) {
3956
0
    return fastEmitInst_r(X86::VCVTTSS2SIrr_Int, &X86::GR32RegClass, Op0, Op0IsKill);
3957
0
  }
3958
0
  return 0;
3959
0
}
3960
3961
0
unsigned fastEmit_X86ISD_CVTTS2SI_MVT_v4f32_MVT_i64_r(unsigned Op0, bool Op0IsKill) {
3962
0
  if ((Subtarget->hasAVX512())) {
3963
0
    return fastEmitInst_r(X86::VCVTTSS2SI64Zrr_Int, &X86::GR64RegClass, Op0, Op0IsKill);
3964
0
  }
3965
0
  if ((Subtarget->hasSSE1() && !Subtarget->hasAVX())) {
3966
0
    return fastEmitInst_r(X86::CVTTSS2SI64rr_Int, &X86::GR64RegClass, Op0, Op0IsKill);
3967
0
  }
3968
0
  if ((Subtarget->hasAVX() && !Subtarget->hasAVX512())) {
3969
0
    return fastEmitInst_r(X86::VCVTTSS2SI64rr_Int, &X86::GR64RegClass, Op0, Op0IsKill);
3970
0
  }
3971
0
  return 0;
3972
0
}
3973
3974
unsigned fastEmit_X86ISD_CVTTS2SI_MVT_v4f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3975
switch (RetVT.SimpleTy) {
3976
  case MVT::i32: return fastEmit_X86ISD_CVTTS2SI_MVT_v4f32_MVT_i32_r(Op0, Op0IsKill);
3977
  case MVT::i64: return fastEmit_X86ISD_CVTTS2SI_MVT_v4f32_MVT_i64_r(Op0, Op0IsKill);
3978
  default: return 0;
3979
}
3980
}
3981
3982
0
unsigned fastEmit_X86ISD_CVTTS2SI_MVT_v2f64_MVT_i32_r(unsigned Op0, bool Op0IsKill) {
3983
0
  if ((Subtarget->hasAVX512())) {
3984
0
    return fastEmitInst_r(X86::VCVTTSD2SIZrr_Int, &X86::GR32RegClass, Op0, Op0IsKill);
3985
0
  }
3986
0
  if ((Subtarget->hasSSE2() && !Subtarget->hasAVX())) {
3987
0
    return fastEmitInst_r(X86::CVTTSD2SIrr_Int, &X86::GR32RegClass, Op0, Op0IsKill);
3988
0
  }
3989
0
  if ((Subtarget->hasAVX() && !Subtarget->hasAVX512())) {
3990
0
    return fastEmitInst_r(X86::VCVTTSD2SIrr_Int, &X86::GR32RegClass, Op0, Op0IsKill);
3991
0
  }
3992
0
  return 0;
3993
0
}
3994
3995
0
unsigned fastEmit_X86ISD_CVTTS2SI_MVT_v2f64_MVT_i64_r(unsigned Op0, bool Op0IsKill) {
3996
0
  if ((Subtarget->hasAVX512())) {
3997
0
    return fastEmitInst_r(X86::VCVTTSD2SI64Zrr_Int, &X86::GR64RegClass, Op0, Op0IsKill);
3998
0
  }
3999
0
  if ((Subtarget->hasSSE2() && !Subtarget->hasAVX())) {
4000
0
    return fastEmitInst_r(X86::CVTTSD2SI64rr_Int, &X86::GR64RegClass, Op0, Op0IsKill);
4001
0
  }
4002
0
  if ((Subtarget->hasAVX() && !Subtarget->hasAVX512())) {
4003
0
    return fastEmitInst_r(X86::VCVTTSD2SI64rr_Int, &X86::GR64RegClass, Op0, Op0IsKill);
4004
0
  }
4005
0
  return 0;
4006
0
}
4007
4008
unsigned fastEmit_X86ISD_CVTTS2SI_MVT_v2f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4009
switch (RetVT.SimpleTy) {
4010
  case MVT::i32: return fastEmit_X86ISD_CVTTS2SI_MVT_v2f64_MVT_i32_r(Op0, Op0IsKill);
4011
  case MVT::i64: return fastEmit_X86ISD_CVTTS2SI_MVT_v2f64_MVT_i64_r(Op0, Op0IsKill);
4012
  default: return 0;
4013
}
4014
}
4015
4016
unsigned fastEmit_X86ISD_CVTTS2SI_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
4017
  switch (VT.SimpleTy) {
4018
  case MVT::v4f32: return fastEmit_X86ISD_CVTTS2SI_MVT_v4f32_r(RetVT, Op0, Op0IsKill);
4019
  case MVT::v2f64: return fastEmit_X86ISD_CVTTS2SI_MVT_v2f64_r(RetVT, Op0, Op0IsKill);
4020
  default: return 0;
4021
  }
4022
}
4023
4024
// FastEmit functions for X86ISD::CVTTS2UI.
4025
4026
0
unsigned fastEmit_X86ISD_CVTTS2UI_MVT_v4f32_MVT_i32_r(unsigned Op0, bool Op0IsKill) {
4027
0
  if ((Subtarget->hasAVX512())) {
4028
0
    return fastEmitInst_r(X86::VCVTTSS2USIZrr_Int, &X86::GR32RegClass, Op0, Op0IsKill);
4029
0
  }
4030
0
  return 0;
4031
0
}
4032
4033
0
unsigned fastEmit_X86ISD_CVTTS2UI_MVT_v4f32_MVT_i64_r(unsigned Op0, bool Op0IsKill) {
4034
0
  if ((Subtarget->hasAVX512())) {
4035
0
    return fastEmitInst_r(X86::VCVTTSS2USI64Zrr_Int, &X86::GR64RegClass, Op0, Op0IsKill);
4036
0
  }
4037
0
  return 0;
4038
0
}
4039
4040
unsigned fastEmit_X86ISD_CVTTS2UI_MVT_v4f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4041
switch (RetVT.SimpleTy) {
4042
  case MVT::i32: return fastEmit_X86ISD_CVTTS2UI_MVT_v4f32_MVT_i32_r(Op0, Op0IsKill);
4043
  case MVT::i64: return fastEmit_X86ISD_CVTTS2UI_MVT_v4f32_MVT_i64_r(Op0, Op0IsKill);
4044
  default: return 0;
4045
}
4046
}
4047
4048
0
unsigned fastEmit_X86ISD_CVTTS2UI_MVT_v2f64_MVT_i32_r(unsigned Op0, bool Op0IsKill) {
4049
0
  if ((Subtarget->hasAVX512())) {
4050
0
    return fastEmitInst_r(X86::VCVTTSD2USIZrr_Int, &X86::GR32RegClass, Op0, Op0IsKill);
4051
0
  }
4052
0
  return 0;
4053
0
}
4054
4055
0
unsigned fastEmit_X86ISD_CVTTS2UI_MVT_v2f64_MVT_i64_r(unsigned Op0, bool Op0IsKill) {
4056
0
  if ((Subtarget->hasAVX512())) {
4057
0
    return fastEmitInst_r(X86::VCVTTSD2USI64Zrr_Int, &X86::GR64RegClass, Op0, Op0IsKill);
4058
0
  }
4059
0
  return 0;
4060
0
}
4061
4062
unsigned fastEmit_X86ISD_CVTTS2UI_MVT_v2f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4063
switch (RetVT.SimpleTy) {
4064
  case MVT::i32: return fastEmit_X86ISD_CVTTS2UI_MVT_v2f64_MVT_i32_r(Op0, Op0IsKill);
4065
  case MVT::i64: return fastEmit_X86ISD_CVTTS2UI_MVT_v2f64_MVT_i64_r(Op0, Op0IsKill);
4066
  default: return 0;
4067
}
4068
}
4069
4070
unsigned fastEmit_X86ISD_CVTTS2UI_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
4071
  switch (VT.SimpleTy) {
4072
  case MVT::v4f32: return fastEmit_X86ISD_CVTTS2UI_MVT_v4f32_r(RetVT, Op0, Op0IsKill);
4073
  case MVT::v2f64: return fastEmit_X86ISD_CVTTS2UI_MVT_v2f64_r(RetVT, Op0, Op0IsKill);
4074
  default: return 0;
4075
  }
4076
}
4077
4078
// FastEmit functions for X86ISD::CVTUI2P.
4079
4080
0
unsigned fastEmit_X86ISD_CVTUI2P_MVT_v4i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4081
0
  if (RetVT.SimpleTy != MVT::v2f64)
4082
0
    return 0;
4083
0
  if ((Subtarget->hasVLX())) {
4084
0
    return fastEmitInst_r(X86::VCVTUDQ2PDZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
4085
0
  }
4086
0
  return 0;
4087
0
}
4088
4089
0
unsigned fastEmit_X86ISD_CVTUI2P_MVT_v2i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4090
0
  if (RetVT.SimpleTy != MVT::v4f32)
4091
0
    return 0;
4092
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
4093
0
    return fastEmitInst_r(X86::VCVTUQQ2PSZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
4094
0
  }
4095
0
  return 0;
4096
0
}
4097
4098
unsigned fastEmit_X86ISD_CVTUI2P_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
4099
  switch (VT.SimpleTy) {
4100
  case MVT::v4i32: return fastEmit_X86ISD_CVTUI2P_MVT_v4i32_r(RetVT, Op0, Op0IsKill);
4101
  case MVT::v2i64: return fastEmit_X86ISD_CVTUI2P_MVT_v2i64_r(RetVT, Op0, Op0IsKill);
4102
  default: return 0;
4103
  }
4104
}
4105
4106
// FastEmit functions for X86ISD::EH_RETURN.
4107
4108
0
unsigned fastEmit_X86ISD_EH_RETURN_MVT_i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4109
0
  if (RetVT.SimpleTy != MVT::isVoid)
4110
0
    return 0;
4111
0
  return fastEmitInst_r(X86::EH_RETURN, &X86::GR32RegClass, Op0, Op0IsKill);
4112
0
}
4113
4114
0
unsigned fastEmit_X86ISD_EH_RETURN_MVT_i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4115
0
  if (RetVT.SimpleTy != MVT::isVoid)
4116
0
    return 0;
4117
0
  return fastEmitInst_r(X86::EH_RETURN64, &X86::GR64RegClass, Op0, Op0IsKill);
4118
0
}
4119
4120
unsigned fastEmit_X86ISD_EH_RETURN_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
4121
  switch (VT.SimpleTy) {
4122
  case MVT::i32: return fastEmit_X86ISD_EH_RETURN_MVT_i32_r(RetVT, Op0, Op0IsKill);
4123
  case MVT::i64: return fastEmit_X86ISD_EH_RETURN_MVT_i64_r(RetVT, Op0, Op0IsKill);
4124
  default: return 0;
4125
  }
4126
}
4127
4128
// FastEmit functions for X86ISD::EXPAND.
4129
4130
0
unsigned fastEmit_X86ISD_EXPAND_MVT_v16i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4131
0
  if (RetVT.SimpleTy != MVT::v16i8)
4132
0
    return 0;
4133
0
  if ((Subtarget->hasVBMI2()) && (Subtarget->hasVLX())) {
4134
0
    return fastEmitInst_r(X86::VPEXPANDBZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
4135
0
  }
4136
0
  return 0;
4137
0
}
4138
4139
0
unsigned fastEmit_X86ISD_EXPAND_MVT_v32i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4140
0
  if (RetVT.SimpleTy != MVT::v32i8)
4141
0
    return 0;
4142
0
  if ((Subtarget->hasVBMI2()) && (Subtarget->hasVLX())) {
4143
0
    return fastEmitInst_r(X86::VPEXPANDBZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
4144
0
  }
4145
0
  return 0;
4146
0
}
4147
4148
0
unsigned fastEmit_X86ISD_EXPAND_MVT_v64i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4149
0
  if (RetVT.SimpleTy != MVT::v64i8)
4150
0
    return 0;
4151
0
  if ((Subtarget->hasVBMI2())) {
4152
0
    return fastEmitInst_r(X86::VPEXPANDBZrr, &X86::VR512RegClass, Op0, Op0IsKill);
4153
0
  }
4154
0
  return 0;
4155
0
}
4156
4157
0
unsigned fastEmit_X86ISD_EXPAND_MVT_v8i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4158
0
  if (RetVT.SimpleTy != MVT::v8i16)
4159
0
    return 0;
4160
0
  if ((Subtarget->hasVBMI2()) && (Subtarget->hasVLX())) {
4161
0
    return fastEmitInst_r(X86::VPEXPANDWZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
4162
0
  }
4163
0
  return 0;
4164
0
}
4165
4166
0
unsigned fastEmit_X86ISD_EXPAND_MVT_v16i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4167
0
  if (RetVT.SimpleTy != MVT::v16i16)
4168
0
    return 0;
4169
0
  if ((Subtarget->hasVBMI2()) && (Subtarget->hasVLX())) {
4170
0
    return fastEmitInst_r(X86::VPEXPANDWZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
4171
0
  }
4172
0
  return 0;
4173
0
}
4174
4175
0
unsigned fastEmit_X86ISD_EXPAND_MVT_v32i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4176
0
  if (RetVT.SimpleTy != MVT::v32i16)
4177
0
    return 0;
4178
0
  if ((Subtarget->hasVBMI2())) {
4179
0
    return fastEmitInst_r(X86::VPEXPANDWZrr, &X86::VR512RegClass, Op0, Op0IsKill);
4180
0
  }
4181
0
  return 0;
4182
0
}
4183
4184
0
unsigned fastEmit_X86ISD_EXPAND_MVT_v4i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4185
0
  if (RetVT.SimpleTy != MVT::v4i32)
4186
0
    return 0;
4187
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
4188
0
    return fastEmitInst_r(X86::VPEXPANDDZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
4189
0
  }
4190
0
  return 0;
4191
0
}
4192
4193
0
unsigned fastEmit_X86ISD_EXPAND_MVT_v8i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4194
0
  if (RetVT.SimpleTy != MVT::v8i32)
4195
0
    return 0;
4196
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
4197
0
    return fastEmitInst_r(X86::VPEXPANDDZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
4198
0
  }
4199
0
  return 0;
4200
0
}
4201
4202
0
unsigned fastEmit_X86ISD_EXPAND_MVT_v16i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4203
0
  if (RetVT.SimpleTy != MVT::v16i32)
4204
0
    return 0;
4205
0
  if ((Subtarget->hasAVX512())) {
4206
0
    return fastEmitInst_r(X86::VPEXPANDDZrr, &X86::VR512RegClass, Op0, Op0IsKill);
4207
0
  }
4208
0
  return 0;
4209
0
}
4210
4211
0
unsigned fastEmit_X86ISD_EXPAND_MVT_v2i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4212
0
  if (RetVT.SimpleTy != MVT::v2i64)
4213
0
    return 0;
4214
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
4215
0
    return fastEmitInst_r(X86::VPEXPANDQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
4216
0
  }
4217
0
  return 0;
4218
0
}
4219
4220
0
unsigned fastEmit_X86ISD_EXPAND_MVT_v4i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4221
0
  if (RetVT.SimpleTy != MVT::v4i64)
4222
0
    return 0;
4223
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
4224
0
    return fastEmitInst_r(X86::VPEXPANDQZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
4225
0
  }
4226
0
  return 0;
4227
0
}
4228
4229
0
unsigned fastEmit_X86ISD_EXPAND_MVT_v8i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4230
0
  if (RetVT.SimpleTy != MVT::v8i64)
4231
0
    return 0;
4232
0
  if ((Subtarget->hasAVX512())) {
4233
0
    return fastEmitInst_r(X86::VPEXPANDQZrr, &X86::VR512RegClass, Op0, Op0IsKill);
4234
0
  }
4235
0
  return 0;
4236
0
}
4237
4238
0
unsigned fastEmit_X86ISD_EXPAND_MVT_v4f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4239
0
  if (RetVT.SimpleTy != MVT::v4f32)
4240
0
    return 0;
4241
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
4242
0
    return fastEmitInst_r(X86::VEXPANDPSZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
4243
0
  }
4244
0
  return 0;
4245
0
}
4246
4247
0
unsigned fastEmit_X86ISD_EXPAND_MVT_v8f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4248
0
  if (RetVT.SimpleTy != MVT::v8f32)
4249
0
    return 0;
4250
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
4251
0
    return fastEmitInst_r(X86::VEXPANDPSZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
4252
0
  }
4253
0
  return 0;
4254
0
}
4255
4256
0
unsigned fastEmit_X86ISD_EXPAND_MVT_v16f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4257
0
  if (RetVT.SimpleTy != MVT::v16f32)
4258
0
    return 0;
4259
0
  if ((Subtarget->hasAVX512())) {
4260
0
    return fastEmitInst_r(X86::VEXPANDPSZrr, &X86::VR512RegClass, Op0, Op0IsKill);
4261
0
  }
4262
0
  return 0;
4263
0
}
4264
4265
0
unsigned fastEmit_X86ISD_EXPAND_MVT_v2f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4266
0
  if (RetVT.SimpleTy != MVT::v2f64)
4267
0
    return 0;
4268
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
4269
0
    return fastEmitInst_r(X86::VEXPANDPDZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
4270
0
  }
4271
0
  return 0;
4272
0
}
4273
4274
0
unsigned fastEmit_X86ISD_EXPAND_MVT_v4f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4275
0
  if (RetVT.SimpleTy != MVT::v4f64)
4276
0
    return 0;
4277
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
4278
0
    return fastEmitInst_r(X86::VEXPANDPDZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
4279
0
  }
4280
0
  return 0;
4281
0
}
4282
4283
0
unsigned fastEmit_X86ISD_EXPAND_MVT_v8f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4284
0
  if (RetVT.SimpleTy != MVT::v8f64)
4285
0
    return 0;
4286
0
  if ((Subtarget->hasAVX512())) {
4287
0
    return fastEmitInst_r(X86::VEXPANDPDZrr, &X86::VR512RegClass, Op0, Op0IsKill);
4288
0
  }
4289
0
  return 0;
4290
0
}
4291
4292
unsigned fastEmit_X86ISD_EXPAND_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
4293
  switch (VT.SimpleTy) {
4294
  case MVT::v16i8: return fastEmit_X86ISD_EXPAND_MVT_v16i8_r(RetVT, Op0, Op0IsKill);
4295
  case MVT::v32i8: return fastEmit_X86ISD_EXPAND_MVT_v32i8_r(RetVT, Op0, Op0IsKill);
4296
  case MVT::v64i8: return fastEmit_X86ISD_EXPAND_MVT_v64i8_r(RetVT, Op0, Op0IsKill);
4297
  case MVT::v8i16: return fastEmit_X86ISD_EXPAND_MVT_v8i16_r(RetVT, Op0, Op0IsKill);
4298
  case MVT::v16i16: return fastEmit_X86ISD_EXPAND_MVT_v16i16_r(RetVT, Op0, Op0IsKill);
4299
  case MVT::v32i16: return fastEmit_X86ISD_EXPAND_MVT_v32i16_r(RetVT, Op0, Op0IsKill);
4300
  case MVT::v4i32: return fastEmit_X86ISD_EXPAND_MVT_v4i32_r(RetVT, Op0, Op0IsKill);
4301
  case MVT::v8i32: return fastEmit_X86ISD_EXPAND_MVT_v8i32_r(RetVT, Op0, Op0IsKill);
4302
  case MVT::v16i32: return fastEmit_X86ISD_EXPAND_MVT_v16i32_r(RetVT, Op0, Op0IsKill);
4303
  case MVT::v2i64: return fastEmit_X86ISD_EXPAND_MVT_v2i64_r(RetVT, Op0, Op0IsKill);
4304
  case MVT::v4i64: return fastEmit_X86ISD_EXPAND_MVT_v4i64_r(RetVT, Op0, Op0IsKill);
4305
  case MVT::v8i64: return fastEmit_X86ISD_EXPAND_MVT_v8i64_r(RetVT, Op0, Op0IsKill);
4306
  case MVT::v4f32: return fastEmit_X86ISD_EXPAND_MVT_v4f32_r(RetVT, Op0, Op0IsKill);
4307
  case MVT::v8f32: return fastEmit_X86ISD_EXPAND_MVT_v8f32_r(RetVT, Op0, Op0IsKill);
4308
  case MVT::v16f32: return fastEmit_X86ISD_EXPAND_MVT_v16f32_r(RetVT, Op0, Op0IsKill);
4309
  case MVT::v2f64: return fastEmit_X86ISD_EXPAND_MVT_v2f64_r(RetVT, Op0, Op0IsKill);
4310
  case MVT::v4f64: return fastEmit_X86ISD_EXPAND_MVT_v4f64_r(RetVT, Op0, Op0IsKill);
4311
  case MVT::v8f64: return fastEmit_X86ISD_EXPAND_MVT_v8f64_r(RetVT, Op0, Op0IsKill);
4312
  default: return 0;
4313
  }
4314
}
4315
4316
// FastEmit functions for X86ISD::FRCP.
4317
4318
0
unsigned fastEmit_X86ISD_FRCP_MVT_f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4319
0
  if (RetVT.SimpleTy != MVT::f32)
4320
0
    return 0;
4321
0
  if ((Subtarget->hasSSE1() && !Subtarget->hasAVX())) {
4322
0
    return fastEmitInst_r(X86::RCPSSr, &X86::FR32RegClass, Op0, Op0IsKill);
4323
0
  }
4324
0
  return 0;
4325
0
}
4326
4327
0
unsigned fastEmit_X86ISD_FRCP_MVT_v4f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4328
0
  if (RetVT.SimpleTy != MVT::v4f32)
4329
0
    return 0;
4330
0
  if ((Subtarget->hasSSE1() && !Subtarget->hasAVX())) {
4331
0
    return fastEmitInst_r(X86::RCPPSr, &X86::VR128RegClass, Op0, Op0IsKill);
4332
0
  }
4333
0
  if ((Subtarget->hasAVX())) {
4334
0
    return fastEmitInst_r(X86::VRCPPSr, &X86::VR128RegClass, Op0, Op0IsKill);
4335
0
  }
4336
0
  return 0;
4337
0
}
4338
4339
0
unsigned fastEmit_X86ISD_FRCP_MVT_v8f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4340
0
  if (RetVT.SimpleTy != MVT::v8f32)
4341
0
    return 0;
4342
0
  if ((Subtarget->hasAVX())) {
4343
0
    return fastEmitInst_r(X86::VRCPPSYr, &X86::VR256RegClass, Op0, Op0IsKill);
4344
0
  }
4345
0
  return 0;
4346
0
}
4347
4348
unsigned fastEmit_X86ISD_FRCP_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
4349
  switch (VT.SimpleTy) {
4350
  case MVT::f32: return fastEmit_X86ISD_FRCP_MVT_f32_r(RetVT, Op0, Op0IsKill);
4351
  case MVT::v4f32: return fastEmit_X86ISD_FRCP_MVT_v4f32_r(RetVT, Op0, Op0IsKill);
4352
  case MVT::v8f32: return fastEmit_X86ISD_FRCP_MVT_v8f32_r(RetVT, Op0, Op0IsKill);
4353
  default: return 0;
4354
  }
4355
}
4356
4357
// FastEmit functions for X86ISD::FRSQRT.
4358
4359
0
unsigned fastEmit_X86ISD_FRSQRT_MVT_f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4360
0
  if (RetVT.SimpleTy != MVT::f32)
4361
0
    return 0;
4362
0
  if ((Subtarget->hasSSE1() && !Subtarget->hasAVX())) {
4363
0
    return fastEmitInst_r(X86::RSQRTSSr, &X86::FR32RegClass, Op0, Op0IsKill);
4364
0
  }
4365
0
  return 0;
4366
0
}
4367
4368
0
unsigned fastEmit_X86ISD_FRSQRT_MVT_v4f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4369
0
  if (RetVT.SimpleTy != MVT::v4f32)
4370
0
    return 0;
4371
0
  if ((Subtarget->hasSSE1() && !Subtarget->hasAVX())) {
4372
0
    return fastEmitInst_r(X86::RSQRTPSr, &X86::VR128RegClass, Op0, Op0IsKill);
4373
0
  }
4374
0
  if ((Subtarget->hasAVX())) {
4375
0
    return fastEmitInst_r(X86::VRSQRTPSr, &X86::VR128RegClass, Op0, Op0IsKill);
4376
0
  }
4377
0
  return 0;
4378
0
}
4379
4380
0
unsigned fastEmit_X86ISD_FRSQRT_MVT_v8f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4381
0
  if (RetVT.SimpleTy != MVT::v8f32)
4382
0
    return 0;
4383
0
  if ((Subtarget->hasAVX())) {
4384
0
    return fastEmitInst_r(X86::VRSQRTPSYr, &X86::VR256RegClass, Op0, Op0IsKill);
4385
0
  }
4386
0
  return 0;
4387
0
}
4388
4389
unsigned fastEmit_X86ISD_FRSQRT_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
4390
  switch (VT.SimpleTy) {
4391
  case MVT::f32: return fastEmit_X86ISD_FRSQRT_MVT_f32_r(RetVT, Op0, Op0IsKill);
4392
  case MVT::v4f32: return fastEmit_X86ISD_FRSQRT_MVT_v4f32_r(RetVT, Op0, Op0IsKill);
4393
  case MVT::v8f32: return fastEmit_X86ISD_FRSQRT_MVT_v8f32_r(RetVT, Op0, Op0IsKill);
4394
  default: return 0;
4395
  }
4396
}
4397
4398
// FastEmit functions for X86ISD::MMX_MOVD2W.
4399
4400
0
unsigned fastEmit_X86ISD_MMX_MOVD2W_MVT_x86mmx_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4401
0
  if (RetVT.SimpleTy != MVT::i32)
4402
0
    return 0;
4403
0
  if ((Subtarget->hasMMX())) {
4404
0
    return fastEmitInst_r(X86::MMX_MOVD64grr, &X86::GR32RegClass, Op0, Op0IsKill);
4405
0
  }
4406
0
  return 0;
4407
0
}
4408
4409
unsigned fastEmit_X86ISD_MMX_MOVD2W_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
4410
  switch (VT.SimpleTy) {
4411
  case MVT::x86mmx: return fastEmit_X86ISD_MMX_MOVD2W_MVT_x86mmx_r(RetVT, Op0, Op0IsKill);
4412
  default: return 0;
4413
  }
4414
}
4415
4416
// FastEmit functions for X86ISD::MMX_MOVW2D.
4417
4418
0
unsigned fastEmit_X86ISD_MMX_MOVW2D_MVT_i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4419
0
  if (RetVT.SimpleTy != MVT::x86mmx)
4420
0
    return 0;
4421
0
  if ((Subtarget->hasMMX())) {
4422
0
    return fastEmitInst_r(X86::MMX_MOVD64rr, &X86::VR64RegClass, Op0, Op0IsKill);
4423
0
  }
4424
0
  return 0;
4425
0
}
4426
4427
unsigned fastEmit_X86ISD_MMX_MOVW2D_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
4428
  switch (VT.SimpleTy) {
4429
  case MVT::i32: return fastEmit_X86ISD_MMX_MOVW2D_MVT_i32_r(RetVT, Op0, Op0IsKill);
4430
  default: return 0;
4431
  }
4432
}
4433
4434
// FastEmit functions for X86ISD::MOVDDUP.
4435
4436
0
unsigned fastEmit_X86ISD_MOVDDUP_MVT_v2f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4437
0
  if (RetVT.SimpleTy != MVT::v2f64)
4438
0
    return 0;
4439
0
  if ((Subtarget->hasSSE3() && !Subtarget->hasAVX())) {
4440
0
    return fastEmitInst_r(X86::MOVDDUPrr, &X86::VR128RegClass, Op0, Op0IsKill);
4441
0
  }
4442
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
4443
0
    return fastEmitInst_r(X86::VMOVDDUPrr, &X86::VR128RegClass, Op0, Op0IsKill);
4444
0
  }
4445
0
  return 0;
4446
0
}
4447
4448
0
unsigned fastEmit_X86ISD_MOVDDUP_MVT_v4f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4449
0
  if (RetVT.SimpleTy != MVT::v4f64)
4450
0
    return 0;
4451
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
4452
0
    return fastEmitInst_r(X86::VMOVDDUPZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
4453
0
  }
4454
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
4455
0
    return fastEmitInst_r(X86::VMOVDDUPYrr, &X86::VR256RegClass, Op0, Op0IsKill);
4456
0
  }
4457
0
  return 0;
4458
0
}
4459
4460
0
unsigned fastEmit_X86ISD_MOVDDUP_MVT_v8f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4461
0
  if (RetVT.SimpleTy != MVT::v8f64)
4462
0
    return 0;
4463
0
  if ((Subtarget->hasAVX512())) {
4464
0
    return fastEmitInst_r(X86::VMOVDDUPZrr, &X86::VR512RegClass, Op0, Op0IsKill);
4465
0
  }
4466
0
  return 0;
4467
0
}
4468
4469
unsigned fastEmit_X86ISD_MOVDDUP_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
4470
  switch (VT.SimpleTy) {
4471
  case MVT::v2f64: return fastEmit_X86ISD_MOVDDUP_MVT_v2f64_r(RetVT, Op0, Op0IsKill);
4472
  case MVT::v4f64: return fastEmit_X86ISD_MOVDDUP_MVT_v4f64_r(RetVT, Op0, Op0IsKill);
4473
  case MVT::v8f64: return fastEmit_X86ISD_MOVDDUP_MVT_v8f64_r(RetVT, Op0, Op0IsKill);
4474
  default: return 0;
4475
  }
4476
}
4477
4478
// FastEmit functions for X86ISD::MOVDQ2Q.
4479
4480
0
unsigned fastEmit_X86ISD_MOVDQ2Q_MVT_v2i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4481
0
  if (RetVT.SimpleTy != MVT::x86mmx)
4482
0
    return 0;
4483
0
  return fastEmitInst_r(X86::MMX_MOVDQ2Qrr, &X86::VR64RegClass, Op0, Op0IsKill);
4484
0
}
4485
4486
unsigned fastEmit_X86ISD_MOVDQ2Q_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
4487
  switch (VT.SimpleTy) {
4488
  case MVT::v2i64: return fastEmit_X86ISD_MOVDQ2Q_MVT_v2i64_r(RetVT, Op0, Op0IsKill);
4489
  default: return 0;
4490
  }
4491
}
4492
4493
// FastEmit functions for X86ISD::MOVMSK.
4494
4495
0
unsigned fastEmit_X86ISD_MOVMSK_MVT_v16i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4496
0
  if (RetVT.SimpleTy != MVT::i32)
4497
0
    return 0;
4498
0
  if ((Subtarget->hasSSE2() && !Subtarget->hasAVX())) {
4499
0
    return fastEmitInst_r(X86::PMOVMSKBrr, &X86::GR32RegClass, Op0, Op0IsKill);
4500
0
  }
4501
0
  if ((Subtarget->hasAVX())) {
4502
0
    return fastEmitInst_r(X86::VPMOVMSKBrr, &X86::GR32RegClass, Op0, Op0IsKill);
4503
0
  }
4504
0
  return 0;
4505
0
}
4506
4507
0
unsigned fastEmit_X86ISD_MOVMSK_MVT_v32i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4508
0
  if (RetVT.SimpleTy != MVT::i32)
4509
0
    return 0;
4510
0
  if ((Subtarget->hasAVX2())) {
4511
0
    return fastEmitInst_r(X86::VPMOVMSKBYrr, &X86::GR32RegClass, Op0, Op0IsKill);
4512
0
  }
4513
0
  return 0;
4514
0
}
4515
4516
0
unsigned fastEmit_X86ISD_MOVMSK_MVT_v4i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4517
0
  if (RetVT.SimpleTy != MVT::i32)
4518
0
    return 0;
4519
0
  if ((Subtarget->hasSSE2() && !Subtarget->hasAVX())) {
4520
0
    return fastEmitInst_r(X86::MOVMSKPSrr, &X86::GR32RegClass, Op0, Op0IsKill);
4521
0
  }
4522
0
  if ((Subtarget->hasAVX())) {
4523
0
    return fastEmitInst_r(X86::VMOVMSKPSrr, &X86::GR32RegClass, Op0, Op0IsKill);
4524
0
  }
4525
0
  return 0;
4526
0
}
4527
4528
0
unsigned fastEmit_X86ISD_MOVMSK_MVT_v8i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4529
0
  if (RetVT.SimpleTy != MVT::i32)
4530
0
    return 0;
4531
0
  if ((Subtarget->hasAVX())) {
4532
0
    return fastEmitInst_r(X86::VMOVMSKPSYrr, &X86::GR32RegClass, Op0, Op0IsKill);
4533
0
  }
4534
0
  return 0;
4535
0
}
4536
4537
0
unsigned fastEmit_X86ISD_MOVMSK_MVT_v2i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4538
0
  if (RetVT.SimpleTy != MVT::i32)
4539
0
    return 0;
4540
0
  if ((Subtarget->hasSSE2() && !Subtarget->hasAVX())) {
4541
0
    return fastEmitInst_r(X86::MOVMSKPDrr, &X86::GR32RegClass, Op0, Op0IsKill);
4542
0
  }
4543
0
  if ((Subtarget->hasAVX())) {
4544
0
    return fastEmitInst_r(X86::VMOVMSKPDrr, &X86::GR32RegClass, Op0, Op0IsKill);
4545
0
  }
4546
0
  return 0;
4547
0
}
4548
4549
0
unsigned fastEmit_X86ISD_MOVMSK_MVT_v4i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4550
0
  if (RetVT.SimpleTy != MVT::i32)
4551
0
    return 0;
4552
0
  if ((Subtarget->hasAVX())) {
4553
0
    return fastEmitInst_r(X86::VMOVMSKPDYrr, &X86::GR32RegClass, Op0, Op0IsKill);
4554
0
  }
4555
0
  return 0;
4556
0
}
4557
4558
0
unsigned fastEmit_X86ISD_MOVMSK_MVT_v4f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4559
0
  if (RetVT.SimpleTy != MVT::i32)
4560
0
    return 0;
4561
0
  if ((Subtarget->hasSSE1() && !Subtarget->hasAVX())) {
4562
0
    return fastEmitInst_r(X86::MOVMSKPSrr, &X86::GR32RegClass, Op0, Op0IsKill);