Coverage Report

Created: 2018-09-25 00:18

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/clang-build/lib/Target/X86/X86GenFastISel.inc
Line
Count
Source (jump to first uncovered line)
1
/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2
|*                                                                            *|
3
|* "Fast" Instruction Selector for the X86 target                             *|
4
|*                                                                            *|
5
|* Automatically generated file, do not edit!                                 *|
6
|*                                                                            *|
7
\*===----------------------------------------------------------------------===*/
8
9
10
// FastEmit Immediate Predicate functions.
11
16
static bool Predicate_i16immSExt8(int64_t Imm) {
12
16
 return isInt<8>(Imm); 
13
16
}
14
302
static bool Predicate_i32immSExt8(int64_t Imm) {
15
302
 return isInt<8>(Imm); 
16
302
}
17
104
static bool Predicate_i64immSExt8(int64_t Imm) {
18
104
 return isInt<8>(Imm); 
19
104
}
20
34
static bool Predicate_i64immSExt32(int64_t Imm) {
21
34
 return isInt<32>(Imm); 
22
34
}
23
0
static bool Predicate_AndMask64(int64_t Imm) {
24
0
25
0
  return isMask_64(Imm) && !isUInt<32>(Imm);
26
0
27
0
}
28
0
static bool Predicate_BTRMask64(int64_t Imm) {
29
0
30
0
  return !isUInt<32>(Imm) && !isInt<32>(Imm) && isPowerOf2_64(~Imm);
31
0
32
0
}
33
0
static bool Predicate_BTCBTSMask64(int64_t Imm) {
34
0
35
0
  return !isInt<32>(Imm) && isPowerOf2_64(Imm);
36
0
37
0
}
38
39
40
// FastEmit functions for ISD::ABS.
41
42
0
unsigned fastEmit_ISD_ABS_MVT_v16i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
43
0
  if (RetVT.SimpleTy != MVT::v16i8)
44
0
    return 0;
45
0
  if ((Subtarget->hasBWI()) && (Subtarget->hasVLX())) {
46
0
    return fastEmitInst_r(X86::VPABSBZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
47
0
  }
48
0
  if ((Subtarget->hasSSSE3() && !Subtarget->hasAVX())) {
49
0
    return fastEmitInst_r(X86::PABSBrr, &X86::VR128RegClass, Op0, Op0IsKill);
50
0
  }
51
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX() || !Subtarget->hasBWI())) {
52
0
    return fastEmitInst_r(X86::VPABSBrr, &X86::VR128RegClass, Op0, Op0IsKill);
53
0
  }
54
0
  return 0;
55
0
}
56
57
0
unsigned fastEmit_ISD_ABS_MVT_v32i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
58
0
  if (RetVT.SimpleTy != MVT::v32i8)
59
0
    return 0;
60
0
  if ((Subtarget->hasBWI()) && (Subtarget->hasVLX())) {
61
0
    return fastEmitInst_r(X86::VPABSBZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
62
0
  }
63
0
  if ((Subtarget->hasAVX2()) && (!Subtarget->hasVLX() || !Subtarget->hasBWI())) {
64
0
    return fastEmitInst_r(X86::VPABSBYrr, &X86::VR256RegClass, Op0, Op0IsKill);
65
0
  }
66
0
  return 0;
67
0
}
68
69
0
unsigned fastEmit_ISD_ABS_MVT_v64i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
70
0
  if (RetVT.SimpleTy != MVT::v64i8)
71
0
    return 0;
72
0
  if ((Subtarget->hasBWI())) {
73
0
    return fastEmitInst_r(X86::VPABSBZrr, &X86::VR512RegClass, Op0, Op0IsKill);
74
0
  }
75
0
  return 0;
76
0
}
77
78
0
unsigned fastEmit_ISD_ABS_MVT_v8i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
79
0
  if (RetVT.SimpleTy != MVT::v8i16)
80
0
    return 0;
81
0
  if ((Subtarget->hasBWI()) && (Subtarget->hasVLX())) {
82
0
    return fastEmitInst_r(X86::VPABSWZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
83
0
  }
84
0
  if ((Subtarget->hasSSSE3() && !Subtarget->hasAVX())) {
85
0
    return fastEmitInst_r(X86::PABSWrr, &X86::VR128RegClass, Op0, Op0IsKill);
86
0
  }
87
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX() || !Subtarget->hasBWI())) {
88
0
    return fastEmitInst_r(X86::VPABSWrr, &X86::VR128RegClass, Op0, Op0IsKill);
89
0
  }
90
0
  return 0;
91
0
}
92
93
0
unsigned fastEmit_ISD_ABS_MVT_v16i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
94
0
  if (RetVT.SimpleTy != MVT::v16i16)
95
0
    return 0;
96
0
  if ((Subtarget->hasBWI()) && (Subtarget->hasVLX())) {
97
0
    return fastEmitInst_r(X86::VPABSWZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
98
0
  }
99
0
  if ((Subtarget->hasAVX2()) && (!Subtarget->hasVLX() || !Subtarget->hasBWI())) {
100
0
    return fastEmitInst_r(X86::VPABSWYrr, &X86::VR256RegClass, Op0, Op0IsKill);
101
0
  }
102
0
  return 0;
103
0
}
104
105
0
unsigned fastEmit_ISD_ABS_MVT_v32i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
106
0
  if (RetVT.SimpleTy != MVT::v32i16)
107
0
    return 0;
108
0
  if ((Subtarget->hasBWI())) {
109
0
    return fastEmitInst_r(X86::VPABSWZrr, &X86::VR512RegClass, Op0, Op0IsKill);
110
0
  }
111
0
  return 0;
112
0
}
113
114
0
unsigned fastEmit_ISD_ABS_MVT_v4i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
115
0
  if (RetVT.SimpleTy != MVT::v4i32)
116
0
    return 0;
117
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
118
0
    return fastEmitInst_r(X86::VPABSDZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
119
0
  }
120
0
  if ((Subtarget->hasSSSE3() && !Subtarget->hasAVX())) {
121
0
    return fastEmitInst_r(X86::PABSDrr, &X86::VR128RegClass, Op0, Op0IsKill);
122
0
  }
123
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
124
0
    return fastEmitInst_r(X86::VPABSDrr, &X86::VR128RegClass, Op0, Op0IsKill);
125
0
  }
126
0
  return 0;
127
0
}
128
129
0
unsigned fastEmit_ISD_ABS_MVT_v8i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
130
0
  if (RetVT.SimpleTy != MVT::v8i32)
131
0
    return 0;
132
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
133
0
    return fastEmitInst_r(X86::VPABSDZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
134
0
  }
135
0
  if ((Subtarget->hasAVX2()) && (!Subtarget->hasVLX())) {
136
0
    return fastEmitInst_r(X86::VPABSDYrr, &X86::VR256RegClass, Op0, Op0IsKill);
137
0
  }
138
0
  return 0;
139
0
}
140
141
0
unsigned fastEmit_ISD_ABS_MVT_v16i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
142
0
  if (RetVT.SimpleTy != MVT::v16i32)
143
0
    return 0;
144
0
  if ((Subtarget->hasAVX512())) {
145
0
    return fastEmitInst_r(X86::VPABSDZrr, &X86::VR512RegClass, Op0, Op0IsKill);
146
0
  }
147
0
  return 0;
148
0
}
149
150
0
unsigned fastEmit_ISD_ABS_MVT_v2i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
151
0
  if (RetVT.SimpleTy != MVT::v2i64)
152
0
    return 0;
153
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
154
0
    return fastEmitInst_r(X86::VPABSQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
155
0
  }
156
0
  return 0;
157
0
}
158
159
0
unsigned fastEmit_ISD_ABS_MVT_v4i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
160
0
  if (RetVT.SimpleTy != MVT::v4i64)
161
0
    return 0;
162
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
163
0
    return fastEmitInst_r(X86::VPABSQZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
164
0
  }
165
0
  return 0;
166
0
}
167
168
0
unsigned fastEmit_ISD_ABS_MVT_v8i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
169
0
  if (RetVT.SimpleTy != MVT::v8i64)
170
0
    return 0;
171
0
  if ((Subtarget->hasAVX512())) {
172
0
    return fastEmitInst_r(X86::VPABSQZrr, &X86::VR512RegClass, Op0, Op0IsKill);
173
0
  }
174
0
  return 0;
175
0
}
176
177
unsigned fastEmit_ISD_ABS_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
178
  switch (VT.SimpleTy) {
179
  case MVT::v16i8: return fastEmit_ISD_ABS_MVT_v16i8_r(RetVT, Op0, Op0IsKill);
180
  case MVT::v32i8: return fastEmit_ISD_ABS_MVT_v32i8_r(RetVT, Op0, Op0IsKill);
181
  case MVT::v64i8: return fastEmit_ISD_ABS_MVT_v64i8_r(RetVT, Op0, Op0IsKill);
182
  case MVT::v8i16: return fastEmit_ISD_ABS_MVT_v8i16_r(RetVT, Op0, Op0IsKill);
183
  case MVT::v16i16: return fastEmit_ISD_ABS_MVT_v16i16_r(RetVT, Op0, Op0IsKill);
184
  case MVT::v32i16: return fastEmit_ISD_ABS_MVT_v32i16_r(RetVT, Op0, Op0IsKill);
185
  case MVT::v4i32: return fastEmit_ISD_ABS_MVT_v4i32_r(RetVT, Op0, Op0IsKill);
186
  case MVT::v8i32: return fastEmit_ISD_ABS_MVT_v8i32_r(RetVT, Op0, Op0IsKill);
187
  case MVT::v16i32: return fastEmit_ISD_ABS_MVT_v16i32_r(RetVT, Op0, Op0IsKill);
188
  case MVT::v2i64: return fastEmit_ISD_ABS_MVT_v2i64_r(RetVT, Op0, Op0IsKill);
189
  case MVT::v4i64: return fastEmit_ISD_ABS_MVT_v4i64_r(RetVT, Op0, Op0IsKill);
190
  case MVT::v8i64: return fastEmit_ISD_ABS_MVT_v8i64_r(RetVT, Op0, Op0IsKill);
191
  default: return 0;
192
  }
193
}
194
195
// FastEmit functions for ISD::ANY_EXTEND.
196
197
3
unsigned fastEmit_ISD_ANY_EXTEND_MVT_i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
198
3
  if (RetVT.SimpleTy != MVT::i32)
199
0
    return 0;
200
3
  return fastEmitInst_r(X86::MOVZX32rr8, &X86::GR32RegClass, Op0, Op0IsKill);
201
3
}
202
203
6
unsigned fastEmit_ISD_ANY_EXTEND_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
204
6
  switch (VT.SimpleTy) {
205
6
  
case MVT::i8: return fastEmit_ISD_ANY_EXTEND_MVT_i8_r(RetVT, Op0, Op0IsKill)3
;
206
6
  
default: return 03
;
207
6
  }
208
6
}
209
210
// FastEmit functions for ISD::BITCAST.
211
212
13
unsigned fastEmit_ISD_BITCAST_MVT_i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
213
13
  if (RetVT.SimpleTy != MVT::f32)
214
12
    return 0;
215
1
  if ((Subtarget->hasAVX512())) {
216
0
    return fastEmitInst_r(X86::VMOVDI2SSZrr, &X86::FR32XRegClass, Op0, Op0IsKill);
217
0
  }
218
1
  if ((Subtarget->hasSSE2() && !Subtarget->hasAVX())) {
219
1
    return fastEmitInst_r(X86::MOVDI2SSrr, &X86::FR32RegClass, Op0, Op0IsKill);
220
1
  }
221
0
  if ((Subtarget->hasAVX() && !Subtarget->hasAVX512())) {
222
0
    return fastEmitInst_r(X86::VMOVDI2SSrr, &X86::FR32RegClass, Op0, Op0IsKill);
223
0
  }
224
0
  return 0;
225
0
}
226
227
1
unsigned fastEmit_ISD_BITCAST_MVT_i64_MVT_f64_r(unsigned Op0, bool Op0IsKill) {
228
1
  if ((Subtarget->hasAVX512())) {
229
0
    return fastEmitInst_r(X86::VMOV64toSDZrr, &X86::FR64XRegClass, Op0, Op0IsKill);
230
0
  }
231
1
  if ((Subtarget->hasSSE2() && !Subtarget->hasAVX())) {
232
1
    return fastEmitInst_r(X86::MOV64toSDrr, &X86::FR64RegClass, Op0, Op0IsKill);
233
1
  }
234
0
  if ((Subtarget->hasAVX() && !Subtarget->hasAVX512())) {
235
0
    return fastEmitInst_r(X86::VMOV64toSDrr, &X86::FR64RegClass, Op0, Op0IsKill);
236
0
  }
237
0
  return 0;
238
0
}
239
240
0
unsigned fastEmit_ISD_BITCAST_MVT_i64_MVT_x86mmx_r(unsigned Op0, bool Op0IsKill) {
241
0
  if ((Subtarget->hasMMX())) {
242
0
    return fastEmitInst_r(X86::MMX_MOVD64to64rr, &X86::VR64RegClass, Op0, Op0IsKill);
243
0
  }
244
0
  return 0;
245
0
}
246
247
4
unsigned fastEmit_ISD_BITCAST_MVT_i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
248
4
switch (RetVT.SimpleTy) {
249
4
  
case MVT::f64: return fastEmit_ISD_BITCAST_MVT_i64_MVT_f64_r(Op0, Op0IsKill)1
;
250
4
  
case MVT::x86mmx: return fastEmit_ISD_BITCAST_MVT_i64_MVT_x86mmx_r(Op0, Op0IsKill)0
;
251
4
  
default: return 03
;
252
4
}
253
4
}
254
255
7
unsigned fastEmit_ISD_BITCAST_MVT_f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
256
7
  if (RetVT.SimpleTy != MVT::i32)
257
0
    return 0;
258
7
  if ((Subtarget->hasAVX512())) {
259
2
    return fastEmitInst_r(X86::VMOVSS2DIZrr, &X86::GR32RegClass, Op0, Op0IsKill);
260
2
  }
261
5
  if ((Subtarget->hasSSE2() && !Subtarget->hasAVX())) {
262
3
    return fastEmitInst_r(X86::MOVSS2DIrr, &X86::GR32RegClass, Op0, Op0IsKill);
263
3
  }
264
2
  if ((Subtarget->hasAVX() && !Subtarget->hasAVX512())) {
265
2
    return fastEmitInst_r(X86::VMOVSS2DIrr, &X86::GR32RegClass, Op0, Op0IsKill);
266
2
  }
267
0
  return 0;
268
0
}
269
270
2
unsigned fastEmit_ISD_BITCAST_MVT_f64_MVT_i64_r(unsigned Op0, bool Op0IsKill) {
271
2
  if ((Subtarget->hasAVX512())) {
272
0
    return fastEmitInst_r(X86::VMOVSDto64Zrr, &X86::GR64RegClass, Op0, Op0IsKill);
273
0
  }
274
2
  if ((Subtarget->hasSSE2() && !Subtarget->hasAVX())) {
275
1
    return fastEmitInst_r(X86::MOVSDto64rr, &X86::GR64RegClass, Op0, Op0IsKill);
276
1
  }
277
1
  if ((Subtarget->hasAVX() && !Subtarget->hasAVX512())) {
278
1
    return fastEmitInst_r(X86::VMOVSDto64rr, &X86::GR64RegClass, Op0, Op0IsKill);
279
1
  }
280
0
  return 0;
281
0
}
282
283
0
unsigned fastEmit_ISD_BITCAST_MVT_f64_MVT_x86mmx_r(unsigned Op0, bool Op0IsKill) {
284
0
  if ((Subtarget->hasMMX()) && (Subtarget->hasSSE2())) {
285
0
    return fastEmitInst_r(X86::MMX_MOVFR642Qrr, &X86::VR64RegClass, Op0, Op0IsKill);
286
0
  }
287
0
  return 0;
288
0
}
289
290
2
unsigned fastEmit_ISD_BITCAST_MVT_f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
291
2
switch (RetVT.SimpleTy) {
292
2
  case MVT::i64: return fastEmit_ISD_BITCAST_MVT_f64_MVT_i64_r(Op0, Op0IsKill);
293
2
  
case MVT::x86mmx: return fastEmit_ISD_BITCAST_MVT_f64_MVT_x86mmx_r(Op0, Op0IsKill)0
;
294
2
  
default: return 00
;
295
2
}
296
2
}
297
298
0
unsigned fastEmit_ISD_BITCAST_MVT_x86mmx_MVT_i64_r(unsigned Op0, bool Op0IsKill) {
299
0
  if ((Subtarget->hasMMX())) {
300
0
    return fastEmitInst_r(X86::MMX_MOVD64from64rr, &X86::GR64RegClass, Op0, Op0IsKill);
301
0
  }
302
0
  return 0;
303
0
}
304
305
0
unsigned fastEmit_ISD_BITCAST_MVT_x86mmx_MVT_f64_r(unsigned Op0, bool Op0IsKill) {
306
0
  if ((Subtarget->hasMMX()) && (Subtarget->hasSSE2())) {
307
0
    return fastEmitInst_r(X86::MMX_MOVQ2FR64rr, &X86::FR64RegClass, Op0, Op0IsKill);
308
0
  }
309
0
  return 0;
310
0
}
311
312
unsigned fastEmit_ISD_BITCAST_MVT_x86mmx_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
313
switch (RetVT.SimpleTy) {
314
  case MVT::i64: return fastEmit_ISD_BITCAST_MVT_x86mmx_MVT_i64_r(Op0, Op0IsKill);
315
  case MVT::f64: return fastEmit_ISD_BITCAST_MVT_x86mmx_MVT_f64_r(Op0, Op0IsKill);
316
  default: return 0;
317
}
318
}
319
320
3.95k
unsigned fastEmit_ISD_BITCAST_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
321
3.95k
  switch (VT.SimpleTy) {
322
3.95k
  
case MVT::i32: return fastEmit_ISD_BITCAST_MVT_i32_r(RetVT, Op0, Op0IsKill)13
;
323
3.95k
  
case MVT::i64: return fastEmit_ISD_BITCAST_MVT_i64_r(RetVT, Op0, Op0IsKill)4
;
324
3.95k
  
case MVT::f32: return fastEmit_ISD_BITCAST_MVT_f32_r(RetVT, Op0, Op0IsKill)7
;
325
3.95k
  
case MVT::f64: return fastEmit_ISD_BITCAST_MVT_f64_r(RetVT, Op0, Op0IsKill)2
;
326
3.95k
  
case MVT::x86mmx: return fastEmit_ISD_BITCAST_MVT_x86mmx_r(RetVT, Op0, Op0IsKill)0
;
327
3.95k
  
default: return 03.93k
;
328
3.95k
  }
329
3.95k
}
330
331
// FastEmit functions for ISD::BRIND.
332
333
0
unsigned fastEmit_ISD_BRIND_MVT_i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
334
0
  if (RetVT.SimpleTy != MVT::isVoid)
335
0
    return 0;
336
0
  if ((!Subtarget->is64Bit())) {
337
0
    return fastEmitInst_r(X86::JMP16r, &X86::GR16RegClass, Op0, Op0IsKill);
338
0
  }
339
0
  return 0;
340
0
}
341
342
0
unsigned fastEmit_ISD_BRIND_MVT_i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
343
0
  if (RetVT.SimpleTy != MVT::isVoid)
344
0
    return 0;
345
0
  if ((!Subtarget->is64Bit())) {
346
0
    return fastEmitInst_r(X86::JMP32r, &X86::GR32RegClass, Op0, Op0IsKill);
347
0
  }
348
0
  return 0;
349
0
}
350
351
0
unsigned fastEmit_ISD_BRIND_MVT_i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
352
0
  if (RetVT.SimpleTy != MVT::isVoid)
353
0
    return 0;
354
0
  if ((Subtarget->is64Bit())) {
355
0
    return fastEmitInst_r(X86::JMP64r, &X86::GR64RegClass, Op0, Op0IsKill);
356
0
  }
357
0
  return 0;
358
0
}
359
360
unsigned fastEmit_ISD_BRIND_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
361
  switch (VT.SimpleTy) {
362
  case MVT::i16: return fastEmit_ISD_BRIND_MVT_i16_r(RetVT, Op0, Op0IsKill);
363
  case MVT::i32: return fastEmit_ISD_BRIND_MVT_i32_r(RetVT, Op0, Op0IsKill);
364
  case MVT::i64: return fastEmit_ISD_BRIND_MVT_i64_r(RetVT, Op0, Op0IsKill);
365
  default: return 0;
366
  }
367
}
368
369
// FastEmit functions for ISD::BSWAP.
370
371
0
unsigned fastEmit_ISD_BSWAP_MVT_i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
372
0
  if (RetVT.SimpleTy != MVT::i32)
373
0
    return 0;
374
0
  return fastEmitInst_r(X86::BSWAP32r, &X86::GR32RegClass, Op0, Op0IsKill);
375
0
}
376
377
0
unsigned fastEmit_ISD_BSWAP_MVT_i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
378
0
  if (RetVT.SimpleTy != MVT::i64)
379
0
    return 0;
380
0
  return fastEmitInst_r(X86::BSWAP64r, &X86::GR64RegClass, Op0, Op0IsKill);
381
0
}
382
383
unsigned fastEmit_ISD_BSWAP_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
384
  switch (VT.SimpleTy) {
385
  case MVT::i32: return fastEmit_ISD_BSWAP_MVT_i32_r(RetVT, Op0, Op0IsKill);
386
  case MVT::i64: return fastEmit_ISD_BSWAP_MVT_i64_r(RetVT, Op0, Op0IsKill);
387
  default: return 0;
388
  }
389
}
390
391
// FastEmit functions for ISD::CTLZ.
392
393
0
unsigned fastEmit_ISD_CTLZ_MVT_i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
394
0
  if (RetVT.SimpleTy != MVT::i16)
395
0
    return 0;
396
0
  if ((Subtarget->hasLZCNT())) {
397
0
    return fastEmitInst_r(X86::LZCNT16rr, &X86::GR16RegClass, Op0, Op0IsKill);
398
0
  }
399
0
  return 0;
400
0
}
401
402
0
unsigned fastEmit_ISD_CTLZ_MVT_i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
403
0
  if (RetVT.SimpleTy != MVT::i32)
404
0
    return 0;
405
0
  if ((Subtarget->hasLZCNT())) {
406
0
    return fastEmitInst_r(X86::LZCNT32rr, &X86::GR32RegClass, Op0, Op0IsKill);
407
0
  }
408
0
  return 0;
409
0
}
410
411
0
unsigned fastEmit_ISD_CTLZ_MVT_i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
412
0
  if (RetVT.SimpleTy != MVT::i64)
413
0
    return 0;
414
0
  if ((Subtarget->hasLZCNT())) {
415
0
    return fastEmitInst_r(X86::LZCNT64rr, &X86::GR64RegClass, Op0, Op0IsKill);
416
0
  }
417
0
  return 0;
418
0
}
419
420
0
unsigned fastEmit_ISD_CTLZ_MVT_v4i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
421
0
  if (RetVT.SimpleTy != MVT::v4i32)
422
0
    return 0;
423
0
  if ((Subtarget->hasCDI()) && (Subtarget->hasVLX())) {
424
0
    return fastEmitInst_r(X86::VPLZCNTDZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
425
0
  }
426
0
  return 0;
427
0
}
428
429
0
unsigned fastEmit_ISD_CTLZ_MVT_v8i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
430
0
  if (RetVT.SimpleTy != MVT::v8i32)
431
0
    return 0;
432
0
  if ((Subtarget->hasCDI()) && (Subtarget->hasVLX())) {
433
0
    return fastEmitInst_r(X86::VPLZCNTDZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
434
0
  }
435
0
  return 0;
436
0
}
437
438
0
unsigned fastEmit_ISD_CTLZ_MVT_v16i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
439
0
  if (RetVT.SimpleTy != MVT::v16i32)
440
0
    return 0;
441
0
  if ((Subtarget->hasCDI())) {
442
0
    return fastEmitInst_r(X86::VPLZCNTDZrr, &X86::VR512RegClass, Op0, Op0IsKill);
443
0
  }
444
0
  return 0;
445
0
}
446
447
0
unsigned fastEmit_ISD_CTLZ_MVT_v2i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
448
0
  if (RetVT.SimpleTy != MVT::v2i64)
449
0
    return 0;
450
0
  if ((Subtarget->hasCDI()) && (Subtarget->hasVLX())) {
451
0
    return fastEmitInst_r(X86::VPLZCNTQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
452
0
  }
453
0
  return 0;
454
0
}
455
456
0
unsigned fastEmit_ISD_CTLZ_MVT_v4i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
457
0
  if (RetVT.SimpleTy != MVT::v4i64)
458
0
    return 0;
459
0
  if ((Subtarget->hasCDI()) && (Subtarget->hasVLX())) {
460
0
    return fastEmitInst_r(X86::VPLZCNTQZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
461
0
  }
462
0
  return 0;
463
0
}
464
465
0
unsigned fastEmit_ISD_CTLZ_MVT_v8i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
466
0
  if (RetVT.SimpleTy != MVT::v8i64)
467
0
    return 0;
468
0
  if ((Subtarget->hasCDI())) {
469
0
    return fastEmitInst_r(X86::VPLZCNTQZrr, &X86::VR512RegClass, Op0, Op0IsKill);
470
0
  }
471
0
  return 0;
472
0
}
473
474
unsigned fastEmit_ISD_CTLZ_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
475
  switch (VT.SimpleTy) {
476
  case MVT::i16: return fastEmit_ISD_CTLZ_MVT_i16_r(RetVT, Op0, Op0IsKill);
477
  case MVT::i32: return fastEmit_ISD_CTLZ_MVT_i32_r(RetVT, Op0, Op0IsKill);
478
  case MVT::i64: return fastEmit_ISD_CTLZ_MVT_i64_r(RetVT, Op0, Op0IsKill);
479
  case MVT::v4i32: return fastEmit_ISD_CTLZ_MVT_v4i32_r(RetVT, Op0, Op0IsKill);
480
  case MVT::v8i32: return fastEmit_ISD_CTLZ_MVT_v8i32_r(RetVT, Op0, Op0IsKill);
481
  case MVT::v16i32: return fastEmit_ISD_CTLZ_MVT_v16i32_r(RetVT, Op0, Op0IsKill);
482
  case MVT::v2i64: return fastEmit_ISD_CTLZ_MVT_v2i64_r(RetVT, Op0, Op0IsKill);
483
  case MVT::v4i64: return fastEmit_ISD_CTLZ_MVT_v4i64_r(RetVT, Op0, Op0IsKill);
484
  case MVT::v8i64: return fastEmit_ISD_CTLZ_MVT_v8i64_r(RetVT, Op0, Op0IsKill);
485
  default: return 0;
486
  }
487
}
488
489
// FastEmit functions for ISD::CTPOP.
490
491
0
unsigned fastEmit_ISD_CTPOP_MVT_i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
492
0
  if (RetVT.SimpleTy != MVT::i16)
493
0
    return 0;
494
0
  if ((Subtarget->hasPOPCNT())) {
495
0
    return fastEmitInst_r(X86::POPCNT16rr, &X86::GR16RegClass, Op0, Op0IsKill);
496
0
  }
497
0
  return 0;
498
0
}
499
500
0
unsigned fastEmit_ISD_CTPOP_MVT_i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
501
0
  if (RetVT.SimpleTy != MVT::i32)
502
0
    return 0;
503
0
  if ((Subtarget->hasPOPCNT())) {
504
0
    return fastEmitInst_r(X86::POPCNT32rr, &X86::GR32RegClass, Op0, Op0IsKill);
505
0
  }
506
0
  return 0;
507
0
}
508
509
0
unsigned fastEmit_ISD_CTPOP_MVT_i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
510
0
  if (RetVT.SimpleTy != MVT::i64)
511
0
    return 0;
512
0
  if ((Subtarget->hasPOPCNT())) {
513
0
    return fastEmitInst_r(X86::POPCNT64rr, &X86::GR64RegClass, Op0, Op0IsKill);
514
0
  }
515
0
  return 0;
516
0
}
517
518
0
unsigned fastEmit_ISD_CTPOP_MVT_v16i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
519
0
  if (RetVT.SimpleTy != MVT::v16i8)
520
0
    return 0;
521
0
  if ((Subtarget->hasBITALG()) && (Subtarget->hasVLX())) {
522
0
    return fastEmitInst_r(X86::VPOPCNTBZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
523
0
  }
524
0
  return 0;
525
0
}
526
527
0
unsigned fastEmit_ISD_CTPOP_MVT_v32i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
528
0
  if (RetVT.SimpleTy != MVT::v32i8)
529
0
    return 0;
530
0
  if ((Subtarget->hasBITALG()) && (Subtarget->hasVLX())) {
531
0
    return fastEmitInst_r(X86::VPOPCNTBZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
532
0
  }
533
0
  return 0;
534
0
}
535
536
0
unsigned fastEmit_ISD_CTPOP_MVT_v64i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
537
0
  if (RetVT.SimpleTy != MVT::v64i8)
538
0
    return 0;
539
0
  if ((Subtarget->hasBITALG())) {
540
0
    return fastEmitInst_r(X86::VPOPCNTBZrr, &X86::VR512RegClass, Op0, Op0IsKill);
541
0
  }
542
0
  return 0;
543
0
}
544
545
0
unsigned fastEmit_ISD_CTPOP_MVT_v8i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
546
0
  if (RetVT.SimpleTy != MVT::v8i16)
547
0
    return 0;
548
0
  if ((Subtarget->hasBITALG()) && (Subtarget->hasVLX())) {
549
0
    return fastEmitInst_r(X86::VPOPCNTWZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
550
0
  }
551
0
  return 0;
552
0
}
553
554
0
unsigned fastEmit_ISD_CTPOP_MVT_v16i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
555
0
  if (RetVT.SimpleTy != MVT::v16i16)
556
0
    return 0;
557
0
  if ((Subtarget->hasBITALG()) && (Subtarget->hasVLX())) {
558
0
    return fastEmitInst_r(X86::VPOPCNTWZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
559
0
  }
560
0
  return 0;
561
0
}
562
563
0
unsigned fastEmit_ISD_CTPOP_MVT_v32i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
564
0
  if (RetVT.SimpleTy != MVT::v32i16)
565
0
    return 0;
566
0
  if ((Subtarget->hasBITALG())) {
567
0
    return fastEmitInst_r(X86::VPOPCNTWZrr, &X86::VR512RegClass, Op0, Op0IsKill);
568
0
  }
569
0
  return 0;
570
0
}
571
572
0
unsigned fastEmit_ISD_CTPOP_MVT_v4i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
573
0
  if (RetVT.SimpleTy != MVT::v4i32)
574
0
    return 0;
575
0
  if ((Subtarget->hasVLX()) && (Subtarget->hasVPOPCNTDQ())) {
576
0
    return fastEmitInst_r(X86::VPOPCNTDZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
577
0
  }
578
0
  return 0;
579
0
}
580
581
0
unsigned fastEmit_ISD_CTPOP_MVT_v8i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
582
0
  if (RetVT.SimpleTy != MVT::v8i32)
583
0
    return 0;
584
0
  if ((Subtarget->hasVLX()) && (Subtarget->hasVPOPCNTDQ())) {
585
0
    return fastEmitInst_r(X86::VPOPCNTDZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
586
0
  }
587
0
  return 0;
588
0
}
589
590
0
unsigned fastEmit_ISD_CTPOP_MVT_v16i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
591
0
  if (RetVT.SimpleTy != MVT::v16i32)
592
0
    return 0;
593
0
  if ((Subtarget->hasVPOPCNTDQ())) {
594
0
    return fastEmitInst_r(X86::VPOPCNTDZrr, &X86::VR512RegClass, Op0, Op0IsKill);
595
0
  }
596
0
  return 0;
597
0
}
598
599
0
unsigned fastEmit_ISD_CTPOP_MVT_v2i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
600
0
  if (RetVT.SimpleTy != MVT::v2i64)
601
0
    return 0;
602
0
  if ((Subtarget->hasVLX()) && (Subtarget->hasVPOPCNTDQ())) {
603
0
    return fastEmitInst_r(X86::VPOPCNTQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
604
0
  }
605
0
  return 0;
606
0
}
607
608
0
unsigned fastEmit_ISD_CTPOP_MVT_v4i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
609
0
  if (RetVT.SimpleTy != MVT::v4i64)
610
0
    return 0;
611
0
  if ((Subtarget->hasVLX()) && (Subtarget->hasVPOPCNTDQ())) {
612
0
    return fastEmitInst_r(X86::VPOPCNTQZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
613
0
  }
614
0
  return 0;
615
0
}
616
617
0
unsigned fastEmit_ISD_CTPOP_MVT_v8i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
618
0
  if (RetVT.SimpleTy != MVT::v8i64)
619
0
    return 0;
620
0
  if ((Subtarget->hasVPOPCNTDQ())) {
621
0
    return fastEmitInst_r(X86::VPOPCNTQZrr, &X86::VR512RegClass, Op0, Op0IsKill);
622
0
  }
623
0
  return 0;
624
0
}
625
626
unsigned fastEmit_ISD_CTPOP_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
627
  switch (VT.SimpleTy) {
628
  case MVT::i16: return fastEmit_ISD_CTPOP_MVT_i16_r(RetVT, Op0, Op0IsKill);
629
  case MVT::i32: return fastEmit_ISD_CTPOP_MVT_i32_r(RetVT, Op0, Op0IsKill);
630
  case MVT::i64: return fastEmit_ISD_CTPOP_MVT_i64_r(RetVT, Op0, Op0IsKill);
631
  case MVT::v16i8: return fastEmit_ISD_CTPOP_MVT_v16i8_r(RetVT, Op0, Op0IsKill);
632
  case MVT::v32i8: return fastEmit_ISD_CTPOP_MVT_v32i8_r(RetVT, Op0, Op0IsKill);
633
  case MVT::v64i8: return fastEmit_ISD_CTPOP_MVT_v64i8_r(RetVT, Op0, Op0IsKill);
634
  case MVT::v8i16: return fastEmit_ISD_CTPOP_MVT_v8i16_r(RetVT, Op0, Op0IsKill);
635
  case MVT::v16i16: return fastEmit_ISD_CTPOP_MVT_v16i16_r(RetVT, Op0, Op0IsKill);
636
  case MVT::v32i16: return fastEmit_ISD_CTPOP_MVT_v32i16_r(RetVT, Op0, Op0IsKill);
637
  case MVT::v4i32: return fastEmit_ISD_CTPOP_MVT_v4i32_r(RetVT, Op0, Op0IsKill);
638
  case MVT::v8i32: return fastEmit_ISD_CTPOP_MVT_v8i32_r(RetVT, Op0, Op0IsKill);
639
  case MVT::v16i32: return fastEmit_ISD_CTPOP_MVT_v16i32_r(RetVT, Op0, Op0IsKill);
640
  case MVT::v2i64: return fastEmit_ISD_CTPOP_MVT_v2i64_r(RetVT, Op0, Op0IsKill);
641
  case MVT::v4i64: return fastEmit_ISD_CTPOP_MVT_v4i64_r(RetVT, Op0, Op0IsKill);
642
  case MVT::v8i64: return fastEmit_ISD_CTPOP_MVT_v8i64_r(RetVT, Op0, Op0IsKill);
643
  default: return 0;
644
  }
645
}
646
647
// FastEmit functions for ISD::CTTZ.
648
649
0
unsigned fastEmit_ISD_CTTZ_MVT_i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
650
0
  if (RetVT.SimpleTy != MVT::i16)
651
0
    return 0;
652
0
  if ((Subtarget->hasBMI())) {
653
0
    return fastEmitInst_r(X86::TZCNT16rr, &X86::GR16RegClass, Op0, Op0IsKill);
654
0
  }
655
0
  return 0;
656
0
}
657
658
0
unsigned fastEmit_ISD_CTTZ_MVT_i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
659
0
  if (RetVT.SimpleTy != MVT::i32)
660
0
    return 0;
661
0
  if ((Subtarget->hasBMI())) {
662
0
    return fastEmitInst_r(X86::TZCNT32rr, &X86::GR32RegClass, Op0, Op0IsKill);
663
0
  }
664
0
  return 0;
665
0
}
666
667
0
unsigned fastEmit_ISD_CTTZ_MVT_i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
668
0
  if (RetVT.SimpleTy != MVT::i64)
669
0
    return 0;
670
0
  if ((Subtarget->hasBMI())) {
671
0
    return fastEmitInst_r(X86::TZCNT64rr, &X86::GR64RegClass, Op0, Op0IsKill);
672
0
  }
673
0
  return 0;
674
0
}
675
676
unsigned fastEmit_ISD_CTTZ_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
677
  switch (VT.SimpleTy) {
678
  case MVT::i16: return fastEmit_ISD_CTTZ_MVT_i16_r(RetVT, Op0, Op0IsKill);
679
  case MVT::i32: return fastEmit_ISD_CTTZ_MVT_i32_r(RetVT, Op0, Op0IsKill);
680
  case MVT::i64: return fastEmit_ISD_CTTZ_MVT_i64_r(RetVT, Op0, Op0IsKill);
681
  default: return 0;
682
  }
683
}
684
685
// FastEmit functions for ISD::CTTZ_ZERO_UNDEF.
686
687
0
unsigned fastEmit_ISD_CTTZ_ZERO_UNDEF_MVT_i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
688
0
  if (RetVT.SimpleTy != MVT::i16)
689
0
    return 0;
690
0
  return fastEmitInst_r(X86::BSF16rr, &X86::GR16RegClass, Op0, Op0IsKill);
691
0
}
692
693
0
unsigned fastEmit_ISD_CTTZ_ZERO_UNDEF_MVT_i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
694
0
  if (RetVT.SimpleTy != MVT::i32)
695
0
    return 0;
696
0
  return fastEmitInst_r(X86::BSF32rr, &X86::GR32RegClass, Op0, Op0IsKill);
697
0
}
698
699
0
unsigned fastEmit_ISD_CTTZ_ZERO_UNDEF_MVT_i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
700
0
  if (RetVT.SimpleTy != MVT::i64)
701
0
    return 0;
702
0
  return fastEmitInst_r(X86::BSF64rr, &X86::GR64RegClass, Op0, Op0IsKill);
703
0
}
704
705
unsigned fastEmit_ISD_CTTZ_ZERO_UNDEF_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
706
  switch (VT.SimpleTy) {
707
  case MVT::i16: return fastEmit_ISD_CTTZ_ZERO_UNDEF_MVT_i16_r(RetVT, Op0, Op0IsKill);
708
  case MVT::i32: return fastEmit_ISD_CTTZ_ZERO_UNDEF_MVT_i32_r(RetVT, Op0, Op0IsKill);
709
  case MVT::i64: return fastEmit_ISD_CTTZ_ZERO_UNDEF_MVT_i64_r(RetVT, Op0, Op0IsKill);
710
  default: return 0;
711
  }
712
}
713
714
// FastEmit functions for ISD::FABS.
715
716
0
unsigned fastEmit_ISD_FABS_MVT_f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
717
0
  if (RetVT.SimpleTy != MVT::f32)
718
0
    return 0;
719
0
  if ((!Subtarget->hasSSE1())) {
720
0
    return fastEmitInst_r(X86::ABS_Fp32, &X86::RFP32RegClass, Op0, Op0IsKill);
721
0
  }
722
0
  return 0;
723
0
}
724
725
0
unsigned fastEmit_ISD_FABS_MVT_f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
726
0
  if (RetVT.SimpleTy != MVT::f64)
727
0
    return 0;
728
0
  if ((!Subtarget->hasSSE2())) {
729
0
    return fastEmitInst_r(X86::ABS_Fp64, &X86::RFP64RegClass, Op0, Op0IsKill);
730
0
  }
731
0
  return 0;
732
0
}
733
734
0
unsigned fastEmit_ISD_FABS_MVT_f80_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
735
0
  if (RetVT.SimpleTy != MVT::f80)
736
0
    return 0;
737
0
  return fastEmitInst_r(X86::ABS_Fp80, &X86::RFP80RegClass, Op0, Op0IsKill);
738
0
}
739
740
unsigned fastEmit_ISD_FABS_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
741
  switch (VT.SimpleTy) {
742
  case MVT::f32: return fastEmit_ISD_FABS_MVT_f32_r(RetVT, Op0, Op0IsKill);
743
  case MVT::f64: return fastEmit_ISD_FABS_MVT_f64_r(RetVT, Op0, Op0IsKill);
744
  case MVT::f80: return fastEmit_ISD_FABS_MVT_f80_r(RetVT, Op0, Op0IsKill);
745
  default: return 0;
746
  }
747
}
748
749
// FastEmit functions for ISD::FCOS.
750
751
0
unsigned fastEmit_ISD_FCOS_MVT_f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
752
0
  if (RetVT.SimpleTy != MVT::f32)
753
0
    return 0;
754
0
  if ((!Subtarget->hasSSE1())) {
755
0
    return fastEmitInst_r(X86::COS_Fp32, &X86::RFP32RegClass, Op0, Op0IsKill);
756
0
  }
757
0
  return 0;
758
0
}
759
760
0
unsigned fastEmit_ISD_FCOS_MVT_f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
761
0
  if (RetVT.SimpleTy != MVT::f64)
762
0
    return 0;
763
0
  if ((!Subtarget->hasSSE2())) {
764
0
    return fastEmitInst_r(X86::COS_Fp64, &X86::RFP64RegClass, Op0, Op0IsKill);
765
0
  }
766
0
  return 0;
767
0
}
768
769
0
unsigned fastEmit_ISD_FCOS_MVT_f80_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
770
0
  if (RetVT.SimpleTy != MVT::f80)
771
0
    return 0;
772
0
  return fastEmitInst_r(X86::COS_Fp80, &X86::RFP80RegClass, Op0, Op0IsKill);
773
0
}
774
775
unsigned fastEmit_ISD_FCOS_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
776
  switch (VT.SimpleTy) {
777
  case MVT::f32: return fastEmit_ISD_FCOS_MVT_f32_r(RetVT, Op0, Op0IsKill);
778
  case MVT::f64: return fastEmit_ISD_FCOS_MVT_f64_r(RetVT, Op0, Op0IsKill);
779
  case MVT::f80: return fastEmit_ISD_FCOS_MVT_f80_r(RetVT, Op0, Op0IsKill);
780
  default: return 0;
781
  }
782
}
783
784
// FastEmit functions for ISD::FNEG.
785
786
1
unsigned fastEmit_ISD_FNEG_MVT_f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
787
1
  if (RetVT.SimpleTy != MVT::f32)
788
0
    return 0;
789
1
  if ((!Subtarget->hasSSE1())) {
790
0
    return fastEmitInst_r(X86::CHS_Fp32, &X86::RFP32RegClass, Op0, Op0IsKill);
791
0
  }
792
1
  return 0;
793
1
}
794
795
1
unsigned fastEmit_ISD_FNEG_MVT_f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
796
1
  if (RetVT.SimpleTy != MVT::f64)
797
0
    return 0;
798
1
  if ((!Subtarget->hasSSE2())) {
799
0
    return fastEmitInst_r(X86::CHS_Fp64, &X86::RFP64RegClass, Op0, Op0IsKill);
800
0
  }
801
1
  return 0;
802
1
}
803
804
0
unsigned fastEmit_ISD_FNEG_MVT_f80_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
805
0
  if (RetVT.SimpleTy != MVT::f80)
806
0
    return 0;
807
0
  return fastEmitInst_r(X86::CHS_Fp80, &X86::RFP80RegClass, Op0, Op0IsKill);
808
0
}
809
810
42
unsigned fastEmit_ISD_FNEG_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
811
42
  switch (VT.SimpleTy) {
812
42
  
case MVT::f32: return fastEmit_ISD_FNEG_MVT_f32_r(RetVT, Op0, Op0IsKill)1
;
813
42
  
case MVT::f64: return fastEmit_ISD_FNEG_MVT_f64_r(RetVT, Op0, Op0IsKill)1
;
814
42
  
case MVT::f80: return fastEmit_ISD_FNEG_MVT_f80_r(RetVT, Op0, Op0IsKill)0
;
815
42
  
default: return 040
;
816
42
  }
817
42
}
818
819
// FastEmit functions for ISD::FP_EXTEND.
820
821
0
unsigned fastEmit_ISD_FP_EXTEND_MVT_f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
822
0
  if (RetVT.SimpleTy != MVT::f64)
823
0
    return 0;
824
0
  if ((Subtarget->hasSSE2() && !Subtarget->hasAVX())) {
825
0
    return fastEmitInst_r(X86::CVTSS2SDrr, &X86::FR64RegClass, Op0, Op0IsKill);
826
0
  }
827
0
  return 0;
828
0
}
829
830
0
unsigned fastEmit_ISD_FP_EXTEND_MVT_v4f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
831
0
  if (RetVT.SimpleTy != MVT::v4f64)
832
0
    return 0;
833
0
  if ((Subtarget->hasVLX())) {
834
0
    return fastEmitInst_r(X86::VCVTPS2PDZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
835
0
  }
836
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
837
0
    return fastEmitInst_r(X86::VCVTPS2PDYrr, &X86::VR256RegClass, Op0, Op0IsKill);
838
0
  }
839
0
  return 0;
840
0
}
841
842
0
unsigned fastEmit_ISD_FP_EXTEND_MVT_v8f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
843
0
  if (RetVT.SimpleTy != MVT::v8f64)
844
0
    return 0;
845
0
  if ((Subtarget->hasAVX512())) {
846
0
    return fastEmitInst_r(X86::VCVTPS2PDZrr, &X86::VR512RegClass, Op0, Op0IsKill);
847
0
  }
848
0
  return 0;
849
0
}
850
851
unsigned fastEmit_ISD_FP_EXTEND_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
852
  switch (VT.SimpleTy) {
853
  case MVT::f32: return fastEmit_ISD_FP_EXTEND_MVT_f32_r(RetVT, Op0, Op0IsKill);
854
  case MVT::v4f32: return fastEmit_ISD_FP_EXTEND_MVT_v4f32_r(RetVT, Op0, Op0IsKill);
855
  case MVT::v8f32: return fastEmit_ISD_FP_EXTEND_MVT_v8f32_r(RetVT, Op0, Op0IsKill);
856
  default: return 0;
857
  }
858
}
859
860
// FastEmit functions for ISD::FP_ROUND.
861
862
0
unsigned fastEmit_ISD_FP_ROUND_MVT_f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
863
0
  if (RetVT.SimpleTy != MVT::f32)
864
0
    return 0;
865
0
  if ((Subtarget->hasSSE2() && !Subtarget->hasAVX())) {
866
0
    return fastEmitInst_r(X86::CVTSD2SSrr, &X86::FR32RegClass, Op0, Op0IsKill);
867
0
  }
868
0
  return 0;
869
0
}
870
871
0
unsigned fastEmit_ISD_FP_ROUND_MVT_v4f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
872
0
  if (RetVT.SimpleTy != MVT::v4f32)
873
0
    return 0;
874
0
  if ((Subtarget->hasVLX())) {
875
0
    return fastEmitInst_r(X86::VCVTPD2PSZ256rr, &X86::VR128XRegClass, Op0, Op0IsKill);
876
0
  }
877
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
878
0
    return fastEmitInst_r(X86::VCVTPD2PSYrr, &X86::VR128RegClass, Op0, Op0IsKill);
879
0
  }
880
0
  return 0;
881
0
}
882
883
0
unsigned fastEmit_ISD_FP_ROUND_MVT_v8f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
884
0
  if (RetVT.SimpleTy != MVT::v8f32)
885
0
    return 0;
886
0
  if ((Subtarget->hasAVX512())) {
887
0
    return fastEmitInst_r(X86::VCVTPD2PSZrr, &X86::VR256XRegClass, Op0, Op0IsKill);
888
0
  }
889
0
  return 0;
890
0
}
891
892
unsigned fastEmit_ISD_FP_ROUND_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
893
  switch (VT.SimpleTy) {
894
  case MVT::f64: return fastEmit_ISD_FP_ROUND_MVT_f64_r(RetVT, Op0, Op0IsKill);
895
  case MVT::v4f64: return fastEmit_ISD_FP_ROUND_MVT_v4f64_r(RetVT, Op0, Op0IsKill);
896
  case MVT::v8f64: return fastEmit_ISD_FP_ROUND_MVT_v8f64_r(RetVT, Op0, Op0IsKill);
897
  default: return 0;
898
  }
899
}
900
901
// FastEmit functions for ISD::FP_TO_SINT.
902
903
0
unsigned fastEmit_ISD_FP_TO_SINT_MVT_f32_MVT_i32_r(unsigned Op0, bool Op0IsKill) {
904
0
  if ((Subtarget->hasAVX512())) {
905
0
    return fastEmitInst_r(X86::VCVTTSS2SIZrr, &X86::GR32RegClass, Op0, Op0IsKill);
906
0
  }
907
0
  if ((Subtarget->hasSSE1() && !Subtarget->hasAVX())) {
908
0
    return fastEmitInst_r(X86::CVTTSS2SIrr, &X86::GR32RegClass, Op0, Op0IsKill);
909
0
  }
910
0
  if ((Subtarget->hasAVX() && !Subtarget->hasAVX512())) {
911
0
    return fastEmitInst_r(X86::VCVTTSS2SIrr, &X86::GR32RegClass, Op0, Op0IsKill);
912
0
  }
913
0
  return 0;
914
0
}
915
916
0
unsigned fastEmit_ISD_FP_TO_SINT_MVT_f32_MVT_i64_r(unsigned Op0, bool Op0IsKill) {
917
0
  if ((Subtarget->hasAVX512())) {
918
0
    return fastEmitInst_r(X86::VCVTTSS2SI64Zrr, &X86::GR64RegClass, Op0, Op0IsKill);
919
0
  }
920
0
  if ((Subtarget->hasSSE1() && !Subtarget->hasAVX())) {
921
0
    return fastEmitInst_r(X86::CVTTSS2SI64rr, &X86::GR64RegClass, Op0, Op0IsKill);
922
0
  }
923
0
  if ((Subtarget->hasAVX() && !Subtarget->hasAVX512())) {
924
0
    return fastEmitInst_r(X86::VCVTTSS2SI64rr, &X86::GR64RegClass, Op0, Op0IsKill);
925
0
  }
926
0
  return 0;
927
0
}
928
929
unsigned fastEmit_ISD_FP_TO_SINT_MVT_f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
930
switch (RetVT.SimpleTy) {
931
  case MVT::i32: return fastEmit_ISD_FP_TO_SINT_MVT_f32_MVT_i32_r(Op0, Op0IsKill);
932
  case MVT::i64: return fastEmit_ISD_FP_TO_SINT_MVT_f32_MVT_i64_r(Op0, Op0IsKill);
933
  default: return 0;
934
}
935
}
936
937
0
unsigned fastEmit_ISD_FP_TO_SINT_MVT_f64_MVT_i32_r(unsigned Op0, bool Op0IsKill) {
938
0
  if ((Subtarget->hasAVX512())) {
939
0
    return fastEmitInst_r(X86::VCVTTSD2SIZrr, &X86::GR32RegClass, Op0, Op0IsKill);
940
0
  }
941
0
  if ((Subtarget->hasSSE2() && !Subtarget->hasAVX())) {
942
0
    return fastEmitInst_r(X86::CVTTSD2SIrr, &X86::GR32RegClass, Op0, Op0IsKill);
943
0
  }
944
0
  if ((Subtarget->hasAVX() && !Subtarget->hasAVX512())) {
945
0
    return fastEmitInst_r(X86::VCVTTSD2SIrr, &X86::GR32RegClass, Op0, Op0IsKill);
946
0
  }
947
0
  return 0;
948
0
}
949
950
0
unsigned fastEmit_ISD_FP_TO_SINT_MVT_f64_MVT_i64_r(unsigned Op0, bool Op0IsKill) {
951
0
  if ((Subtarget->hasAVX512())) {
952
0
    return fastEmitInst_r(X86::VCVTTSD2SI64Zrr, &X86::GR64RegClass, Op0, Op0IsKill);
953
0
  }
954
0
  if ((Subtarget->hasSSE2() && !Subtarget->hasAVX())) {
955
0
    return fastEmitInst_r(X86::CVTTSD2SI64rr, &X86::GR64RegClass, Op0, Op0IsKill);
956
0
  }
957
0
  if ((Subtarget->hasAVX() && !Subtarget->hasAVX512())) {
958
0
    return fastEmitInst_r(X86::VCVTTSD2SI64rr, &X86::GR64RegClass, Op0, Op0IsKill);
959
0
  }
960
0
  return 0;
961
0
}
962
963
unsigned fastEmit_ISD_FP_TO_SINT_MVT_f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
964
switch (RetVT.SimpleTy) {
965
  case MVT::i32: return fastEmit_ISD_FP_TO_SINT_MVT_f64_MVT_i32_r(Op0, Op0IsKill);
966
  case MVT::i64: return fastEmit_ISD_FP_TO_SINT_MVT_f64_MVT_i64_r(Op0, Op0IsKill);
967
  default: return 0;
968
}
969
}
970
971
0
unsigned fastEmit_ISD_FP_TO_SINT_MVT_v4f32_MVT_v4i32_r(unsigned Op0, bool Op0IsKill) {
972
0
  if ((Subtarget->hasVLX())) {
973
0
    return fastEmitInst_r(X86::VCVTTPS2DQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
974
0
  }
975
0
  if ((Subtarget->hasSSE2() && !Subtarget->hasAVX())) {
976
0
    return fastEmitInst_r(X86::CVTTPS2DQrr, &X86::VR128RegClass, Op0, Op0IsKill);
977
0
  }
978
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
979
0
    return fastEmitInst_r(X86::VCVTTPS2DQrr, &X86::VR128RegClass, Op0, Op0IsKill);
980
0
  }
981
0
  return 0;
982
0
}
983
984
0
unsigned fastEmit_ISD_FP_TO_SINT_MVT_v4f32_MVT_v4i64_r(unsigned Op0, bool Op0IsKill) {
985
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
986
0
    return fastEmitInst_r(X86::VCVTTPS2QQZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
987
0
  }
988
0
  return 0;
989
0
}
990
991
unsigned fastEmit_ISD_FP_TO_SINT_MVT_v4f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
992
switch (RetVT.SimpleTy) {
993
  case MVT::v4i32: return fastEmit_ISD_FP_TO_SINT_MVT_v4f32_MVT_v4i32_r(Op0, Op0IsKill);
994
  case MVT::v4i64: return fastEmit_ISD_FP_TO_SINT_MVT_v4f32_MVT_v4i64_r(Op0, Op0IsKill);
995
  default: return 0;
996
}
997
}
998
999
0
unsigned fastEmit_ISD_FP_TO_SINT_MVT_v8f32_MVT_v8i32_r(unsigned Op0, bool Op0IsKill) {
1000
0
  if ((Subtarget->hasVLX())) {
1001
0
    return fastEmitInst_r(X86::VCVTTPS2DQZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
1002
0
  }
1003
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
1004
0
    return fastEmitInst_r(X86::VCVTTPS2DQYrr, &X86::VR256RegClass, Op0, Op0IsKill);
1005
0
  }
1006
0
  return 0;
1007
0
}
1008
1009
0
unsigned fastEmit_ISD_FP_TO_SINT_MVT_v8f32_MVT_v8i64_r(unsigned Op0, bool Op0IsKill) {
1010
0
  if ((Subtarget->hasDQI())) {
1011
0
    return fastEmitInst_r(X86::VCVTTPS2QQZrr, &X86::VR512RegClass, Op0, Op0IsKill);
1012
0
  }
1013
0
  return 0;
1014
0
}
1015
1016
unsigned fastEmit_ISD_FP_TO_SINT_MVT_v8f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1017
switch (RetVT.SimpleTy) {
1018
  case MVT::v8i32: return fastEmit_ISD_FP_TO_SINT_MVT_v8f32_MVT_v8i32_r(Op0, Op0IsKill);
1019
  case MVT::v8i64: return fastEmit_ISD_FP_TO_SINT_MVT_v8f32_MVT_v8i64_r(Op0, Op0IsKill);
1020
  default: return 0;
1021
}
1022
}
1023
1024
0
unsigned fastEmit_ISD_FP_TO_SINT_MVT_v16f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1025
0
  if (RetVT.SimpleTy != MVT::v16i32)
1026
0
    return 0;
1027
0
  if ((Subtarget->hasAVX512())) {
1028
0
    return fastEmitInst_r(X86::VCVTTPS2DQZrr, &X86::VR512RegClass, Op0, Op0IsKill);
1029
0
  }
1030
0
  return 0;
1031
0
}
1032
1033
0
unsigned fastEmit_ISD_FP_TO_SINT_MVT_v2f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1034
0
  if (RetVT.SimpleTy != MVT::v2i64)
1035
0
    return 0;
1036
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
1037
0
    return fastEmitInst_r(X86::VCVTTPD2QQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
1038
0
  }
1039
0
  return 0;
1040
0
}
1041
1042
0
unsigned fastEmit_ISD_FP_TO_SINT_MVT_v4f64_MVT_v4i32_r(unsigned Op0, bool Op0IsKill) {
1043
0
  if ((Subtarget->hasVLX())) {
1044
0
    return fastEmitInst_r(X86::VCVTTPD2DQZ256rr, &X86::VR128XRegClass, Op0, Op0IsKill);
1045
0
  }
1046
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
1047
0
    return fastEmitInst_r(X86::VCVTTPD2DQYrr, &X86::VR128RegClass, Op0, Op0IsKill);
1048
0
  }
1049
0
  return 0;
1050
0
}
1051
1052
0
unsigned fastEmit_ISD_FP_TO_SINT_MVT_v4f64_MVT_v4i64_r(unsigned Op0, bool Op0IsKill) {
1053
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
1054
0
    return fastEmitInst_r(X86::VCVTTPD2QQZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
1055
0
  }
1056
0
  return 0;
1057
0
}
1058
1059
unsigned fastEmit_ISD_FP_TO_SINT_MVT_v4f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1060
switch (RetVT.SimpleTy) {
1061
  case MVT::v4i32: return fastEmit_ISD_FP_TO_SINT_MVT_v4f64_MVT_v4i32_r(Op0, Op0IsKill);
1062
  case MVT::v4i64: return fastEmit_ISD_FP_TO_SINT_MVT_v4f64_MVT_v4i64_r(Op0, Op0IsKill);
1063
  default: return 0;
1064
}
1065
}
1066
1067
0
unsigned fastEmit_ISD_FP_TO_SINT_MVT_v8f64_MVT_v8i32_r(unsigned Op0, bool Op0IsKill) {
1068
0
  if ((Subtarget->hasAVX512())) {
1069
0
    return fastEmitInst_r(X86::VCVTTPD2DQZrr, &X86::VR256XRegClass, Op0, Op0IsKill);
1070
0
  }
1071
0
  return 0;
1072
0
}
1073
1074
0
unsigned fastEmit_ISD_FP_TO_SINT_MVT_v8f64_MVT_v8i64_r(unsigned Op0, bool Op0IsKill) {
1075
0
  if ((Subtarget->hasDQI())) {
1076
0
    return fastEmitInst_r(X86::VCVTTPD2QQZrr, &X86::VR512RegClass, Op0, Op0IsKill);
1077
0
  }
1078
0
  return 0;
1079
0
}
1080
1081
unsigned fastEmit_ISD_FP_TO_SINT_MVT_v8f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1082
switch (RetVT.SimpleTy) {
1083
  case MVT::v8i32: return fastEmit_ISD_FP_TO_SINT_MVT_v8f64_MVT_v8i32_r(Op0, Op0IsKill);
1084
  case MVT::v8i64: return fastEmit_ISD_FP_TO_SINT_MVT_v8f64_MVT_v8i64_r(Op0, Op0IsKill);
1085
  default: return 0;
1086
}
1087
}
1088
1089
unsigned fastEmit_ISD_FP_TO_SINT_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
1090
  switch (VT.SimpleTy) {
1091
  case MVT::f32: return fastEmit_ISD_FP_TO_SINT_MVT_f32_r(RetVT, Op0, Op0IsKill);
1092
  case MVT::f64: return fastEmit_ISD_FP_TO_SINT_MVT_f64_r(RetVT, Op0, Op0IsKill);
1093
  case MVT::v4f32: return fastEmit_ISD_FP_TO_SINT_MVT_v4f32_r(RetVT, Op0, Op0IsKill);
1094
  case MVT::v8f32: return fastEmit_ISD_FP_TO_SINT_MVT_v8f32_r(RetVT, Op0, Op0IsKill);
1095
  case MVT::v16f32: return fastEmit_ISD_FP_TO_SINT_MVT_v16f32_r(RetVT, Op0, Op0IsKill);
1096
  case MVT::v2f64: return fastEmit_ISD_FP_TO_SINT_MVT_v2f64_r(RetVT, Op0, Op0IsKill);
1097
  case MVT::v4f64: return fastEmit_ISD_FP_TO_SINT_MVT_v4f64_r(RetVT, Op0, Op0IsKill);
1098
  case MVT::v8f64: return fastEmit_ISD_FP_TO_SINT_MVT_v8f64_r(RetVT, Op0, Op0IsKill);
1099
  default: return 0;
1100
  }
1101
}
1102
1103
// FastEmit functions for ISD::FP_TO_UINT.
1104
1105
0
unsigned fastEmit_ISD_FP_TO_UINT_MVT_f32_MVT_i32_r(unsigned Op0, bool Op0IsKill) {
1106
0
  if ((Subtarget->hasAVX512())) {
1107
0
    return fastEmitInst_r(X86::VCVTTSS2USIZrr, &X86::GR32RegClass, Op0, Op0IsKill);
1108
0
  }
1109
0
  return 0;
1110
0
}
1111
1112
0
unsigned fastEmit_ISD_FP_TO_UINT_MVT_f32_MVT_i64_r(unsigned Op0, bool Op0IsKill) {
1113
0
  if ((Subtarget->hasAVX512())) {
1114
0
    return fastEmitInst_r(X86::VCVTTSS2USI64Zrr, &X86::GR64RegClass, Op0, Op0IsKill);
1115
0
  }
1116
0
  return 0;
1117
0
}
1118
1119
unsigned fastEmit_ISD_FP_TO_UINT_MVT_f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1120
switch (RetVT.SimpleTy) {
1121
  case MVT::i32: return fastEmit_ISD_FP_TO_UINT_MVT_f32_MVT_i32_r(Op0, Op0IsKill);
1122
  case MVT::i64: return fastEmit_ISD_FP_TO_UINT_MVT_f32_MVT_i64_r(Op0, Op0IsKill);
1123
  default: return 0;
1124
}
1125
}
1126
1127
0
unsigned fastEmit_ISD_FP_TO_UINT_MVT_f64_MVT_i32_r(unsigned Op0, bool Op0IsKill) {
1128
0
  if ((Subtarget->hasAVX512())) {
1129
0
    return fastEmitInst_r(X86::VCVTTSD2USIZrr, &X86::GR32RegClass, Op0, Op0IsKill);
1130
0
  }
1131
0
  return 0;
1132
0
}
1133
1134
0
unsigned fastEmit_ISD_FP_TO_UINT_MVT_f64_MVT_i64_r(unsigned Op0, bool Op0IsKill) {
1135
0
  if ((Subtarget->hasAVX512())) {
1136
0
    return fastEmitInst_r(X86::VCVTTSD2USI64Zrr, &X86::GR64RegClass, Op0, Op0IsKill);
1137
0
  }
1138
0
  return 0;
1139
0
}
1140
1141
unsigned fastEmit_ISD_FP_TO_UINT_MVT_f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1142
switch (RetVT.SimpleTy) {
1143
  case MVT::i32: return fastEmit_ISD_FP_TO_UINT_MVT_f64_MVT_i32_r(Op0, Op0IsKill);
1144
  case MVT::i64: return fastEmit_ISD_FP_TO_UINT_MVT_f64_MVT_i64_r(Op0, Op0IsKill);
1145
  default: return 0;
1146
}
1147
}
1148
1149
0
unsigned fastEmit_ISD_FP_TO_UINT_MVT_v4f32_MVT_v4i32_r(unsigned Op0, bool Op0IsKill) {
1150
0
  if ((Subtarget->hasVLX())) {
1151
0
    return fastEmitInst_r(X86::VCVTTPS2UDQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
1152
0
  }
1153
0
  return 0;
1154
0
}
1155
1156
0
unsigned fastEmit_ISD_FP_TO_UINT_MVT_v4f32_MVT_v4i64_r(unsigned Op0, bool Op0IsKill) {
1157
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
1158
0
    return fastEmitInst_r(X86::VCVTTPS2UQQZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
1159
0
  }
1160
0
  return 0;
1161
0
}
1162
1163
unsigned fastEmit_ISD_FP_TO_UINT_MVT_v4f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1164
switch (RetVT.SimpleTy) {
1165
  case MVT::v4i32: return fastEmit_ISD_FP_TO_UINT_MVT_v4f32_MVT_v4i32_r(Op0, Op0IsKill);
1166
  case MVT::v4i64: return fastEmit_ISD_FP_TO_UINT_MVT_v4f32_MVT_v4i64_r(Op0, Op0IsKill);
1167
  default: return 0;
1168
}
1169
}
1170
1171
0
unsigned fastEmit_ISD_FP_TO_UINT_MVT_v8f32_MVT_v8i32_r(unsigned Op0, bool Op0IsKill) {
1172
0
  if ((Subtarget->hasVLX())) {
1173
0
    return fastEmitInst_r(X86::VCVTTPS2UDQZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
1174
0
  }
1175
0
  return 0;
1176
0
}
1177
1178
0
unsigned fastEmit_ISD_FP_TO_UINT_MVT_v8f32_MVT_v8i64_r(unsigned Op0, bool Op0IsKill) {
1179
0
  if ((Subtarget->hasDQI())) {
1180
0
    return fastEmitInst_r(X86::VCVTTPS2UQQZrr, &X86::VR512RegClass, Op0, Op0IsKill);
1181
0
  }
1182
0
  return 0;
1183
0
}
1184
1185
unsigned fastEmit_ISD_FP_TO_UINT_MVT_v8f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1186
switch (RetVT.SimpleTy) {
1187
  case MVT::v8i32: return fastEmit_ISD_FP_TO_UINT_MVT_v8f32_MVT_v8i32_r(Op0, Op0IsKill);
1188
  case MVT::v8i64: return fastEmit_ISD_FP_TO_UINT_MVT_v8f32_MVT_v8i64_r(Op0, Op0IsKill);
1189
  default: return 0;
1190
}
1191
}
1192
1193
0
unsigned fastEmit_ISD_FP_TO_UINT_MVT_v16f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1194
0
  if (RetVT.SimpleTy != MVT::v16i32)
1195
0
    return 0;
1196
0
  if ((Subtarget->hasAVX512())) {
1197
0
    return fastEmitInst_r(X86::VCVTTPS2UDQZrr, &X86::VR512RegClass, Op0, Op0IsKill);
1198
0
  }
1199
0
  return 0;
1200
0
}
1201
1202
0
unsigned fastEmit_ISD_FP_TO_UINT_MVT_v2f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1203
0
  if (RetVT.SimpleTy != MVT::v2i64)
1204
0
    return 0;
1205
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
1206
0
    return fastEmitInst_r(X86::VCVTTPD2UQQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
1207
0
  }
1208
0
  return 0;
1209
0
}
1210
1211
0
unsigned fastEmit_ISD_FP_TO_UINT_MVT_v4f64_MVT_v4i32_r(unsigned Op0, bool Op0IsKill) {
1212
0
  if ((Subtarget->hasVLX())) {
1213
0
    return fastEmitInst_r(X86::VCVTTPD2UDQZ256rr, &X86::VR128XRegClass, Op0, Op0IsKill);
1214
0
  }
1215
0
  return 0;
1216
0
}
1217
1218
0
unsigned fastEmit_ISD_FP_TO_UINT_MVT_v4f64_MVT_v4i64_r(unsigned Op0, bool Op0IsKill) {
1219
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
1220
0
    return fastEmitInst_r(X86::VCVTTPD2UQQZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
1221
0
  }
1222
0
  return 0;
1223
0
}
1224
1225
unsigned fastEmit_ISD_FP_TO_UINT_MVT_v4f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1226
switch (RetVT.SimpleTy) {
1227
  case MVT::v4i32: return fastEmit_ISD_FP_TO_UINT_MVT_v4f64_MVT_v4i32_r(Op0, Op0IsKill);
1228
  case MVT::v4i64: return fastEmit_ISD_FP_TO_UINT_MVT_v4f64_MVT_v4i64_r(Op0, Op0IsKill);
1229
  default: return 0;
1230
}
1231
}
1232
1233
0
unsigned fastEmit_ISD_FP_TO_UINT_MVT_v8f64_MVT_v8i32_r(unsigned Op0, bool Op0IsKill) {
1234
0
  if ((Subtarget->hasAVX512())) {
1235
0
    return fastEmitInst_r(X86::VCVTTPD2UDQZrr, &X86::VR256XRegClass, Op0, Op0IsKill);
1236
0
  }
1237
0
  return 0;
1238
0
}
1239
1240
0
unsigned fastEmit_ISD_FP_TO_UINT_MVT_v8f64_MVT_v8i64_r(unsigned Op0, bool Op0IsKill) {
1241
0
  if ((Subtarget->hasDQI())) {
1242
0
    return fastEmitInst_r(X86::VCVTTPD2UQQZrr, &X86::VR512RegClass, Op0, Op0IsKill);
1243
0
  }
1244
0
  return 0;
1245
0
}
1246
1247
unsigned fastEmit_ISD_FP_TO_UINT_MVT_v8f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1248
switch (RetVT.SimpleTy) {
1249
  case MVT::v8i32: return fastEmit_ISD_FP_TO_UINT_MVT_v8f64_MVT_v8i32_r(Op0, Op0IsKill);
1250
  case MVT::v8i64: return fastEmit_ISD_FP_TO_UINT_MVT_v8f64_MVT_v8i64_r(Op0, Op0IsKill);
1251
  default: return 0;
1252
}
1253
}
1254
1255
unsigned fastEmit_ISD_FP_TO_UINT_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
1256
  switch (VT.SimpleTy) {
1257
  case MVT::f32: return fastEmit_ISD_FP_TO_UINT_MVT_f32_r(RetVT, Op0, Op0IsKill);
1258
  case MVT::f64: return fastEmit_ISD_FP_TO_UINT_MVT_f64_r(RetVT, Op0, Op0IsKill);
1259
  case MVT::v4f32: return fastEmit_ISD_FP_TO_UINT_MVT_v4f32_r(RetVT, Op0, Op0IsKill);
1260
  case MVT::v8f32: return fastEmit_ISD_FP_TO_UINT_MVT_v8f32_r(RetVT, Op0, Op0IsKill);
1261
  case MVT::v16f32: return fastEmit_ISD_FP_TO_UINT_MVT_v16f32_r(RetVT, Op0, Op0IsKill);
1262
  case MVT::v2f64: return fastEmit_ISD_FP_TO_UINT_MVT_v2f64_r(RetVT, Op0, Op0IsKill);
1263
  case MVT::v4f64: return fastEmit_ISD_FP_TO_UINT_MVT_v4f64_r(RetVT, Op0, Op0IsKill);
1264
  case MVT::v8f64: return fastEmit_ISD_FP_TO_UINT_MVT_v8f64_r(RetVT, Op0, Op0IsKill);
1265
  default: return 0;
1266
  }
1267
}
1268
1269
// FastEmit functions for ISD::FSIN.
1270
1271
0
unsigned fastEmit_ISD_FSIN_MVT_f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1272
0
  if (RetVT.SimpleTy != MVT::f32)
1273
0
    return 0;
1274
0
  if ((!Subtarget->hasSSE1())) {
1275
0
    return fastEmitInst_r(X86::SIN_Fp32, &X86::RFP32RegClass, Op0, Op0IsKill);
1276
0
  }
1277
0
  return 0;
1278
0
}
1279
1280
0
unsigned fastEmit_ISD_FSIN_MVT_f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1281
0
  if (RetVT.SimpleTy != MVT::f64)
1282
0
    return 0;
1283
0
  if ((!Subtarget->hasSSE2())) {
1284
0
    return fastEmitInst_r(X86::SIN_Fp64, &X86::RFP64RegClass, Op0, Op0IsKill);
1285
0
  }
1286
0
  return 0;
1287
0
}
1288
1289
0
unsigned fastEmit_ISD_FSIN_MVT_f80_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1290
0
  if (RetVT.SimpleTy != MVT::f80)
1291
0
    return 0;
1292
0
  return fastEmitInst_r(X86::SIN_Fp80, &X86::RFP80RegClass, Op0, Op0IsKill);
1293
0
}
1294
1295
unsigned fastEmit_ISD_FSIN_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
1296
  switch (VT.SimpleTy) {
1297
  case MVT::f32: return fastEmit_ISD_FSIN_MVT_f32_r(RetVT, Op0, Op0IsKill);
1298
  case MVT::f64: return fastEmit_ISD_FSIN_MVT_f64_r(RetVT, Op0, Op0IsKill);
1299
  case MVT::f80: return fastEmit_ISD_FSIN_MVT_f80_r(RetVT, Op0, Op0IsKill);
1300
  default: return 0;
1301
  }
1302
}
1303
1304
// FastEmit functions for ISD::FSQRT.
1305
1306
0
unsigned fastEmit_ISD_FSQRT_MVT_f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1307
0
  if (RetVT.SimpleTy != MVT::f32)
1308
0
    return 0;
1309
0
  if ((Subtarget->hasSSE1() && !Subtarget->hasAVX())) {
1310
0
    return fastEmitInst_r(X86::SQRTSSr, &X86::FR32RegClass, Op0, Op0IsKill);
1311
0
  }
1312
0
  if ((!Subtarget->hasSSE1())) {
1313
0
    return fastEmitInst_r(X86::SQRT_Fp32, &X86::RFP32RegClass, Op0, Op0IsKill);
1314
0
  }
1315
0
  return 0;
1316
0
}
1317
1318
0
unsigned fastEmit_ISD_FSQRT_MVT_f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1319
0
  if (RetVT.SimpleTy != MVT::f64)
1320
0
    return 0;
1321
0
  if ((Subtarget->hasSSE2() && !Subtarget->hasAVX())) {
1322
0
    return fastEmitInst_r(X86::SQRTSDr, &X86::FR64RegClass, Op0, Op0IsKill);
1323
0
  }
1324
0
  if ((!Subtarget->hasSSE2())) {
1325
0
    return fastEmitInst_r(X86::SQRT_Fp64, &X86::RFP64RegClass, Op0, Op0IsKill);
1326
0
  }
1327
0
  return 0;
1328
0
}
1329
1330
0
unsigned fastEmit_ISD_FSQRT_MVT_f80_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1331
0
  if (RetVT.SimpleTy != MVT::f80)
1332
0
    return 0;
1333
0
  return fastEmitInst_r(X86::SQRT_Fp80, &X86::RFP80RegClass, Op0, Op0IsKill);
1334
0
}
1335
1336
0
unsigned fastEmit_ISD_FSQRT_MVT_v4f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1337
0
  if (RetVT.SimpleTy != MVT::v4f32)
1338
0
    return 0;
1339
0
  if ((Subtarget->hasVLX())) {
1340
0
    return fastEmitInst_r(X86::VSQRTPSZ128r, &X86::VR128XRegClass, Op0, Op0IsKill);
1341
0
  }
1342
0
  if ((Subtarget->hasSSE1() && !Subtarget->hasAVX())) {
1343
0
    return fastEmitInst_r(X86::SQRTPSr, &X86::VR128RegClass, Op0, Op0IsKill);
1344
0
  }
1345
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
1346
0
    return fastEmitInst_r(X86::VSQRTPSr, &X86::VR128RegClass, Op0, Op0IsKill);
1347
0
  }
1348
0
  return 0;
1349
0
}
1350
1351
0
unsigned fastEmit_ISD_FSQRT_MVT_v8f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1352
0
  if (RetVT.SimpleTy != MVT::v8f32)
1353
0
    return 0;
1354
0
  if ((Subtarget->hasVLX())) {
1355
0
    return fastEmitInst_r(X86::VSQRTPSZ256r, &X86::VR256XRegClass, Op0, Op0IsKill);
1356
0
  }
1357
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
1358
0
    return fastEmitInst_r(X86::VSQRTPSYr, &X86::VR256RegClass, Op0, Op0IsKill);
1359
0
  }
1360
0
  return 0;
1361
0
}
1362
1363
0
unsigned fastEmit_ISD_FSQRT_MVT_v16f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1364
0
  if (RetVT.SimpleTy != MVT::v16f32)
1365
0
    return 0;
1366
0
  if ((Subtarget->hasAVX512())) {
1367
0
    return fastEmitInst_r(X86::VSQRTPSZr, &X86::VR512RegClass, Op0, Op0IsKill);
1368
0
  }
1369
0
  return 0;
1370
0
}
1371
1372
0
unsigned fastEmit_ISD_FSQRT_MVT_v2f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1373
0
  if (RetVT.SimpleTy != MVT::v2f64)
1374
0
    return 0;
1375
0
  if ((Subtarget->hasVLX())) {
1376
0
    return fastEmitInst_r(X86::VSQRTPDZ128r, &X86::VR128XRegClass, Op0, Op0IsKill);
1377
0
  }
1378
0
  if ((Subtarget->hasSSE2() && !Subtarget->hasAVX())) {
1379
0
    return fastEmitInst_r(X86::SQRTPDr, &X86::VR128RegClass, Op0, Op0IsKill);
1380
0
  }
1381
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
1382
0
    return fastEmitInst_r(X86::VSQRTPDr, &X86::VR128RegClass, Op0, Op0IsKill);
1383
0
  }
1384
0
  return 0;
1385
0
}
1386
1387
0
unsigned fastEmit_ISD_FSQRT_MVT_v4f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1388
0
  if (RetVT.SimpleTy != MVT::v4f64)
1389
0
    return 0;
1390
0
  if ((Subtarget->hasVLX())) {
1391
0
    return fastEmitInst_r(X86::VSQRTPDZ256r, &X86::VR256XRegClass, Op0, Op0IsKill);
1392
0
  }
1393
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
1394
0
    return fastEmitInst_r(X86::VSQRTPDYr, &X86::VR256RegClass, Op0, Op0IsKill);
1395
0
  }
1396
0
  return 0;
1397
0
}
1398
1399
0
unsigned fastEmit_ISD_FSQRT_MVT_v8f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1400
0
  if (RetVT.SimpleTy != MVT::v8f64)
1401
0
    return 0;
1402
0
  if ((Subtarget->hasAVX512())) {
1403
0
    return fastEmitInst_r(X86::VSQRTPDZr, &X86::VR512RegClass, Op0, Op0IsKill);
1404
0
  }
1405
0
  return 0;
1406
0
}
1407
1408
unsigned fastEmit_ISD_FSQRT_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
1409
  switch (VT.SimpleTy) {
1410
  case MVT::f32: return fastEmit_ISD_FSQRT_MVT_f32_r(RetVT, Op0, Op0IsKill);
1411
  case MVT::f64: return fastEmit_ISD_FSQRT_MVT_f64_r(RetVT, Op0, Op0IsKill);
1412
  case MVT::f80: return fastEmit_ISD_FSQRT_MVT_f80_r(RetVT, Op0, Op0IsKill);
1413
  case MVT::v4f32: return fastEmit_ISD_FSQRT_MVT_v4f32_r(RetVT, Op0, Op0IsKill);
1414
  case MVT::v8f32: return fastEmit_ISD_FSQRT_MVT_v8f32_r(RetVT, Op0, Op0IsKill);
1415
  case MVT::v16f32: return fastEmit_ISD_FSQRT_MVT_v16f32_r(RetVT, Op0, Op0IsKill);
1416
  case MVT::v2f64: return fastEmit_ISD_FSQRT_MVT_v2f64_r(RetVT, Op0, Op0IsKill);
1417
  case MVT::v4f64: return fastEmit_ISD_FSQRT_MVT_v4f64_r(RetVT, Op0, Op0IsKill);
1418
  case MVT::v8f64: return fastEmit_ISD_FSQRT_MVT_v8f64_r(RetVT, Op0, Op0IsKill);
1419
  default: return 0;
1420
  }
1421
}
1422
1423
// FastEmit functions for ISD::SCALAR_TO_VECTOR.
1424
1425
1
unsigned fastEmit_ISD_SCALAR_TO_VECTOR_MVT_i32_MVT_v4i32_r(unsigned Op0, bool Op0IsKill) {
1426
1
  if ((Subtarget->hasAVX512())) {
1427
0
    return fastEmitInst_r(X86::VMOVDI2PDIZrr, &X86::VR128XRegClass, Op0, Op0IsKill);
1428
0
  }
1429
1
  if ((Subtarget->hasSSE2() && !Subtarget->hasAVX())) {
1430
0
    return fastEmitInst_r(X86::MOVDI2PDIrr, &X86::VR128RegClass, Op0, Op0IsKill);
1431
0
  }
1432
1
  if ((Subtarget->hasAVX() && !Subtarget->hasAVX512())) {
1433
1
    return fastEmitInst_r(X86::VMOVDI2PDIrr, &X86::VR128RegClass, Op0, Op0IsKill);
1434
1
  }
1435
0
  return 0;
1436
0
}
1437
1438
0
unsigned fastEmit_ISD_SCALAR_TO_VECTOR_MVT_i32_MVT_x86mmx_r(unsigned Op0, bool Op0IsKill) {
1439
0
  if ((Subtarget->hasMMX())) {
1440
0
    return fastEmitInst_r(X86::MMX_MOVD64rr, &X86::VR64RegClass, Op0, Op0IsKill);
1441
0
  }
1442
0
  return 0;
1443
0
}
1444
1445
1
unsigned fastEmit_ISD_SCALAR_TO_VECTOR_MVT_i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1446
1
switch (RetVT.SimpleTy) {
1447
1
  case MVT::v4i32: return fastEmit_ISD_SCALAR_TO_VECTOR_MVT_i32_MVT_v4i32_r(Op0, Op0IsKill);
1448
1
  
case MVT::x86mmx: return fastEmit_ISD_SCALAR_TO_VECTOR_MVT_i32_MVT_x86mmx_r(Op0, Op0IsKill)0
;
1449
1
  
default: return 00
;
1450
1
}
1451
1
}
1452
1453
0
unsigned fastEmit_ISD_SCALAR_TO_VECTOR_MVT_i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1454
0
  if (RetVT.SimpleTy != MVT::v2i64)
1455
0
    return 0;
1456
0
  if ((Subtarget->hasAVX512())) {
1457
0
    return fastEmitInst_r(X86::VMOV64toPQIZrr, &X86::VR128XRegClass, Op0, Op0IsKill);
1458
0
  }
1459
0
  if ((Subtarget->hasSSE2() && !Subtarget->hasAVX())) {
1460
0
    return fastEmitInst_r(X86::MOV64toPQIrr, &X86::VR128RegClass, Op0, Op0IsKill);
1461
0
  }
1462
0
  if ((Subtarget->hasAVX() && !Subtarget->hasAVX512())) {
1463
0
    return fastEmitInst_r(X86::VMOV64toPQIrr, &X86::VR128RegClass, Op0, Op0IsKill);
1464
0
  }
1465
0
  return 0;
1466
0
}
1467
1468
1
unsigned fastEmit_ISD_SCALAR_TO_VECTOR_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
1469
1
  switch (VT.SimpleTy) {
1470
1
  case MVT::i32: return fastEmit_ISD_SCALAR_TO_VECTOR_MVT_i32_r(RetVT, Op0, Op0IsKill);
1471
1
  
case MVT::i64: return fastEmit_ISD_SCALAR_TO_VECTOR_MVT_i64_r(RetVT, Op0, Op0IsKill)0
;
1472
1
  
default: return 00
;
1473
1
  }
1474
1
}
1475
1476
// FastEmit functions for ISD::SIGN_EXTEND.
1477
1478
40
unsigned fastEmit_ISD_SIGN_EXTEND_MVT_i8_MVT_i32_r(unsigned Op0, bool Op0IsKill) {
1479
40
  return fastEmitInst_r(X86::MOVSX32rr8, &X86::GR32RegClass, Op0, Op0IsKill);
1480
40
}
1481
1482
3
unsigned fastEmit_ISD_SIGN_EXTEND_MVT_i8_MVT_i64_r(unsigned Op0, bool Op0IsKill) {
1483
3
  return fastEmitInst_r(X86::MOVSX64rr8, &X86::GR64RegClass, Op0, Op0IsKill);
1484
3
}
1485
1486
51
unsigned fastEmit_ISD_SIGN_EXTEND_MVT_i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1487
51
switch (RetVT.SimpleTy) {
1488
51
  
case MVT::i32: return fastEmit_ISD_SIGN_EXTEND_MVT_i8_MVT_i32_r(Op0, Op0IsKill)40
;
1489
51
  
case MVT::i64: return fastEmit_ISD_SIGN_EXTEND_MVT_i8_MVT_i64_r(Op0, Op0IsKill)3
;
1490
51
  
default: return 08
;
1491
51
}
1492
51
}
1493
1494
7
unsigned fastEmit_ISD_SIGN_EXTEND_MVT_i16_MVT_i32_r(unsigned Op0, bool Op0IsKill) {
1495
7
  return fastEmitInst_r(X86::MOVSX32rr16, &X86::GR32RegClass, Op0, Op0IsKill);
1496
7
}
1497
1498
1
unsigned fastEmit_ISD_SIGN_EXTEND_MVT_i16_MVT_i64_r(unsigned Op0, bool Op0IsKill) {
1499
1
  return fastEmitInst_r(X86::MOVSX64rr16, &X86::GR64RegClass, Op0, Op0IsKill);
1500
1
}
1501
1502
8
unsigned fastEmit_ISD_SIGN_EXTEND_MVT_i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1503
8
switch (RetVT.SimpleTy) {
1504
8
  
case MVT::i32: return fastEmit_ISD_SIGN_EXTEND_MVT_i16_MVT_i32_r(Op0, Op0IsKill)7
;
1505
8
  
case MVT::i64: return fastEmit_ISD_SIGN_EXTEND_MVT_i16_MVT_i64_r(Op0, Op0IsKill)1
;
1506
8
  
default: return 00
;
1507
8
}
1508
8
}
1509
1510
59
unsigned fastEmit_ISD_SIGN_EXTEND_MVT_i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1511
59
  if (RetVT.SimpleTy != MVT::i64)
1512
0
    return 0;
1513
59
  if ((Subtarget->is64Bit())) {
1514
59
    return fastEmitInst_r(X86::MOVSX64rr32, &X86::GR64RegClass, Op0, Op0IsKill);
1515
59
  }
1516
0
  return 0;
1517
0
}
1518
1519
28
unsigned fastEmit_ISD_SIGN_EXTEND_MVT_v2i1_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1520
28
  if (RetVT.SimpleTy != MVT::v2i64)
1521
0
    return 0;
1522
28
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
1523
28
    return fastEmitInst_r(X86::VPMOVM2QZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
1524
28
  }
1525
0
  return 0;
1526
0
}
1527
1528
30
unsigned fastEmit_ISD_SIGN_EXTEND_MVT_v4i1_MVT_v4i32_r(unsigned Op0, bool Op0IsKill) {
1529
30
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
1530
30
    return fastEmitInst_r(X86::VPMOVM2DZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
1531
30
  }
1532
0
  return 0;
1533
0
}
1534
1535
0
unsigned fastEmit_ISD_SIGN_EXTEND_MVT_v4i1_MVT_v4i64_r(unsigned Op0, bool Op0IsKill) {
1536
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
1537
0
    return fastEmitInst_r(X86::VPMOVM2QZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
1538
0
  }
1539
0
  return 0;
1540
0
}
1541
1542
30
unsigned fastEmit_ISD_SIGN_EXTEND_MVT_v4i1_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1543
30
switch (RetVT.SimpleTy) {
1544
30
  case MVT::v4i32: return fastEmit_ISD_SIGN_EXTEND_MVT_v4i1_MVT_v4i32_r(Op0, Op0IsKill);
1545
30
  
case MVT::v4i64: return fastEmit_ISD_SIGN_EXTEND_MVT_v4i1_MVT_v4i64_r(Op0, Op0IsKill)0
;
1546
30
  
default: return 00
;
1547
30
}
1548
30
}
1549
1550
6
unsigned fastEmit_ISD_SIGN_EXTEND_MVT_v8i1_MVT_v8i16_r(unsigned Op0, bool Op0IsKill) {
1551
6
  if ((Subtarget->hasBWI()) && (Subtarget->hasVLX())) {
1552
6
    return fastEmitInst_r(X86::VPMOVM2WZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
1553
6
  }
1554
0
  return 0;
1555
0
}
1556
1557
0
unsigned fastEmit_ISD_SIGN_EXTEND_MVT_v8i1_MVT_v8i32_r(unsigned Op0, bool Op0IsKill) {
1558
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
1559
0
    return fastEmitInst_r(X86::VPMOVM2DZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
1560
0
  }
1561
0
  return 0;
1562
0
}
1563
1564
0
unsigned fastEmit_ISD_SIGN_EXTEND_MVT_v8i1_MVT_v8i64_r(unsigned Op0, bool Op0IsKill) {
1565
0
  if ((Subtarget->hasDQI())) {
1566
0
    return fastEmitInst_r(X86::VPMOVM2QZrr, &X86::VR512RegClass, Op0, Op0IsKill);
1567
0
  }
1568
0
  return 0;
1569
0
}
1570
1571
6
unsigned fastEmit_ISD_SIGN_EXTEND_MVT_v8i1_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1572
6
switch (RetVT.SimpleTy) {
1573
6
  case MVT::v8i16: return fastEmit_ISD_SIGN_EXTEND_MVT_v8i1_MVT_v8i16_r(Op0, Op0IsKill);
1574
6
  
case MVT::v8i32: return fastEmit_ISD_SIGN_EXTEND_MVT_v8i1_MVT_v8i32_r(Op0, Op0IsKill)0
;
1575
6
  
case MVT::v8i64: return fastEmit_ISD_SIGN_EXTEND_MVT_v8i1_MVT_v8i64_r(Op0, Op0IsKill)0
;
1576
6
  
default: return 00
;
1577
6
}
1578
6
}
1579
1580
6
unsigned fastEmit_ISD_SIGN_EXTEND_MVT_v16i1_MVT_v16i8_r(unsigned Op0, bool Op0IsKill) {
1581
6
  if ((Subtarget->hasBWI()) && (Subtarget->hasVLX())) {
1582
6
    return fastEmitInst_r(X86::VPMOVM2BZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
1583
6
  }
1584
0
  return 0;
1585
0
}
1586
1587
0
unsigned fastEmit_ISD_SIGN_EXTEND_MVT_v16i1_MVT_v16i16_r(unsigned Op0, bool Op0IsKill) {
1588
0
  if ((Subtarget->hasBWI()) && (Subtarget->hasVLX())) {
1589
0
    return fastEmitInst_r(X86::VPMOVM2WZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
1590
0
  }
1591
0
  return 0;
1592
0
}
1593
1594
0
unsigned fastEmit_ISD_SIGN_EXTEND_MVT_v16i1_MVT_v16i32_r(unsigned Op0, bool Op0IsKill) {
1595
0
  if ((Subtarget->hasDQI())) {
1596
0
    return fastEmitInst_r(X86::VPMOVM2DZrr, &X86::VR512RegClass, Op0, Op0IsKill);
1597
0
  }
1598
0
  return 0;
1599
0
}
1600
1601
6
unsigned fastEmit_ISD_SIGN_EXTEND_MVT_v16i1_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1602
6
switch (RetVT.SimpleTy) {
1603
6
  case MVT::v16i8: return fastEmit_ISD_SIGN_EXTEND_MVT_v16i1_MVT_v16i8_r(Op0, Op0IsKill);
1604
6
  
case MVT::v16i16: return fastEmit_ISD_SIGN_EXTEND_MVT_v16i1_MVT_v16i16_r(Op0, Op0IsKill)0
;
1605
6
  
case MVT::v16i32: return fastEmit_ISD_SIGN_EXTEND_MVT_v16i1_MVT_v16i32_r(Op0, Op0IsKill)0
;
1606
6
  
default: return 00
;
1607
6
}
1608
6
}
1609
1610
0
unsigned fastEmit_ISD_SIGN_EXTEND_MVT_v32i1_MVT_v32i8_r(unsigned Op0, bool Op0IsKill) {
1611
0
  if ((Subtarget->hasBWI()) && (Subtarget->hasVLX())) {
1612
0
    return fastEmitInst_r(X86::VPMOVM2BZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
1613
0
  }
1614
0
  return 0;
1615
0
}
1616
1617
0
unsigned fastEmit_ISD_SIGN_EXTEND_MVT_v32i1_MVT_v32i16_r(unsigned Op0, bool Op0IsKill) {
1618
0
  if ((Subtarget->hasBWI())) {
1619
0
    return fastEmitInst_r(X86::VPMOVM2WZrr, &X86::VR512RegClass, Op0, Op0IsKill);
1620
0
  }
1621
0
  return 0;
1622
0
}
1623
1624
unsigned fastEmit_ISD_SIGN_EXTEND_MVT_v32i1_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1625
switch (RetVT.SimpleTy) {
1626
  case MVT::v32i8: return fastEmit_ISD_SIGN_EXTEND_MVT_v32i1_MVT_v32i8_r(Op0, Op0IsKill);
1627
  case MVT::v32i16: return fastEmit_ISD_SIGN_EXTEND_MVT_v32i1_MVT_v32i16_r(Op0, Op0IsKill);
1628
  default: return 0;
1629
}
1630
}
1631
1632
0
unsigned fastEmit_ISD_SIGN_EXTEND_MVT_v64i1_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1633
0
  if (RetVT.SimpleTy != MVT::v64i8)
1634
0
    return 0;
1635
0
  if ((Subtarget->hasBWI())) {
1636
0
    return fastEmitInst_r(X86::VPMOVM2BZrr, &X86::VR512RegClass, Op0, Op0IsKill);
1637
0
  }
1638
0
  return 0;
1639
0
}
1640
1641
194
unsigned fastEmit_ISD_SIGN_EXTEND_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
1642
194
  switch (VT.SimpleTy) {
1643
194
  
case MVT::i8: return fastEmit_ISD_SIGN_EXTEND_MVT_i8_r(RetVT, Op0, Op0IsKill)51
;
1644
194
  
case MVT::i16: return fastEmit_ISD_SIGN_EXTEND_MVT_i16_r(RetVT, Op0, Op0IsKill)8
;
1645
194
  
case MVT::i32: return fastEmit_ISD_SIGN_EXTEND_MVT_i32_r(RetVT, Op0, Op0IsKill)59
;
1646
194
  
case MVT::v2i1: return fastEmit_ISD_SIGN_EXTEND_MVT_v2i1_r(RetVT, Op0, Op0IsKill)28
;
1647
194
  
case MVT::v4i1: return fastEmit_ISD_SIGN_EXTEND_MVT_v4i1_r(RetVT, Op0, Op0IsKill)30
;
1648
194
  
case MVT::v8i1: return fastEmit_ISD_SIGN_EXTEND_MVT_v8i1_r(RetVT, Op0, Op0IsKill)6
;
1649
194
  
case MVT::v16i1: return fastEmit_ISD_SIGN_EXTEND_MVT_v16i1_r(RetVT, Op0, Op0IsKill)6
;
1650
194
  
case MVT::v32i1: return fastEmit_ISD_SIGN_EXTEND_MVT_v32i1_r(RetVT, Op0, Op0IsKill)0
;
1651
194
  
case MVT::v64i1: return fastEmit_ISD_SIGN_EXTEND_MVT_v64i1_r(RetVT, Op0, Op0IsKill)0
;
1652
194
  
default: return 06
;
1653
194
  }
1654
194
}
1655
1656
// FastEmit functions for ISD::SIGN_EXTEND_VECTOR_INREG.
1657
1658
0
unsigned fastEmit_ISD_SIGN_EXTEND_VECTOR_INREG_MVT_v16i8_MVT_v8i16_r(unsigned Op0, bool Op0IsKill) {
1659
0
  if ((Subtarget->hasSSE41() && !Subtarget->hasAVX())) {
1660
0
    return fastEmitInst_r(X86::PMOVSXBWrr, &X86::VR128RegClass, Op0, Op0IsKill);
1661
0
  }
1662
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX() || !Subtarget->hasBWI())) {
1663
0
    return fastEmitInst_r(X86::VPMOVSXBWrr, &X86::VR128RegClass, Op0, Op0IsKill);
1664
0
  }
1665
0
  if ((Subtarget->hasBWI()) && (Subtarget->hasVLX())) {
1666
0
    return fastEmitInst_r(X86::VPMOVSXBWZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
1667
0
  }
1668
0
  return 0;
1669
0
}
1670
1671
0
unsigned fastEmit_ISD_SIGN_EXTEND_VECTOR_INREG_MVT_v16i8_MVT_v4i32_r(unsigned Op0, bool Op0IsKill) {
1672
0
  if ((Subtarget->hasSSE41() && !Subtarget->hasAVX())) {
1673
0
    return fastEmitInst_r(X86::PMOVSXBDrr, &X86::VR128RegClass, Op0, Op0IsKill);
1674
0
  }
1675
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
1676
0
    return fastEmitInst_r(X86::VPMOVSXBDrr, &X86::VR128RegClass, Op0, Op0IsKill);
1677
0
  }
1678
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
1679
0
    return fastEmitInst_r(X86::VPMOVSXBDZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
1680
0
  }
1681
0
  return 0;
1682
0
}
1683
1684
0
unsigned fastEmit_ISD_SIGN_EXTEND_VECTOR_INREG_MVT_v16i8_MVT_v2i64_r(unsigned Op0, bool Op0IsKill) {
1685
0
  if ((Subtarget->hasSSE41() && !Subtarget->hasAVX())) {
1686
0
    return fastEmitInst_r(X86::PMOVSXBQrr, &X86::VR128RegClass, Op0, Op0IsKill);
1687
0
  }
1688
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
1689
0
    return fastEmitInst_r(X86::VPMOVSXBQrr, &X86::VR128RegClass, Op0, Op0IsKill);
1690
0
  }
1691
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
1692
0
    return fastEmitInst_r(X86::VPMOVSXBQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
1693
0
  }
1694
0
  return 0;
1695
0
}
1696
1697
unsigned fastEmit_ISD_SIGN_EXTEND_VECTOR_INREG_MVT_v16i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1698
switch (RetVT.SimpleTy) {
1699
  case MVT::v8i16: return fastEmit_ISD_SIGN_EXTEND_VECTOR_INREG_MVT_v16i8_MVT_v8i16_r(Op0, Op0IsKill);
1700
  case MVT::v4i32: return fastEmit_ISD_SIGN_EXTEND_VECTOR_INREG_MVT_v16i8_MVT_v4i32_r(Op0, Op0IsKill);
1701
  case MVT::v2i64: return fastEmit_ISD_SIGN_EXTEND_VECTOR_INREG_MVT_v16i8_MVT_v2i64_r(Op0, Op0IsKill);
1702
  default: return 0;
1703
}
1704
}
1705
1706
0
unsigned fastEmit_ISD_SIGN_EXTEND_VECTOR_INREG_MVT_v8i16_MVT_v4i32_r(unsigned Op0, bool Op0IsKill) {
1707
0
  if ((Subtarget->hasSSE41() && !Subtarget->hasAVX())) {
1708
0
    return fastEmitInst_r(X86::PMOVSXWDrr, &X86::VR128RegClass, Op0, Op0IsKill);
1709
0
  }
1710
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
1711
0
    return fastEmitInst_r(X86::VPMOVSXWDrr, &X86::VR128RegClass, Op0, Op0IsKill);
1712
0
  }
1713
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
1714
0
    return fastEmitInst_r(X86::VPMOVSXWDZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
1715
0
  }
1716
0
  return 0;
1717
0
}
1718
1719
0
unsigned fastEmit_ISD_SIGN_EXTEND_VECTOR_INREG_MVT_v8i16_MVT_v2i64_r(unsigned Op0, bool Op0IsKill) {
1720
0
  if ((Subtarget->hasSSE41() && !Subtarget->hasAVX())) {
1721
0
    return fastEmitInst_r(X86::PMOVSXWQrr, &X86::VR128RegClass, Op0, Op0IsKill);
1722
0
  }
1723
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
1724
0
    return fastEmitInst_r(X86::VPMOVSXWQrr, &X86::VR128RegClass, Op0, Op0IsKill);
1725
0
  }
1726
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
1727
0
    return fastEmitInst_r(X86::VPMOVSXWQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
1728
0
  }
1729
0
  return 0;
1730
0
}
1731
1732
unsigned fastEmit_ISD_SIGN_EXTEND_VECTOR_INREG_MVT_v8i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1733
switch (RetVT.SimpleTy) {
1734
  case MVT::v4i32: return fastEmit_ISD_SIGN_EXTEND_VECTOR_INREG_MVT_v8i16_MVT_v4i32_r(Op0, Op0IsKill);
1735
  case MVT::v2i64: return fastEmit_ISD_SIGN_EXTEND_VECTOR_INREG_MVT_v8i16_MVT_v2i64_r(Op0, Op0IsKill);
1736
  default: return 0;
1737
}
1738
}
1739
1740
0
unsigned fastEmit_ISD_SIGN_EXTEND_VECTOR_INREG_MVT_v4i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1741
0
  if (RetVT.SimpleTy != MVT::v2i64)
1742
0
    return 0;
1743
0
  if ((Subtarget->hasSSE41() && !Subtarget->hasAVX())) {
1744
0
    return fastEmitInst_r(X86::PMOVSXDQrr, &X86::VR128RegClass, Op0, Op0IsKill);
1745
0
  }
1746
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
1747
0
    return fastEmitInst_r(X86::VPMOVSXDQrr, &X86::VR128RegClass, Op0, Op0IsKill);
1748
0
  }
1749
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
1750
0
    return fastEmitInst_r(X86::VPMOVSXDQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
1751
0
  }
1752
0
  return 0;
1753
0
}
1754
1755
unsigned fastEmit_ISD_SIGN_EXTEND_VECTOR_INREG_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
1756
  switch (VT.SimpleTy) {
1757
  case MVT::v16i8: return fastEmit_ISD_SIGN_EXTEND_VECTOR_INREG_MVT_v16i8_r(RetVT, Op0, Op0IsKill);
1758
  case MVT::v8i16: return fastEmit_ISD_SIGN_EXTEND_VECTOR_INREG_MVT_v8i16_r(RetVT, Op0, Op0IsKill);
1759
  case MVT::v4i32: return fastEmit_ISD_SIGN_EXTEND_VECTOR_INREG_MVT_v4i32_r(RetVT, Op0, Op0IsKill);
1760
  default: return 0;
1761
  }
1762
}
1763
1764
// FastEmit functions for ISD::SINT_TO_FP.
1765
1766
9
unsigned fastEmit_ISD_SINT_TO_FP_MVT_i32_MVT_f32_r(unsigned Op0, bool Op0IsKill) {
1767
9
  if ((Subtarget->hasSSE1() && !Subtarget->hasAVX())) {
1768
3
    return fastEmitInst_r(X86::CVTSI2SSrr, &X86::FR32RegClass, Op0, Op0IsKill);
1769
3
  }
1770
6
  return 0;
1771
6
}
1772
1773
11
unsigned fastEmit_ISD_SINT_TO_FP_MVT_i32_MVT_f64_r(unsigned Op0, bool Op0IsKill) {
1774
11
  if ((Subtarget->hasSSE2() && 
!Subtarget->hasAVX()9
)) {
1775
3
    return fastEmitInst_r(X86::CVTSI2SDrr, &X86::FR64RegClass, Op0, Op0IsKill);
1776
3
  }
1777
8
  return 0;
1778
8
}
1779
1780
20
unsigned fastEmit_ISD_SINT_TO_FP_MVT_i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1781
20
switch (RetVT.SimpleTy) {
1782
20
  
case MVT::f32: return fastEmit_ISD_SINT_TO_FP_MVT_i32_MVT_f32_r(Op0, Op0IsKill)9
;
1783
20
  
case MVT::f64: return fastEmit_ISD_SINT_TO_FP_MVT_i32_MVT_f64_r(Op0, Op0IsKill)11
;
1784
20
  
default: return 00
;
1785
20
}
1786
20
}
1787
1788
9
unsigned fastEmit_ISD_SINT_TO_FP_MVT_i64_MVT_f32_r(unsigned Op0, bool Op0IsKill) {
1789
9
  if ((Subtarget->hasSSE1() && !Subtarget->hasAVX())) {
1790
3
    return fastEmitInst_r(X86::CVTSI642SSrr, &X86::FR32RegClass, Op0, Op0IsKill);
1791
3
  }
1792
6
  return 0;
1793
6
}
1794
1795
9
unsigned fastEmit_ISD_SINT_TO_FP_MVT_i64_MVT_f64_r(unsigned Op0, bool Op0IsKill) {
1796
9
  if ((Subtarget->hasSSE2() && !Subtarget->hasAVX())) {
1797
3
    return fastEmitInst_r(X86::CVTSI642SDrr, &X86::FR64RegClass, Op0, Op0IsKill);
1798
3
  }
1799
6
  return 0;
1800
6
}
1801
1802
18
unsigned fastEmit_ISD_SINT_TO_FP_MVT_i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1803
18
switch (RetVT.SimpleTy) {
1804
18
  
case MVT::f32: return fastEmit_ISD_SINT_TO_FP_MVT_i64_MVT_f32_r(Op0, Op0IsKill)9
;
1805
18
  
case MVT::f64: return fastEmit_ISD_SINT_TO_FP_MVT_i64_MVT_f64_r(Op0, Op0IsKill)9
;
1806
18
  
default: return 00
;
1807
18
}
1808
18
}
1809
1810
6
unsigned fastEmit_ISD_SINT_TO_FP_MVT_v4i32_MVT_v4f32_r(unsigned Op0, bool Op0IsKill) {
1811
6
  if ((Subtarget->hasVLX())) {
1812
2
    return fastEmitInst_r(X86::VCVTDQ2PSZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
1813
2
  }
1814
4
  if ((Subtarget->hasSSE2() && !Subtarget->hasAVX())) {
1815
2
    return fastEmitInst_r(X86::CVTDQ2PSrr, &X86::VR128RegClass, Op0, Op0IsKill);
1816
2
  }
1817
2
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
1818
2
    return fastEmitInst_r(X86::VCVTDQ2PSrr, &X86::VR128RegClass, Op0, Op0IsKill);
1819
2
  }
1820
0
  return 0;
1821
0
}
1822
1823
2
unsigned fastEmit_ISD_SINT_TO_FP_MVT_v4i32_MVT_v4f64_r(unsigned Op0, bool Op0IsKill) {
1824
2
  if ((Subtarget->hasVLX())) {
1825
0
    return fastEmitInst_r(X86::VCVTDQ2PDZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
1826
0
  }
1827
2
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
1828
2
    return fastEmitInst_r(X86::VCVTDQ2PDYrr, &X86::VR256RegClass, Op0, Op0IsKill);
1829
2
  }
1830
0
  return 0;
1831
0
}
1832
1833
8
unsigned fastEmit_ISD_SINT_TO_FP_MVT_v4i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1834
8
switch (RetVT.SimpleTy) {
1835
8
  
case MVT::v4f32: return fastEmit_ISD_SINT_TO_FP_MVT_v4i32_MVT_v4f32_r(Op0, Op0IsKill)6
;
1836
8
  
case MVT::v4f64: return fastEmit_ISD_SINT_TO_FP_MVT_v4i32_MVT_v4f64_r(Op0, Op0IsKill)2
;
1837
8
  
default: return 00
;
1838
8
}
1839
8
}
1840
1841
2
unsigned fastEmit_ISD_SINT_TO_FP_MVT_v8i32_MVT_v8f32_r(unsigned Op0, bool Op0IsKill) {
1842
2
  if ((Subtarget->hasVLX())) {
1843
0
    return fastEmitInst_r(X86::VCVTDQ2PSZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
1844
0
  }
1845
2
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
1846
2
    return fastEmitInst_r(X86::VCVTDQ2PSYrr, &X86::VR256RegClass, Op0, Op0IsKill);
1847
2
  }
1848
0
  return 0;
1849
0
}
1850
1851
0
unsigned fastEmit_ISD_SINT_TO_FP_MVT_v8i32_MVT_v8f64_r(unsigned Op0, bool Op0IsKill) {
1852
0
  if ((Subtarget->hasAVX512())) {
1853
0
    return fastEmitInst_r(X86::VCVTDQ2PDZrr, &X86::VR512RegClass, Op0, Op0IsKill);
1854
0
  }
1855
0
  return 0;
1856
0
}
1857
1858
2
unsigned fastEmit_ISD_SINT_TO_FP_MVT_v8i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1859
2
switch (RetVT.SimpleTy) {
1860
2
  case MVT::v8f32: return fastEmit_ISD_SINT_TO_FP_MVT_v8i32_MVT_v8f32_r(Op0, Op0IsKill);
1861
2
  
case MVT::v8f64: return fastEmit_ISD_SINT_TO_FP_MVT_v8i32_MVT_v8f64_r(Op0, Op0IsKill)0
;
1862
2
  
default: return 00
;
1863
2
}
1864
2
}
1865
1866
0
unsigned fastEmit_ISD_SINT_TO_FP_MVT_v16i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1867
0
  if (RetVT.SimpleTy != MVT::v16f32)
1868
0
    return 0;
1869
0
  if ((Subtarget->hasAVX512())) {
1870
0
    return fastEmitInst_r(X86::VCVTDQ2PSZrr, &X86::VR512RegClass, Op0, Op0IsKill);
1871
0
  }
1872
0
  return 0;
1873
0
}
1874
1875
0
unsigned fastEmit_ISD_SINT_TO_FP_MVT_v2i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1876
0
  if (RetVT.SimpleTy != MVT::v2f64)
1877
0
    return 0;
1878
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
1879
0
    return fastEmitInst_r(X86::VCVTQQ2PDZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
1880
0
  }
1881
0
  return 0;
1882
0
}
1883
1884
0
unsigned fastEmit_ISD_SINT_TO_FP_MVT_v4i64_MVT_v4f32_r(unsigned Op0, bool Op0IsKill) {
1885
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
1886
0
    return fastEmitInst_r(X86::VCVTQQ2PSZ256rr, &X86::VR128XRegClass, Op0, Op0IsKill);
1887
0
  }
1888
0
  return 0;
1889
0
}
1890
1891
0
unsigned fastEmit_ISD_SINT_TO_FP_MVT_v4i64_MVT_v4f64_r(unsigned Op0, bool Op0IsKill) {
1892
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
1893
0
    return fastEmitInst_r(X86::VCVTQQ2PDZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
1894
0
  }
1895
0
  return 0;
1896
0
}
1897
1898
unsigned fastEmit_ISD_SINT_TO_FP_MVT_v4i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1899
switch (RetVT.SimpleTy) {
1900
  case MVT::v4f32: return fastEmit_ISD_SINT_TO_FP_MVT_v4i64_MVT_v4f32_r(Op0, Op0IsKill);
1901
  case MVT::v4f64: return fastEmit_ISD_SINT_TO_FP_MVT_v4i64_MVT_v4f64_r(Op0, Op0IsKill);
1902
  default: return 0;
1903
}
1904
}
1905
1906
0
unsigned fastEmit_ISD_SINT_TO_FP_MVT_v8i64_MVT_v8f32_r(unsigned Op0, bool Op0IsKill) {
1907
0
  if ((Subtarget->hasDQI())) {
1908
0
    return fastEmitInst_r(X86::VCVTQQ2PSZrr, &X86::VR256XRegClass, Op0, Op0IsKill);
1909
0
  }
1910
0
  return 0;
1911
0
}
1912
1913
0
unsigned fastEmit_ISD_SINT_TO_FP_MVT_v8i64_MVT_v8f64_r(unsigned Op0, bool Op0IsKill) {
1914
0
  if ((Subtarget->hasDQI())) {
1915
0
    return fastEmitInst_r(X86::VCVTQQ2PDZrr, &X86::VR512RegClass, Op0, Op0IsKill);
1916
0
  }
1917
0
  return 0;
1918
0
}
1919
1920
unsigned fastEmit_ISD_SINT_TO_FP_MVT_v8i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1921
switch (RetVT.SimpleTy) {
1922
  case MVT::v8f32: return fastEmit_ISD_SINT_TO_FP_MVT_v8i64_MVT_v8f32_r(Op0, Op0IsKill);
1923
  case MVT::v8f64: return fastEmit_ISD_SINT_TO_FP_MVT_v8i64_MVT_v8f64_r(Op0, Op0IsKill);
1924
  default: return 0;
1925
}
1926
}
1927
1928
48
unsigned fastEmit_ISD_SINT_TO_FP_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
1929
48
  switch (VT.SimpleTy) {
1930
48
  
case MVT::i32: return fastEmit_ISD_SINT_TO_FP_MVT_i32_r(RetVT, Op0, Op0IsKill)20
;
1931
48
  
case MVT::i64: return fastEmit_ISD_SINT_TO_FP_MVT_i64_r(RetVT, Op0, Op0IsKill)18
;
1932
48
  
case MVT::v4i32: return fastEmit_ISD_SINT_TO_FP_MVT_v4i32_r(RetVT, Op0, Op0IsKill)8
;
1933
48
  
case MVT::v8i32: return fastEmit_ISD_SINT_TO_FP_MVT_v8i32_r(RetVT, Op0, Op0IsKill)2
;
1934
48
  
case MVT::v16i32: return fastEmit_ISD_SINT_TO_FP_MVT_v16i32_r(RetVT, Op0, Op0IsKill)0
;
1935
48
  
case MVT::v2i64: return fastEmit_ISD_SINT_TO_FP_MVT_v2i64_r(RetVT, Op0, Op0IsKill)0
;
1936
48
  
case MVT::v4i64: return fastEmit_ISD_SINT_TO_FP_MVT_v4i64_r(RetVT, Op0, Op0IsKill)0
;
1937
48
  
case MVT::v8i64: return fastEmit_ISD_SINT_TO_FP_MVT_v8i64_r(RetVT, Op0, Op0IsKill)0
;
1938
48
  
default: return 00
;
1939
48
  }
1940
48
}
1941
1942
// FastEmit functions for ISD::TRUNCATE.
1943
1944
2
unsigned fastEmit_ISD_TRUNCATE_MVT_i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1945
2
  if (RetVT.SimpleTy != MVT::i8)
1946
0
    return 0;
1947
2
  if ((Subtarget->is64Bit())) {
1948
1
    return fastEmitInst_extractsubreg(RetVT, Op0, Op0IsKill, X86::sub_8bit);
1949
1
  }
1950
1
  return 0;
1951
1
}
1952
1953
8
unsigned fastEmit_ISD_TRUNCATE_MVT_i32_MVT_i8_r(unsigned Op0, bool Op0IsKill) {
1954
8
  if ((Subtarget->is64Bit())) {
1955
4
    return fastEmitInst_extractsubreg(MVT::i8, Op0, Op0IsKill, X86::sub_8bit);
1956
4
  }
1957
4
  return 0;
1958
4
}
1959
1960
13
unsigned fastEmit_ISD_TRUNCATE_MVT_i32_MVT_i16_r(unsigned Op0, bool Op0IsKill) {
1961
13
  return fastEmitInst_extractsubreg(MVT::i16, Op0, Op0IsKill, X86::sub_16bit);
1962
13
}
1963
1964
21
unsigned fastEmit_ISD_TRUNCATE_MVT_i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1965
21
switch (RetVT.SimpleTy) {
1966
21
  
case MVT::i8: return fastEmit_ISD_TRUNCATE_MVT_i32_MVT_i8_r(Op0, Op0IsKill)8
;
1967
21
  
case MVT::i16: return fastEmit_ISD_TRUNCATE_MVT_i32_MVT_i16_r(Op0, Op0IsKill)13
;
1968
21
  
default: return 00
;
1969
21
}
1970
21
}
1971
1972
8
unsigned fastEmit_ISD_TRUNCATE_MVT_i64_MVT_i8_r(unsigned Op0, bool Op0IsKill) {
1973
8
  return fastEmitInst_extractsubreg(MVT::i8, Op0, Op0IsKill, X86::sub_8bit);
1974
8
}
1975
1976
2
unsigned fastEmit_ISD_TRUNCATE_MVT_i64_MVT_i16_r(unsigned Op0, bool Op0IsKill) {
1977
2
  return fastEmitInst_extractsubreg(MVT::i16, Op0, Op0IsKill, X86::sub_16bit);
1978
2
}
1979
1980
12
unsigned fastEmit_ISD_TRUNCATE_MVT_i64_MVT_i32_r(unsigned Op0, bool Op0IsKill) {
1981
12
  return fastEmitInst_extractsubreg(MVT::i32, Op0, Op0IsKill, X86::sub_32bit);
1982
12
}
1983
1984
22
unsigned fastEmit_ISD_TRUNCATE_MVT_i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1985
22
switch (RetVT.SimpleTy) {
1986
22
  
case MVT::i8: return fastEmit_ISD_TRUNCATE_MVT_i64_MVT_i8_r(Op0, Op0IsKill)8
;
1987
22
  
case MVT::i16: return fastEmit_ISD_TRUNCATE_MVT_i64_MVT_i16_r(Op0, Op0IsKill)2
;
1988
22
  
case MVT::i32: return fastEmit_ISD_TRUNCATE_MVT_i64_MVT_i32_r(Op0, Op0IsKill)12
;
1989
22
  
default: return 00
;
1990
22
}
1991
22
}
1992
1993
6
unsigned fastEmit_ISD_TRUNCATE_MVT_v16i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
1994
6
  if (RetVT.SimpleTy != MVT::v16i8)
1995
0
    return 0;
1996
6
  if ((Subtarget->hasBWI()) && 
(Subtarget->hasVLX())4
) {
1997
4
    return fastEmitInst_r(X86::VPMOVWBZ256rr, &X86::VR128XRegClass, Op0, Op0IsKill);
1998
4
  }
1999
2
  return 0;
2000
2
}
2001
2002
2
unsigned fastEmit_ISD_TRUNCATE_MVT_v32i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2003
2
  if (RetVT.SimpleTy != MVT::v32i8)
2004
0
    return 0;
2005
2
  if ((Subtarget->hasBWI())) {
2006
2
    return fastEmitInst_r(X86::VPMOVWBZrr, &X86::VR256XRegClass, Op0, Op0IsKill);
2007
2
  }
2008
0
  return 0;
2009
0
}
2010
2011
6
unsigned fastEmit_ISD_TRUNCATE_MVT_v8i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2012
6
  if (RetVT.SimpleTy != MVT::v8i16)
2013
0
    return 0;
2014
6
  if ((Subtarget->hasAVX512()) && 
(Subtarget->hasVLX())4
) {
2015
4
    return fastEmitInst_r(X86::VPMOVDWZ256rr, &X86::VR128XRegClass, Op0, Op0IsKill);
2016
4
  }
2017
2
  return 0;
2018
2
}
2019
2020
2
unsigned fastEmit_ISD_TRUNCATE_MVT_v16i32_MVT_v16i8_r(unsigned Op0, bool Op0IsKill) {
2021
2
  if ((Subtarget->hasAVX512())) {
2022
2
    return fastEmitInst_r(X86::VPMOVDBZrr, &X86::VR128XRegClass, Op0, Op0IsKill);
2023
2
  }
2024
0
  return 0;
2025
0
}
2026
2027
0
unsigned fastEmit_ISD_TRUNCATE_MVT_v16i32_MVT_v16i16_r(unsigned Op0, bool Op0IsKill) {
2028
0
  if ((Subtarget->hasAVX512())) {
2029
0
    return fastEmitInst_r(X86::VPMOVDWZrr, &X86::VR256XRegClass, Op0, Op0IsKill);
2030
0
  }
2031
0
  return 0;
2032
0
}
2033
2034
2
unsigned fastEmit_ISD_TRUNCATE_MVT_v16i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2035
2
switch (RetVT.SimpleTy) {
2036
2
  case MVT::v16i8: return fastEmit_ISD_TRUNCATE_MVT_v16i32_MVT_v16i8_r(Op0, Op0IsKill);
2037
2
  
case MVT::v16i16: return fastEmit_ISD_TRUNCATE_MVT_v16i32_MVT_v16i16_r(Op0, Op0IsKill)0
;
2038
2
  
default: return 00
;
2039
2
}
2040
2
}
2041
2042
4
unsigned fastEmit_ISD_TRUNCATE_MVT_v4i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2043
4
  if (RetVT.SimpleTy != MVT::v4i32)
2044
2
    return 0;
2045
2
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
2046
2
    return fastEmitInst_r(X86::VPMOVQDZ256rr, &X86::VR128XRegClass, Op0, Op0IsKill);
2047
2
  }
2048
0
  return 0;
2049
0
}
2050
2051
2
unsigned fastEmit_ISD_TRUNCATE_MVT_v8i64_MVT_v8i16_r(unsigned Op0, bool Op0IsKill) {
2052
2
  if ((Subtarget->hasAVX512())) {
2053
2
    return fastEmitInst_r(X86::VPMOVQWZrr, &X86::VR128XRegClass, Op0, Op0IsKill);
2054
2
  }
2055
0
  return 0;
2056
0
}
2057
2058
2
unsigned fastEmit_ISD_TRUNCATE_MVT_v8i64_MVT_v8i32_r(unsigned Op0, bool Op0IsKill) {
2059
2
  if ((Subtarget->hasAVX512())) {
2060
2
    return fastEmitInst_r(X86::VPMOVQDZrr, &X86::VR256XRegClass, Op0, Op0IsKill);
2061
2
  }
2062
0
  return 0;
2063
0
}
2064
2065
8
unsigned fastEmit_ISD_TRUNCATE_MVT_v8i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2066
8
switch (RetVT.SimpleTy) {
2067
8
  
case MVT::v8i16: return fastEmit_ISD_TRUNCATE_MVT_v8i64_MVT_v8i16_r(Op0, Op0IsKill)2
;
2068
8
  
case MVT::v8i32: return fastEmit_ISD_TRUNCATE_MVT_v8i64_MVT_v8i32_r(Op0, Op0IsKill)2
;
2069
8
  
default: return 04
;
2070
8
}
2071
8
}
2072
2073
76
unsigned fastEmit_ISD_TRUNCATE_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
2074
76
  switch (VT.SimpleTy) {
2075
76
  
case MVT::i16: return fastEmit_ISD_TRUNCATE_MVT_i16_r(RetVT, Op0, Op0IsKill)2
;
2076
76
  
case MVT::i32: return fastEmit_ISD_TRUNCATE_MVT_i32_r(RetVT, Op0, Op0IsKill)21
;
2077
76
  
case MVT::i64: return fastEmit_ISD_TRUNCATE_MVT_i64_r(RetVT, Op0, Op0IsKill)22
;
2078
76
  
case MVT::v16i16: return fastEmit_ISD_TRUNCATE_MVT_v16i16_r(RetVT, Op0, Op0IsKill)6
;
2079
76
  
case MVT::v32i16: return fastEmit_ISD_TRUNCATE_MVT_v32i16_r(RetVT, Op0, Op0IsKill)2
;
2080
76
  
case MVT::v8i32: return fastEmit_ISD_TRUNCATE_MVT_v8i32_r(RetVT, Op0, Op0IsKill)6
;
2081
76
  
case MVT::v16i32: return fastEmit_ISD_TRUNCATE_MVT_v16i32_r(RetVT, Op0, Op0IsKill)2
;
2082
76
  
case MVT::v4i64: return fastEmit_ISD_TRUNCATE_MVT_v4i64_r(RetVT, Op0, Op0IsKill)4
;
2083
76
  
case MVT::v8i64: return fastEmit_ISD_TRUNCATE_MVT_v8i64_r(RetVT, Op0, Op0IsKill)8
;
2084
76
  
default: return 03
;
2085
76
  }
2086
76
}
2087
2088
// FastEmit functions for ISD::UINT_TO_FP.
2089
2090
0
unsigned fastEmit_ISD_UINT_TO_FP_MVT_v4i32_MVT_v4f32_r(unsigned Op0, bool Op0IsKill) {
2091
0
  if ((Subtarget->hasVLX())) {
2092
0
    return fastEmitInst_r(X86::VCVTUDQ2PSZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
2093
0
  }
2094
0
  return 0;
2095
0
}
2096
2097
0
unsigned fastEmit_ISD_UINT_TO_FP_MVT_v4i32_MVT_v4f64_r(unsigned Op0, bool Op0IsKill) {
2098
0
  if ((Subtarget->hasVLX())) {
2099
0
    return fastEmitInst_r(X86::VCVTUDQ2PDZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
2100
0
  }
2101
0
  return 0;
2102
0
}
2103
2104
unsigned fastEmit_ISD_UINT_TO_FP_MVT_v4i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2105
switch (RetVT.SimpleTy) {
2106
  case MVT::v4f32: return fastEmit_ISD_UINT_TO_FP_MVT_v4i32_MVT_v4f32_r(Op0, Op0IsKill);
2107
  case MVT::v4f64: return fastEmit_ISD_UINT_TO_FP_MVT_v4i32_MVT_v4f64_r(Op0, Op0IsKill);
2108
  default: return 0;
2109
}
2110
}
2111
2112
0
unsigned fastEmit_ISD_UINT_TO_FP_MVT_v8i32_MVT_v8f32_r(unsigned Op0, bool Op0IsKill) {
2113
0
  if ((Subtarget->hasVLX())) {
2114
0
    return fastEmitInst_r(X86::VCVTUDQ2PSZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
2115
0
  }
2116
0
  return 0;
2117
0
}
2118
2119
0
unsigned fastEmit_ISD_UINT_TO_FP_MVT_v8i32_MVT_v8f64_r(unsigned Op0, bool Op0IsKill) {
2120
0
  if ((Subtarget->hasAVX512())) {
2121
0
    return fastEmitInst_r(X86::VCVTUDQ2PDZrr, &X86::VR512RegClass, Op0, Op0IsKill);
2122
0
  }
2123
0
  return 0;
2124
0
}
2125
2126
unsigned fastEmit_ISD_UINT_TO_FP_MVT_v8i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2127
switch (RetVT.SimpleTy) {
2128
  case MVT::v8f32: return fastEmit_ISD_UINT_TO_FP_MVT_v8i32_MVT_v8f32_r(Op0, Op0IsKill);
2129
  case MVT::v8f64: return fastEmit_ISD_UINT_TO_FP_MVT_v8i32_MVT_v8f64_r(Op0, Op0IsKill);
2130
  default: return 0;
2131
}
2132
}
2133
2134
0
unsigned fastEmit_ISD_UINT_TO_FP_MVT_v16i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2135
0
  if (RetVT.SimpleTy != MVT::v16f32)
2136
0
    return 0;
2137
0
  if ((Subtarget->hasAVX512())) {
2138
0
    return fastEmitInst_r(X86::VCVTUDQ2PSZrr, &X86::VR512RegClass, Op0, Op0IsKill);
2139
0
  }
2140
0
  return 0;
2141
0
}
2142
2143
0
unsigned fastEmit_ISD_UINT_TO_FP_MVT_v2i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2144
0
  if (RetVT.SimpleTy != MVT::v2f64)
2145
0
    return 0;
2146
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
2147
0
    return fastEmitInst_r(X86::VCVTUQQ2PDZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
2148
0
  }
2149
0
  return 0;
2150
0
}
2151
2152
0
unsigned fastEmit_ISD_UINT_TO_FP_MVT_v4i64_MVT_v4f32_r(unsigned Op0, bool Op0IsKill) {
2153
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
2154
0
    return fastEmitInst_r(X86::VCVTUQQ2PSZ256rr, &X86::VR128XRegClass, Op0, Op0IsKill);
2155
0
  }
2156
0
  return 0;
2157
0
}
2158
2159
0
unsigned fastEmit_ISD_UINT_TO_FP_MVT_v4i64_MVT_v4f64_r(unsigned Op0, bool Op0IsKill) {
2160
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
2161
0
    return fastEmitInst_r(X86::VCVTUQQ2PDZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
2162
0
  }
2163
0
  return 0;
2164
0
}
2165
2166
unsigned fastEmit_ISD_UINT_TO_FP_MVT_v4i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2167
switch (RetVT.SimpleTy) {
2168
  case MVT::v4f32: return fastEmit_ISD_UINT_TO_FP_MVT_v4i64_MVT_v4f32_r(Op0, Op0IsKill);
2169
  case MVT::v4f64: return fastEmit_ISD_UINT_TO_FP_MVT_v4i64_MVT_v4f64_r(Op0, Op0IsKill);
2170
  default: return 0;
2171
}
2172
}
2173
2174
0
unsigned fastEmit_ISD_UINT_TO_FP_MVT_v8i64_MVT_v8f32_r(unsigned Op0, bool Op0IsKill) {
2175
0
  if ((Subtarget->hasDQI())) {
2176
0
    return fastEmitInst_r(X86::VCVTUQQ2PSZrr, &X86::VR256XRegClass, Op0, Op0IsKill);
2177
0
  }
2178
0
  return 0;
2179
0
}
2180
2181
0
unsigned fastEmit_ISD_UINT_TO_FP_MVT_v8i64_MVT_v8f64_r(unsigned Op0, bool Op0IsKill) {
2182
0
  if ((Subtarget->hasDQI())) {
2183
0
    return fastEmitInst_r(X86::VCVTUQQ2PDZrr, &X86::VR512RegClass, Op0, Op0IsKill);
2184
0
  }
2185
0
  return 0;
2186
0
}
2187
2188
unsigned fastEmit_ISD_UINT_TO_FP_MVT_v8i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2189
switch (RetVT.SimpleTy) {
2190
  case MVT::v8f32: return fastEmit_ISD_UINT_TO_FP_MVT_v8i64_MVT_v8f32_r(Op0, Op0IsKill);
2191
  case MVT::v8f64: return fastEmit_ISD_UINT_TO_FP_MVT_v8i64_MVT_v8f64_r(Op0, Op0IsKill);
2192
  default: return 0;
2193
}
2194
}
2195
2196
unsigned fastEmit_ISD_UINT_TO_FP_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
2197
  switch (VT.SimpleTy) {
2198
  case MVT::v4i32: return fastEmit_ISD_UINT_TO_FP_MVT_v4i32_r(RetVT, Op0, Op0IsKill);
2199
  case MVT::v8i32: return fastEmit_ISD_UINT_TO_FP_MVT_v8i32_r(RetVT, Op0, Op0IsKill);
2200
  case MVT::v16i32: return fastEmit_ISD_UINT_TO_FP_MVT_v16i32_r(RetVT, Op0, Op0IsKill);
2201
  case MVT::v2i64: return fastEmit_ISD_UINT_TO_FP_MVT_v2i64_r(RetVT, Op0, Op0IsKill);
2202
  case MVT::v4i64: return fastEmit_ISD_UINT_TO_FP_MVT_v4i64_r(RetVT, Op0, Op0IsKill);
2203
  case MVT::v8i64: return fastEmit_ISD_UINT_TO_FP_MVT_v8i64_r(RetVT, Op0, Op0IsKill);
2204
  default: return 0;
2205
  }
2206
}
2207
2208
// FastEmit functions for ISD::ZERO_EXTEND.
2209
2210
388
unsigned fastEmit_ISD_ZERO_EXTEND_MVT_i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2211
388
  if (RetVT.SimpleTy != MVT::i32)
2212
12
    return 0;
2213
376
  return fastEmitInst_r(X86::MOVZX32rr8, &X86::GR32RegClass, Op0, Op0IsKill);
2214
376
}
2215
2216
65
unsigned fastEmit_ISD_ZERO_EXTEND_MVT_i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2217
65
  if (RetVT.SimpleTy != MVT::i32)
2218
2
    return 0;
2219
63
  return fastEmitInst_r(X86::MOVZX32rr16, &X86::GR32RegClass, Op0, Op0IsKill);
2220
63
}
2221
2222
471
unsigned fastEmit_ISD_ZERO_EXTEND_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
2223
471
  switch (VT.SimpleTy) {
2224
471
  
case MVT::i8: return fastEmit_ISD_ZERO_EXTEND_MVT_i8_r(RetVT, Op0, Op0IsKill)388
;
2225
471
  
case MVT::i16: return fastEmit_ISD_ZERO_EXTEND_MVT_i16_r(RetVT, Op0, Op0IsKill)65
;
2226
471
  
default: return 018
;
2227
471
  }
2228
471
}
2229
2230
// FastEmit functions for ISD::ZERO_EXTEND_VECTOR_INREG.
2231
2232
0
unsigned fastEmit_ISD_ZERO_EXTEND_VECTOR_INREG_MVT_v16i8_MVT_v8i16_r(unsigned Op0, bool Op0IsKill) {
2233
0
  if ((Subtarget->hasSSE41() && !Subtarget->hasAVX())) {
2234
0
    return fastEmitInst_r(X86::PMOVZXBWrr, &X86::VR128RegClass, Op0, Op0IsKill);
2235
0
  }
2236
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX() || !Subtarget->hasBWI())) {
2237
0
    return fastEmitInst_r(X86::VPMOVZXBWrr, &X86::VR128RegClass, Op0, Op0IsKill);
2238
0
  }
2239
0
  if ((Subtarget->hasBWI()) && (Subtarget->hasVLX())) {
2240
0
    return fastEmitInst_r(X86::VPMOVZXBWZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
2241
0
  }
2242
0
  return 0;
2243
0
}
2244
2245
0
unsigned fastEmit_ISD_ZERO_EXTEND_VECTOR_INREG_MVT_v16i8_MVT_v4i32_r(unsigned Op0, bool Op0IsKill) {
2246
0
  if ((Subtarget->hasSSE41() && !Subtarget->hasAVX())) {
2247
0
    return fastEmitInst_r(X86::PMOVZXBDrr, &X86::VR128RegClass, Op0, Op0IsKill);
2248
0
  }
2249
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
2250
0
    return fastEmitInst_r(X86::VPMOVZXBDrr, &X86::VR128RegClass, Op0, Op0IsKill);
2251
0
  }
2252
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
2253
0
    return fastEmitInst_r(X86::VPMOVZXBDZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
2254
0
  }
2255
0
  return 0;
2256
0
}
2257
2258
0
unsigned fastEmit_ISD_ZERO_EXTEND_VECTOR_INREG_MVT_v16i8_MVT_v2i64_r(unsigned Op0, bool Op0IsKill) {
2259
0
  if ((Subtarget->hasSSE41() && !Subtarget->hasAVX())) {
2260
0
    return fastEmitInst_r(X86::PMOVZXBQrr, &X86::VR128RegClass, Op0, Op0IsKill);
2261
0
  }
2262
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
2263
0
    return fastEmitInst_r(X86::VPMOVZXBQrr, &X86::VR128RegClass, Op0, Op0IsKill);
2264
0
  }
2265
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
2266
0
    return fastEmitInst_r(X86::VPMOVZXBQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
2267
0
  }
2268
0
  return 0;
2269
0
}
2270
2271
unsigned fastEmit_ISD_ZERO_EXTEND_VECTOR_INREG_MVT_v16i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2272
switch (RetVT.SimpleTy) {
2273
  case MVT::v8i16: return fastEmit_ISD_ZERO_EXTEND_VECTOR_INREG_MVT_v16i8_MVT_v8i16_r(Op0, Op0IsKill);
2274
  case MVT::v4i32: return fastEmit_ISD_ZERO_EXTEND_VECTOR_INREG_MVT_v16i8_MVT_v4i32_r(Op0, Op0IsKill);
2275
  case MVT::v2i64: return fastEmit_ISD_ZERO_EXTEND_VECTOR_INREG_MVT_v16i8_MVT_v2i64_r(Op0, Op0IsKill);
2276
  default: return 0;
2277
}
2278
}
2279
2280
0
unsigned fastEmit_ISD_ZERO_EXTEND_VECTOR_INREG_MVT_v8i16_MVT_v4i32_r(unsigned Op0, bool Op0IsKill) {
2281
0
  if ((Subtarget->hasSSE41() && !Subtarget->hasAVX())) {
2282
0
    return fastEmitInst_r(X86::PMOVZXWDrr, &X86::VR128RegClass, Op0, Op0IsKill);
2283
0
  }
2284
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
2285
0
    return fastEmitInst_r(X86::VPMOVZXWDrr, &X86::VR128RegClass, Op0, Op0IsKill);
2286
0
  }
2287
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
2288
0
    return fastEmitInst_r(X86::VPMOVZXWDZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
2289
0
  }
2290
0
  return 0;
2291
0
}
2292
2293
0
unsigned fastEmit_ISD_ZERO_EXTEND_VECTOR_INREG_MVT_v8i16_MVT_v2i64_r(unsigned Op0, bool Op0IsKill) {
2294
0
  if ((Subtarget->hasSSE41() && !Subtarget->hasAVX())) {
2295
0
    return fastEmitInst_r(X86::PMOVZXWQrr, &X86::VR128RegClass, Op0, Op0IsKill);
2296
0
  }
2297
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
2298
0
    return fastEmitInst_r(X86::VPMOVZXWQrr, &X86::VR128RegClass, Op0, Op0IsKill);
2299
0
  }
2300
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
2301
0
    return fastEmitInst_r(X86::VPMOVZXWQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
2302
0
  }
2303
0
  return 0;
2304
0
}
2305
2306
unsigned fastEmit_ISD_ZERO_EXTEND_VECTOR_INREG_MVT_v8i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2307
switch (RetVT.SimpleTy) {
2308
  case MVT::v4i32: return fastEmit_ISD_ZERO_EXTEND_VECTOR_INREG_MVT_v8i16_MVT_v4i32_r(Op0, Op0IsKill);
2309
  case MVT::v2i64: return fastEmit_ISD_ZERO_EXTEND_VECTOR_INREG_MVT_v8i16_MVT_v2i64_r(Op0, Op0IsKill);
2310
  default: return 0;
2311
}
2312
}
2313
2314
0
unsigned fastEmit_ISD_ZERO_EXTEND_VECTOR_INREG_MVT_v4i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2315
0
  if (RetVT.SimpleTy != MVT::v2i64)
2316
0
    return 0;
2317
0
  if ((Subtarget->hasSSE41() && !Subtarget->hasAVX())) {
2318
0
    return fastEmitInst_r(X86::PMOVZXDQrr, &X86::VR128RegClass, Op0, Op0IsKill);
2319
0
  }
2320
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
2321
0
    return fastEmitInst_r(X86::VPMOVZXDQrr, &X86::VR128RegClass, Op0, Op0IsKill);
2322
0
  }
2323
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
2324
0
    return fastEmitInst_r(X86::VPMOVZXDQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
2325
0
  }
2326
0
  return 0;
2327
0
}
2328
2329
unsigned fastEmit_ISD_ZERO_EXTEND_VECTOR_INREG_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
2330
  switch (VT.SimpleTy) {
2331
  case MVT::v16i8: return fastEmit_ISD_ZERO_EXTEND_VECTOR_INREG_MVT_v16i8_r(RetVT, Op0, Op0IsKill);
2332
  case MVT::v8i16: return fastEmit_ISD_ZERO_EXTEND_VECTOR_INREG_MVT_v8i16_r(RetVT, Op0, Op0IsKill);
2333
  case MVT::v4i32: return fastEmit_ISD_ZERO_EXTEND_VECTOR_INREG_MVT_v4i32_r(RetVT, Op0, Op0IsKill);
2334
  default: return 0;
2335
  }
2336
}
2337
2338
// FastEmit functions for X86ISD::CALL.
2339
2340
0
unsigned fastEmit_X86ISD_CALL_MVT_i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2341
0
  if (RetVT.SimpleTy != MVT::isVoid)
2342
0
    return 0;
2343
0
  if ((!Subtarget->is64Bit())) {
2344
0
    return fastEmitInst_r(X86::CALL16r, &X86::GR16RegClass, Op0, Op0IsKill);
2345
0
  }
2346
0
  return 0;
2347
0
}
2348
2349
0
unsigned fastEmit_X86ISD_CALL_MVT_i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2350
0
  if (RetVT.SimpleTy != MVT::isVoid)
2351
0
    return 0;
2352
0
  if ((!Subtarget->is64Bit()) && (Subtarget->useRetpolineIndirectCalls())) {
2353
0
    return fastEmitInst_r(X86::RETPOLINE_CALL32, &X86::GR32RegClass, Op0, Op0IsKill);
2354
0
  }
2355
0
  if ((!Subtarget->is64Bit()) && (!Subtarget->useRetpolineIndirectCalls())) {
2356
0
    return fastEmitInst_r(X86::CALL32r, &X86::GR32RegClass, Op0, Op0IsKill);
2357
0
  }
2358
0
  return 0;
2359
0
}
2360
2361
0
unsigned fastEmit_X86ISD_CALL_MVT_i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2362
0
  if (RetVT.SimpleTy != MVT::isVoid)
2363
0
    return 0;
2364
0
  if ((Subtarget->is64Bit()) && (Subtarget->useRetpolineIndirectCalls())) {
2365
0
    return fastEmitInst_r(X86::RETPOLINE_CALL64, &X86::GR64RegClass, Op0, Op0IsKill);
2366
0
  }
2367
0
  if ((Subtarget->is64Bit()) && (!Subtarget->useRetpolineIndirectCalls())) {
2368
0
    return fastEmitInst_r(X86::CALL64r, &X86::GR64RegClass, Op0, Op0IsKill);
2369
0
  }
2370
0
  return 0;
2371
0
}
2372
2373
unsigned fastEmit_X86ISD_CALL_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
2374
  switch (VT.SimpleTy) {
2375
  case MVT::i16: return fastEmit_X86ISD_CALL_MVT_i16_r(RetVT, Op0, Op0IsKill);
2376
  case MVT::i32: return fastEmit_X86ISD_CALL_MVT_i32_r(RetVT, Op0, Op0IsKill);
2377
  case MVT::i64: return fastEmit_X86ISD_CALL_MVT_i64_r(RetVT, Op0, Op0IsKill);
2378
  default: return 0;
2379
  }
2380
}
2381
2382
// FastEmit functions for X86ISD::COMPRESS.
2383
2384
0
unsigned fastEmit_X86ISD_COMPRESS_MVT_v16i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2385
0
  if (RetVT.SimpleTy != MVT::v16i8)
2386
0
    return 0;
2387
0
  if ((Subtarget->hasVBMI2()) && (Subtarget->hasVLX())) {
2388
0
    return fastEmitInst_r(X86::VPCOMPRESSBZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
2389
0
  }
2390
0
  return 0;
2391
0
}
2392
2393
0
unsigned fastEmit_X86ISD_COMPRESS_MVT_v32i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2394
0
  if (RetVT.SimpleTy != MVT::v32i8)
2395
0
    return 0;
2396
0
  if ((Subtarget->hasVBMI2()) && (Subtarget->hasVLX())) {
2397
0
    return fastEmitInst_r(X86::VPCOMPRESSBZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
2398
0
  }
2399
0
  return 0;
2400
0
}
2401
2402
0
unsigned fastEmit_X86ISD_COMPRESS_MVT_v64i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2403
0
  if (RetVT.SimpleTy != MVT::v64i8)
2404
0
    return 0;
2405
0
  if ((Subtarget->hasVBMI2())) {
2406
0
    return fastEmitInst_r(X86::VPCOMPRESSBZrr, &X86::VR512RegClass, Op0, Op0IsKill);
2407
0
  }
2408
0
  return 0;
2409
0
}
2410
2411
0
unsigned fastEmit_X86ISD_COMPRESS_MVT_v8i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2412
0
  if (RetVT.SimpleTy != MVT::v8i16)
2413
0
    return 0;
2414
0
  if ((Subtarget->hasVBMI2()) && (Subtarget->hasVLX())) {
2415
0
    return fastEmitInst_r(X86::VPCOMPRESSWZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
2416
0
  }
2417
0
  return 0;
2418
0
}
2419
2420
0
unsigned fastEmit_X86ISD_COMPRESS_MVT_v16i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2421
0
  if (RetVT.SimpleTy != MVT::v16i16)
2422
0
    return 0;
2423
0
  if ((Subtarget->hasVBMI2()) && (Subtarget->hasVLX())) {
2424
0
    return fastEmitInst_r(X86::VPCOMPRESSWZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
2425
0
  }
2426
0
  return 0;
2427
0
}
2428
2429
0
unsigned fastEmit_X86ISD_COMPRESS_MVT_v32i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2430
0
  if (RetVT.SimpleTy != MVT::v32i16)
2431
0
    return 0;
2432
0
  if ((Subtarget->hasVBMI2())) {
2433
0
    return fastEmitInst_r(X86::VPCOMPRESSWZrr, &X86::VR512RegClass, Op0, Op0IsKill);
2434
0
  }
2435
0
  return 0;
2436
0
}
2437
2438
0
unsigned fastEmit_X86ISD_COMPRESS_MVT_v4i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2439
0
  if (RetVT.SimpleTy != MVT::v4i32)
2440
0
    return 0;
2441
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
2442
0
    return fastEmitInst_r(X86::VPCOMPRESSDZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
2443
0
  }
2444
0
  return 0;
2445
0
}
2446
2447
0
unsigned fastEmit_X86ISD_COMPRESS_MVT_v8i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2448
0
  if (RetVT.SimpleTy != MVT::v8i32)
2449
0
    return 0;
2450
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
2451
0
    return fastEmitInst_r(X86::VPCOMPRESSDZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
2452
0
  }
2453
0
  return 0;
2454
0
}
2455
2456
0
unsigned fastEmit_X86ISD_COMPRESS_MVT_v16i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2457
0
  if (RetVT.SimpleTy != MVT::v16i32)
2458
0
    return 0;
2459
0
  if ((Subtarget->hasAVX512())) {
2460
0
    return fastEmitInst_r(X86::VPCOMPRESSDZrr, &X86::VR512RegClass, Op0, Op0IsKill);
2461
0
  }
2462
0
  return 0;
2463
0
}
2464
2465
0
unsigned fastEmit_X86ISD_COMPRESS_MVT_v2i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2466
0
  if (RetVT.SimpleTy != MVT::v2i64)
2467
0
    return 0;
2468
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
2469
0
    return fastEmitInst_r(X86::VPCOMPRESSQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
2470
0
  }
2471
0
  return 0;
2472
0
}
2473
2474
0
unsigned fastEmit_X86ISD_COMPRESS_MVT_v4i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2475
0
  if (RetVT.SimpleTy != MVT::v4i64)
2476
0
    return 0;
2477
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
2478
0
    return fastEmitInst_r(X86::VPCOMPRESSQZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
2479
0
  }
2480
0
  return 0;
2481
0
}
2482
2483
0
unsigned fastEmit_X86ISD_COMPRESS_MVT_v8i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2484
0
  if (RetVT.SimpleTy != MVT::v8i64)
2485
0
    return 0;
2486
0
  if ((Subtarget->hasAVX512())) {
2487
0
    return fastEmitInst_r(X86::VPCOMPRESSQZrr, &X86::VR512RegClass, Op0, Op0IsKill);
2488
0
  }
2489
0
  return 0;
2490
0
}
2491
2492
0
unsigned fastEmit_X86ISD_COMPRESS_MVT_v4f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2493
0
  if (RetVT.SimpleTy != MVT::v4f32)
2494
0
    return 0;
2495
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
2496
0
    return fastEmitInst_r(X86::VCOMPRESSPSZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
2497
0
  }
2498
0
  return 0;
2499
0
}
2500
2501
0
unsigned fastEmit_X86ISD_COMPRESS_MVT_v8f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2502
0
  if (RetVT.SimpleTy != MVT::v8f32)
2503
0
    return 0;
2504
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
2505
0
    return fastEmitInst_r(X86::VCOMPRESSPSZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
2506
0
  }
2507
0
  return 0;
2508
0
}
2509
2510
0
unsigned fastEmit_X86ISD_COMPRESS_MVT_v16f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2511
0
  if (RetVT.SimpleTy != MVT::v16f32)
2512
0
    return 0;
2513
0
  if ((Subtarget->hasAVX512())) {
2514
0
    return fastEmitInst_r(X86::VCOMPRESSPSZrr, &X86::VR512RegClass, Op0, Op0IsKill);
2515
0
  }
2516
0
  return 0;
2517
0
}
2518
2519
0
unsigned fastEmit_X86ISD_COMPRESS_MVT_v2f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2520
0
  if (RetVT.SimpleTy != MVT::v2f64)
2521
0
    return 0;
2522
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
2523
0
    return fastEmitInst_r(X86::VCOMPRESSPDZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
2524
0
  }
2525
0
  return 0;
2526
0
}
2527
2528
0
unsigned fastEmit_X86ISD_COMPRESS_MVT_v4f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2529
0
  if (RetVT.SimpleTy != MVT::v4f64)
2530
0
    return 0;
2531
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
2532
0
    return fastEmitInst_r(X86::VCOMPRESSPDZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
2533
0
  }
2534
0
  return 0;
2535
0
}
2536
2537
0
unsigned fastEmit_X86ISD_COMPRESS_MVT_v8f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2538
0
  if (RetVT.SimpleTy != MVT::v8f64)
2539
0
    return 0;
2540
0
  if ((Subtarget->hasAVX512())) {
2541
0
    return fastEmitInst_r(X86::VCOMPRESSPDZrr, &X86::VR512RegClass, Op0, Op0IsKill);
2542
0
  }
2543
0
  return 0;
2544
0
}
2545
2546
unsigned fastEmit_X86ISD_COMPRESS_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
2547
  switch (VT.SimpleTy) {
2548
  case MVT::v16i8: return fastEmit_X86ISD_COMPRESS_MVT_v16i8_r(RetVT, Op0, Op0IsKill);
2549
  case MVT::v32i8: return fastEmit_X86ISD_COMPRESS_MVT_v32i8_r(RetVT, Op0, Op0IsKill);
2550
  case MVT::v64i8: return fastEmit_X86ISD_COMPRESS_MVT_v64i8_r(RetVT, Op0, Op0IsKill);
2551
  case MVT::v8i16: return fastEmit_X86ISD_COMPRESS_MVT_v8i16_r(RetVT, Op0, Op0IsKill);
2552
  case MVT::v16i16: return fastEmit_X86ISD_COMPRESS_MVT_v16i16_r(RetVT, Op0, Op0IsKill);
2553
  case MVT::v32i16: return fastEmit_X86ISD_COMPRESS_MVT_v32i16_r(RetVT, Op0, Op0IsKill);
2554
  case MVT::v4i32: return fastEmit_X86ISD_COMPRESS_MVT_v4i32_r(RetVT, Op0, Op0IsKill);
2555
  case MVT::v8i32: return fastEmit_X86ISD_COMPRESS_MVT_v8i32_r(RetVT, Op0, Op0IsKill);
2556
  case MVT::v16i32: return fastEmit_X86ISD_COMPRESS_MVT_v16i32_r(RetVT, Op0, Op0IsKill);
2557
  case MVT::v2i64: return fastEmit_X86ISD_COMPRESS_MVT_v2i64_r(RetVT, Op0, Op0IsKill);
2558
  case MVT::v4i64: return fastEmit_X86ISD_COMPRESS_MVT_v4i64_r(RetVT, Op0, Op0IsKill);
2559
  case MVT::v8i64: return fastEmit_X86ISD_COMPRESS_MVT_v8i64_r(RetVT, Op0, Op0IsKill);
2560
  case MVT::v4f32: return fastEmit_X86ISD_COMPRESS_MVT_v4f32_r(RetVT, Op0, Op0IsKill);
2561
  case MVT::v8f32: return fastEmit_X86ISD_COMPRESS_MVT_v8f32_r(RetVT, Op0, Op0IsKill);
2562
  case MVT::v16f32: return fastEmit_X86ISD_COMPRESS_MVT_v16f32_r(RetVT, Op0, Op0IsKill);
2563
  case MVT::v2f64: return fastEmit_X86ISD_COMPRESS_MVT_v2f64_r(RetVT, Op0, Op0IsKill);
2564
  case MVT::v4f64: return fastEmit_X86ISD_COMPRESS_MVT_v4f64_r(RetVT, Op0, Op0IsKill);
2565
  case MVT::v8f64: return fastEmit_X86ISD_COMPRESS_MVT_v8f64_r(RetVT, Op0, Op0IsKill);
2566
  default: return 0;
2567
  }
2568
}
2569
2570
// FastEmit functions for X86ISD::CONFLICT.
2571
2572
0
unsigned fastEmit_X86ISD_CONFLICT_MVT_v4i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2573
0
  if (RetVT.SimpleTy != MVT::v4i32)
2574
0
    return 0;
2575
0
  if ((Subtarget->hasCDI()) && (Subtarget->hasVLX())) {
2576
0
    return fastEmitInst_r(X86::VPCONFLICTDZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
2577
0
  }
2578
0
  return 0;
2579
0
}
2580
2581
0
unsigned fastEmit_X86ISD_CONFLICT_MVT_v8i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2582
0
  if (RetVT.SimpleTy != MVT::v8i32)
2583
0
    return 0;
2584
0
  if ((Subtarget->hasCDI()) && (Subtarget->hasVLX())) {
2585
0
    return fastEmitInst_r(X86::VPCONFLICTDZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
2586
0
  }
2587
0
  return 0;
2588
0
}
2589
2590
0
unsigned fastEmit_X86ISD_CONFLICT_MVT_v16i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2591
0
  if (RetVT.SimpleTy != MVT::v16i32)
2592
0
    return 0;
2593
0
  if ((Subtarget->hasCDI())) {
2594
0
    return fastEmitInst_r(X86::VPCONFLICTDZrr, &X86::VR512RegClass, Op0, Op0IsKill);
2595
0
  }
2596
0
  return 0;
2597
0
}
2598
2599
0
unsigned fastEmit_X86ISD_CONFLICT_MVT_v2i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2600
0
  if (RetVT.SimpleTy != MVT::v2i64)
2601
0
    return 0;
2602
0
  if ((Subtarget->hasCDI()) && (Subtarget->hasVLX())) {
2603
0
    return fastEmitInst_r(X86::VPCONFLICTQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
2604
0
  }
2605
0
  return 0;
2606
0
}
2607
2608
0
unsigned fastEmit_X86ISD_CONFLICT_MVT_v4i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2609
0
  if (RetVT.SimpleTy != MVT::v4i64)
2610
0
    return 0;
2611
0
  if ((Subtarget->hasCDI()) && (Subtarget->hasVLX())) {
2612
0
    return fastEmitInst_r(X86::VPCONFLICTQZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
2613
0
  }
2614
0
  return 0;
2615
0
}
2616
2617
0
unsigned fastEmit_X86ISD_CONFLICT_MVT_v8i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2618
0
  if (RetVT.SimpleTy != MVT::v8i64)
2619
0
    return 0;
2620
0
  if ((Subtarget->hasCDI())) {
2621
0
    return fastEmitInst_r(X86::VPCONFLICTQZrr, &X86::VR512RegClass, Op0, Op0IsKill);
2622
0
  }
2623
0
  return 0;
2624
0
}
2625
2626
unsigned fastEmit_X86ISD_CONFLICT_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
2627
  switch (VT.SimpleTy) {
2628
  case MVT::v4i32: return fastEmit_X86ISD_CONFLICT_MVT_v4i32_r(RetVT, Op0, Op0IsKill);
2629
  case MVT::v8i32: return fastEmit_X86ISD_CONFLICT_MVT_v8i32_r(RetVT, Op0, Op0IsKill);
2630
  case MVT::v16i32: return fastEmit_X86ISD_CONFLICT_MVT_v16i32_r(RetVT, Op0, Op0IsKill);
2631
  case MVT::v2i64: return fastEmit_X86ISD_CONFLICT_MVT_v2i64_r(RetVT, Op0, Op0IsKill);
2632
  case MVT::v4i64: return fastEmit_X86ISD_CONFLICT_MVT_v4i64_r(RetVT, Op0, Op0IsKill);
2633
  case MVT::v8i64: return fastEmit_X86ISD_CONFLICT_MVT_v8i64_r(RetVT, Op0, Op0IsKill);
2634
  default: return 0;
2635
  }
2636
}
2637
2638
// FastEmit functions for X86ISD::CVTP2SI.
2639
2640
0
unsigned fastEmit_X86ISD_CVTP2SI_MVT_v4f32_MVT_v4i32_r(unsigned Op0, bool Op0IsKill) {
2641
0
  if ((Subtarget->hasVLX())) {
2642
0
    return fastEmitInst_r(X86::VCVTPS2DQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
2643
0
  }
2644
0
  if ((Subtarget->hasSSE2() && !Subtarget->hasAVX())) {
2645
0
    return fastEmitInst_r(X86::CVTPS2DQrr, &X86::VR128RegClass, Op0, Op0IsKill);
2646
0
  }
2647
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
2648
0
    return fastEmitInst_r(X86::VCVTPS2DQrr, &X86::VR128RegClass, Op0, Op0IsKill);
2649
0
  }
2650
0
  return 0;
2651
0
}
2652
2653
0
unsigned fastEmit_X86ISD_CVTP2SI_MVT_v4f32_MVT_v2i64_r(unsigned Op0, bool Op0IsKill) {
2654
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
2655
0
    return fastEmitInst_r(X86::VCVTPS2QQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
2656
0
  }
2657
0
  return 0;
2658
0
}
2659
2660
0
unsigned fastEmit_X86ISD_CVTP2SI_MVT_v4f32_MVT_v4i64_r(unsigned Op0, bool Op0IsKill) {
2661
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
2662
0
    return fastEmitInst_r(X86::VCVTPS2QQZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
2663
0
  }
2664
0
  return 0;
2665
0
}
2666
2667
unsigned fastEmit_X86ISD_CVTP2SI_MVT_v4f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2668
switch (RetVT.SimpleTy) {
2669
  case MVT::v4i32: return fastEmit_X86ISD_CVTP2SI_MVT_v4f32_MVT_v4i32_r(Op0, Op0IsKill);
2670
  case MVT::v2i64: return fastEmit_X86ISD_CVTP2SI_MVT_v4f32_MVT_v2i64_r(Op0, Op0IsKill);
2671
  case MVT::v4i64: return fastEmit_X86ISD_CVTP2SI_MVT_v4f32_MVT_v4i64_r(Op0, Op0IsKill);
2672
  default: return 0;
2673
}
2674
}
2675
2676
0
unsigned fastEmit_X86ISD_CVTP2SI_MVT_v8f32_MVT_v8i32_r(unsigned Op0, bool Op0IsKill) {
2677
0
  if ((Subtarget->hasVLX())) {
2678
0
    return fastEmitInst_r(X86::VCVTPS2DQZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
2679
0
  }
2680
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
2681
0
    return fastEmitInst_r(X86::VCVTPS2DQYrr, &X86::VR256RegClass, Op0, Op0IsKill);
2682
0
  }
2683
0
  return 0;
2684
0
}
2685
2686
0
unsigned fastEmit_X86ISD_CVTP2SI_MVT_v8f32_MVT_v8i64_r(unsigned Op0, bool Op0IsKill) {
2687
0
  if ((Subtarget->hasDQI())) {
2688
0
    return fastEmitInst_r(X86::VCVTPS2QQZrr, &X86::VR512RegClass, Op0, Op0IsKill);
2689
0
  }
2690
0
  return 0;
2691
0
}
2692
2693
unsigned fastEmit_X86ISD_CVTP2SI_MVT_v8f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2694
switch (RetVT.SimpleTy) {
2695
  case MVT::v8i32: return fastEmit_X86ISD_CVTP2SI_MVT_v8f32_MVT_v8i32_r(Op0, Op0IsKill);
2696
  case MVT::v8i64: return fastEmit_X86ISD_CVTP2SI_MVT_v8f32_MVT_v8i64_r(Op0, Op0IsKill);
2697
  default: return 0;
2698
}
2699
}
2700
2701
0
unsigned fastEmit_X86ISD_CVTP2SI_MVT_v16f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2702
0
  if (RetVT.SimpleTy != MVT::v16i32)
2703
0
    return 0;
2704
0
  if ((Subtarget->hasAVX512())) {
2705
0
    return fastEmitInst_r(X86::VCVTPS2DQZrr, &X86::VR512RegClass, Op0, Op0IsKill);
2706
0
  }
2707
0
  return 0;
2708
0
}
2709
2710
0
unsigned fastEmit_X86ISD_CVTP2SI_MVT_v2f64_MVT_v4i32_r(unsigned Op0, bool Op0IsKill) {
2711
0
  if ((Subtarget->hasVLX())) {
2712
0
    return fastEmitInst_r(X86::VCVTPD2DQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
2713
0
  }
2714
0
  if ((Subtarget->hasSSE2() && !Subtarget->hasAVX())) {
2715
0
    return fastEmitInst_r(X86::CVTPD2DQrr, &X86::VR128RegClass, Op0, Op0IsKill);
2716
0
  }
2717
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
2718
0
    return fastEmitInst_r(X86::VCVTPD2DQrr, &X86::VR128RegClass, Op0, Op0IsKill);
2719
0
  }
2720
0
  return 0;
2721
0
}
2722
2723
0
unsigned fastEmit_X86ISD_CVTP2SI_MVT_v2f64_MVT_v2i64_r(unsigned Op0, bool Op0IsKill) {
2724
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
2725
0
    return fastEmitInst_r(X86::VCVTPD2QQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
2726
0
  }
2727
0
  return 0;
2728
0
}
2729
2730
unsigned fastEmit_X86ISD_CVTP2SI_MVT_v2f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2731
switch (RetVT.SimpleTy) {
2732
  case MVT::v4i32: return fastEmit_X86ISD_CVTP2SI_MVT_v2f64_MVT_v4i32_r(Op0, Op0IsKill);
2733
  case MVT::v2i64: return fastEmit_X86ISD_CVTP2SI_MVT_v2f64_MVT_v2i64_r(Op0, Op0IsKill);
2734
  default: return 0;
2735
}
2736
}
2737
2738
0
unsigned fastEmit_X86ISD_CVTP2SI_MVT_v4f64_MVT_v4i32_r(unsigned Op0, bool Op0IsKill) {
2739
0
  if ((Subtarget->hasVLX())) {
2740
0
    return fastEmitInst_r(X86::VCVTPD2DQZ256rr, &X86::VR128XRegClass, Op0, Op0IsKill);
2741
0
  }
2742
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
2743
0
    return fastEmitInst_r(X86::VCVTPD2DQYrr, &X86::VR128RegClass, Op0, Op0IsKill);
2744
0
  }
2745
0
  return 0;
2746
0
}
2747
2748
0
unsigned fastEmit_X86ISD_CVTP2SI_MVT_v4f64_MVT_v4i64_r(unsigned Op0, bool Op0IsKill) {
2749
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
2750
0
    return fastEmitInst_r(X86::VCVTPD2QQZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
2751
0
  }
2752
0
  return 0;
2753
0
}
2754
2755
unsigned fastEmit_X86ISD_CVTP2SI_MVT_v4f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2756
switch (RetVT.SimpleTy) {
2757
  case MVT::v4i32: return fastEmit_X86ISD_CVTP2SI_MVT_v4f64_MVT_v4i32_r(Op0, Op0IsKill);
2758
  case MVT::v4i64: return fastEmit_X86ISD_CVTP2SI_MVT_v4f64_MVT_v4i64_r(Op0, Op0IsKill);
2759
  default: return 0;
2760
}
2761
}
2762
2763
0
unsigned fastEmit_X86ISD_CVTP2SI_MVT_v8f64_MVT_v8i32_r(unsigned Op0, bool Op0IsKill) {
2764
0
  if ((Subtarget->hasAVX512())) {
2765
0
    return fastEmitInst_r(X86::VCVTPD2DQZrr, &X86::VR256XRegClass, Op0, Op0IsKill);
2766
0
  }
2767
0
  return 0;
2768
0
}
2769
2770
0
unsigned fastEmit_X86ISD_CVTP2SI_MVT_v8f64_MVT_v8i64_r(unsigned Op0, bool Op0IsKill) {
2771
0
  if ((Subtarget->hasDQI())) {
2772
0
    return fastEmitInst_r(X86::VCVTPD2QQZrr, &X86::VR512RegClass, Op0, Op0IsKill);
2773
0
  }
2774
0
  return 0;
2775
0
}
2776
2777
unsigned fastEmit_X86ISD_CVTP2SI_MVT_v8f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2778
switch (RetVT.SimpleTy) {
2779
  case MVT::v8i32: return fastEmit_X86ISD_CVTP2SI_MVT_v8f64_MVT_v8i32_r(Op0, Op0IsKill);
2780
  case MVT::v8i64: return fastEmit_X86ISD_CVTP2SI_MVT_v8f64_MVT_v8i64_r(Op0, Op0IsKill);
2781
  default: return 0;
2782
}
2783
}
2784
2785
unsigned fastEmit_X86ISD_CVTP2SI_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
2786
  switch (VT.SimpleTy) {
2787
  case MVT::v4f32: return fastEmit_X86ISD_CVTP2SI_MVT_v4f32_r(RetVT, Op0, Op0IsKill);
2788
  case MVT::v8f32: return fastEmit_X86ISD_CVTP2SI_MVT_v8f32_r(RetVT, Op0, Op0IsKill);
2789
  case MVT::v16f32: return fastEmit_X86ISD_CVTP2SI_MVT_v16f32_r(RetVT, Op0, Op0IsKill);
2790
  case MVT::v2f64: return fastEmit_X86ISD_CVTP2SI_MVT_v2f64_r(RetVT, Op0, Op0IsKill);
2791
  case MVT::v4f64: return fastEmit_X86ISD_CVTP2SI_MVT_v4f64_r(RetVT, Op0, Op0IsKill);
2792
  case MVT::v8f64: return fastEmit_X86ISD_CVTP2SI_MVT_v8f64_r(RetVT, Op0, Op0IsKill);
2793
  default: return 0;
2794
  }
2795
}
2796
2797
// FastEmit functions for X86ISD::CVTP2UI.
2798
2799
0
unsigned fastEmit_X86ISD_CVTP2UI_MVT_v4f32_MVT_v4i32_r(unsigned Op0, bool Op0IsKill) {
2800
0
  if ((Subtarget->hasVLX())) {
2801
0
    return fastEmitInst_r(X86::VCVTPS2UDQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
2802
0
  }
2803
0
  return 0;
2804
0
}
2805
2806
0
unsigned fastEmit_X86ISD_CVTP2UI_MVT_v4f32_MVT_v2i64_r(unsigned Op0, bool Op0IsKill) {
2807
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
2808
0
    return fastEmitInst_r(X86::VCVTPS2UQQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
2809
0
  }
2810
0
  return 0;
2811
0
}
2812
2813
0
unsigned fastEmit_X86ISD_CVTP2UI_MVT_v4f32_MVT_v4i64_r(unsigned Op0, bool Op0IsKill) {
2814
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
2815
0
    return fastEmitInst_r(X86::VCVTPS2UQQZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
2816
0
  }
2817
0
  return 0;
2818
0
}
2819
2820
unsigned fastEmit_X86ISD_CVTP2UI_MVT_v4f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2821
switch (RetVT.SimpleTy) {
2822
  case MVT::v4i32: return fastEmit_X86ISD_CVTP2UI_MVT_v4f32_MVT_v4i32_r(Op0, Op0IsKill);
2823
  case MVT::v2i64: return fastEmit_X86ISD_CVTP2UI_MVT_v4f32_MVT_v2i64_r(Op0, Op0IsKill);
2824
  case MVT::v4i64: return fastEmit_X86ISD_CVTP2UI_MVT_v4f32_MVT_v4i64_r(Op0, Op0IsKill);
2825
  default: return 0;
2826
}
2827
}
2828
2829
0
unsigned fastEmit_X86ISD_CVTP2UI_MVT_v8f32_MVT_v8i32_r(unsigned Op0, bool Op0IsKill) {
2830
0
  if ((Subtarget->hasVLX())) {
2831
0
    return fastEmitInst_r(X86::VCVTPS2UDQZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
2832
0
  }
2833
0
  return 0;
2834
0
}
2835
2836
0
unsigned fastEmit_X86ISD_CVTP2UI_MVT_v8f32_MVT_v8i64_r(unsigned Op0, bool Op0IsKill) {
2837
0
  if ((Subtarget->hasDQI())) {
2838
0
    return fastEmitInst_r(X86::VCVTPS2UQQZrr, &X86::VR512RegClass, Op0, Op0IsKill);
2839
0
  }
2840
0
  return 0;
2841
0
}
2842
2843
unsigned fastEmit_X86ISD_CVTP2UI_MVT_v8f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2844
switch (RetVT.SimpleTy) {
2845
  case MVT::v8i32: return fastEmit_X86ISD_CVTP2UI_MVT_v8f32_MVT_v8i32_r(Op0, Op0IsKill);
2846
  case MVT::v8i64: return fastEmit_X86ISD_CVTP2UI_MVT_v8f32_MVT_v8i64_r(Op0, Op0IsKill);
2847
  default: return 0;
2848
}
2849
}
2850
2851
0
unsigned fastEmit_X86ISD_CVTP2UI_MVT_v16f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2852
0
  if (RetVT.SimpleTy != MVT::v16i32)
2853
0
    return 0;
2854
0
  if ((Subtarget->hasAVX512())) {
2855
0
    return fastEmitInst_r(X86::VCVTPS2UDQZrr, &X86::VR512RegClass, Op0, Op0IsKill);
2856
0
  }
2857
0
  return 0;
2858
0
}
2859
2860
0
unsigned fastEmit_X86ISD_CVTP2UI_MVT_v2f64_MVT_v4i32_r(unsigned Op0, bool Op0IsKill) {
2861
0
  if ((Subtarget->hasVLX())) {
2862
0
    return fastEmitInst_r(X86::VCVTPD2UDQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
2863
0
  }
2864
0
  return 0;
2865
0
}
2866
2867
0
unsigned fastEmit_X86ISD_CVTP2UI_MVT_v2f64_MVT_v2i64_r(unsigned Op0, bool Op0IsKill) {
2868
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
2869
0
    return fastEmitInst_r(X86::VCVTPD2UQQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
2870
0
  }
2871
0
  return 0;
2872
0
}
2873
2874
unsigned fastEmit_X86ISD_CVTP2UI_MVT_v2f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2875
switch (RetVT.SimpleTy) {
2876
  case MVT::v4i32: return fastEmit_X86ISD_CVTP2UI_MVT_v2f64_MVT_v4i32_r(Op0, Op0IsKill);
2877
  case MVT::v2i64: return fastEmit_X86ISD_CVTP2UI_MVT_v2f64_MVT_v2i64_r(Op0, Op0IsKill);
2878
  default: return 0;
2879
}
2880
}
2881
2882
0
unsigned fastEmit_X86ISD_CVTP2UI_MVT_v4f64_MVT_v4i32_r(unsigned Op0, bool Op0IsKill) {
2883
0
  if ((Subtarget->hasVLX())) {
2884
0
    return fastEmitInst_r(X86::VCVTPD2UDQZ256rr, &X86::VR128XRegClass, Op0, Op0IsKill);
2885
0
  }
2886
0
  return 0;
2887
0
}
2888
2889
0
unsigned fastEmit_X86ISD_CVTP2UI_MVT_v4f64_MVT_v4i64_r(unsigned Op0, bool Op0IsKill) {
2890
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
2891
0
    return fastEmitInst_r(X86::VCVTPD2UQQZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
2892
0
  }
2893
0
  return 0;
2894
0
}
2895
2896
unsigned fastEmit_X86ISD_CVTP2UI_MVT_v4f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2897
switch (RetVT.SimpleTy) {
2898
  case MVT::v4i32: return fastEmit_X86ISD_CVTP2UI_MVT_v4f64_MVT_v4i32_r(Op0, Op0IsKill);
2899
  case MVT::v4i64: return fastEmit_X86ISD_CVTP2UI_MVT_v4f64_MVT_v4i64_r(Op0, Op0IsKill);
2900
  default: return 0;
2901
}
2902
}
2903
2904
0
unsigned fastEmit_X86ISD_CVTP2UI_MVT_v8f64_MVT_v8i32_r(unsigned Op0, bool Op0IsKill) {
2905
0
  if ((Subtarget->hasAVX512())) {
2906
0
    return fastEmitInst_r(X86::VCVTPD2UDQZrr, &X86::VR256XRegClass, Op0, Op0IsKill);
2907
0
  }
2908
0
  return 0;
2909
0
}
2910
2911
0
unsigned fastEmit_X86ISD_CVTP2UI_MVT_v8f64_MVT_v8i64_r(unsigned Op0, bool Op0IsKill) {
2912
0
  if ((Subtarget->hasDQI())) {
2913
0
    return fastEmitInst_r(X86::VCVTPD2UQQZrr, &X86::VR512RegClass, Op0, Op0IsKill);
2914
0
  }
2915
0
  return 0;
2916
0
}
2917
2918
unsigned fastEmit_X86ISD_CVTP2UI_MVT_v8f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2919
switch (RetVT.SimpleTy) {
2920
  case MVT::v8i32: return fastEmit_X86ISD_CVTP2UI_MVT_v8f64_MVT_v8i32_r(Op0, Op0IsKill);
2921
  case MVT::v8i64: return fastEmit_X86ISD_CVTP2UI_MVT_v8f64_MVT_v8i64_r(Op0, Op0IsKill);
2922
  default: return 0;
2923
}
2924
}
2925
2926
unsigned fastEmit_X86ISD_CVTP2UI_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
2927
  switch (VT.SimpleTy) {
2928
  case MVT::v4f32: return fastEmit_X86ISD_CVTP2UI_MVT_v4f32_r(RetVT, Op0, Op0IsKill);
2929
  case MVT::v8f32: return fastEmit_X86ISD_CVTP2UI_MVT_v8f32_r(RetVT, Op0, Op0IsKill);
2930
  case MVT::v16f32: return fastEmit_X86ISD_CVTP2UI_MVT_v16f32_r(RetVT, Op0, Op0IsKill);
2931
  case MVT::v2f64: return fastEmit_X86ISD_CVTP2UI_MVT_v2f64_r(RetVT, Op0, Op0IsKill);
2932
  case MVT::v4f64: return fastEmit_X86ISD_CVTP2UI_MVT_v4f64_r(RetVT, Op0, Op0IsKill);
2933
  case MVT::v8f64: return fastEmit_X86ISD_CVTP2UI_MVT_v8f64_r(RetVT, Op0, Op0IsKill);
2934
  default: return 0;
2935
  }
2936
}
2937
2938
// FastEmit functions for X86ISD::CVTPH2PS.
2939
2940
0
unsigned fastEmit_X86ISD_CVTPH2PS_MVT_v8i16_MVT_v4f32_r(unsigned Op0, bool Op0IsKill) {
2941
0
  if ((Subtarget->hasVLX())) {
2942
0
    return fastEmitInst_r(X86::VCVTPH2PSZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
2943
0
  }
2944
0
  if ((Subtarget->hasF16C()) && (!Subtarget->hasVLX())) {
2945
0
    return fastEmitInst_r(X86::VCVTPH2PSrr, &X86::VR128RegClass, Op0, Op0IsKill);
2946
0
  }
2947
0
  return 0;
2948
0
}
2949
2950
0
unsigned fastEmit_X86ISD_CVTPH2PS_MVT_v8i16_MVT_v8f32_r(unsigned Op0, bool Op0IsKill) {
2951
0
  if ((Subtarget->hasVLX())) {
2952
0
    return fastEmitInst_r(X86::VCVTPH2PSZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
2953
0
  }
2954
0
  if ((Subtarget->hasF16C()) && (!Subtarget->hasVLX())) {
2955
0
    return fastEmitInst_r(X86::VCVTPH2PSYrr, &X86::VR256RegClass, Op0, Op0IsKill);
2956
0
  }
2957
0
  return 0;
2958
0
}
2959
2960
unsigned fastEmit_X86ISD_CVTPH2PS_MVT_v8i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2961
switch (RetVT.SimpleTy) {
2962
  case MVT::v4f32: return fastEmit_X86ISD_CVTPH2PS_MVT_v8i16_MVT_v4f32_r(Op0, Op0IsKill);
2963
  case MVT::v8f32: return fastEmit_X86ISD_CVTPH2PS_MVT_v8i16_MVT_v8f32_r(Op0, Op0IsKill);
2964
  default: return 0;
2965
}
2966
}
2967
2968
0
unsigned fastEmit_X86ISD_CVTPH2PS_MVT_v16i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
2969
0
  if (RetVT.SimpleTy != MVT::v16f32)
2970
0
    return 0;
2971
0
  if ((Subtarget->hasAVX512())) {
2972
0
    return fastEmitInst_r(X86::VCVTPH2PSZrr, &X86::VR512RegClass, Op0, Op0IsKill);
2973
0
  }
2974
0
  return 0;
2975
0
}
2976
2977
unsigned fastEmit_X86ISD_CVTPH2PS_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
2978
  switch (VT.SimpleTy) {
2979
  case MVT::v8i16: return fastEmit_X86ISD_CVTPH2PS_MVT_v8i16_r(RetVT, Op0, Op0IsKill);
2980
  case MVT::v16i16: return fastEmit_X86ISD_CVTPH2PS_MVT_v16i16_r(RetVT, Op0, Op0IsKill);
2981
  default: return 0;
2982
  }
2983
}
2984
2985
// FastEmit functions for X86ISD::CVTS2SI.
2986
2987
0
unsigned fastEmit_X86ISD_CVTS2SI_MVT_v4f32_MVT_i32_r(unsigned Op0, bool Op0IsKill) {
2988
0
  if ((Subtarget->hasAVX512())) {
2989
0
    return fastEmitInst_r(X86::VCVTSS2SIZrr_Int, &X86::GR32RegClass, Op0, Op0IsKill);
2990
0
  }
2991
0
  if ((Subtarget->hasSSE1() && !Subtarget->hasAVX())) {
2992
0
    return fastEmitInst_r(X86::CVTSS2SIrr_Int, &X86::GR32RegClass, Op0, Op0IsKill);
2993
0
  }
2994
0
  if ((Subtarget->hasAVX() && !Subtarget->hasAVX512())) {
2995
0
    return fastEmitInst_r(X86::VCVTSS2SIrr_Int, &X86::GR32RegClass, Op0, Op0IsKill);
2996
0
  }
2997
0
  return 0;
2998
0
}
2999
3000
0
unsigned fastEmit_X86ISD_CVTS2SI_MVT_v4f32_MVT_i64_r(unsigned Op0, bool Op0IsKill) {
3001
0
  if ((Subtarget->hasAVX512())) {
3002
0
    return fastEmitInst_r(X86::VCVTSS2SI64Zrr_Int, &X86::GR64RegClass, Op0, Op0IsKill);
3003
0
  }
3004
0
  if ((Subtarget->hasSSE1() && !Subtarget->hasAVX())) {
3005
0
    return fastEmitInst_r(X86::CVTSS2SI64rr_Int, &X86::GR64RegClass, Op0, Op0IsKill);
3006
0
  }
3007
0
  if ((Subtarget->hasAVX() && !Subtarget->hasAVX512())) {
3008
0
    return fastEmitInst_r(X86::VCVTSS2SI64rr_Int, &X86::GR64RegClass, Op0, Op0IsKill);
3009
0
  }
3010
0
  return 0;
3011
0
}
3012
3013
unsigned fastEmit_X86ISD_CVTS2SI_MVT_v4f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3014
switch (RetVT.SimpleTy) {
3015
  case MVT::i32: return fastEmit_X86ISD_CVTS2SI_MVT_v4f32_MVT_i32_r(Op0, Op0IsKill);
3016
  case MVT::i64: return fastEmit_X86ISD_CVTS2SI_MVT_v4f32_MVT_i64_r(Op0, Op0IsKill);
3017
  default: return 0;
3018
}
3019
}
3020
3021
0
unsigned fastEmit_X86ISD_CVTS2SI_MVT_v2f64_MVT_i32_r(unsigned Op0, bool Op0IsKill) {
3022
0
  if ((Subtarget->hasAVX512())) {
3023
0
    return fastEmitInst_r(X86::VCVTSD2SIZrr_Int, &X86::GR32RegClass, Op0, Op0IsKill);
3024
0
  }
3025
0
  if ((Subtarget->hasSSE2() && !Subtarget->hasAVX())) {
3026
0
    return fastEmitInst_r(X86::CVTSD2SIrr_Int, &X86::GR32RegClass, Op0, Op0IsKill);
3027
0
  }
3028
0
  if ((Subtarget->hasAVX() && !Subtarget->hasAVX512())) {
3029
0
    return fastEmitInst_r(X86::VCVTSD2SIrr_Int, &X86::GR32RegClass, Op0, Op0IsKill);
3030
0
  }
3031
0
  return 0;
3032
0
}
3033
3034
0
unsigned fastEmit_X86ISD_CVTS2SI_MVT_v2f64_MVT_i64_r(unsigned Op0, bool Op0IsKill) {
3035
0
  if ((Subtarget->hasAVX512())) {
3036
0
    return fastEmitInst_r(X86::VCVTSD2SI64Zrr_Int, &X86::GR64RegClass, Op0, Op0IsKill);
3037
0
  }
3038
0
  if ((Subtarget->hasSSE2() && !Subtarget->hasAVX())) {
3039
0
    return fastEmitInst_r(X86::CVTSD2SI64rr_Int, &X86::GR64RegClass, Op0, Op0IsKill);
3040
0
  }
3041
0
  if ((Subtarget->hasAVX() && !Subtarget->hasAVX512())) {
3042
0
    return fastEmitInst_r(X86::VCVTSD2SI64rr_Int, &X86::GR64RegClass, Op0, Op0IsKill);
3043
0
  }
3044
0
  return 0;
3045
0
}
3046
3047
unsigned fastEmit_X86ISD_CVTS2SI_MVT_v2f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3048
switch (RetVT.SimpleTy) {
3049
  case MVT::i32: return fastEmit_X86ISD_CVTS2SI_MVT_v2f64_MVT_i32_r(Op0, Op0IsKill);
3050
  case MVT::i64: return fastEmit_X86ISD_CVTS2SI_MVT_v2f64_MVT_i64_r(Op0, Op0IsKill);
3051
  default: return 0;
3052
}
3053
}
3054
3055
unsigned fastEmit_X86ISD_CVTS2SI_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
3056
  switch (VT.SimpleTy) {
3057
  case MVT::v4f32: return fastEmit_X86ISD_CVTS2SI_MVT_v4f32_r(RetVT, Op0, Op0IsKill);
3058
  case MVT::v2f64: return fastEmit_X86ISD_CVTS2SI_MVT_v2f64_r(RetVT, Op0, Op0IsKill);
3059
  default: return 0;
3060
  }
3061
}
3062
3063
// FastEmit functions for X86ISD::CVTS2UI.
3064
3065
0
unsigned fastEmit_X86ISD_CVTS2UI_MVT_v4f32_MVT_i32_r(unsigned Op0, bool Op0IsKill) {
3066
0
  if ((Subtarget->hasAVX512())) {
3067
0
    return fastEmitInst_r(X86::VCVTSS2USIZrr_Int, &X86::GR32RegClass, Op0, Op0IsKill);
3068
0
  }
3069
0
  return 0;
3070
0
}
3071
3072
0
unsigned fastEmit_X86ISD_CVTS2UI_MVT_v4f32_MVT_i64_r(unsigned Op0, bool Op0IsKill) {
3073
0
  if ((Subtarget->hasAVX512())) {
3074
0
    return fastEmitInst_r(X86::VCVTSS2USI64Zrr_Int, &X86::GR64RegClass, Op0, Op0IsKill);
3075
0
  }
3076
0
  return 0;
3077
0
}
3078
3079
unsigned fastEmit_X86ISD_CVTS2UI_MVT_v4f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3080
switch (RetVT.SimpleTy) {
3081
  case MVT::i32: return fastEmit_X86ISD_CVTS2UI_MVT_v4f32_MVT_i32_r(Op0, Op0IsKill);
3082
  case MVT::i64: return fastEmit_X86ISD_CVTS2UI_MVT_v4f32_MVT_i64_r(Op0, Op0IsKill);
3083
  default: return 0;
3084
}
3085
}
3086
3087
0
unsigned fastEmit_X86ISD_CVTS2UI_MVT_v2f64_MVT_i32_r(unsigned Op0, bool Op0IsKill) {
3088
0
  if ((Subtarget->hasAVX512())) {
3089
0
    return fastEmitInst_r(X86::VCVTSD2USIZrr_Int, &X86::GR32RegClass, Op0, Op0IsKill);
3090
0
  }
3091
0
  return 0;
3092
0
}
3093
3094
0
unsigned fastEmit_X86ISD_CVTS2UI_MVT_v2f64_MVT_i64_r(unsigned Op0, bool Op0IsKill) {
3095
0
  if ((Subtarget->hasAVX512())) {
3096
0
    return fastEmitInst_r(X86::VCVTSD2USI64Zrr_Int, &X86::GR64RegClass, Op0, Op0IsKill);
3097
0
  }
3098
0
  return 0;
3099
0
}
3100
3101
unsigned fastEmit_X86ISD_CVTS2UI_MVT_v2f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3102
switch (RetVT.SimpleTy) {
3103
  case MVT::i32: return fastEmit_X86ISD_CVTS2UI_MVT_v2f64_MVT_i32_r(Op0, Op0IsKill);
3104
  case MVT::i64: return fastEmit_X86ISD_CVTS2UI_MVT_v2f64_MVT_i64_r(Op0, Op0IsKill);
3105
  default: return 0;
3106
}
3107
}
3108
3109
unsigned fastEmit_X86ISD_CVTS2UI_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
3110
  switch (VT.SimpleTy) {
3111
  case MVT::v4f32: return fastEmit_X86ISD_CVTS2UI_MVT_v4f32_r(RetVT, Op0, Op0IsKill);
3112
  case MVT::v2f64: return fastEmit_X86ISD_CVTS2UI_MVT_v2f64_r(RetVT, Op0, Op0IsKill);
3113
  default: return 0;
3114
  }
3115
}
3116
3117
// FastEmit functions for X86ISD::CVTSI2P.
3118
3119
0
unsigned fastEmit_X86ISD_CVTSI2P_MVT_v4i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3120
0
  if (RetVT.SimpleTy != MVT::v2f64)
3121
0
    return 0;
3122
0
  if ((Subtarget->hasVLX())) {
3123
0
    return fastEmitInst_r(X86::VCVTDQ2PDZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
3124
0
  }
3125
0
  if ((Subtarget->hasSSE2() && !Subtarget->hasAVX())) {
3126
0
    return fastEmitInst_r(X86::CVTDQ2PDrr, &X86::VR128RegClass, Op0, Op0IsKill);
3127
0
  }
3128
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
3129
0
    return fastEmitInst_r(X86::VCVTDQ2PDrr, &X86::VR128RegClass, Op0, Op0IsKill);
3130
0
  }
3131
0
  return 0;
3132
0
}
3133
3134
0
unsigned fastEmit_X86ISD_CVTSI2P_MVT_v2i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3135
0
  if (RetVT.SimpleTy != MVT::v4f32)
3136
0
    return 0;
3137
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
3138
0
    return fastEmitInst_r(X86::VCVTQQ2PSZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
3139
0
  }
3140
0
  return 0;
3141
0
}
3142
3143
unsigned fastEmit_X86ISD_CVTSI2P_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
3144
  switch (VT.SimpleTy) {
3145
  case MVT::v4i32: return fastEmit_X86ISD_CVTSI2P_MVT_v4i32_r(RetVT, Op0, Op0IsKill);
3146
  case MVT::v2i64: return fastEmit_X86ISD_CVTSI2P_MVT_v2i64_r(RetVT, Op0, Op0IsKill);
3147
  default: return 0;
3148
  }
3149
}
3150
3151
// FastEmit functions for X86ISD::CVTTP2SI.
3152
3153
0
unsigned fastEmit_X86ISD_CVTTP2SI_MVT_v4f32_MVT_v4i32_r(unsigned Op0, bool Op0IsKill) {
3154
0
  if ((Subtarget->hasVLX())) {
3155
0
    return fastEmitInst_r(X86::VCVTTPS2DQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
3156
0
  }
3157
0
  if ((Subtarget->hasSSE2() && !Subtarget->hasAVX())) {
3158
0
    return fastEmitInst_r(X86::CVTTPS2DQrr, &X86::VR128RegClass, Op0, Op0IsKill);
3159
0
  }
3160
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
3161
0
    return fastEmitInst_r(X86::VCVTTPS2DQrr, &X86::VR128RegClass, Op0, Op0IsKill);
3162
0
  }
3163
0
  return 0;
3164
0
}
3165
3166
0
unsigned fastEmit_X86ISD_CVTTP2SI_MVT_v4f32_MVT_v2i64_r(unsigned Op0, bool Op0IsKill) {
3167
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
3168
0
    return fastEmitInst_r(X86::VCVTTPS2QQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
3169
0
  }
3170
0
  return 0;
3171
0
}
3172
3173
0
unsigned fastEmit_X86ISD_CVTTP2SI_MVT_v4f32_MVT_v4i64_r(unsigned Op0, bool Op0IsKill) {
3174
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
3175
0
    return fastEmitInst_r(X86::VCVTTPS2QQZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
3176
0
  }
3177
0
  return 0;
3178
0
}
3179
3180
unsigned fastEmit_X86ISD_CVTTP2SI_MVT_v4f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3181
switch (RetVT.SimpleTy) {
3182
  case MVT::v4i32: return fastEmit_X86ISD_CVTTP2SI_MVT_v4f32_MVT_v4i32_r(Op0, Op0IsKill);
3183
  case MVT::v2i64: return fastEmit_X86ISD_CVTTP2SI_MVT_v4f32_MVT_v2i64_r(Op0, Op0IsKill);
3184
  case MVT::v4i64: return fastEmit_X86ISD_CVTTP2SI_MVT_v4f32_MVT_v4i64_r(Op0, Op0IsKill);
3185
  default: return 0;
3186
}
3187
}
3188
3189
0
unsigned fastEmit_X86ISD_CVTTP2SI_MVT_v8f32_MVT_v8i32_r(unsigned Op0, bool Op0IsKill) {
3190
0
  if ((Subtarget->hasVLX())) {
3191
0
    return fastEmitInst_r(X86::VCVTTPS2DQZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
3192
0
  }
3193
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
3194
0
    return fastEmitInst_r(X86::VCVTTPS2DQYrr, &X86::VR256RegClass, Op0, Op0IsKill);
3195
0
  }
3196
0
  return 0;
3197
0
}
3198
3199
0
unsigned fastEmit_X86ISD_CVTTP2SI_MVT_v8f32_MVT_v8i64_r(unsigned Op0, bool Op0IsKill) {
3200
0
  if ((Subtarget->hasDQI())) {
3201
0
    return fastEmitInst_r(X86::VCVTTPS2QQZrr, &X86::VR512RegClass, Op0, Op0IsKill);
3202
0
  }
3203
0
  return 0;
3204
0
}
3205
3206
unsigned fastEmit_X86ISD_CVTTP2SI_MVT_v8f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3207
switch (RetVT.SimpleTy) {
3208
  case MVT::v8i32: return fastEmit_X86ISD_CVTTP2SI_MVT_v8f32_MVT_v8i32_r(Op0, Op0IsKill);
3209
  case MVT::v8i64: return fastEmit_X86ISD_CVTTP2SI_MVT_v8f32_MVT_v8i64_r(Op0, Op0IsKill);
3210
  default: return 0;
3211
}
3212
}
3213
3214
0
unsigned fastEmit_X86ISD_CVTTP2SI_MVT_v16f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3215
0
  if (RetVT.SimpleTy != MVT::v16i32)
3216
0
    return 0;
3217
0
  if ((Subtarget->hasAVX512())) {
3218
0
    return fastEmitInst_r(X86::VCVTTPS2DQZrr, &X86::VR512RegClass, Op0, Op0IsKill);
3219
0
  }
3220
0
  return 0;
3221
0
}
3222
3223
0
unsigned fastEmit_X86ISD_CVTTP2SI_MVT_v2f64_MVT_v4i32_r(unsigned Op0, bool Op0IsKill) {
3224
0
  if ((Subtarget->hasVLX())) {
3225
0
    return fastEmitInst_r(X86::VCVTTPD2DQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
3226
0
  }
3227
0
  if ((Subtarget->hasSSE2() && !Subtarget->hasAVX())) {
3228
0
    return fastEmitInst_r(X86::CVTTPD2DQrr, &X86::VR128RegClass, Op0, Op0IsKill);
3229
0
  }
3230
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
3231
0
    return fastEmitInst_r(X86::VCVTTPD2DQrr, &X86::VR128RegClass, Op0, Op0IsKill);
3232
0
  }
3233
0
  return 0;
3234
0
}
3235
3236
0
unsigned fastEmit_X86ISD_CVTTP2SI_MVT_v2f64_MVT_v2i64_r(unsigned Op0, bool Op0IsKill) {
3237
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
3238
0
    return fastEmitInst_r(X86::VCVTTPD2QQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
3239
0
  }
3240
0
  return 0;
3241
0
}
3242
3243
unsigned fastEmit_X86ISD_CVTTP2SI_MVT_v2f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3244
switch (RetVT.SimpleTy) {
3245
  case MVT::v4i32: return fastEmit_X86ISD_CVTTP2SI_MVT_v2f64_MVT_v4i32_r(Op0, Op0IsKill);
3246
  case MVT::v2i64: return fastEmit_X86ISD_CVTTP2SI_MVT_v2f64_MVT_v2i64_r(Op0, Op0IsKill);
3247
  default: return 0;
3248
}
3249
}
3250
3251
0
unsigned fastEmit_X86ISD_CVTTP2SI_MVT_v4f64_MVT_v4i32_r(unsigned Op0, bool Op0IsKill) {
3252
0
  if ((Subtarget->hasVLX())) {
3253
0
    return fastEmitInst_r(X86::VCVTTPD2DQZ256rr, &X86::VR128XRegClass, Op0, Op0IsKill);
3254
0
  }
3255
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
3256
0
    return fastEmitInst_r(X86::VCVTTPD2DQYrr, &X86::VR128RegClass, Op0, Op0IsKill);
3257
0
  }
3258
0
  return 0;
3259
0
}
3260
3261
0
unsigned fastEmit_X86ISD_CVTTP2SI_MVT_v4f64_MVT_v4i64_r(unsigned Op0, bool Op0IsKill) {
3262
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
3263
0
    return fastEmitInst_r(X86::VCVTTPD2QQZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
3264
0
  }
3265
0
  return 0;
3266
0
}
3267
3268
unsigned fastEmit_X86ISD_CVTTP2SI_MVT_v4f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3269
switch (RetVT.SimpleTy) {
3270
  case MVT::v4i32: return fastEmit_X86ISD_CVTTP2SI_MVT_v4f64_MVT_v4i32_r(Op0, Op0IsKill);
3271
  case MVT::v4i64: return fastEmit_X86ISD_CVTTP2SI_MVT_v4f64_MVT_v4i64_r(Op0, Op0IsKill);
3272
  default: return 0;
3273
}
3274
}
3275
3276
0
unsigned fastEmit_X86ISD_CVTTP2SI_MVT_v8f64_MVT_v8i32_r(unsigned Op0, bool Op0IsKill) {
3277
0
  if ((Subtarget->hasAVX512())) {
3278
0
    return fastEmitInst_r(X86::VCVTTPD2DQZrr, &X86::VR256XRegClass, Op0, Op0IsKill);
3279
0
  }
3280
0
  return 0;
3281
0
}
3282
3283
0
unsigned fastEmit_X86ISD_CVTTP2SI_MVT_v8f64_MVT_v8i64_r(unsigned Op0, bool Op0IsKill) {
3284
0
  if ((Subtarget->hasDQI())) {
3285
0
    return fastEmitInst_r(X86::VCVTTPD2QQZrr, &X86::VR512RegClass, Op0, Op0IsKill);
3286
0
  }
3287
0
  return 0;
3288
0
}
3289
3290
unsigned fastEmit_X86ISD_CVTTP2SI_MVT_v8f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3291
switch (RetVT.SimpleTy) {
3292
  case MVT::v8i32: return fastEmit_X86ISD_CVTTP2SI_MVT_v8f64_MVT_v8i32_r(Op0, Op0IsKill);
3293
  case MVT::v8i64: return fastEmit_X86ISD_CVTTP2SI_MVT_v8f64_MVT_v8i64_r(Op0, Op0IsKill);
3294
  default: return 0;
3295
}
3296
}
3297
3298
unsigned fastEmit_X86ISD_CVTTP2SI_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
3299
  switch (VT.SimpleTy) {
3300
  case MVT::v4f32: return fastEmit_X86ISD_CVTTP2SI_MVT_v4f32_r(RetVT, Op0, Op0IsKill);
3301
  case MVT::v8f32: return fastEmit_X86ISD_CVTTP2SI_MVT_v8f32_r(RetVT, Op0, Op0IsKill);
3302
  case MVT::v16f32: return fastEmit_X86ISD_CVTTP2SI_MVT_v16f32_r(RetVT, Op0, Op0IsKill);
3303
  case MVT::v2f64: return fastEmit_X86ISD_CVTTP2SI_MVT_v2f64_r(RetVT, Op0, Op0IsKill);
3304
  case MVT::v4f64: return fastEmit_X86ISD_CVTTP2SI_MVT_v4f64_r(RetVT, Op0, Op0IsKill);
3305
  case MVT::v8f64: return fastEmit_X86ISD_CVTTP2SI_MVT_v8f64_r(RetVT, Op0, Op0IsKill);
3306
  default: return 0;
3307
  }
3308
}
3309
3310
// FastEmit functions for X86ISD::CVTTP2UI.
3311
3312
0
unsigned fastEmit_X86ISD_CVTTP2UI_MVT_v4f32_MVT_v4i32_r(unsigned Op0, bool Op0IsKill) {
3313
0
  if ((Subtarget->hasVLX())) {
3314
0
    return fastEmitInst_r(X86::VCVTTPS2UDQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
3315
0
  }
3316
0
  return 0;
3317
0
}
3318
3319
0
unsigned fastEmit_X86ISD_CVTTP2UI_MVT_v4f32_MVT_v2i64_r(unsigned Op0, bool Op0IsKill) {
3320
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
3321
0
    return fastEmitInst_r(X86::VCVTTPS2UQQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
3322
0
  }
3323
0
  return 0;
3324
0
}
3325
3326
0
unsigned fastEmit_X86ISD_CVTTP2UI_MVT_v4f32_MVT_v4i64_r(unsigned Op0, bool Op0IsKill) {
3327
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
3328
0
    return fastEmitInst_r(X86::VCVTTPS2UQQZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
3329
0
  }
3330
0
  return 0;
3331
0
}
3332
3333
unsigned fastEmit_X86ISD_CVTTP2UI_MVT_v4f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3334
switch (RetVT.SimpleTy) {
3335
  case MVT::v4i32: return fastEmit_X86ISD_CVTTP2UI_MVT_v4f32_MVT_v4i32_r(Op0, Op0IsKill);
3336
  case MVT::v2i64: return fastEmit_X86ISD_CVTTP2UI_MVT_v4f32_MVT_v2i64_r(Op0, Op0IsKill);
3337
  case MVT::v4i64: return fastEmit_X86ISD_CVTTP2UI_MVT_v4f32_MVT_v4i64_r(Op0, Op0IsKill);
3338
  default: return 0;
3339
}
3340
}
3341
3342
0
unsigned fastEmit_X86ISD_CVTTP2UI_MVT_v8f32_MVT_v8i32_r(unsigned Op0, bool Op0IsKill) {
3343
0
  if ((Subtarget->hasVLX())) {
3344
0
    return fastEmitInst_r(X86::VCVTTPS2UDQZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
3345
0
  }
3346
0
  return 0;
3347
0
}
3348
3349
0
unsigned fastEmit_X86ISD_CVTTP2UI_MVT_v8f32_MVT_v8i64_r(unsigned Op0, bool Op0IsKill) {
3350
0
  if ((Subtarget->hasDQI())) {
3351
0
    return fastEmitInst_r(X86::VCVTTPS2UQQZrr, &X86::VR512RegClass, Op0, Op0IsKill);
3352
0
  }
3353
0
  return 0;
3354
0
}
3355
3356
unsigned fastEmit_X86ISD_CVTTP2UI_MVT_v8f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3357
switch (RetVT.SimpleTy) {
3358
  case MVT::v8i32: return fastEmit_X86ISD_CVTTP2UI_MVT_v8f32_MVT_v8i32_r(Op0, Op0IsKill);
3359
  case MVT::v8i64: return fastEmit_X86ISD_CVTTP2UI_MVT_v8f32_MVT_v8i64_r(Op0, Op0IsKill);
3360
  default: return 0;
3361
}
3362
}
3363
3364
0
unsigned fastEmit_X86ISD_CVTTP2UI_MVT_v16f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3365
0
  if (RetVT.SimpleTy != MVT::v16i32)
3366
0
    return 0;
3367
0
  if ((Subtarget->hasAVX512())) {
3368
0
    return fastEmitInst_r(X86::VCVTTPS2UDQZrr, &X86::VR512RegClass, Op0, Op0IsKill);
3369
0
  }
3370
0
  return 0;
3371
0
}
3372
3373
0
unsigned fastEmit_X86ISD_CVTTP2UI_MVT_v2f64_MVT_v4i32_r(unsigned Op0, bool Op0IsKill) {
3374
0
  if ((Subtarget->hasVLX())) {
3375
0
    return fastEmitInst_r(X86::VCVTTPD2UDQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
3376
0
  }
3377
0
  return 0;
3378
0
}
3379
3380
0
unsigned fastEmit_X86ISD_CVTTP2UI_MVT_v2f64_MVT_v2i64_r(unsigned Op0, bool Op0IsKill) {
3381
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
3382
0
    return fastEmitInst_r(X86::VCVTTPD2UQQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
3383
0
  }
3384
0
  return 0;
3385
0
}
3386
3387
unsigned fastEmit_X86ISD_CVTTP2UI_MVT_v2f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3388
switch (RetVT.SimpleTy) {
3389
  case MVT::v4i32: return fastEmit_X86ISD_CVTTP2UI_MVT_v2f64_MVT_v4i32_r(Op0, Op0IsKill);
3390
  case MVT::v2i64: return fastEmit_X86ISD_CVTTP2UI_MVT_v2f64_MVT_v2i64_r(Op0, Op0IsKill);
3391
  default: return 0;
3392
}
3393
}
3394
3395
0
unsigned fastEmit_X86ISD_CVTTP2UI_MVT_v4f64_MVT_v4i32_r(unsigned Op0, bool Op0IsKill) {
3396
0
  if ((Subtarget->hasVLX())) {
3397
0
    return fastEmitInst_r(X86::VCVTTPD2UDQZ256rr, &X86::VR128XRegClass, Op0, Op0IsKill);
3398
0
  }
3399
0
  return 0;
3400
0
}
3401
3402
0
unsigned fastEmit_X86ISD_CVTTP2UI_MVT_v4f64_MVT_v4i64_r(unsigned Op0, bool Op0IsKill) {
3403
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
3404
0
    return fastEmitInst_r(X86::VCVTTPD2UQQZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
3405
0
  }
3406
0
  return 0;
3407
0
}
3408
3409
unsigned fastEmit_X86ISD_CVTTP2UI_MVT_v4f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3410
switch (RetVT.SimpleTy) {
3411
  case MVT::v4i32: return fastEmit_X86ISD_CVTTP2UI_MVT_v4f64_MVT_v4i32_r(Op0, Op0IsKill);
3412
  case MVT::v4i64: return fastEmit_X86ISD_CVTTP2UI_MVT_v4f64_MVT_v4i64_r(Op0, Op0IsKill);
3413
  default: return 0;
3414
}
3415
}
3416
3417
0
unsigned fastEmit_X86ISD_CVTTP2UI_MVT_v8f64_MVT_v8i32_r(unsigned Op0, bool Op0IsKill) {
3418
0
  if ((Subtarget->hasAVX512())) {
3419
0
    return fastEmitInst_r(X86::VCVTTPD2UDQZrr, &X86::VR256XRegClass, Op0, Op0IsKill);
3420
0
  }
3421
0
  return 0;
3422
0
}
3423
3424
0
unsigned fastEmit_X86ISD_CVTTP2UI_MVT_v8f64_MVT_v8i64_r(unsigned Op0, bool Op0IsKill) {
3425
0
  if ((Subtarget->hasDQI())) {
3426
0
    return fastEmitInst_r(X86::VCVTTPD2UQQZrr, &X86::VR512RegClass, Op0, Op0IsKill);
3427
0
  }
3428
0
  return 0;
3429
0
}
3430
3431
unsigned fastEmit_X86ISD_CVTTP2UI_MVT_v8f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3432
switch (RetVT.SimpleTy) {
3433
  case MVT::v8i32: return fastEmit_X86ISD_CVTTP2UI_MVT_v8f64_MVT_v8i32_r(Op0, Op0IsKill);
3434
  case MVT::v8i64: return fastEmit_X86ISD_CVTTP2UI_MVT_v8f64_MVT_v8i64_r(Op0, Op0IsKill);
3435
  default: return 0;
3436
}
3437
}
3438
3439
unsigned fastEmit_X86ISD_CVTTP2UI_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
3440
  switch (VT.SimpleTy) {
3441
  case MVT::v4f32: return fastEmit_X86ISD_CVTTP2UI_MVT_v4f32_r(RetVT, Op0, Op0IsKill);
3442
  case MVT::v8f32: return fastEmit_X86ISD_CVTTP2UI_MVT_v8f32_r(RetVT, Op0, Op0IsKill);
3443
  case MVT::v16f32: return fastEmit_X86ISD_CVTTP2UI_MVT_v16f32_r(RetVT, Op0, Op0IsKill);
3444
  case MVT::v2f64: return fastEmit_X86ISD_CVTTP2UI_MVT_v2f64_r(RetVT, Op0, Op0IsKill);
3445
  case MVT::v4f64: return fastEmit_X86ISD_CVTTP2UI_MVT_v4f64_r(RetVT, Op0, Op0IsKill);
3446
  case MVT::v8f64: return fastEmit_X86ISD_CVTTP2UI_MVT_v8f64_r(RetVT, Op0, Op0IsKill);
3447
  default: return 0;
3448
  }
3449
}
3450
3451
// FastEmit functions for X86ISD::CVTTS2SI.
3452
3453
0
unsigned fastEmit_X86ISD_CVTTS2SI_MVT_v4f32_MVT_i32_r(unsigned Op0, bool Op0IsKill) {
3454
0
  if ((Subtarget->hasAVX512())) {
3455
0
    return fastEmitInst_r(X86::VCVTTSS2SIZrr_Int, &X86::GR32RegClass, Op0, Op0IsKill);
3456
0
  }
3457
0
  if ((Subtarget->hasSSE1() && !Subtarget->hasAVX())) {
3458
0
    return fastEmitInst_r(X86::CVTTSS2SIrr_Int, &X86::GR32RegClass, Op0, Op0IsKill);
3459
0
  }
3460
0
  if ((Subtarget->hasAVX() && !Subtarget->hasAVX512())) {
3461
0
    return fastEmitInst_r(X86::VCVTTSS2SIrr_Int, &X86::GR32RegClass, Op0, Op0IsKill);
3462
0
  }
3463
0
  return 0;
3464
0
}
3465
3466
0
unsigned fastEmit_X86ISD_CVTTS2SI_MVT_v4f32_MVT_i64_r(unsigned Op0, bool Op0IsKill) {
3467
0
  if ((Subtarget->hasAVX512())) {
3468
0
    return fastEmitInst_r(X86::VCVTTSS2SI64Zrr_Int, &X86::GR64RegClass, Op0, Op0IsKill);
3469
0
  }
3470
0
  if ((Subtarget->hasSSE1() && !Subtarget->hasAVX())) {
3471
0
    return fastEmitInst_r(X86::CVTTSS2SI64rr_Int, &X86::GR64RegClass, Op0, Op0IsKill);
3472
0
  }
3473
0
  if ((Subtarget->hasAVX() && !Subtarget->hasAVX512())) {
3474
0
    return fastEmitInst_r(X86::VCVTTSS2SI64rr_Int, &X86::GR64RegClass, Op0, Op0IsKill);
3475
0
  }
3476
0
  return 0;
3477
0
}
3478
3479
unsigned fastEmit_X86ISD_CVTTS2SI_MVT_v4f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3480
switch (RetVT.SimpleTy) {
3481
  case MVT::i32: return fastEmit_X86ISD_CVTTS2SI_MVT_v4f32_MVT_i32_r(Op0, Op0IsKill);
3482
  case MVT::i64: return fastEmit_X86ISD_CVTTS2SI_MVT_v4f32_MVT_i64_r(Op0, Op0IsKill);
3483
  default: return 0;
3484
}
3485
}
3486
3487
0
unsigned fastEmit_X86ISD_CVTTS2SI_MVT_v2f64_MVT_i32_r(unsigned Op0, bool Op0IsKill) {
3488
0
  if ((Subtarget->hasAVX512())) {
3489
0
    return fastEmitInst_r(X86::VCVTTSD2SIZrr_Int, &X86::GR32RegClass, Op0, Op0IsKill);
3490
0
  }
3491
0
  if ((Subtarget->hasSSE2() && !Subtarget->hasAVX())) {
3492
0
    return fastEmitInst_r(X86::CVTTSD2SIrr_Int, &X86::GR32RegClass, Op0, Op0IsKill);
3493
0
  }
3494
0
  if ((Subtarget->hasAVX() && !Subtarget->hasAVX512())) {
3495
0
    return fastEmitInst_r(X86::VCVTTSD2SIrr_Int, &X86::GR32RegClass, Op0, Op0IsKill);
3496
0
  }
3497
0
  return 0;
3498
0
}
3499
3500
0
unsigned fastEmit_X86ISD_CVTTS2SI_MVT_v2f64_MVT_i64_r(unsigned Op0, bool Op0IsKill) {
3501
0
  if ((Subtarget->hasAVX512())) {
3502
0
    return fastEmitInst_r(X86::VCVTTSD2SI64Zrr_Int, &X86::GR64RegClass, Op0, Op0IsKill);
3503
0
  }
3504
0
  if ((Subtarget->hasSSE2() && !Subtarget->hasAVX())) {
3505
0
    return fastEmitInst_r(X86::CVTTSD2SI64rr_Int, &X86::GR64RegClass, Op0, Op0IsKill);
3506
0
  }
3507
0
  if ((Subtarget->hasAVX() && !Subtarget->hasAVX512())) {
3508
0
    return fastEmitInst_r(X86::VCVTTSD2SI64rr_Int, &X86::GR64RegClass, Op0, Op0IsKill);
3509
0
  }
3510
0
  return 0;
3511
0
}
3512
3513
unsigned fastEmit_X86ISD_CVTTS2SI_MVT_v2f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3514
switch (RetVT.SimpleTy) {
3515
  case MVT::i32: return fastEmit_X86ISD_CVTTS2SI_MVT_v2f64_MVT_i32_r(Op0, Op0IsKill);
3516
  case MVT::i64: return fastEmit_X86ISD_CVTTS2SI_MVT_v2f64_MVT_i64_r(Op0, Op0IsKill);
3517
  default: return 0;
3518
}
3519
}
3520
3521
unsigned fastEmit_X86ISD_CVTTS2SI_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
3522
  switch (VT.SimpleTy) {
3523
  case MVT::v4f32: return fastEmit_X86ISD_CVTTS2SI_MVT_v4f32_r(RetVT, Op0, Op0IsKill);
3524
  case MVT::v2f64: return fastEmit_X86ISD_CVTTS2SI_MVT_v2f64_r(RetVT, Op0, Op0IsKill);
3525
  default: return 0;
3526
  }
3527
}
3528
3529
// FastEmit functions for X86ISD::CVTTS2UI.
3530
3531
0
unsigned fastEmit_X86ISD_CVTTS2UI_MVT_v4f32_MVT_i32_r(unsigned Op0, bool Op0IsKill) {
3532
0
  if ((Subtarget->hasAVX512())) {
3533
0
    return fastEmitInst_r(X86::VCVTTSS2USIZrr_Int, &X86::GR32RegClass, Op0, Op0IsKill);
3534
0
  }
3535
0
  return 0;
3536
0
}
3537
3538
0
unsigned fastEmit_X86ISD_CVTTS2UI_MVT_v4f32_MVT_i64_r(unsigned Op0, bool Op0IsKill) {
3539
0
  if ((Subtarget->hasAVX512())) {
3540
0
    return fastEmitInst_r(X86::VCVTTSS2USI64Zrr_Int, &X86::GR64RegClass, Op0, Op0IsKill);
3541
0
  }
3542
0
  return 0;
3543
0
}
3544
3545
unsigned fastEmit_X86ISD_CVTTS2UI_MVT_v4f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3546
switch (RetVT.SimpleTy) {
3547
  case MVT::i32: return fastEmit_X86ISD_CVTTS2UI_MVT_v4f32_MVT_i32_r(Op0, Op0IsKill);
3548
  case MVT::i64: return fastEmit_X86ISD_CVTTS2UI_MVT_v4f32_MVT_i64_r(Op0, Op0IsKill);
3549
  default: return 0;
3550
}
3551
}
3552
3553
0
unsigned fastEmit_X86ISD_CVTTS2UI_MVT_v2f64_MVT_i32_r(unsigned Op0, bool Op0IsKill) {
3554
0
  if ((Subtarget->hasAVX512())) {
3555
0
    return fastEmitInst_r(X86::VCVTTSD2USIZrr_Int, &X86::GR32RegClass, Op0, Op0IsKill);
3556
0
  }
3557
0
  return 0;
3558
0
}
3559
3560
0
unsigned fastEmit_X86ISD_CVTTS2UI_MVT_v2f64_MVT_i64_r(unsigned Op0, bool Op0IsKill) {
3561
0
  if ((Subtarget->hasAVX512())) {
3562
0
    return fastEmitInst_r(X86::VCVTTSD2USI64Zrr_Int, &X86::GR64RegClass, Op0, Op0IsKill);
3563
0
  }
3564
0
  return 0;
3565
0
}
3566
3567
unsigned fastEmit_X86ISD_CVTTS2UI_MVT_v2f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3568
switch (RetVT.SimpleTy) {
3569
  case MVT::i32: return fastEmit_X86ISD_CVTTS2UI_MVT_v2f64_MVT_i32_r(Op0, Op0IsKill);
3570
  case MVT::i64: return fastEmit_X86ISD_CVTTS2UI_MVT_v2f64_MVT_i64_r(Op0, Op0IsKill);
3571
  default: return 0;
3572
}
3573
}
3574
3575
unsigned fastEmit_X86ISD_CVTTS2UI_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
3576
  switch (VT.SimpleTy) {
3577
  case MVT::v4f32: return fastEmit_X86ISD_CVTTS2UI_MVT_v4f32_r(RetVT, Op0, Op0IsKill);
3578
  case MVT::v2f64: return fastEmit_X86ISD_CVTTS2UI_MVT_v2f64_r(RetVT, Op0, Op0IsKill);
3579
  default: return 0;
3580
  }
3581
}
3582
3583
// FastEmit functions for X86ISD::CVTUI2P.
3584
3585
0
unsigned fastEmit_X86ISD_CVTUI2P_MVT_v4i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3586
0
  if (RetVT.SimpleTy != MVT::v2f64)
3587
0
    return 0;
3588
0
  if ((Subtarget->hasVLX())) {
3589
0
    return fastEmitInst_r(X86::VCVTUDQ2PDZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
3590
0
  }
3591
0
  return 0;
3592
0
}
3593
3594
0
unsigned fastEmit_X86ISD_CVTUI2P_MVT_v2i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3595
0
  if (RetVT.SimpleTy != MVT::v4f32)
3596
0
    return 0;
3597
0
  if ((Subtarget->hasDQI()) && (Subtarget->hasVLX())) {
3598
0
    return fastEmitInst_r(X86::VCVTUQQ2PSZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
3599
0
  }
3600
0
  return 0;
3601
0
}
3602
3603
unsigned fastEmit_X86ISD_CVTUI2P_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
3604
  switch (VT.SimpleTy) {
3605
  case MVT::v4i32: return fastEmit_X86ISD_CVTUI2P_MVT_v4i32_r(RetVT, Op0, Op0IsKill);
3606
  case MVT::v2i64: return fastEmit_X86ISD_CVTUI2P_MVT_v2i64_r(RetVT, Op0, Op0IsKill);
3607
  default: return 0;
3608
  }
3609
}
3610
3611
// FastEmit functions for X86ISD::EH_RETURN.
3612
3613
0
unsigned fastEmit_X86ISD_EH_RETURN_MVT_i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3614
0
  if (RetVT.SimpleTy != MVT::isVoid)
3615
0
    return 0;
3616
0
  return fastEmitInst_r(X86::EH_RETURN, &X86::GR32RegClass, Op0, Op0IsKill);
3617
0
}
3618
3619
0
unsigned fastEmit_X86ISD_EH_RETURN_MVT_i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3620
0
  if (RetVT.SimpleTy != MVT::isVoid)
3621
0
    return 0;
3622
0
  return fastEmitInst_r(X86::EH_RETURN64, &X86::GR64RegClass, Op0, Op0IsKill);
3623
0
}
3624
3625
unsigned fastEmit_X86ISD_EH_RETURN_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
3626
  switch (VT.SimpleTy) {
3627
  case MVT::i32: return fastEmit_X86ISD_EH_RETURN_MVT_i32_r(RetVT, Op0, Op0IsKill);
3628
  case MVT::i64: return fastEmit_X86ISD_EH_RETURN_MVT_i64_r(RetVT, Op0, Op0IsKill);
3629
  default: return 0;
3630
  }
3631
}
3632
3633
// FastEmit functions for X86ISD::EXPAND.
3634
3635
0
unsigned fastEmit_X86ISD_EXPAND_MVT_v16i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3636
0
  if (RetVT.SimpleTy != MVT::v16i8)
3637
0
    return 0;
3638
0
  if ((Subtarget->hasVBMI2()) && (Subtarget->hasVLX())) {
3639
0
    return fastEmitInst_r(X86::VPEXPANDBZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
3640
0
  }
3641
0
  return 0;
3642
0
}
3643
3644
0
unsigned fastEmit_X86ISD_EXPAND_MVT_v32i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3645
0
  if (RetVT.SimpleTy != MVT::v32i8)
3646
0
    return 0;
3647
0
  if ((Subtarget->hasVBMI2()) && (Subtarget->hasVLX())) {
3648
0
    return fastEmitInst_r(X86::VPEXPANDBZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
3649
0
  }
3650
0
  return 0;
3651
0
}
3652
3653
0
unsigned fastEmit_X86ISD_EXPAND_MVT_v64i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3654
0
  if (RetVT.SimpleTy != MVT::v64i8)
3655
0
    return 0;
3656
0
  if ((Subtarget->hasVBMI2())) {
3657
0
    return fastEmitInst_r(X86::VPEXPANDBZrr, &X86::VR512RegClass, Op0, Op0IsKill);
3658
0
  }
3659
0
  return 0;
3660
0
}
3661
3662
0
unsigned fastEmit_X86ISD_EXPAND_MVT_v8i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3663
0
  if (RetVT.SimpleTy != MVT::v8i16)
3664
0
    return 0;
3665
0
  if ((Subtarget->hasVBMI2()) && (Subtarget->hasVLX())) {
3666
0
    return fastEmitInst_r(X86::VPEXPANDWZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
3667
0
  }
3668
0
  return 0;
3669
0
}
3670
3671
0
unsigned fastEmit_X86ISD_EXPAND_MVT_v16i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3672
0
  if (RetVT.SimpleTy != MVT::v16i16)
3673
0
    return 0;
3674
0
  if ((Subtarget->hasVBMI2()) && (Subtarget->hasVLX())) {
3675
0
    return fastEmitInst_r(X86::VPEXPANDWZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
3676
0
  }
3677
0
  return 0;
3678
0
}
3679
3680
0
unsigned fastEmit_X86ISD_EXPAND_MVT_v32i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3681
0
  if (RetVT.SimpleTy != MVT::v32i16)
3682
0
    return 0;
3683
0
  if ((Subtarget->hasVBMI2())) {
3684
0
    return fastEmitInst_r(X86::VPEXPANDWZrr, &X86::VR512RegClass, Op0, Op0IsKill);
3685
0
  }
3686
0
  return 0;
3687
0
}
3688
3689
0
unsigned fastEmit_X86ISD_EXPAND_MVT_v4i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3690
0
  if (RetVT.SimpleTy != MVT::v4i32)
3691
0
    return 0;
3692
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
3693
0
    return fastEmitInst_r(X86::VPEXPANDDZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
3694
0
  }
3695
0
  return 0;
3696
0
}
3697
3698
0
unsigned fastEmit_X86ISD_EXPAND_MVT_v8i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3699
0
  if (RetVT.SimpleTy != MVT::v8i32)
3700
0
    return 0;
3701
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
3702
0
    return fastEmitInst_r(X86::VPEXPANDDZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
3703
0
  }
3704
0
  return 0;
3705
0
}
3706
3707
0
unsigned fastEmit_X86ISD_EXPAND_MVT_v16i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3708
0
  if (RetVT.SimpleTy != MVT::v16i32)
3709
0
    return 0;
3710
0
  if ((Subtarget->hasAVX512())) {
3711
0
    return fastEmitInst_r(X86::VPEXPANDDZrr, &X86::VR512RegClass, Op0, Op0IsKill);
3712
0
  }
3713
0
  return 0;
3714
0
}
3715
3716
0
unsigned fastEmit_X86ISD_EXPAND_MVT_v2i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3717
0
  if (RetVT.SimpleTy != MVT::v2i64)
3718
0
    return 0;
3719
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
3720
0
    return fastEmitInst_r(X86::VPEXPANDQZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
3721
0
  }
3722
0
  return 0;
3723
0
}
3724
3725
0
unsigned fastEmit_X86ISD_EXPAND_MVT_v4i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3726
0
  if (RetVT.SimpleTy != MVT::v4i64)
3727
0
    return 0;
3728
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
3729
0
    return fastEmitInst_r(X86::VPEXPANDQZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
3730
0
  }
3731
0
  return 0;
3732
0
}
3733
3734
0
unsigned fastEmit_X86ISD_EXPAND_MVT_v8i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3735
0
  if (RetVT.SimpleTy != MVT::v8i64)
3736
0
    return 0;
3737
0
  if ((Subtarget->hasAVX512())) {
3738
0
    return fastEmitInst_r(X86::VPEXPANDQZrr, &X86::VR512RegClass, Op0, Op0IsKill);
3739
0
  }
3740
0
  return 0;
3741
0
}
3742
3743
0
unsigned fastEmit_X86ISD_EXPAND_MVT_v4f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3744
0
  if (RetVT.SimpleTy != MVT::v4f32)
3745
0
    return 0;
3746
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
3747
0
    return fastEmitInst_r(X86::VEXPANDPSZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
3748
0
  }
3749
0
  return 0;
3750
0
}
3751
3752
0
unsigned fastEmit_X86ISD_EXPAND_MVT_v8f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3753
0
  if (RetVT.SimpleTy != MVT::v8f32)
3754
0
    return 0;
3755
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
3756
0
    return fastEmitInst_r(X86::VEXPANDPSZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
3757
0
  }
3758
0
  return 0;
3759
0
}
3760
3761
0
unsigned fastEmit_X86ISD_EXPAND_MVT_v16f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3762
0
  if (RetVT.SimpleTy != MVT::v16f32)
3763
0
    return 0;
3764
0
  if ((Subtarget->hasAVX512())) {
3765
0
    return fastEmitInst_r(X86::VEXPANDPSZrr, &X86::VR512RegClass, Op0, Op0IsKill);
3766
0
  }
3767
0
  return 0;
3768
0
}
3769
3770
0
unsigned fastEmit_X86ISD_EXPAND_MVT_v2f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3771
0
  if (RetVT.SimpleTy != MVT::v2f64)
3772
0
    return 0;
3773
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
3774
0
    return fastEmitInst_r(X86::VEXPANDPDZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
3775
0
  }
3776
0
  return 0;
3777
0
}
3778
3779
0
unsigned fastEmit_X86ISD_EXPAND_MVT_v4f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3780
0
  if (RetVT.SimpleTy != MVT::v4f64)
3781
0
    return 0;
3782
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
3783
0
    return fastEmitInst_r(X86::VEXPANDPDZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
3784
0
  }
3785
0
  return 0;
3786
0
}
3787
3788
0
unsigned fastEmit_X86ISD_EXPAND_MVT_v8f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3789
0
  if (RetVT.SimpleTy != MVT::v8f64)
3790
0
    return 0;
3791
0
  if ((Subtarget->hasAVX512())) {
3792
0
    return fastEmitInst_r(X86::VEXPANDPDZrr, &X86::VR512RegClass, Op0, Op0IsKill);
3793
0
  }
3794
0
  return 0;
3795
0
}
3796
3797
unsigned fastEmit_X86ISD_EXPAND_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
3798
  switch (VT.SimpleTy) {
3799
  case MVT::v16i8: return fastEmit_X86ISD_EXPAND_MVT_v16i8_r(RetVT, Op0, Op0IsKill);
3800
  case MVT::v32i8: return fastEmit_X86ISD_EXPAND_MVT_v32i8_r(RetVT, Op0, Op0IsKill);
3801
  case MVT::v64i8: return fastEmit_X86ISD_EXPAND_MVT_v64i8_r(RetVT, Op0, Op0IsKill);
3802
  case MVT::v8i16: return fastEmit_X86ISD_EXPAND_MVT_v8i16_r(RetVT, Op0, Op0IsKill);
3803
  case MVT::v16i16: return fastEmit_X86ISD_EXPAND_MVT_v16i16_r(RetVT, Op0, Op0IsKill);
3804
  case MVT::v32i16: return fastEmit_X86ISD_EXPAND_MVT_v32i16_r(RetVT, Op0, Op0IsKill);
3805
  case MVT::v4i32: return fastEmit_X86ISD_EXPAND_MVT_v4i32_r(RetVT, Op0, Op0IsKill);
3806
  case MVT::v8i32: return fastEmit_X86ISD_EXPAND_MVT_v8i32_r(RetVT, Op0, Op0IsKill);
3807
  case MVT::v16i32: return fastEmit_X86ISD_EXPAND_MVT_v16i32_r(RetVT, Op0, Op0IsKill);
3808
  case MVT::v2i64: return fastEmit_X86ISD_EXPAND_MVT_v2i64_r(RetVT, Op0, Op0IsKill);
3809
  case MVT::v4i64: return fastEmit_X86ISD_EXPAND_MVT_v4i64_r(RetVT, Op0, Op0IsKill);
3810
  case MVT::v8i64: return fastEmit_X86ISD_EXPAND_MVT_v8i64_r(RetVT, Op0, Op0IsKill);
3811
  case MVT::v4f32: return fastEmit_X86ISD_EXPAND_MVT_v4f32_r(RetVT, Op0, Op0IsKill);
3812
  case MVT::v8f32: return fastEmit_X86ISD_EXPAND_MVT_v8f32_r(RetVT, Op0, Op0IsKill);
3813
  case MVT::v16f32: return fastEmit_X86ISD_EXPAND_MVT_v16f32_r(RetVT, Op0, Op0IsKill);
3814
  case MVT::v2f64: return fastEmit_X86ISD_EXPAND_MVT_v2f64_r(RetVT, Op0, Op0IsKill);
3815
  case MVT::v4f64: return fastEmit_X86ISD_EXPAND_MVT_v4f64_r(RetVT, Op0, Op0IsKill);
3816
  case MVT::v8f64: return fastEmit_X86ISD_EXPAND_MVT_v8f64_r(RetVT, Op0, Op0IsKill);
3817
  default: return 0;
3818
  }
3819
}
3820
3821
// FastEmit functions for X86ISD::FRCP.
3822
3823
0
unsigned fastEmit_X86ISD_FRCP_MVT_f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3824
0
  if (RetVT.SimpleTy != MVT::f32)
3825
0
    return 0;
3826
0
  if ((Subtarget->hasSSE1() && !Subtarget->hasAVX())) {
3827
0
    return fastEmitInst_r(X86::RCPSSr, &X86::FR32RegClass, Op0, Op0IsKill);
3828
0
  }
3829
0
  return 0;
3830
0
}
3831
3832
0
unsigned fastEmit_X86ISD_FRCP_MVT_v4f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3833
0
  if (RetVT.SimpleTy != MVT::v4f32)
3834
0
    return 0;
3835
0
  if ((Subtarget->hasSSE1() && !Subtarget->hasAVX())) {
3836
0
    return fastEmitInst_r(X86::RCPPSr, &X86::VR128RegClass, Op0, Op0IsKill);
3837
0
  }
3838
0
  if ((Subtarget->hasAVX())) {
3839
0
    return fastEmitInst_r(X86::VRCPPSr, &X86::VR128RegClass, Op0, Op0IsKill);
3840
0
  }
3841
0
  return 0;
3842
0
}
3843
3844
0
unsigned fastEmit_X86ISD_FRCP_MVT_v8f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3845
0
  if (RetVT.SimpleTy != MVT::v8f32)
3846
0
    return 0;
3847
0
  if ((Subtarget->hasAVX())) {
3848
0
    return fastEmitInst_r(X86::VRCPPSYr, &X86::VR256RegClass, Op0, Op0IsKill);
3849
0
  }
3850
0
  return 0;
3851
0
}
3852
3853
unsigned fastEmit_X86ISD_FRCP_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
3854
  switch (VT.SimpleTy) {
3855
  case MVT::f32: return fastEmit_X86ISD_FRCP_MVT_f32_r(RetVT, Op0, Op0IsKill);
3856
  case MVT::v4f32: return fastEmit_X86ISD_FRCP_MVT_v4f32_r(RetVT, Op0, Op0IsKill);
3857
  case MVT::v8f32: return fastEmit_X86ISD_FRCP_MVT_v8f32_r(RetVT, Op0, Op0IsKill);
3858
  default: return 0;
3859
  }
3860
}
3861
3862
// FastEmit functions for X86ISD::FRSQRT.
3863
3864
0
unsigned fastEmit_X86ISD_FRSQRT_MVT_f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3865
0
  if (RetVT.SimpleTy != MVT::f32)
3866
0
    return 0;
3867
0
  if ((Subtarget->hasSSE1() && !Subtarget->hasAVX())) {
3868
0
    return fastEmitInst_r(X86::RSQRTSSr, &X86::FR32RegClass, Op0, Op0IsKill);
3869
0
  }
3870
0
  return 0;
3871
0
}
3872
3873
0
unsigned fastEmit_X86ISD_FRSQRT_MVT_v4f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3874
0
  if (RetVT.SimpleTy != MVT::v4f32)
3875
0
    return 0;
3876
0
  if ((Subtarget->hasSSE1() && !Subtarget->hasAVX())) {
3877
0
    return fastEmitInst_r(X86::RSQRTPSr, &X86::VR128RegClass, Op0, Op0IsKill);
3878
0
  }
3879
0
  if ((Subtarget->hasAVX())) {
3880
0
    return fastEmitInst_r(X86::VRSQRTPSr, &X86::VR128RegClass, Op0, Op0IsKill);
3881
0
  }
3882
0
  return 0;
3883
0
}
3884
3885
0
unsigned fastEmit_X86ISD_FRSQRT_MVT_v8f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3886
0
  if (RetVT.SimpleTy != MVT::v8f32)
3887
0
    return 0;
3888
0
  if ((Subtarget->hasAVX())) {
3889
0
    return fastEmitInst_r(X86::VRSQRTPSYr, &X86::VR256RegClass, Op0, Op0IsKill);
3890
0
  }
3891
0
  return 0;
3892
0
}
3893
3894
unsigned fastEmit_X86ISD_FRSQRT_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
3895
  switch (VT.SimpleTy) {
3896
  case MVT::f32: return fastEmit_X86ISD_FRSQRT_MVT_f32_r(RetVT, Op0, Op0IsKill);
3897
  case MVT::v4f32: return fastEmit_X86ISD_FRSQRT_MVT_v4f32_r(RetVT, Op0, Op0IsKill);
3898
  case MVT::v8f32: return fastEmit_X86ISD_FRSQRT_MVT_v8f32_r(RetVT, Op0, Op0IsKill);
3899
  default: return 0;
3900
  }
3901
}
3902
3903
// FastEmit functions for X86ISD::MMX_MOVD2W.
3904
3905
0
unsigned fastEmit_X86ISD_MMX_MOVD2W_MVT_x86mmx_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3906
0
  if (RetVT.SimpleTy != MVT::i32)
3907
0
    return 0;
3908
0
  if ((Subtarget->hasMMX())) {
3909
0
    return fastEmitInst_r(X86::MMX_MOVD64grr, &X86::GR32RegClass, Op0, Op0IsKill);
3910
0
  }
3911
0
  return 0;
3912
0
}
3913
3914
unsigned fastEmit_X86ISD_MMX_MOVD2W_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
3915
  switch (VT.SimpleTy) {
3916
  case MVT::x86mmx: return fastEmit_X86ISD_MMX_MOVD2W_MVT_x86mmx_r(RetVT, Op0, Op0IsKill);
3917
  default: return 0;
3918
  }
3919
}
3920
3921
// FastEmit functions for X86ISD::MMX_MOVW2D.
3922
3923
0
unsigned fastEmit_X86ISD_MMX_MOVW2D_MVT_i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3924
0
  if (RetVT.SimpleTy != MVT::x86mmx)
3925
0
    return 0;
3926
0
  if ((Subtarget->hasMMX())) {
3927
0
    return fastEmitInst_r(X86::MMX_MOVD64rr, &X86::VR64RegClass, Op0, Op0IsKill);
3928
0
  }
3929
0
  return 0;
3930
0
}
3931
3932
unsigned fastEmit_X86ISD_MMX_MOVW2D_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
3933
  switch (VT.SimpleTy) {
3934
  case MVT::i32: return fastEmit_X86ISD_MMX_MOVW2D_MVT_i32_r(RetVT, Op0, Op0IsKill);
3935
  default: return 0;
3936
  }
3937
}
3938
3939
// FastEmit functions for X86ISD::MOVDDUP.
3940
3941
0
unsigned fastEmit_X86ISD_MOVDDUP_MVT_v2f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3942
0
  if (RetVT.SimpleTy != MVT::v2f64)
3943
0
    return 0;
3944
0
  if ((Subtarget->hasSSE3() && !Subtarget->hasAVX())) {
3945
0
    return fastEmitInst_r(X86::MOVDDUPrr, &X86::VR128RegClass, Op0, Op0IsKill);
3946
0
  }
3947
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
3948
0
    return fastEmitInst_r(X86::VMOVDDUPrr, &X86::VR128RegClass, Op0, Op0IsKill);
3949
0
  }
3950
0
  return 0;
3951
0
}
3952
3953
0
unsigned fastEmit_X86ISD_MOVDDUP_MVT_v4f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3954
0
  if (RetVT.SimpleTy != MVT::v4f64)
3955
0
    return 0;
3956
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
3957
0
    return fastEmitInst_r(X86::VMOVDDUPZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
3958
0
  }
3959
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
3960
0
    return fastEmitInst_r(X86::VMOVDDUPYrr, &X86::VR256RegClass, Op0, Op0IsKill);
3961
0
  }
3962
0
  return 0;
3963
0
}
3964
3965
0
unsigned fastEmit_X86ISD_MOVDDUP_MVT_v8f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3966
0
  if (RetVT.SimpleTy != MVT::v8f64)
3967
0
    return 0;
3968
0
  if ((Subtarget->hasAVX512())) {
3969
0
    return fastEmitInst_r(X86::VMOVDDUPZrr, &X86::VR512RegClass, Op0, Op0IsKill);
3970
0
  }
3971
0
  return 0;
3972
0
}
3973
3974
unsigned fastEmit_X86ISD_MOVDDUP_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
3975
  switch (VT.SimpleTy) {
3976
  case MVT::v2f64: return fastEmit_X86ISD_MOVDDUP_MVT_v2f64_r(RetVT, Op0, Op0IsKill);
3977
  case MVT::v4f64: return fastEmit_X86ISD_MOVDDUP_MVT_v4f64_r(RetVT, Op0, Op0IsKill);
3978
  case MVT::v8f64: return fastEmit_X86ISD_MOVDDUP_MVT_v8f64_r(RetVT, Op0, Op0IsKill);
3979
  default: return 0;
3980
  }
3981
}
3982
3983
// FastEmit functions for X86ISD::MOVDQ2Q.
3984
3985
0
unsigned fastEmit_X86ISD_MOVDQ2Q_MVT_v2i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
3986
0
  if (RetVT.SimpleTy != MVT::x86mmx)
3987
0
    return 0;
3988
0
  return fastEmitInst_r(X86::MMX_MOVDQ2Qrr, &X86::VR64RegClass, Op0, Op0IsKill);
3989
0
}
3990
3991
unsigned fastEmit_X86ISD_MOVDQ2Q_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
3992
  switch (VT.SimpleTy) {
3993
  case MVT::v2i64: return fastEmit_X86ISD_MOVDQ2Q_MVT_v2i64_r(RetVT, Op0, Op0IsKill);
3994
  default: return 0;
3995
  }
3996
}
3997
3998
// FastEmit functions for X86ISD::MOVMSK.
3999
4000
0
unsigned fastEmit_X86ISD_MOVMSK_MVT_v16i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4001
0
  if (RetVT.SimpleTy != MVT::i32)
4002
0
    return 0;
4003
0
  if ((Subtarget->hasSSE2() && !Subtarget->hasAVX())) {
4004
0
    return fastEmitInst_r(X86::PMOVMSKBrr, &X86::GR32RegClass, Op0, Op0IsKill);
4005
0
  }
4006
0
  if ((Subtarget->hasAVX())) {
4007
0
    return fastEmitInst_r(X86::VPMOVMSKBrr, &X86::GR32RegClass, Op0, Op0IsKill);
4008
0
  }
4009
0
  return 0;
4010
0
}
4011
4012
0
unsigned fastEmit_X86ISD_MOVMSK_MVT_v32i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4013
0
  if (RetVT.SimpleTy != MVT::i32)
4014
0
    return 0;
4015
0
  if ((Subtarget->hasAVX2())) {
4016
0
    return fastEmitInst_r(X86::VPMOVMSKBYrr, &X86::GR32RegClass, Op0, Op0IsKill);
4017
0
  }
4018
0
  return 0;
4019
0
}
4020
4021
0
unsigned fastEmit_X86ISD_MOVMSK_MVT_v4f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4022
0
  if (RetVT.SimpleTy != MVT::i32)
4023
0
    return 0;
4024
0
  if ((Subtarget->hasSSE1() && !Subtarget->hasAVX())) {
4025
0
    return fastEmitInst_r(X86::MOVMSKPSrr, &X86::GR32RegClass, Op0, Op0IsKill);
4026
0
  }
4027
0
  if ((Subtarget->hasAVX())) {
4028
0
    return fastEmitInst_r(X86::VMOVMSKPSrr, &X86::GR32RegClass, Op0, Op0IsKill);
4029
0
  }
4030
0
  return 0;
4031
0
}
4032
4033
0
unsigned fastEmit_X86ISD_MOVMSK_MVT_v8f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4034
0
  if (RetVT.SimpleTy != MVT::i32)
4035
0
    return 0;
4036
0
  if ((Subtarget->hasAVX())) {
4037
0
    return fastEmitInst_r(X86::VMOVMSKPSYrr, &X86::GR32RegClass, Op0, Op0IsKill);
4038
0
  }
4039
0
  return 0;
4040
0
}
4041
4042
0
unsigned fastEmit_X86ISD_MOVMSK_MVT_v2f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4043
0
  if (RetVT.SimpleTy != MVT::i32)
4044
0
    return 0;
4045
0
  if ((Subtarget->hasSSE2() && !Subtarget->hasAVX())) {
4046
0
    return fastEmitInst_r(X86::MOVMSKPDrr, &X86::GR32RegClass, Op0, Op0IsKill);
4047
0
  }
4048
0
  if ((Subtarget->hasAVX())) {
4049
0
    return fastEmitInst_r(X86::VMOVMSKPDrr, &X86::GR32RegClass, Op0, Op0IsKill);
4050
0
  }
4051
0
  return 0;
4052
0
}
4053
4054
0
unsigned fastEmit_X86ISD_MOVMSK_MVT_v4f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4055
0
  if (RetVT.SimpleTy != MVT::i32)
4056
0
    return 0;
4057
0
  if ((Subtarget->hasAVX())) {
4058
0
    return fastEmitInst_r(X86::VMOVMSKPDYrr, &X86::GR32RegClass, Op0, Op0IsKill);
4059
0
  }
4060
0
  return 0;
4061
0
}
4062
4063
unsigned fastEmit_X86ISD_MOVMSK_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
4064
  switch (VT.SimpleTy) {
4065
  case MVT::v16i8: return fastEmit_X86ISD_MOVMSK_MVT_v16i8_r(RetVT, Op0, Op0IsKill);
4066
  case MVT::v32i8: return fastEmit_X86ISD_MOVMSK_MVT_v32i8_r(RetVT, Op0, Op0IsKill);
4067
  case MVT::v4f32: return fastEmit_X86ISD_MOVMSK_MVT_v4f32_r(RetVT, Op0, Op0IsKill);
4068
  case MVT::v8f32: return fastEmit_X86ISD_MOVMSK_MVT_v8f32_r(RetVT, Op0, Op0IsKill);
4069
  case MVT::v2f64: return fastEmit_X86ISD_MOVMSK_MVT_v2f64_r(RetVT, Op0, Op0IsKill);
4070
  case MVT::v4f64: return fastEmit_X86ISD_MOVMSK_MVT_v4f64_r(RetVT, Op0, Op0IsKill);
4071
  default: return 0;
4072
  }
4073
}
4074
4075
// FastEmit functions for X86ISD::MOVSHDUP.
4076
4077
0
unsigned fastEmit_X86ISD_MOVSHDUP_MVT_v4i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4078
0
  if (RetVT.SimpleTy != MVT::v4i32)
4079
0
    return 0;
4080
0
  if ((Subtarget->hasSSE3() && !Subtarget->hasAVX())) {
4081
0
    return fastEmitInst_r(X86::MOVSHDUPrr, &X86::VR128RegClass, Op0, Op0IsKill);
4082
0
  }
4083
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
4084
0
    return fastEmitInst_r(X86::VMOVSHDUPrr, &X86::VR128RegClass, Op0, Op0IsKill);
4085
0
  }
4086
0
  return 0;
4087
0
}
4088
4089
0
unsigned fastEmit_X86ISD_MOVSHDUP_MVT_v8i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4090
0
  if (RetVT.SimpleTy != MVT::v8i32)
4091
0
    return 0;
4092
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
4093
0
    return fastEmitInst_r(X86::VMOVSHDUPYrr, &X86::VR256RegClass, Op0, Op0IsKill);
4094
0
  }
4095
0
  return 0;
4096
0
}
4097
4098
0
unsigned fastEmit_X86ISD_MOVSHDUP_MVT_v4f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4099
0
  if (RetVT.SimpleTy != MVT::v4f32)
4100
0
    return 0;
4101
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
4102
0
    return fastEmitInst_r(X86::VMOVSHDUPZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
4103
0
  }
4104
0
  if ((Subtarget->hasSSE3() && !Subtarget->hasAVX())) {
4105
0
    return fastEmitInst_r(X86::MOVSHDUPrr, &X86::VR128RegClass, Op0, Op0IsKill);
4106
0
  }
4107
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
4108
0
    return fastEmitInst_r(X86::VMOVSHDUPrr, &X86::VR128RegClass, Op0, Op0IsKill);
4109
0
  }
4110
0
  return 0;
4111
0
}
4112
4113
0
unsigned fastEmit_X86ISD_MOVSHDUP_MVT_v8f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4114
0
  if (RetVT.SimpleTy != MVT::v8f32)
4115
0
    return 0;
4116
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
4117
0
    return fastEmitInst_r(X86::VMOVSHDUPZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
4118
0
  }
4119
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
4120
0
    return fastEmitInst_r(X86::VMOVSHDUPYrr, &X86::VR256RegClass, Op0, Op0IsKill);
4121
0
  }
4122
0
  return 0;
4123
0
}
4124
4125
0
unsigned fastEmit_X86ISD_MOVSHDUP_MVT_v16f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4126
0
  if (RetVT.SimpleTy != MVT::v16f32)
4127
0
    return 0;
4128
0
  if ((Subtarget->hasAVX512())) {
4129
0
    return fastEmitInst_r(X86::VMOVSHDUPZrr, &X86::VR512RegClass, Op0, Op0IsKill);
4130
0
  }
4131
0
  return 0;
4132
0
}
4133
4134
unsigned fastEmit_X86ISD_MOVSHDUP_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
4135
  switch (VT.SimpleTy) {
4136
  case MVT::v4i32: return fastEmit_X86ISD_MOVSHDUP_MVT_v4i32_r(RetVT, Op0, Op0IsKill);
4137
  case MVT::v8i32: return fastEmit_X86ISD_MOVSHDUP_MVT_v8i32_r(RetVT, Op0, Op0IsKill);
4138
  case MVT::v4f32: return fastEmit_X86ISD_MOVSHDUP_MVT_v4f32_r(RetVT, Op0, Op0IsKill);
4139
  case MVT::v8f32: return fastEmit_X86ISD_MOVSHDUP_MVT_v8f32_r(RetVT, Op0, Op0IsKill);
4140
  case MVT::v16f32: return fastEmit_X86ISD_MOVSHDUP_MVT_v16f32_r(RetVT, Op0, Op0IsKill);
4141
  default: return 0;
4142
  }
4143
}
4144
4145
// FastEmit functions for X86ISD::MOVSLDUP.
4146
4147
0
unsigned fastEmit_X86ISD_MOVSLDUP_MVT_v4i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4148
0
  if (RetVT.SimpleTy != MVT::v4i32)
4149
0
    return 0;
4150
0
  if ((Subtarget->hasSSE3() && !Subtarget->hasAVX())) {
4151
0
    return fastEmitInst_r(X86::MOVSLDUPrr, &X86::VR128RegClass, Op0, Op0IsKill);
4152
0
  }
4153
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
4154
0
    return fastEmitInst_r(X86::VMOVSLDUPrr, &X86::VR128RegClass, Op0, Op0IsKill);
4155
0
  }
4156
0
  return 0;
4157
0
}
4158
4159
0
unsigned fastEmit_X86ISD_MOVSLDUP_MVT_v8i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4160
0
  if (RetVT.SimpleTy != MVT::v8i32)
4161
0
    return 0;
4162
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
4163
0
    return fastEmitInst_r(X86::VMOVSLDUPYrr, &X86::VR256RegClass, Op0, Op0IsKill);
4164
0
  }
4165
0
  return 0;
4166
0
}
4167
4168
0
unsigned fastEmit_X86ISD_MOVSLDUP_MVT_v4f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4169
0
  if (RetVT.SimpleTy != MVT::v4f32)
4170
0
    return 0;
4171
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
4172
0
    return fastEmitInst_r(X86::VMOVSLDUPZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
4173
0
  }
4174
0
  if ((Subtarget->hasSSE3() && !Subtarget->hasAVX())) {
4175
0
    return fastEmitInst_r(X86::MOVSLDUPrr, &X86::VR128RegClass, Op0, Op0IsKill);
4176
0
  }
4177
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
4178
0
    return fastEmitInst_r(X86::VMOVSLDUPrr, &X86::VR128RegClass, Op0, Op0IsKill);
4179
0
  }
4180
0
  return 0;
4181
0
}
4182
4183
0
unsigned fastEmit_X86ISD_MOVSLDUP_MVT_v8f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4184
0
  if (RetVT.SimpleTy != MVT::v8f32)
4185
0
    return 0;
4186
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
4187
0
    return fastEmitInst_r(X86::VMOVSLDUPZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
4188
0
  }
4189
0
  if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX())) {
4190
0
    return fastEmitInst_r(X86::VMOVSLDUPYrr, &X86::VR256RegClass, Op0, Op0IsKill);
4191
0
  }
4192
0
  return 0;
4193
0
}
4194
4195
0
unsigned fastEmit_X86ISD_MOVSLDUP_MVT_v16f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4196
0
  if (RetVT.SimpleTy != MVT::v16f32)
4197
0
    return 0;
4198
0
  if ((Subtarget->hasAVX512())) {
4199
0
    return fastEmitInst_r(X86::VMOVSLDUPZrr, &X86::VR512RegClass, Op0, Op0IsKill);
4200
0
  }
4201
0
  return 0;
4202
0
}
4203
4204
unsigned fastEmit_X86ISD_MOVSLDUP_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
4205
  switch (VT.SimpleTy) {
4206
  case MVT::v4i32: return fastEmit_X86ISD_MOVSLDUP_MVT_v4i32_r(RetVT, Op0, Op0IsKill);
4207
  case MVT::v8i32: return fastEmit_X86ISD_MOVSLDUP_MVT_v8i32_r(RetVT, Op0, Op0IsKill);
4208
  case MVT::v4f32: return fastEmit_X86ISD_MOVSLDUP_MVT_v4f32_r(RetVT, Op0, Op0IsKill);
4209
  case MVT::v8f32: return fastEmit_X86ISD_MOVSLDUP_MVT_v8f32_r(RetVT, Op0, Op0IsKill);
4210
  case MVT::v16f32: return fastEmit_X86ISD_MOVSLDUP_MVT_v16f32_r(RetVT, Op0, Op0IsKill);
4211
  default: return 0;
4212
  }
4213
}
4214
4215
// FastEmit functions for X86ISD::NT_BRIND.
4216
4217
0
unsigned fastEmit_X86ISD_NT_BRIND_MVT_i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4218
0
  if (RetVT.SimpleTy != MVT::isVoid)
4219
0
    return 0;
4220
0
  if ((!Subtarget->is64Bit())) {
4221
0
    return fastEmitInst_r(X86::JMP16r_NT, &X86::GR16RegClass, Op0, Op0IsKill);
4222
0
  }
4223
0
  return 0;
4224
0
}
4225
4226
0
unsigned fastEmit_X86ISD_NT_BRIND_MVT_i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4227
0
  if (RetVT.SimpleTy != MVT::isVoid)
4228
0
    return 0;
4229
0
  if ((!Subtarget->is64Bit())) {
4230
0
    return fastEmitInst_r(X86::JMP32r_NT, &X86::GR32RegClass, Op0, Op0IsKill);
4231
0
  }
4232
0
  return 0;
4233
0
}
4234
4235
0
unsigned fastEmit_X86ISD_NT_BRIND_MVT_i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4236
0
  if (RetVT.SimpleTy != MVT::isVoid)
4237
0
    return 0;
4238
0
  if ((Subtarget->is64Bit())) {
4239
0
    return fastEmitInst_r(X86::JMP64r_NT, &X86::GR64RegClass, Op0, Op0IsKill);
4240
0
  }
4241
0
  return 0;
4242
0
}
4243
4244
unsigned fastEmit_X86ISD_NT_BRIND_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
4245
  switch (VT.SimpleTy) {
4246
  case MVT::i16: return fastEmit_X86ISD_NT_BRIND_MVT_i16_r(RetVT, Op0, Op0IsKill);
4247
  case MVT::i32: return fastEmit_X86ISD_NT_BRIND_MVT_i32_r(RetVT, Op0, Op0IsKill);
4248
  case MVT::i64: return fastEmit_X86ISD_NT_BRIND_MVT_i64_r(RetVT, Op0, Op0IsKill);
4249
  default: return 0;
4250
  }
4251
}
4252
4253
// FastEmit functions for X86ISD::NT_CALL.
4254
4255
0
unsigned fastEmit_X86ISD_NT_CALL_MVT_i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4256
0
  if (RetVT.SimpleTy != MVT::isVoid)
4257
0
    return 0;
4258
0
  if ((!Subtarget->is64Bit())) {
4259
0
    return fastEmitInst_r(X86::CALL16r_NT, &X86::GR16RegClass, Op0, Op0IsKill);
4260
0
  }
4261
0
  return 0;
4262
0
}
4263
4264
0
unsigned fastEmit_X86ISD_NT_CALL_MVT_i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4265
0
  if (RetVT.SimpleTy != MVT::isVoid)
4266
0
    return 0;
4267
0
  if ((!Subtarget->is64Bit())) {
4268
0
    return fastEmitInst_r(X86::CALL32r_NT, &X86::GR32RegClass, Op0, Op0IsKill);
4269
0
  }
4270
0
  return 0;
4271
0
}
4272
4273
0
unsigned fastEmit_X86ISD_NT_CALL_MVT_i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4274
0
  if (RetVT.SimpleTy != MVT::isVoid)
4275
0
    return 0;
4276
0
  if ((Subtarget->is64Bit())) {
4277
0
    return fastEmitInst_r(X86::CALL64r_NT, &X86::GR64RegClass, Op0, Op0IsKill);
4278
0
  }
4279
0
  return 0;
4280
0
}
4281
4282
unsigned fastEmit_X86ISD_NT_CALL_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
4283
  switch (VT.SimpleTy) {
4284
  case MVT::i16: return fastEmit_X86ISD_NT_CALL_MVT_i16_r(RetVT, Op0, Op0IsKill);
4285
  case MVT::i32: return fastEmit_X86ISD_NT_CALL_MVT_i32_r(RetVT, Op0, Op0IsKill);
4286
  case MVT::i64: return fastEmit_X86ISD_NT_CALL_MVT_i64_r(RetVT, Op0, Op0IsKill);
4287
  default: return 0;
4288
  }
4289
}
4290
4291
// FastEmit functions for X86ISD::PHMINPOS.
4292
4293
0
unsigned fastEmit_X86ISD_PHMINPOS_MVT_v8i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4294
0
  if (RetVT.SimpleTy != MVT::v8i16)
4295
0
    return 0;
4296
0
  if ((Subtarget->hasSSE41() && !Subtarget->hasAVX())) {
4297
0
    return fastEmitInst_r(X86::PHMINPOSUWrr, &X86::VR128RegClass, Op0, Op0IsKill);
4298
0
  }
4299
0
  if ((Subtarget->hasAVX())) {
4300
0
    return fastEmitInst_r(X86::VPHMINPOSUWrr, &X86::VR128RegClass, Op0, Op0IsKill);
4301
0
  }
4302
0
  return 0;
4303
0
}
4304
4305
unsigned fastEmit_X86ISD_PHMINPOS_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
4306
  switch (VT.SimpleTy) {
4307
  case MVT::v8i16: return fastEmit_X86ISD_PHMINPOS_MVT_v8i16_r(RetVT, Op0, Op0IsKill);
4308
  default: return 0;
4309
  }
4310
}
4311
4312
// FastEmit functions for X86ISD::RCP14.
4313
4314
0
unsigned fastEmit_X86ISD_RCP14_MVT_v4f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4315
0
  if (RetVT.SimpleTy != MVT::v4f32)
4316
0
    return 0;
4317
0
  if ((Subtarget->hasVLX())) {
4318
0
    return fastEmitInst_r(X86::VRCP14PSZ128r, &X86::VR128XRegClass, Op0, Op0IsKill);
4319
0
  }
4320
0
  return 0;
4321
0
}
4322
4323
0
unsigned fastEmit_X86ISD_RCP14_MVT_v8f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4324
0
  if (RetVT.SimpleTy != MVT::v8f32)
4325
0
    return 0;
4326
0
  if ((Subtarget->hasVLX())) {
4327
0
    return fastEmitInst_r(X86::VRCP14PSZ256r, &X86::VR256XRegClass, Op0, Op0IsKill);
4328
0
  }
4329
0
  return 0;
4330
0
}
4331
4332
0
unsigned fastEmit_X86ISD_RCP14_MVT_v16f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4333
0
  if (RetVT.SimpleTy != MVT::v16f32)
4334
0
    return 0;
4335
0
  if ((Subtarget->hasAVX512())) {
4336
0
    return fastEmitInst_r(X86::VRCP14PSZr, &X86::VR512RegClass, Op0, Op0IsKill);
4337
0
  }
4338
0
  return 0;
4339
0
}
4340
4341
0
unsigned fastEmit_X86ISD_RCP14_MVT_v2f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4342
0
  if (RetVT.SimpleTy != MVT::v2f64)
4343
0
    return 0;
4344
0
  if ((Subtarget->hasVLX())) {
4345
0
    return fastEmitInst_r(X86::VRCP14PDZ128r, &X86::VR128XRegClass, Op0, Op0IsKill);
4346
0
  }
4347
0
  return 0;
4348
0
}
4349
4350
0
unsigned fastEmit_X86ISD_RCP14_MVT_v4f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4351
0
  if (RetVT.SimpleTy != MVT::v4f64)
4352
0
    return 0;
4353
0
  if ((Subtarget->hasVLX())) {
4354
0
    return fastEmitInst_r(X86::VRCP14PDZ256r, &X86::VR256XRegClass, Op0, Op0IsKill);
4355
0
  }
4356
0
  return 0;
4357
0
}
4358
4359
0
unsigned fastEmit_X86ISD_RCP14_MVT_v8f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4360
0
  if (RetVT.SimpleTy != MVT::v8f64)
4361
0
    return 0;
4362
0
  if ((Subtarget->hasAVX512())) {
4363
0
    return fastEmitInst_r(X86::VRCP14PDZr, &X86::VR512RegClass, Op0, Op0IsKill);
4364
0
  }
4365
0
  return 0;
4366
0
}
4367
4368
unsigned fastEmit_X86ISD_RCP14_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
4369
  switch (VT.SimpleTy) {
4370
  case MVT::v4f32: return fastEmit_X86ISD_RCP14_MVT_v4f32_r(RetVT, Op0, Op0IsKill);
4371
  case MVT::v8f32: return fastEmit_X86ISD_RCP14_MVT_v8f32_r(RetVT, Op0, Op0IsKill);
4372
  case MVT::v16f32: return fastEmit_X86ISD_RCP14_MVT_v16f32_r(RetVT, Op0, Op0IsKill);
4373
  case MVT::v2f64: return fastEmit_X86ISD_RCP14_MVT_v2f64_r(RetVT, Op0, Op0IsKill);
4374
  case MVT::v4f64: return fastEmit_X86ISD_RCP14_MVT_v4f64_r(RetVT, Op0, Op0IsKill);
4375
  case MVT::v8f64: return fastEmit_X86ISD_RCP14_MVT_v8f64_r(RetVT, Op0, Op0IsKill);
4376
  default: return 0;
4377
  }
4378
}
4379
4380
// FastEmit functions for X86ISD::RSQRT14.
4381
4382
0
unsigned fastEmit_X86ISD_RSQRT14_MVT_v4f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4383
0
  if (RetVT.SimpleTy != MVT::v4f32)
4384
0
    return 0;
4385
0
  if ((Subtarget->hasVLX())) {
4386
0
    return fastEmitInst_r(X86::VRSQRT14PSZ128r, &X86::VR128XRegClass, Op0, Op0IsKill);
4387
0
  }
4388
0
  return 0;
4389
0
}
4390
4391
0
unsigned fastEmit_X86ISD_RSQRT14_MVT_v8f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4392
0
  if (RetVT.SimpleTy != MVT::v8f32)
4393
0
    return 0;
4394
0
  if ((Subtarget->hasVLX())) {
4395
0
    return fastEmitInst_r(X86::VRSQRT14PSZ256r, &X86::VR256XRegClass, Op0, Op0IsKill);
4396
0
  }
4397
0
  return 0;
4398
0
}
4399
4400
0
unsigned fastEmit_X86ISD_RSQRT14_MVT_v16f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4401
0
  if (RetVT.SimpleTy != MVT::v16f32)
4402
0
    return 0;
4403
0
  if ((Subtarget->hasAVX512())) {
4404
0
    return fastEmitInst_r(X86::VRSQRT14PSZr, &X86::VR512RegClass, Op0, Op0IsKill);
4405
0
  }
4406
0
  return 0;
4407
0
}
4408
4409
0
unsigned fastEmit_X86ISD_RSQRT14_MVT_v2f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4410
0
  if (RetVT.SimpleTy != MVT::v2f64)
4411
0
    return 0;
4412
0
  if ((Subtarget->hasVLX())) {
4413
0
    return fastEmitInst_r(X86::VRSQRT14PDZ128r, &X86::VR128XRegClass, Op0, Op0IsKill);
4414
0
  }
4415
0
  return 0;
4416
0
}
4417
4418
0
unsigned fastEmit_X86ISD_RSQRT14_MVT_v4f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4419
0
  if (RetVT.SimpleTy != MVT::v4f64)
4420
0
    return 0;
4421
0
  if ((Subtarget->hasVLX())) {
4422
0
    return fastEmitInst_r(X86::VRSQRT14PDZ256r, &X86::VR256XRegClass, Op0, Op0IsKill);
4423
0
  }
4424
0
  return 0;
4425
0
}
4426
4427
0
unsigned fastEmit_X86ISD_RSQRT14_MVT_v8f64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4428
0
  if (RetVT.SimpleTy != MVT::v8f64)
4429
0
    return 0;
4430
0
  if ((Subtarget->hasAVX512())) {
4431
0
    return fastEmitInst_r(X86::VRSQRT14PDZr, &X86::VR512RegClass, Op0, Op0IsKill);
4432
0
  }
4433
0
  return 0;
4434
0
}
4435
4436
unsigned fastEmit_X86ISD_RSQRT14_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
4437
  switch (VT.SimpleTy) {
4438
  case MVT::v4f32: return fastEmit_X86ISD_RSQRT14_MVT_v4f32_r(RetVT, Op0, Op0IsKill);
4439
  case MVT::v8f32: return fastEmit_X86ISD_RSQRT14_MVT_v8f32_r(RetVT, Op0, Op0IsKill);
4440
  case MVT::v16f32: return fastEmit_X86ISD_RSQRT14_MVT_v16f32_r(RetVT, Op0, Op0IsKill);
4441
  case MVT::v2f64: return fastEmit_X86ISD_RSQRT14_MVT_v2f64_r(RetVT, Op0, Op0IsKill);
4442
  case MVT::v4f64: return fastEmit_X86ISD_RSQRT14_MVT_v4f64_r(RetVT, Op0, Op0IsKill);
4443
  case MVT::v8f64: return fastEmit_X86ISD_RSQRT14_MVT_v8f64_r(RetVT, Op0, Op0IsKill);
4444
  default: return 0;
4445
  }
4446
}
4447
4448
// FastEmit functions for X86ISD::SEG_ALLOCA.
4449
4450
0
unsigned fastEmit_X86ISD_SEG_ALLOCA_MVT_i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4451
0
  if (RetVT.SimpleTy != MVT::i32)
4452
0
    return 0;
4453
0
  if ((!Subtarget->isTarget64BitLP64())) {
4454
0
    return fastEmitInst_r(X86::SEG_ALLOCA_32, &X86::GR32RegClass, Op0, Op0IsKill);
4455
0
  }
4456
0
  return 0;
4457
0
}
4458
4459
0
unsigned fastEmit_X86ISD_SEG_ALLOCA_MVT_i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4460
0
  if (RetVT.SimpleTy != MVT::i64)
4461
0
    return 0;
4462
0
  if ((Subtarget->is64Bit())) {
4463
0
    return fastEmitInst_r(X86::SEG_ALLOCA_64, &X86::GR64RegClass, Op0, Op0IsKill);
4464
0
  }
4465
0
  return 0;
4466
0
}
4467
4468
unsigned fastEmit_X86ISD_SEG_ALLOCA_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
4469
  switch (VT.SimpleTy) {
4470
  case MVT::i32: return fastEmit_X86ISD_SEG_ALLOCA_MVT_i32_r(RetVT, Op0, Op0IsKill);
4471
  case MVT::i64: return fastEmit_X86ISD_SEG_ALLOCA_MVT_i64_r(RetVT, Op0, Op0IsKill);
4472
  default: return 0;
4473
  }
4474
}
4475
4476
// FastEmit functions for X86ISD::VBROADCAST.
4477
4478
0
unsigned fastEmit_X86ISD_VBROADCAST_MVT_i32_MVT_v4i32_r(unsigned Op0, bool Op0IsKill) {
4479
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
4480
0
    return fastEmitInst_r(X86::VPBROADCASTDrZ128r, &X86::VR128XRegClass, Op0, Op0IsKill);
4481
0
  }
4482
0
  return 0;
4483
0
}
4484
4485
0
unsigned fastEmit_X86ISD_VBROADCAST_MVT_i32_MVT_v8i32_r(unsigned Op0, bool Op0IsKill) {
4486
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
4487
0
    return fastEmitInst_r(X86::VPBROADCASTDrZ256r, &X86::VR256XRegClass, Op0, Op0IsKill);
4488
0
  }
4489
0
  return 0;
4490
0
}
4491
4492
0
unsigned fastEmit_X86ISD_VBROADCAST_MVT_i32_MVT_v16i32_r(unsigned Op0, bool Op0IsKill) {
4493
0
  if ((Subtarget->hasAVX512())) {
4494
0
    return fastEmitInst_r(X86::VPBROADCASTDrZr, &X86::VR512RegClass, Op0, Op0IsKill);
4495
0
  }
4496
0
  return 0;
4497
0
}
4498
4499
unsigned fastEmit_X86ISD_VBROADCAST_MVT_i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4500
switch (RetVT.SimpleTy) {
4501
  case MVT::v4i32: return fastEmit_X86ISD_VBROADCAST_MVT_i32_MVT_v4i32_r(Op0, Op0IsKill);
4502
  case MVT::v8i32: return fastEmit_X86ISD_VBROADCAST_MVT_i32_MVT_v8i32_r(Op0, Op0IsKill);
4503
  case MVT::v16i32: return fastEmit_X86ISD_VBROADCAST_MVT_i32_MVT_v16i32_r(Op0, Op0IsKill);
4504
  default: return 0;
4505
}
4506
}
4507
4508
0
unsigned fastEmit_X86ISD_VBROADCAST_MVT_i64_MVT_v2i64_r(unsigned Op0, bool Op0IsKill) {
4509
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
4510
0
    return fastEmitInst_r(X86::VPBROADCASTQrZ128r, &X86::VR128XRegClass, Op0, Op0IsKill);
4511
0
  }
4512
0
  return 0;
4513
0
}
4514
4515
0
unsigned fastEmit_X86ISD_VBROADCAST_MVT_i64_MVT_v4i64_r(unsigned Op0, bool Op0IsKill) {
4516
0
  if ((Subtarget->hasAVX512()) && (Subtarget->hasVLX())) {
4517
0
    return fastEmitInst_r(X86::VPBROADCASTQrZ256r, &X86::VR256XRegClass, Op0, Op0IsKill);
4518
0
  }
4519
0
  return 0;
4520
0
}
4521
4522
0
unsigned fastEmit_X86ISD_VBROADCAST_MVT_i64_MVT_v8i64_r(unsigned Op0, bool Op0IsKill) {
4523
0
  if ((Subtarget->hasAVX512())) {
4524
0
    return fastEmitInst_r(X86::VPBROADCASTQrZr, &X86::VR512RegClass, Op0, Op0IsKill);
4525
0
  }
4526
0
  return 0;
4527
0
}
4528
4529
unsigned fastEmit_X86ISD_VBROADCAST_MVT_i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4530
switch (RetVT.SimpleTy) {
4531
  case MVT::v2i64: return fastEmit_X86ISD_VBROADCAST_MVT_i64_MVT_v2i64_r(Op0, Op0IsKill);
4532
  case MVT::v4i64: return fastEmit_X86ISD_VBROADCAST_MVT_i64_MVT_v4i64_r(Op0, Op0IsKill);
4533
  case MVT::v8i64: return fastEmit_X86ISD_VBROADCAST_MVT_i64_MVT_v8i64_r(Op0, Op0IsKill);
4534
  default: return 0;
4535
}
4536
}
4537
4538
0
unsigned fastEmit_X86ISD_VBROADCAST_MVT_v16i8_MVT_v16i8_r(unsigned Op0, bool Op0IsKill) {
4539
0
  if ((Subtarget->hasBWI()) && (Subtarget->hasVLX())) {
4540
0
    return fastEmitInst_r(X86::VPBROADCASTBZ128r, &X86::VR128XRegClass, Op0, Op0IsKill);
4541
0
  }
4542
0
  if ((Subtarget->hasAVX2()) && (!Subtarget->hasVLX() || !Subtarget->hasBWI())) {
4543
0
    return fastEmitInst_r(X86::VPBROADCASTBrr, &X86::VR128RegClass, Op0, Op0IsKill);
4544
0
  }
4545
0
  return 0;
4546
0
}
4547
4548
0
unsigned fastEmit_X86ISD_VBROADCAST_MVT_v16i8_MVT_v32i8_r(unsigned Op0, bool Op0IsKill) {
4549
0
  if ((Subtarget->hasBWI()) && (Subtarget->hasVLX())) {
4550
0
    return fastEmitInst_r(X86::VPBROADCASTBZ256r, &X86::VR256XRegClass, Op0, Op0IsKill);
4551
0
  }
4552
0
  if ((Subtarget->hasAVX2()) && (!Subtarget->hasVLX() || !Subtarget->hasBWI())) {
4553
0
    return fastEmitInst_r(X86::VPBROADCASTBYrr, &X86::VR256RegClass, Op0, Op0IsKill);
4554
0
  }
4555
0
  return 0;
4556
0
}
4557
4558
0
unsigned fastEmit_X86ISD_VBROADCAST_MVT_v16i8_MVT_v64i8_r(unsigned Op0, bool Op0IsKill) {
4559
0
  if ((Subtarget->hasBWI())) {
4560
0
    return fastEmitInst_r(X86::VPBROADCASTBZr, &X86::VR512RegClass, Op0, Op0IsKill);
4561
0
  }
4562
0
  return 0;
4563
0
}
4564
4565
unsigned fastEmit_X86ISD_VBROADCAST_MVT_v16i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
4566
switch (RetVT.SimpleTy) {
4567
  case MVT::v16i8: return fastEmit_X86ISD_VBROADCAST_MVT_v16i8_MVT_v16i8_r(Op0, Op0IsKill);
4568
  case MVT::v32i8: return fastEmit_X86ISD_VBROADCAST_MVT_v16i8_MVT_v32i8_r(Op0, Op0IsKill);
4569
  case MVT::v64i8: return fastEmit_X86ISD_VBROADCAST_MVT_v16i8_MVT_v64i8_r(Op0, Op0IsKill);
4570
  default: return 0;
4571
}
4572
}
4573
4574
0
unsigned fastEmit_X86ISD_VBROADCAST_MVT_v8i16_MVT_v8i16_r(unsigned Op0, bool Op0IsKill) {
4575
0
  if ((Subtarget->hasBWI()) && (Subtarget->hasVLX())) {
4576
0
    return fastEmitInst_r(X86::VPBROADCASTWZ128r, &X86::VR128XRegClass, Op0, Op0IsKill);
4577
0
  }
4578
0
  if ((Subtarget->hasAVX2()) && (!Subtarget->hasVLX() ||