Coverage Report

Created: 2019-07-24 05:18

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/llvm/lib/CodeGen/AllocationOrder.h
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//===-- llvm/CodeGen/AllocationOrder.h - Allocation Order -*- C++ -*-------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements an allocation order for virtual registers.
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//
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// The preferred allocation order for a virtual register depends on allocation
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// hints and target hooks. The AllocationOrder class encapsulates all of that.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_CODEGEN_ALLOCATIONORDER_H
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#define LLVM_LIB_CODEGEN_ALLOCATIONORDER_H
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#include "llvm/ADT/ArrayRef.h"
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#include "llvm/ADT/STLExtras.h"
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#include "llvm/MC/MCRegisterInfo.h"
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namespace llvm {
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class RegisterClassInfo;
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class VirtRegMap;
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class LiveRegMatrix;
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class LLVM_LIBRARY_VISIBILITY AllocationOrder {
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  SmallVector<MCPhysReg, 16> Hints;
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  ArrayRef<MCPhysReg> Order;
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  int Pos;
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  // If HardHints is true, *only* Hints will be returned.
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  bool HardHints;
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public:
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  /// Create a new AllocationOrder for VirtReg.
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  /// @param VirtReg      Virtual register to allocate for.
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  /// @param VRM          Virtual register map for function.
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  /// @param RegClassInfo Information about reserved and allocatable registers.
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  AllocationOrder(unsigned VirtReg,
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                  const VirtRegMap &VRM,
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                  const RegisterClassInfo &RegClassInfo,
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                  const LiveRegMatrix *Matrix);
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  /// Get the allocation order without reordered hints.
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  ArrayRef<MCPhysReg> getOrder() const { return Order; }
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  /// Return the next physical register in the allocation order, or 0.
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  /// It is safe to call next() again after it returned 0, it will keep
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  /// returning 0 until rewind() is called.
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217M
  unsigned next(unsigned Limit = 0) {
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    if (Pos < 0)
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4.82M
      return Hints.end()[Pos++];
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    if (HardHints)
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1
      return 0;
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    if (!Limit)
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      Limit = Order.size();
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    while (Pos < int(Limit)) {
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      unsigned Reg = Order[Pos++];
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      if (!isHint(Reg))
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        return Reg;
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    }
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return 05.41M
;
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  }
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  /// As next(), but allow duplicates to be returned, and stop before the
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  /// Limit'th register in the RegisterClassInfo allocation order.
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  ///
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  /// This can produce more than Limit registers if there are hints.
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0
  unsigned nextWithDups(unsigned Limit) {
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0
    if (Pos < 0)
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      return Hints.end()[Pos++];
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0
    if (HardHints)
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      return 0;
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0
    if (Pos < int(Limit))
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0
      return Order[Pos++];
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0
    return 0;
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0
  }
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  /// Start over from the beginning.
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  void rewind() { Pos = -int(Hints.size()); }
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  /// Return true if the last register returned from next() was a preferred register.
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  bool isHint() const { return Pos <= 0; }
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  /// Return true if PhysReg is a preferred register.
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  bool isHint(unsigned PhysReg) const { return is_contained(Hints, PhysReg); }
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};
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} // end namespace llvm
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#endif