Coverage Report

Created: 2018-08-16 23:08

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/llvm/lib/CodeGen/AsmPrinter/DbgValueHistoryCalculator.cpp
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//===- llvm/CodeGen/AsmPrinter/DbgValueHistoryCalculator.cpp --------------===//
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//
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//                     The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "DbgValueHistoryCalculator.h"
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#include "llvm/ADT/BitVector.h"
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#include "llvm/ADT/STLExtras.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/CodeGen/MachineBasicBlock.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineOperand.h"
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#include "llvm/CodeGen/TargetLowering.h"
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#include "llvm/CodeGen/TargetRegisterInfo.h"
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#include "llvm/CodeGen/TargetSubtargetInfo.h"
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#include "llvm/IR/DebugInfoMetadata.h"
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#include "llvm/IR/DebugLoc.h"
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#include "llvm/MC/MCRegisterInfo.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/raw_ostream.h"
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#include <cassert>
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#include <map>
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#include <utility>
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using namespace llvm;
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#define DEBUG_TYPE "dwarfdebug"
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// If @MI is a DBG_VALUE with debug value described by a
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// defined register, returns the number of this register.
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// In the other case, returns 0.
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1.90k
static unsigned isDescribedByReg(const MachineInstr &MI) {
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1.90k
  assert(MI.isDebugValue());
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1.90k
  assert(MI.getNumOperands() == 4);
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1.90k
  // If location of variable is described using a register (directly or
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1.90k
  // indirectly), this register is always a first operand.
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1.90k
  return MI.getOperand(0).isReg() ? 
MI.getOperand(0).getReg()1.76k
:
0143
;
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1.90k
}
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void DbgValueHistoryMap::startInstrRange(InlinedVariable Var,
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1.49k
                                         const MachineInstr &MI) {
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1.49k
  // Instruction range should start with a DBG_VALUE instruction for the
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1.49k
  // variable.
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1.49k
  assert(MI.isDebugValue() && "not a DBG_VALUE");
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1.49k
  auto &Ranges = VarInstrRanges[Var];
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1.49k
  if (!Ranges.empty() && 
Ranges.back().second == nullptr905
&&
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1.49k
      
Ranges.back().first->isIdenticalTo(MI)413
) {
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226
    LLVM_DEBUG(dbgs() << "Coalescing identical DBG_VALUE entries:\n"
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                      << "\t" << Ranges.back().first << "\t" << MI << "\n");
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    return;
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  }
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1.26k
  Ranges.push_back(std::make_pair(&MI, nullptr));
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1.26k
}
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void DbgValueHistoryMap::endInstrRange(InlinedVariable Var,
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817
                                       const MachineInstr &MI) {
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  auto &Ranges = VarInstrRanges[Var];
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  // Verify that the current instruction range is not yet closed.
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817
  assert(!Ranges.empty() && Ranges.back().second == nullptr);
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817
  // For now, instruction ranges are not allowed to cross basic block
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  // boundaries.
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  assert(Ranges.back().first->getParent() == MI.getParent());
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  Ranges.back().second = &MI;
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817
}
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1.49k
unsigned DbgValueHistoryMap::getRegisterForVar(InlinedVariable Var) const {
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1.49k
  const auto &I = VarInstrRanges.find(Var);
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1.49k
  if (I == VarInstrRanges.end())
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    return 0;
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905
  const auto &Ranges = I->second;
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905
  if (Ranges.empty() || Ranges.back().second != nullptr)
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    return 0;
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  return isDescribedByReg(*Ranges.back().first);
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}
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namespace {
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// Maps physreg numbers to the variables they describe.
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using InlinedVariable = DbgValueHistoryMap::InlinedVariable;
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using RegDescribedVarsMap = std::map<unsigned, SmallVector<InlinedVariable, 1>>;
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} // end anonymous namespace
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// Claim that @Var is not described by @RegNo anymore.
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static void dropRegDescribedVar(RegDescribedVarsMap &RegVars, unsigned RegNo,
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                                InlinedVariable Var) {
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  const auto &I = RegVars.find(RegNo);
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  assert(RegNo != 0U && I != RegVars.end());
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  auto &VarSet = I->second;
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  const auto &VarPos = llvm::find(VarSet, Var);
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  assert(VarPos != VarSet.end());
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  VarSet.erase(VarPos);
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  // Don't keep empty sets in a map to keep it as small as possible.
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  if (VarSet.empty())
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    RegVars.erase(I);
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}
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// Claim that @Var is now described by @RegNo.
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static void addRegDescribedVar(RegDescribedVarsMap &RegVars, unsigned RegNo,
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1.35k
                               InlinedVariable Var) {
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1.35k
  assert(RegNo != 0U);
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1.35k
  auto &VarSet = RegVars[RegNo];
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1.35k
  assert(!is_contained(VarSet, Var));
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  VarSet.push_back(Var);
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}
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// Terminate the location range for variables described by register at
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// @I by inserting @ClobberingInstr to their history.
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static void clobberRegisterUses(RegDescribedVarsMap &RegVars,
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                                RegDescribedVarsMap::iterator I,
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                                DbgValueHistoryMap &HistMap,
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                                const MachineInstr &ClobberingInstr) {
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  // Iterate over all variables described by this register and add this
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  // instruction to their history, clobbering it.
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  for (const auto &Var : I->second)
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    HistMap.endInstrRange(Var, ClobberingInstr);
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  RegVars.erase(I);
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}
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// Terminate the location range for variables described by register
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// @RegNo by inserting @ClobberingInstr to their history.
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static void clobberRegisterUses(RegDescribedVarsMap &RegVars, unsigned RegNo,
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                                DbgValueHistoryMap &HistMap,
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82.0M
                                const MachineInstr &ClobberingInstr) {
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82.0M
  const auto &I = RegVars.find(RegNo);
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82.0M
  if (I == RegVars.end())
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    return;
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  clobberRegisterUses(RegVars, I, HistMap, ClobberingInstr);
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}
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// Returns the first instruction in @MBB which corresponds to
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// the function epilogue, or nullptr if @MBB doesn't contain an epilogue.
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static const MachineInstr *getFirstEpilogueInst(const MachineBasicBlock &MBB) {
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  auto LastMI = MBB.getLastNonDebugInstr();
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  if (LastMI == MBB.end() || 
!LastMI->isReturn()396k
)
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    return nullptr;
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  // Assume that epilogue starts with instruction having the same debug location
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  // as the return instruction.
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  DebugLoc LastLoc = LastMI->getDebugLoc();
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  auto Res = LastMI;
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  for (MachineBasicBlock::const_reverse_iterator I = LastMI.getReverse(),
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                                                 E = MBB.rend();
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       I != E; 
++I208k
) {
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    if (I->getDebugLoc() != LastLoc)
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      return &*Res;
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    Res = &*I;
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  }
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  // If all instructions have the same debug location, assume whole MBB is
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  // an epilogue.
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return &*MBB.begin()20.1k
;
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}
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// Collect registers that are modified in the function body (their
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// contents is changed outside of the prologue and epilogue).
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static void collectChangingRegs(const MachineFunction *MF,
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                                const TargetRegisterInfo *TRI,
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36.1k
                                BitVector &Regs) {
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396k
  for (const auto &MBB : *MF) {
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    auto FirstEpilogueInst = getFirstEpilogueInst(MBB);
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396k
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2.69M
    for (const auto &MI : MBB) {
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      // Avoid looking at prologue or epilogue instructions.
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2.69M
      if (&MI == FirstEpilogueInst)
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44.6k
        break;
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2.64M
      if (MI.getFlag(MachineInstr::FrameSetup))
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        continue;
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2.43M
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2.43M
      // Look for register defs and register masks. Register masks are
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2.43M
      // typically on calls and they clobber everything not in the mask.
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10.4M
      
for (const MachineOperand &MO : MI.operands())2.43M
{
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10.4M
        // Skip virtual registers since they are handled by the parent.
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10.4M
        if (MO.isReg() && 
MO.isDef()7.17M
&&
MO.getReg()2.50M
&&
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10.4M
            
!TRI->isVirtualRegister(MO.getReg())2.50M
) {
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17.9M
          for (MCRegAliasIterator AI(MO.getReg(), TRI, true); AI.isValid();
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15.4M
               ++AI)
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15.4M
            Regs.set(*AI);
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7.98M
        } else if (MO.isRegMask()) {
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219k
          Regs.setBitsNotInMask(MO.getRegMask());
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219k
        }
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10.4M
      }
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2.43M
    }
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396k
  }
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36.1k
}
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void llvm::calculateDbgValueHistory(const MachineFunction *MF,
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                                    const TargetRegisterInfo *TRI,
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36.1k
                                    DbgValueHistoryMap &Result) {
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36.1k
  BitVector ChangingRegs(TRI->getNumRegs());
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36.1k
  collectChangingRegs(MF, TRI, ChangingRegs);
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36.1k
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  const TargetLowering *TLI = MF->getSubtarget().getTargetLowering();
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  unsigned SP = TLI->getStackPointerRegisterToSaveRestore();
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  RegDescribedVarsMap RegVars;
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  for (const auto &MBB : *MF) {
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2.85M
    for (const auto &MI : MBB) {
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2.85M
      if (!MI.isDebugInstr()) {
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2.85M
        // Not a DBG_VALUE instruction. It may clobber registers which describe
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2.85M
        // some variables.
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        for (const MachineOperand &MO : MI.operands()) {
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11.7M
          if (MO.isReg() && 
MO.isDef()8.23M
&&
MO.getReg()2.98M
) {
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2.98M
            // Ignore call instructions that claim to clobber SP. The AArch64
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2.98M
            // backend does this for aggregate function arguments.
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2.98M
            if (MI.isCall() && 
MO.getReg() == SP554k
)
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              continue;
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            // If this is a virtual register, only clobber it since it doesn't
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2.76M
            // have aliases.
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2.76M
            if (TRI->isVirtualRegister(MO.getReg()))
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              clobberRegisterUses(RegVars, MO.getReg(), Result, MI);
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            // If this is a register def operand, it may end a debug value
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2.76M
            // range.
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2.76M
            else {
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              for (MCRegAliasIterator AI(MO.getReg(), TRI, true); AI.isValid();
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17.6M
                   ++AI)
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17.6M
                if (ChangingRegs.test(*AI))
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16.8M
                  clobberRegisterUses(RegVars, *AI, Result, MI);
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2.76M
            }
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8.81M
          } else if (MO.isRegMask()) {
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229k
            // If this is a register mask operand, clobber all debug values in
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            // non-CSRs.
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70.3M
            for (unsigned I : ChangingRegs.set_bits()) {
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70.3M
              // Don't consider SP to be clobbered by register masks.
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70.3M
              if (unsigned(I) != SP && 
TRI->isPhysicalRegister(I)70.0M
&&
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70.3M
                  
MO.clobbersPhysReg(I)69.8M
) {
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65.2M
                clobberRegisterUses(RegVars, I, Result, MI);
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65.2M
              }
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70.3M
            }
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229k
          }
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11.7M
        }
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2.85M
        continue;
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      }
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1.49k
      // Skip DBG_LABEL instructions.
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1.49k
      if (MI.isDebugLabel())
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0
        continue;
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1.49k
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1.49k
      assert(MI.getNumOperands() > 1 && "Invalid DBG_VALUE instruction!");
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1.49k
      // Use the base variable (without any DW_OP_piece expressions)
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1.49k
      // as index into History. The full variables including the
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1.49k
      // piece expressions are attached to the MI.
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1.49k
      const DILocalVariable *RawVar = MI.getDebugVariable();
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1.49k
      assert(RawVar->isValidLocationForIntrinsic(MI.getDebugLoc()) &&
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1.49k
             "Expected inlined-at fields to agree");
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1.49k
      InlinedVariable Var(RawVar, MI.getDebugLoc()->getInlinedAt());
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1.49k
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1.49k
      if (unsigned PrevReg = Result.getRegisterForVar(Var))
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        dropRegDescribedVar(RegVars, PrevReg, Var);
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1.49k
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1.49k
      Result.startInstrRange(Var, MI);
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1.49k
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1.49k
      if (unsigned NewReg = isDescribedByReg(MI))
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1.35k
        addRegDescribedVar(RegVars, NewReg, Var);
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1.49k
    }
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396k
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396k
    // Make sure locations for register-described variables are valid only
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396k
    // until the end of the basic block (unless it's the last basic block, in
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396k
    // which case let their liveness run off to the end of the function).
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396k
    if (!MBB.empty() && 
&MBB != &MF->back()396k
) {
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360k
      for (auto I = RegVars.begin(), E = RegVars.end(); I != E;) {
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537
        auto CurElem = I++; // CurElem can be erased below.
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537
        if (TRI->isVirtualRegister(CurElem->first) ||
266
537
            
ChangingRegs.test(CurElem->first)533
)
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          clobberRegisterUses(RegVars, CurElem, Result, MBB.back());
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537
      }
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360k
    }
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396k
  }
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36.1k
}
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#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
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LLVM_DUMP_METHOD void DbgValueHistoryMap::dump() const {
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  dbgs() << "DbgValueHistoryMap:\n";
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  for (const auto &VarRangePair : *this) {
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    const InlinedVariable &Var = VarRangePair.first;
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    const InstrRanges &Ranges = VarRangePair.second;
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    const DILocalVariable *LocalVar = Var.first;
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    const DILocation *Location = Var.second;
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    dbgs() << " - " << LocalVar->getName() << " at ";
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    if (Location)
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      dbgs() << Location->getFilename() << ":" << Location->getLine() << ":"
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             << Location->getColumn();
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    else
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      dbgs() << "<unknown location>";
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    dbgs() << " --\n";
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    for (const InstrRange &Range : Ranges) {
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      dbgs() << "   Begin: " << *Range.first;
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      if (Range.second)
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        dbgs() << "   End  : " << *Range.second;
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      dbgs() << "\n";
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    }
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  }
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}
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#endif