Coverage Report

Created: 2019-07-24 05:18

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/llvm/lib/Target/PowerPC/PPCMachineScheduler.cpp
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//===- PPCMachineScheduler.cpp - MI Scheduler for PowerPC -------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "PPCMachineScheduler.h"
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#include "MCTargetDesc/PPCMCTargetDesc.h"
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using namespace llvm;
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static cl::opt<bool> 
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DisableAddiLoadHeuristic("disable-ppc-sched-addi-load",
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                         cl::desc("Disable scheduling addi instruction before" 
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                                  "load for ppc"), cl::Hidden);
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bool PPCPreRASchedStrategy::biasAddiLoadCandidate(SchedCandidate &Cand,
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                                                  SchedCandidate &TryCand,
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40.0k
                                                  SchedBoundary &Zone) const {
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  if (DisableAddiLoadHeuristic)
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    return false;
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47.0k
  
auto isADDIInstr = [&] (const MachineInstr &Inst) 39.9k
{
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    return Inst.getOpcode() == PPC::ADDI || 
Inst.getOpcode() == PPC::ADDI846.9k
;
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  };
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  SchedCandidate &FirstCand = Zone.isTop() ? 
TryCand13.1k
:
Cand26.8k
;
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39.9k
  SchedCandidate &SecondCand = Zone.isTop() ? 
Cand13.1k
:
TryCand26.8k
;
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  if (isADDIInstr(*FirstCand.SU->getInstr()) &&
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SecondCand.SU->getInstr()->mayLoad()341
) {
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    TryCand.Reason = Stall;
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    return true;
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  }
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39.9k
  if (FirstCand.SU->getInstr()->mayLoad() &&
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39.9k
      
isADDIInstr(*SecondCand.SU->getInstr())7.01k
) {
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    TryCand.Reason = NoCand;
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    return true;
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  }
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  return false;
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}
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void PPCPreRASchedStrategy::tryCandidate(SchedCandidate &Cand,
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                                         SchedCandidate &TryCand,
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70.3k
                                         SchedBoundary *Zone) const {
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70.3k
  GenericScheduler::tryCandidate(Cand, TryCand, Zone);
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  if (!Cand.isValid() || 
!Zone55.2k
)
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    return;
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  // Add powerpc specific heuristic only when TryCand isn't selected or
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  // selected as node order.
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  if (TryCand.Reason != NodeOrder && 
TryCand.Reason != NoCand31.6k
)
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    return;
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  // There are some benefits to schedule the ADDI before the load to hide the
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  // latency, as RA may create a true dependency between the load and addi.
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  if (biasAddiLoadCandidate(Cand, TryCand, *Zone))
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    return;
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40.0k
}
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void PPCPostRASchedStrategy::enterMBB(MachineBasicBlock *MBB) {
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  // Custom PPC PostRA specific behavior here.
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  PostGenericScheduler::enterMBB(MBB);
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}
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void PPCPostRASchedStrategy::leaveMBB() {
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  // Custom PPC PostRA specific behavior here.
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  PostGenericScheduler::leaveMBB();
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}
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void PPCPostRASchedStrategy::initialize(ScheduleDAGMI *Dag) {
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  // Custom PPC PostRA specific initialization here.
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  PostGenericScheduler::initialize(Dag);
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}
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SUnit *PPCPostRASchedStrategy::pickNode(bool &IsTopNode) {
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  // Custom PPC PostRA specific scheduling here.
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  return PostGenericScheduler::pickNode(IsTopNode);
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}
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