Coverage Report

Created: 2019-07-24 05:18

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/llvm/tools/clang/lib/Basic/Targets/PPC.cpp
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//===--- PPC.cpp - Implement PPC target feature support -------------------===//
2
//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4
// See https://llvm.org/LICENSE.txt for license information.
5
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6
//
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//===----------------------------------------------------------------------===//
8
//
9
// This file implements PPC TargetInfo objects.
10
//
11
//===----------------------------------------------------------------------===//
12
13
#include "PPC.h"
14
#include "clang/Basic/Diagnostic.h"
15
#include "clang/Basic/MacroBuilder.h"
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#include "clang/Basic/TargetBuiltins.h"
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18
using namespace clang;
19
using namespace clang::targets;
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21
const Builtin::Info PPCTargetInfo::BuiltinInfo[] = {
22
#define BUILTIN(ID, TYPE, ATTRS)                                               \
23
  {#ID, TYPE, ATTRS, nullptr, ALL_LANGUAGES, nullptr},
24
#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER)                                    \
25
  {#ID, TYPE, ATTRS, HEADER, ALL_LANGUAGES, nullptr},
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#include "clang/Basic/BuiltinsPPC.def"
27
};
28
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/// handleTargetFeatures - Perform initialization based on the user
30
/// configured set of features.
31
bool PPCTargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
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2.49k
                                         DiagnosticsEngine &Diags) {
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2.49k
  FloatABI = HardFloat;
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24.9k
  for (const auto &Feature : Features) {
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24.9k
    if (Feature == "+altivec") {
36
127
      HasAltivec = true;
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24.8k
    } else if (Feature == "+vsx") {
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87
      HasVSX = true;
39
24.7k
    } else if (Feature == "+bpermd") {
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62
      HasBPERMD = true;
41
24.7k
    } else if (Feature == "+extdiv") {
42
62
      HasExtDiv = true;
43
24.6k
    } else if (Feature == "+power8-vector") {
44
61
      HasP8Vector = true;
45
24.5k
    } else if (Feature == "+crypto") {
46
51
      HasP8Crypto = true;
47
24.5k
    } else if (Feature == "+direct-move") {
48
50
      HasDirectMove = true;
49
24.4k
    } else if (Feature == "+qpx") {
50
1
      HasQPX = true;
51
24.4k
    } else if (Feature == "+htm") {
52
57
      HasHTM = true;
53
24.4k
    } else if (Feature == "+float128") {
54
8
      HasFloat128 = true;
55
24.4k
    } else if (Feature == "+power9-vector") {
56
16
      HasP9Vector = true;
57
24.4k
    } else if (Feature == "-hard-float") {
58
2
      FloatABI = SoftFloat;
59
2
    }
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24.9k
    // TODO: Finish this list and add an assert that we've handled them
61
24.9k
    // all.
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24.9k
  }
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2.49k
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2.49k
  return true;
65
2.49k
}
66
67
/// PPCTargetInfo::getTargetDefines - Return a set of the PowerPC-specific
68
/// #defines that are not tied to a specific subtarget.
69
void PPCTargetInfo::getTargetDefines(const LangOptions &Opts,
70
2.49k
                                     MacroBuilder &Builder) const {
71
2.49k
  // Target identification.
72
2.49k
  Builder.defineMacro("__ppc__");
73
2.49k
  Builder.defineMacro("__PPC__");
74
2.49k
  Builder.defineMacro("_ARCH_PPC");
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2.49k
  Builder.defineMacro("__powerpc__");
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  Builder.defineMacro("__POWERPC__");
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2.49k
  if (PointerWidth == 64) {
78
2.42k
    Builder.defineMacro("_ARCH_PPC64");
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2.42k
    Builder.defineMacro("__powerpc64__");
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2.42k
    Builder.defineMacro("__ppc64__");
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2.42k
    Builder.defineMacro("__PPC64__");
82
2.42k
  }
83
2.49k
84
2.49k
  // Target properties.
85
2.49k
  if (getTriple().getArch() == llvm::Triple::ppc64le) {
86
2.27k
    Builder.defineMacro("_LITTLE_ENDIAN");
87
2.27k
  } else {
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220
    if (!getTriple().isOSNetBSD() &&
89
220
        
!getTriple().isOSOpenBSD()215
)
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212
      Builder.defineMacro("_BIG_ENDIAN");
91
220
  }
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2.49k
93
2.49k
  // ABI options.
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2.49k
  if (ABI == "elfv1" || 
ABI == "elfv1-qpx"2.35k
)
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    Builder.defineMacro("_CALL_ELF", "1");
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2.49k
  if (ABI == "elfv2")
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    Builder.defineMacro("_CALL_ELF", "2");
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2.49k
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2.49k
  // This typically is only for a new enough linker (bfd >= 2.16.2 or gold), but
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  // our support post-dates this and it should work on all 64-bit ppc linux
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2.49k
  // platforms. It is guaranteed to work on all elfv2 platforms.
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2.49k
  if (getTriple().getOS() == llvm::Triple::Linux && 
PointerWidth == 64193
)
103
170
    Builder.defineMacro("_CALL_LINUX", "1");
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2.49k
105
2.49k
  // Subtarget options.
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2.49k
  if (!getTriple().isOSAIX()){
107
2.47k
    Builder.defineMacro("__NATURAL_ALIGNMENT__");
108
2.47k
  }
109
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  Builder.defineMacro("__REGISTER_PREFIX__", "");
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  // FIXME: Should be controlled by command line option.
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  if (LongDoubleWidth == 128) {
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    Builder.defineMacro("__LONG_DOUBLE_128__");
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    Builder.defineMacro("__LONGDOUBLE128");
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  }
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2.49k
  // Define this for elfv2 (64-bit only) or 64-bit darwin.
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2.49k
  if (ABI == "elfv2" ||
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2.49k
      
(220
getTriple().getOS() == llvm::Triple::Darwin220
&&
PointerWidth == 646
))
120
2.27k
    Builder.defineMacro("__STRUCT_PARM_ALIGN__", "16");
121
2.49k
122
2.49k
  if (ArchDefs & ArchDefineName)
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4
    Builder.defineMacro(Twine("_ARCH_", StringRef(CPU).upper()));
124
2.49k
  if (ArchDefs & ArchDefinePpcgr)
125
86
    Builder.defineMacro("_ARCH_PPCGR");
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2.49k
  if (ArchDefs & ArchDefinePpcsq)
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81
    Builder.defineMacro("_ARCH_PPCSQ");
128
2.49k
  if (ArchDefs & ArchDefine440)
129
0
    Builder.defineMacro("_ARCH_440");
130
2.49k
  if (ArchDefs & ArchDefine603)
131
2
    Builder.defineMacro("_ARCH_603");
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2.49k
  if (ArchDefs & ArchDefine604)
133
0
    Builder.defineMacro("_ARCH_604");
134
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  if (ArchDefs & ArchDefinePwr4)
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81
    Builder.defineMacro("_ARCH_PWR4");
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2.49k
  if (ArchDefs & ArchDefinePwr5)
137
79
    Builder.defineMacro("_ARCH_PWR5");
138
2.49k
  if (ArchDefs & ArchDefinePwr5x)
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77
    Builder.defineMacro("_ARCH_PWR5X");
140
2.49k
  if (ArchDefs & ArchDefinePwr6)
141
75
    Builder.defineMacro("_ARCH_PWR6");
142
2.49k
  if (ArchDefs & ArchDefinePwr6x)
143
2
    Builder.defineMacro("_ARCH_PWR6X");
144
2.49k
  if (ArchDefs & ArchDefinePwr7)
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67
    Builder.defineMacro("_ARCH_PWR7");
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2.49k
  if (ArchDefs & ArchDefinePwr8)
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54
    Builder.defineMacro("_ARCH_PWR8");
148
2.49k
  if (ArchDefs & ArchDefinePwr9)
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13
    Builder.defineMacro("_ARCH_PWR9");
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2.49k
  if (ArchDefs & ArchDefineA2)
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1
    Builder.defineMacro("_ARCH_A2");
152
2.49k
  if (ArchDefs & ArchDefineA2q) {
153
1
    Builder.defineMacro("_ARCH_A2Q");
154
1
    Builder.defineMacro("_ARCH_QP");
155
1
  }
156
2.49k
157
2.49k
  if (getTriple().getVendor() == llvm::Triple::BGQ) {
158
1
    Builder.defineMacro("__bg__");
159
1
    Builder.defineMacro("__THW_BLUEGENE__");
160
1
    Builder.defineMacro("__bgq__");
161
1
    Builder.defineMacro("__TOS_BGQ__");
162
1
  }
163
2.49k
164
2.49k
  if (HasAltivec) {
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127
    Builder.defineMacro("__VEC__", "10206");
166
127
    Builder.defineMacro("__ALTIVEC__");
167
127
  }
168
2.49k
  if (HasVSX)
169
87
    Builder.defineMacro("__VSX__");
170
2.49k
  if (HasP8Vector)
171
61
    Builder.defineMacro("__POWER8_VECTOR__");
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2.49k
  if (HasP8Crypto)
173
51
    Builder.defineMacro("__CRYPTO__");
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2.49k
  if (HasHTM)
175
57
    Builder.defineMacro("__HTM__");
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2.49k
  if (HasFloat128)
177
8
    Builder.defineMacro("__FLOAT128__");
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2.49k
  if (HasP9Vector)
179
16
    Builder.defineMacro("__POWER9_VECTOR__");
180
2.49k
181
2.49k
  Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1");
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2.49k
  Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2");
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2.49k
  Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4");
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2.49k
  if (PointerWidth == 64)
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    Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8");
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2.49k
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2.49k
  // We have support for the bswap intrinsics so we can define this.
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  Builder.defineMacro("__HAVE_BSWAP__", "1");
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  // FIXME: The following are not yet generated here by Clang, but are
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  //        generated by GCC:
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  //
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2.49k
  //   _SOFT_FLOAT_
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2.49k
  //   __RECIP_PRECISION__
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  //   __APPLE_ALTIVEC__
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2.49k
  //   __RECIP__
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2.49k
  //   __RECIPF__
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2.49k
  //   __RSQRTE__
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2.49k
  //   __RSQRTEF__
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  //   _SOFT_DOUBLE_
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2.49k
  //   __NO_LWSYNC__
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2.49k
  //   __CMODEL_MEDIUM__
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2.49k
  //   __CMODEL_LARGE__
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2.49k
  //   _CALL_SYSV
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2.49k
  //   _CALL_DARWIN
206
2.49k
  //   __NO_FPRS__
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2.49k
}
208
209
// Handle explicit options being passed to the compiler here: if we've
210
// explicitly turned off vsx and turned on any of:
211
// - power8-vector
212
// - direct-move
213
// - float128
214
// - power9-vector
215
// then go ahead and error since the customer has expressed an incompatible
216
// set of options.
217
static bool ppcUserFeaturesCheck(DiagnosticsEngine &Diags,
218
2.50k
                                 const std::vector<std::string> &FeaturesVec) {
219
2.50k
220
2.50k
  if (llvm::find(FeaturesVec, "-vsx") != FeaturesVec.end()) {
221
10
    if (llvm::find(FeaturesVec, "+power8-vector") != FeaturesVec.end()) {
222
4
      Diags.Report(diag::err_opt_not_valid_with_opt) << "-mpower8-vector"
223
4
                                                     << "-mno-vsx";
224
4
      return false;
225
4
    }
226
6
227
6
    if (llvm::find(FeaturesVec, "+direct-move") != FeaturesVec.end()) {
228
2
      Diags.Report(diag::err_opt_not_valid_with_opt) << "-mdirect-move"
229
2
                                                     << "-mno-vsx";
230
2
      return false;
231
2
    }
232
4
233
4
    if (llvm::find(FeaturesVec, "+float128") != FeaturesVec.end()) {
234
1
      Diags.Report(diag::err_opt_not_valid_with_opt) << "-mfloat128"
235
1
                                                     << "-mno-vsx";
236
1
      return false;
237
1
    }
238
3
239
3
    if (llvm::find(FeaturesVec, "+power9-vector") != FeaturesVec.end()) {
240
1
      Diags.Report(diag::err_opt_not_valid_with_opt) << "-mpower9-vector"
241
1
                                                     << "-mno-vsx";
242
1
      return false;
243
1
    }
244
2.50k
  }
245
2.50k
246
2.50k
  return true;
247
2.50k
}
248
249
bool PPCTargetInfo::initFeatureMap(
250
    llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags, StringRef CPU,
251
2.50k
    const std::vector<std::string> &FeaturesVec) const {
252
2.50k
  Features["altivec"] = llvm::StringSwitch<bool>(CPU)
253
2.50k
                            .Case("7400", true)
254
2.50k
                            .Case("g4", true)
255
2.50k
                            .Case("7450", true)
256
2.50k
                            .Case("g4+", true)
257
2.50k
                            .Case("970", true)
258
2.50k
                            .Case("g5", true)
259
2.50k
                            .Case("pwr6", true)
260
2.50k
                            .Case("pwr7", true)
261
2.50k
                            .Case("pwr8", true)
262
2.50k
                            .Case("pwr9", true)
263
2.50k
                            .Case("ppc64", true)
264
2.50k
                            .Case("ppc64le", true)
265
2.50k
                            .Default(false);
266
2.50k
267
2.50k
  Features["qpx"] = (CPU == "a2q");
268
2.50k
  Features["power9-vector"] = (CPU == "pwr9");
269
2.50k
  Features["crypto"] = llvm::StringSwitch<bool>(CPU)
270
2.50k
                           .Case("ppc64le", true)
271
2.50k
                           .Case("pwr9", true)
272
2.50k
                           .Case("pwr8", true)
273
2.50k
                           .Default(false);
274
2.50k
  Features["power8-vector"] = llvm::StringSwitch<bool>(CPU)
275
2.50k
                                  .Case("ppc64le", true)
276
2.50k
                                  .Case("pwr9", true)
277
2.50k
                                  .Case("pwr8", true)
278
2.50k
                                  .Default(false);
279
2.50k
  Features["bpermd"] = llvm::StringSwitch<bool>(CPU)
280
2.50k
                           .Case("ppc64le", true)
281
2.50k
                           .Case("pwr9", true)
282
2.50k
                           .Case("pwr8", true)
283
2.50k
                           .Case("pwr7", true)
284
2.50k
                           .Default(false);
285
2.50k
  Features["extdiv"] = llvm::StringSwitch<bool>(CPU)
286
2.50k
                           .Case("ppc64le", true)
287
2.50k
                           .Case("pwr9", true)
288
2.50k
                           .Case("pwr8", true)
289
2.50k
                           .Case("pwr7", true)
290
2.50k
                           .Default(false);
291
2.50k
  Features["direct-move"] = llvm::StringSwitch<bool>(CPU)
292
2.50k
                                .Case("ppc64le", true)
293
2.50k
                                .Case("pwr9", true)
294
2.50k
                                .Case("pwr8", true)
295
2.50k
                                .Default(false);
296
2.50k
  Features["vsx"] = llvm::StringSwitch<bool>(CPU)
297
2.50k
                        .Case("ppc64le", true)
298
2.50k
                        .Case("pwr9", true)
299
2.50k
                        .Case("pwr8", true)
300
2.50k
                        .Case("pwr7", true)
301
2.50k
                        .Default(false);
302
2.50k
  Features["htm"] = llvm::StringSwitch<bool>(CPU)
303
2.50k
                        .Case("ppc64le", true)
304
2.50k
                        .Case("pwr9", true)
305
2.50k
                        .Case("pwr8", true)
306
2.50k
                        .Default(false);
307
2.50k
308
2.50k
  if (!ppcUserFeaturesCheck(Diags, FeaturesVec))
309
8
    return false;
310
2.50k
311
2.50k
  if (!(ArchDefs & ArchDefinePwr9) && 
(ArchDefs & ArchDefinePpcgr)2.48k
&&
312
2.50k
      
llvm::find(FeaturesVec, "+float128") != FeaturesVec.end()76
) {
313
3
    // We have __float128 on PPC but not power 9 and above.
314
3
    Diags.Report(diag::err_opt_not_valid_with_opt) << "-mfloat128" << CPU;
315
3
    return false;
316
3
  }
317
2.49k
318
2.49k
  return TargetInfo::initFeatureMap(Features, Diags, CPU, FeaturesVec);
319
2.49k
}
320
321
16.9k
bool PPCTargetInfo::hasFeature(StringRef Feature) const {
322
16.9k
  return llvm::StringSwitch<bool>(Feature)
323
16.9k
      .Case("powerpc", true)
324
16.9k
      .Case("altivec", HasAltivec)
325
16.9k
      .Case("vsx", HasVSX)
326
16.9k
      .Case("power8-vector", HasP8Vector)
327
16.9k
      .Case("crypto", HasP8Crypto)
328
16.9k
      .Case("direct-move", HasDirectMove)
329
16.9k
      .Case("qpx", HasQPX)
330
16.9k
      .Case("htm", HasHTM)
331
16.9k
      .Case("bpermd", HasBPERMD)
332
16.9k
      .Case("extdiv", HasExtDiv)
333
16.9k
      .Case("float128", HasFloat128)
334
16.9k
      .Case("power9-vector", HasP9Vector)
335
16.9k
      .Default(false);
336
16.9k
}
337
338
void PPCTargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
339
105
                                      StringRef Name, bool Enabled) const {
340
105
  if (Enabled) {
341
97
    // If we're enabling any of the vsx based features then enable vsx and
342
97
    // altivec. We'll diagnose any problems later.
343
97
    bool FeatureHasVSX = llvm::StringSwitch<bool>(Name)
344
97
                             .Case("vsx", true)
345
97
                             .Case("direct-move", true)
346
97
                             .Case("power8-vector", true)
347
97
                             .Case("power9-vector", true)
348
97
                             .Case("float128", true)
349
97
                             .Default(false);
350
97
    if (FeatureHasVSX)
351
36
      Features["vsx"] = Features["altivec"] = true;
352
97
    if (Name == "power9-vector")
353
5
      Features["power8-vector"] = true;
354
97
    Features[Name] = true;
355
97
  } else {
356
8
    // If we're disabling altivec or vsx go ahead and disable all of the vsx
357
8
    // features.
358
8
    if ((Name == "altivec") || (Name == "vsx"))
359
2
      Features["vsx"] = Features["direct-move"] = Features["power8-vector"] =
360
2
          Features["float128"] = Features["power9-vector"] = false;
361
8
    if (Name == "power8-vector")
362
1
      Features["power9-vector"] = false;
363
8
    Features[Name] = false;
364
8
  }
365
105
}
366
367
const char *const PPCTargetInfo::GCCRegNames[] = {
368
    "r0",  "r1",     "r2",   "r3",      "r4",      "r5",  "r6",  "r7",  "r8",
369
    "r9",  "r10",    "r11",  "r12",     "r13",     "r14", "r15", "r16", "r17",
370
    "r18", "r19",    "r20",  "r21",     "r22",     "r23", "r24", "r25", "r26",
371
    "r27", "r28",    "r29",  "r30",     "r31",     "f0",  "f1",  "f2",  "f3",
372
    "f4",  "f5",     "f6",   "f7",      "f8",      "f9",  "f10", "f11", "f12",
373
    "f13", "f14",    "f15",  "f16",     "f17",     "f18", "f19", "f20", "f21",
374
    "f22", "f23",    "f24",  "f25",     "f26",     "f27", "f28", "f29", "f30",
375
    "f31", "mq",     "lr",   "ctr",     "ap",      "cr0", "cr1", "cr2", "cr3",
376
    "cr4", "cr5",    "cr6",  "cr7",     "xer",     "v0",  "v1",  "v2",  "v3",
377
    "v4",  "v5",     "v6",   "v7",      "v8",      "v9",  "v10", "v11", "v12",
378
    "v13", "v14",    "v15",  "v16",     "v17",     "v18", "v19", "v20", "v21",
379
    "v22", "v23",    "v24",  "v25",     "v26",     "v27", "v28", "v29", "v30",
380
    "v31", "vrsave", "vscr", "spe_acc", "spefscr", "sfp"
381
};
382
383
62
ArrayRef<const char *> PPCTargetInfo::getGCCRegNames() const {
384
62
  return llvm::makeArrayRef(GCCRegNames);
385
62
}
386
387
const TargetInfo::GCCRegAlias PPCTargetInfo::GCCRegAliases[] = {
388
    // While some of these aliases do map to different registers
389
    // they still share the same register name.
390
    {{"0"}, "r0"},     {{"1"}, "r1"},     {{"2"}, "r2"},     {{"3"}, "r3"},
391
    {{"4"}, "r4"},     {{"5"}, "r5"},     {{"6"}, "r6"},     {{"7"}, "r7"},
392
    {{"8"}, "r8"},     {{"9"}, "r9"},     {{"10"}, "r10"},   {{"11"}, "r11"},
393
    {{"12"}, "r12"},   {{"13"}, "r13"},   {{"14"}, "r14"},   {{"15"}, "r15"},
394
    {{"16"}, "r16"},   {{"17"}, "r17"},   {{"18"}, "r18"},   {{"19"}, "r19"},
395
    {{"20"}, "r20"},   {{"21"}, "r21"},   {{"22"}, "r22"},   {{"23"}, "r23"},
396
    {{"24"}, "r24"},   {{"25"}, "r25"},   {{"26"}, "r26"},   {{"27"}, "r27"},
397
    {{"28"}, "r28"},   {{"29"}, "r29"},   {{"30"}, "r30"},   {{"31"}, "r31"},
398
    {{"fr0"}, "f0"},   {{"fr1"}, "f1"},   {{"fr2"}, "f2"},   {{"fr3"}, "f3"},
399
    {{"fr4"}, "f4"},   {{"fr5"}, "f5"},   {{"fr6"}, "f6"},   {{"fr7"}, "f7"},
400
    {{"fr8"}, "f8"},   {{"fr9"}, "f9"},   {{"fr10"}, "f10"}, {{"fr11"}, "f11"},
401
    {{"fr12"}, "f12"}, {{"fr13"}, "f13"}, {{"fr14"}, "f14"}, {{"fr15"}, "f15"},
402
    {{"fr16"}, "f16"}, {{"fr17"}, "f17"}, {{"fr18"}, "f18"}, {{"fr19"}, "f19"},
403
    {{"fr20"}, "f20"}, {{"fr21"}, "f21"}, {{"fr22"}, "f22"}, {{"fr23"}, "f23"},
404
    {{"fr24"}, "f24"}, {{"fr25"}, "f25"}, {{"fr26"}, "f26"}, {{"fr27"}, "f27"},
405
    {{"fr28"}, "f28"}, {{"fr29"}, "f29"}, {{"fr30"}, "f30"}, {{"fr31"}, "f31"},
406
    {{"cc"}, "cr0"},
407
};
408
409
56
ArrayRef<TargetInfo::GCCRegAlias> PPCTargetInfo::getGCCRegAliases() const {
410
56
  return llvm::makeArrayRef(GCCRegAliases);
411
56
}
412
413
// PPC ELFABIv2 DWARF Definitoin "Table 2.26. Mappings of Common Registers".
414
// vs0 ~ vs31 is mapping to 32 - 63,
415
// vs32 ~ vs63 is mapping to 77 - 108. 
416
const TargetInfo::AddlRegName GCCAddlRegNames[] = {
417
    // Table of additional register names to use in user input.
418
    {{"vs0"}, 32},   {{"vs1"}, 33},   {{"vs2"}, 34},   {{"vs3"}, 35}, 
419
    {{"vs4"}, 36},   {{"vs5"}, 37},   {{"vs6"}, 38},   {{"vs7"}, 39},
420
    {{"vs8"}, 40},   {{"vs9"}, 41},   {{"vs10"}, 42},  {{"vs11"}, 43},
421
    {{"vs12"}, 44},  {{"vs13"}, 45},  {{"vs14"}, 46},  {{"vs15"}, 47},
422
    {{"vs16"}, 48},  {{"vs17"}, 49},  {{"vs18"}, 50},  {{"vs19"}, 51},
423
    {{"vs20"}, 52},  {{"vs21"}, 53},  {{"vs22"}, 54},  {{"vs23"}, 55},
424
    {{"vs24"}, 56},  {{"vs25"}, 57},  {{"vs26"}, 58},  {{"vs27"}, 59},
425
    {{"vs28"}, 60},  {{"vs29"}, 61},  {{"vs30"}, 62},  {{"vs31"}, 63},
426
    {{"vs32"}, 77},  {{"vs33"}, 78},  {{"vs34"}, 79},  {{"vs35"}, 80},
427
    {{"vs36"}, 81},  {{"vs37"}, 82},  {{"vs38"}, 83},  {{"vs39"}, 84},
428
    {{"vs40"}, 85},  {{"vs41"}, 86},  {{"vs42"}, 87},  {{"vs43"}, 88},
429
    {{"vs44"}, 89},  {{"vs45"}, 90},  {{"vs46"}, 91},  {{"vs47"}, 92},
430
    {{"vs48"}, 93},  {{"vs49"}, 94},  {{"vs50"}, 95},  {{"vs51"}, 96},
431
    {{"vs52"}, 97},  {{"vs53"}, 98},  {{"vs54"}, 99},  {{"vs55"}, 100},
432
    {{"vs56"}, 101}, {{"vs57"}, 102}, {{"vs58"}, 103}, {{"vs59"}, 104},
433
    {{"vs60"}, 105}, {{"vs61"}, 106}, {{"vs62"}, 107}, {{"vs63"}, 108},
434
};
435
436
59
ArrayRef<TargetInfo::AddlRegName> PPCTargetInfo::getGCCAddlRegNames() const {
437
59
  if (ABI == "elfv2")
438
26
    return llvm::makeArrayRef(GCCAddlRegNames);
439
33
  else 
440
33
    return TargetInfo::getGCCAddlRegNames(); 
441
59
}
442
443
static constexpr llvm::StringLiteral ValidCPUNames[] = {
444
    {"generic"}, {"440"},         {"450"},     {"601"},    {"602"},
445
    {"603"},     {"603e"},        {"603ev"},   {"604"},    {"604e"},
446
    {"620"},     {"630"},         {"g3"},      {"7400"},   {"g4"},
447
    {"7450"},    {"g4+"},         {"750"},     {"970"},    {"g5"},
448
    {"a2"},      {"a2q"},         {"e500mc"},  {"e5500"},  {"power3"},
449
    {"pwr3"},    {"power4"},      {"pwr4"},    {"power5"}, {"pwr5"},
450
    {"power5x"}, {"pwr5x"},       {"power6"},  {"pwr6"},   {"power6x"},
451
    {"pwr6x"},   {"power7"},      {"pwr7"},    {"power8"}, {"pwr8"},
452
    {"power9"},  {"pwr9"},        {"powerpc"}, {"ppc"},    {"powerpc64"},
453
    {"ppc64"},   {"powerpc64le"}, {"ppc64le"},
454
};
455
456
116
bool PPCTargetInfo::isValidCPUName(StringRef Name) const {
457
116
  return llvm::find(ValidCPUNames, Name) != std::end(ValidCPUNames);
458
116
}
459
460
1
void PPCTargetInfo::fillValidCPUList(SmallVectorImpl<StringRef> &Values) const {
461
1
  Values.append(std::begin(ValidCPUNames), std::end(ValidCPUNames));
462
1
}
463
464
4.96k
void PPCTargetInfo::adjust(LangOptions &Opts) {
465
4.96k
  if (HasAltivec)
466
254
    Opts.AltiVec = 1;
467
4.96k
  TargetInfo::adjust(Opts);
468
4.96k
  if (LongDoubleFormat != &llvm::APFloat::IEEEdouble())
469
4.90k
    LongDoubleFormat = Opts.PPCIEEELongDouble
470
4.90k
                           ? 
&llvm::APFloat::IEEEquad()4
471
4.90k
                           : 
&llvm::APFloat::PPCDoubleDouble()4.89k
;
472
4.96k
}
473
474
2.49k
ArrayRef<Builtin::Info> PPCTargetInfo::getTargetBuiltins() const {
475
2.49k
  return llvm::makeArrayRef(BuiltinInfo, clang::PPC::LastTSBuiltin -
476
2.49k
                                             Builtin::FirstTSBuiltin);
477
2.49k
}