Coverage Report

Created: 2019-07-24 05:18

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/llvm/tools/clang/lib/Basic/Targets/RISCV.cpp
Line
Count
Source (jump to first uncovered line)
1
//===--- RISCV.cpp - Implement RISCV target feature support ---------------===//
2
//
3
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4
// See https://llvm.org/LICENSE.txt for license information.
5
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6
//
7
//===----------------------------------------------------------------------===//
8
//
9
// This file implements RISCV TargetInfo objects.
10
//
11
//===----------------------------------------------------------------------===//
12
13
#include "RISCV.h"
14
#include "clang/Basic/MacroBuilder.h"
15
#include "llvm/ADT/StringSwitch.h"
16
17
using namespace clang;
18
using namespace clang::targets;
19
20
0
ArrayRef<const char *> RISCVTargetInfo::getGCCRegNames() const {
21
0
  static const char *const GCCRegNames[] = {
22
0
      "x0",  "x1",  "x2",  "x3",  "x4",  "x5",  "x6",  "x7",
23
0
      "x8",  "x9",  "x10", "x11", "x12", "x13", "x14", "x15",
24
0
      "x16", "x17", "x18", "x19", "x20", "x21", "x22", "x23",
25
0
      "x24", "x25", "x26", "x27", "x28", "x29", "x30", "x31"};
26
0
  return llvm::makeArrayRef(GCCRegNames);
27
0
}
28
29
0
ArrayRef<TargetInfo::GCCRegAlias> RISCVTargetInfo::getGCCRegAliases() const {
30
0
  static const TargetInfo::GCCRegAlias GCCRegAliases[] = {
31
0
      {{"zero"}, "x0"}, {{"ra"}, "x1"},  {{"sp"}, "x2"},   {{"gp"}, "x3"},
32
0
      {{"tp"}, "x4"},   {{"t0"}, "x5"},  {{"t1"}, "x6"},   {{"t2"}, "x7"},
33
0
      {{"s0"}, "x8"},   {{"s1"}, "x9"},  {{"a0"}, "x10"},  {{"a1"}, "x11"},
34
0
      {{"a2"}, "x12"},  {{"a3"}, "x13"}, {{"a4"}, "x14"},  {{"a5"}, "x15"},
35
0
      {{"a6"}, "x16"},  {{"a7"}, "x17"}, {{"s2"}, "x18"},  {{"s3"}, "x19"},
36
0
      {{"s4"}, "x20"},  {{"s5"}, "x21"}, {{"s6"}, "x22"},  {{"s7"}, "x23"},
37
0
      {{"s8"}, "x24"},  {{"s9"}, "x25"}, {{"s10"}, "x26"}, {{"s11"}, "x27"},
38
0
      {{"t3"}, "x28"},  {{"t4"}, "x29"}, {{"t5"}, "x30"},  {{"t6"}, "x31"}};
39
0
  return llvm::makeArrayRef(GCCRegAliases);
40
0
}
41
42
bool RISCVTargetInfo::validateAsmConstraint(
43
38
    const char *&Name, TargetInfo::ConstraintInfo &Info) const {
44
38
  switch (*Name) {
45
38
  default:
46
0
    return false;
47
38
  case 'I':
48
14
    // A 12-bit signed immediate.
49
14
    Info.setRequiresImmediate(-2048, 2047);
50
14
    return true;
51
38
  case 'J':
52
10
    // Integer zero.
53
10
    Info.setRequiresImmediate(0);
54
10
    return true;
55
38
  case 'K':
56
14
    // A 5-bit unsigned immediate for CSR access instructions.
57
14
    Info.setRequiresImmediate(0, 31);
58
14
    return true;
59
38
  }
60
38
}
61
62
void RISCVTargetInfo::getTargetDefines(const LangOptions &Opts,
63
68
                                       MacroBuilder &Builder) const {
64
68
  Builder.defineMacro("__ELF__");
65
68
  Builder.defineMacro("__riscv");
66
68
  bool Is64Bit = getTriple().getArch() == llvm::Triple::riscv64;
67
68
  Builder.defineMacro("__riscv_xlen", Is64Bit ? 
"64"31
:
"32"37
);
68
68
  // TODO: modify when more code models are supported.
69
68
  Builder.defineMacro("__riscv_cmodel_medlow");
70
68
71
68
  StringRef ABIName = getABI();
72
68
  if (ABIName == "ilp32f" || 
ABIName == "lp64f"63
)
73
9
    Builder.defineMacro("__riscv_float_abi_single");
74
59
  else if (ABIName == "ilp32d" || 
ABIName == "lp64d"55
)
75
8
    Builder.defineMacro("__riscv_float_abi_double");
76
51
  else if (ABIName == "ilp32e")
77
0
    Builder.defineMacro("__riscv_abi_rve");
78
51
  else
79
51
    Builder.defineMacro("__riscv_float_abi_soft");
80
68
81
68
  if (HasM) {
82
2
    Builder.defineMacro("__riscv_mul");
83
2
    Builder.defineMacro("__riscv_div");
84
2
    Builder.defineMacro("__riscv_muldiv");
85
2
  }
86
68
87
68
  if (HasA)
88
2
    Builder.defineMacro("__riscv_atomic");
89
68
90
68
  if (HasF || 
HasD51
) {
91
23
    Builder.defineMacro("__riscv_flen", HasD ? 
"64"14
:
"32"9
);
92
23
    Builder.defineMacro("__riscv_fdiv");
93
23
    Builder.defineMacro("__riscv_fsqrt");
94
23
  }
95
68
96
68
  if (HasC)
97
2
    Builder.defineMacro("__riscv_compressed");
98
68
}
99
100
/// Return true if has this feature, need to sync with handleTargetFeatures.
101
80
bool RISCVTargetInfo::hasFeature(StringRef Feature) const {
102
80
  bool Is64Bit = getTriple().getArch() == llvm::Triple::riscv64;
103
80
  return llvm::StringSwitch<bool>(Feature)
104
80
      .Case("riscv", true)
105
80
      .Case("riscv32", !Is64Bit)
106
80
      .Case("riscv64", Is64Bit)
107
80
      .Case("m", HasM)
108
80
      .Case("a", HasA)
109
80
      .Case("f", HasF)
110
80
      .Case("d", HasD)
111
80
      .Case("c", HasC)
112
80
      .Default(false);
113
80
}
114
115
/// Perform initialization based on the user configured set of features.
116
bool RISCVTargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
117
68
                                           DiagnosticsEngine &Diags) {
118
68
  for (const auto &Feature : Features) {
119
60
    if (Feature == "+m")
120
2
      HasM = true;
121
58
    else if (Feature == "+a")
122
2
      HasA = true;
123
56
    else if (Feature == "+f")
124
17
      HasF = true;
125
39
    else if (Feature == "+d")
126
14
      HasD = true;
127
25
    else if (Feature == "+c")
128
2
      HasC = true;
129
60
  }
130
68
131
68
  return true;
132
68
}