Coverage Report

Created: 2019-07-24 05:18

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/llvm/tools/clang/lib/CodeGen/CGRecordLayout.h
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//===--- CGRecordLayout.h - LLVM Record Layout Information ------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CLANG_LIB_CODEGEN_CGRECORDLAYOUT_H
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#define LLVM_CLANG_LIB_CODEGEN_CGRECORDLAYOUT_H
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#include "clang/AST/CharUnits.h"
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#include "clang/AST/DeclCXX.h"
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#include "clang/Basic/LLVM.h"
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#include "llvm/ADT/DenseMap.h"
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#include "llvm/IR/DerivedTypes.h"
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namespace llvm {
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  class StructType;
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}
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namespace clang {
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namespace CodeGen {
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/// Structure with information about how a bitfield should be accessed.
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///
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/// Often we layout a sequence of bitfields as a contiguous sequence of bits.
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/// When the AST record layout does this, we represent it in the LLVM IR's type
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/// as either a sequence of i8 members or a byte array to reserve the number of
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/// bytes touched without forcing any particular alignment beyond the basic
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/// character alignment.
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///
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/// Then accessing a particular bitfield involves converting this byte array
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/// into a single integer of that size (i24 or i40 -- may not be power-of-two
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/// size), loading it, and shifting and masking to extract the particular
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/// subsequence of bits which make up that particular bitfield. This structure
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/// encodes the information used to construct the extraction code sequences.
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/// The CGRecordLayout also has a field index which encodes which byte-sequence
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/// this bitfield falls within. Let's assume the following C struct:
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///
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///   struct S {
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///     char a, b, c;
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///     unsigned bits : 3;
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///     unsigned more_bits : 4;
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///     unsigned still_more_bits : 7;
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///   };
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///
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/// This will end up as the following LLVM type. The first array is the
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/// bitfield, and the second is the padding out to a 4-byte alignmnet.
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///
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///   %t = type { i8, i8, i8, i8, i8, [3 x i8] }
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///
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/// When generating code to access more_bits, we'll generate something
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/// essentially like this:
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///
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///   define i32 @foo(%t* %base) {
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///     %0 = gep %t* %base, i32 0, i32 3
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///     %2 = load i8* %1
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///     %3 = lshr i8 %2, 3
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///     %4 = and i8 %3, 15
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///     %5 = zext i8 %4 to i32
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///     ret i32 %i
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///   }
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///
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struct CGBitFieldInfo {
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  /// The offset within a contiguous run of bitfields that are represented as
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  /// a single "field" within the LLVM struct type. This offset is in bits.
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  unsigned Offset : 16;
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  /// The total size of the bit-field, in bits.
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  unsigned Size : 15;
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  /// Whether the bit-field is signed.
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  unsigned IsSigned : 1;
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  /// The storage size in bits which should be used when accessing this
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  /// bitfield.
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  unsigned StorageSize;
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  /// The offset of the bitfield storage from the start of the struct.
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  CharUnits StorageOffset;
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  CGBitFieldInfo()
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      : Offset(), Size(), IsSigned(), StorageSize(), StorageOffset() {}
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  CGBitFieldInfo(unsigned Offset, unsigned Size, bool IsSigned,
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                 unsigned StorageSize, CharUnits StorageOffset)
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      : Offset(Offset), Size(Size), IsSigned(IsSigned),
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        StorageSize(StorageSize), StorageOffset(StorageOffset) {}
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  void print(raw_ostream &OS) const;
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  void dump() const;
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  /// Given a bit-field decl, build an appropriate helper object for
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  /// accessing that field (which is expected to have the given offset and
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  /// size).
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  static CGBitFieldInfo MakeInfo(class CodeGenTypes &Types,
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                                 const FieldDecl *FD,
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                                 uint64_t Offset, uint64_t Size,
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                                 uint64_t StorageSize,
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                                 CharUnits StorageOffset);
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};
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/// CGRecordLayout - This class handles struct and union layout info while
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/// lowering AST types to LLVM types.
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///
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/// These layout objects are only created on demand as IR generation requires.
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class CGRecordLayout {
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  friend class CodeGenTypes;
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  CGRecordLayout(const CGRecordLayout &) = delete;
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  void operator=(const CGRecordLayout &) = delete;
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private:
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  /// The LLVM type corresponding to this record layout; used when
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  /// laying it out as a complete object.
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  llvm::StructType *CompleteObjectType;
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  /// The LLVM type for the non-virtual part of this record layout;
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  /// used when laying it out as a base subobject.
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  llvm::StructType *BaseSubobjectType;
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  /// Map from (non-bit-field) struct field to the corresponding llvm struct
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  /// type field no. This info is populated by record builder.
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  llvm::DenseMap<const FieldDecl *, unsigned> FieldInfo;
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  /// Map from (bit-field) struct field to the corresponding llvm struct type
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  /// field no. This info is populated by record builder.
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  llvm::DenseMap<const FieldDecl *, CGBitFieldInfo> BitFields;
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  // FIXME: Maybe we could use a CXXBaseSpecifier as the key and use a single
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  // map for both virtual and non-virtual bases.
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  llvm::DenseMap<const CXXRecordDecl *, unsigned> NonVirtualBases;
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  /// Map from virtual bases to their field index in the complete object.
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  llvm::DenseMap<const CXXRecordDecl *, unsigned> CompleteObjectVirtualBases;
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  /// False if any direct or indirect subobject of this class, when
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  /// considered as a complete object, requires a non-zero bitpattern
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  /// when zero-initialized.
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  bool IsZeroInitializable : 1;
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  /// False if any direct or indirect subobject of this class, when
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  /// considered as a base subobject, requires a non-zero bitpattern
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  /// when zero-initialized.
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  bool IsZeroInitializableAsBase : 1;
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public:
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  CGRecordLayout(llvm::StructType *CompleteObjectType,
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                 llvm::StructType *BaseSubobjectType,
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                 bool IsZeroInitializable,
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                 bool IsZeroInitializableAsBase)
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    : CompleteObjectType(CompleteObjectType),
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      BaseSubobjectType(BaseSubobjectType),
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      IsZeroInitializable(IsZeroInitializable),
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      IsZeroInitializableAsBase(IsZeroInitializableAsBase) {}
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  /// Return the "complete object" LLVM type associated with
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  /// this record.
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  llvm::StructType *getLLVMType() const {
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    return CompleteObjectType;
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  }
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  /// Return the "base subobject" LLVM type associated with
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  /// this record.
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  llvm::StructType *getBaseSubobjectLLVMType() const {
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    return BaseSubobjectType;
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  }
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  /// Check whether this struct can be C++ zero-initialized
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  /// with a zeroinitializer.
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  bool isZeroInitializable() const {
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    return IsZeroInitializable;
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  }
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  /// Check whether this struct can be C++ zero-initialized
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  /// with a zeroinitializer when considered as a base subobject.
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  bool isZeroInitializableAsBase() const {
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    return IsZeroInitializableAsBase;
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  }
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  /// Return llvm::StructType element number that corresponds to the
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  /// field FD.
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  unsigned getLLVMFieldNo(const FieldDecl *FD) const {
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    FD = FD->getCanonicalDecl();
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    assert(FieldInfo.count(FD) && "Invalid field for record!");
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    return FieldInfo.lookup(FD);
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  }
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  unsigned getNonVirtualBaseLLVMFieldNo(const CXXRecordDecl *RD) const {
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    assert(NonVirtualBases.count(RD) && "Invalid non-virtual base!");
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    return NonVirtualBases.lookup(RD);
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  }
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  /// Return the LLVM field index corresponding to the given
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  /// virtual base.  Only valid when operating on the complete object.
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  unsigned getVirtualBaseIndex(const CXXRecordDecl *base) const {
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    assert(CompleteObjectVirtualBases.count(base) && "Invalid virtual base!");
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    return CompleteObjectVirtualBases.lookup(base);
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  }
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  /// Return the BitFieldInfo that corresponds to the field FD.
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  const CGBitFieldInfo &getBitFieldInfo(const FieldDecl *FD) const {
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    FD = FD->getCanonicalDecl();
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    assert(FD->isBitField() && "Invalid call for non-bit-field decl!");
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    llvm::DenseMap<const FieldDecl *, CGBitFieldInfo>::const_iterator
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      it = BitFields.find(FD);
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    assert(it != BitFields.end() && "Unable to find bitfield info");
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    return it->second;
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  }
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  void print(raw_ostream &OS) const;
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  void dump() const;
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};
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}  // end namespace CodeGen
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}  // end namespace clang
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#endif