Coverage Report

Created: 2019-07-24 05:18

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/llvm/tools/clang/lib/Driver/ToolChains/Arch/ARM.cpp
Line
Count
Source (jump to first uncovered line)
1
//===--- ARM.cpp - ARM (not AArch64) Helpers for Tools ----------*- C++ -*-===//
2
//
3
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4
// See https://llvm.org/LICENSE.txt for license information.
5
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6
//
7
//===----------------------------------------------------------------------===//
8
9
#include "ARM.h"
10
#include "clang/Driver/Driver.h"
11
#include "clang/Driver/DriverDiagnostic.h"
12
#include "clang/Driver/Options.h"
13
#include "llvm/ADT/StringSwitch.h"
14
#include "llvm/Option/ArgList.h"
15
#include "llvm/Support/TargetParser.h"
16
17
using namespace clang::driver;
18
using namespace clang::driver::tools;
19
using namespace clang;
20
using namespace llvm::opt;
21
22
// Get SubArch (vN).
23
14.1k
int arm::getARMSubArchVersionNumber(const llvm::Triple &Triple) {
24
14.1k
  llvm::StringRef Arch = Triple.getArchName();
25
14.1k
  return llvm::ARM::parseArchVersion(Arch);
26
14.1k
}
27
28
// True if M-profile.
29
20
bool arm::isARMMProfile(const llvm::Triple &Triple) {
30
20
  llvm::StringRef Arch = Triple.getArchName();
31
20
  return llvm::ARM::parseArchProfile(Arch) == llvm::ARM::ProfileKind::M;
32
20
}
33
34
// Get Arch/CPU from args.
35
void arm::getARMArchCPUFromArgs(const ArgList &Args, llvm::StringRef &Arch,
36
9.53k
                                llvm::StringRef &CPU, bool FromAs) {
37
9.53k
  if (const Arg *A = Args.getLastArg(clang::driver::options::OPT_mcpu_EQ))
38
1.03k
    CPU = A->getValue();
39
9.53k
  if (const Arg *A = Args.getLastArg(options::OPT_march_EQ))
40
7.14k
    Arch = A->getValue();
41
9.53k
  if (!FromAs)
42
8.82k
    return;
43
711
44
711
  for (const Arg *A :
45
711
       Args.filtered(options::OPT_Wa_COMMA, options::OPT_Xassembler)) {
46
14
    StringRef Value = A->getValue();
47
14
    if (Value.startswith("-mcpu="))
48
3
      CPU = Value.substr(6);
49
14
    if (Value.startswith("-march="))
50
2
      Arch = Value.substr(7);
51
14
  }
52
711
}
53
54
// Handle -mhwdiv=.
55
// FIXME: Use ARMTargetParser.
56
static void getARMHWDivFeatures(const Driver &D, const Arg *A,
57
                                const ArgList &Args, StringRef HWDiv,
58
25
                                std::vector<StringRef> &Features) {
59
25
  unsigned HWDivID = llvm::ARM::parseHWDiv(HWDiv);
60
25
  if (!llvm::ARM::getHWDivFeatures(HWDivID, Features))
61
1
    D.Diag(clang::diag::err_drv_clang_unsupported) << A->getAsString(Args);
62
25
}
63
64
// Handle -mfpu=.
65
static void getARMFPUFeatures(const Driver &D, const Arg *A,
66
                              const ArgList &Args, StringRef FPU,
67
128
                              std::vector<StringRef> &Features) {
68
128
  unsigned FPUID = llvm::ARM::parseFPU(FPU);
69
128
  if (!llvm::ARM::getFPUFeatures(FPUID, Features))
70
6
    D.Diag(clang::diag::err_drv_clang_unsupported) << A->getAsString(Args);
71
128
}
72
73
// Decode ARM features from string like +[no]featureA+[no]featureB+...
74
static bool DecodeARMFeatures(const Driver &D, StringRef text,
75
                              StringRef CPU, llvm::ARM::ArchKind ArchKind,
76
128
                              std::vector<StringRef> &Features) {
77
128
  SmallVector<StringRef, 8> Split;
78
128
  text.split(Split, StringRef("+"), -1, false);
79
128
80
170
  for (StringRef Feature : Split) {
81
170
    if (!appendArchExtFeatures(CPU, ArchKind, Feature, Features))
82
0
      return false;
83
170
  }
84
128
  return true;
85
128
}
86
87
static void DecodeARMFeaturesFromCPU(const Driver &D, StringRef CPU,
88
518
                                     std::vector<StringRef> &Features) {
89
518
  CPU = CPU.split("+").first;
90
518
  if (CPU != "generic") {
91
483
    llvm::ARM::ArchKind ArchKind = llvm::ARM::parseCPUArch(CPU);
92
483
    unsigned Extension = llvm::ARM::getDefaultExtensions(CPU, ArchKind);
93
483
    llvm::ARM::getExtensionFeatures(Extension, Features);
94
483
  }
95
518
}
96
97
// Check if -march is valid by checking if it can be canonicalised and parsed.
98
// getARMArch is used here instead of just checking the -march value in order
99
// to handle -march=native correctly.
100
static void checkARMArchName(const Driver &D, const Arg *A, const ArgList &Args,
101
                             llvm::StringRef ArchName, llvm::StringRef CPUName,
102
                             std::vector<StringRef> &Features,
103
3.90k
                             const llvm::Triple &Triple) {
104
3.90k
  std::pair<StringRef, StringRef> Split = ArchName.split("+");
105
3.90k
106
3.90k
  std::string MArch = arm::getARMArch(ArchName, Triple);
107
3.90k
  llvm::ARM::ArchKind ArchKind = llvm::ARM::parseArch(MArch);
108
3.90k
  if (ArchKind == llvm::ARM::ArchKind::INVALID ||
109
3.90k
      
(3.90k
Split.second.size()3.90k
&& !DecodeARMFeatures(
110
116
        D, Split.second, CPUName, ArchKind, Features)))
111
5
    D.Diag(clang::diag::err_drv_clang_unsupported) << A->getAsString(Args);
112
3.90k
}
113
114
// Check -mcpu=. Needs ArchName to handle -mcpu=generic.
115
static void checkARMCPUName(const Driver &D, const Arg *A, const ArgList &Args,
116
                            llvm::StringRef CPUName, llvm::StringRef ArchName,
117
                            std::vector<StringRef> &Features,
118
518
                            const llvm::Triple &Triple) {
119
518
  std::pair<StringRef, StringRef> Split = CPUName.split("+");
120
518
121
518
  std::string CPU = arm::getARMTargetCPU(CPUName, ArchName, Triple);
122
518
  llvm::ARM::ArchKind ArchKind =
123
518
    arm::getLLVMArchKindForARM(CPU, ArchName, Triple);
124
518
  if (ArchKind == llvm::ARM::ArchKind::INVALID ||
125
518
      
(516
Split.second.size()516
&& !DecodeARMFeatures(
126
12
        D, Split.second, CPU, ArchKind, Features)))
127
2
    D.Diag(clang::diag::err_drv_clang_unsupported) << A->getAsString(Args);
128
518
}
129
130
2.72k
bool arm::useAAPCSForMachO(const llvm::Triple &T) {
131
2.72k
  // The backend is hardwired to assume AAPCS for M-class processors, ensure
132
2.72k
  // the frontend matches that.
133
2.72k
  return T.getEnvironment() == llvm::Triple::EABI ||
134
2.72k
         
T.getOS() == llvm::Triple::UnknownOS1.71k
||
isARMMProfile(T)8
;
135
2.72k
}
136
137
// Select mode for reading thread pointer (-mtp=soft/cp15).
138
5.11k
arm::ReadTPMode arm::getReadTPMode(const ToolChain &TC, const ArgList &Args) {
139
5.11k
  if (Arg *A = Args.getLastArg(options::OPT_mtp_mode_EQ)) {
140
2
    const Driver &D = TC.getDriver();
141
2
    arm::ReadTPMode ThreadPointer =
142
2
        llvm::StringSwitch<arm::ReadTPMode>(A->getValue())
143
2
            .Case("cp15", ReadTPMode::Cp15)
144
2
            .Case("soft", ReadTPMode::Soft)
145
2
            .Default(ReadTPMode::Invalid);
146
2
    if (ThreadPointer != ReadTPMode::Invalid)
147
2
      return ThreadPointer;
148
0
    if (StringRef(A->getValue()).empty())
149
0
      D.Diag(diag::err_drv_missing_arg_mtp) << A->getAsString(Args);
150
0
    else
151
0
      D.Diag(diag::err_drv_invalid_mtp) << A->getAsString(Args);
152
0
    return ReadTPMode::Invalid;
153
0
  }
154
5.11k
  return ReadTPMode::Soft;
155
5.11k
}
156
157
// Select the float ABI as determined by -msoft-float, -mhard-float, and
158
// -mfloat-abi=.
159
9.74k
arm::FloatABI arm::getARMFloatABI(const ToolChain &TC, const ArgList &Args) {
160
9.74k
  const Driver &D = TC.getDriver();
161
9.74k
  const llvm::Triple &Triple = TC.getEffectiveTriple();
162
9.74k
  auto SubArch = getARMSubArchVersionNumber(Triple);
163
9.74k
  arm::FloatABI ABI = FloatABI::Invalid;
164
9.74k
  if (Arg *A =
165
2.85k
          Args.getLastArg(options::OPT_msoft_float, options::OPT_mhard_float,
166
2.85k
                          options::OPT_mfloat_abi_EQ)) {
167
2.85k
    if (A->getOption().matches(options::OPT_msoft_float)) {
168
12
      ABI = FloatABI::Soft;
169
2.84k
    } else if (A->getOption().matches(options::OPT_mhard_float)) {
170
20
      ABI = FloatABI::Hard;
171
2.82k
    } else {
172
2.82k
      ABI = llvm::StringSwitch<arm::FloatABI>(A->getValue())
173
2.82k
                .Case("soft", FloatABI::Soft)
174
2.82k
                .Case("softfp", FloatABI::SoftFP)
175
2.82k
                .Case("hard", FloatABI::Hard)
176
2.82k
                .Default(FloatABI::Invalid);
177
2.82k
      if (ABI == FloatABI::Invalid && 
!StringRef(A->getValue()).empty()0
) {
178
0
        D.Diag(diag::err_drv_invalid_mfloat_abi) << A->getAsString(Args);
179
0
        ABI = FloatABI::Soft;
180
0
      }
181
2.82k
    }
182
2.85k
183
2.85k
    // It is incorrect to select hard float ABI on MachO platforms if the ABI is
184
2.85k
    // "apcs-gnu".
185
2.85k
    if (Triple.isOSBinFormatMachO() && 
!useAAPCSForMachO(Triple)2.72k
&&
186
2.85k
        
ABI == FloatABI::Hard8
) {
187
4
      D.Diag(diag::err_drv_unsupported_opt_for_target) << A->getAsString(Args)
188
4
                                                       << Triple.getArchName();
189
4
    }
190
2.85k
  }
191
9.74k
192
9.74k
  // If unspecified, choose the default based on the platform.
193
9.74k
  if (ABI == FloatABI::Invalid) {
194
6.89k
    switch (Triple.getOS()) {
195
6.89k
    case llvm::Triple::Darwin:
196
3.69k
    case llvm::Triple::MacOSX:
197
3.69k
    case llvm::Triple::IOS:
198
3.69k
    case llvm::Triple::TvOS: {
199
3.69k
      // Darwin defaults to "softfp" for v6 and v7.
200
3.69k
      ABI = (SubArch == 6 || 
SubArch == 73.67k
) ?
FloatABI::SoftFP3.68k
:
FloatABI::Soft12
;
201
3.69k
      ABI = Triple.isWatchABI() ? 
FloatABI::Hard1.50k
:
ABI2.19k
;
202
3.69k
      break;
203
3.69k
    }
204
3.69k
    case llvm::Triple::WatchOS:
205
42
      ABI = FloatABI::Hard;
206
42
      break;
207
3.69k
208
3.69k
    // FIXME: this is invalid for WindowsCE
209
3.69k
    case llvm::Triple::Win32:
210
131
      ABI = FloatABI::Hard;
211
131
      break;
212
3.69k
213
3.69k
    case llvm::Triple::NetBSD:
214
78
      switch (Triple.getEnvironment()) {
215
78
      case llvm::Triple::EABIHF:
216
12
      case llvm::Triple::GNUEABIHF:
217
12
        ABI = FloatABI::Hard;
218
12
        break;
219
66
      default:
220
66
        ABI = FloatABI::Soft;
221
66
        break;
222
78
      }
223
78
      break;
224
78
225
78
    case llvm::Triple::FreeBSD:
226
15
      switch (Triple.getEnvironment()) {
227
15
      case llvm::Triple::GNUEABIHF:
228
7
        ABI = FloatABI::Hard;
229
7
        break;
230
15
      default:
231
8
        // FreeBSD defaults to soft float
232
8
        ABI = FloatABI::Soft;
233
8
        break;
234
15
      }
235
15
      break;
236
15
237
30
    case llvm::Triple::OpenBSD:
238
30
      ABI = FloatABI::SoftFP;
239
30
      break;
240
15
241
2.89k
    default:
242
2.89k
      switch (Triple.getEnvironment()) {
243
2.89k
      case llvm::Triple::GNUEABIHF:
244
126
      case llvm::Triple::MuslEABIHF:
245
126
      case llvm::Triple::EABIHF:
246
126
        ABI = FloatABI::Hard;
247
126
        break;
248
1.31k
      case llvm::Triple::GNUEABI:
249
1.31k
      case llvm::Triple::MuslEABI:
250
1.31k
      case llvm::Triple::EABI:
251
1.31k
        // EABI is always AAPCS, and if it was not marked 'hard', it's softfp
252
1.31k
        ABI = FloatABI::SoftFP;
253
1.31k
        break;
254
1.31k
      case llvm::Triple::Android:
255
202
        ABI = (SubArch >= 7) ? 
FloatABI::SoftFP35
:
FloatABI::Soft167
;
256
202
        break;
257
1.31k
      default:
258
1.25k
        // Assume "soft", but warn the user we are guessing.
259
1.25k
        if (Triple.isOSBinFormatMachO() &&
260
1.25k
            
Triple.getSubArch() == llvm::Triple::ARMSubArch_v7em75
)
261
18
          ABI = FloatABI::Hard;
262
1.23k
        else
263
1.23k
          ABI = FloatABI::Soft;
264
1.25k
265
1.25k
        if (Triple.getOS() != llvm::Triple::UnknownOS ||
266
1.25k
            
!Triple.isOSBinFormatMachO()1.03k
)
267
1.18k
          D.Diag(diag::warn_drv_assuming_mfloat_abi_is) << "soft";
268
1.25k
        break;
269
9.74k
      }
270
6.89k
    }
271
6.89k
  }
272
9.74k
273
9.74k
  assert(ABI != FloatABI::Invalid && "must select an ABI");
274
9.74k
  return ABI;
275
9.74k
}
276
277
void arm::getARMTargetFeatures(const ToolChain &TC,
278
                               const llvm::Triple &Triple,
279
                               const ArgList &Args,
280
                               ArgStringList &CmdArgs,
281
                               std::vector<StringRef> &Features,
282
5.11k
                               bool ForAS) {
283
5.11k
  const Driver &D = TC.getDriver();
284
5.11k
285
5.11k
  bool KernelOrKext =
286
5.11k
      Args.hasArg(options::OPT_mkernel, options::OPT_fapple_kext);
287
5.11k
  arm::FloatABI ABI = arm::getARMFloatABI(TC, Args);
288
5.11k
  arm::ReadTPMode ThreadPointer = arm::getReadTPMode(TC, Args);
289
5.11k
  const Arg *WaCPU = nullptr, *WaFPU = nullptr;
290
5.11k
  const Arg *WaHDiv = nullptr, *WaArch = nullptr;
291
5.11k
292
5.11k
  // This vector will accumulate features from the architecture
293
5.11k
  // extension suffixes on -mcpu and -march (e.g. the 'bar' in
294
5.11k
  // -mcpu=foo+bar). We want to apply those after the features derived
295
5.11k
  // from the FPU, in case -mfpu generates a negative feature which
296
5.11k
  // the +bar is supposed to override.
297
5.11k
  std::vector<StringRef> ExtensionFeatures;
298
5.11k
299
5.11k
  if (!ForAS) {
300
4.41k
    // FIXME: Note, this is a hack, the LLVM backend doesn't actually use these
301
4.41k
    // yet (it uses the -mfloat-abi and -msoft-float options), and it is
302
4.41k
    // stripped out by the ARM target. We should probably pass this a new
303
4.41k
    // -target-option, which is handled by the -cc1/-cc1as invocation.
304
4.41k
    //
305
4.41k
    // FIXME2:  For consistency, it would be ideal if we set up the target
306
4.41k
    // machine state the same when using the frontend or the assembler. We don't
307
4.41k
    // currently do that for the assembler, we pass the options directly to the
308
4.41k
    // backend and never even instantiate the frontend TargetInfo. If we did,
309
4.41k
    // and used its handleTargetFeatures hook, then we could ensure the
310
4.41k
    // assembler and the frontend behave the same.
311
4.41k
312
4.41k
    // Use software floating point operations?
313
4.41k
    if (ABI == arm::FloatABI::Soft)
314
1.52k
      Features.push_back("+soft-float");
315
4.41k
316
4.41k
    // Use software floating point argument passing?
317
4.41k
    if (ABI != arm::FloatABI::Hard)
318
3.15k
      Features.push_back("+soft-float-abi");
319
4.41k
  } else {
320
702
    // Here, we make sure that -Wa,-mfpu/cpu/arch/hwdiv will be passed down
321
702
    // to the assembler correctly.
322
702
    for (const Arg *A :
323
702
         Args.filtered(options::OPT_Wa_COMMA, options::OPT_Xassembler)) {
324
14
      StringRef Value = A->getValue();
325
14
      if (Value.startswith("-mfpu=")) {
326
3
        WaFPU = A;
327
11
      } else if (Value.startswith("-mcpu=")) {
328
3
        WaCPU = A;
329
8
      } else if (Value.startswith("-mhwdiv=")) {
330
4
        WaHDiv = A;
331
4
      } else if (Value.startswith("-march=")) {
332
2
        WaArch = A;
333
2
      }
334
14
    }
335
702
  }
336
5.11k
337
5.11k
  if (ThreadPointer == arm::ReadTPMode::Cp15)
338
1
    Features.push_back("+read-tp-hard");
339
5.11k
340
5.11k
  const Arg *ArchArg = Args.getLastArg(options::OPT_march_EQ);
341
5.11k
  const Arg *CPUArg = Args.getLastArg(options::OPT_mcpu_EQ);
342
5.11k
  StringRef ArchName;
343
5.11k
  StringRef CPUName;
344
5.11k
345
5.11k
  // Check -mcpu. ClangAs gives preference to -Wa,-mcpu=.
346
5.11k
  if (WaCPU) {
347
3
    if (CPUArg)
348
1
      D.Diag(clang::diag::warn_drv_unused_argument)
349
1
          << CPUArg->getAsString(Args);
350
3
    CPUName = StringRef(WaCPU->getValue()).substr(6);
351
3
    CPUArg = WaCPU;
352
5.11k
  } else if (CPUArg)
353
515
    CPUName = CPUArg->getValue();
354
5.11k
355
5.11k
  // Check -march. ClangAs gives preference to -Wa,-march=.
356
5.11k
  if (WaArch) {
357
2
    if (ArchArg)
358
1
      D.Diag(clang::diag::warn_drv_unused_argument)
359
1
          << ArchArg->getAsString(Args);
360
2
    ArchName = StringRef(WaArch->getValue()).substr(7);
361
2
    checkARMArchName(D, WaArch, Args, ArchName, CPUName,
362
2
                     ExtensionFeatures, Triple);
363
2
    // FIXME: Set Arch.
364
2
    D.Diag(clang::diag::warn_drv_unused_argument) << WaArch->getAsString(Args);
365
5.11k
  } else if (ArchArg) {
366
3.90k
    ArchName = ArchArg->getValue();
367
3.90k
    checkARMArchName(D, ArchArg, Args, ArchName, CPUName,
368
3.90k
                     ExtensionFeatures, Triple);
369
3.90k
  }
370
5.11k
371
5.11k
  // Add CPU features for generic CPUs
372
5.11k
  if (CPUName == "native") {
373
0
    llvm::StringMap<bool> HostFeatures;
374
0
    if (llvm::sys::getHostCPUFeatures(HostFeatures))
375
0
      for (auto &F : HostFeatures)
376
0
        Features.push_back(
377
0
            Args.MakeArgString((F.second ? "+" : "-") + F.first()));
378
5.11k
  } else if (!CPUName.empty()) {
379
518
    // This sets the default features for the specified CPU. We certainly don't
380
518
    // want to override the features that have been explicitly specified on the
381
518
    // command line. Therefore, process them directly instead of appending them
382
518
    // at the end later.
383
518
    DecodeARMFeaturesFromCPU(D, CPUName, Features);
384
518
  }
385
5.11k
386
5.11k
  if (CPUArg)
387
518
    checkARMCPUName(D, CPUArg, Args, CPUName, ArchName,
388
518
                    ExtensionFeatures, Triple);
389
5.11k
  // Honor -mfpu=. ClangAs gives preference to -Wa,-mfpu=.
390
5.11k
  const Arg *FPUArg = Args.getLastArg(options::OPT_mfpu_EQ);
391
5.11k
  if (WaFPU) {
392
3
    if (FPUArg)
393
1
      D.Diag(clang::diag::warn_drv_unused_argument)
394
1
          << FPUArg->getAsString(Args);
395
3
    getARMFPUFeatures(D, WaFPU, Args, StringRef(WaFPU->getValue()).substr(6),
396
3
                      Features);
397
5.11k
  } else if (FPUArg) {
398
125
    getARMFPUFeatures(D, FPUArg, Args, FPUArg->getValue(), Features);
399
4.98k
  } else if (Triple.isAndroid() && 
getARMSubArchVersionNumber(Triple) >= 789
) {
400
16
    const char *AndroidFPU = "neon";
401
16
    if (!llvm::ARM::getFPUFeatures(llvm::ARM::parseFPU(AndroidFPU), Features))
402
0
      D.Diag(clang::diag::err_drv_clang_unsupported)
403
0
          << std::string("-mfpu=") + AndroidFPU;
404
16
  }
405
5.11k
406
5.11k
  // Now we've finished accumulating features from arch, cpu and fpu,
407
5.11k
  // we can append the ones for architecture extensions that we
408
5.11k
  // collected separately.
409
5.11k
  Features.insert(std::end(Features),
410
5.11k
                  std::begin(ExtensionFeatures), std::end(ExtensionFeatures));
411
5.11k
412
5.11k
  // Honor -mhwdiv=. ClangAs gives preference to -Wa,-mhwdiv=.
413
5.11k
  const Arg *HDivArg = Args.getLastArg(options::OPT_mhwdiv_EQ);
414
5.11k
  if (WaHDiv) {
415
4
    if (HDivArg)
416
1
      D.Diag(clang::diag::warn_drv_unused_argument)
417
1
          << HDivArg->getAsString(Args);
418
4
    getARMHWDivFeatures(D, WaHDiv, Args,
419
4
                        StringRef(WaHDiv->getValue()).substr(8), Features);
420
5.11k
  } else if (HDivArg)
421
21
    getARMHWDivFeatures(D, HDivArg, Args, HDivArg->getValue(), Features);
422
5.11k
423
5.11k
  // Handle (arch-dependent) fp16fml/fullfp16 relationship.
424
5.11k
  // Must happen before any features are disabled due to soft-float.
425
5.11k
  // FIXME: this fp16fml option handling will be reimplemented after the
426
5.11k
  // TargetParser rewrite.
427
5.11k
  const auto ItRNoFullFP16 = std::find(Features.rbegin(), Features.rend(), "-fullfp16");
428
5.11k
  const auto ItRFP16FML = std::find(Features.rbegin(), Features.rend(), "+fp16fml");
429
5.11k
  if (Triple.getSubArch() == llvm::Triple::SubArchType::ARMSubArch_v8_4a) {
430
42
    const auto ItRFullFP16  = std::find(Features.rbegin(), Features.rend(), "+fullfp16");
431
42
    if (ItRFullFP16 < ItRNoFullFP16 && 
ItRFullFP16 < ItRFP16FML13
) {
432
11
      // Only entangled feature that can be to the right of this +fullfp16 is -fp16fml.
433
11
      // Only append the +fp16fml if there is no -fp16fml after the +fullfp16.
434
11
      if (std::find(Features.rbegin(), ItRFullFP16, "-fp16fml") == ItRFullFP16)
435
9
        Features.push_back("+fp16fml");
436
11
    }
437
31
    else
438
31
      goto fp16_fml_fallthrough;
439
5.07k
  }
440
5.07k
  else {
441
5.10k
fp16_fml_fallthrough:
442
5.10k
    // In both of these cases, putting the 'other' feature on the end of the vector will
443
5.10k
    // result in the same effect as placing it immediately after the current feature.
444
5.10k
    if (ItRNoFullFP16 < ItRFP16FML)
445
518
      Features.push_back("-fp16fml");
446
4.58k
    else if (ItRNoFullFP16 > ItRFP16FML)
447
23
      Features.push_back("+fullfp16");
448
5.10k
  }
449
5.11k
450
5.11k
  // Setting -msoft-float/-mfloat-abi=soft effectively disables the FPU (GCC
451
5.11k
  // ignores the -mfpu options in this case).
452
5.11k
  // Note that the ABI can also be set implicitly by the target selected.
453
5.11k
  if (ABI == arm::FloatABI::Soft) {
454
1.69k
    llvm::ARM::getFPUFeatures(llvm::ARM::FK_NONE, Features);
455
1.69k
456
1.69k
    // Disable all features relating to hardware FP.
457
1.69k
    // FIXME: Disabling fpregs should be enough all by itself, since all
458
1.69k
    //        the other FP features are dependent on it. However
459
1.69k
    //        there is currently no easy way to test this in clang, so for
460
1.69k
    //        now just be explicit and disable all known dependent features
461
1.69k
    //        as well.
462
1.69k
    for (std::string Feature : {
463
1.69k
            "vfp2", "vfp2sp", "vfp2d16", "vfp2d16sp",
464
1.69k
            "vfp3", "vfp3sp", "vfp3d16", "vfp3d16sp",
465
1.69k
            "vfp4", "vfp4sp", "vfp4d16", "vfp4d16sp",
466
1.69k
            "fp-armv8", "fp-armv8sp", "fp-armv8d16", "fp-armv8d16sp",
467
1.69k
            "fullfp16", "neon", "crypto", "dotprod", "fp16fml",
468
1.69k
            "fp64", "d32", "fpregs"})
469
40.7k
      Features.push_back(Args.MakeArgString("-" + Feature));
470
1.69k
  }
471
5.11k
472
5.11k
  // En/disable crc code generation.
473
5.11k
  if (Arg *A = Args.getLastArg(options::OPT_mcrc, options::OPT_mnocrc)) {
474
3
    if (A->getOption().matches(options::OPT_mcrc))
475
1
      Features.push_back("+crc");
476
2
    else
477
2
      Features.push_back("-crc");
478
3
  }
479
5.11k
480
5.11k
  // For Arch >= ARMv8.0:  crypto = sha2 + aes
481
5.11k
  // FIXME: this needs reimplementation after the TargetParser rewrite
482
5.11k
  if (ArchName.find_lower("armv8a") != StringRef::npos ||
483
5.11k
      
ArchName.find_lower("armv8.1a") != StringRef::npos5.09k
||
484
5.11k
      
ArchName.find_lower("armv8.2a") != StringRef::npos5.08k
||
485
5.11k
      
ArchName.find_lower("armv8.3a") != StringRef::npos5.07k
||
486
5.11k
      
ArchName.find_lower("armv8.4a") != StringRef::npos5.06k
) {
487
57
    if (ArchName.find_lower("+crypto") != StringRef::npos) {
488
7
      if (ArchName.find_lower("+nosha2") == StringRef::npos)
489
6
        Features.push_back("+sha2");
490
7
      if (ArchName.find_lower("+noaes") == StringRef::npos)
491
6
        Features.push_back("+aes");
492
50
    } else if (ArchName.find_lower("-crypto") != StringRef::npos) {
493
0
      if (ArchName.find_lower("+sha2") == StringRef::npos)
494
0
        Features.push_back("-sha2");
495
0
      if (ArchName.find_lower("+aes") == StringRef::npos)
496
0
        Features.push_back("-aes");
497
0
    }
498
57
  }
499
5.11k
500
5.11k
  // CMSE: Check for target 8M (for -mcmse to be applicable) is performed later.
501
5.11k
  if (Args.getLastArg(options::OPT_mcmse))
502
5
    Features.push_back("+8msecext");
503
5.11k
504
5.11k
  // Look for the last occurrence of -mlong-calls or -mno-long-calls. If
505
5.11k
  // neither options are specified, see if we are compiling for kernel/kext and
506
5.11k
  // decide whether to pass "+long-calls" based on the OS and its version.
507
5.11k
  if (Arg *A = Args.getLastArg(options::OPT_mlong_calls,
508
4
                               options::OPT_mno_long_calls)) {
509
4
    if (A->getOption().matches(options::OPT_mlong_calls))
510
3
      Features.push_back("+long-calls");
511
5.11k
  } else if (KernelOrKext && 
(776
!Triple.isiOS()776
||
Triple.isOSVersionLT(6)775
) &&
512
5.11k
             
!Triple.isWatchOS()5
) {
513
4
      Features.push_back("+long-calls");
514
4
  }
515
5.11k
516
5.11k
  // Generate execute-only output (no data access to code sections).
517
5.11k
  // This only makes sense for the compiler, not for the assembler.
518
5.11k
  if (!ForAS) {
519
4.41k
    // Supported only on ARMv6T2 and ARMv7 and above.
520
4.41k
    // Cannot be combined with -mno-movt or -mlong-calls
521
4.41k
    if (Arg *A = Args.getLastArg(options::OPT_mexecute_only, options::OPT_mno_execute_only)) {
522
22
      if (A->getOption().matches(options::OPT_mexecute_only)) {
523
14
        if (getARMSubArchVersionNumber(Triple) < 7 &&
524
14
            
llvm::ARM::parseArch(Triple.getArchName()) != llvm::ARM::ArchKind::ARMV6T24
)
525
2
              D.Diag(diag::err_target_unsupported_execute_only) << Triple.getArchName();
526
12
        else if (Arg *B = Args.getLastArg(options::OPT_mno_movt))
527
2
          D.Diag(diag::err_opt_not_valid_with_opt) << A->getAsString(Args) << B->getAsString(Args);
528
10
        // Long calls create constant pool entries and have not yet been fixed up
529
10
        // to play nicely with execute-only. Hence, they cannot be used in
530
10
        // execute-only code for now
531
10
        else if (Arg *B = Args.getLastArg(options::OPT_mlong_calls, options::OPT_mno_long_calls)) {
532
2
          if (B->getOption().matches(options::OPT_mlong_calls))
533
2
            D.Diag(diag::err_opt_not_valid_with_opt) << A->getAsString(Args) << B->getAsString(Args);
534
2
        }
535
14
        Features.push_back("+execute-only");
536
14
      }
537
22
    }
538
4.41k
  }
539
5.11k
540
5.11k
  // Kernel code has more strict alignment requirements.
541
5.11k
  if (KernelOrKext)
542
776
    Features.push_back("+strict-align");
543
4.33k
  else if (Arg *A = Args.getLastArg(options::OPT_mno_unaligned_access,
544
11
                                    options::OPT_munaligned_access)) {
545
11
    if (A->getOption().matches(options::OPT_munaligned_access)) {
546
6
      // No v6M core supports unaligned memory access (v6M ARM ARM A3.2).
547
6
      if (Triple.getSubArch() == llvm::Triple::SubArchType::ARMSubArch_v6m)
548
2
        D.Diag(diag::err_target_unsupported_unaligned) << "v6m";
549
4
      // v8M Baseline follows on from v6M, so doesn't support unaligned memory
550
4
      // access either.
551
4
      else if (Triple.getSubArch() == llvm::Triple::SubArchType::ARMSubArch_v8m_baseline)
552
1
        D.Diag(diag::err_target_unsupported_unaligned) << "v8m.base";
553
6
    } else
554
5
      Features.push_back("+strict-align");
555
4.32k
  } else {
556
4.32k
    // Assume pre-ARMv6 doesn't support unaligned accesses.
557
4.32k
    //
558
4.32k
    // ARMv6 may or may not support unaligned accesses depending on the
559
4.32k
    // SCTLR.U bit, which is architecture-specific. We assume ARMv6
560
4.32k
    // Darwin and NetBSD targets support unaligned accesses, and others don't.
561
4.32k
    //
562
4.32k
    // ARMv7 always has SCTLR.U set to 1, but it has a new SCTLR.A bit
563
4.32k
    // which raises an alignment fault on unaligned accesses. Linux
564
4.32k
    // defaults this bit to 0 and handles it as a system-wide (not
565
4.32k
    // per-process) setting. It is therefore safe to assume that ARMv7+
566
4.32k
    // Linux targets support unaligned accesses. The same goes for NaCl.
567
4.32k
    //
568
4.32k
    // The above behavior is consistent with GCC.
569
4.32k
    int VersionNum = getARMSubArchVersionNumber(Triple);
570
4.32k
    if (Triple.isOSDarwin() || 
Triple.isOSNetBSD()2.46k
) {
571
1.89k
      if (VersionNum < 6 ||
572
1.89k
          
Triple.getSubArch() == llvm::Triple::SubArchType::ARMSubArch_v6m1.87k
)
573
30
        Features.push_back("+strict-align");
574
2.42k
    } else if (Triple.isOSLinux() || 
Triple.isOSNaCl()1.86k
) {
575
570
      if (VersionNum < 7)
576
224
        Features.push_back("+strict-align");
577
570
    } else
578
1.85k
      Features.push_back("+strict-align");
579
4.32k
  }
580
5.11k
581
5.11k
  // llvm does not support reserving registers in general. There is support
582
5.11k
  // for reserving r9 on ARM though (defined as a platform-specific register
583
5.11k
  // in ARM EABI).
584
5.11k
  if (Args.hasArg(options::OPT_ffixed_r9))
585
1
    Features.push_back("+reserve-r9");
586
5.11k
587
5.11k
  // The kext linker doesn't know how to deal with movw/movt.
588
5.11k
  if (KernelOrKext || 
Args.hasArg(options::OPT_mno_movt)4.33k
)
589
779
    Features.push_back("+no-movt");
590
5.11k
591
5.11k
  if (Args.hasArg(options::OPT_mno_neg_immediates))
592
1
    Features.push_back("+no-neg-immediates");
593
5.11k
}
594
595
27.9k
const std::string arm::getARMArch(StringRef Arch, const llvm::Triple &Triple) {
596
27.9k
  std::string MArch;
597
27.9k
  if (!Arch.empty())
598
24.8k
    MArch = Arch;
599
3.11k
  else
600
3.11k
    MArch = Triple.getArchName();
601
27.9k
  MArch = StringRef(MArch).split("+").first.lower();
602
27.9k
603
27.9k
  // Handle -march=native.
604
27.9k
  if (MArch == "native") {
605
0
    std::string CPU = llvm::sys::getHostCPUName();
606
0
    if (CPU != "generic") {
607
0
      // Translate the native cpu into the architecture suffix for that CPU.
608
0
      StringRef Suffix = arm::getLLVMArchSuffixForARM(CPU, MArch, Triple);
609
0
      // If there is no valid architecture suffix for this CPU we don't know how
610
0
      // to handle it, so return no architecture.
611
0
      if (Suffix.empty())
612
0
        MArch = "";
613
0
      else
614
0
        MArch = std::string("arm") + Suffix.str();
615
0
    }
616
0
  }
617
27.9k
618
27.9k
  return MArch;
619
27.9k
}
620
621
/// Get the (LLVM) name of the minimum ARM CPU for the arch we are targeting.
622
18.0k
StringRef arm::getARMCPUForMArch(StringRef Arch, const llvm::Triple &Triple) {
623
18.0k
  std::string MArch = getARMArch(Arch, Triple);
624
18.0k
  // getARMCPUForArch defaults to the triple if MArch is empty, but empty MArch
625
18.0k
  // here means an -march=native that we can't handle, so instead return no CPU.
626
18.0k
  if (MArch.empty())
627
0
    return StringRef();
628
18.0k
629
18.0k
  // We need to return an empty string here on invalid MArch values as the
630
18.0k
  // various places that call this function can't cope with a null result.
631
18.0k
  return Triple.getARMCPUForArch(MArch);
632
18.0k
}
633
634
/// getARMTargetCPU - Get the (LLVM) name of the ARM cpu we are targeting.
635
std::string arm::getARMTargetCPU(StringRef CPU, StringRef Arch,
636
11.9k
                                 const llvm::Triple &Triple) {
637
11.9k
  // FIXME: Warn on inconsistent use of -mcpu and -march.
638
11.9k
  // If we have -mcpu=, use that.
639
11.9k
  if (!CPU.empty()) {
640
2.09k
    std::string MCPU = StringRef(CPU).split("+").first.lower();
641
2.09k
    // Handle -mcpu=native.
642
2.09k
    if (MCPU == "native")
643
0
      return llvm::sys::getHostCPUName();
644
2.09k
    else
645
2.09k
      return MCPU;
646
9.89k
  }
647
9.89k
648
9.89k
  return getARMCPUForMArch(Arch, Triple);
649
9.89k
}
650
651
/// getLLVMArchSuffixForARM - Get the LLVM ArchKind value to use for a
652
/// particular CPU (or Arch, if CPU is generic). This is needed to
653
/// pass to functions like llvm::ARM::getDefaultFPU which need an
654
/// ArchKind as well as a CPU name.
655
llvm::ARM::ArchKind arm::getLLVMArchKindForARM(StringRef CPU, StringRef Arch,
656
10.6k
                                               const llvm::Triple &Triple) {
657
10.6k
  llvm::ARM::ArchKind ArchKind;
658
10.6k
  if (CPU == "generic") {
659
5.98k
    std::string ARMArch = tools::arm::getARMArch(Arch, Triple);
660
5.98k
    ArchKind = llvm::ARM::parseArch(ARMArch);
661
5.98k
    if (ArchKind == llvm::ARM::ArchKind::INVALID)
662
6
      // In case of generic Arch, i.e. "arm",
663
6
      // extract arch from default cpu of the Triple
664
6
      ArchKind = llvm::ARM::parseCPUArch(Triple.getARMCPUForArch(ARMArch));
665
5.98k
  } else {
666
4.64k
    // FIXME: horrible hack to get around the fact that Cortex-A7 is only an
667
4.64k
    // armv7k triple if it's actually been specified via "-arch armv7k".
668
4.64k
    ArchKind = (Arch == "armv7k" || 
Arch == "thumbv7k"4.58k
)
669
4.64k
                          ? 
llvm::ARM::ArchKind::ARMV7K58
670
4.64k
                          : 
llvm::ARM::parseCPUArch(CPU)4.58k
;
671
4.64k
  }
672
10.6k
  return ArchKind;
673
10.6k
}
674
675
/// getLLVMArchSuffixForARM - Get the LLVM arch name to use for a particular
676
/// CPU  (or Arch, if CPU is generic).
677
// FIXME: This is redundant with -mcpu, why does LLVM use this.
678
StringRef arm::getLLVMArchSuffixForARM(StringRef CPU, StringRef Arch,
679
10.1k
                                       const llvm::Triple &Triple) {
680
10.1k
  llvm::ARM::ArchKind ArchKind = getLLVMArchKindForARM(CPU, Arch, Triple);
681
10.1k
  if (ArchKind == llvm::ARM::ArchKind::INVALID)
682
3
    return "";
683
10.1k
  return llvm::ARM::getSubArch(ArchKind);
684
10.1k
}
685
686
void arm::appendBE8LinkFlag(const ArgList &Args, ArgStringList &CmdArgs,
687
20
                            const llvm::Triple &Triple) {
688
20
  if (Args.hasArg(options::OPT_r))
689
1
    return;
690
19
691
19
  // ARMv7 (and later) and ARMv6-M do not support BE-32, so instruct the linker
692
19
  // to generate BE-8 executables.
693
19
  if (arm::getARMSubArchVersionNumber(Triple) >= 7 || 
arm::isARMMProfile(Triple)12
)
694
7
    CmdArgs.push_back("--be8");
695
19
}