Coverage Report

Created: 2019-07-24 05:18

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/llvm/tools/clang/lib/Sema/SemaChecking.cpp
Line
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Source (jump to first uncovered line)
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//===- SemaChecking.cpp - Extra Semantic Checking -------------------------===//
2
//
3
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4
// See https://llvm.org/LICENSE.txt for license information.
5
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6
//
7
//===----------------------------------------------------------------------===//
8
//
9
//  This file implements extra semantic analysis beyond what is enforced
10
//  by the C type system.
11
//
12
//===----------------------------------------------------------------------===//
13
14
#include "clang/AST/APValue.h"
15
#include "clang/AST/ASTContext.h"
16
#include "clang/AST/Attr.h"
17
#include "clang/AST/AttrIterator.h"
18
#include "clang/AST/CharUnits.h"
19
#include "clang/AST/Decl.h"
20
#include "clang/AST/DeclBase.h"
21
#include "clang/AST/DeclCXX.h"
22
#include "clang/AST/DeclObjC.h"
23
#include "clang/AST/DeclarationName.h"
24
#include "clang/AST/EvaluatedExprVisitor.h"
25
#include "clang/AST/Expr.h"
26
#include "clang/AST/ExprCXX.h"
27
#include "clang/AST/ExprObjC.h"
28
#include "clang/AST/ExprOpenMP.h"
29
#include "clang/AST/FormatString.h"
30
#include "clang/AST/NSAPI.h"
31
#include "clang/AST/NonTrivialTypeVisitor.h"
32
#include "clang/AST/OperationKinds.h"
33
#include "clang/AST/Stmt.h"
34
#include "clang/AST/TemplateBase.h"
35
#include "clang/AST/Type.h"
36
#include "clang/AST/TypeLoc.h"
37
#include "clang/AST/UnresolvedSet.h"
38
#include "clang/Basic/AddressSpaces.h"
39
#include "clang/Basic/CharInfo.h"
40
#include "clang/Basic/Diagnostic.h"
41
#include "clang/Basic/IdentifierTable.h"
42
#include "clang/Basic/LLVM.h"
43
#include "clang/Basic/LangOptions.h"
44
#include "clang/Basic/OpenCLOptions.h"
45
#include "clang/Basic/OperatorKinds.h"
46
#include "clang/Basic/PartialDiagnostic.h"
47
#include "clang/Basic/SourceLocation.h"
48
#include "clang/Basic/SourceManager.h"
49
#include "clang/Basic/Specifiers.h"
50
#include "clang/Basic/SyncScope.h"
51
#include "clang/Basic/TargetBuiltins.h"
52
#include "clang/Basic/TargetCXXABI.h"
53
#include "clang/Basic/TargetInfo.h"
54
#include "clang/Basic/TypeTraits.h"
55
#include "clang/Lex/Lexer.h" // TODO: Extract static functions to fix layering.
56
#include "clang/Sema/Initialization.h"
57
#include "clang/Sema/Lookup.h"
58
#include "clang/Sema/Ownership.h"
59
#include "clang/Sema/Scope.h"
60
#include "clang/Sema/ScopeInfo.h"
61
#include "clang/Sema/Sema.h"
62
#include "clang/Sema/SemaInternal.h"
63
#include "llvm/ADT/APFloat.h"
64
#include "llvm/ADT/APInt.h"
65
#include "llvm/ADT/APSInt.h"
66
#include "llvm/ADT/ArrayRef.h"
67
#include "llvm/ADT/DenseMap.h"
68
#include "llvm/ADT/FoldingSet.h"
69
#include "llvm/ADT/None.h"
70
#include "llvm/ADT/Optional.h"
71
#include "llvm/ADT/STLExtras.h"
72
#include "llvm/ADT/SmallBitVector.h"
73
#include "llvm/ADT/SmallPtrSet.h"
74
#include "llvm/ADT/SmallString.h"
75
#include "llvm/ADT/SmallVector.h"
76
#include "llvm/ADT/StringRef.h"
77
#include "llvm/ADT/StringSwitch.h"
78
#include "llvm/ADT/Triple.h"
79
#include "llvm/Support/AtomicOrdering.h"
80
#include "llvm/Support/Casting.h"
81
#include "llvm/Support/Compiler.h"
82
#include "llvm/Support/ConvertUTF.h"
83
#include "llvm/Support/ErrorHandling.h"
84
#include "llvm/Support/Format.h"
85
#include "llvm/Support/Locale.h"
86
#include "llvm/Support/MathExtras.h"
87
#include "llvm/Support/SaveAndRestore.h"
88
#include "llvm/Support/raw_ostream.h"
89
#include <algorithm>
90
#include <cassert>
91
#include <cstddef>
92
#include <cstdint>
93
#include <functional>
94
#include <limits>
95
#include <string>
96
#include <tuple>
97
#include <utility>
98
99
using namespace clang;
100
using namespace sema;
101
102
SourceLocation Sema::getLocationOfStringLiteralByte(const StringLiteral *SL,
103
16
                                                    unsigned ByteNo) const {
104
16
  return SL->getLocationOfByte(ByteNo, getSourceManager(), LangOpts,
105
16
                               Context.getTargetInfo());
106
16
}
107
108
/// Checks that a call expression's argument count is the desired number.
109
/// This is useful when doing custom type-checking.  Returns true on error.
110
6.87k
static bool checkArgCount(Sema &S, CallExpr *call, unsigned desiredArgCount) {
111
6.87k
  unsigned argCount = call->getNumArgs();
112
6.87k
  if (argCount == desiredArgCount) 
return false6.83k
;
113
44
114
44
  if (argCount < desiredArgCount)
115
25
    return S.Diag(call->getEndLoc(), diag::err_typecheck_call_too_few_args)
116
25
           << 0 /*function call*/ << desiredArgCount << argCount
117
25
           << call->getSourceRange();
118
19
119
19
  // Highlight all the excess arguments.
120
19
  SourceRange range(call->getArg(desiredArgCount)->getBeginLoc(),
121
19
                    call->getArg(argCount - 1)->getEndLoc());
122
19
123
19
  return S.Diag(range.getBegin(), diag::err_typecheck_call_too_many_args)
124
19
    << 0 /*function call*/ << desiredArgCount << argCount
125
19
    << call->getArg(1)->getSourceRange();
126
19
}
127
128
/// Check that the first argument to __builtin_annotation is an integer
129
/// and the second argument is a non-wide string literal.
130
12
static bool SemaBuiltinAnnotation(Sema &S, CallExpr *TheCall) {
131
12
  if (checkArgCount(S, TheCall, 2))
132
0
    return true;
133
12
134
12
  // First argument should be an integer.
135
12
  Expr *ValArg = TheCall->getArg(0);
136
12
  QualType Ty = ValArg->getType();
137
12
  if (!Ty->isIntegerType()) {
138
1
    S.Diag(ValArg->getBeginLoc(), diag::err_builtin_annotation_first_arg)
139
1
        << ValArg->getSourceRange();
140
1
    return true;
141
1
  }
142
11
143
11
  // Second argument should be a constant string.
144
11
  Expr *StrArg = TheCall->getArg(1)->IgnoreParenCasts();
145
11
  StringLiteral *Literal = dyn_cast<StringLiteral>(StrArg);
146
11
  if (!Literal || 
!Literal->isAscii()10
) {
147
2
    S.Diag(StrArg->getBeginLoc(), diag::err_builtin_annotation_second_arg)
148
2
        << StrArg->getSourceRange();
149
2
    return true;
150
2
  }
151
9
152
9
  TheCall->setType(Ty);
153
9
  return false;
154
9
}
155
156
31
static bool SemaBuiltinMSVCAnnotation(Sema &S, CallExpr *TheCall) {
157
31
  // We need at least one argument.
158
31
  if (TheCall->getNumArgs() < 1) {
159
3
    S.Diag(TheCall->getEndLoc(), diag::err_typecheck_call_too_few_args_at_least)
160
3
        << 0 << 1 << TheCall->getNumArgs()
161
3
        << TheCall->getCallee()->getSourceRange();
162
3
    return true;
163
3
  }
164
28
165
28
  // All arguments should be wide string literals.
166
49
  
for (Expr *Arg : TheCall->arguments())28
{
167
49
    auto *Literal = dyn_cast<StringLiteral>(Arg->IgnoreParenCasts());
168
49
    if (!Literal || 
!Literal->isWide()43
) {
169
6
      S.Diag(Arg->getBeginLoc(), diag::err_msvc_annotation_wide_str)
170
6
          << Arg->getSourceRange();
171
6
      return true;
172
6
    }
173
49
  }
174
28
175
28
  
return false22
;
176
28
}
177
178
/// Check that the argument to __builtin_addressof is a glvalue, and set the
179
/// result type to the corresponding pointer type.
180
2.13k
static bool SemaBuiltinAddressof(Sema &S, CallExpr *TheCall) {
181
2.13k
  if (checkArgCount(S, TheCall, 1))
182
0
    return true;
183
2.13k
184
2.13k
  ExprResult Arg(TheCall->getArg(0));
185
2.13k
  QualType ResultType = S.CheckAddressOfOperand(Arg, TheCall->getBeginLoc());
186
2.13k
  if (ResultType.isNull())
187
2
    return true;
188
2.13k
189
2.13k
  TheCall->setArg(0, Arg.get());
190
2.13k
  TheCall->setType(ResultType);
191
2.13k
  return false;
192
2.13k
}
193
194
/// Check the number of arguments, and set the result type to
195
/// the argument type.
196
20
static bool SemaBuiltinPreserveAI(Sema &S, CallExpr *TheCall) {
197
20
  if (checkArgCount(S, TheCall, 1))
198
0
    return true;
199
20
200
20
  TheCall->setType(TheCall->getArg(0)->getType());
201
20
  return false;
202
20
}
203
204
86
static bool SemaBuiltinOverflow(Sema &S, CallExpr *TheCall) {
205
86
  if (checkArgCount(S, TheCall, 3))
206
2
    return true;
207
84
208
84
  // First two arguments should be integers.
209
249
  
for (unsigned I = 0; 84
I < 2;
++I165
) {
210
167
    ExprResult Arg = TheCall->getArg(I);
211
167
    QualType Ty = Arg.get()->getType();
212
167
    if (!Ty->isIntegerType()) {
213
2
      S.Diag(Arg.get()->getBeginLoc(), diag::err_overflow_builtin_must_be_int)
214
2
          << Ty << Arg.get()->getSourceRange();
215
2
      return true;
216
2
    }
217
165
    InitializedEntity Entity = InitializedEntity::InitializeParameter(
218
165
        S.getASTContext(), Ty, /*consume*/ false);
219
165
    Arg = S.PerformCopyInitialization(Entity, SourceLocation(), Arg);
220
165
    if (Arg.isInvalid())
221
0
      return true;
222
165
    TheCall->setArg(I, Arg.get());
223
165
  }
224
84
225
84
  // Third argument should be a pointer to a non-const integer.
226
84
  // IRGen correctly handles volatile, restrict, and address spaces, and
227
84
  // the other qualifiers aren't possible.
228
84
  {
229
82
    ExprResult Arg = TheCall->getArg(2);
230
82
    QualType Ty = Arg.get()->getType();
231
82
    const auto *PtrTy = Ty->getAs<PointerType>();
232
82
    if (!(PtrTy && 
PtrTy->getPointeeType()->isIntegerType()81
&&
233
82
          
!PtrTy->getPointeeType().isConstQualified()80
)) {
234
3
      S.Diag(Arg.get()->getBeginLoc(),
235
3
             diag::err_overflow_builtin_must_be_ptr_int)
236
3
          << Ty << Arg.get()->getSourceRange();
237
3
      return true;
238
3
    }
239
79
    InitializedEntity Entity = InitializedEntity::InitializeParameter(
240
79
        S.getASTContext(), Ty, /*consume*/ false);
241
79
    Arg = S.PerformCopyInitialization(Entity, SourceLocation(), Arg);
242
79
    if (Arg.isInvalid())
243
0
      return true;
244
79
    TheCall->setArg(2, Arg.get());
245
79
  }
246
79
  return false;
247
79
}
248
249
16
static bool SemaBuiltinCallWithStaticChain(Sema &S, CallExpr *BuiltinCall) {
250
16
  if (checkArgCount(S, BuiltinCall, 2))
251
0
    return true;
252
16
253
16
  SourceLocation BuiltinLoc = BuiltinCall->getBeginLoc();
254
16
  Expr *Builtin = BuiltinCall->getCallee()->IgnoreImpCasts();
255
16
  Expr *Call = BuiltinCall->getArg(0);
256
16
  Expr *Chain = BuiltinCall->getArg(1);
257
16
258
16
  if (Call->getStmtClass() != Stmt::CallExprClass) {
259
2
    S.Diag(BuiltinLoc, diag::err_first_argument_to_cwsc_not_call)
260
2
        << Call->getSourceRange();
261
2
    return true;
262
2
  }
263
14
264
14
  auto CE = cast<CallExpr>(Call);
265
14
  if (CE->getCallee()->getType()->isBlockPointerType()) {
266
1
    S.Diag(BuiltinLoc, diag::err_first_argument_to_cwsc_block_call)
267
1
        << Call->getSourceRange();
268
1
    return true;
269
1
  }
270
13
271
13
  const Decl *TargetDecl = CE->getCalleeDecl();
272
13
  if (const FunctionDecl *FD = dyn_cast_or_null<FunctionDecl>(TargetDecl))
273
12
    if (FD->getBuiltinID()) {
274
1
      S.Diag(BuiltinLoc, diag::err_first_argument_to_cwsc_builtin_call)
275
1
          << Call->getSourceRange();
276
1
      return true;
277
1
    }
278
12
279
12
  if (isa<CXXPseudoDestructorExpr>(CE->getCallee()->IgnoreParens())) {
280
1
    S.Diag(BuiltinLoc, diag::err_first_argument_to_cwsc_pdtor_call)
281
1
        << Call->getSourceRange();
282
1
    return true;
283
1
  }
284
11
285
11
  ExprResult ChainResult = S.UsualUnaryConversions(Chain);
286
11
  if (ChainResult.isInvalid())
287
0
    return true;
288
11
  if (!ChainResult.get()->getType()->isPointerType()) {
289
1
    S.Diag(BuiltinLoc, diag::err_second_argument_to_cwsc_not_pointer)
290
1
        << Chain->getSourceRange();
291
1
    return true;
292
1
  }
293
10
294
10
  QualType ReturnTy = CE->getCallReturnType(S.Context);
295
10
  QualType ArgTys[2] = { ReturnTy, ChainResult.get()->getType() };
296
10
  QualType BuiltinTy = S.Context.getFunctionType(
297
10
      ReturnTy, ArgTys, FunctionProtoType::ExtProtoInfo());
298
10
  QualType BuiltinPtrTy = S.Context.getPointerType(BuiltinTy);
299
10
300
10
  Builtin =
301
10
      S.ImpCastExprToType(Builtin, BuiltinPtrTy, CK_BuiltinFnToFnPtr).get();
302
10
303
10
  BuiltinCall->setType(CE->getType());
304
10
  BuiltinCall->setValueKind(CE->getValueKind());
305
10
  BuiltinCall->setObjectKind(CE->getObjectKind());
306
10
  BuiltinCall->setCallee(Builtin);
307
10
  BuiltinCall->setArg(1, ChainResult.get());
308
10
309
10
  return false;
310
10
}
311
312
/// Check a call to BuiltinID for buffer overflows. If BuiltinID is a
313
/// __builtin_*_chk function, then use the object size argument specified in the
314
/// source. Otherwise, infer the object size using __builtin_object_size.
315
void Sema::checkFortifiedBuiltinMemoryFunction(FunctionDecl *FD,
316
3.18M
                                               CallExpr *TheCall) {
317
3.18M
  // FIXME: There are some more useful checks we could be doing here:
318
3.18M
  //  - Analyze the format string of sprintf to see how much of buffer is used.
319
3.18M
  //  - Evaluate strlen of strcpy arguments, use as object size.
320
3.18M
321
3.18M
  if (TheCall->isValueDependent() || 
TheCall->isTypeDependent()3.08M
||
322
3.18M
      
isConstantEvaluated()3.08M
)
323
126k
    return;
324
3.05M
325
3.05M
  unsigned BuiltinID = FD->getBuiltinID(/*ConsiderWrappers=*/true);
326
3.05M
  if (!BuiltinID)
327
1.83M
    return;
328
1.22M
329
1.22M
  unsigned DiagID = 0;
330
1.22M
  bool IsChkVariant = false;
331
1.22M
  unsigned SizeIndex, ObjectIndex;
332
1.22M
  switch (BuiltinID) {
333
1.22M
  default:
334
1.21M
    return;
335
1.22M
  case Builtin::BI__builtin___memcpy_chk:
336
1.92k
  case Builtin::BI__builtin___memmove_chk:
337
1.92k
  case Builtin::BI__builtin___memset_chk:
338
1.92k
  case Builtin::BI__builtin___strlcat_chk:
339
1.92k
  case Builtin::BI__builtin___strlcpy_chk:
340
1.92k
  case Builtin::BI__builtin___strncat_chk:
341
1.92k
  case Builtin::BI__builtin___strncpy_chk:
342
1.92k
  case Builtin::BI__builtin___stpncpy_chk:
343
1.92k
  case Builtin::BI__builtin___memccpy_chk: {
344
1.92k
    DiagID = diag::warn_builtin_chk_overflow;
345
1.92k
    IsChkVariant = true;
346
1.92k
    SizeIndex = TheCall->getNumArgs() - 2;
347
1.92k
    ObjectIndex = TheCall->getNumArgs() - 1;
348
1.92k
    break;
349
1.92k
  }
350
1.92k
351
1.92k
  case Builtin::BI__builtin___snprintf_chk:
352
206
  case Builtin::BI__builtin___vsnprintf_chk: {
353
206
    DiagID = diag::warn_builtin_chk_overflow;
354
206
    IsChkVariant = true;
355
206
    SizeIndex = 1;
356
206
    ObjectIndex = 3;
357
206
    break;
358
206
  }
359
206
360
242
  case Builtin::BIstrncat:
361
242
  case Builtin::BI__builtin_strncat:
362
242
  case Builtin::BIstrncpy:
363
242
  case Builtin::BI__builtin_strncpy:
364
242
  case Builtin::BIstpncpy:
365
242
  case Builtin::BI__builtin_stpncpy: {
366
242
    // Whether these functions overflow depends on the runtime strlen of the
367
242
    // string, not just the buffer size, so emitting the "always overflow"
368
242
    // diagnostic isn't quite right. We should still diagnose passing a buffer
369
242
    // size larger than the destination buffer though; this is a runtime abort
370
242
    // in _FORTIFY_SOURCE mode, and is quite suspicious otherwise.
371
242
    DiagID = diag::warn_fortify_source_size_mismatch;
372
242
    SizeIndex = TheCall->getNumArgs() - 1;
373
242
    ObjectIndex = 0;
374
242
    break;
375
242
  }
376
242
377
2.75k
  case Builtin::BImemcpy:
378
2.75k
  case Builtin::BI__builtin_memcpy:
379
2.75k
  case Builtin::BImemmove:
380
2.75k
  case Builtin::BI__builtin_memmove:
381
2.75k
  case Builtin::BImemset:
382
2.75k
  case Builtin::BI__builtin_memset: {
383
2.75k
    DiagID = diag::warn_fortify_source_overflow;
384
2.75k
    SizeIndex = TheCall->getNumArgs() - 1;
385
2.75k
    ObjectIndex = 0;
386
2.75k
    break;
387
2.75k
  }
388
2.75k
  case Builtin::BIsnprintf:
389
222
  case Builtin::BI__builtin_snprintf:
390
222
  case Builtin::BIvsnprintf:
391
222
  case Builtin::BI__builtin_vsnprintf: {
392
222
    DiagID = diag::warn_fortify_source_size_mismatch;
393
222
    SizeIndex = 1;
394
222
    ObjectIndex = 0;
395
222
    break;
396
5.35k
  }
397
5.35k
  }
398
5.35k
399
5.35k
  llvm::APSInt ObjectSize;
400
5.35k
  // For __builtin___*_chk, the object size is explicitly provided by the caller
401
5.35k
  // (usually using __builtin_object_size). Use that value to check this call.
402
5.35k
  if (IsChkVariant) {
403
2.13k
    Expr::EvalResult Result;
404
2.13k
    Expr *SizeArg = TheCall->getArg(ObjectIndex);
405
2.13k
    if (!SizeArg->EvaluateAsInt(Result, getASTContext()))
406
1.56k
      return;
407
565
    ObjectSize = Result.Val.getInt();
408
565
409
565
  // Otherwise, try to evaluate an imaginary call to __builtin_object_size.
410
3.21k
  } else {
411
3.21k
    // If the parameter has a pass_object_size attribute, then we should use its
412
3.21k
    // (potentially) more strict checking mode. Otherwise, conservatively assume
413
3.21k
    // type 0.
414
3.21k
    int BOSType = 0;
415
3.21k
    if (const auto *POS =
416
8
            FD->getParamDecl(ObjectIndex)->getAttr<PassObjectSizeAttr>())
417
8
      BOSType = POS->getType();
418
3.21k
419
3.21k
    Expr *ObjArg = TheCall->getArg(ObjectIndex);
420
3.21k
    uint64_t Result;
421
3.21k
    if (!ObjArg->tryEvaluateObjectSize(Result, getASTContext(), BOSType))
422
2.26k
      return;
423
948
    // Get the object size in the target's size_t width.
424
948
    const TargetInfo &TI = getASTContext().getTargetInfo();
425
948
    unsigned SizeTypeWidth = TI.getTypeWidth(TI.getSizeType());
426
948
    ObjectSize = llvm::APSInt::getUnsigned(Result).extOrTrunc(SizeTypeWidth);
427
948
  }
428
5.35k
429
5.35k
  // Evaluate the number of bytes of the object that this call will use.
430
5.35k
  Expr::EvalResult Result;
431
1.51k
  Expr *UsedSizeArg = TheCall->getArg(SizeIndex);
432
1.51k
  if (!UsedSizeArg->EvaluateAsInt(Result, getASTContext()))
433
107
    return;
434
1.40k
  llvm::APSInt UsedSize = Result.Val.getInt();
435
1.40k
436
1.40k
  if (UsedSize.ule(ObjectSize))
437
1.31k
    return;
438
96
439
96
  StringRef FunctionName = getASTContext().BuiltinInfo.getName(BuiltinID);
440
96
  // Skim off the details of whichever builtin was called to produce a better
441
96
  // diagnostic, as it's unlikley that the user wrote the __builtin explicitly.
442
96
  if (IsChkVariant) {
443
12
    FunctionName = FunctionName.drop_front(std::strlen("__builtin___"));
444
12
    FunctionName = FunctionName.drop_back(std::strlen("_chk"));
445
84
  } else if (FunctionName.startswith("__builtin_")) {
446
58
    FunctionName = FunctionName.drop_front(std::strlen("__builtin_"));
447
58
  }
448
96
449
96
  DiagRuntimeBehavior(TheCall->getBeginLoc(), TheCall,
450
96
                      PDiag(DiagID)
451
96
                          << FunctionName << ObjectSize.toString(/*Radix=*/10)
452
96
                          << UsedSize.toString(/*Radix=*/10));
453
96
}
454
455
static bool SemaBuiltinSEHScopeCheck(Sema &SemaRef, CallExpr *TheCall,
456
                                     Scope::ScopeFlags NeededScopeFlags,
457
38
                                     unsigned DiagID) {
458
38
  // Scopes aren't available during instantiation. Fortunately, builtin
459
38
  // functions cannot be template args so they cannot be formed through template
460
38
  // instantiation. Therefore checking once during the parse is sufficient.
461
38
  if (SemaRef.inTemplateInstantiation())
462
0
    return false;
463
38
464
38
  Scope *S = SemaRef.getCurScope();
465
73
  while (S && 
!S->isSEHExceptScope()61
)
466
35
    S = S->getParent();
467
38
  if (!S || 
!(S->getFlags() & NeededScopeFlags)26
) {
468
13
    auto *DRE = cast<DeclRefExpr>(TheCall->getCallee()->IgnoreParenCasts());
469
13
    SemaRef.Diag(TheCall->getExprLoc(), DiagID)
470
13
        << DRE->getDecl()->getIdentifier();
471
13
    return true;
472
13
  }
473
25
474
25
  return false;
475
25
}
476
477
292
static inline bool isBlockPointer(Expr *Arg) {
478
292
  return Arg->getType()->isBlockPointerType();
479
292
}
480
481
/// OpenCL C v2.0, s6.13.17.2 - Checks that the block parameters are all local
482
/// void*, which is a requirement of device side enqueue.
483
191
static bool checkOpenCLBlockArgs(Sema &S, Expr *BlockArg) {
484
191
  const BlockPointerType *BPT =
485
191
      cast<BlockPointerType>(BlockArg->getType().getCanonicalType());
486
191
  ArrayRef<QualType> Params =
487
191
      BPT->getPointeeType()->getAs<FunctionProtoType>()->getParamTypes();
488
191
  unsigned ArgCounter = 0;
489
191
  bool IllegalParams = false;
490
191
  // Iterate through the block parameters until either one is found that is not
491
191
  // a local void*, or the block is valid.
492
191
  for (ArrayRef<QualType>::iterator I = Params.begin(), E = Params.end();
493
380
       I != E; 
++I, ++ArgCounter189
) {
494
189
    if (!(*I)->isPointerType() || 
!(*I)->getPointeeType()->isVoidType()173
||
495
189
        (*I)->getPointeeType().getQualifiers().getAddressSpace() !=
496
153
            LangAS::opencl_local) {
497
36
      // Get the location of the error. If a block literal has been passed
498
36
      // (BlockExpr) then we can point straight to the offending argument,
499
36
      // else we just point to the variable reference.
500
36
      SourceLocation ErrorLoc;
501
36
      if (isa<BlockExpr>(BlockArg)) {
502
16
        BlockDecl *BD = cast<BlockExpr>(BlockArg)->getBlockDecl();
503
16
        ErrorLoc = BD->getParamDecl(ArgCounter)->getBeginLoc();
504
20
      } else if (isa<DeclRefExpr>(BlockArg)) {
505
20
        ErrorLoc = cast<DeclRefExpr>(BlockArg)->getBeginLoc();
506
20
      }
507
36
      S.Diag(ErrorLoc,
508
36
             diag::err_opencl_enqueue_kernel_blocks_non_local_void_args);
509
36
      IllegalParams = true;
510
36
    }
511
189
  }
512
191
513
191
  return IllegalParams;
514
191
}
515
516
46
static bool checkOpenCLSubgroupExt(Sema &S, CallExpr *Call) {
517
46
  if (!S.getOpenCLOptions().isEnabled("cl_khr_subgroups")) {
518
8
    S.Diag(Call->getBeginLoc(), diag::err_opencl_requires_extension)
519
8
        << 1 << Call->getDirectCallee() << "cl_khr_subgroups";
520
8
    return true;
521
8
  }
522
38
  return false;
523
38
}
524
525
38
static bool SemaOpenCLBuiltinNDRangeAndBlock(Sema &S, CallExpr *TheCall) {
526
38
  if (checkArgCount(S, TheCall, 2))
527
0
    return true;
528
38
529
38
  if (checkOpenCLSubgroupExt(S, TheCall))
530
8
    return true;
531
30
532
30
  // First argument is an ndrange_t type.
533
30
  Expr *NDRangeArg = TheCall->getArg(0);
534
30
  if (NDRangeArg->getType().getUnqualifiedType().getAsString() != "ndrange_t") {
535
8
    S.Diag(NDRangeArg->getBeginLoc(), diag::err_opencl_builtin_expected_type)
536
8
        << TheCall->getDirectCallee() << "'ndrange_t'";
537
8
    return true;
538
8
  }
539
22
540
22
  Expr *BlockArg = TheCall->getArg(1);
541
22
  if (!isBlockPointer(BlockArg)) {
542
8
    S.Diag(BlockArg->getBeginLoc(), diag::err_opencl_builtin_expected_type)
543
8
        << TheCall->getDirectCallee() << "block";
544
8
    return true;
545
8
  }
546
14
  return checkOpenCLBlockArgs(S, BlockArg);
547
14
}
548
549
/// OpenCL C v2.0, s6.13.17.6 - Check the argument to the
550
/// get_kernel_work_group_size
551
/// and get_kernel_preferred_work_group_size_multiple builtin functions.
552
97
static bool SemaOpenCLBuiltinKernelWorkGroupSize(Sema &S, CallExpr *TheCall) {
553
97
  if (checkArgCount(S, TheCall, 1))
554
16
    return true;
555
81
556
81
  Expr *BlockArg = TheCall->getArg(0);
557
81
  if (!isBlockPointer(BlockArg)) {
558
8
    S.Diag(BlockArg->getBeginLoc(), diag::err_opencl_builtin_expected_type)
559
8
        << TheCall->getDirectCallee() << "block";
560
8
    return true;
561
8
  }
562
73
  return checkOpenCLBlockArgs(S, BlockArg);
563
73
}
564
565
/// Diagnose integer type and any valid implicit conversion to it.
566
static bool checkOpenCLEnqueueIntType(Sema &S, Expr *E,
567
                                      const QualType &IntType);
568
569
static bool checkOpenCLEnqueueLocalSizeArgs(Sema &S, CallExpr *TheCall,
570
66
                                            unsigned Start, unsigned End) {
571
66
  bool IllegalParams = false;
572
174
  for (unsigned I = Start; I <= End; 
++I108
)
573
108
    IllegalParams |= checkOpenCLEnqueueIntType(S, TheCall->getArg(I),
574
108
                                              S.Context.getSizeType());
575
66
  return IllegalParams;
576
66
}
577
578
/// OpenCL v2.0, s6.13.17.1 - Check that sizes are provided for all
579
/// 'local void*' parameter of passed block.
580
static bool checkOpenCLEnqueueVariadicArgs(Sema &S, CallExpr *TheCall,
581
                                           Expr *BlockArg,
582
74
                                           unsigned NumNonVarArgs) {
583
74
  const BlockPointerType *BPT =
584
74
      cast<BlockPointerType>(BlockArg->getType().getCanonicalType());
585
74
  unsigned NumBlockParams =
586
74
      BPT->getPointeeType()->getAs<FunctionProtoType>()->getNumParams();
587
74
  unsigned TotalNumArgs = TheCall->getNumArgs();
588
74
589
74
  // For each argument passed to the block, a corresponding uint needs to
590
74
  // be passed to describe the size of the local memory.
591
74
  if (TotalNumArgs != NumBlockParams + NumNonVarArgs) {
592
8
    S.Diag(TheCall->getBeginLoc(),
593
8
           diag::err_opencl_enqueue_kernel_local_size_args);
594
8
    return true;
595
8
  }
596
66
597
66
  // Check that the sizes of the local memory are specified by integers.
598
66
  return checkOpenCLEnqueueLocalSizeArgs(S, TheCall, NumNonVarArgs,
599
66
                                         TotalNumArgs - 1);
600
66
}
601
602
/// OpenCL C v2.0, s6.13.17 - Enqueue kernel function contains four different
603
/// overload formats specified in Table 6.13.17.1.
604
/// int enqueue_kernel(queue_t queue,
605
///                    kernel_enqueue_flags_t flags,
606
///                    const ndrange_t ndrange,
607
///                    void (^block)(void))
608
/// int enqueue_kernel(queue_t queue,
609
///                    kernel_enqueue_flags_t flags,
610
///                    const ndrange_t ndrange,
611
///                    uint num_events_in_wait_list,
612
///                    clk_event_t *event_wait_list,
613
///                    clk_event_t *event_ret,
614
///                    void (^block)(void))
615
/// int enqueue_kernel(queue_t queue,
616
///                    kernel_enqueue_flags_t flags,
617
///                    const ndrange_t ndrange,
618
///                    void (^block)(local void*, ...),
619
///                    uint size0, ...)
620
/// int enqueue_kernel(queue_t queue,
621
///                    kernel_enqueue_flags_t flags,
622
///                    const ndrange_t ndrange,
623
///                    uint num_events_in_wait_list,
624
///                    clk_event_t *event_wait_list,
625
///                    clk_event_t *event_ret,
626
///                    void (^block)(local void*, ...),
627
///                    uint size0, ...)
628
153
static bool SemaOpenCLBuiltinEnqueueKernel(Sema &S, CallExpr *TheCall) {
629
153
  unsigned NumArgs = TheCall->getNumArgs();
630
153
631
153
  if (NumArgs < 4) {
632
0
    S.Diag(TheCall->getBeginLoc(), diag::err_typecheck_call_too_few_args);
633
0
    return true;
634
0
  }
635
153
636
153
  Expr *Arg0 = TheCall->getArg(0);
637
153
  Expr *Arg1 = TheCall->getArg(1);
638
153
  Expr *Arg2 = TheCall->getArg(2);
639
153
  Expr *Arg3 = TheCall->getArg(3);
640
153
641
153
  // First argument always needs to be a queue_t type.
642
153
  if (!Arg0->getType()->isQueueT()) {
643
4
    S.Diag(TheCall->getArg(0)->getBeginLoc(),
644
4
           diag::err_opencl_builtin_expected_type)
645
4
        << TheCall->getDirectCallee() << S.Context.OCLQueueTy;
646
4
    return true;
647
4
  }
648
149
649
149
  // Second argument always needs to be a kernel_enqueue_flags_t enum value.
650
149
  if (!Arg1->getType()->isIntegerType()) {
651
4
    S.Diag(TheCall->getArg(1)->getBeginLoc(),
652
4
           diag::err_opencl_builtin_expected_type)
653
4
        << TheCall->getDirectCallee() << "'kernel_enqueue_flags_t' (i.e. uint)";
654
4
    return true;
655
4
  }
656
145
657
145
  // Third argument is always an ndrange_t type.
658
145
  if (Arg2->getType().getUnqualifiedType().getAsString() != "ndrange_t") {
659
4
    S.Diag(TheCall->getArg(2)->getBeginLoc(),
660
4
           diag::err_opencl_builtin_expected_type)
661
4
        << TheCall->getDirectCallee() << "'ndrange_t'";
662
4
    return true;
663
4
  }
664
141
665
141
  // With four arguments, there is only one form that the function could be
666
141
  // called in: no events and no variable arguments.
667
141
  if (NumArgs == 4) {
668
25
    // check that the last argument is the right block type.
669
25
    if (!isBlockPointer(Arg3)) {
670
4
      S.Diag(Arg3->getBeginLoc(), diag::err_opencl_builtin_expected_type)
671
4
          << TheCall->getDirectCallee() << "block";
672
4
      return true;
673
4
    }
674
21
    // we have a block type, check the prototype
675
21
    const BlockPointerType *BPT =
676
21
        cast<BlockPointerType>(Arg3->getType().getCanonicalType());
677
21
    if (BPT->getPointeeType()->getAs<FunctionProtoType>()->getNumParams() > 0) {
678
4
      S.Diag(Arg3->getBeginLoc(),
679
4
             diag::err_opencl_enqueue_kernel_blocks_no_args);
680
4
      return true;
681
4
    }
682
17
    return false;
683
17
  }
684
116
  // we can have block + varargs.
685
116
  if (isBlockPointer(Arg3))
686
60
    return (checkOpenCLBlockArgs(S, Arg3) ||
687
60
            
checkOpenCLEnqueueVariadicArgs(S, TheCall, Arg3, 4)56
);
688
56
  // last two cases with either exactly 7 args or 7 args and varargs.
689
56
  if (NumArgs >= 7) {
690
48
    // check common block argument.
691
48
    Expr *Arg6 = TheCall->getArg(6);
692
48
    if (!isBlockPointer(Arg6)) {
693
4
      S.Diag(Arg6->getBeginLoc(), diag::err_opencl_builtin_expected_type)
694
4
          << TheCall->getDirectCallee() << "block";
695
4
      return true;
696
4
    }
697
44
    if (checkOpenCLBlockArgs(S, Arg6))
698
0
      return true;
699
44
700
44
    // Forth argument has to be any integer type.
701
44
    if (!Arg3->getType()->isIntegerType()) {
702
4
      S.Diag(TheCall->getArg(3)->getBeginLoc(),
703
4
             diag::err_opencl_builtin_expected_type)
704
4
          << TheCall->getDirectCallee() << "integer";
705
4
      return true;
706
4
    }
707
40
    // check remaining common arguments.
708
40
    Expr *Arg4 = TheCall->getArg(4);
709
40
    Expr *Arg5 = TheCall->getArg(5);
710
40
711
40
    // Fifth argument is always passed as a pointer to clk_event_t.
712
40
    if (!Arg4->isNullPointerConstant(S.Context,
713
40
                                     Expr::NPC_ValueDependentIsNotNull) &&
714
40
        
!Arg4->getType()->getPointeeOrArrayElementType()->isClkEventT()29
) {
715
4
      S.Diag(TheCall->getArg(4)->getBeginLoc(),
716
4
             diag::err_opencl_builtin_expected_type)
717
4
          << TheCall->getDirectCallee()
718
4
          << S.Context.getPointerType(S.Context.OCLClkEventTy);
719
4
      return true;
720
4
    }
721
36
722
36
    // Sixth argument is always passed as a pointer to clk_event_t.
723
36
    if (!Arg5->isNullPointerConstant(S.Context,
724
36
                                     Expr::NPC_ValueDependentIsNotNull) &&
725
36
        
!(25
Arg5->getType()->isPointerType()25
&&
726
25
          Arg5->getType()->getPointeeType()->isClkEventT())) {
727
4
      S.Diag(TheCall->getArg(5)->getBeginLoc(),
728
4
             diag::err_opencl_builtin_expected_type)
729
4
          << TheCall->getDirectCallee()
730
4
          << S.Context.getPointerType(S.Context.OCLClkEventTy);
731
4
      return true;
732
4
    }
733
32
734
32
    if (NumArgs == 7)
735
14
      return false;
736
18
737
18
    return checkOpenCLEnqueueVariadicArgs(S, TheCall, Arg6, 7);
738
18
  }
739
8
740
8
  // None of the specific case has been detected, give generic error
741
8
  S.Diag(TheCall->getBeginLoc(),
742
8
         diag::err_opencl_enqueue_kernel_incorrect_args);
743
8
  return true;
744
8
}
745
746
/// Returns OpenCL access qual.
747
50
static OpenCLAccessAttr *getOpenCLArgAccess(const Decl *D) {
748
50
    return D->getAttr<OpenCLAccessAttr>();
749
50
}
750
751
/// Returns true if pipe element type is different from the pointer.
752
56
static bool checkOpenCLPipeArg(Sema &S, CallExpr *Call) {
753
56
  const Expr *Arg0 = Call->getArg(0);
754
56
  // First argument type should always be pipe.
755
56
  if (!Arg0->getType()->isPipeType()) {
756
6
    S.Diag(Call->getBeginLoc(), diag::err_opencl_builtin_pipe_first_arg)
757
6
        << Call->getDirectCallee() << Arg0->getSourceRange();
758
6
    return true;
759
6
  }
760
50
  OpenCLAccessAttr *AccessQual =
761
50
      getOpenCLArgAccess(cast<DeclRefExpr>(Arg0)->getDecl());
762
50
  // Validates the access qualifier is compatible with the call.
763
50
  // OpenCL v2.0 s6.13.16 - The access qualifiers for pipe should only be
764
50
  // read_only and write_only, and assumed to be read_only if no qualifier is
765
50
  // specified.
766
50
  switch (Call->getDirectCallee()->getBuiltinID()) {
767
50
  case Builtin::BIread_pipe:
768
27
  case Builtin::BIreserve_read_pipe:
769
27
  case Builtin::BIcommit_read_pipe:
770
27
  case Builtin::BIwork_group_reserve_read_pipe:
771
27
  case Builtin::BIsub_group_reserve_read_pipe:
772
27
  case Builtin::BIwork_group_commit_read_pipe:
773
27
  case Builtin::BIsub_group_commit_read_pipe:
774
27
    if (!(!AccessQual || AccessQual->isReadOnly())) {
775
4
      S.Diag(Arg0->getBeginLoc(),
776
4
             diag::err_opencl_builtin_pipe_invalid_access_modifier)
777
4
          << "read_only" << Arg0->getSourceRange();
778
4
      return true;
779
4
    }
780
23
    break;
781
23
  case Builtin::BIwrite_pipe:
782
23
  case Builtin::BIreserve_write_pipe:
783
23
  case Builtin::BIcommit_write_pipe:
784
23
  case Builtin::BIwork_group_reserve_write_pipe:
785
23
  case Builtin::BIsub_group_reserve_write_pipe:
786
23
  case Builtin::BIwork_group_commit_write_pipe:
787
23
  case Builtin::BIsub_group_commit_write_pipe:
788
23
    if (!(AccessQual && AccessQual->isWriteOnly())) {
789
4
      S.Diag(Arg0->getBeginLoc(),
790
4
             diag::err_opencl_builtin_pipe_invalid_access_modifier)
791
4
          << "write_only" << Arg0->getSourceRange();
792
4
      return true;
793
4
    }
794
19
    break;
795
19
  default:
796
0
    break;
797
42
  }
798
42
  return false;
799
42
}
800
801
/// Returns true if pipe element type is different from the pointer.
802
16
static bool checkOpenCLPipePacketType(Sema &S, CallExpr *Call, unsigned Idx) {
803
16
  const Expr *Arg0 = Call->getArg(0);
804
16
  const Expr *ArgIdx = Call->getArg(Idx);
805
16
  const PipeType *PipeTy = cast<PipeType>(Arg0->getType());
806
16
  const QualType EltTy = PipeTy->getElementType();
807
16
  const PointerType *ArgTy = ArgIdx->getType()->getAs<PointerType>();
808
16
  // The Idx argument should be a pointer and the type of the pointer and
809
16
  // the type of pipe element should also be the same.
810
16
  if (!ArgTy ||
811
16
      !S.Context.hasSameType(
812
14
          EltTy, ArgTy->getPointeeType()->getCanonicalTypeInternal())) {
813
2
    S.Diag(Call->getBeginLoc(), diag::err_opencl_builtin_pipe_invalid_arg)
814
2
        << Call->getDirectCallee() << S.Context.getPointerType(EltTy)
815
2
        << ArgIdx->getType() << ArgIdx->getSourceRange();
816
2
    return true;
817
2
  }
818
14
  return false;
819
14
}
820
821
// Performs semantic analysis for the read/write_pipe call.
822
// \param S Reference to the semantic analyzer.
823
// \param Call A pointer to the builtin call.
824
// \return True if a semantic error has been found, false otherwise.
825
28
static bool SemaBuiltinRWPipe(Sema &S, CallExpr *Call) {
826
28
  // OpenCL v2.0 s6.13.16.2 - The built-in read/write
827
28
  // functions have two forms.
828
28
  switch (Call->getNumArgs()) {
829
28
  case 2:
830
16
    if (checkOpenCLPipeArg(S, Call))
831
4
      return true;
832
12
    // The call with 2 arguments should be
833
12
    // read/write_pipe(pipe T, T*).
834
12
    // Check packet type T.
835
12
    if (checkOpenCLPipePacketType(S, Call, 1))
836
2
      return true;
837
10
    break;
838
10
839
10
  case 4: {
840
10
    if (checkOpenCLPipeArg(S, Call))
841
2
      return true;
842
8
    // The call with 4 arguments should be
843
8
    // read/write_pipe(pipe T, reserve_id_t, uint, T*).
844
8
    // Check reserve_id_t.
845
8
    if (!Call->getArg(1)->getType()->isReserveIDT()) {
846
2
      S.Diag(Call->getBeginLoc(), diag::err_opencl_builtin_pipe_invalid_arg)
847
2
          << Call->getDirectCallee() << S.Context.OCLReserveIDTy
848
2
          << Call->getArg(1)->getType() << Call->getArg(1)->getSourceRange();
849
2
      return true;
850
2
    }
851
6
852
6
    // Check the index.
853
6
    const Expr *Arg2 = Call->getArg(2);
854
6
    if (!Arg2->getType()->isIntegerType() &&
855
6
        
!Arg2->getType()->isUnsignedIntegerType()2
) {
856
2
      S.Diag(Call->getBeginLoc(), diag::err_opencl_builtin_pipe_invalid_arg)
857
2
          << Call->getDirectCallee() << S.Context.UnsignedIntTy
858
2
          << Arg2->getType() << Arg2->getSourceRange();
859
2
      return true;
860
2
    }
861
4
862
4
    // Check packet type T.
863
4
    if (checkOpenCLPipePacketType(S, Call, 3))
864
0
      return true;
865
4
  } break;
866
4
  default:
867
2
    S.Diag(Call->getBeginLoc(), diag::err_opencl_builtin_pipe_arg_num)
868
2
        << Call->getDirectCallee() << Call->getSourceRange();
869
2
    return true;
870
14
  }
871
14
872
14
  return false;
873
14
}
874
875
// Performs a semantic analysis on the {work_group_/sub_group_
876
//        /_}reserve_{read/write}_pipe
877
// \param S Reference to the semantic analyzer.
878
// \param Call The call to the builtin function to be analyzed.
879
// \return True if a semantic error was found, false otherwise.
880
16
static bool SemaBuiltinReserveRWPipe(Sema &S, CallExpr *Call) {
881
16
  if (checkArgCount(S, Call, 2))
882
0
    return true;
883
16
884
16
  if (checkOpenCLPipeArg(S, Call))
885
4
    return true;
886
12
887
12
  // Check the reserve size.
888
12
  if (!Call->getArg(1)->getType()->isIntegerType() &&
889
12
      
!Call->getArg(1)->getType()->isUnsignedIntegerType()2
) {
890
2
    S.Diag(Call->getBeginLoc(), diag::err_opencl_builtin_pipe_invalid_arg)
891
2
        << Call->getDirectCallee() << S.Context.UnsignedIntTy
892
2
        << Call->getArg(1)->getType() << Call->getArg(1)->getSourceRange();
893
2
    return true;
894
2
  }
895
10
896
10
  // Since return type of reserve_read/write_pipe built-in function is
897
10
  // reserve_id_t, which is not defined in the builtin def file , we used int
898
10
  // as return type and need to override the return type of these functions.
899
10
  Call->setType(S.Context.OCLReserveIDTy);
900
10
901
10
  return false;
902
10
}
903
904
// Performs a semantic analysis on {work_group_/sub_group_
905
//        /_}commit_{read/write}_pipe
906
// \param S Reference to the semantic analyzer.
907
// \param Call The call to the builtin function to be analyzed.
908
// \return True if a semantic error was found, false otherwise.
909
14
static bool SemaBuiltinCommitRWPipe(Sema &S, CallExpr *Call) {
910
14
  if (checkArgCount(S, Call, 2))
911
0
    return true;
912
14
913
14
  if (checkOpenCLPipeArg(S, Call))
914
4
    return true;
915
10
916
10
  // Check reserve_id_t.
917
10
  if (!Call->getArg(1)->getType()->isReserveIDT()) {
918
2
    S.Diag(Call->getBeginLoc(), diag::err_opencl_builtin_pipe_invalid_arg)
919
2
        << Call->getDirectCallee() << S.Context.OCLReserveIDTy
920
2
        << Call->getArg(1)->getType() << Call->getArg(1)->getSourceRange();
921
2
    return true;
922
2
  }
923
8
924
8
  return false;
925
8
}
926
927
// Performs a semantic analysis on the call to built-in Pipe
928
//        Query Functions.
929
// \param S Reference to the semantic analyzer.
930
// \param Call The call to the builtin function to be analyzed.
931
// \return True if a semantic error was found, false otherwise.
932
10
static bool SemaBuiltinPipePackets(Sema &S, CallExpr *Call) {
933
10
  if (checkArgCount(S, Call, 1))
934
0
    return true;
935
10
936
10
  if (!Call->getArg(0)->getType()->isPipeType()) {
937
2
    S.Diag(Call->getBeginLoc(), diag::err_opencl_builtin_pipe_first_arg)
938
2
        << Call->getDirectCallee() << Call->getArg(0)->getSourceRange();
939
2
    return true;
940
2
  }
941
8
942
8
  return false;
943
8
}
944
945
// OpenCL v2.0 s6.13.9 - Address space qualifier functions.
946
// Performs semantic analysis for the to_global/local/private call.
947
// \param S Reference to the semantic analyzer.
948
// \param BuiltinID ID of the builtin function.
949
// \param Call A pointer to the builtin call.
950
// \return True if a semantic error has been found, false otherwise.
951
static bool SemaOpenCLBuiltinToAddr(Sema &S, unsigned BuiltinID,
952
32
                                    CallExpr *Call) {
953
32
  if (Call->getNumArgs() != 1) {
954
1
    S.Diag(Call->getBeginLoc(), diag::err_opencl_builtin_to_addr_arg_num)
955
1
        << Call->getDirectCallee() << Call->getSourceRange();
956
1
    return true;
957
1
  }
958
31
959
31
  auto RT = Call->getArg(0)->getType();
960
31
  if (!RT->isPointerType() || RT->getPointeeType()
961
30
      .getAddressSpace() == LangAS::opencl_constant) {
962
3
    S.Diag(Call->getBeginLoc(), diag::err_opencl_builtin_to_addr_invalid_arg)
963
3
        << Call->getArg(0) << Call->getDirectCallee() << Call->getSourceRange();
964
3
    return true;
965
3
  }
966
28
967
28
  if (RT->getPointeeType().getAddressSpace() != LangAS::opencl_generic) {
968
21
    S.Diag(Call->getArg(0)->getBeginLoc(),
969
21
           diag::warn_opencl_generic_address_space_arg)
970
21
        << Call->getDirectCallee()->getNameInfo().getAsString()
971
21
        << Call->getArg(0)->getSourceRange();
972
21
  }
973
28
974
28
  RT = RT->getPointeeType();
975
28
  auto Qual = RT.getQualifiers();
976
28
  switch (BuiltinID) {
977
28
  case Builtin::BIto_global:
978
12
    Qual.setAddressSpace(LangAS::opencl_global);
979
12
    break;
980
28
  case Builtin::BIto_local:
981
8
    Qual.setAddressSpace(LangAS::opencl_local);
982
8
    break;
983
28
  case Builtin::BIto_private:
984
8
    Qual.setAddressSpace(LangAS::opencl_private);
985
8
    break;
986
28
  default:
987
0
    llvm_unreachable("Invalid builtin function");
988
28
  }
989
28
  Call->setType(S.Context.getPointerType(S.Context.getQualifiedType(
990
28
      RT.getUnqualifiedType(), Qual)));
991
28
992
28
  return false;
993
28
}
994
995
120
static ExprResult SemaBuiltinLaunder(Sema &S, CallExpr *TheCall) {
996
120
  if (checkArgCount(S, TheCall, 1))
997
2
    return ExprError();
998
118
999
118
  // Compute __builtin_launder's parameter type from the argument.
1000
118
  // The parameter type is:
1001
118
  //  * The type of the argument if it's not an array or function type,
1002
118
  //  Otherwise,
1003
118
  //  * The decayed argument type.
1004
118
  QualType ParamTy = [&]() {
1005
118
    QualType ArgTy = TheCall->getArg(0)->getType();
1006
118
    if (const ArrayType *Ty = ArgTy->getAsArrayTypeUnsafe())
1007
14
      return S.Context.getPointerType(Ty->getElementType());
1008
104
    if (ArgTy->isFunctionType()) {
1009
2
      return S.Context.getPointerType(ArgTy);
1010
2
    }
1011
102
    return ArgTy;
1012
102
  }();
1013
118
1014
118
  TheCall->setType(ParamTy);
1015
118
1016
118
  auto DiagSelect = [&]() -> llvm::Optional<unsigned> {
1017
118
    if (!ParamTy->isPointerType())
1018
11
      return 0;
1019
107
    if (ParamTy->isFunctionPointerType())
1020
5
      return 1;
1021
102
    if (ParamTy->isVoidPointerType())
1022
6
      return 2;
1023
96
    return llvm::Optional<unsigned>{};
1024
96
  }();
1025
118
  if (DiagSelect.hasValue()) {
1026
22
    S.Diag(TheCall->getBeginLoc(), diag::err_builtin_launder_invalid_arg)
1027
22
        << DiagSelect.getValue() << TheCall->getSourceRange();
1028
22
    return ExprError();
1029
22
  }
1030
96
1031
96
  // We either have an incomplete class type, or we have a class template
1032
96
  // whose instantiation has not been forced. Example:
1033
96
  //
1034
96
  //   template <class T> struct Foo { T value; };
1035
96
  //   Foo<int> *p = nullptr;
1036
96
  //   auto *d = __builtin_launder(p);
1037
96
  if (S.RequireCompleteType(TheCall->getBeginLoc(), ParamTy->getPointeeType(),
1038
96
                            diag::err_incomplete_type))
1039
2
    return ExprError();
1040
94
1041
94
  assert(ParamTy->getPointeeType()->isObjectType() &&
1042
94
         "Unhandled non-object pointer case");
1043
94
1044
94
  InitializedEntity Entity =
1045
94
      InitializedEntity::InitializeParameter(S.Context, ParamTy, false);
1046
94
  ExprResult Arg =
1047
94
      S.PerformCopyInitialization(Entity, SourceLocation(), TheCall->getArg(0));
1048
94
  if (Arg.isInvalid())
1049
0
    return ExprError();
1050
94
  TheCall->setArg(0, Arg.get());
1051
94
1052
94
  return TheCall;
1053
94
}
1054
1055
// Emit an error and return true if the current architecture is not in the list
1056
// of supported architectures.
1057
static bool
1058
CheckBuiltinTargetSupport(Sema &S, unsigned BuiltinID, CallExpr *TheCall,
1059
90
                          ArrayRef<llvm::Triple::ArchType> SupportedArchs) {
1060
90
  llvm::Triple::ArchType CurArch =
1061
90
      S.getASTContext().getTargetInfo().getTriple().getArch();
1062
90
  if (llvm::is_contained(SupportedArchs, CurArch))
1063
72
    return false;
1064
18
  S.Diag(TheCall->getBeginLoc(), diag::err_builtin_target_unsupported)
1065
18
      << TheCall->getSourceRange();
1066
18
  return true;
1067
18
}
1068
1069
ExprResult
1070
Sema::CheckBuiltinFunctionCall(FunctionDecl *FDecl, unsigned BuiltinID,
1071
1.39M
                               CallExpr *TheCall) {
1072
1.39M
  ExprResult TheCallResult(TheCall);
1073
1.39M
1074
1.39M
  // Find out if any arguments are required to be integer constant expressions.
1075
1.39M
  unsigned ICEArguments = 0;
1076
1.39M
  ASTContext::GetBuiltinTypeError Error;
1077
1.39M
  Context.GetBuiltinType(BuiltinID, Error, &ICEArguments);
1078
1.39M
  if (Error != ASTContext::GE_None)
1079
132
    ICEArguments = 0;  // Don't diagnose previously diagnosed errors.
1080
1.39M
1081
1.39M
  // If any arguments are required to be ICE's, check and diagnose.
1082
1.74M
  for (unsigned ArgNo = 0; ICEArguments != 0; 
++ArgNo346k
) {
1083
346k
    // Skip arguments not required to be ICE's.
1084
346k
    if ((ICEArguments & (1 << ArgNo)) == 0) 
continue215k
;
1085
131k
1086
131k
    llvm::APSInt Result;
1087
131k
    if (SemaBuiltinConstantArg(TheCall, ArgNo, Result))
1088
254
      return true;
1089
130k
    ICEArguments &= ~(1 << ArgNo);
1090
130k
  }
1091
1.39M
1092
1.39M
  switch (BuiltinID) {
1093
1.39M
  case Builtin::BI__builtin___CFStringMakeConstantString:
1094
147
    assert(TheCall->getNumArgs() == 1 &&
1095
147
           "Wrong # arguments to builtin CFStringMakeConstantString");
1096
147
    if (CheckObjCString(TheCall->getArg(0)))
1097
1
      return ExprError();
1098
146
    break;
1099
811
  case Builtin::BI__builtin_ms_va_start:
1100
811
  case Builtin::BI__builtin_stdarg_start:
1101
811
  case Builtin::BI__builtin_va_start:
1102
811
    if (SemaBuiltinVAStart(BuiltinID, TheCall))
1103
33
      return ExprError();
1104
778
    break;
1105
778
  case Builtin::BI__va_start: {
1106
12
    switch (Context.getTargetInfo().getTriple().getArch()) {
1107
12
    case llvm::Triple::aarch64:
1108
10
    case llvm::Triple::arm:
1109
10
    case llvm::Triple::thumb:
1110
10
      if (SemaBuiltinVAStartARMMicrosoft(TheCall))
1111
3
        return ExprError();
1112
7
      break;
1113
7
    default:
1114
2
      if (SemaBuiltinVAStart(BuiltinID, TheCall))
1115
0
        return ExprError();
1116
2
      break;
1117
9
    }
1118
9
    break;
1119
9
  }
1120
9
1121
9
  // The acquire, release, and no fence variants are ARM and AArch64 only.
1122
42
  case Builtin::BI_interlockedbittestandset_acq:
1123
42
  case Builtin::BI_interlockedbittestandset_rel:
1124
42
  case Builtin::BI_interlockedbittestandset_nf:
1125
42
  case Builtin::BI_interlockedbittestandreset_acq:
1126
42
  case Builtin::BI_interlockedbittestandreset_rel:
1127
42
  case Builtin::BI_interlockedbittestandreset_nf:
1128
42
    if (CheckBuiltinTargetSupport(
1129
42
            *this, BuiltinID, TheCall,
1130
42
            {llvm::Triple::arm, llvm::Triple::thumb, llvm::Triple::aarch64}))
1131
12
      return ExprError();
1132
30
    break;
1133
30
1134
30
  // The 64-bit bittest variants are x64, ARM, and AArch64 only.
1135
48
  case Builtin::BI_bittest64:
1136
48
  case Builtin::BI_bittestandcomplement64:
1137
48
  case Builtin::BI_bittestandreset64:
1138
48
  case Builtin::BI_bittestandset64:
1139
48
  case Builtin::BI_interlockedbittestandreset64:
1140
48
  case Builtin::BI_interlockedbittestandset64:
1141
48
    if (CheckBuiltinTargetSupport(*this, BuiltinID, TheCall,
1142
48
                                  {llvm::Triple::x86_64, llvm::Triple::arm,
1143
48
                                   llvm::Triple::thumb, llvm::Triple::aarch64}))
1144
6
      return ExprError();
1145
42
    break;
1146
42
1147
117
  case Builtin::BI__builtin_isgreater:
1148
117
  case Builtin::BI__builtin_isgreaterequal:
1149
117
  case Builtin::BI__builtin_isless:
1150
117
  case Builtin::BI__builtin_islessequal:
1151
117
  case Builtin::BI__builtin_islessgreater:
1152
117
  case Builtin::BI__builtin_isunordered:
1153
117
    if (SemaBuiltinUnorderedCompare(TheCall))
1154
4
      return ExprError();
1155
113
    break;
1156
113
  case Builtin::BI__builtin_fpclassify:
1157
21
    if (SemaBuiltinFPClassification(TheCall, 6))
1158
3
      return ExprError();
1159
18
    break;
1160
2.93k
  case Builtin::BI__builtin_isfinite:
1161
2.93k
  case Builtin::BI__builtin_isinf:
1162
2.93k
  case Builtin::BI__builtin_isinf_sign:
1163
2.93k
  case Builtin::BI__builtin_isnan:
1164
2.93k
  case Builtin::BI__builtin_isnormal:
1165
2.93k
  case Builtin::BI__builtin_signbit:
1166
2.93k
  case Builtin::BI__builtin_signbitf:
1167
2.93k
  case Builtin::BI__builtin_signbitl:
1168
2.93k
    if (SemaBuiltinFPClassification(TheCall, 1))
1169
6
      return ExprError();
1170
2.92k
    break;
1171
118k
  case Builtin::BI__builtin_shufflevector:
1172
118k
    return SemaBuiltinShuffleVector(TheCall);
1173
2.92k
    // TheCall will be freed by the smart pointer here, but that's fine, since
1174
2.92k
    // SemaBuiltinShuffleVector guts it, but then doesn't release it.
1175
2.92k
  case Builtin::BI__builtin_prefetch:
1176
247
    if (SemaBuiltinPrefetch(TheCall))
1177
6
      return ExprError();
1178
241
    break;
1179
241
  case Builtin::BI__builtin_alloca_with_align:
1180
10
    if (SemaBuiltinAllocaWithAlign(TheCall))
1181
3
      return ExprError();
1182
7
    break;
1183
121
  case Builtin::BI__assume:
1184
121
  case Builtin::BI__builtin_assume:
1185
121
    if (SemaBuiltinAssume(TheCall))
1186
0
      return ExprError();
1187
121
    break;
1188
121
  case Builtin::BI__builtin_assume_aligned:
1189
51
    if (SemaBuiltinAssumeAligned(TheCall))
1190
6
      return ExprError();
1191
45
    break;
1192
3.82k
  case Builtin::BI__builtin_dynamic_object_size:
1193
3.82k
  case Builtin::BI__builtin_object_size:
1194
3.82k
    if (SemaBuiltinConstantArgRange(TheCall, 1, 0, 3))
1195
9
      return ExprError();
1196
3.81k
    break;
1197
3.81k
  case Builtin::BI__builtin_longjmp:
1198
11
    if (SemaBuiltinLongjmp(TheCall))
1199
3
      return ExprError();
1200
8
    break;
1201
9
  case Builtin::BI__builtin_setjmp:
1202
9
    if (SemaBuiltinSetjmp(TheCall))
1203
3
      return ExprError();
1204
6
    break;
1205
16
  case Builtin::BI_setjmp:
1206
16
  case Builtin::BI_setjmpex:
1207
16
    if (checkArgCount(*this, TheCall, 1))
1208
0
      return true;
1209
16
    break;
1210
88
  case Builtin::BI__builtin_classify_type:
1211
88
    if (checkArgCount(*this, TheCall, 1)) 
return true0
;
1212
88
    TheCall->setType(Context.IntTy);
1213
88
    break;
1214
1.52k
  case Builtin::BI__builtin_constant_p: {
1215
1.52k
    if (checkArgCount(*this, TheCall, 1)) 
return true2
;
1216
1.51k
    ExprResult Arg = DefaultFunctionArrayLvalueConversion(TheCall->getArg(0));
1217
1.51k
    if (Arg.isInvalid()) 
return true0
;
1218
1.51k
    TheCall->setArg(0, Arg.get());
1219
1.51k
    TheCall->setType(Context.IntTy);
1220
1.51k
    break;
1221
1.51k
  }
1222
1.51k
  case Builtin::BI__builtin_launder:
1223
120
    return SemaBuiltinLaunder(*this, TheCall);
1224
9.20k
  case Builtin::BI__sync_fetch_and_add:
1225
9.20k
  case Builtin::BI__sync_fetch_and_add_1:
1226
9.20k
  case Builtin::BI__sync_fetch_and_add_2:
1227
9.20k
  case Builtin::BI__sync_fetch_and_add_4:
1228
9.20k
  case Builtin::BI__sync_fetch_and_add_8:
1229
9.20k
  case Builtin::BI__sync_fetch_and_add_16:
1230
9.20k
  case Builtin::BI__sync_fetch_and_sub:
1231
9.20k
  case Builtin::BI__sync_fetch_and_sub_1:
1232
9.20k
  case Builtin::BI__sync_fetch_and_sub_2:
1233
9.20k
  case Builtin::BI__sync_fetch_and_sub_4:
1234
9.20k
  case Builtin::BI__sync_fetch_and_sub_8:
1235
9.20k
  case Builtin::BI__sync_fetch_and_sub_16:
1236
9.20k
  case Builtin::BI__sync_fetch_and_or:
1237
9.20k
  case Builtin::BI__sync_fetch_and_or_1:
1238
9.20k
  case Builtin::BI__sync_fetch_and_or_2:
1239
9.20k
  case Builtin::BI__sync_fetch_and_or_4:
1240
9.20k
  case Builtin::BI__sync_fetch_and_or_8:
1241
9.20k
  case Builtin::BI__sync_fetch_and_or_16:
1242
9.20k
  case Builtin::BI__sync_fetch_and_and:
1243
9.20k
  case Builtin::BI__sync_fetch_and_and_1:
1244
9.20k
  case Builtin::BI__sync_fetch_and_and_2:
1245
9.20k
  case Builtin::BI__sync_fetch_and_and_4:
1246
9.20k
  case Builtin::BI__sync_fetch_and_and_8:
1247
9.20k
  case Builtin::BI__sync_fetch_and_and_16:
1248
9.20k
  case Builtin::BI__sync_fetch_and_xor:
1249
9.20k
  case Builtin::BI__sync_fetch_and_xor_1:
1250
9.20k
  case Builtin::BI__sync_fetch_and_xor_2:
1251
9.20k
  case Builtin::BI__sync_fetch_and_xor_4:
1252
9.20k
  case Builtin::BI__sync_fetch_and_xor_8:
1253
9.20k
  case Builtin::BI__sync_fetch_and_xor_16:
1254
9.20k
  case Builtin::BI__sync_fetch_and_nand:
1255
9.20k
  case Builtin::BI__sync_fetch_and_nand_1:
1256
9.20k
  case Builtin::BI__sync_fetch_and_nand_2:
1257
9.20k
  case Builtin::BI__sync_fetch_and_nand_4:
1258
9.20k
  case Builtin::BI__sync_fetch_and_nand_8:
1259
9.20k
  case Builtin::BI__sync_fetch_and_nand_16:
1260
9.20k
  case Builtin::BI__sync_add_and_fetch:
1261
9.20k
  case Builtin::BI__sync_add_and_fetch_1:
1262
9.20k
  case Builtin::BI__sync_add_and_fetch_2:
1263
9.20k
  case Builtin::BI__sync_add_and_fetch_4:
1264
9.20k
  case Builtin::BI__sync_add_and_fetch_8:
1265
9.20k
  case Builtin::BI__sync_add_and_fetch_16:
1266
9.20k
  case Builtin::BI__sync_sub_and_fetch:
1267
9.20k
  case Builtin::BI__sync_sub_and_fetch_1:
1268
9.20k
  case Builtin::BI__sync_sub_and_fetch_2:
1269
9.20k
  case Builtin::BI__sync_sub_and_fetch_4:
1270
9.20k
  case Builtin::BI__sync_sub_and_fetch_8:
1271
9.20k
  case Builtin::BI__sync_sub_and_fetch_16:
1272
9.20k
  case Builtin::BI__sync_and_and_fetch:
1273
9.20k
  case Builtin::BI__sync_and_and_fetch_1:
1274
9.20k
  case Builtin::BI__sync_and_and_fetch_2:
1275
9.20k
  case Builtin::BI__sync_and_and_fetch_4:
1276
9.20k
  case Builtin::BI__sync_and_and_fetch_8:
1277
9.20k
  case Builtin::BI__sync_and_and_fetch_16:
1278
9.20k
  case Builtin::BI__sync_or_and_fetch:
1279
9.20k
  case Builtin::BI__sync_or_and_fetch_1:
1280
9.20k
  case Builtin::BI__sync_or_and_fetch_2:
1281
9.20k
  case Builtin::BI__sync_or_and_fetch_4:
1282
9.20k
  case Builtin::BI__sync_or_and_fetch_8:
1283
9.20k
  case Builtin::BI__sync_or_and_fetch_16:
1284
9.20k
  case Builtin::BI__sync_xor_and_fetch:
1285
9.20k
  case Builtin::BI__sync_xor_and_fetch_1:
1286
9.20k
  case Builtin::BI__sync_xor_and_fetch_2:
1287
9.20k
  case Builtin::BI__sync_xor_and_fetch_4:
1288
9.20k
  case Builtin::BI__sync_xor_and_fetch_8:
1289
9.20k
  case Builtin::BI__sync_xor_and_fetch_16:
1290
9.20k
  case Builtin::BI__sync_nand_and_fetch:
1291
9.20k
  case Builtin::BI__sync_nand_and_fetch_1:
1292
9.20k
  case Builtin::BI__sync_nand_and_fetch_2:
1293
9.20k
  case Builtin::BI__sync_nand_and_fetch_4:
1294
9.20k
  case Builtin::BI__sync_nand_and_fetch_8:
1295
9.20k
  case Builtin::BI__sync_nand_and_fetch_16:
1296
9.20k
  case Builtin::BI__sync_val_compare_and_swap:
1297
9.20k
  case Builtin::BI__sync_val_compare_and_swap_1:
1298
9.20k
  case Builtin::BI__sync_val_compare_and_swap_2:
1299
9.20k
  case Builtin::BI__sync_val_compare_and_swap_4:
1300
9.20k
  case Builtin::BI__sync_val_compare_and_swap_8:
1301
9.20k
  case Builtin::BI__sync_val_compare_and_swap_16:
1302
9.20k
  case Builtin::BI__sync_bool_compare_and_swap:
1303
9.20k
  case Builtin::BI__sync_bool_compare_and_swap_1:
1304
9.20k
  case Builtin::BI__sync_bool_compare_and_swap_2:
1305
9.20k
  case Builtin::BI__sync_bool_compare_and_swap_4:
1306
9.20k
  case Builtin::BI__sync_bool_compare_and_swap_8:
1307
9.20k
  case Builtin::BI__sync_bool_compare_and_swap_16:
1308
9.20k
  case Builtin::BI__sync_lock_test_and_set:
1309
9.20k
  case Builtin::BI__sync_lock_test_and_set_1:
1310
9.20k
  case Builtin::BI__sync_lock_test_and_set_2:
1311
9.20k
  case Builtin::BI__sync_lock_test_and_set_4:
1312
9.20k
  case Builtin::BI__sync_lock_test_and_set_8:
1313
9.20k
  case Builtin::BI__sync_lock_test_and_set_16:
1314
9.20k
  case Builtin::BI__sync_lock_release:
1315
9.20k
  case Builtin::BI__sync_lock_release_1:
1316
9.20k
  case Builtin::BI__sync_lock_release_2:
1317
9.20k
  case Builtin::BI__sync_lock_release_4:
1318
9.20k
  case Builtin::BI__sync_lock_release_8:
1319
9.20k
  case Builtin::BI__sync_lock_release_16:
1320
9.20k
  case Builtin::BI__sync_swap:
1321
9.20k
  case Builtin::BI__sync_swap_1:
1322
9.20k
  case Builtin::BI__sync_swap_2:
1323
9.20k
  case Builtin::BI__sync_swap_4:
1324
9.20k
  case Builtin::BI__sync_swap_8:
1325
9.20k
  case Builtin::BI__sync_swap_16:
1326
9.20k
    return SemaBuiltinAtomicOverloaded(TheCallResult);
1327
24.9k
  case Builtin::BI__sync_synchronize:
1328
24.9k
    Diag(TheCall->getBeginLoc(), diag::warn_atomic_implicit_seq_cst)
1329
24.9k
        << TheCall->getCallee()->getSourceRange();
1330
24.9k
    break;
1331
9.20k
  case Builtin::BI__builtin_nontemporal_load:
1332
2.37k
  case Builtin::BI__builtin_nontemporal_store:
1333
2.37k
    return SemaBuiltinNontemporalOverloaded(TheCallResult);
1334
2.37k
#define BUILTIN(ID, TYPE, ATTRS)
1335
2.37k
#define ATOMIC_BUILTIN(ID, TYPE, ATTRS) \
1336
3.45k
  case Builtin::BI##ID: \
1337
3.45k
    return SemaAtomicOpsOverloaded(TheCallResult, AtomicExpr::AO##ID);
1338
2.37k
#include "clang/Basic/Builtins.def"
1339
2.37k
  case Builtin::BI__annotation:
1340
31
    if (SemaBuiltinMSVCAnnotation(*this, TheCall))
1341
9
      return ExprError();
1342
22
    break;
1343
22
  case Builtin::BI__builtin_annotation:
1344
12
    if (SemaBuiltinAnnotation(*this, TheCall))
1345
3
      return ExprError();
1346
9
    break;
1347
2.13k
  case Builtin::BI__builtin_addressof:
1348
2.13k
    if (SemaBuiltinAddressof(*this, TheCall))
1349
2
      return ExprError();
1350
2.13k
    break;
1351
2.13k
  case Builtin::BI__builtin_add_overflow:
1352
86
  case Builtin::BI__builtin_sub_overflow:
1353
86
  case Builtin::BI__builtin_mul_overflow:
1354
86
    if (SemaBuiltinOverflow(*this, TheCall))
1355
7
      return ExprError();
1356
79
    break;
1357
894
  case Builtin::BI__builtin_operator_new:
1358
894
  case Builtin::BI__builtin_operator_delete: {
1359
894
    bool IsDelete = BuiltinID == Builtin::BI__builtin_operator_delete;
1360
894
    ExprResult Res =
1361
894
        SemaBuiltinOperatorNewDeleteOverloaded(TheCallResult, IsDelete);
1362
894
    if (Res.isInvalid())
1363
56
      CorrectDelayedTyposInExpr(TheCallResult.get());
1364
894
    return Res;
1365
894
  }
1366
894
  case Builtin::BI__builtin_dump_struct: {
1367
36
    // We first want to ensure we are called with 2 arguments
1368
36
    if (checkArgCount(*this, TheCall, 2))
1369
2
      return ExprError();
1370
34
    // Ensure that the first argument is of type 'struct XX *'
1371
34
    const Expr *PtrArg = TheCall->getArg(0)->IgnoreParenImpCasts();
1372
34
    const QualType PtrArgType = PtrArg->getType();
1373
34
    if (!PtrArgType->isPointerType() ||
1374
34
        
!PtrArgType->getPointeeType()->isRecordType()32
) {
1375
3
      Diag(PtrArg->getBeginLoc(), diag::err_typecheck_convert_incompatible)
1376
3
          << PtrArgType << "structure pointer" << 1 << 0 << 3 << 1 << PtrArgType
1377
3
          << "structure pointer";
1378
3
      return ExprError();
1379
3
    }
1380
31
1381
31
    // Ensure that the second argument is of type 'FunctionType'
1382
31
    const Expr *FnPtrArg = TheCall->getArg(1)->IgnoreImpCasts();
1383
31
    const QualType FnPtrArgType = FnPtrArg->getType();
1384
31
    if (!FnPtrArgType->isPointerType()) {
1385
1
      Diag(FnPtrArg->getBeginLoc(), diag::err_typecheck_convert_incompatible)
1386
1
          << FnPtrArgType << "'int (*)(const char *, ...)'" << 1 << 0 << 3 << 2
1387
1
          << FnPtrArgType << "'int (*)(const char *, ...)'";
1388
1
      return ExprError();
1389
1
    }
1390
30
1391
30
    const auto *FuncType =
1392
30
        FnPtrArgType->getPointeeType()->getAs<FunctionType>();
1393
30
1394
30
    if (!FuncType) {
1395
0
      Diag(FnPtrArg->getBeginLoc(), diag::err_typecheck_convert_incompatible)
1396
0
          << FnPtrArgType << "'int (*)(const char *, ...)'" << 1 << 0 << 3 << 2
1397
0
          << FnPtrArgType << "'int (*)(const char *, ...)'";
1398
0
      return ExprError();
1399
0
    }
1400
30
1401
30
    if (const auto *FT = dyn_cast<FunctionProtoType>(FuncType)) {
1402
29
      if (!FT->getNumParams()) {
1403
1
        Diag(FnPtrArg->getBeginLoc(), diag::err_typecheck_convert_incompatible)
1404
1
            << FnPtrArgType << "'int (*)(const char *, ...)'" << 1 << 0 << 3
1405
1
            << 2 << FnPtrArgType << "'int (*)(const char *, ...)'";
1406
1
        return ExprError();
1407
1
      }
1408
28
      QualType PT = FT->getParamType(0);
1409
28
      if (!FT->isVariadic() || 
FT->getReturnType() != Context.IntTy27
||
1410
28
          
!PT->isPointerType()26
||
!PT->getPointeeType()->isCharType()25
||
1411
28
          
!PT->getPointeeType().isConstQualified()25
) {
1412
4
        Diag(FnPtrArg->getBeginLoc(), diag::err_typecheck_convert_incompatible)
1413
4
            << FnPtrArgType << "'int (*)(const char *, ...)'" << 1 << 0 << 3
1414
4
            << 2 << FnPtrArgType << "'int (*)(const char *, ...)'";
1415
4
        return ExprError();
1416
4
      }
1417
25
    }
1418
25
1419
25
    TheCall->setType(Context.IntTy);
1420
25
    break;
1421
25
  }
1422
25
  case Builtin::BI__builtin_preserve_access_index:
1423
20
    if (SemaBuiltinPreserveAI(*this, TheCall))
1424
0
      return ExprError();
1425
20
    break;
1426
20
  case Builtin::BI__builtin_call_with_static_chain:
1427
16
    if (SemaBuiltinCallWithStaticChain(*this, TheCall))
1428
6
      return ExprError();
1429
10
    break;
1430
29
  case Builtin::BI__exception_code:
1431
29
  case Builtin::BI_exception_code:
1432
29
    if (SemaBuiltinSEHScopeCheck(*this, TheCall, Scope::SEHExceptScope,
1433
29
                                 diag::err_seh___except_block))
1434
6
      return ExprError();
1435
23
    break;
1436
23
  case Builtin::BI__exception_info:
1437
9
  case Builtin::BI_exception_info:
1438
9
    if (SemaBuiltinSEHScopeCheck(*this, TheCall, Scope::SEHFilterScope,
1439
9
                                 diag::err_seh___except_filter))
1440
7
      return ExprError();
1441
2
    break;
1442
6
  case Builtin::BI__GetExceptionInfo:
1443
6
    if (checkArgCount(*this, TheCall, 1))
1444
0
      return ExprError();
1445
6
1446
6
    if (CheckCXXThrowOperand(
1447
6
            TheCall->getBeginLoc(),
1448
6
            Context.getExceptionObjectType(FDecl->getParamDecl(0)->getType()),
1449
6
            TheCall))
1450
0
      return ExprError();
1451
6
1452
6
    TheCall->setType(Context.VoidPtrTy);
1453
6
    break;
1454
6
  // OpenCL v2.0, s6.13.16 - Pipe functions
1455
28
  case Builtin::BIread_pipe:
1456
28
  case Builtin::BIwrite_pipe:
1457
28
    // Since those two functions are declared with var args, we need a semantic
1458
28
    // check for the argument.
1459
28
    if (SemaBuiltinRWPipe(*this, TheCall))
1460
14
      return ExprError();
1461
14
    break;
1462
14
  case Builtin::BIreserve_read_pipe:
1463
12
  case Builtin::BIreserve_write_pipe:
1464
12
  case Builtin::BIwork_group_reserve_read_pipe:
1465
12
  case Builtin::BIwork_group_reserve_write_pipe:
1466
12
    if (SemaBuiltinReserveRWPipe(*this, TheCall))
1467
4
      return ExprError();
1468
8
    break;
1469
8
  case Builtin::BIsub_group_reserve_read_pipe:
1470
4
  case Builtin::BIsub_group_reserve_write_pipe:
1471
4
    if (checkOpenCLSubgroupExt(*this, TheCall) ||
1472
4
        SemaBuiltinReserveRWPipe(*this, TheCall))
1473
2
      return ExprError();
1474
2
    break;
1475
10
  case Builtin::BIcommit_read_pipe:
1476
10
  case Builtin::BIcommit_write_pipe:
1477
10
  case Builtin::BIwork_group_commit_read_pipe:
1478
10
  case Builtin::BIwork_group_commit_write_pipe:
1479
10
    if (SemaBuiltinCommitRWPipe(*this, TheCall))
1480
4
      return ExprError();
1481
6
    break;
1482
6
  case Builtin::BIsub_group_commit_read_pipe:
1483
4
  case Builtin::BIsub_group_commit_write_pipe:
1484
4
    if (checkOpenCLSubgroupExt(*this, TheCall) ||
1485
4
        SemaBuiltinCommitRWPipe(*this, TheCall))
1486
2
      return ExprError();
1487
2
    break;
1488
10
  case Builtin::BIget_pipe_num_packets:
1489
10
  case Builtin::BIget_pipe_max_packets:
1490
10
    if (SemaBuiltinPipePackets(*this, TheCall))
1491
2
      return ExprError();
1492
8
    break;
1493
32
  case Builtin::BIto_global:
1494
32
  case Builtin::BIto_local:
1495
32
  case Builtin::BIto_private:
1496
32
    if (SemaOpenCLBuiltinToAddr(*this, BuiltinID, TheCall))
1497
4
      return ExprError();
1498
28
    break;
1499
28
  // OpenCL v2.0, s6.13.17 - Enqueue kernel functions.
1500
153
  case Builtin::BIenqueue_kernel:
1501
153
    if (SemaOpenCLBuiltinEnqueueKernel(*this, TheCall))
1502
64
      return ExprError();
1503
89
    break;
1504
97
  case Builtin::BIget_kernel_work_group_size:
1505
97
  case Builtin::BIget_kernel_preferred_work_group_size_multiple:
1506
97
    if (SemaOpenCLBuiltinKernelWorkGroupSize(*this, TheCall))
1507
56
      return ExprError();
1508
41
    break;
1509
41
  case Builtin::BIget_kernel_max_sub_group_size_for_ndrange:
1510
38
  case Builtin::BIget_kernel_sub_group_count_for_ndrange:
1511
38
    if (SemaOpenCLBuiltinNDRangeAndBlock(*this, TheCall))
1512
24
      return ExprError();
1513
14
    break;
1514
332
  case Builtin::BI__builtin_os_log_format:
1515
332
  case Builtin::BI__builtin_os_log_format_buffer_size:
1516
332
    if (SemaBuiltinOSLogFormat(TheCall))
1517
2
      return ExprError();
1518
330
    break;
1519
1.25M
  }
1520
1.25M
1521
1.25M
  // Since the target specific builtins for each arch overlap, only check those
1522
1.25M
  // of the arch we are compiling for.
1523
1.25M
  if (Context.BuiltinInfo.isTSBuiltin(BuiltinID)) {
1524
833k
    switch (Context.getTargetInfo().getTriple().getArch()) {
1525
833k
      case llvm::Triple::arm:
1526
20.7k
      case llvm::Triple::armeb:
1527
20.7k
      case llvm::Triple::thumb:
1528
20.7k
      case llvm::Triple::thumbeb:
1529
20.7k
        if (CheckARMBuiltinFunctionCall(BuiltinID, TheCall))
1530
80
          return ExprError();
1531
20.7k
        break;
1532
88.7k
      case llvm::Triple::aarch64:
1533
88.7k
      case llvm::Triple::aarch64_be:
1534
88.7k
        if (CheckAArch64BuiltinFunctionCall(BuiltinID, TheCall))
1535
266
          return ExprError();
1536
88.4k
        break;
1537
88.4k
      case llvm::Triple::hexagon:
1538
1.75k
        if (CheckHexagonBuiltinFunctionCall(BuiltinID, TheCall))
1539
19
          return ExprError();
1540
1.73k
        break;
1541
1.73k
      case llvm::Triple::mips:
1542
1.04k
      case llvm::Triple::mipsel:
1543
1.04k
      case llvm::Triple::mips64:
1544
1.04k
      case llvm::Triple::mips64el:
1545
1.04k
        if (CheckMipsBuiltinFunctionCall(BuiltinID, TheCall))
1546
310
          return ExprError();
1547
735
        break;
1548
10.1k
      case llvm::Triple::systemz:
1549
10.1k
        if (CheckSystemZBuiltinFunctionCall(BuiltinID, TheCall))
1550
96
          return ExprError();
1551
10.0k
        break;
1552
648k
      case llvm::Triple::x86:
1553
648k
      case llvm::Triple::x86_64:
1554
648k
        if (CheckX86BuiltinFunctionCall(BuiltinID, TheCall))
1555
10
          return ExprError();
1556
648k
        break;
1557
648k
      case llvm::Triple::ppc:
1558
59.6k
      case llvm::Triple::ppc64:
1559
59.6k
      case llvm::Triple::ppc64le:
1560
59.6k
        if (CheckPPCBuiltinFunctionCall(BuiltinID, TheCall))
1561
51
          return ExprError();
1562
59.6k
        break;
1563
59.6k
      default:
1564
2.95k
        break;
1565
1.25M
    }
1566
1.25M
  }
1567
1.25M
1568
1.25M
  return TheCallResult;
1569
1.25M
}
1570
1571
// Get the valid immediate range for the specified NEON type code.
1572
2.15k
static unsigned RFT(unsigned t, bool shift = false, bool ForceQuad = false) {
1573
2.15k
  NeonTypeFlags Type(t);
1574
2.15k
  int IsQuad = ForceQuad ? 
true41
:
Type.isQuad()2.11k
;
1575
2.15k
  switch (Type.getEltType()) {
1576
2.15k
  case NeonTypeFlags::Int8:
1577
408
  case NeonTypeFlags::Poly8:
1578
408
    return shift ? 
7176
:
(8 << IsQuad) - 1232
;
1579
570
  case NeonTypeFlags::Int16:
1580
570
  case NeonTypeFlags::Poly16:
1581
570
    return shift ? 
15344
:
(4 << IsQuad) - 1226
;
1582
570
  case NeonTypeFlags::Int32:
1583
508
    return shift ? 
31335
:
(2 << IsQuad) - 1173
;
1584
570
  case NeonTypeFlags::Int64:
1585
470
  case NeonTypeFlags::Poly64:
1586
470
    return shift ? 
63286
:
(1 << IsQuad) - 1184
;
1587
470
  case NeonTypeFlags::Poly128:
1588
0
    return shift ? 127 : (1 << IsQuad) - 1;
1589
470
  case NeonTypeFlags::Float16:
1590
44
    assert(!shift && "cannot shift float types!");
1591
44
    return (4 << IsQuad) - 1;
1592
470
  case NeonTypeFlags::Float32:
1593
78
    assert(!shift && "cannot shift float types!");
1594
78
    return (2 << IsQuad) - 1;
1595
470
  case NeonTypeFlags::Float64:
1596
81
    assert(!shift && "cannot shift float types!");
1597
81
    return (1 << IsQuad) - 1;
1598
0
  }
1599
0
  llvm_unreachable("Invalid NeonTypeFlag!");
1600
0
}
1601
1602
/// getNeonEltType - Return the QualType corresponding to the elements of
1603
/// the vector type specified by the NeonTypeFlags.  This is used to check
1604
/// the pointer arguments for Neon load/store intrinsics.
1605
static QualType getNeonEltType(NeonTypeFlags Flags, ASTContext &Context,
1606
1.78k
                               bool IsPolyUnsigned, bool IsInt64Long) {
1607
1.78k
  switch (Flags.getEltType()) {
1608
1.78k
  case NeonTypeFlags::Int8:
1609
290
    return Flags.isUnsigned() ? 
Context.UnsignedCharTy120
:
Context.SignedCharTy170
;
1610
1.78k
  case NeonTypeFlags::Int16:
1611
303
    return Flags.isUnsigned() ? 
Context.UnsignedShortTy126
:
Context.ShortTy177
;
1612
1.78k
  case NeonTypeFlags::Int32:
1613
303
    return Flags.isUnsigned() ? 
Context.UnsignedIntTy126
:
Context.IntTy177
;
1614
1.78k
  case NeonTypeFlags::Int64:
1615
260
    if (IsInt64Long)
1616
140
      return Flags.isUnsigned() ? 
Context.UnsignedLongTy46
:
Context.LongTy94
;
1617
120
    else
1618
120
      return Flags.isUnsigned() ? 
Context.UnsignedLongLongTy61
1619
120
                                : 
Context.LongLongTy59
;
1620
120
  case NeonTypeFlags::Poly8:
1621
120
    return IsPolyUnsigned ? 
Context.UnsignedCharTy80
:
Context.SignedCharTy40
;
1622
126
  case NeonTypeFlags::Poly16:
1623
126
    return IsPolyUnsigned ? 
Context.UnsignedShortTy80
:
Context.ShortTy46
;
1624
82
  case NeonTypeFlags::Poly64:
1625
82
    if (IsInt64Long)
1626
48
      return Context.UnsignedLongTy;
1627
34
    else
1628
34
      return Context.UnsignedLongLongTy;
1629
0
  case NeonTypeFlags::Poly128:
1630
0
    break;
1631
92
  case NeonTypeFlags::Float16:
1632
92
    return Context.HalfTy;
1633
128
  case NeonTypeFlags::Float32:
1634
128
    return Context.FloatTy;
1635
80
  case NeonTypeFlags::Float64:
1636
80
    return Context.DoubleTy;
1637
0
  }
1638
0
  llvm_unreachable("Invalid NeonTypeFlag!");
1639
0
}
1640
1641
108k
bool Sema::CheckNeonBuiltinFunctionCall(unsigned BuiltinID, CallExpr *TheCall) {
1642
108k
  llvm::APSInt Result;
1643
108k
  uint64_t mask = 0;
1644
108k
  unsigned TV = 0;
1645
108k
  int PtrArgNum = -1;
1646
108k
  bool HasConstPtr = false;
1647
108k
  switch (BuiltinID) {
1648
108k
#define GET_NEON_OVERLOAD_CHECK
1649
108k
#include 
"clang/Basic/arm_neon.inc"922
1650
108k
#include "clang/Basic/arm_fp16.inc"
1651
108k
#undef GET_NEON_OVERLOAD_CHECK
1652
108k
  }
1653
108k
1654
108k
  // For NEON intrinsics which are overloaded on vector element type, validate
1655
108k
  // the immediate which specifies which variant to emit.
1656
108k
  unsigned ImmArg = TheCall->getNumArgs()-1;
1657
108k
  if (mask) {
1658
83.3k
    if (SemaBuiltinConstantArg(TheCall, ImmArg, Result))
1659
0
      return true;
1660
83.3k
1661
83.3k
    TV = Result.getLimitedValue(64);
1662
83.3k
    if ((TV > 63) || (mask & (1ULL << TV)) == 0)
1663
0
      return Diag(TheCall->getBeginLoc(), diag::err_invalid_neon_type_code)
1664
0
             << TheCall->getArg(ImmArg)->getSourceRange();
1665
108k
  }
1666
108k
1667
108k
  if (PtrArgNum >= 0) {
1668
1.78k
    // Check that pointer arguments have the specified type.
1669
1.78k
    Expr *Arg = TheCall->getArg(PtrArgNum);
1670
1.78k
    if (ImplicitCastExpr *ICE = dyn_cast<ImplicitCastExpr>(Arg))
1671
1.78k
      Arg = ICE->getSubExpr();
1672
1.78k
    ExprResult RHS = DefaultFunctionArrayLvalueConversion(Arg);
1673
1.78k
    QualType RHSTy = RHS.get()->getType();
1674
1.78k
1675
1.78k
    llvm::Triple::ArchType Arch = Context.getTargetInfo().getTriple().getArch();
1676
1.78k
    bool IsPolyUnsigned = Arch == llvm::Triple::aarch64 ||
1677
1.78k
                          
Arch == llvm::Triple::aarch64_be498
;
1678
1.78k
    bool IsInt64Long =
1679
1.78k
        Context.getTargetInfo().getInt64Type() == TargetInfo::SignedLong;
1680
1.78k
    QualType EltTy =
1681
1.78k
        getNeonEltType(NeonTypeFlags(TV), Context, IsPolyUnsigned, IsInt64Long);
1682
1.78k
    if (HasConstPtr)
1683
1.00k
      EltTy = EltTy.withConst();
1684
1.78k
    QualType LHSTy = Context.getPointerType(EltTy);
1685
1.78k
    AssignConvertType ConvTy;
1686
1.78k
    ConvTy = CheckSingleAssignmentConstraints(LHSTy, RHS);
1687
1.78k
    if (RHS.isInvalid())
1688
0
      return true;
1689
1.78k
    if (DiagnoseAssignmentResult(ConvTy, Arg->getBeginLoc(), LHSTy, RHSTy,
1690
1.78k
                                 RHS.get(), AA_Assigning))
1691
0
      return true;
1692
108k
  }
1693
108k
1694
108k
  // For NEON intrinsics which take an immediate value as part of the
1695
108k
  // instruction, range check them here.
1696
108k
  unsigned i = 0, l = 0, u = 0;
1697
108k
  switch (BuiltinID) {
1698
108k
  default:
1699
100k
    return false;
1700
108k
  #define GET_NEON_IMMEDIATE_CHECK
1701
108k
  #include 
"clang/Basic/arm_neon.inc"100k
1702
108k
  #include 
"clang/Basic/arm_fp16.inc"9
1703
108k
  #undef GET_NEON_IMMEDIATE_CHECK
1704
108k
  }
1705
108k
1706
108k
  
return SemaBuiltinConstantArgRange(TheCall, i, l, u + l)8.26k
;
1707
108k
}
1708
1709
bool Sema::CheckARMBuiltinExclusiveCall(unsigned BuiltinID, CallExpr *TheCall,
1710
235
                                        unsigned MaxWidth) {
1711
235
  assert((BuiltinID == ARM::BI__builtin_arm_ldrex ||
1712
235
          BuiltinID == ARM::BI__builtin_arm_ldaex ||
1713
235
          BuiltinID == ARM::BI__builtin_arm_strex ||
1714
235
          BuiltinID == ARM::BI__builtin_arm_stlex ||
1715
235
          BuiltinID == AArch64::BI__builtin_arm_ldrex ||
1716
235
          BuiltinID == AArch64::BI__builtin_arm_ldaex ||
1717
235
          BuiltinID == AArch64::BI__builtin_arm_strex ||
1718
235
          BuiltinID == AArch64::BI__builtin_arm_stlex) &&
1719
235
         "unexpected ARM builtin");
1720
235
  bool IsLdrex = BuiltinID == ARM::BI__builtin_arm_ldrex ||
1721
235
                 
BuiltinID == ARM::BI__builtin_arm_ldaex201
||
1722
235
                 
BuiltinID == AArch64::BI__builtin_arm_ldrex178
||
1723
235
                 
BuiltinID == AArch64::BI__builtin_arm_ldaex142
;
1724
235
1725
235
  DeclRefExpr *DRE =cast<DeclRefExpr>(TheCall->getCallee()->IgnoreParenCasts());
1726
235
1727
235
  // Ensure that we have the proper number of arguments.
1728
235
  if (checkArgCount(*this, TheCall, IsLdrex ? 
1117
:
2118
))
1729
16
    return true;
1730
219
1731
219
  // Inspect the pointer argument of the atomic builtin.  This should always be
1732
219
  // a pointer type, whose element is an integral scalar or pointer type.
1733
219
  // Because it is a pointer type, we don't have to worry about any implicit
1734
219
  // casts here.
1735
219
  Expr *PointerArg = TheCall->getArg(IsLdrex ? 
0109
:
1110
);
1736
219
  ExprResult PointerArgRes = DefaultFunctionArrayLvalueConversion(PointerArg);
1737
219
  if (PointerArgRes.isInvalid())
1738
0
    return true;
1739
219
  PointerArg = PointerArgRes.get();
1740
219
1741
219
  const PointerType *pointerType = PointerArg->getType()->getAs<PointerType>();
1742
219
  if (!pointerType) {
1743
0
    Diag(DRE->getBeginLoc(), diag::err_atomic_builtin_must_be_pointer)
1744
0
        << PointerArg->getType() << PointerArg->getSourceRange();
1745
0
    return true;
1746
0
  }
1747
219
1748
219
  // ldrex takes a "const volatile T*" and strex takes a "volatile T*". Our next
1749
219
  // task is to insert the appropriate casts into the AST. First work out just
1750
219
  // what the appropriate type is.
1751
219
  QualType ValType = pointerType->getPointeeType();
1752
219
  QualType AddrType = ValType.getUnqualifiedType().withVolatile();
1753
219
  if (IsLdrex)
1754
109
    AddrType.addConst();
1755
219
1756
219
  // Issue a warning if the cast is dodgy.
1757
219
  CastKind CastNeeded = CK_NoOp;
1758
219
  if (!AddrType.isAtLeastAsQualifiedAs(ValType)) {
1759
4
    CastNeeded = CK_BitCast;
1760
4
    Diag(DRE->getBeginLoc(), diag::ext_typecheck_convert_discards_qualifiers)
1761
4
        << PointerArg->getType() << Context.getPointerType(AddrType)
1762
4
        << AA_Passing << PointerArg->getSourceRange();
1763
4
  }
1764
219
1765
219
  // Finally, do the cast and replace the argument with the corrected version.
1766
219
  AddrType = Context.getPointerType(AddrType);
1767
219
  PointerArgRes = ImpCastExprToType(PointerArg, AddrType, CastNeeded);
1768
219
  if (PointerArgRes.isInvalid())
1769
0
    return true;
1770
219
  PointerArg = PointerArgRes.get();
1771
219
1772
219
  TheCall->setArg(IsLdrex ? 
0109
:
1110
, PointerArg);
1773
219
1774
219
  // In general, we allow ints, floats and pointers to be loaded and stored.
1775
219
  if (!ValType->isIntegerType() && 
!ValType->isAnyPointerType()72
&&
1776
219
      
!ValType->isBlockPointerType()40
&&
!ValType->isFloatingType()40
) {
1777
8
    Diag(DRE->getBeginLoc(), diag::err_atomic_builtin_must_be_pointer_intfltptr)
1778
8
        << PointerArg->getType() << PointerArg->getSourceRange();
1779
8
    return true;
1780
8
  }
1781
211
1782
211
  // But ARM doesn't have instructions to deal with 128-bit versions.
1783
211
  if (Context.getTypeSize(ValType) > MaxWidth) {
1784
4
    assert(MaxWidth == 64 && "Diagnostic unexpectedly inaccurate");
1785
4
    Diag(DRE->getBeginLoc(), diag::err_atomic_exclusive_builtin_pointer_size)
1786
4
        << PointerArg->getType() << PointerArg->getSourceRange();
1787
4
    return true;
1788
4
  }
1789
207
1790
207
  switch (ValType.getObjCLifetime()) {
1791
207
  case Qualifiers::OCL_None:
1792
207
  case Qualifiers::OCL_ExplicitNone:
1793
207
    // okay
1794
207
    break;
1795
207
1796
207
  case Qualifiers::OCL_Weak:
1797
0
  case Qualifiers::OCL_Strong:
1798
0
  case Qualifiers::OCL_Autoreleasing:
1799
0
    Diag(DRE->getBeginLoc(), diag::err_arc_atomic_ownership)
1800
0
        << ValType << PointerArg->getSourceRange();
1801
0
    return true;
1802
207
  }
1803
207
1804
207
  if (IsLdrex) {
1805
103
    TheCall->setType(ValType);
1806
103
    return false;
1807
103
  }
1808
104
1809
104
  // Initialize the argument to be stored.
1810
104
  ExprResult ValArg = TheCall->getArg(0);
1811
104
  InitializedEntity Entity = InitializedEntity::InitializeParameter(
1812
104
      Context, ValType, /*consume*/ false);
1813
104
  ValArg = PerformCopyInitialization(Entity, SourceLocation(), ValArg);
1814
104
  if (ValArg.isInvalid())
1815
4
    return true;
1816
100
  TheCall->setArg(0, ValArg.get());
1817
100
1818
100
  // __builtin_arm_strex always returns an int. It's marked as such in the .def,
1819
100
  // but the custom checker bypasses all default analysis.
1820
100
  TheCall->setType(Context.IntTy);
1821
100
  return false;
1822
100
}
1823
1824
20.7k
bool Sema::CheckARMBuiltinFunctionCall(unsigned BuiltinID, CallExpr *TheCall) {
1825
20.7k
  if (BuiltinID == ARM::BI__builtin_arm_ldrex ||
1826
20.7k
      
BuiltinID == ARM::BI__builtin_arm_ldaex20.7k
||
1827
20.7k
      
BuiltinID == ARM::BI__builtin_arm_strex20.7k
||
1828
20.7k
      
BuiltinID == ARM::BI__builtin_arm_stlex20.6k
) {
1829
115
    return CheckARMBuiltinExclusiveCall(BuiltinID, TheCall, 64);
1830
115
  }
1831
20.6k
1832
20.6k
  if (BuiltinID == ARM::BI__builtin_arm_prefetch) {
1833
16
    return SemaBuiltinConstantArgRange(TheCall, 1, 0, 1) ||
1834
16
      
SemaBuiltinConstantArgRange(TheCall, 2, 0, 1)13
;
1835
16
  }
1836
20.6k
1837
20.6k
  if (BuiltinID == ARM::BI__builtin_arm_rsr64 ||
1838
20.6k
      
BuiltinID == ARM::BI__builtin_arm_wsr6420.6k
)
1839
15
    return SemaBuiltinARMSpecialReg(BuiltinID, TheCall, 0, 3, false);
1840
20.6k
1841
20.6k
  if (BuiltinID == ARM::BI__builtin_arm_rsr ||
1842
20.6k
      
BuiltinID == ARM::BI__builtin_arm_rsrp20.6k
||
1843
20.6k
      
BuiltinID == ARM::BI__builtin_arm_wsr20.6k
||
1844
20.6k
      
BuiltinID == ARM::BI__builtin_arm_wsrp20.6k
)
1845
30
    return SemaBuiltinARMSpecialReg(BuiltinID, TheCall, 0, 5, true);
1846
20.6k
1847
20.6k
  if (CheckNeonBuiltinFunctionCall(BuiltinID, TheCall))
1848
2
    return true;
1849
20.6k
1850
20.6k
  // For intrinsics which take an immediate value as part of the instruction,
1851
20.6k
  // range check them here.
1852
20.6k
  // FIXME: VFP Intrinsics should error if VFP not present.
1853
20.6k
  switch (BuiltinID) {
1854
20.6k
  
default: return false20.5k
;
1855
20.6k
  case ARM::BI__builtin_arm_ssat:
1856
15
    return SemaBuiltinConstantArgRange(TheCall, 1, 1, 32);
1857
20.6k
  case ARM::BI__builtin_arm_usat:
1858
13
    return SemaBuiltinConstantArgRange(TheCall, 1, 0, 31);
1859
20.6k
  case ARM::BI__builtin_arm_ssat16:
1860
10
    return SemaBuiltinConstantArgRange(TheCall, 1, 1, 16);
1861
20.6k
  case ARM::BI__builtin_arm_usat16:
1862
8
    return SemaBuiltinConstantArgRange(TheCall, 1, 0, 15);
1863
20.6k
  case ARM::BI__builtin_arm_vcvtr_f:
1864
20
  case ARM::BI__builtin_arm_vcvtr_d:
1865
20
    return SemaBuiltinConstantArgRange(TheCall, 1, 0, 1);
1866
24
  case ARM::BI__builtin_arm_dmb:
1867
24
  case ARM::BI__builtin_arm_dsb:
1868
24
  case ARM::BI__builtin_arm_isb:
1869
24
  case ARM::BI__builtin_arm_dbg:
1870
24
    return SemaBuiltinConstantArgRange(TheCall, 0, 0, 15);
1871
20.6k
  }
1872
20.6k
}
1873
1874
bool Sema::CheckAArch64BuiltinFunctionCall(unsigned BuiltinID,
1875
88.7k
                                         CallExpr *TheCall) {
1876
88.7k
  if (BuiltinID == AArch64::BI__builtin_arm_ldrex ||
1877
88.7k
      
BuiltinID == AArch64::BI__builtin_arm_ldaex88.6k
||
1878
88.7k
      
BuiltinID == AArch64::BI__builtin_arm_strex88.6k
||
1879
88.7k
      
BuiltinID == AArch64::BI__builtin_arm_stlex88.6k
) {
1880
120
    return CheckARMBuiltinExclusiveCall(BuiltinID, TheCall, 128);
1881
120
  }
1882
88.5k
1883
88.5k
  if (BuiltinID == AArch64::BI__builtin_arm_prefetch) {
1884
36
    return SemaBuiltinConstantArgRange(TheCall, 1, 0, 1) ||
1885
36
      
SemaBuiltinConstantArgRange(TheCall, 2, 0, 2)34
||
1886
36
      
SemaBuiltinConstantArgRange(TheCall, 3, 0, 1)32
||
1887
36
      
SemaBuiltinConstantArgRange(TheCall, 4, 0, 1)30
;
1888
36
  }
1889
88.5k
1890
88.5k
  if (BuiltinID == AArch64::BI__builtin_arm_rsr64 ||
1891
88.5k
      
BuiltinID == AArch64::BI__builtin_arm_wsr6488.5k
)
1892
27
    return SemaBuiltinARMSpecialReg(BuiltinID, TheCall, 0, 5, true);
1893
88.5k
1894
88.5k
  // Memory Tagging Extensions (MTE) Intrinsics
1895
88.5k
  if (BuiltinID == AArch64::BI__builtin_arm_irg ||
1896
88.5k
      
BuiltinID == AArch64::BI__builtin_arm_addg88.5k
||
1897
88.5k
      
BuiltinID == AArch64::BI__builtin_arm_gmi88.4k
||
1898
88.5k
      
BuiltinID == AArch64::BI__builtin_arm_ldg88.4k
||
1899
88.5k
      
BuiltinID == AArch64::BI__builtin_arm_stg88.4k
||
1900
88.5k
      
BuiltinID == AArch64::BI__builtin_arm_subp88.4k
) {
1901
54
    return SemaBuiltinARMMemoryTaggingCall(BuiltinID, TheCall);
1902
54
  }
1903
88.4k
1904
88.4k
  if (BuiltinID == AArch64::BI__builtin_arm_rsr ||
1905
88.4k
      
BuiltinID == AArch64::BI__builtin_arm_rsrp88.4k
||
1906
88.4k
      
BuiltinID == AArch64::BI__builtin_arm_wsr88.4k
||
1907
88.4k
      
BuiltinID == AArch64::BI__builtin_arm_wsrp88.4k
)
1908
48
    return SemaBuiltinARMSpecialReg(BuiltinID, TheCall, 0, 5, true);
1909
88.4k
1910
88.4k
  // Only check the valid encoding range. Any constant in this range would be
1911
88.4k
  // converted to a register of the form S1_2_C3_C4_5. Let the hardware throw
1912
88.4k
  // an exception for incorrect registers. This matches MSVC behavior.
1913
88.4k
  if (BuiltinID == AArch64::BI_ReadStatusReg ||
1914
88.4k
      
BuiltinID == AArch64::BI_WriteStatusReg88.3k
)
1915
42
    return SemaBuiltinConstantArgRange(TheCall, 0, 0, 0x7fff);
1916
88.3k
1917
88.3k
  if (BuiltinID == AArch64::BI__getReg)
1918
4
    return SemaBuiltinConstantArgRange(TheCall, 0, 0, 31);
1919
88.3k
1920
88.3k
  if (CheckNeonBuiltinFunctionCall(BuiltinID, TheCall))
1921
190
    return true;
1922
88.1k
1923
88.1k
  // For intrinsics which take an immediate value as part of the instruction,
1924
88.1k
  // range check them here.
1925
88.1k
  unsigned i = 0, l = 0, u = 0;
1926
88.1k
  switch (BuiltinID) {
1927
88.1k
  
default: return false88.1k
;
1928
88.1k
  case AArch64::BI__builtin_arm_dmb:
1929
27
  case AArch64::BI__builtin_arm_dsb:
1930
27
  case AArch64::BI__builtin_arm_isb: l = 0; u = 15; break;
1931
27
  }
1932
27
1933
27
  return SemaBuiltinConstantArgRange(TheCall, i, l, u + l);
1934
27
}
1935
1936
1.75k
bool Sema::CheckHexagonBuiltinCpu(unsigned BuiltinID, CallExpr *TheCall) {
1937
1.75k
  struct BuiltinAndString {
1938
1.75k
    unsigned BuiltinID;
1939
1.75k
    const char *Str;
1940
1.75k
  };
1941
1.75k
1942
1.75k
  static BuiltinAndString ValidCPU[] = {
1943
1.75k
    { Hexagon::BI__builtin_HEXAGON_A6_vcmpbeq_notany, "v65,v66" },
1944
1.75k
    { Hexagon::BI__builtin_HEXAGON_A6_vminub_RdP, "v62,v65,v66" },
1945
1.75k
    { Hexagon::BI__builtin_HEXAGON_F2_dfadd, "v66" },
1946
1.75k
    { Hexagon::BI__builtin_HEXAGON_F2_dfsub, "v66" },
1947
1.75k
    { Hexagon::BI__builtin_HEXAGON_M2_mnaci, "v66" },
1948
1.75k
    { Hexagon::BI__builtin_HEXAGON_M6_vabsdiffb, "v62,v65,v66" },
1949
1.75k
    { Hexagon::BI__builtin_HEXAGON_M6_vabsdiffub, "v62,v65,v66" },
1950
1.75k
    { Hexagon::BI__builtin_HEXAGON_S2_mask, "v66" },
1951
1.75k
    { Hexagon::BI__builtin_HEXAGON_S6_rol_i_p_acc, "v60,v62,v65,v66" },
1952
1.75k
    { Hexagon::BI__builtin_HEXAGON_S6_rol_i_p_and, "v60,v62,v65,v66" },
1953
1.75k
    { Hexagon::BI__builtin_HEXAGON_S6_rol_i_p_nac, "v60,v62,v65,v66" },
1954
1.75k
    { Hexagon::BI__builtin_HEXAGON_S6_rol_i_p_or, "v60,v62,v65,v66" },
1955
1.75k
    { Hexagon::BI__builtin_HEXAGON_S6_rol_i_p, "v60,v62,v65,v66" },
1956
1.75k
    { Hexagon::BI__builtin_HEXAGON_S6_rol_i_p_xacc, "v60,v62,v65,v66" },
1957
1.75k
    { Hexagon::BI__builtin_HEXAGON_S6_rol_i_r_acc, "v60,v62,v65,v66" },
1958
1.75k
    { Hexagon::BI__builtin_HEXAGON_S6_rol_i_r_and, "v60,v62,v65,v66" },
1959
1.75k
    { Hexagon::BI__builtin_HEXAGON_S6_rol_i_r_nac, "v60,v62,v65,v66" },
1960
1.75k
    { Hexagon::BI__builtin_HEXAGON_S6_rol_i_r_or, "v60,v62,v65,v66" },
1961
1.75k
    { Hexagon::BI__builtin_HEXAGON_S6_rol_i_r, "v60,v62,v65,v66" },
1962
1.75k
    { Hexagon::BI__builtin_HEXAGON_S6_rol_i_r_xacc, "v60,v62,v65,v66" },
1963
1.75k
    { Hexagon::BI__builtin_HEXAGON_S6_vsplatrbp, "v62,v65,v66" },
1964
1.75k
    { Hexagon::BI__builtin_HEXAGON_S6_vtrunehb_ppp, "v62,v65,v66" },
1965
1.75k
    { Hexagon::BI__builtin_HEXAGON_S6_vtrunohb_ppp, "v62,v65,v66" },
1966
1.75k
  };
1967
1.75k
1968
1.75k
  static BuiltinAndString ValidHVX[] = {
1969
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_hi, "v60,v62,v65,v66" },
1970
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_hi_128B, "v60,v62,v65,v66" },
1971
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_lo, "v60,v62,v65,v66" },
1972
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_lo_128B, "v60,v62,v65,v66" },
1973
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_extractw, "v60,v62,v65,v66" },
1974
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_extractw_128B, "v60,v62,v65,v66" },
1975
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_lvsplatb, "v62,v65,v66" },
1976
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_lvsplatb_128B, "v62,v65,v66" },
1977
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_lvsplath, "v62,v65,v66" },
1978
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_lvsplath_128B, "v62,v65,v66" },
1979
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_lvsplatw, "v60,v62,v65,v66" },
1980
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_lvsplatw_128B, "v60,v62,v65,v66" },
1981
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_pred_and, "v60,v62,v65,v66" },
1982
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_pred_and_128B, "v60,v62,v65,v66" },
1983
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_pred_and_n, "v60,v62,v65,v66" },
1984
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_pred_and_n_128B, "v60,v62,v65,v66" },
1985
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_pred_not, "v60,v62,v65,v66" },
1986
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_pred_not_128B, "v60,v62,v65,v66" },
1987
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_pred_or, "v60,v62,v65,v66" },
1988
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_pred_or_128B, "v60,v62,v65,v66" },
1989
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_pred_or_n, "v60,v62,v65,v66" },
1990
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_pred_or_n_128B, "v60,v62,v65,v66" },
1991
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_pred_scalar2, "v60,v62,v65,v66" },
1992
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_pred_scalar2_128B, "v60,v62,v65,v66" },
1993
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_pred_scalar2v2, "v62,v65,v66" },
1994
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_pred_scalar2v2_128B, "v62,v65,v66" },
1995
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_pred_xor, "v60,v62,v65,v66" },
1996
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_pred_xor_128B, "v60,v62,v65,v66" },
1997
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_shuffeqh, "v62,v65,v66" },
1998
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_shuffeqh_128B, "v62,v65,v66" },
1999
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_shuffeqw, "v62,v65,v66" },
2000
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_shuffeqw_128B, "v62,v65,v66" },
2001
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vabsb, "v65,v66" },
2002
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vabsb_128B, "v65,v66" },
2003
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vabsb_sat, "v65,v66" },
2004
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vabsb_sat_128B, "v65,v66" },
2005
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vabsdiffh, "v60,v62,v65,v66" },
2006
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vabsdiffh_128B, "v60,v62,v65,v66" },
2007
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vabsdiffub, "v60,v62,v65,v66" },
2008
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vabsdiffub_128B, "v60,v62,v65,v66" },
2009
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vabsdiffuh, "v60,v62,v65,v66" },
2010
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vabsdiffuh_128B, "v60,v62,v65,v66" },
2011
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vabsdiffw, "v60,v62,v65,v66" },
2012
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vabsdiffw_128B, "v60,v62,v65,v66" },
2013
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vabsh, "v60,v62,v65,v66" },
2014
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vabsh_128B, "v60,v62,v65,v66" },
2015
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vabsh_sat, "v60,v62,v65,v66" },
2016
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vabsh_sat_128B, "v60,v62,v65,v66" },
2017
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vabsw, "v60,v62,v65,v66" },
2018
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vabsw_128B, "v60,v62,v65,v66" },
2019
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vabsw_sat, "v60,v62,v65,v66" },
2020
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vabsw_sat_128B, "v60,v62,v65,v66" },
2021
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vaddb, "v60,v62,v65,v66" },
2022
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vaddb_128B, "v60,v62,v65,v66" },
2023
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vaddb_dv, "v60,v62,v65,v66" },
2024
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vaddb_dv_128B, "v60,v62,v65,v66" },
2025
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vaddbsat, "v62,v65,v66" },
2026
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vaddbsat_128B, "v62,v65,v66" },
2027
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vaddbsat_dv, "v62,v65,v66" },
2028
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vaddbsat_dv_128B, "v62,v65,v66" },
2029
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vaddcarry, "v62,v65,v66" },
2030
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vaddcarry_128B, "v62,v65,v66" },
2031
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vaddcarrysat, "v66" },
2032
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vaddcarrysat_128B, "v66" },
2033
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vaddclbh, "v62,v65,v66" },
2034
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vaddclbh_128B, "v62,v65,v66" },
2035
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vaddclbw, "v62,v65,v66" },
2036
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vaddclbw_128B, "v62,v65,v66" },
2037
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vaddh, "v60,v62,v65,v66" },
2038
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vaddh_128B, "v60,v62,v65,v66" },
2039
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vaddh_dv, "v60,v62,v65,v66" },
2040
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vaddh_dv_128B, "v60,v62,v65,v66" },
2041
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vaddhsat, "v60,v62,v65,v66" },
2042
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vaddhsat_128B, "v60,v62,v65,v66" },
2043
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vaddhsat_dv, "v60,v62,v65,v66" },
2044
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vaddhsat_dv_128B, "v60,v62,v65,v66" },
2045
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vaddhw, "v60,v62,v65,v66" },
2046
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vaddhw_128B, "v60,v62,v65,v66" },
2047
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vaddhw_acc, "v62,v65,v66" },
2048
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vaddhw_acc_128B, "v62,v65,v66" },
2049
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vaddubh, "v60,v62,v65,v66" },
2050
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vaddubh_128B, "v60,v62,v65,v66" },
2051
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vaddubh_acc, "v62,v65,v66" },
2052
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vaddubh_acc_128B, "v62,v65,v66" },
2053
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vaddubsat, "v60,v62,v65,v66" },
2054
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vaddubsat_128B, "v60,v62,v65,v66" },
2055
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vaddubsat_dv, "v60,v62,v65,v66" },
2056
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vaddubsat_dv_128B, "v60,v62,v65,v66" },
2057
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vaddububb_sat, "v62,v65,v66" },
2058
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vaddububb_sat_128B, "v62,v65,v66" },
2059
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vadduhsat, "v60,v62,v65,v66" },
2060
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vadduhsat_128B, "v60,v62,v65,v66" },
2061
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vadduhsat_dv, "v60,v62,v65,v66" },
2062
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vadduhsat_dv_128B, "v60,v62,v65,v66" },
2063
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vadduhw, "v60,v62,v65,v66" },
2064
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vadduhw_128B, "v60,v62,v65,v66" },
2065
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vadduhw_acc, "v62,v65,v66" },
2066
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vadduhw_acc_128B, "v62,v65,v66" },
2067
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vadduwsat, "v62,v65,v66" },
2068
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vadduwsat_128B, "v62,v65,v66" },
2069
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vadduwsat_dv, "v62,v65,v66" },
2070
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vadduwsat_dv_128B, "v62,v65,v66" },
2071
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vaddw, "v60,v62,v65,v66" },
2072
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vaddw_128B, "v60,v62,v65,v66" },
2073
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vaddw_dv, "v60,v62,v65,v66" },
2074
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vaddw_dv_128B, "v60,v62,v65,v66" },
2075
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vaddwsat, "v60,v62,v65,v66" },
2076
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vaddwsat_128B, "v60,v62,v65,v66" },
2077
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vaddwsat_dv, "v60,v62,v65,v66" },
2078
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vaddwsat_dv_128B, "v60,v62,v65,v66" },
2079
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_valignb, "v60,v62,v65,v66" },
2080
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_valignb_128B, "v60,v62,v65,v66" },
2081
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_valignbi, "v60,v62,v65,v66" },
2082
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_valignbi_128B, "v60,v62,v65,v66" },
2083
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vand, "v60,v62,v65,v66" },
2084
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vand_128B, "v60,v62,v65,v66" },
2085
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vandnqrt, "v62,v65,v66" },
2086
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vandnqrt_128B, "v62,v65,v66" },
2087
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vandnqrt_acc, "v62,v65,v66" },
2088
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vandnqrt_acc_128B, "v62,v65,v66" },
2089
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vandqrt, "v60,v62,v65,v66" },
2090
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vandqrt_128B, "v60,v62,v65,v66" },
2091
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vandqrt_acc, "v60,v62,v65,v66" },
2092
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vandqrt_acc_128B, "v60,v62,v65,v66" },
2093
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vandvnqv, "v62,v65,v66" },
2094
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vandvnqv_128B, "v62,v65,v66" },
2095
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vandvqv, "v62,v65,v66" },
2096
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vandvqv_128B, "v62,v65,v66" },
2097
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vandvrt, "v60,v62,v65,v66" },
2098
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vandvrt_128B, "v60,v62,v65,v66" },
2099
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vandvrt_acc, "v60,v62,v65,v66" },
2100
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vandvrt_acc_128B, "v60,v62,v65,v66" },
2101
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vaslh, "v60,v62,v65,v66" },
2102
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vaslh_128B, "v60,v62,v65,v66" },
2103
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vaslh_acc, "v65,v66" },
2104
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vaslh_acc_128B, "v65,v66" },
2105
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vaslhv, "v60,v62,v65,v66" },
2106
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vaslhv_128B, "v60,v62,v65,v66" },
2107
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vaslw, "v60,v62,v65,v66" },
2108
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vaslw_128B, "v60,v62,v65,v66" },
2109
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vaslw_acc, "v60,v62,v65,v66" },
2110
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vaslw_acc_128B, "v60,v62,v65,v66" },
2111
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vaslwv, "v60,v62,v65,v66" },
2112
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vaslwv_128B, "v60,v62,v65,v66" },
2113
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vasrh, "v60,v62,v65,v66" },
2114
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vasrh_128B, "v60,v62,v65,v66" },
2115
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vasrh_acc, "v65,v66" },
2116
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vasrh_acc_128B, "v65,v66" },
2117
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vasrhbrndsat, "v60,v62,v65,v66" },
2118
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vasrhbrndsat_128B, "v60,v62,v65,v66" },
2119
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vasrhbsat, "v62,v65,v66" },
2120
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vasrhbsat_128B, "v62,v65,v66" },
2121
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vasrhubrndsat, "v60,v62,v65,v66" },
2122
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vasrhubrndsat_128B, "v60,v62,v65,v66" },
2123
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vasrhubsat, "v60,v62,v65,v66" },
2124
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vasrhubsat_128B, "v60,v62,v65,v66" },
2125
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vasrhv, "v60,v62,v65,v66" },
2126
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vasrhv_128B, "v60,v62,v65,v66" },
2127
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vasr_into, "v66" },
2128
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vasr_into_128B, "v66" },
2129
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vasruhubrndsat, "v65,v66" },
2130
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vasruhubrndsat_128B, "v65,v66" },
2131
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vasruhubsat, "v65,v66" },
2132
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vasruhubsat_128B, "v65,v66" },
2133
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vasruwuhrndsat, "v62,v65,v66" },
2134
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vasruwuhrndsat_128B, "v62,v65,v66" },
2135
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vasruwuhsat, "v65,v66" },
2136
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vasruwuhsat_128B, "v65,v66" },
2137
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vasrw, "v60,v62,v65,v66" },
2138
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vasrw_128B, "v60,v62,v65,v66" },
2139
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vasrw_acc, "v60,v62,v65,v66" },
2140
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vasrw_acc_128B, "v60,v62,v65,v66" },
2141
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vasrwh, "v60,v62,v65,v66" },
2142
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vasrwh_128B, "v60,v62,v65,v66" },
2143
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vasrwhrndsat, "v60,v62,v65,v66" },
2144
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vasrwhrndsat_128B, "v60,v62,v65,v66" },
2145
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vasrwhsat, "v60,v62,v65,v66" },
2146
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vasrwhsat_128B, "v60,v62,v65,v66" },
2147
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vasrwuhrndsat, "v62,v65,v66" },
2148
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vasrwuhrndsat_128B, "v62,v65,v66" },
2149
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vasrwuhsat, "v60,v62,v65,v66" },
2150
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vasrwuhsat_128B, "v60,v62,v65,v66" },
2151
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vasrwv, "v60,v62,v65,v66" },
2152
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vasrwv_128B, "v60,v62,v65,v66" },
2153
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vassign, "v60,v62,v65,v66" },
2154
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vassign_128B, "v60,v62,v65,v66" },
2155
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vassignp, "v60,v62,v65,v66" },
2156
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vassignp_128B, "v60,v62,v65,v66" },
2157
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vavgb, "v65,v66" },
2158
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vavgb_128B, "v65,v66" },
2159
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vavgbrnd, "v65,v66" },
2160
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vavgbrnd_128B, "v65,v66" },
2161
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vavgh, "v60,v62,v65,v66" },
2162
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vavgh_128B, "v60,v62,v65,v66" },
2163
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vavghrnd, "v60,v62,v65,v66" },
2164
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vavghrnd_128B, "v60,v62,v65,v66" },
2165
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vavgub, "v60,v62,v65,v66" },
2166
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vavgub_128B, "v60,v62,v65,v66" },
2167
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vavgubrnd, "v60,v62,v65,v66" },
2168
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vavgubrnd_128B, "v60,v62,v65,v66" },
2169
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vavguh, "v60,v62,v65,v66" },
2170
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vavguh_128B, "v60,v62,v65,v66" },
2171
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vavguhrnd, "v60,v62,v65,v66" },
2172
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vavguhrnd_128B, "v60,v62,v65,v66" },
2173
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vavguw, "v65,v66" },
2174
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vavguw_128B, "v65,v66" },
2175
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vavguwrnd, "v65,v66" },
2176
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vavguwrnd_128B, "v65,v66" },
2177
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vavgw, "v60,v62,v65,v66" },
2178
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vavgw_128B, "v60,v62,v65,v66" },
2179
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vavgwrnd, "v60,v62,v65,v66" },
2180
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vavgwrnd_128B, "v60,v62,v65,v66" },
2181
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vcl0h, "v60,v62,v65,v66" },
2182
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vcl0h_128B, "v60,v62,v65,v66" },
2183
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vcl0w, "v60,v62,v65,v66" },
2184
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vcl0w_128B, "v60,v62,v65,v66" },
2185
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vcombine, "v60,v62,v65,v66" },
2186
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vcombine_128B, "v60,v62,v65,v66" },
2187
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vd0, "v60,v62,v65,v66" },
2188
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vd0_128B, "v60,v62,v65,v66" },
2189
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vdd0, "v65,v66" },
2190
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vdd0_128B, "v65,v66" },
2191
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vdealb, "v60,v62,v65,v66" },
2192
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vdealb_128B, "v60,v62,v65,v66" },
2193
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vdealb4w, "v60,v62,v65,v66" },
2194
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vdealb4w_128B, "v60,v62,v65,v66" },
2195
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vdealh, "v60,v62,v65,v66" },
2196
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vdealh_128B, "v60,v62,v65,v66" },
2197
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vdealvdd, "v60,v62,v65,v66" },
2198
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vdealvdd_128B, "v60,v62,v65,v66" },
2199
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vdelta, "v60,v62,v65,v66" },
2200
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vdelta_128B, "v60,v62,v65,v66" },
2201
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vdmpybus, "v60,v62,v65,v66" },
2202
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vdmpybus_128B, "v60,v62,v65,v66" },
2203
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vdmpybus_acc, "v60,v62,v65,v66" },
2204
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vdmpybus_acc_128B, "v60,v62,v65,v66" },
2205
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vdmpybus_dv, "v60,v62,v65,v66" },
2206
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vdmpybus_dv_128B, "v60,v62,v65,v66" },
2207
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vdmpybus_dv_acc, "v60,v62,v65,v66" },
2208
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vdmpybus_dv_acc_128B, "v60,v62,v65,v66" },
2209
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vdmpyhb, "v60,v62,v65,v66" },
2210
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vdmpyhb_128B, "v60,v62,v65,v66" },
2211
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vdmpyhb_acc, "v60,v62,v65,v66" },
2212
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vdmpyhb_acc_128B, "v60,v62,v65,v66" },
2213
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vdmpyhb_dv, "v60,v62,v65,v66" },
2214
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vdmpyhb_dv_128B, "v60,v62,v65,v66" },
2215
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vdmpyhb_dv_acc, "v60,v62,v65,v66" },
2216
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vdmpyhb_dv_acc_128B, "v60,v62,v65,v66" },
2217
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vdmpyhisat, "v60,v62,v65,v66" },
2218
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vdmpyhisat_128B, "v60,v62,v65,v66" },
2219
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vdmpyhisat_acc, "v60,v62,v65,v66" },
2220
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vdmpyhisat_acc_128B, "v60,v62,v65,v66" },
2221
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vdmpyhsat, "v60,v62,v65,v66" },
2222
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vdmpyhsat_128B, "v60,v62,v65,v66" },
2223
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vdmpyhsat_acc, "v60,v62,v65,v66" },
2224
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vdmpyhsat_acc_128B, "v60,v62,v65,v66" },
2225
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vdmpyhsuisat, "v60,v62,v65,v66" },
2226
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vdmpyhsuisat_128B, "v60,v62,v65,v66" },
2227
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vdmpyhsuisat_acc, "v60,v62,v65,v66" },
2228
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vdmpyhsuisat_acc_128B, "v60,v62,v65,v66" },
2229
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vdmpyhsusat, "v60,v62,v65,v66" },
2230
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vdmpyhsusat_128B, "v60,v62,v65,v66" },
2231
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vdmpyhsusat_acc, "v60,v62,v65,v66" },
2232
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vdmpyhsusat_acc_128B, "v60,v62,v65,v66" },
2233
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vdmpyhvsat, "v60,v62,v65,v66" },
2234
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vdmpyhvsat_128B, "v60,v62,v65,v66" },
2235
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vdmpyhvsat_acc, "v60,v62,v65,v66" },
2236
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vdmpyhvsat_acc_128B, "v60,v62,v65,v66" },
2237
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vdsaduh, "v60,v62,v65,v66" },
2238
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vdsaduh_128B, "v60,v62,v65,v66" },
2239
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vdsaduh_acc, "v60,v62,v65,v66" },
2240
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vdsaduh_acc_128B, "v60,v62,v65,v66" },
2241
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_veqb, "v60,v62,v65,v66" },
2242
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_veqb_128B, "v60,v62,v65,v66" },
2243
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_veqb_and, "v60,v62,v65,v66" },
2244
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_veqb_and_128B, "v60,v62,v65,v66" },
2245
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_veqb_or, "v60,v62,v65,v66" },
2246
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_veqb_or_128B, "v60,v62,v65,v66" },
2247
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_veqb_xor, "v60,v62,v65,v66" },
2248
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_veqb_xor_128B, "v60,v62,v65,v66" },
2249
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_veqh, "v60,v62,v65,v66" },
2250
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_veqh_128B, "v60,v62,v65,v66" },
2251
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_veqh_and, "v60,v62,v65,v66" },
2252
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_veqh_and_128B, "v60,v62,v65,v66" },
2253
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_veqh_or, "v60,v62,v65,v66" },
2254
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_veqh_or_128B, "v60,v62,v65,v66" },
2255
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_veqh_xor, "v60,v62,v65,v66" },
2256
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_veqh_xor_128B, "v60,v62,v65,v66" },
2257
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_veqw, "v60,v62,v65,v66" },
2258
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_veqw_128B, "v60,v62,v65,v66" },
2259
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_veqw_and, "v60,v62,v65,v66" },
2260
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_veqw_and_128B, "v60,v62,v65,v66" },
2261
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_veqw_or, "v60,v62,v65,v66" },
2262
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_veqw_or_128B, "v60,v62,v65,v66" },
2263
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_veqw_xor, "v60,v62,v65,v66" },
2264
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_veqw_xor_128B, "v60,v62,v65,v66" },
2265
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vgtb, "v60,v62,v65,v66" },
2266
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vgtb_128B, "v60,v62,v65,v66" },
2267
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vgtb_and, "v60,v62,v65,v66" },
2268
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vgtb_and_128B, "v60,v62,v65,v66" },
2269
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vgtb_or, "v60,v62,v65,v66" },
2270
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vgtb_or_128B, "v60,v62,v65,v66" },
2271
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vgtb_xor, "v60,v62,v65,v66" },
2272
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vgtb_xor_128B, "v60,v62,v65,v66" },
2273
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vgth, "v60,v62,v65,v66" },
2274
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vgth_128B, "v60,v62,v65,v66" },
2275
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vgth_and, "v60,v62,v65,v66" },
2276
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vgth_and_128B, "v60,v62,v65,v66" },
2277
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vgth_or, "v60,v62,v65,v66" },
2278
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vgth_or_128B, "v60,v62,v65,v66" },
2279
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vgth_xor, "v60,v62,v65,v66" },
2280
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vgth_xor_128B, "v60,v62,v65,v66" },
2281
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vgtub, "v60,v62,v65,v66" },
2282
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vgtub_128B, "v60,v62,v65,v66" },
2283
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vgtub_and, "v60,v62,v65,v66" },
2284
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vgtub_and_128B, "v60,v62,v65,v66" },
2285
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vgtub_or, "v60,v62,v65,v66" },
2286
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vgtub_or_128B, "v60,v62,v65,v66" },
2287
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vgtub_xor, "v60,v62,v65,v66" },
2288
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vgtub_xor_128B, "v60,v62,v65,v66" },
2289
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vgtuh, "v60,v62,v65,v66" },
2290
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vgtuh_128B, "v60,v62,v65,v66" },
2291
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vgtuh_and, "v60,v62,v65,v66" },
2292
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vgtuh_and_128B, "v60,v62,v65,v66" },
2293
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vgtuh_or, "v60,v62,v65,v66" },
2294
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vgtuh_or_128B, "v60,v62,v65,v66" },
2295
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vgtuh_xor, "v60,v62,v65,v66" },
2296
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vgtuh_xor_128B, "v60,v62,v65,v66" },
2297
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vgtuw, "v60,v62,v65,v66" },
2298
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vgtuw_128B, "v60,v62,v65,v66" },
2299
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vgtuw_and, "v60,v62,v65,v66" },
2300
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vgtuw_and_128B, "v60,v62,v65,v66" },
2301
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vgtuw_or, "v60,v62,v65,v66" },
2302
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vgtuw_or_128B, "v60,v62,v65,v66" },
2303
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vgtuw_xor, "v60,v62,v65,v66" },
2304
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vgtuw_xor_128B, "v60,v62,v65,v66" },
2305
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vgtw, "v60,v62,v65,v66" },
2306
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vgtw_128B, "v60,v62,v65,v66" },
2307
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vgtw_and, "v60,v62,v65,v66" },
2308
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vgtw_and_128B, "v60,v62,v65,v66" },
2309
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vgtw_or, "v60,v62,v65,v66" },
2310
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vgtw_or_128B, "v60,v62,v65,v66" },
2311
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vgtw_xor, "v60,v62,v65,v66" },
2312
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vgtw_xor_128B, "v60,v62,v65,v66" },
2313
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vinsertwr, "v60,v62,v65,v66" },
2314
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vinsertwr_128B, "v60,v62,v65,v66" },
2315
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vlalignb, "v60,v62,v65,v66" },
2316
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vlalignb_128B, "v60,v62,v65,v66" },
2317
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vlalignbi, "v60,v62,v65,v66" },
2318
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vlalignbi_128B, "v60,v62,v65,v66" },
2319
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vlsrb, "v62,v65,v66" },
2320
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vlsrb_128B, "v62,v65,v66" },
2321
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vlsrh, "v60,v62,v65,v66" },
2322
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vlsrh_128B, "v60,v62,v65,v66" },
2323
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vlsrhv, "v60,v62,v65,v66" },
2324
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vlsrhv_128B, "v60,v62,v65,v66" },
2325
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vlsrw, "v60,v62,v65,v66" },
2326
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vlsrw_128B, "v60,v62,v65,v66" },
2327
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vlsrwv, "v60,v62,v65,v66" },
2328
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vlsrwv_128B, "v60,v62,v65,v66" },
2329
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vlut4, "v65,v66" },
2330
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vlut4_128B, "v65,v66" },
2331
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vlutvvb, "v60,v62,v65,v66" },
2332
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vlutvvb_128B, "v60,v62,v65,v66" },
2333
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vlutvvbi, "v62,v65,v66" },
2334
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vlutvvbi_128B, "v62,v65,v66" },
2335
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vlutvvb_nm, "v62,v65,v66" },
2336
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vlutvvb_nm_128B, "v62,v65,v66" },
2337
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vlutvvb_oracc, "v60,v62,v65,v66" },
2338
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vlutvvb_oracc_128B, "v60,v62,v65,v66" },
2339
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vlutvvb_oracci, "v62,v65,v66" },
2340
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vlutvvb_oracci_128B, "v62,v65,v66" },
2341
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vlutvwh, "v60,v62,v65,v66" },
2342
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vlutvwh_128B, "v60,v62,v65,v66" },
2343
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vlutvwhi, "v62,v65,v66" },
2344
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vlutvwhi_128B, "v62,v65,v66" },
2345
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vlutvwh_nm, "v62,v65,v66" },
2346
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vlutvwh_nm_128B, "v62,v65,v66" },
2347
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vlutvwh_oracc, "v60,v62,v65,v66" },
2348
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vlutvwh_oracc_128B, "v60,v62,v65,v66" },
2349
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vlutvwh_oracci, "v62,v65,v66" },
2350
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vlutvwh_oracci_128B, "v62,v65,v66" },
2351
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmaxb, "v62,v65,v66" },
2352
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmaxb_128B, "v62,v65,v66" },
2353
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmaxh, "v60,v62,v65,v66" },
2354
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmaxh_128B, "v60,v62,v65,v66" },
2355
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmaxub, "v60,v62,v65,v66" },
2356
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmaxub_128B, "v60,v62,v65,v66" },
2357
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmaxuh, "v60,v62,v65,v66" },
2358
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmaxuh_128B, "v60,v62,v65,v66" },
2359
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmaxw, "v60,v62,v65,v66" },
2360
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmaxw_128B, "v60,v62,v65,v66" },
2361
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vminb, "v62,v65,v66" },
2362
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vminb_128B, "v62,v65,v66" },
2363
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vminh, "v60,v62,v65,v66" },
2364
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vminh_128B, "v60,v62,v65,v66" },
2365
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vminub, "v60,v62,v65,v66" },
2366
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vminub_128B, "v60,v62,v65,v66" },
2367
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vminuh, "v60,v62,v65,v66" },
2368
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vminuh_128B, "v60,v62,v65,v66" },
2369
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vminw, "v60,v62,v65,v66" },
2370
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vminw_128B, "v60,v62,v65,v66" },
2371
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpabus, "v60,v62,v65,v66" },
2372
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpabus_128B, "v60,v62,v65,v66" },
2373
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpabus_acc, "v60,v62,v65,v66" },
2374
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpabus_acc_128B, "v60,v62,v65,v66" },
2375
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpabusv, "v60,v62,v65,v66" },
2376
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpabusv_128B, "v60,v62,v65,v66" },
2377
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpabuu, "v65,v66" },
2378
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpabuu_128B, "v65,v66" },
2379
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpabuu_acc, "v65,v66" },
2380
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpabuu_acc_128B, "v65,v66" },
2381
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpabuuv, "v60,v62,v65,v66" },
2382
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpabuuv_128B, "v60,v62,v65,v66" },
2383
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpahb, "v60,v62,v65,v66" },
2384
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpahb_128B, "v60,v62,v65,v66" },
2385
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpahb_acc, "v60,v62,v65,v66" },
2386
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpahb_acc_128B, "v60,v62,v65,v66" },
2387
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpahhsat, "v65,v66" },
2388
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpahhsat_128B, "v65,v66" },
2389
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpauhb, "v62,v65,v66" },
2390
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpauhb_128B, "v62,v65,v66" },
2391
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpauhb_acc, "v62,v65,v66" },
2392
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpauhb_acc_128B, "v62,v65,v66" },
2393
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpauhuhsat, "v65,v66" },
2394
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpauhuhsat_128B, "v65,v66" },
2395
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpsuhuhsat, "v65,v66" },
2396
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpsuhuhsat_128B, "v65,v66" },
2397
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpybus, "v60,v62,v65,v66" },
2398
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpybus_128B, "v60,v62,v65,v66" },
2399
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpybus_acc, "v60,v62,v65,v66" },
2400
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpybus_acc_128B, "v60,v62,v65,v66" },
2401
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpybusv, "v60,v62,v65,v66" },
2402
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpybusv_128B, "v60,v62,v65,v66" },
2403
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpybusv_acc, "v60,v62,v65,v66" },
2404
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpybusv_acc_128B, "v60,v62,v65,v66" },
2405
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpybv, "v60,v62,v65,v66" },
2406
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpybv_128B, "v60,v62,v65,v66" },
2407
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpybv_acc, "v60,v62,v65,v66" },
2408
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpybv_acc_128B, "v60,v62,v65,v66" },
2409
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyewuh, "v60,v62,v65,v66" },
2410
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyewuh_128B, "v60,v62,v65,v66" },
2411
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyewuh_64, "v62,v65,v66" },
2412
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyewuh_64_128B, "v62,v65,v66" },
2413
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyh, "v60,v62,v65,v66" },
2414
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyh_128B, "v60,v62,v65,v66" },
2415
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyh_acc, "v65,v66" },
2416
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyh_acc_128B, "v65,v66" },
2417
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyhsat_acc, "v60,v62,v65,v66" },
2418
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyhsat_acc_128B, "v60,v62,v65,v66" },
2419
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyhsrs, "v60,v62,v65,v66" },
2420
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyhsrs_128B, "v60,v62,v65,v66" },
2421
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyhss, "v60,v62,v65,v66" },
2422
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyhss_128B, "v60,v62,v65,v66" },
2423
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyhus, "v60,v62,v65,v66" },
2424
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyhus_128B, "v60,v62,v65,v66" },
2425
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyhus_acc, "v60,v62,v65,v66" },
2426
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyhus_acc_128B, "v60,v62,v65,v66" },
2427
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyhv, "v60,v62,v65,v66" },
2428
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyhv_128B, "v60,v62,v65,v66" },
2429
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyhv_acc, "v60,v62,v65,v66" },
2430
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyhv_acc_128B, "v60,v62,v65,v66" },
2431
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyhvsrs, "v60,v62,v65,v66" },
2432
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyhvsrs_128B, "v60,v62,v65,v66" },
2433
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyieoh, "v60,v62,v65,v66" },
2434
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyieoh_128B, "v60,v62,v65,v66" },
2435
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyiewh_acc, "v60,v62,v65,v66" },
2436
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyiewh_acc_128B, "v60,v62,v65,v66" },
2437
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyiewuh, "v60,v62,v65,v66" },
2438
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyiewuh_128B, "v60,v62,v65,v66" },
2439
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyiewuh_acc, "v60,v62,v65,v66" },
2440
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyiewuh_acc_128B, "v60,v62,v65,v66" },
2441
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyih, "v60,v62,v65,v66" },
2442
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyih_128B, "v60,v62,v65,v66" },
2443
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyih_acc, "v60,v62,v65,v66" },
2444
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyih_acc_128B, "v60,v62,v65,v66" },
2445
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyihb, "v60,v62,v65,v66" },
2446
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyihb_128B, "v60,v62,v65,v66" },
2447
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyihb_acc, "v60,v62,v65,v66" },
2448
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyihb_acc_128B, "v60,v62,v65,v66" },
2449
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyiowh, "v60,v62,v65,v66" },
2450
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyiowh_128B, "v60,v62,v65,v66" },
2451
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyiwb, "v60,v62,v65,v66" },
2452
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyiwb_128B, "v60,v62,v65,v66" },
2453
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyiwb_acc, "v60,v62,v65,v66" },
2454
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyiwb_acc_128B, "v60,v62,v65,v66" },
2455
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyiwh, "v60,v62,v65,v66" },
2456
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyiwh_128B, "v60,v62,v65,v66" },
2457
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyiwh_acc, "v60,v62,v65,v66" },
2458
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyiwh_acc_128B, "v60,v62,v65,v66" },
2459
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyiwub, "v62,v65,v66" },
2460
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyiwub_128B, "v62,v65,v66" },
2461
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyiwub_acc, "v62,v65,v66" },
2462
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyiwub_acc_128B, "v62,v65,v66" },
2463
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyowh, "v60,v62,v65,v66" },
2464
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyowh_128B, "v60,v62,v65,v66" },
2465
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyowh_64_acc, "v62,v65,v66" },
2466
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyowh_64_acc_128B, "v62,v65,v66" },
2467
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyowh_rnd, "v60,v62,v65,v66" },
2468
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyowh_rnd_128B, "v60,v62,v65,v66" },
2469
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyowh_rnd_sacc, "v60,v62,v65,v66" },
2470
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyowh_rnd_sacc_128B, "v60,v62,v65,v66" },
2471
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyowh_sacc, "v60,v62,v65,v66" },
2472
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyowh_sacc_128B, "v60,v62,v65,v66" },
2473
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyub, "v60,v62,v65,v66" },
2474
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyub_128B, "v60,v62,v65,v66" },
2475
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyub_acc, "v60,v62,v65,v66" },
2476
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyub_acc_128B, "v60,v62,v65,v66" },
2477
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyubv, "v60,v62,v65,v66" },
2478
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyubv_128B, "v60,v62,v65,v66" },
2479
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyubv_acc, "v60,v62,v65,v66" },
2480
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyubv_acc_128B, "v60,v62,v65,v66" },
2481
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyuh, "v60,v62,v65,v66" },
2482
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyuh_128B, "v60,v62,v65,v66" },
2483
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyuh_acc, "v60,v62,v65,v66" },
2484
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyuh_acc_128B, "v60,v62,v65,v66" },
2485
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyuhe, "v65,v66" },
2486
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyuhe_128B, "v65,v66" },
2487
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyuhe_acc, "v65,v66" },
2488
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyuhe_acc_128B, "v65,v66" },
2489
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyuhv, "v60,v62,v65,v66" },
2490
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyuhv_128B, "v60,v62,v65,v66" },
2491
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyuhv_acc, "v60,v62,v65,v66" },
2492
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmpyuhv_acc_128B, "v60,v62,v65,v66" },
2493
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmux, "v60,v62,v65,v66" },
2494
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vmux_128B, "v60,v62,v65,v66" },
2495
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vnavgb, "v65,v66" },
2496
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vnavgb_128B, "v65,v66" },
2497
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vnavgh, "v60,v62,v65,v66" },
2498
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vnavgh_128B, "v60,v62,v65,v66" },
2499
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vnavgub, "v60,v62,v65,v66" },
2500
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vnavgub_128B, "v60,v62,v65,v66" },
2501
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vnavgw, "v60,v62,v65,v66" },
2502
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vnavgw_128B, "v60,v62,v65,v66" },
2503
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vnormamth, "v60,v62,v65,v66" },
2504
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vnormamth_128B, "v60,v62,v65,v66" },
2505
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vnormamtw, "v60,v62,v65,v66" },
2506
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vnormamtw_128B, "v60,v62,v65,v66" },
2507
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vnot, "v60,v62,v65,v66" },
2508
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vnot_128B, "v60,v62,v65,v66" },
2509
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vor, "v60,v62,v65,v66" },
2510
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vor_128B, "v60,v62,v65,v66" },
2511
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vpackeb, "v60,v62,v65,v66" },
2512
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vpackeb_128B, "v60,v62,v65,v66" },
2513
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vpackeh, "v60,v62,v65,v66" },
2514
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vpackeh_128B, "v60,v62,v65,v66" },
2515
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vpackhb_sat, "v60,v62,v65,v66" },
2516
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vpackhb_sat_128B, "v60,v62,v65,v66" },
2517
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vpackhub_sat, "v60,v62,v65,v66" },
2518
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vpackhub_sat_128B, "v60,v62,v65,v66" },
2519
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vpackob, "v60,v62,v65,v66" },
2520
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vpackob_128B, "v60,v62,v65,v66" },
2521
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vpackoh, "v60,v62,v65,v66" },
2522
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vpackoh_128B, "v60,v62,v65,v66" },
2523
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vpackwh_sat, "v60,v62,v65,v66" },
2524
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vpackwh_sat_128B, "v60,v62,v65,v66" },
2525
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vpackwuh_sat, "v60,v62,v65,v66" },
2526
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vpackwuh_sat_128B, "v60,v62,v65,v66" },
2527
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vpopcounth, "v60,v62,v65,v66" },
2528
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vpopcounth_128B, "v60,v62,v65,v66" },
2529
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vprefixqb, "v65,v66" },
2530
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vprefixqb_128B, "v65,v66" },
2531
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vprefixqh, "v65,v66" },
2532
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vprefixqh_128B, "v65,v66" },
2533
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vprefixqw, "v65,v66" },
2534
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vprefixqw_128B, "v65,v66" },
2535
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vrdelta, "v60,v62,v65,v66" },
2536
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vrdelta_128B, "v60,v62,v65,v66" },
2537
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vrmpybub_rtt, "v65" },
2538
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vrmpybub_rtt_128B, "v65" },
2539
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vrmpybub_rtt_acc, "v65" },
2540
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vrmpybub_rtt_acc_128B, "v65" },
2541
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vrmpybus, "v60,v62,v65,v66" },
2542
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vrmpybus_128B, "v60,v62,v65,v66" },
2543
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vrmpybus_acc, "v60,v62,v65,v66" },
2544
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vrmpybus_acc_128B, "v60,v62,v65,v66" },
2545
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vrmpybusi, "v60,v62,v65,v66" },
2546
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vrmpybusi_128B, "v60,v62,v65,v66" },
2547
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vrmpybusi_acc, "v60,v62,v65,v66" },
2548
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vrmpybusi_acc_128B, "v60,v62,v65,v66" },
2549
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vrmpybusv, "v60,v62,v65,v66" },
2550
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vrmpybusv_128B, "v60,v62,v65,v66" },
2551
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vrmpybusv_acc, "v60,v62,v65,v66" },
2552
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vrmpybusv_acc_128B, "v60,v62,v65,v66" },
2553
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vrmpybv, "v60,v62,v65,v66" },
2554
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vrmpybv_128B, "v60,v62,v65,v66" },
2555
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vrmpybv_acc, "v60,v62,v65,v66" },
2556
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vrmpybv_acc_128B, "v60,v62,v65,v66" },
2557
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vrmpyub, "v60,v62,v65,v66" },
2558
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vrmpyub_128B, "v60,v62,v65,v66" },
2559
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vrmpyub_acc, "v60,v62,v65,v66" },
2560
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vrmpyub_acc_128B, "v60,v62,v65,v66" },
2561
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vrmpyubi, "v60,v62,v65,v66" },
2562
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vrmpyubi_128B, "v60,v62,v65,v66" },
2563
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vrmpyubi_acc, "v60,v62,v65,v66" },
2564
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vrmpyubi_acc_128B, "v60,v62,v65,v66" },
2565
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vrmpyub_rtt, "v65" },
2566
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vrmpyub_rtt_128B, "v65" },
2567
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vrmpyub_rtt_acc, "v65" },
2568
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vrmpyub_rtt_acc_128B, "v65" },
2569
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vrmpyubv, "v60,v62,v65,v66" },
2570
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vrmpyubv_128B, "v60,v62,v65,v66" },
2571
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vrmpyubv_acc, "v60,v62,v65,v66" },
2572
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vrmpyubv_acc_128B, "v60,v62,v65,v66" },
2573
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vror, "v60,v62,v65,v66" },
2574
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vror_128B, "v60,v62,v65,v66" },
2575
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vrotr, "v66" },
2576
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vrotr_128B, "v66" },
2577
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vroundhb, "v60,v62,v65,v66" },
2578
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vroundhb_128B, "v60,v62,v65,v66" },
2579
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vroundhub, "v60,v62,v65,v66" },
2580
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vroundhub_128B, "v60,v62,v65,v66" },
2581
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vrounduhub, "v62,v65,v66" },
2582
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vrounduhub_128B, "v62,v65,v66" },
2583
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vrounduwuh, "v62,v65,v66" },
2584
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vrounduwuh_128B, "v62,v65,v66" },
2585
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vroundwh, "v60,v62,v65,v66" },
2586
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vroundwh_128B, "v60,v62,v65,v66" },
2587
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vroundwuh, "v60,v62,v65,v66" },
2588
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vroundwuh_128B, "v60,v62,v65,v66" },
2589
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vrsadubi, "v60,v62,v65,v66" },
2590
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vrsadubi_128B, "v60,v62,v65,v66" },
2591
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vrsadubi_acc, "v60,v62,v65,v66" },
2592
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vrsadubi_acc_128B, "v60,v62,v65,v66" },
2593
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vsatdw, "v66" },
2594
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vsatdw_128B, "v66" },
2595
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vsathub, "v60,v62,v65,v66" },
2596
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vsathub_128B, "v60,v62,v65,v66" },
2597
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vsatuwuh, "v62,v65,v66" },
2598
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vsatuwuh_128B, "v62,v65,v66" },
2599
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vsatwh, "v60,v62,v65,v66" },
2600
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vsatwh_128B, "v60,v62,v65,v66" },
2601
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vsb, "v60,v62,v65,v66" },
2602
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vsb_128B, "v60,v62,v65,v66" },
2603
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vsh, "v60,v62,v65,v66" },
2604
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vsh_128B, "v60,v62,v65,v66" },
2605
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vshufeh, "v60,v62,v65,v66" },
2606
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vshufeh_128B, "v60,v62,v65,v66" },
2607
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vshuffb, "v60,v62,v65,v66" },
2608
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vshuffb_128B, "v60,v62,v65,v66" },
2609
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vshuffeb, "v60,v62,v65,v66" },
2610
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vshuffeb_128B, "v60,v62,v65,v66" },
2611
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vshuffh, "v60,v62,v65,v66" },
2612
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vshuffh_128B, "v60,v62,v65,v66" },
2613
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vshuffob, "v60,v62,v65,v66" },
2614
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vshuffob_128B, "v60,v62,v65,v66" },
2615
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vshuffvdd, "v60,v62,v65,v66" },
2616
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vshuffvdd_128B, "v60,v62,v65,v66" },
2617
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vshufoeb, "v60,v62,v65,v66" },
2618
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vshufoeb_128B, "v60,v62,v65,v66" },
2619
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vshufoeh, "v60,v62,v65,v66" },
2620
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vshufoeh_128B, "v60,v62,v65,v66" },
2621
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vshufoh, "v60,v62,v65,v66" },
2622
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vshufoh_128B, "v60,v62,v65,v66" },
2623
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vsubb, "v60,v62,v65,v66" },
2624
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vsubb_128B, "v60,v62,v65,v66" },
2625
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vsubb_dv, "v60,v62,v65,v66" },
2626
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vsubb_dv_128B, "v60,v62,v65,v66" },
2627
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vsubbsat, "v62,v65,v66" },
2628
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vsubbsat_128B, "v62,v65,v66" },
2629
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vsubbsat_dv, "v62,v65,v66" },
2630
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vsubbsat_dv_128B, "v62,v65,v66" },
2631
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vsubcarry, "v62,v65,v66" },
2632
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vsubcarry_128B, "v62,v65,v66" },
2633
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vsubh, "v60,v62,v65,v66" },
2634
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vsubh_128B, "v60,v62,v65,v66" },
2635
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vsubh_dv, "v60,v62,v65,v66" },
2636
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vsubh_dv_128B, "v60,v62,v65,v66" },
2637
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vsubhsat, "v60,v62,v65,v66" },
2638
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vsubhsat_128B, "v60,v62,v65,v66" },
2639
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vsubhsat_dv, "v60,v62,v65,v66" },
2640
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vsubhsat_dv_128B, "v60,v62,v65,v66" },
2641
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vsubhw, "v60,v62,v65,v66" },
2642
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vsubhw_128B, "v60,v62,v65,v66" },
2643
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vsububh, "v60,v62,v65,v66" },
2644
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vsububh_128B, "v60,v62,v65,v66" },
2645
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vsububsat, "v60,v62,v65,v66" },
2646
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vsububsat_128B, "v60,v62,v65,v66" },
2647
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vsububsat_dv, "v60,v62,v65,v66" },
2648
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vsububsat_dv_128B, "v60,v62,v65,v66" },
2649
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vsubububb_sat, "v62,v65,v66" },
2650
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vsubububb_sat_128B, "v62,v65,v66" },
2651
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vsubuhsat, "v60,v62,v65,v66" },
2652
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vsubuhsat_128B, "v60,v62,v65,v66" },
2653
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vsubuhsat_dv, "v60,v62,v65,v66" },
2654
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vsubuhsat_dv_128B, "v60,v62,v65,v66" },
2655
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vsubuhw, "v60,v62,v65,v66" },
2656
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vsubuhw_128B, "v60,v62,v65,v66" },
2657
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vsubuwsat, "v62,v65,v66" },
2658
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vsubuwsat_128B, "v62,v65,v66" },
2659
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vsubuwsat_dv, "v62,v65,v66" },
2660
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vsubuwsat_dv_128B, "v62,v65,v66" },
2661
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vsubw, "v60,v62,v65,v66" },
2662
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vsubw_128B, "v60,v62,v65,v66" },
2663
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vsubw_dv, "v60,v62,v65,v66" },
2664
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vsubw_dv_128B, "v60,v62,v65,v66" },
2665
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vsubwsat, "v60,v62,v65,v66" },
2666
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vsubwsat_128B, "v60,v62,v65,v66" },
2667
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vsubwsat_dv, "v60,v62,v65,v66" },
2668
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vsubwsat_dv_128B, "v60,v62,v65,v66" },
2669
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vswap, "v60,v62,v65,v66" },
2670
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vswap_128B, "v60,v62,v65,v66" },
2671
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vtmpyb, "v60,v62,v65,v66" },
2672
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vtmpyb_128B, "v60,v62,v65,v66" },
2673
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vtmpyb_acc, "v60,v62,v65,v66" },
2674
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vtmpyb_acc_128B, "v60,v62,v65,v66" },
2675
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vtmpybus, "v60,v62,v65,v66" },
2676
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vtmpybus_128B, "v60,v62,v65,v66" },
2677
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vtmpybus_acc, "v60,v62,v65,v66" },
2678
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vtmpybus_acc_128B, "v60,v62,v65,v66" },
2679
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vtmpyhb, "v60,v62,v65,v66" },
2680
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vtmpyhb_128B, "v60,v62,v65,v66" },
2681
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vtmpyhb_acc, "v60,v62,v65,v66" },
2682
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vtmpyhb_acc_128B, "v60,v62,v65,v66" },
2683
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vunpackb, "v60,v62,v65,v66" },
2684
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vunpackb_128B, "v60,v62,v65,v66" },
2685
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vunpackh, "v60,v62,v65,v66" },
2686
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vunpackh_128B, "v60,v62,v65,v66" },
2687
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vunpackob, "v60,v62,v65,v66" },
2688
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vunpackob_128B, "v60,v62,v65,v66" },
2689
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vunpackoh, "v60,v62,v65,v66" },
2690
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vunpackoh_128B, "v60,v62,v65,v66" },
2691
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vunpackub, "v60,v62,v65,v66" },
2692
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vunpackub_128B, "v60,v62,v65,v66" },
2693
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vunpackuh, "v60,v62,v65,v66" },
2694
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vunpackuh_128B, "v60,v62,v65,v66" },
2695
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vxor, "v60,v62,v65,v66" },
2696
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vxor_128B, "v60,v62,v65,v66" },
2697
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vzb, "v60,v62,v65,v66" },
2698
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vzb_128B, "v60,v62,v65,v66" },
2699
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vzh, "v60,v62,v65,v66" },
2700
1.75k
    { Hexagon::BI__builtin_HEXAGON_V6_vzh_128B, "v60,v62,v65,v66" },
2701
1.75k
  };
2702
1.75k
2703
1.75k
  // Sort the tables on first execution so we can binary search them.
2704
147k
  auto SortCmp = [](const BuiltinAndString &LHS, const BuiltinAndString &RHS) {
2705
147k
    return LHS.BuiltinID < RHS.BuiltinID;
2706
147k
  };
2707
1.75k
  static const bool SortOnce =
2708
1.75k
      (llvm::sort(ValidCPU, SortCmp),
2709
1.75k
       llvm::sort(ValidHVX, SortCmp), true);
2710
1.75k
  (void)SortOnce;
2711
25.1k
  auto LowerBoundCmp = [](const BuiltinAndString &BI, unsigned BuiltinID) {
2712
25.1k
    return BI.BuiltinID < BuiltinID;
2713
25.1k
  };
2714
1.75k
2715
1.75k
  const TargetInfo &TI = Context.getTargetInfo();
2716
1.75k
2717
1.75k
  const BuiltinAndString *FC =
2718
1.75k
      llvm::lower_bound(ValidCPU, BuiltinID, LowerBoundCmp);
2719
1.75k
  if (FC != std::end(ValidCPU) && 
FC->BuiltinID == BuiltinID987
) {
2720
34
    const TargetOptions &Opts = TI.getTargetOpts();
2721
34
    StringRef CPU = Opts.CPU;
2722
34
    if (!CPU.empty()) {
2723
34
      assert(CPU.startswith("hexagon") && "Unexpected CPU name");
2724
34
      CPU.consume_front("hexagon");
2725
34
      SmallVector<StringRef, 3> CPUs;
2726
34
      StringRef(FC->Str).split(CPUs, ',');
2727
77
      if (
llvm::none_of(CPUs, [CPU](StringRef S) 34
{ return S == CPU; }))
2728
6
        return Diag(TheCall->getBeginLoc(),
2729
6
                    diag::err_hexagon_builtin_unsupported_cpu);
2730
1.74k
    }
2731
34
  }
2732
1.74k
2733
1.74k
  const BuiltinAndString *FH =
2734
1.74k
      llvm::lower_bound(ValidHVX, BuiltinID, LowerBoundCmp);
2735
1.74k
  if (FH != std::end(ValidHVX) && FH->BuiltinID == BuiltinID) {
2736
744
    if (!TI.hasFeature("hvx"))
2737
3
      return Diag(TheCall->getBeginLoc(),
2738
3
                  diag::err_hexagon_builtin_requires_hvx);
2739
741
2740
741
    SmallVector<StringRef, 3> HVXs;
2741
741
    StringRef(FH->Str).split(HVXs, ',');
2742
741
    bool IsValid = llvm::any_of(HVXs,
2743
1.98k
                                [&TI] (StringRef V) {
2744
1.98k
                                  std::string F = "hvx" + V.str();
2745
1.98k
                                  return TI.hasFeature(F);
2746
1.98k
                                });
2747
741
    if (!IsValid)
2748
3
      return Diag(TheCall->getBeginLoc(),
2749
3
                  diag::err_hexagon_builtin_unsupported_hvx);
2750
1.74k
  }
2751
1.74k
2752
1.74k
  return false;
2753
1.74k
}
2754
2755
1.74k
bool Sema::CheckHexagonBuiltinArgument(unsigned BuiltinID, CallExpr *TheCall) {
2756
1.74k
  struct ArgInfo {
2757
1.74k
    uint8_t OpNum;
2758
1.74k
    bool IsSigned;
2759
1.74k
    uint8_t BitWidth;
2760
1.74k
    uint8_t Align;
2761
1.74k
  };
2762
1.74k
  struct BuiltinInfo {
2763
1.74k
    unsigned BuiltinID;
2764
1.74k
    ArgInfo Infos[2];
2765
1.74k
  };
2766
1.74k
2767
1.74k
  static BuiltinInfo Infos[] = {
2768
1.74k
    { Hexagon::BI__builtin_circ_ldd,                  {{ 3, true,  4,  3 }} },
2769
1.74k
    { Hexagon::BI__builtin_circ_ldw,                  {{ 3, true,  4,  2 }} },
2770
1.74k
    { Hexagon::BI__builtin_circ_ldh,                  {{ 3, true,  4,  1 }} },
2771
1.74k
    { Hexagon::BI__builtin_circ_lduh,                 {{ 3, true,  4,  0 }} },
2772
1.74k
    { Hexagon::BI__builtin_circ_ldb,                  {{ 3, true,  4,  0 }} },
2773
1.74k
    { Hexagon::BI__builtin_circ_ldub,                 {{ 3, true,  4,  0 }} },
2774
1.74k
    { Hexagon::BI__builtin_circ_std,                  {{ 3, true,  4,  3 }} },
2775
1.74k
    { Hexagon::BI__builtin_circ_stw,                  {{ 3, true,  4,  2 }} },
2776
1.74k
    { Hexagon::BI__builtin_circ_sth,                  {{ 3, true,  4,  1 }} },
2777
1.74k
    { Hexagon::BI__builtin_circ_sthhi,                {{ 3, true,  4,  1 }} },
2778
1.74k
    { Hexagon::BI__builtin_circ_stb,                  {{ 3, true,  4,  0 }} },
2779
1.74k
2780
1.74k
    { Hexagon::BI__builtin_HEXAGON_L2_loadrub_pci,    {{ 1, true,  4,  0 }} },
2781
1.74k
    { Hexagon::BI__builtin_HEXAGON_L2_loadrb_pci,     {{ 1, true,  4,  0 }} },
2782
1.74k
    { Hexagon::BI__builtin_HEXAGON_L2_loadruh_pci,    {{ 1, true,  4,  1 }} },
2783
1.74k
    { Hexagon::BI__builtin_HEXAGON_L2_loadrh_pci,     {{ 1, true,  4,  1 }} },
2784
1.74k
    { Hexagon::BI__builtin_HEXAGON_L2_loadri_pci,     {{ 1, true,  4,  2 }} },
2785
1.74k
    { Hexagon::BI__builtin_HEXAGON_L2_loadrd_pci,     {{ 1, true,  4,  3 }} },
2786
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_storerb_pci,    {{ 1, true,  4,  0 }} },
2787
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_storerh_pci,    {{ 1, true,  4,  1 }} },
2788
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_storerf_pci,    {{ 1, true,  4,  1 }} },
2789
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_storeri_pci,    {{ 1, true,  4,  2 }} },
2790
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_storerd_pci,    {{ 1, true,  4,  3 }} },
2791
1.74k
2792
1.74k
    { Hexagon::BI__builtin_HEXAGON_A2_combineii,      {{ 1, true,  8,  0 }} },
2793
1.74k
    { Hexagon::BI__builtin_HEXAGON_A2_tfrih,          {{ 1, false, 16, 0 }} },
2794
1.74k
    { Hexagon::BI__builtin_HEXAGON_A2_tfril,          {{ 1, false, 16, 0 }} },
2795
1.74k
    { Hexagon::BI__builtin_HEXAGON_A2_tfrpi,          {{ 0, true,  8,  0 }} },
2796
1.74k
    { Hexagon::BI__builtin_HEXAGON_A4_bitspliti,      {{ 1, false, 5,  0 }} },
2797
1.74k
    { Hexagon::BI__builtin_HEXAGON_A4_cmpbeqi,        {{ 1, false, 8,  0 }} },
2798
1.74k
    { Hexagon::BI__builtin_HEXAGON_A4_cmpbgti,        {{ 1, true,  8,  0 }} },
2799
1.74k
    { Hexagon::BI__builtin_HEXAGON_A4_cround_ri,      {{ 1, false, 5,  0 }} },
2800
1.74k
    { Hexagon::BI__builtin_HEXAGON_A4_round_ri,       {{ 1, false, 5,  0 }} },
2801
1.74k
    { Hexagon::BI__builtin_HEXAGON_A4_round_ri_sat,   {{ 1, false, 5,  0 }} },
2802
1.74k
    { Hexagon::BI__builtin_HEXAGON_A4_vcmpbeqi,       {{ 1, false, 8,  0 }} },
2803
1.74k
    { Hexagon::BI__builtin_HEXAGON_A4_vcmpbgti,       {{ 1, true,  8,  0 }} },
2804
1.74k
    { Hexagon::BI__builtin_HEXAGON_A4_vcmpbgtui,      {{ 1, false, 7,  0 }} },
2805
1.74k
    { Hexagon::BI__builtin_HEXAGON_A4_vcmpheqi,       {{ 1, true,  8,  0 }} },
2806
1.74k
    { Hexagon::BI__builtin_HEXAGON_A4_vcmphgti,       {{ 1, true,  8,  0 }} },
2807
1.74k
    { Hexagon::BI__builtin_HEXAGON_A4_vcmphgtui,      {{ 1, false, 7,  0 }} },
2808
1.74k
    { Hexagon::BI__builtin_HEXAGON_A4_vcmpweqi,       {{ 1, true,  8,  0 }} },
2809
1.74k
    { Hexagon::BI__builtin_HEXAGON_A4_vcmpwgti,       {{ 1, true,  8,  0 }} },
2810
1.74k
    { Hexagon::BI__builtin_HEXAGON_A4_vcmpwgtui,      {{ 1, false, 7,  0 }} },
2811
1.74k
    { Hexagon::BI__builtin_HEXAGON_C2_bitsclri,       {{ 1, false, 6,  0 }} },
2812
1.74k
    { Hexagon::BI__builtin_HEXAGON_C2_muxii,          {{ 2, true,  8,  0 }} },
2813
1.74k
    { Hexagon::BI__builtin_HEXAGON_C4_nbitsclri,      {{ 1, false, 6,  0 }} },
2814
1.74k
    { Hexagon::BI__builtin_HEXAGON_F2_dfclass,        {{ 1, false, 5,  0 }} },
2815
1.74k
    { Hexagon::BI__builtin_HEXAGON_F2_dfimm_n,        {{ 0, false, 10, 0 }} },
2816
1.74k
    { Hexagon::BI__builtin_HEXAGON_F2_dfimm_p,        {{ 0, false, 10, 0 }} },
2817
1.74k
    { Hexagon::BI__builtin_HEXAGON_F2_sfclass,        {{ 1, false, 5,  0 }} },
2818
1.74k
    { Hexagon::BI__builtin_HEXAGON_F2_sfimm_n,        {{ 0, false, 10, 0 }} },
2819
1.74k
    { Hexagon::BI__builtin_HEXAGON_F2_sfimm_p,        {{ 0, false, 10, 0 }} },
2820
1.74k
    { Hexagon::BI__builtin_HEXAGON_M4_mpyri_addi,     {{ 2, false, 6,  0 }} },
2821
1.74k
    { Hexagon::BI__builtin_HEXAGON_M4_mpyri_addr_u2,  {{ 1, false, 6,  2 }} },
2822
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_addasl_rrri,    {{ 2, false, 3,  0 }} },
2823
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_asl_i_p_acc,    {{ 2, false, 6,  0 }} },
2824
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_asl_i_p_and,    {{ 2, false, 6,  0 }} },
2825
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_asl_i_p,        {{ 1, false, 6,  0 }} },
2826
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_asl_i_p_nac,    {{ 2, false, 6,  0 }} },
2827
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_asl_i_p_or,     {{ 2, false, 6,  0 }} },
2828
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_asl_i_p_xacc,   {{ 2, false, 6,  0 }} },
2829
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_asl_i_r_acc,    {{ 2, false, 5,  0 }} },
2830
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_asl_i_r_and,    {{ 2, false, 5,  0 }} },
2831
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_asl_i_r,        {{ 1, false, 5,  0 }} },
2832
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_asl_i_r_nac,    {{ 2, false, 5,  0 }} },
2833
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_asl_i_r_or,     {{ 2, false, 5,  0 }} },
2834
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_asl_i_r_sat,    {{ 1, false, 5,  0 }} },
2835
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_asl_i_r_xacc,   {{ 2, false, 5,  0 }} },
2836
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_asl_i_vh,       {{ 1, false, 4,  0 }} },
2837
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_asl_i_vw,       {{ 1, false, 5,  0 }} },
2838
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_asr_i_p_acc,    {{ 2, false, 6,  0 }} },
2839
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_asr_i_p_and,    {{ 2, false, 6,  0 }} },
2840
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_asr_i_p,        {{ 1, false, 6,  0 }} },
2841
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_asr_i_p_nac,    {{ 2, false, 6,  0 }} },
2842
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_asr_i_p_or,     {{ 2, false, 6,  0 }} },
2843
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_asr_i_p_rnd_goodsyntax,
2844
1.74k
                                                      {{ 1, false, 6,  0 }} },
2845
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_asr_i_p_rnd,    {{ 1, false, 6,  0 }} },
2846
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_asr_i_r_acc,    {{ 2, false, 5,  0 }} },
2847
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_asr_i_r_and,    {{ 2, false, 5,  0 }} },
2848
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_asr_i_r,        {{ 1, false, 5,  0 }} },
2849
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_asr_i_r_nac,    {{ 2, false, 5,  0 }} },
2850
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_asr_i_r_or,     {{ 2, false, 5,  0 }} },
2851
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_asr_i_r_rnd_goodsyntax,
2852
1.74k
                                                      {{ 1, false, 5,  0 }} },
2853
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_asr_i_r_rnd,    {{ 1, false, 5,  0 }} },
2854
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_asr_i_svw_trun, {{ 1, false, 5,  0 }} },
2855
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_asr_i_vh,       {{ 1, false, 4,  0 }} },
2856
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_asr_i_vw,       {{ 1, false, 5,  0 }} },
2857
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_clrbit_i,       {{ 1, false, 5,  0 }} },
2858
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_extractu,       {{ 1, false, 5,  0 },
2859
1.74k
                                                       { 2, false, 5,  0 }} },
2860
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_extractup,      {{ 1, false, 6,  0 },
2861
1.74k
                                                       { 2, false, 6,  0 }} },
2862
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_insert,         {{ 2, false, 5,  0 },
2863
1.74k
                                                       { 3, false, 5,  0 }} },
2864
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_insertp,        {{ 2, false, 6,  0 },
2865
1.74k
                                                       { 3, false, 6,  0 }} },
2866
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_lsr_i_p_acc,    {{ 2, false, 6,  0 }} },
2867
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_lsr_i_p_and,    {{ 2, false, 6,  0 }} },
2868
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_lsr_i_p,        {{ 1, false, 6,  0 }} },
2869
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_lsr_i_p_nac,    {{ 2, false, 6,  0 }} },
2870
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_lsr_i_p_or,     {{ 2, false, 6,  0 }} },
2871
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_lsr_i_p_xacc,   {{ 2, false, 6,  0 }} },
2872
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_lsr_i_r_acc,    {{ 2, false, 5,  0 }} },
2873
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_lsr_i_r_and,    {{ 2, false, 5,  0 }} },
2874
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_lsr_i_r,        {{ 1, false, 5,  0 }} },
2875
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_lsr_i_r_nac,    {{ 2, false, 5,  0 }} },
2876
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_lsr_i_r_or,     {{ 2, false, 5,  0 }} },
2877
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_lsr_i_r_xacc,   {{ 2, false, 5,  0 }} },
2878
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_lsr_i_vh,       {{ 1, false, 4,  0 }} },
2879
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_lsr_i_vw,       {{ 1, false, 5,  0 }} },
2880
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_setbit_i,       {{ 1, false, 5,  0 }} },
2881
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_tableidxb_goodsyntax,
2882
1.74k
                                                      {{ 2, false, 4,  0 },
2883
1.74k
                                                       { 3, false, 5,  0 }} },
2884
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_tableidxd_goodsyntax,
2885
1.74k
                                                      {{ 2, false, 4,  0 },
2886
1.74k
                                                       { 3, false, 5,  0 }} },
2887
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_tableidxh_goodsyntax,
2888
1.74k
                                                      {{ 2, false, 4,  0 },
2889
1.74k
                                                       { 3, false, 5,  0 }} },
2890
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_tableidxw_goodsyntax,
2891
1.74k
                                                      {{ 2, false, 4,  0 },
2892
1.74k
                                                       { 3, false, 5,  0 }} },
2893
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_togglebit_i,    {{ 1, false, 5,  0 }} },
2894
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_tstbit_i,       {{ 1, false, 5,  0 }} },
2895
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_valignib,       {{ 2, false, 3,  0 }} },
2896
1.74k
    { Hexagon::BI__builtin_HEXAGON_S2_vspliceib,      {{ 2, false, 3,  0 }} },
2897
1.74k
    { Hexagon::BI__builtin_HEXAGON_S4_addi_asl_ri,    {{ 2, false, 5,  0 }} },
2898
1.74k
    { Hexagon::BI__builtin_HEXAGON_S4_addi_lsr_ri,    {{ 2, false, 5,  0 }} },
2899
1.74k
    { Hexagon::BI__builtin_HEXAGON_S4_andi_asl_ri,    {{ 2, false, 5,  0 }} },
2900
1.74k
    { Hexagon::BI__builtin_HEXAGON_S4_andi_lsr_ri,    {{ 2, false, 5,  0 }} },
2901
1.74k
    { Hexagon::BI__builtin_HEXAGON_S4_clbaddi,        {{ 1, true , 6,  0 }} },
2902
1.74k
    { Hexagon::BI__builtin_HEXAGON_S4_clbpaddi,       {{ 1, true,  6,  0 }} },
2903
1.74k
    { Hexagon::BI__builtin_HEXAGON_S4_extract,        {{ 1, false, 5,  0 },
2904
1.74k
                                                       { 2, false, 5,  0 }} },
2905
1.74k
    { Hexagon::BI__builtin_HEXAGON_S4_extractp,       {{ 1, false, 6,  0 },
2906
1.74k
                                                       { 2, false, 6,  0 }} },
2907
1.74k
    { Hexagon::BI__builtin_HEXAGON_S4_lsli,           {{ 0, true,  6,  0 }} },
2908
1.74k
    { Hexagon::BI__builtin_HEXAGON_S4_ntstbit_i,      {{ 1, false, 5,  0 }} },
2909
1.74k
    { Hexagon::BI__builtin_HEXAGON_S4_ori_asl_ri,     {{ 2, false, 5,  0 }} },
2910
1.74k
    { Hexagon::BI__builtin_HEXAGON_S4_ori_lsr_ri,     {{ 2, false, 5,  0 }} },
2911
1.74k
    { Hexagon::BI__builtin_HEXAGON_S4_subi_asl_ri,    {{ 2, false, 5,  0 }} },
2912
1.74k
    { Hexagon::BI__builtin_HEXAGON_S4_subi_lsr_ri,    {{ 2, false, 5,  0 }} },
2913
1.74k
    { Hexagon::BI__builtin_HEXAGON_S4_vrcrotate_acc,  {{ 3, false, 2,  0 }} },
2914
1.74k
    { Hexagon::BI__builtin_HEXAGON_S4_vrcrotate,      {{ 2, false, 2,  0 }} },
2915
1.74k
    { Hexagon::BI__builtin_HEXAGON_S5_asrhub_rnd_sat_goodsyntax,
2916
1.74k
                                                      {{ 1, false, 4,  0 }} },
2917
1.74k
    { Hexagon::BI__builtin_HEXAGON_S5_asrhub_sat,     {{ 1, false, 4,  0 }} },
2918
1.74k
    { Hexagon::BI__builtin_HEXAGON_S5_vasrhrnd_goodsyntax,
2919
1.74k
                                                      {{ 1, false, 4,  0 }} },
2920
1.74k
    { Hexagon::BI__builtin_HEXAGON_S6_rol_i_p,        {{ 1, false, 6,  0 }} },
2921
1.74k
    { Hexagon::BI__builtin_HEXAGON_S6_rol_i_p_acc,    {{ 2, false, 6,  0 }} },
2922
1.74k
    { Hexagon::BI__builtin_HEXAGON_S6_rol_i_p_and,    {{ 2, false, 6,  0 }} },
2923
1.74k
    { Hexagon::BI__builtin_HEXAGON_S6_rol_i_p_nac,    {{ 2, false, 6,  0 }} },
2924
1.74k
    { Hexagon::BI__builtin_HEXAGON_S6_rol_i_p_or,     {{ 2, false, 6,  0 }} },
2925
1.74k
    { Hexagon::BI__builtin_HEXAGON_S6_rol_i_p_xacc,   {{ 2, false, 6,  0 }} },
2926
1.74k
    { Hexagon::BI__builtin_HEXAGON_S6_rol_i_r,        {{ 1, false, 5,  0 }} },
2927
1.74k
    { Hexagon::BI__builtin_HEXAGON_S6_rol_i_r_acc,    {{ 2, false, 5,  0 }} },
2928
1.74k
    { Hexagon::BI__builtin_HEXAGON_S6_rol_i_r_and,    {{ 2, false, 5,  0 }} },
2929
1.74k
    { Hexagon::BI__builtin_HEXAGON_S6_rol_i_r_nac,    {{ 2, false, 5,  0 }} },
2930
1.74k
    { Hexagon::BI__builtin_HEXAGON_S6_rol_i_r_or,     {{ 2, false, 5,  0 }} },
2931
1.74k
    { Hexagon::BI__builtin_HEXAGON_S6_rol_i_r_xacc,   {{ 2, false, 5,  0 }} },
2932
1.74k
    { Hexagon::BI__builtin_HEXAGON_V6_valignbi,       {{ 2, false, 3,  0 }} },
2933
1.74k
    { Hexagon::BI__builtin_HEXAGON_V6_valignbi_128B,  {{ 2, false, 3,  0 }} },
2934
1.74k
    { Hexagon::BI__builtin_HEXAGON_V6_vlalignbi,      {{ 2, false, 3,  0 }} },
2935
1.74k
    { Hexagon::BI__builtin_HEXAGON_V6_vlalignbi_128B, {{ 2, false, 3,  0 }} },
2936
1.74k
    { Hexagon::BI__builtin_HEXAGON_V6_vrmpybusi,      {{ 2, false, 1,  0 }} },
2937
1.74k
    { Hexagon::BI__builtin_HEXAGON_V6_vrmpybusi_128B, {{ 2, false, 1,  0 }} },
2938
1.74k
    { Hexagon::BI__builtin_HEXAGON_V6_vrmpybusi_acc,  {{ 3, false, 1,  0 }} },
2939
1.74k
    { Hexagon::BI__builtin_HEXAGON_V6_vrmpybusi_acc_128B,
2940
1.74k
                                                      {{ 3, false, 1,  0 }} },
2941
1.74k
    { Hexagon::BI__builtin_HEXAGON_V6_vrmpyubi,       {{ 2, false, 1,  0 }} },
2942
1.74k
    { Hexagon::BI__builtin_HEXAGON_V6_vrmpyubi_128B,  {{ 2, false, 1,  0 }} },
2943
1.74k
    { Hexagon::BI__builtin_HEXAGON_V6_vrmpyubi_acc,   {{ 3, false, 1,  0 }} },
2944
1.74k
    { Hexagon::BI__builtin_HEXAGON_V6_vrmpyubi_acc_128B,
2945
1.74k
                                                      {{ 3, false, 1,  0 }} },
2946
1.74k
    { Hexagon::BI__builtin_HEXAGON_V6_vrsadubi,       {{ 2, false, 1,  0 }} },
2947
1.74k
    { Hexagon::BI__builtin_HEXAGON_V6_vrsadubi_128B,  {{ 2, false, 1,  0 }} },
2948
1.74k
    { Hexagon::BI__builtin_HEXAGON_V6_vrsadubi_acc,   {{ 3, false, 1,  0 }} },
2949
1.74k
    { Hexagon::BI__builtin_HEXAGON_V6_vrsadubi_acc_128B,
2950
1.74k
                                                      {{ 3, false, 1,  0 }} },
2951
1.74k
  };
2952
1.74k
2953
1.74k
  // Use a dynamically initialized static to sort the table exactly once on
2954
1.74k
  // first run.
2955
1.74k
  static const bool SortOnce =
2956
1.74k
      (llvm::sort(Infos,
2957
20.0k
                 [](const BuiltinInfo &LHS, const BuiltinInfo &RHS) {
2958
20.0k
                   return LHS.BuiltinID < RHS.BuiltinID;
2959
20.0k
                 }),
2960
1.74k
       true);
2961
1.74k
  (void)SortOnce;
2962
1.74k
2963
1.74k
  const BuiltinInfo *F = llvm::partition_point(
2964
12.8k
      Infos, [=](const BuiltinInfo &BI) { return BI.BuiltinID < BuiltinID; });
2965
1.74k
  if (F == std::end(Infos) || 
F->BuiltinID != BuiltinID1.56k
)
2966
1.57k
    return false;
2967
173
2968
173
  bool Error = false;
2969
173
2970
346
  for (const ArgInfo &A : F->Infos) {
2971
346
    // Ignore empty ArgInfo elements.
2972
346
    if (A.BitWidth == 0)
2973
158
      continue;
2974
188
2975
188
    int32_t Min = A.IsSigned ? 
-(1 << (A.BitWidth - 1))39
:
0149
;
2976
188
    int32_t Max = (1 << (A.IsSigned ? 
A.BitWidth - 139
:
A.BitWidth149
)) - 1;
2977
188
    if (!A.Align) {
2978
167
      Error |= SemaBuiltinConstantArgRange(TheCall, A.OpNum, Min, Max);
2979
167
    } else {
2980
21
      unsigned M = 1 << A.Align;
2981
21
      Min *= M;
2982
21
      Max *= M;
2983
21
      Error |= SemaBuiltinConstantArgRange(TheCall, A.OpNum, Min, Max) |
2984
21
               SemaBuiltinConstantArgMultiple(TheCall, A.OpNum, M);
2985
21
    }
2986
188
  }
2987
173
  return Error;
2988
173
}
2989
2990
bool Sema::CheckHexagonBuiltinFunctionCall(unsigned BuiltinID,
2991
1.75k
                                           CallExpr *TheCall) {
2992
1.75k
  return CheckHexagonBuiltinCpu(BuiltinID, TheCall) ||
2993
1.75k
         
CheckHexagonBuiltinArgument(BuiltinID, TheCall)1.74k
;
2994
1.75k
}
2995
2996
2997
// CheckMipsBuiltinFunctionCall - Checks the constant value passed to the
2998
// intrinsic is correct. The switch statement is ordered by DSP, MSA. The
2999
// ordering for DSP is unspecified. MSA is ordered by the data format used
3000
// by the underlying instruction i.e., df/m, df/n and then by size.
3001
//
3002
// FIXME: The size tests here should instead be tablegen'd along with the
3003
//        definitions from include/clang/Basic/BuiltinsMips.def.
3004
// FIXME: GCC is strict on signedness for some of these intrinsics, we should
3005
//        be too.
3006
1.04k
bool Sema::CheckMipsBuiltinFunctionCall(unsigned BuiltinID, CallExpr *TheCall) {
3007
1.04k
  unsigned i = 0, l = 0, u = 0, m = 0;
3008
1.04k
  switch (BuiltinID) {
3009
1.04k
  
default: return false556
;
3010
1.04k
  
case Mips::BI__builtin_mips_wrdsp: i = 1; l = 0; u = 63; break5
;
3011
1.04k
  
case Mips::BI__builtin_mips_rddsp: i = 0; l = 0; u = 63; break3
;
3012
1.04k
  
case Mips::BI__builtin_mips_append: i = 2; l = 0; u = 31; break3
;
3013
1.04k
  
case Mips::BI__builtin_mips_balign: i = 2; l = 0; u = 3; break3
;
3014
1.04k
  
case Mips::BI__builtin_mips_precr_sra_ph_w: i = 2; l = 0; u = 31; break3
;
3015
1.04k
  
case Mips::BI__builtin_mips_precr_sra_r_ph_w: i = 2; l = 0; u = 31; break3
;
3016
1.04k
  
case Mips::BI__builtin_mips_prepend: i = 2; l = 0; u = 31; break3
;
3017
1.04k
  // MSA intrinsics. Instructions (which the intrinsics maps to) which use the
3018
1.04k
  // df/m field.
3019
1.04k
  // These intrinsics take an unsigned 3 bit immediate.
3020
1.04k
  case Mips::BI__builtin_msa_bclri_b:
3021
30
  case Mips::BI__builtin_msa_bnegi_b:
3022
30
  case Mips::BI__builtin_msa_bseti_b:
3023
30
  case Mips::BI__builtin_msa_sat_s_b:
3024
30
  case Mips::BI__builtin_msa_sat_u_b:
3025
30
  case Mips::BI__builtin_msa_slli_b:
3026
30
  case Mips::BI__builtin_msa_srai_b:
3027
30
  case Mips::BI__builtin_msa_srari_b:
3028
30
  case Mips::BI__builtin_msa_srli_b:
3029
30
  case Mips::BI__builtin_msa_srlri_b: i = 1; l = 0; u = 7; break;
3030
30
  case Mips::BI__builtin_msa_binsli_b:
3031
6
  case Mips::BI__builtin_msa_binsri_b: i = 2; l = 0; u = 7; break;
3032
6
  // These intrinsics take an unsigned 4 bit immediate.
3033
30
  case Mips::BI__builtin_msa_bclri_h:
3034
30
  case Mips::BI__builtin_msa_bnegi_h:
3035
30
  case Mips::BI__builtin_msa_bseti_h:
3036
30
  case Mips::BI__builtin_msa_sat_s_h:
3037
30
  case Mips::BI__builtin_msa_sat_u_h:
3038
30
  case Mips::BI__builtin_msa_slli_h:
3039
30
  case Mips::BI__builtin_msa_srai_h:
3040
30
  case Mips::BI__builtin_msa_srari_h:
3041
30
  case Mips::BI__builtin_msa_srli_h:
3042
30
  case Mips::BI__builtin_msa_srlri_h: i = 1; l = 0; u = 15; break;
3043
30
  case Mips::BI__builtin_msa_binsli_h:
3044
6
  case Mips::BI__builtin_msa_binsri_h: i = 2; l = 0; u = 15; break;
3045
6
  // These intrinsics take an unsigned 5 bit immediate.
3046
6
  // The first block of intrinsics actually have an unsigned 5 bit field,
3047
6
  // not a df/n field.
3048
6
  case Mips::BI__builtin_msa_cfcmsa:
3049
4
  case Mips::BI__builtin_msa_ctcmsa: i = 0; l = 0; u = 31; break;
3050
106
  case Mips::BI__builtin_msa_clei_u_b:
3051
106
  case Mips::BI__builtin_msa_clei_u_h:
3052
106
  case Mips::BI__builtin_msa_clei_u_w:
3053
106
  case Mips::BI__builtin_msa_clei_u_d:
3054
106
  case Mips::BI__builtin_msa_clti_u_b:
3055
106
  case Mips::BI__builtin_msa_clti_u_h:
3056
106
  case Mips::BI__builtin_msa_clti_u_w:
3057
106
  case Mips::BI__builtin_msa_clti_u_d:
3058
106
  case Mips::BI__builtin_msa_maxi_u_b:
3059
106
  case Mips::BI__builtin_msa_maxi_u_h:
3060
106
  case Mips::BI__builtin_msa_maxi_u_w:
3061
106
  case Mips::BI__builtin_msa_maxi_u_d:
3062
106
  case Mips::BI__builtin_msa_mini_u_b:
3063
106
  case Mips::BI__builtin_msa_mini_u_h:
3064
106
  case Mips::BI__builtin_msa_mini_u_w:
3065
106
  case Mips::BI__builtin_msa_mini_u_d:
3066
106
  case Mips::BI__builtin_msa_addvi_b:
3067
106
  case Mips::BI__builtin_msa_addvi_h:
3068
106
  case Mips::BI__builtin_msa_addvi_w:
3069
106
  case Mips::BI__builtin_msa_addvi_d:
3070
106
  case Mips::BI__builtin_msa_bclri_w:
3071
106
  case Mips::BI__builtin_msa_bnegi_w:
3072
106
  case Mips::BI__builtin_msa_bseti_w:
3073
106
  case Mips::BI__builtin_msa_sat_s_w:
3074
106
  case Mips::BI__builtin_msa_sat_u_w:
3075
106
  case Mips::BI__builtin_msa_slli_w:
3076
106
  case Mips::BI__builtin_msa_srai_w:
3077
106
  case Mips::BI__builtin_msa_srari_w:
3078
106
  case Mips::BI__builtin_msa_srli_w:
3079
106
  case Mips::BI__builtin_msa_srlri_w:
3080
106
  case Mips::BI__builtin_msa_subvi_b:
3081
106
  case Mips::BI__builtin_msa_subvi_h:
3082
106
  case Mips::BI__builtin_msa_subvi_w:
3083
106
  case Mips::BI__builtin_msa_subvi_d: i = 1; l = 0; u = 31; break;
3084
106
  case Mips::BI__builtin_msa_binsli_w:
3085
6
  case Mips::BI__builtin_msa_binsri_w: i = 2; l = 0; u = 31; break;
3086
6
  // These intrinsics take an unsigned 6 bit immediate.
3087
30
  case Mips::BI__builtin_msa_bclri_d:
3088
30
  case Mips::BI__builtin_msa_bnegi_d:
3089
30
  case Mips::BI__builtin_msa_bseti_d:
3090
30
  case Mips::BI__builtin_msa_sat_s_d:
3091
30
  case Mips::BI__builtin_msa_sat_u_d:
3092
30
  case Mips::BI__builtin_msa_slli_d:
3093
30
  case Mips::BI__builtin_msa_srai_d:
3094
30
  case Mips::BI__builtin_msa_srari_d:
3095
30
  case Mips::BI__builtin_msa_srli_d:
3096
30
  case Mips::BI__builtin_msa_srlri_d: i = 1; l = 0; u = 63; break;
3097
30
  case Mips::BI__builtin_msa_binsli_d:
3098
6
  case Mips::BI__builtin_msa_binsri_d: i = 2; l = 0; u = 63; break;
3099
6
  // These intrinsics take a signed 5 bit immediate.
3100
60
  case Mips::BI__builtin_msa_ceqi_b:
3101
60
  case Mips::BI__builtin_msa_ceqi_h:
3102
60
  case Mips::BI__builtin_msa_ceqi_w:
3103
60
  case Mips::BI__builtin_msa_ceqi_d:
3104
60
  case Mips::BI__builtin_msa_clti_s_b:
3105
60
  case Mips::BI__builtin_msa_clti_s_h:
3106
60
  case Mips::BI__builtin_msa_clti_s_w:
3107
60
  case Mips::BI__builtin_msa_clti_s_d:
3108
60
  case Mips::BI__builtin_msa_clei_s_b:
3109
60
  case Mips::BI__builtin_msa_clei_s_h:
3110
60
  case Mips::BI__builtin_msa_clei_s_w:
3111
60
  case Mips::BI__builtin_msa_clei_s_d:
3112
60
  case Mips::BI__builtin_msa_maxi_s_b:
3113
60
  case Mips::BI__builtin_msa_maxi_s_h:
3114
60
  case Mips::BI__builtin_msa_maxi_s_w:
3115
60
  case Mips::BI__builtin_msa_maxi_s_d:
3116
60
  case Mips::BI__builtin_msa_mini_s_b:
3117
60
  case Mips::BI__builtin_msa_mini_s_h:
3118
60
  case Mips::BI__builtin_msa_mini_s_w:
3119
60
  case Mips::BI__builtin_msa_mini_s_d: i = 1; l = -16; u = 15; break;
3120
60
  // These intrinsics take an unsigned 8 bit immediate.
3121
69
  case Mips::BI__builtin_msa_andi_b:
3122
69
  case Mips::BI__builtin_msa_nori_b:
3123
69
  case Mips::BI__builtin_msa_ori_b:
3124
69
  case Mips::BI__builtin_msa_shf_b:
3125
69
  case Mips::BI__builtin_msa_shf_h:
3126
69
  case Mips::BI__builtin_msa_shf_w:
3127
69
  case Mips::BI__builtin_msa_xori_b: i = 1; l = 0; u = 255; break;
3128
69
  case Mips::BI__builtin_msa_bseli_b:
3129
9
  case Mips::BI__builtin_msa_bmnzi_b:
3130
9
  case Mips::BI__builtin_msa_bmzi_b: i = 2; l = 0; u = 255; break;
3131
9
  // df/n format
3132
9
  // These intrinsics take an unsigned 4 bit immediate.
3133
12
  case Mips::BI__builtin_msa_copy_s_b:
3134
12
  case Mips::BI__builtin_msa_copy_u_b:
3135
12
  case Mips::BI__builtin_msa_insve_b:
3136
12
  case Mips::BI__builtin_msa_splati_b: i = 1; l = 0; u = 15; break;
3137
12
  
case Mips::BI__builtin_msa_sldi_b: i = 2; l = 0; u = 15; break3
;
3138
12
  // These intrinsics take an unsigned 3 bit immediate.
3139
12
  case Mips::BI__builtin_msa_copy_s_h:
3140
12
  case Mips::BI__builtin_msa_copy_u_h:
3141
12
  case Mips::BI__builtin_msa_insve_h:
3142
12
  case Mips::BI__builtin_msa_splati_h: i = 1; l = 0; u = 7; break;
3143
12
  
case Mips::BI__builtin_msa_sldi_h: i = 2; l = 0; u = 7; break3
;
3144
12
  // These intrinsics take an unsigned 2 bit immediate.
3145
12
  case Mips::BI__builtin_msa_copy_s_w:
3146
12
  case Mips::BI__builtin_msa_copy_u_w:
3147
12
  case Mips::BI__builtin_msa_insve_w:
3148
12
  case Mips::BI__builtin_msa_splati_w: i = 1; l = 0; u = 3; break;
3149
12
  
case Mips::BI__builtin_msa_sldi_w: i = 2; l = 0; u = 3; break3
;
3150
12
  // These intrinsics take an unsigned 1 bit immediate.
3151
12
  case Mips::BI__builtin_msa_copy_s_d:
3152
12
  case Mips::BI__builtin_msa_copy_u_d:
3153
12
  case Mips::BI__builtin_msa_insve_d:
3154
12
  case Mips::BI__builtin_msa_splati_d: i = 1; l = 0; u = 1; break;
3155
12
  
case Mips::BI__builtin_msa_sldi_d: i = 2; l = 0; u = 1; break3
;
3156
12
  // Memory offsets and immediate loads.
3157
12
  // These intrinsics take a signed 10 bit immediate.
3158
12
  
case Mips::BI__builtin_msa_ldi_b: i = 0; l = -128; u = 255; break5
;
3159
12
  case Mips::BI__builtin_msa_ldi_h:
3160
9
  case Mips::BI__builtin_msa_ldi_w:
3161
9
  case Mips::BI__builtin_msa_ldi_d: i = 0; l = -512; u = 511; break;
3162
9
  
case Mips::BI__builtin_msa_ld_b: i = 1; l = -512; u = 511; m = 1; break3
;
3163
9
  
case Mips::BI__builtin_msa_ld_h: i = 1; l = -1024; u = 1022; m = 2; break4
;
3164
9
  
case Mips::BI__builtin_msa_ld_w: i = 1; l = -2048; u = 2044; m = 4; break4
;
3165
9
  
case Mips::BI__builtin_msa_ld_d: i = 1; l = -4096; u = 4088; m = 8; break4
;
3166
9
  
case Mips::BI__builtin_msa_st_b: i = 2; l = -512; u = 511; m = 1; break3
;
3167
9
  
case Mips::BI__builtin_msa_st_h: i = 2; l = -1024; u = 1022; m = 2; break4
;
3168
9
  
case Mips::BI__builtin_msa_st_w: i = 2; l = -2048; u = 2044; m = 4; break4
;
3169
9
  
case Mips::BI__builtin_msa_st_d: i = 2; l = -4096; u = 4088; m = 8; break4
;
3170
489
  }
3171
489
3172
489
  if (!m)
3173
459
    return SemaBuiltinConstantArgRange(TheCall, i, l, u);
3174
30
3175
30
  return SemaBuiltinConstantArgRange(TheCall, i, l, u) ||
3176
30
         
SemaBuiltinConstantArgMultiple(TheCall, i, m)14
;
3177
30
}
3178
3179
59.6k
bool Sema::CheckPPCBuiltinFunctionCall(unsigned BuiltinID, CallExpr *TheCall) {
3180
59.6k
  unsigned i = 0, l = 0, u = 0;
3181
59.6k
  bool Is64BitBltin = BuiltinID == PPC::BI__builtin_divde ||
3182
59.6k
                      
BuiltinID == PPC::BI__builtin_divdeu59.6k
||
3183
59.6k
                      
BuiltinID == PPC::BI__builtin_bpermd59.6k
;
3184
59.6k
  bool IsTarget64Bit = Context.getTargetInfo()
3185
59.6k
                              .getTypeWidth(Context
3186
59.6k
                                            .getTargetInfo()
3187
59.6k
                                            .getIntPtrType()) == 64;
3188
59.6k
  bool IsBltinExtDiv = BuiltinID == PPC::BI__builtin_divwe ||
3189
59.6k
                       
BuiltinID == PPC::BI__builtin_divweu59.6k
||
3190
59.6k
                       
BuiltinID == PPC::BI__builtin_divde59.6k
||
3191
59.6k
                       
BuiltinID == PPC::BI__builtin_divdeu59.6k
;
3192
59.6k
3193
59.6k
  if (Is64BitBltin && 
!IsTarget64Bit22
)
3194
3
    return Diag(TheCall->getBeginLoc(), diag::err_64_bit_builtin_32_bit_tgt)
3195
3
           << TheCall->getSourceRange();
3196
59.6k
3197
59.6k
  if ((IsBltinExtDiv && 
!Context.getTargetInfo().hasFeature("extdiv")14
) ||
3198
59.6k
      
(59.6k
BuiltinID == PPC::BI__builtin_bpermd59.6k
&&
3199
59.6k
       
!Context.getTargetInfo().hasFeature("bpermd")13
))
3200
5
    return Diag(TheCall->getBeginLoc(), diag::err_ppc_builtin_only_on_pwr7)
3201
5
           << TheCall->getSourceRange();
3202
59.6k
3203
59.6k
  auto SemaVSXCheck = [&](CallExpr *TheCall) -> bool {
3204
14
    if (!Context.getTargetInfo().hasFeature("vsx"))
3205
2
      return Diag(TheCall->getBeginLoc(), diag::err_ppc_builtin_only_on_pwr7)
3206
2
             << TheCall->getSourceRange();
3207
12
    return false;
3208
12
  };
3209
59.6k
3210
59.6k
  switch (BuiltinID) {
3211
59.6k
  
default: return false59.5k
;
3212
59.6k
  case PPC::BI__builtin_altivec_crypto_vshasigmaw:
3213
22
  case PPC::BI__builtin_altivec_crypto_vshasigmad:
3214
22
    return SemaBuiltinConstantArgRange(TheCall, 1, 0, 1) ||
3215
22
           
SemaBuiltinConstantArgRange(TheCall, 2, 0, 15)18
;
3216
22
  case PPC::BI__builtin_tbegin:
3217
11
  case PPC::BI__builtin_tend: i = 0; l = 0; u = 1; break;
3218
11
  
case PPC::BI__builtin_tsr: i = 0; l = 0; u = 7; break2
;
3219
11
  case PPC::BI__builtin_tabortwc:
3220
4
  case PPC::BI__builtin_tabortdc: i = 0; l = 0; u = 31; break;
3221
6
  case PPC::BI__builtin_tabortwci:
3222
6
  case PPC::BI__builtin_tabortdci:
3223
6
    return SemaBuiltinConstantArgRange(TheCall, 0, 0, 31) ||
3224
6
           
SemaBuiltinConstantArgRange(TheCall, 2, 0, 31)4
;
3225
92
  case PPC::BI__builtin_vsx_xxpermdi:
3226
92
  case PPC::BI__builtin_vsx_xxsldwi:
3227
92
    return SemaBuiltinVSX(TheCall);
3228
92
  case PPC::BI__builtin_unpack_vector_int128:
3229
10
    return SemaVSXCheck(TheCall) ||
3230
10
           
SemaBuiltinConstantArgRange(TheCall, 1, 0, 1)9
;
3231
92
  case PPC::BI__builtin_pack_vector_int128:
3232
4
    return SemaVSXCheck(TheCall);
3233
17
  }
3234
17
  return SemaBuiltinConstantArgRange(TheCall, i, l, u);
3235
17
}
3236
3237
bool Sema::CheckSystemZBuiltinFunctionCall(unsigned BuiltinID,
3238
10.1k
                                           CallExpr *TheCall) {
3239
10.1k
  if (BuiltinID == SystemZ::BI__builtin_tabort) {
3240
12
    Expr *Arg = TheCall->getArg(0);
3241
12
    llvm::APSInt AbortCode(32);
3242
12
    if (Arg->isIntegerConstantExpr(AbortCode, Context) &&
3243
12
        
AbortCode.getSExtValue() >= 08
&&
AbortCode.getSExtValue() < 2566
)
3244
2
      return Diag(Arg->getBeginLoc(), diag::err_systemz_invalid_tabort_code)
3245
2
             << Arg->getSourceRange();
3246
10.1k
  }
3247
10.1k
3248
10.1k
  // For intrinsics which take an immediate value as part of the instruction,
3249
10.1k
  // range check them here.
3250
10.1k
  unsigned i = 0, l = 0, u = 0;
3251
10.1k
  switch (BuiltinID) {
3252
10.1k
  
default: return false7.92k
;
3253
10.1k
  
case SystemZ::BI__builtin_s390_lcbb: i = 1; l = 0; u = 15; break22
;
3254
10.1k
  case SystemZ::BI__builtin_s390_verimb:
3255
144
  case SystemZ::BI__builtin_s390_verimh:
3256
144
  case SystemZ::BI__builtin_s390_verimf:
3257
144
  case SystemZ::BI__builtin_s390_verimg: i = 3; l = 0; u = 255; break;
3258
1.02k
  case SystemZ::BI__builtin_s390_vfaeb:
3259
1.02k
  case SystemZ::BI__builtin_s390_vfaeh:
3260
1.02k
  case SystemZ::BI__builtin_s390_vfaef:
3261
1.02k
  case SystemZ::BI__builtin_s390_vfaebs:
3262
1.02k
  case SystemZ::BI__builtin_s390_vfaehs:
3263
1.02k
  case SystemZ::BI__builtin_s390_vfaefs:
3264
1.02k
  case SystemZ::BI__builtin_s390_vfaezb:
3265
1.02k
  case SystemZ::BI__builtin_s390_vfaezh:
3266
1.02k
  case SystemZ::BI__builtin_s390_vfaezf:
3267
1.02k
  case SystemZ::BI__builtin_s390_vfaezbs:
3268
1.02k
  case SystemZ::BI__builtin_s390_vfaezhs:
3269
1.02k
  case SystemZ::BI__builtin_s390_vfaezfs: i = 2; l = 0; u = 15; break;
3270
1.02k
  case SystemZ::BI__builtin_s390_vfisb:
3271
157
  case SystemZ::BI__builtin_s390_vfidb:
3272
157
    return SemaBuiltinConstantArgRange(TheCall, 1, 0, 15) ||
3273
157
           
SemaBuiltinConstantArgRange(TheCall, 2, 0, 15)153
;
3274
157
  case SystemZ::BI__builtin_s390_vftcisb:
3275
130
  case SystemZ::BI__builtin_s390_vftcidb: i = 1; l = 0; u = 4095; break;
3276
130
  
case SystemZ::BI__builtin_s390_vlbb: i = 1; l = 0; u = 15; break50
;
3277
130
  
case SystemZ::BI__builtin_s390_vpdi: i = 2; l = 0; u = 15; break36
;
3278
130
  
case SystemZ::BI__builtin_s390_vsldb: i = 2; l = 0; u = 15; break100
;
3279
372
  case SystemZ::BI__builtin_s390_vstrcb:
3280
372
  case SystemZ::BI__builtin_s390_vstrch:
3281
372
  case SystemZ::BI__builtin_s390_vstrcf:
3282
372
  case SystemZ::BI__builtin_s390_vstrczb:
3283
372
  case SystemZ::BI__builtin_s390_vstrczh:
3284
372
  case SystemZ::BI__builtin_s390_vstrczf:
3285
372
  case SystemZ::BI__builtin_s390_vstrcbs:
3286
372
  case SystemZ::BI__builtin_s390_vstrchs:
3287
372
  case SystemZ::BI__builtin_s390_vstrcfs:
3288
372
  case SystemZ::BI__builtin_s390_vstrczbs:
3289
372
  case SystemZ::BI__builtin_s390_vstrczhs:
3290
372
  case SystemZ::BI__builtin_s390_vstrczfs: i = 3; l = 0; u = 15; break;
3291
372
  
case SystemZ::BI__builtin_s390_vmslg: i = 3; l = 0; u = 15; break14
;
3292
372
  case SystemZ::BI__builtin_s390_vfminsb:
3293
44
  case SystemZ::BI__builtin_s390_vfmaxsb:
3294
44
  case SystemZ::BI__builtin_s390_vfmindb:
3295
44
  case SystemZ::BI__builtin_s390_vfmaxdb: i = 2; l = 0; u = 15; break;
3296
44
  case SystemZ::BI__builtin_s390_vsld: i = 2; l = 0; u = 7; break;
3297
44
  case SystemZ::BI__builtin_s390_vsrd: i = 2; l = 0; u = 7; break;
3298
2.02k
  }
3299
2.02k
  return SemaBuiltinConstantArgRange(TheCall, i, l, u);
3300
2.02k
}
3301
3302
/// SemaBuiltinCpuSupports - Handle __builtin_cpu_supports(char *).
3303
/// This checks that the target supports __builtin_cpu_supports and
3304
/// that the string argument is constant and valid.
3305
42
static bool SemaBuiltinCpuSupports(Sema &S, CallExpr *TheCall) {
3306
42
  Expr *Arg = TheCall->getArg(0);
3307
42
3308
42
  // Check if the argument is a string literal.
3309
42
  if (!isa<StringLiteral>(Arg->IgnoreParenImpCasts()))
3310
1
    return S.Diag(TheCall->getBeginLoc(), diag::err_expr_not_string_literal)
3311
1
           << Arg->getSourceRange();
3312
41
3313
41
  // Check the contents of the string.
3314
41
  StringRef Feature =
3315
41
      cast<StringLiteral>(Arg->IgnoreParenImpCasts())->getString();
3316
41
  if (!S.Context.getTargetInfo().validateCpuSupports(Feature))
3317
1
    return S.Diag(TheCall->getBeginLoc(), diag::err_invalid_cpu_supports)
3318
1
           << Arg->getSourceRange();
3319
40
  return false;
3320
40
}
3321
3322
/// SemaBuiltinCpuIs - Handle __builtin_cpu_is(char *).
3323
/// This checks that the target supports __builtin_cpu_is and
3324
/// that the string argument is constant and valid.
3325
46
static bool SemaBuiltinCpuIs(Sema &S, CallExpr *TheCall) {
3326
46
  Expr *Arg = TheCall->getArg(0);
3327
46
3328
46
  // Check if the argument is a string literal.
3329
46
  if (!isa<StringLiteral>(Arg->IgnoreParenImpCasts()))
3330
0
    return S.Diag(TheCall->getBeginLoc(), diag::err_expr_not_string_literal)
3331
0
           << Arg->getSourceRange();
3332
46
3333
46
  // Check the contents of the string.
3334
46
  StringRef Feature =
3335
46
      cast<StringLiteral>(Arg->IgnoreParenImpCasts())->getString();
3336
46
  if (!S.Context.getTargetInfo().validateCpuIs(Feature))
3337
1
    return S.Diag(TheCall->getBeginLoc(), diag::err_invalid_cpu_is)
3338
1
           << Arg->getSourceRange();
3339
45
  return false;
3340
45
}
3341
3342
// Check if the rounding mode is legal.
3343
648k
bool Sema::CheckX86BuiltinRoundingOrSAE(unsigned BuiltinID, CallExpr *TheCall) {
3344
648k
  // Indicates if this instruction has rounding control or just SAE.
3345
648k
  bool HasRC = false;
3346
648k
3347
648k
  unsigned ArgNum = 0;
3348
648k
  switch (BuiltinID) {
3349
648k
  default:
3350
611k
    return false;
3351
648k
  case X86::BI__builtin_ia32_vcvttsd2si32:
3352
1.38k
  case X86::BI__builtin_ia32_vcvttsd2si64:
3353
1.38k
  case X86::BI__builtin_ia32_vcvttsd2usi32:
3354
1.38k
  case X86::BI__builtin_ia32_vcvttsd2usi64:
3355
1.38k
  case X86::BI__builtin_ia32_vcvttss2si32:
3356
1.38k
  case X86::BI__builtin_ia32_vcvttss2si64:
3357
1.38k
  case X86::BI__builtin_ia32_vcvttss2usi32:
3358
1.38k
  case X86::BI__builtin_ia32_vcvttss2usi64:
3359
1.38k
    ArgNum = 1;
3360
1.38k
    break;
3361
1.38k
  case X86::BI__builtin_ia32_maxpd512:
3362
772
  case X86::BI__builtin_ia32_maxps512:
3363
772
  case X86::BI__builtin_ia32_minpd512:
3364
772
  case X86::BI__builtin_ia32_minps512:
3365
772
    ArgNum = 2;
3366
772
    break;
3367
6.27k
  case X86::BI__builtin_ia32_cvtps2pd512_mask:
3368
6.27k
  case X86::BI__builtin_ia32_cvttpd2dq512_mask:
3369
6.27k
  case X86::BI__builtin_ia32_cvttpd2qq512_mask:
3370
6.27k
  case X86::BI__builtin_ia32_cvttpd2udq512_mask:
3371
6.27k
  case X86::BI__builtin_ia32_cvttpd2uqq512_mask:
3372
6.27k
  case X86::BI__builtin_ia32_cvttps2dq512_mask:
3373
6.27k
  case X86::BI__builtin_ia32_cvttps2qq512_mask:
3374
6.27k
  case X86::BI__builtin_ia32_cvttps2udq512_mask:
3375
6.27k
  case X86::BI__builtin_ia32_cvttps2uqq512_mask:
3376
6.27k
  case X86::BI__builtin_ia32_exp2pd_mask:
3377
6.27k
  case X86::BI__builtin_ia32_exp2ps_mask:
3378
6.27k
  case X86::BI__builtin_ia32_getexppd512_mask:
3379
6.27k
  case X86::BI__builtin_ia32_getexpps512_mask:
3380
6.27k
  case X86::BI__builtin_ia32_rcp28pd_mask:
3381
6.27k
  case X86::BI__builtin_ia32_rcp28ps_mask:
3382
6.27k
  case X86::BI__builtin_ia32_rsqrt28pd_mask:
3383
6.27k
  case X86::BI__builtin_ia32_rsqrt28ps_mask:
3384
6.27k
  case X86::BI__builtin_ia32_vcomisd:
3385
6.27k
  case X86::BI__builtin_ia32_vcomiss:
3386
6.27k
  case X86::BI__builtin_ia32_vcvtph2ps512_mask:
3387
6.27k
    ArgNum = 3;
3388
6.27k
    break;
3389
6.27k
  case X86::BI__builtin_ia32_cmppd512_mask:
3390
4.95k
  case X86::BI__builtin_ia32_cmpps512_mask:
3391
4.95k
  case X86::BI__builtin_ia32_cmpsd_mask:
3392
4.95k
  case X86::BI__builtin_ia32_cmpss_mask:
3393
4.95k
  case X86::BI__builtin_ia32_cvtss2sd_round_mask:
3394
4.95k
  case X86::BI__builtin_ia32_getexpsd128_round_mask:
3395
4.95k
  case X86::BI__builtin_ia32_getexpss128_round_mask:
3396
4.95k
  case X86::BI__builtin_ia32_getmantpd512_mask:
3397
4.95k
  case X86::BI__builtin_ia32_getmantps512_mask:
3398
4.95k
  case X86::BI__builtin_ia32_maxsd_round_mask:
3399
4.95k
  case X86::BI__builtin_ia32_maxss_round_mask:
3400
4.95k
  case X86::BI__builtin_ia32_minsd_round_mask:
3401
4.95k
  case X86::BI__builtin_ia32_minss_round_mask:
3402
4.95k
  case X86::BI__builtin_ia32_rcp28sd_round_mask:
3403
4.95k
  case X86::BI__builtin_ia32_rcp28ss_round_mask:
3404
4.95k
  case X86::BI__builtin_ia32_reducepd512_mask:
3405
4.95k
  case X86::BI__builtin_ia32_reduceps512_mask:
3406
4.95k
  case X86::BI__builtin_ia32_rndscalepd_mask:
3407
4.95k
  case X86::BI__builtin_ia32_rndscaleps_mask:
3408
4.95k
  case X86::BI__builtin_ia32_rsqrt28sd_round_mask:
3409
4.95k
  case X86::BI__builtin_ia32_rsqrt28ss_round_mask:
3410
4.95k
    ArgNum = 4;
3411
4.95k
    break;
3412
4.95k
  case X86::BI__builtin_ia32_fixupimmpd512_mask:
3413
131
  case X86::BI__builtin_ia32_fixupimmpd512_maskz:
3414
131
  case X86::BI__builtin_ia32_fixupimmps512_mask:
3415
131
  case X86::BI__builtin_ia32_fixupimmps512_maskz:
3416
131
  case X86::BI__builtin_ia32_fixupimmsd_mask:
3417
131
  case X86::BI__builtin_ia32_fixupimmsd_maskz:
3418
131
  case X86::BI__builtin_ia32_fixupimmss_mask:
3419
131
  case X86::BI__builtin_ia32_fixupimmss_maskz:
3420
131
  case X86::BI__builtin_ia32_getmantsd_round_mask:
3421
131
  case X86::BI__builtin_ia32_getmantss_round_mask:
3422
131
  case X86::BI__builtin_ia32_rangepd512_mask:
3423
131
  case X86::BI__builtin_ia32_rangeps512_mask:
3424
131
  case X86::BI__builtin_ia32_rangesd128_round_mask:
3425
131
  case X86::BI__builtin_ia32_rangess128_round_mask:
3426
131
  case X86::BI__builtin_ia32_reducesd_mask:
3427
131
  case X86::BI__builtin_ia32_reducess_mask:
3428
131
  case X86::BI__builtin_ia32_rndscalesd_round_mask:
3429
131
  case X86::BI__builtin_ia32_rndscaless_round_mask:
3430
131
    ArgNum = 5;
3431
131
    break;
3432
1.08k
  case X86::BI__builtin_ia32_vcvtsd2si64:
3433
1.08k
  case X86::BI__builtin_ia32_vcvtsd2si32:
3434
1.08k
  case X86::BI__builtin_ia32_vcvtsd2usi32:
3435
1.08k
  case X86::BI__builtin_ia32_vcvtsd2usi64:
3436
1.08k
  case X86::BI__builtin_ia32_vcvtss2si32:
3437
1.08k
  case X86::BI__builtin_ia32_vcvtss2si64:
3438
1.08k
  case X86::BI__builtin_ia32_vcvtss2usi32:
3439
1.08k
  case X86::BI__builtin_ia32_vcvtss2usi64:
3440
1.08k
  case X86::BI__builtin_ia32_sqrtpd512:
3441
1.08k
  case X86::BI__builtin_ia32_sqrtps512:
3442
1.08k
    ArgNum = 1;
3443
1.08k
    HasRC = true;
3444
1.08k
    break;
3445
1.08k
  case X86::BI__builtin_ia32_addpd512:
3446
66
  case X86::BI__builtin_ia32_addps512:
3447
66
  case X86::BI__builtin_ia32_divpd512:
3448
66
  case X86::BI__builtin_ia32_divps512:
3449
66
  case X86::BI__builtin_ia32_mulpd512:
3450
66
  case X86::BI__builtin_ia32_mulps512:
3451
66
  case X86::BI__builtin_ia32_subpd512:
3452
66
  case X86::BI__builtin_ia32_subps512:
3453
66
  case X86::BI__builtin_ia32_cvtsi2sd64:
3454
66
  case X86::BI__builtin_ia32_cvtsi2ss32:
3455
66
  case X86::BI__builtin_ia32_cvtsi2ss64:
3456
66
  case X86::BI__builtin_ia32_cvtusi2sd64:
3457
66
  case X86::BI__builtin_ia32_cvtusi2ss32:
3458
66
  case X86::BI__builtin_ia32_cvtusi2ss64:
3459
66
    ArgNum = 2;
3460
66
    HasRC = true;
3461
66
    break;
3462
6.23k
  case X86::BI__builtin_ia32_cvtdq2ps512_mask:
3463
6.23k
  case X86::BI__builtin_ia32_cvtudq2ps512_mask:
3464
6.23k
  case X86::BI__builtin_ia32_cvtpd2ps512_mask:
3465
6.23k
  case X86::BI__builtin_ia32_cvtpd2dq512_mask:
3466
6.23k
  case X86::BI__builtin_ia32_cvtpd2qq512_mask:
3467
6.23k
  case X86::BI__builtin_ia32_cvtpd2udq512_mask:
3468
6.23k
  case X86::BI__builtin_ia32_cvtpd2uqq512_mask:
3469
6.23k
  case X86::BI__builtin_ia32_cvtps2dq512_mask:
3470
6.23k
  case X86::BI__builtin_ia32_cvtps2qq512_mask:
3471
6.23k
  case X86::BI__builtin_ia32_cvtps2udq512_mask:
3472
6.23k
  case X86::BI__builtin_ia32_cvtps2uqq512_mask:
3473
6.23k
  case X86::BI__builtin_ia32_cvtqq2pd512_mask:
3474
6.23k
  case X86::BI__builtin_ia32_cvtqq2ps512_mask:
3475
6.23k
  case X86::BI__builtin_ia32_cvtuqq2pd512_mask:
3476
6.23k
  case X86::BI__builtin_ia32_cvtuqq2ps512_mask:
3477
6.23k
    ArgNum = 3;
3478
6.23k
    HasRC = true;
3479
6.23k
    break;
3480
16.3k
  case X86::BI__builtin_ia32_addss_round_mask:
3481
16.3k
  case X86::BI__builtin_ia32_addsd_round_mask:
3482
16.3k
  case X86::BI__builtin_ia32_divss_round_mask:
3483
16.3k
  case X86::BI__builtin_ia32_divsd_round_mask:
3484
16.3k
  case X86::BI__builtin_ia32_mulss_round_mask:
3485
16.3k
  case X86::BI__builtin_ia32_mulsd_round_mask:
3486
16.3k
  case X86::BI__builtin_ia32_subss_round_mask:
3487
16.3k
  case X86::BI__builtin_ia32_subsd_round_mask:
3488
16.3k
  case X86::BI__builtin_ia32_scalefpd512_mask:
3489
16.3k
  case X86::BI__builtin_ia32_scalefps512_mask:
3490
16.3k
  case X86::BI__builtin_ia32_scalefsd_round_mask:
3491
16.3k
  case X86::BI__builtin_ia32_scalefss_round_mask:
3492
16.3k
  case X86::BI__builtin_ia32_cvtsd2ss_round_mask:
3493
16.3k
  case X86::BI__builtin_ia32_sqrtsd_round_mask:
3494
16.3k
  case X86::BI__builtin_ia32_sqrtss_round_mask:
3495
16.3k
  case X86::BI__builtin_ia32_vfmaddsd3_mask:
3496
16.3k
  case X86::BI__builtin_ia32_vfmaddsd3_maskz:
3497
16.3k
  case X86::BI__builtin_ia32_vfmaddsd3_mask3:
3498
16.3k
  case X86::BI__builtin_ia32_vfmaddss3_mask:
3499
16.3k
  case X86::BI__builtin_ia32_vfmaddss3_maskz:
3500
16.3k
  case X86::BI__builtin_ia32_vfmaddss3_mask3:
3501
16.3k
  case X86::BI__builtin_ia32_vfmaddpd512_mask:
3502
16.3k
  case X86::BI__builtin_ia32_vfmaddpd512_maskz:
3503
16.3k
  case X86::BI__builtin_ia32_vfmaddpd512_mask3:
3504
16.3k
  case X86::BI__builtin_ia32_vfmsubpd512_mask3:
3505
16.3k
  case X86::BI__builtin_ia32_vfmaddps512_mask:
3506
16.3k
  case X86::BI__builtin_ia32_vfmaddps512_maskz:
3507
16.3k
  case X86::BI__builtin_ia32_vfmaddps512_mask3:
3508
16.3k
  case X86::BI__builtin_ia32_vfmsubps512_mask3:
3509
16.3k
  case X86::BI__builtin_ia32_vfmaddsubpd512_mask:
3510
16.3k
  case X86::BI__builtin_ia32_vfmaddsubpd512_maskz:
3511
16.3k
  case X86::BI__builtin_ia32_vfmaddsubpd512_mask3:
3512
16.3k
  case X86::BI__builtin_ia32_vfmsubaddpd512_mask3:
3513
16.3k
  case X86::BI__builtin_ia32_vfmaddsubps512_mask:
3514
16.3k
  case X86::BI__builtin_ia32_vfmaddsubps512_maskz:
3515
16.3k
  case X86::BI__builtin_ia32_vfmaddsubps512_mask3:
3516
16.3k
  case X86::BI__builtin_ia32_vfmsubaddps512_mask3:
3517
16.3k
    ArgNum = 4;
3518
16.3k
    HasRC = true;
3519
16.3k
    break;
3520
37.2k
  }
3521
37.2k
3522
37.2k
  llvm::APSInt Result;
3523
37.2k
3524
37.2k
  // We can't check the value of a dependent argument.
3525
37.2k
  Expr *Arg = TheCall->getArg(ArgNum);
3526
37.2k
  if (Arg->isTypeDependent() || Arg->isValueDependent())
3527
0
    return false;
3528
37.2k
3529
37.2k
  // Check constant-ness first.
3530
37.2k
  if (SemaBuiltinConstantArg(TheCall, ArgNum, Result))
3531
0
    return true;
3532
37.2k
3533
37.2k
  // Make sure rounding mode is either ROUND_CUR_DIRECTION or ROUND_NO_EXC bit
3534
37.2k
  // is set. If the intrinsic has rounding control(bits 1:0), make sure its only
3535
37.2k
  // combined with ROUND_NO_EXC.
3536
37.2k
  if (Result == 4/*ROUND_CUR_DIRECTION*/ ||
3537
37.2k
      
Result == 8707
/*ROUND_NO_EXC*/ ||
3538
37.2k
      
(389
HasRC389
&&
Result.getZExtValue() >= 8386
&&
Result.getZExtValue() <= 11386
))
3539
37.2k
    return false;
3540
3
3541
3
  return Diag(TheCall->getBeginLoc(), diag::err_x86_builtin_invalid_rounding)
3542
3
         << Arg->getSourceRange();
3543
3
}
3544
3545
// Check if the gather/scatter scale is legal.
3546
bool Sema::CheckX86BuiltinGatherScatterScale(unsigned BuiltinID,
3547
648k
                                             CallExpr *TheCall) {
3548
648k
  unsigned ArgNum = 0;
3549
648k
  switch (BuiltinID) {
3550
648k
  default:
3551
648k
    return false;
3552
648k
  case X86::BI__builtin_ia32_gatherpfdpd:
3553
18
  case X86::BI__builtin_ia32_gatherpfdps:
3554
18
  case X86::BI__builtin_ia32_gatherpfqpd:
3555
18
  case X86::BI__builtin_ia32_gatherpfqps:
3556
18
  case X86::BI__builtin_ia32_scatterpfdpd:
3557
18
  case X86::BI__builtin_ia32_scatterpfdps:
3558
18
  case X86::BI__builtin_ia32_scatterpfqpd:
3559
18
  case X86::BI__builtin_ia32_scatterpfqps:
3560
18
    ArgNum = 3;
3561
18
    break;
3562
177
  case X86::BI__builtin_ia32_gatherd_pd:
3563
177
  case X86::BI__builtin_ia32_gatherd_pd256:
3564
177
  case X86::BI__builtin_ia32_gatherq_pd:
3565
177
  case X86::BI__builtin_ia32_gatherq_pd256:
3566
177
  case X86::BI__builtin_ia32_gatherd_ps:
3567
177
  case X86::BI__builtin_ia32_gatherd_ps256:
3568
177
  case X86::BI__builtin_ia32_gatherq_ps:
3569
177
  case X86::BI__builtin_ia32_gatherq_ps256:
3570
177
  case X86::BI__builtin_ia32_gatherd_q:
3571
177
  case X86::BI__builtin_ia32_gatherd_q256:
3572
177
  case X86::BI__builtin_ia32_gatherq_q:
3573
177
  case X86::BI__builtin_ia32_gatherq_q256:
3574
177
  case X86::BI__builtin_ia32_gatherd_d:
3575
177
  case X86::BI__builtin_ia32_gatherd_d256:
3576
177
  case X86::BI__builtin_ia32_gatherq_d:
3577
177
  case X86::BI__builtin_ia32_gatherq_d256:
3578
177
  case X86::BI__builtin_ia32_gather3div2df:
3579
177
  case X86::BI__builtin_ia32_gather3div2di:
3580
177
  case X86::BI__builtin_ia32_gather3div4df:
3581
177
  case X86::BI__builtin_ia32_gather3div4di:
3582
177
  case X86::BI__builtin_ia32_gather3div4sf:
3583
177
  case X86::BI__builtin_ia32_gather3div4si:
3584
177
  case X86::BI__builtin_ia32_gather3div8sf:
3585
177
  case X86::BI__builtin_ia32_gather3div8si:
3586
177
  case X86::BI__builtin_ia32_gather3siv2df:
3587
177
  case X86::BI__builtin_ia32_gather3siv2di:
3588
177
  case X86::BI__builtin_ia32_gather3siv4df:
3589
177
  case X86::BI__builtin_ia32_gather3siv4di:
3590
177
  case X86::BI__builtin_ia32_gather3siv4sf:
3591
177
  case X86::BI__builtin_ia32_gather3siv4si:
3592
177
  case X86::BI__builtin_ia32_gather3siv8sf:
3593
177
  case X86::BI__builtin_ia32_gather3siv8si:
3594
177
  case X86::BI__builtin_ia32_gathersiv8df:
3595
177
  case X86::BI__builtin_ia32_gathersiv16sf:
3596
177
  case X86::BI__builtin_ia32_gatherdiv8df:
3597
177
  case X86::BI__builtin_ia32_gatherdiv16sf:
3598
177
  case X86::BI__builtin_ia32_gathersiv8di:
3599
177
  case X86::BI__builtin_ia32_gathersiv16si:
3600
177
  case X86::BI__builtin_ia32_gatherdiv8di:
3601
177
  case X86::BI__builtin_ia32_gatherdiv16si:
3602
177
  case X86::BI__builtin_ia32_scatterdiv2df:
3603
177
  case X86::BI__builtin_ia32_scatterdiv2di:
3604
177
  case X86::BI__builtin_ia32_scatterdiv4df:
3605
177
  case X86::BI__builtin_ia32_scatterdiv4di:
3606
177
  case X86::BI__builtin_ia32_scatterdiv4sf:
3607
177
  case X86::BI__builtin_ia32_scatterdiv4si:
3608
177
  case X86::BI__builtin_ia32_scatterdiv8sf:
3609
177
  case X86::BI__builtin_ia32_scatterdiv8si:
3610
177
  case X86::BI__builtin_ia32_scattersiv2df:
3611
177
  case X86::BI__builtin_ia32_scattersiv2di:
3612
177
  case X86::BI__builtin_ia32_scattersiv4df:
3613
177
  case X86::BI__builtin_ia32_scattersiv4di:
3614
177
  case X86::BI__builtin_ia32_scattersiv4sf:
3615
177
  case X86::BI__builtin_ia32_scattersiv4si:
3616
177
  case X86::BI__builtin_ia32_scattersiv8sf:
3617
177
  case X86::BI__builtin_ia32_scattersiv8si:
3618
177
  case X86::BI__builtin_ia32_scattersiv8df:
3619
177
  case X86::BI__builtin_ia32_scattersiv16sf:
3620
177
  case X86::BI__builtin_ia32_scatterdiv8df:
3621
177
  case X86::BI__builtin_ia32_scatterdiv16sf:
3622
177
  case X86::BI__builtin_ia32_scattersiv8di:
3623
177
  case X86::BI__builtin_ia32_scattersiv16si:
3624
177
  case X86::BI__builtin_ia32_scatterdiv8di:
3625
177
  case X86::BI__builtin_ia32_scatterdiv16si:
3626
177
    ArgNum = 4;
3627
177
    break;
3628
195
  }
3629
195
3630
195
  llvm::APSInt Result;
3631
195
3632
195
  // We can't check the value of a dependent argument.
3633
195
  Expr *Arg = TheCall->getArg(ArgNum);
3634
195
  if (Arg->isTypeDependent() || Arg->isValueDependent())
3635
0
    return false;
3636
195
3637
195
  // Check constant-ness first.
3638
195
  if (SemaBuiltinConstantArg(TheCall, ArgNum, Result))
3639
0
    return true;
3640
195
3641
195
  if (Result == 1 || 
Result == 2186
||
Result == 42
||
Result == 82
)
3642
193
    return false;
3643
2
3644
2
  return Diag(TheCall->getBeginLoc(), diag::err_x86_builtin_invalid_scale)
3645
2
         << Arg->getSourceRange();
3646
2
}
3647
3648
527k
static bool isX86_32Builtin(unsigned BuiltinID) {
3649
527k
  // These builtins only work on x86-32 targets.
3650
527k
  switch (BuiltinID) {
3651
527k
  case X86::BI__builtin_ia32_readeflags_u32:
3652
2
  case X86::BI__builtin_ia32_writeeflags_u32:
3653
2
    return true;
3654
527k
  }
3655
527k
3656
527k
  return false;
3657
527k
}
3658
3659
648k
bool Sema::CheckX86BuiltinFunctionCall(unsigned BuiltinID, CallExpr *TheCall) {
3660
648k
  if (BuiltinID == X86::BI__builtin_cpu_supports)
3661
42
    return SemaBuiltinCpuSupports(*this, TheCall);
3662
648k
3663
648k
  if (BuiltinID == X86::BI__builtin_cpu_is)
3664
46
    return SemaBuiltinCpuIs(*this, TheCall);
3665
648k
3666
648k
  // Check for 32-bit only builtins on a 64-bit target.
3667
648k
  const llvm::Triple &TT = Context.getTargetInfo().getTriple();
3668
648k
  if (TT.getArch() != llvm::Triple::x86 && 
isX86_32Builtin(BuiltinID)527k
)
3669
2
    return Diag(TheCall->getCallee()->getBeginLoc(),
3670
2
                diag::err_32_bit_builtin_64_bit_tgt);
3671
648k
3672
648k
  // If the intrinsic has rounding or SAE make sure its valid.
3673
648k
  if (CheckX86BuiltinRoundingOrSAE(BuiltinID, TheCall))
3674
3
    return true;
3675
648k
3676
648k
  // If the intrinsic has a gather/scatter scale immediate make sure its valid.
3677
648k
  if (CheckX86BuiltinGatherScatterScale(BuiltinID, TheCall))
3678
2
    return true;
3679
648k
3680
648k
  // For intrinsics which take an immediate value as part of the instruction,
3681
648k
  // range check them here.
3682
648k
  int i = 0, l = 0, u = 0;
3683
648k
  switch (BuiltinID) {
3684
648k
  default:
3685
598k
    return false;
3686
648k
  case X86::BI__builtin_ia32_vec_ext_v2si:
3687
30.7k
  case X86::BI__builtin_ia32_vec_ext_v2di:
3688
30.7k
  case X86::BI__builtin_ia32_vextractf128_pd256:
3689
30.7k
  case X86::BI__builtin_ia32_vextractf128_ps256:
3690
30.7k
  case X86::BI__builtin_ia32_vextractf128_si256:
3691
30.7k
  case X86::BI__builtin_ia32_extract128i256:
3692
30.7k
  case X86::BI__builtin_ia32_extractf64x4_mask:
3693
30.7k
  case X86::BI__builtin_ia32_extracti64x4_mask:
3694
30.7k
  case X86::BI__builtin_ia32_extractf32x8_mask:
3695
30.7k
  case X86::BI__builtin_ia32_extracti32x8_mask:
3696
30.7k
  case X86::BI__builtin_ia32_extractf64x2_256_mask:
3697
30.7k
  case X86::BI__builtin_ia32_extracti64x2_256_mask:
3698
30.7k
  case X86::BI__builtin_ia32_extractf32x4_256_mask:
3699
30.7k
  case X86::BI__builtin_ia32_extracti32x4_256_mask:
3700
30.7k
    i = 1; l = 0; u = 1;
3701
30.7k
    break;
3702
30.7k
  case X86::BI__builtin_ia32_vec_set_v2di:
3703
617
  case X86::BI__builtin_ia32_vinsertf128_pd256:
3704
617
  case X86::BI__builtin_ia32_vinsertf128_ps256:
3705
617
  case X86::BI__builtin_ia32_vinsertf128_si256:
3706
617
  case X86::BI__builtin_ia32_insert128i256:
3707
617
  case X86::BI__builtin_ia32_insertf32x8:
3708
617
  case X86::BI__builtin_ia32_inserti32x8:
3709
617
  case X86::BI__builtin_ia32_insertf64x4:
3710
617
  case X86::BI__builtin_ia32_inserti64x4:
3711
617
  case X86::BI__builtin_ia32_insertf64x2_256:
3712
617
  case X86::BI__builtin_ia32_inserti64x2_256:
3713
617
  case X86::BI__builtin_ia32_insertf32x4_256:
3714
617
  case X86::BI__builtin_ia32_inserti32x4_256:
3715
617
    i = 2; l = 0; u = 1;
3716
617
    break;
3717
617
  case X86::BI__builtin_ia32_vpermilpd:
3718
34
  case X86::BI__builtin_ia32_vec_ext_v4hi:
3719
34
  case X86::BI__builtin_ia32_vec_ext_v4si:
3720
34
  case X86::BI__builtin_ia32_vec_ext_v4sf:
3721
34
  case X86::BI__builtin_ia32_vec_ext_v4di:
3722
34
  case X86::BI__builtin_ia32_extractf32x4_mask:
3723
34
  case X86::BI__builtin_ia32_extracti32x4_mask:
3724
34
  case X86::BI__builtin_ia32_extractf64x2_512_mask:
3725
34
  case X86::BI__builtin_ia32_extracti64x2_512_mask:
3726
34
    i = 1; l = 0; u = 3;
3727
34
    break;
3728
34
  case X86::BI_mm_prefetch:
3729
11
  case X86::BI__builtin_ia32_vec_ext_v8hi:
3730
11
  case X86::BI__builtin_ia32_vec_ext_v8si:
3731
11
    i = 1; l = 0; u = 7;
3732
11
    break;
3733
46
  case X86::BI__builtin_ia32_sha1rnds4:
3734
46
  case X86::BI__builtin_ia32_blendpd:
3735
46
  case X86::BI__builtin_ia32_shufpd:
3736
46
  case X86::BI__builtin_ia32_vec_set_v4hi:
3737
46
  case X86::BI__builtin_ia32_vec_set_v4si:
3738
46
  case X86::BI__builtin_ia32_vec_set_v4di:
3739
46
  case X86::BI__builtin_ia32_shuf_f32x4_256:
3740
46
  case X86::BI__builtin_ia32_shuf_f64x2_256:
3741
46
  case X86::BI__builtin_ia32_shuf_i32x4_256:
3742
46
  case X86::BI__builtin_ia32_shuf_i64x2_256:
3743
46
  case X86::BI__builtin_ia32_insertf64x2_512:
3744
46
  case X86::BI__builtin_ia32_inserti64x2_512:
3745
46
  case X86::BI__builtin_ia32_insertf32x4:
3746
46
  case X86::BI__builtin_ia32_inserti32x4:
3747
46
    i = 2; l = 0; u = 3;
3748
46
    break;
3749
46
  case X86::BI__builtin_ia32_vpermil2pd:
3750
8
  case X86::BI__builtin_ia32_vpermil2pd256:
3751
8
  case X86::BI__builtin_ia32_vpermil2ps:
3752
8
  case X86::BI__builtin_ia32_vpermil2ps256:
3753
8
    i = 3; l = 0; u = 3;
3754
8
    break;
3755
15.0k
  case X86::BI__builtin_ia32_cmpb128_mask:
3756
15.0k
  case X86::BI__builtin_ia32_cmpw128_mask:
3757
15.0k
  case X86::BI__builtin_ia32_cmpd128_mask:
3758
15.0k
  case X86::BI__builtin_ia32_cmpq128_mask:
3759
15.0k
  case X86::BI__builtin_ia32_cmpb256_mask:
3760
15.0k
  case X86::BI__builtin_ia32_cmpw256_mask:
3761
15.0k
  case X86::BI__builtin_ia32_cmpd256_mask:
3762
15.0k
  case X86::BI__builtin_ia32_cmpq256_mask:
3763
15.0k
  case X86::BI__builtin_ia32_cmpb512_mask:
3764
15.0k
  case X86::BI__builtin_ia32_cmpw512_mask:
3765
15.0k
  case X86::BI__builtin_ia32_cmpd512_mask:
3766
15.0k
  case X86::BI__builtin_ia32_cmpq512_mask:
3767
15.0k
  case X86::BI__builtin_ia32_ucmpb128_mask:
3768
15.0k
  case X86::BI__builtin_ia32_ucmpw128_mask:
3769
15.0k
  case X86::BI__builtin_ia32_ucmpd128_mask:
3770
15.0k
  case X86::BI__builtin_ia32_ucmpq128_mask:
3771
15.0k
  case X86::BI__builtin_ia32_ucmpb256_mask:
3772
15.0k
  case X86::BI__builtin_ia32_ucmpw256_mask:
3773
15.0k
  case X86::BI__builtin_ia32_ucmpd256_mask:
3774
15.0k
  case X86::BI__builtin_ia32_ucmpq256_mask:
3775
15.0k
  case X86::BI__builtin_ia32_ucmpb512_mask:
3776
15.0k
  case X86::BI__builtin_ia32_ucmpw512_mask:
3777
15.0k
  case X86::BI__builtin_ia32_ucmpd512_mask:
3778
15.0k
  case X86::BI__builtin_ia32_ucmpq512_mask:
3779
15.0k
  case X86::BI__builtin_ia32_vpcomub:
3780
15.0k
  case X86::BI__builtin_ia32_vpcomuw:
3781
15.0k
  case X86::BI__builtin_ia32_vpcomud:
3782
15.0k
  case X86::BI__builtin_ia32_vpcomuq:
3783
15.0k
  case X86::BI__builtin_ia32_vpcomb:
3784
15.0k
  case X86::BI__builtin_ia32_vpcomw:
3785
15.0k
  case X86::BI__builtin_ia32_vpcomd:
3786
15.0k
  case X86::BI__builtin_ia32_vpcomq:
3787
15.0k
  case X86::BI__builtin_ia32_vec_set_v8hi:
3788
15.0k
  case X86::BI__builtin_ia32_vec_set_v8si:
3789
15.0k
    i = 2; l = 0; u = 7;
3790
15.0k
    break;
3791
15.0k
  case X86::BI__builtin_ia32_vpermilpd256:
3792
87
  case X86::BI__builtin_ia32_roundps:
3793
87
  case X86::BI__builtin_ia32_roundpd:
3794
87
  case X86::BI__builtin_ia32_roundps256:
3795
87
  case X86::BI__builtin_ia32_roundpd256:
3796
87
  case X86::BI__builtin_ia32_getmantpd128_mask:
3797
87
  case X86::BI__builtin_ia32_getmantpd256_mask:
3798
87
  case X86::BI__builtin_ia32_getmantps128_mask:
3799
87
  case X86::BI__builtin_ia32_getmantps256_mask:
3800
87
  case X86::BI__builtin_ia32_getmantpd512_mask:
3801
87
  case X86::BI__builtin_ia32_getmantps512_mask:
3802
87
  case X86::BI__builtin_ia32_vec_ext_v16qi:
3803
87
  case X86::BI__builtin_ia32_vec_ext_v16hi:
3804
87
    i = 1; l = 0; u = 15;
3805
87
    break;
3806
87
  case X86::BI__builtin_ia32_pblendd128:
3807
79
  case X86::BI__builtin_ia32_blendps:
3808
79
  case X86::BI__builtin_ia32_blendpd256:
3809
79
  case X86::BI__builtin_ia32_shufpd256:
3810
79
  case X86::BI__builtin_ia32_roundss:
3811
79
  case X86::BI__builtin_ia32_roundsd:
3812
79
  case X86::BI__builtin_ia32_rangepd128_mask:
3813
79
  case X86::BI__builtin_ia32_rangepd256_mask:
3814
79
  case X86::BI__builtin_ia32_rangepd512_mask:
3815
79
  case X86::BI__builtin_ia32_rangeps128_mask:
3816
79
  case X86::BI__builtin_ia32_rangeps256_mask:
3817
79
  case X86::BI__builtin_ia32_rangeps512_mask:
3818
79
  case X86::BI__builtin_ia32_getmantsd_round_mask:
3819
79
  case X86::BI__builtin_ia32_getmantss_round_mask:
3820
79
  case X86::BI__builtin_ia32_vec_set_v16qi:
3821
79
  case X86::BI__builtin_ia32_vec_set_v16hi:
3822
79
    i = 2; l = 0; u = 15;
3823
79
    break;
3824
79
  case X86::BI__builtin_ia32_vec_ext_v32qi:
3825
3
    i = 1; l = 0; u = 31;
3826
3
    break;
3827
1.11k
  case X86::BI__builtin_ia32_cmpps:
3828
1.11k
  case X86::BI__builtin_ia32_cmpss:
3829
1.11k
  case X86::BI__builtin_ia32_cmppd:
3830
1.11k
  case X86::BI__builtin_ia32_cmpsd:
3831
1.11k
  case X86::BI__builtin_ia32_cmpps256:
3832
1.11k
  case X86::BI__builtin_ia32_cmppd256:
3833
1.11k
  case X86::BI__builtin_ia32_cmpps128_mask:
3834
1.11k
  case X86::BI__builtin_ia32_cmppd128_mask:
3835
1.11k
  case X86::BI__builtin_ia32_cmpps256_mask:
3836
1.11k
  case X86::BI__builtin_ia32_cmppd256_mask:
3837
1.11k
  case X86::BI__builtin_ia32_cmpps512_mask:
3838
1.11k
  case X86::BI__builtin_ia32_cmppd512_mask:
3839
1.11k
  case X86::BI__builtin_ia32_cmpsd_mask:
3840
1.11k
  case X86::BI__builtin_ia32_cmpss_mask:
3841
1.11k
  case X86::BI__builtin_ia32_vec_set_v32qi:
3842
1.11k
    i = 2; l = 0; u = 31;
3843
1.11k
    break;
3844
1.81k
  case X86::BI__builtin_ia32_permdf256:
3845
1.81k
  case X86::BI__builtin_ia32_permdi256:
3846
1.81k
  case X86::BI__builtin_ia32_permdf512:
3847
1.81k
  case X86::BI__builtin_ia32_permdi512:
3848
1.81k
  case X86::BI__builtin_ia32_vpermilps:
3849
1.81k
  case X86::BI__builtin_ia32_vpermilps256:
3850
1.81k
  case X86::BI__builtin_ia32_vpermilpd512:
3851
1.81k
  case X86::BI__builtin_ia32_vpermilps512:
3852
1.81k
  case X86::BI__builtin_ia32_pshufd:
3853
1.81k
  case X86::BI__builtin_ia32_pshufd256:
3854
1.81k
  case X86::BI__builtin_ia32_pshufd512:
3855
1.81k
  case X86::BI__builtin_ia32_pshufhw:
3856
1.81k
  case X86::BI__builtin_ia32_pshufhw256:
3857
1.81k
  case X86::BI__builtin_ia32_pshufhw512:
3858
1.81k
  case X86::BI__builtin_ia32_pshuflw:
3859
1.81k
  case X86::BI__builtin_ia32_pshuflw256:
3860
1.81k
  case X86::BI__builtin_ia32_pshuflw512:
3861
1.81k
  case X86::BI__builtin_ia32_vcvtps2ph:
3862
1.81k
  case X86::BI__builtin_ia32_vcvtps2ph_mask:
3863
1.81k
  case X86::BI__builtin_ia32_vcvtps2ph256:
3864
1.81k
  case X86::BI__builtin_ia32_vcvtps2ph256_mask:
3865
1.81k
  case X86::BI__builtin_ia32_vcvtps2ph512_mask:
3866
1.81k
  case X86::BI__builtin_ia32_rndscaleps_128_mask:
3867
1.81k
  case X86::BI__builtin_ia32_rndscalepd_128_mask:
3868
1.81k
  case X86::BI__builtin_ia32_rndscaleps_256_mask:
3869
1.81k
  case X86::BI__builtin_ia32_rndscalepd_256_mask:
3870
1.81k
  case X86::BI__builtin_ia32_rndscaleps_mask:
3871
1.81k
  case X86::BI__builtin_ia32_rndscalepd_mask:
3872
1.81k
  case X86::BI__builtin_ia32_reducepd128_mask:
3873
1.81k
  case X86::BI__builtin_ia32_reducepd256_mask:
3874
1.81k
  case X86::BI__builtin_ia32_reducepd512_mask:
3875
1.81k
  case X86::BI__builtin_ia32_reduceps128_mask:
3876
1.81k
  case X86::BI__builtin_ia32_reduceps256_mask:
3877
1.81k
  case X86::BI__builtin_ia32_reduceps512_mask:
3878
1.81k
  case X86::BI__builtin_ia32_prold512:
3879
1.81k
  case X86::BI__builtin_ia32_prolq512:
3880
1.81k
  case X86::BI__builtin_ia32_prold128:
3881
1.81k
  case X86::BI__builtin_ia32_prold256:
3882
1.81k
  case X86::BI__builtin_ia32_prolq128:
3883
1.81k
  case X86::BI__builtin_ia32_prolq256:
3884
1.81k
  case X86::BI__builtin_ia32_prord512:
3885
1.81k
  case X86::BI__builtin_ia32_prorq512:
3886
1.81k
  case X86::BI__builtin_ia32_prord128:
3887
1.81k
  case X86::BI__builtin_ia32_prord256:
3888
1.81k
  case X86::BI__builtin_ia32_prorq128:
3889
1.81k
  case X86::BI__builtin_ia32_prorq256:
3890
1.81k
  case X86::BI__builtin_ia32_fpclasspd128_mask:
3891
1.81k
  case X86::BI__builtin_ia32_fpclasspd256_mask:
3892
1.81k
  case X86::BI__builtin_ia32_fpclassps128_mask:
3893
1.81k
  case X86::BI__builtin_ia32_fpclassps256_mask:
3894
1.81k
  case X86::BI__builtin_ia32_fpclassps512_mask:
3895
1.81k
  case X86::BI__builtin_ia32_fpclasspd512_mask:
3896
1.81k
  case X86::BI__builtin_ia32_fpclasssd_mask:
3897
1.81k
  case X86::BI__builtin_ia32_fpclassss_mask:
3898
1.81k
  case X86::BI__builtin_ia32_pslldqi128_byteshift:
3899
1.81k
  case X86::BI__builtin_ia32_pslldqi256_byteshift:
3900
1.81k
  case X86::BI__builtin_ia32_pslldqi512_byteshift:
3901
1.81k
  case X86::BI__builtin_ia32_psrldqi128_byteshift:
3902
1.81k
  case X86::BI__builtin_ia32_psrldqi256_byteshift:
3903
1.81k
  case X86::BI__builtin_ia32_psrldqi512_byteshift:
3904
1.81k
  case X86::BI__builtin_ia32_kshiftliqi:
3905
1.81k
  case X86::BI__builtin_ia32_kshiftlihi:
3906
1.81k
  case X86::BI__builtin_ia32_kshiftlisi:
3907
1.81k
  case X86::BI__builtin_ia32_kshiftlidi:
3908
1.81k
  case X86::BI__builtin_ia32_kshiftriqi:
3909
1.81k
  case X86::BI__builtin_ia32_kshiftrihi:
3910
1.81k
  case X86::BI__builtin_ia32_kshiftrisi:
3911
1.81k
  case X86::BI__builtin_ia32_kshiftridi:
3912
1.81k
    i = 1; l = 0; u = 255;
3913
1.81k
    break;
3914
1.81k
  case X86::BI__builtin_ia32_vperm2f128_pd256:
3915
253
  case X86::BI__builtin_ia32_vperm2f128_ps256:
3916
253
  case X86::BI__builtin_ia32_vperm2f128_si256:
3917
253
  case X86::BI__builtin_ia32_permti256:
3918
253
  case X86::BI__builtin_ia32_pblendw128:
3919
253
  case X86::BI__builtin_ia32_pblendw256:
3920
253
  case X86::BI__builtin_ia32_blendps256:
3921
253
  case X86::BI__builtin_ia32_pblendd256:
3922
253
  case X86::BI__builtin_ia32_palignr128:
3923
253
  case X86::BI__builtin_ia32_palignr256:
3924
253
  case X86::BI__builtin_ia32_palignr512:
3925
253
  case X86::BI__builtin_ia32_alignq512:
3926
253
  case X86::BI__builtin_ia32_alignd512:
3927
253
  case X86::BI__builtin_ia32_alignd128:
3928
253
  case X86::BI__builtin_ia32_alignd256:
3929
253
  case X86::BI__builtin_ia32_alignq128:
3930
253
  case X86::BI__builtin_ia32_alignq256:
3931
253
  case X86::BI__builtin_ia32_vcomisd:
3932
253
  case X86::BI__builtin_ia32_vcomiss:
3933
253
  case X86::BI__builtin_ia32_shuf_f32x4:
3934
253
  case X86::BI__builtin_ia32_shuf_f64x2:
3935
253
  case X86::BI__builtin_ia32_shuf_i32x4:
3936
253
  case X86::BI__builtin_ia32_shuf_i64x2:
3937
253
  case X86::BI__builtin_ia32_shufpd512:
3938
253
  case X86::BI__builtin_ia32_shufps:
3939
253
  case X86::BI__builtin_ia32_shufps256:
3940
253
  case X86::BI__builtin_ia32_shufps512:
3941
253
  case X86::BI__builtin_ia32_dbpsadbw128:
3942
253
  case X86::BI__builtin_ia32_dbpsadbw256:
3943
253
  case X86::BI__builtin_ia32_dbpsadbw512:
3944
253
  case X86::BI__builtin_ia32_vpshldd128:
3945
253
  case X86::BI__builtin_ia32_vpshldd256:
3946
253
  case X86::BI__builtin_ia32_vpshldd512:
3947
253
  case X86::BI__builtin_ia32_vpshldq128:
3948
253
  case X86::BI__builtin_ia32_vpshldq256:
3949
253
  case X86::BI__builtin_ia32_vpshldq512:
3950
253
  case X86::BI__builtin_ia32_vpshldw128:
3951
253
  case X86::BI__builtin_ia32_vpshldw256:
3952
253
  case X86::BI__builtin_ia32_vpshldw512:
3953
253
  case X86::BI__builtin_ia32_vpshrdd128:
3954
253
  case X86::BI__builtin_ia32_vpshrdd256:
3955
253
  case X86::BI__builtin_ia32_vpshrdd512:
3956
253
  case X86::BI__builtin_ia32_vpshrdq128:
3957
253
  case X86::BI__builtin_ia32_vpshrdq256:
3958
253
  case X86::BI__builtin_ia32_vpshrdq512:
3959
253
  case X86::BI__builtin_ia32_vpshrdw128:
3960
253
  case X86::BI__builtin_ia32_vpshrdw256:
3961
253
  case X86::BI__builtin_ia32_vpshrdw512:
3962
253
    i = 2; l = 0; u = 255;
3963
253
    break;
3964
253
  case X86::BI__builtin_ia32_fixupimmpd512_mask:
3965
84
  case X86::BI__builtin_ia32_fixupimmpd512_maskz:
3966
84
  case X86::BI__builtin_ia32_fixupimmps512_mask:
3967
84
  case X86::BI__builtin_ia32_fixupimmps512_maskz:
3968
84
  case X86::BI__builtin_ia32_fixupimmsd_mask:
3969
84
  case X86::BI__builtin_ia32_fixupimmsd_maskz:
3970
84
  case X86::BI__builtin_ia32_fixupimmss_mask:
3971
84
  case X86::BI__builtin_ia32_fixupimmss_maskz:
3972
84
  case X86::BI__builtin_ia32_fixupimmpd128_mask:
3973
84
  case X86::BI__builtin_ia32_fixupimmpd128_maskz:
3974
84
  case X86::BI__builtin_ia32_fixupimmpd256_mask:
3975
84
  case X86::BI__builtin_ia32_fixupimmpd256_maskz:
3976
84
  case X86::BI__builtin_ia32_fixupimmps128_mask:
3977
84
  case X86::BI__builtin_ia32_fixupimmps128_maskz:
3978
84
  case X86::BI__builtin_ia32_fixupimmps256_mask:
3979
84
  case X86::BI__builtin_ia32_fixupimmps256_maskz:
3980
84
  case X86::BI__builtin_ia32_pternlogd512_mask:
3981
84
  case X86::BI__builtin_ia32_pternlogd512_maskz:
3982
84
  case X86::BI__builtin_ia32_pternlogq512_mask:
3983
84
  case X86::BI__builtin_ia32_pternlogq512_maskz:
3984
84
  case X86::BI__builtin_ia32_pternlogd128_mask:
3985
84
  case X86::BI__builtin_ia32_pternlogd128_maskz:
3986
84
  case X86::BI__builtin_ia32_pternlogd256_mask:
3987
84
  case X86::BI__builtin_ia32_pternlogd256_maskz:
3988
84
  case X86::BI__builtin_ia32_pternlogq128_mask:
3989
84
  case X86::BI__builtin_ia32_pternlogq128_maskz:
3990
84
  case X86::BI__builtin_ia32_pternlogq256_mask:
3991
84
  case X86::BI__builtin_ia32_pternlogq256_maskz:
3992
84
    i = 3; l = 0; u = 255;
3993
84
    break;
3994
84
  case X86::BI__builtin_ia32_gatherpfdpd:
3995
17
  case X86::BI__builtin_ia32_gatherpfdps:
3996
17
  case X86::BI__builtin_ia32_gatherpfqpd:
3997
17
  case X86::BI__builtin_ia32_gatherpfqps:
3998
17
  case X86::BI__builtin_ia32_scatterpfdpd:
3999
17
  case X86::BI__builtin_ia32_scatterpfdps:
4000
17
  case X86::BI__builtin_ia32_scatterpfqpd:
4001
17
  case X86::BI__builtin_ia32_scatterpfqps:
4002
17
    i = 4; l = 2; u = 3;
4003
17
    break;
4004
34
  case X86::BI__builtin_ia32_reducesd_mask:
4005
34
  case X86::BI__builtin_ia32_reducess_mask:
4006
34
  case X86::BI__builtin_ia32_rndscalesd_round_mask:
4007
34
  case X86::BI__builtin_ia32_rndscaless_round_mask:
4008
34
    i = 4; l = 0; u = 255;
4009
34
    break;
4010
50.0k
  }
4011
50.0k
4012
50.0k
  // Note that we don't force a hard error on the range check here, allowing
4013
50.0k
  // template-generated or macro-generated dead code to potentially have out-of-
4014
50.0k
  // range values. These need to code generate, but don't need to necessarily
4015
50.0k
  // make any sense. We use a warning that defaults to an error.
4016
50.0k
  return SemaBuiltinConstantArgRange(TheCall, i, l, u, /*RangeIsError*/ false);
4017
50.0k
}
4018
4019
/// Given a FunctionDecl's FormatAttr, attempts to populate the FomatStringInfo
4020
/// parameter with the FormatAttr's correct format_idx and firstDataArg.
4021
/// Returns true when the format fits the function and the FormatStringInfo has
4022
/// been populated.
4023
bool Sema::getFormatStringInfo(const FormatAttr *Format, bool IsCXXMember,
4024
42.8k
                               FormatStringInfo *FSI) {
4025
42.8k
  FSI->HasVAListArg = Format->getFirstArg() == 0;
4026
42.8k
  FSI->FormatIdx = Format->getFormatIdx() - 1;
4027
42.8k
  FSI->FirstDataArg = FSI->HasVAListArg ? 
0262
:
Format->getFirstArg() - 142.5k
;
4028
42.8k
4029
42.8k
  // The way the format attribute works in GCC, the implicit this argument
4030
42.8k
  // of member functions is counted. However, it doesn't appear in our own
4031
42.8k
  // lists, so decrement format_idx in that case.
4032
42.8k
  if (IsCXXMember) {
4033
17
    if(FSI->FormatIdx == 0)
4034
0
      return false;
4035
17
    --FSI->FormatIdx;
4036
17
    if (FSI->FirstDataArg != 0)
4037
17
      --FSI->FirstDataArg;
4038
17
  }
4039
42.8k
  return true;
4040
42.8k
}
4041
4042
/// Checks if a the given expression evaluates to null.
4043
///
4044
/// Returns true if the value evaluates to null.
4045
16.0k
static bool CheckNonNullExpr(Sema &S, const Expr *Expr) {
4046
16.0k
  // If the expression has non-null type, it doesn't evaluate to null.
4047
16.0k
  if (auto nullability
4048
336
        = Expr->IgnoreImplicit()->getType()->getNullability(S.Context)) {
4049
336
    if (*nullability == NullabilityKind::NonNull)
4050
312
      return false;
4051
15.7k
  }
4052
15.7k
4053
15.7k
  // As a special case, transparent unions initialized with zero are
4054
15.7k
  // considered null for the purposes of the nonnull attribute.
4055
15.7k
  if (const RecordType *UT = Expr->getType()->getAsUnionType()) {
4056
14
    if (UT->getDecl()->hasAttr<TransparentUnionAttr>())
4057
14
      if (const CompoundLiteralExpr *CLE =
4058
13
          dyn_cast<CompoundLiteralExpr>(Expr))
4059
13
        if (const InitListExpr *ILE =
4060
13
            dyn_cast<InitListExpr>(CLE->getInitializer()))
4061
13
          Expr = ILE->getInit(0);
4062
14
  }
4063
15.7k
4064
15.7k
  bool Result;
4065
15.7k
  return (!Expr->isValueDependent() &&
4066
15.7k
          
Expr->EvaluateAsBooleanCondition(Result, S.Context)15.7k
&&
4067
15.7k
          
!Result928
);
4068
15.7k
}
4069
4070
static void CheckNonNullArgument(Sema &S,
4071
                                 const Expr *ArgExpr,
4072
11.7k
                                 SourceLocation CallSiteLoc) {
4073
11.7k
  if (CheckNonNullExpr(S, ArgExpr))
4074
192
    S.DiagRuntimeBehavior(CallSiteLoc, ArgExpr,
4075
192
                          S.PDiag(diag::warn_null_arg)
4076
192
                              << ArgExpr->getSourceRange());
4077
11.7k
}
4078
4079
1.16k
bool Sema::GetFormatNSStringIdx(const FormatAttr *Format, unsigned &Idx) {
4080
1.16k
  FormatStringInfo FSI;
4081
1.16k
  if ((GetFormatStringType(Format) == FST_NSString) &&
4082
1.16k
      
getFormatStringInfo(Format, false, &FSI)337
) {
4083
337
    Idx = FSI.FormatIdx;
4084
337
    return true;
4085
337
  }
4086
829
  return false;
4087
829
}
4088
4089
/// Diagnose use of %s directive in an NSString which is being passed
4090
/// as formatting string to formatting method.
4091
static void
4092
DiagnoseCStringFormatDirectiveInCFAPI(Sema &S,
4093
                                        const NamedDecl *FDecl,
4094
                                        Expr **Args,
4095
27.0k
                                        unsigned NumArgs) {
4096
27.0k
  unsigned Idx = 0;
4097
27.0k
  bool Format = false;
4098
27.0k
  ObjCStringFormatFamily SFFamily = FDecl->getObjCFStringFormattingFamily();
4099
27.0k
  if (SFFamily == ObjCStringFormatFamily::SFF_CFString) {
4100
24
    Idx = 2;
4101
24
    Format = true;
4102
24
  }
4103
27.0k
  else
4104
27.0k
    for (const auto *I : FDecl->specific_attrs<FormatAttr>()) {
4105
1.15k
      if (S.GetFormatNSStringIdx(I, Idx)) {
4106
323
        Format = true;
4107
323
        break;
4108
323
      }
4109
1.15k
    }
4110
27.0k
  if (!Format || 
NumArgs <= Idx347
)
4111
26.7k
    return;
4112
343
  const Expr *FormatExpr = Args[Idx];
4113
343
  if (const CStyleCastExpr *CSCE = dyn_cast<CStyleCastExpr>(FormatExpr))
4114
9
    FormatExpr = CSCE->getSubExpr();
4115
343
  const StringLiteral *FormatString;
4116
343
  if (const ObjCStringLiteral *OSL =
4117
315
      dyn_cast<ObjCStringLiteral>(FormatExpr->IgnoreParenImpCasts()))
4118
315
    FormatString = OSL->getString();
4119
28
  else
4120
28
    FormatString = dyn_cast<StringLiteral>(FormatExpr->IgnoreParenImpCasts());
4121
343
  if (!FormatString)
4122
26
    return;
4123
317
  if (S.FormatStringHasSArg(FormatString)) {
4124
55
    S.Diag(FormatExpr->getExprLoc(), diag::warn_objc_cdirective_format_string)
4125
55
      << "%s" << 1 << 1;
4126
55
    S.Diag(FDecl->getLocation(), diag::note_entity_declared_at)
4127
55
      << FDecl->getDeclName();
4128
55
  }
4129
317
}
4130
4131
/// Determine whether the given type has a non-null nullability annotation.
4132
7.94M
static bool isNonNullType(ASTContext &ctx, QualType type) {
4133
7.94M
  if (auto nullability = type->getNullability(ctx))
4134
10.2k
    return *nullability == NullabilityKind::NonNull;
4135
7.93M
4136
7.93M
  return false;
4137
7.93M
}
4138
4139
static void CheckNonNullArguments(Sema &S,
4140
                                  const NamedDecl *FDecl,
4141
                                  const FunctionProtoType *Proto,
4142
                                  ArrayRef<const Expr *> Args,
4143
3.79M
                                  SourceLocation CallSiteLoc) {
4144
3.79M
  assert((FDecl || Proto) && "Need a function declaration or prototype");
4145
3.79M
4146
3.79M
  // Already checked by by constant evaluator.
4147
3.79M
  if (S.isConstantEvaluated())
4148
5.23k
    return;
4149
3.78M
  // Check the attributes attached to the method/function itself.
4150
3.78M
  llvm::SmallBitVector NonNullArgs;
4151
3.78M
  if (FDecl) {
4152
3.78M
    // Handle the nonnull attribute on the function/method declaration itself.
4153
3.78M
    for (const auto *NonNull : FDecl->specific_attrs<NonNullAttr>()) {
4154
378
      if (!NonNull->args_size()) {
4155
148
        // Easy case: all pointer arguments are nonnull.
4156
148
        for (const auto *Arg : Args)
4157
263
          if (S.isValidPointerAttrType(Arg->getType()))
4158
227
            CheckNonNullArgument(S, Arg, CallSiteLoc);
4159
148
        return;
4160
148
      }
4161
230
4162
247
      
for (const ParamIdx &Idx : NonNull->args())230
{
4163
247
        unsigned IdxAST = Idx.getASTIndex();
4164
247
        if (IdxAST >= Args.size())
4165
2
          continue;
4166
245
        if (NonNullArgs.empty())
4167
141
          NonNullArgs.resize(Args.size());
4168
245
        NonNullArgs.set(IdxAST);
4169
245
      }
4170
230
    }
4171
3.78M
  }
4172
3.78M
4173
3.78M
  
if (3.78M
FDecl3.78M
&&
(3.78M
isa<FunctionDecl>(FDecl)3.78M
||
isa<ObjCMethodDecl>(FDecl)16.4k
)) {
4174
3.77M
    // Handle the nonnull attribute on the parameters of the
4175
3.77M
    // function/method.
4176
3.77M
    ArrayRef<ParmVarDecl*> parms;
4177
3.77M
    if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(FDecl))
4178
3.76M
      parms = FD->parameters();
4179
12.8k
    else
4180
12.8k
      parms = cast<ObjCMethodDecl>(FDecl)->parameters();
4181
3.77M
4182
3.77M
    unsigned ParamIndex = 0;
4183
3.77M
    for (ArrayRef<ParmVarDecl*>::iterator I = parms.begin(), E = parms.end();
4184
9.61M
         I != E; 
++I, ++ParamIndex5.83M
) {
4185
5.83M
      const ParmVarDecl *PVD = *I;
4186
5.83M
      if (PVD->hasAttr<NonNullAttr>() ||
4187
5.83M
          
isNonNullType(S.Context, PVD->getType())5.83M
) {
4188
7.52k
        if (NonNullArgs.empty())
4189
6.37k
          NonNullArgs.resize(Args.size());
4190
7.52k
4191
7.52k
        NonNullArgs.set(ParamIndex);
4192
7.52k
      }
4193
5.83M
    }
4194
3.77M
  } else {
4195
7.25k
    // If we have a non-function, non-method declaration but no
4196
7.25k
    // function prototype, try to dig out the function prototype.
4197
7.25k
    if (!Proto) {
4198
119
      if (const ValueDecl *VD = dyn_cast<ValueDecl>(FDecl)) {
4199
119
        QualType type = VD->getType().getNonReferenceType();
4200
119
        if (auto pointerType = type->getAs<PointerType>())
4201
55
          type = pointerType->getPointeeType();
4202
64
        else if (auto blockType = type->getAs<BlockPointerType>())
4203
64
          type = blockType->getPointeeType();
4204
119
        // FIXME: data member pointers?
4205
119
4206
119
        // Dig out the function prototype, if there is one.
4207
119
        Proto = type->getAs<FunctionProtoType>();
4208
119
      }
4209
119
    }
4210
7.25k
4211
7.25k
    // Fill in non-null argument information from the nullability
4212
7.25k
    // information on the parameter types (if we have them).
4213
7.25k
    if (Proto) {
4214
7.13k
      unsigned Index = 0;
4215
11.7k
      for (auto paramType : Proto->getParamTypes()) {
4216
11.7k
        if (isNonNullType(S.Context, paramType)) {
4217
18
          if (NonNullArgs.empty())
4218
18
            NonNullArgs.resize(Args.size());
4219
18
4220
18
          NonNullArgs.set(Index);
4221
18
        }
4222
11.7k
4223
11.7k
        ++Index;
4224
11.7k
      }
4225
7.13k
    }
4226
7.25k
  }
4227
3.78M
4228
3.78M
  // Check for non-null arguments.
4229
3.78M
  for (unsigned ArgIndex = 0, ArgIndexEnd = NonNullArgs.size();
4230
3.79M
       ArgIndex != ArgIndexEnd; 
++ArgIndex9.83k
) {
4231
9.83k
    if (NonNullArgs[ArgIndex])
4232
7.64k
      CheckNonNullArgument(S, Args[ArgIndex], CallSiteLoc);
4233
9.83k
  }
4234
3.78M
}
4235
4236
/// Handles the checks for format strings, non-POD arguments to vararg
4237
/// functions, NULL arguments passed to non-NULL parameters, and diagnose_if
4238
/// attributes.
4239
void Sema::checkCall(NamedDecl *FDecl, const FunctionProtoType *Proto,
4240
                     const Expr *ThisArg, ArrayRef<const Expr *> Args,
4241
                     bool IsMemberFunction, SourceLocation Loc,
4242
4.33M
                     SourceRange Range, VariadicCallType CallType) {
4243
4.33M
  // FIXME: We should check as much as we can in the template definition.
4244
4.33M
  if (CurContext->isDependentContext())
4245
547k
    return;
4246
3.79M
4247
3.79M
  // Printf and scanf checking.
4248
3.79M
  llvm::SmallBitVector CheckedVarArgs;
4249
3.79M
  if (FDecl) {
4250
3.78M
    for (const auto *I : FDecl->specific_attrs<FormatAttr>()) {
4251
42.4k
      // Only create vector if there are format attributes.
4252
42.4k
      CheckedVarArgs.resize(Args.size());
4253
42.4k
4254
42.4k
      CheckFormatArguments(I, Args, IsMemberFunction, CallType, Loc, Range,
4255
42.4k
                           CheckedVarArgs);
4256
42.4k
    }
4257
3.78M
  }
4258
3.79M
4259
3.79M
  // Refuse POD arguments that weren't caught by the format string
4260
3.79M
  // checks above.
4261
3.79M
  auto *FD = dyn_cast_or_null<FunctionDecl>(FDecl);
4262
3.79M
  if (CallType != VariadicDoesNotApply &&
4263
3.79M
      
(65.7k
!FD65.7k
||
FD->getBuiltinID() != Builtin::BI__noop65.2k
)) {
4264
65.7k
    unsigned NumParams = Proto ? 
Proto->getNumParams()65.4k
4265
65.7k
                       : 
FDecl248
&&
isa<FunctionDecl>(FDecl)248
4266
248
                           ? 
cast<FunctionDecl>(FDecl)->getNumParams()0
4267
248
                       : FDecl && isa<ObjCMethodDecl>(FDecl)
4268
248
                           ? cast<ObjCMethodDecl>(FDecl)->param_size()
4269
248
                       : 
00
;
4270
65.7k
4271
154k
    for (unsigned ArgIdx = NumParams; ArgIdx < Args.size(); 
++ArgIdx88.3k
) {
4272
88.3k
      // Args[ArgIdx] can be null in malformed code.
4273
88.3k
      if (const Expr *Arg = Args[ArgIdx]) {
4274
88.3k
        if (CheckedVarArgs.empty() || 
!CheckedVarArgs[ArgIdx]57.9k
)
4275
88.0k
          checkVariadicArgument(Arg, CallType);
4276
88.3k
      }
4277
88.3k
    }
4278
65.7k
  }
4279
3.79M
4280
3.79M
  if (FDecl || 
Proto3.76k
) {
4281
3.79M
    CheckNonNullArguments(*this, FDecl, Proto, Args, Loc);
4282
3.79M
4283
3.79M
    // Type safety checking.
4284
3.79M
    if (FDecl) {
4285
3.78M
      for (const auto *I : FDecl->specific_attrs<ArgumentWithTypeTagAttr>())
4286
404
        CheckArgumentWithTypeTag(I, Args, Loc);
4287
3.78M
    }
4288
3.79M
  }
4289
3.79M
4290
3.79M
  if (FD)
4291
3.77M
    diagnoseArgDependentDiagnoseIfAttrs(FD, ThisArg, Args, Loc);
4292
3.79M
}
4293
4294
/// CheckConstructorCall - Check a constructor call for correctness and safety
4295
/// properties not enforced by the C type system.
4296
void Sema::CheckConstructorCall(FunctionDecl *FDecl,
4297
                                ArrayRef<const Expr *> Args,
4298
                                const FunctionProtoType *Proto,
4299
420k
                                SourceLocation Loc) {
4300
420k
  VariadicCallType CallType =
4301
420k
    Proto->isVariadic() ? 
VariadicConstructor98
:
VariadicDoesNotApply420k
;
4302
420k
  checkCall(FDecl, Proto, /*ThisArg=*/nullptr, Args, /*IsMemberFunction=*/true,
4303
420k
            Loc, SourceRange(), CallType);
4304
420k
}
4305
4306
/// CheckFunctionCall - Check a direct function call for various correctness
4307
/// and safety properties not strictly enforced by the C type system.
4308
bool Sema::CheckFunctionCall(FunctionDecl *FDecl, CallExpr *TheCall,
4309
3.81M
                             const FunctionProtoType *Proto) {
4310
3.81M
  bool IsMemberOperatorCall = isa<CXXOperatorCallExpr>(TheCall) &&
4311
3.81M
                              
isa<CXXMethodDecl>(FDecl)69.5k
;
4312
3.81M
  bool IsMemberFunction = isa<CXXMemberCallExpr>(TheCall) ||
4313
3.81M
                          
IsMemberOperatorCall3.25M
;
4314
3.81M
  VariadicCallType CallType = getVariadicCallType(FDecl, Proto,
4315
3.81M
                                                  TheCall->getCallee());
4316
3.81M
  Expr** Args = TheCall->getArgs();
4317
3.81M
  unsigned NumArgs = TheCall->getNumArgs();
4318
3.81M
4319
3.81M
  Expr *ImplicitThis = nullptr;
4320
3.81M
  if (IsMemberOperatorCall) {
4321
68.9k
    // If this is a call to a member operator, hide the first argument
4322
68.9k
    // from checkCall.
4323
68.9k
    // FIXME: Our choice of AST representation here is less than ideal.
4324
68.9k
    ImplicitThis = Args[0];
4325
68.9k
    ++Args;
4326
68.9k
    --NumArgs;
4327
3.74M
  } else if (IsMemberFunction)
4328
563k
    ImplicitThis =
4329
563k
        cast<CXXMemberCallExpr>(TheCall)->getImplicitObjectArgument();
4330
3.81M
4331
3.81M
  checkCall(FDecl, Proto, ImplicitThis, llvm::makeArrayRef(Args, NumArgs),
4332
3.81M
            IsMemberFunction, TheCall->getRParenLoc(),
4333
3.81M
            TheCall->getCallee()->getSourceRange(), CallType);
4334
3.81M
4335
3.81M
  IdentifierInfo *FnInfo = FDecl->getIdentifier();
4336
3.81M
  // None of the checks below are needed for functions that don't have
4337
3.81M
  // simple names (e.g., C++ conversion functions).
4338
3.81M
  if (!FnInfo)
4339
106k
    return false;
4340
3.71M
4341
3.71M
  CheckAbsoluteValueFunction(TheCall, FDecl);
4342
3.71M
  CheckMaxUnsignedZero(TheCall, FDecl);
4343
3.71M
4344
3.71M
  if (getLangOpts().ObjC)
4345
27.0k
    DiagnoseCStringFormatDirectiveInCFAPI(*this, FDecl, Args, NumArgs);
4346
3.71M
4347
3.71M
  unsigned CMId = FDecl->getMemoryFunctionKind();
4348
3.71M
  if (CMId == 0)
4349
3.69M
    return false;
4350
13.2k
4351
13.2k
  // Handle memory setting and copying functions.
4352
13.2k
  if (CMId == Builtin::BIstrlcpy || 
CMId == Builtin::BIstrlcat13.1k
)
4353
135
    CheckStrlcpycatArguments(TheCall, FnInfo);
4354
13.0k
  else if (CMId == Builtin::BIstrncat)
4355
204
    CheckStrncatArguments(TheCall, FnInfo);
4356
12.8k
  else
4357
12.8k
    CheckMemaccessArguments(TheCall, CMId, FnInfo);
4358
13.2k
4359
13.2k
  return false;
4360
13.2k
}
4361
4362
bool Sema::CheckObjCMethodCall(ObjCMethodDecl *Method, SourceLocation lbrac,
4363
12.9k
                               ArrayRef<const Expr *> Args) {
4364
12.9k
  VariadicCallType CallType =
4365
12.9k
      Method->isVariadic() ? 
VariadicMethod254
:
VariadicDoesNotApply12.6k
;
4366
12.9k
4367
12.9k
  checkCall(Method, nullptr, /*ThisArg=*/nullptr, Args,
4368
12.9k
            /*IsMemberFunction=*/false, lbrac, Method->getSourceRange(),
4369
12.9k
            CallType);
4370
12.9k
4371
12.9k
  return false;
4372
12.9k
}
4373
4374
bool Sema::CheckPointerCall(NamedDecl *NDecl, CallExpr *TheCall,
4375
6.14k
                            const FunctionProtoType *Proto) {
4376
6.14k
  QualType Ty;
4377
6.14k
  if (const auto *V = dyn_cast<VarDecl>(NDecl))
4378
5.13k
    Ty = V->getType().getNonReferenceType();
4379
1.01k
  else if (const auto *F = dyn_cast<FieldDecl>(NDecl))
4380
981
    Ty = F->getType().getNonReferenceType();
4381
32
  else
4382
32
    return false;
4383
6.11k
4384
6.11k
  if (!Ty->isBlockPointerType() && 
!Ty->isFunctionPointerType()5.39k
&&
4385
6.11k
      
!Ty->isFunctionProtoType()7
)
4386
0
    return false;
4387
6.11k
4388
6.11k
  VariadicCallType CallType;
4389
6.11k
  if (!Proto || 
!Proto->isVariadic()5.99k
) {
4390
5.96k
    CallType = VariadicDoesNotApply;
4391
5.96k
  } else 
if (152
Ty->isBlockPointerType()152
) {
4392
35
    CallType = VariadicBlock;
4393
117
  } else { // Ty->isFunctionPointerType()
4394
117
    CallType = VariadicFunction;
4395
117
  }
4396
6.11k
4397
6.11k
  checkCall(NDecl, Proto, /*ThisArg=*/nullptr,
4398
6.11k
            llvm::makeArrayRef(TheCall->getArgs(), TheCall->getNumArgs()),
4399
6.11k
            /*IsMemberFunction=*/false, TheCall->getRParenLoc(),
4400
6.11k
            TheCall->getCallee()->getSourceRange(), CallType);
4401
6.11k
4402
6.11k
  return false;
4403
6.11k
}
4404
4405
/// Checks function calls when a FunctionDecl or a NamedDecl is not available,
4406
/// such as function pointers returned from functions.
4407
3.82k
bool Sema::CheckOtherCall(CallExpr *TheCall, const FunctionProtoType *Proto) {
4408
3.82k
  VariadicCallType CallType = getVariadicCallType(/*FDecl=*/nullptr, Proto,
4409
3.82k
                                                  TheCall->getCallee());
4410
3.82k
  checkCall(/*FDecl=*/nullptr, Proto, /*ThisArg=*/nullptr,
4411
3.82k
            llvm::makeArrayRef(TheCall->getArgs(), TheCall->getNumArgs()),
4412
3.82k
            /*IsMemberFunction=*/false, TheCall->getRParenLoc(),
4413
3.82k
            TheCall->getCallee()->getSourceRange(), CallType);
4414
3.82k
4415
3.82k
  return false;
4416
3.82k
}
4417
4418
2.05k
static bool isValidOrderingForOp(int64_t Ordering, AtomicExpr::AtomicOp Op) {
4419
2.05k
  if (!llvm::isValidAtomicOrderingCABI(Ordering))
4420
2
    return false;
4421
2.05k
4422
2.05k
  auto OrderingCABI = (llvm::AtomicOrderingCABI)Ordering;
4423
2.05k
  switch (Op) {
4424
2.05k
  case AtomicExpr::AO__c11_atomic_init:
4425
0
  case AtomicExpr::AO__opencl_atomic_init:
4426
0
    llvm_unreachable("There is no ordering argument for an init");
4427
0
4428
540
  case AtomicExpr::AO__c11_atomic_load:
4429
540
  case AtomicExpr::AO__opencl_atomic_load:
4430
540
  case AtomicExpr::AO__atomic_load_n:
4431
540
  case AtomicExpr::AO__atomic_load:
4432
540
    return OrderingCABI != llvm::AtomicOrderingCABI::release &&
4433
540
           
OrderingCABI != llvm::AtomicOrderingCABI::acq_rel533
;
4434
540
4435
540
  case AtomicExpr::AO__c11_atomic_store:
4436
249
  case AtomicExpr::AO__opencl_atomic_store:
4437
249
  case AtomicExpr::AO__atomic_store:
4438
249
  case AtomicExpr::AO__atomic_store_n:
4439
249
    return OrderingCABI != llvm::AtomicOrderingCABI::consume &&
4440
249
           
OrderingCABI != llvm::AtomicOrderingCABI::acquire246
&&
4441
249
           
OrderingCABI != llvm::AtomicOrderingCABI::acq_rel241
;
4442
249
4443
1.26k
  default:
4444
1.26k
    return true;
4445
2.05k
  }
4446
2.05k
}
4447
4448
ExprResult Sema::SemaAtomicOpsOverloaded(ExprResult TheCallResult,
4449
3.45k
                                         AtomicExpr::AtomicOp Op) {
4450
3.45k
  CallExpr *TheCall = cast<CallExpr>(TheCallResult.get());
4451
3.45k
  DeclRefExpr *DRE =cast<DeclRefExpr>(TheCall->getCallee()->IgnoreParenCasts());
4452
3.45k
4453
3.45k
  // All the non-OpenCL operations take one of the following forms.
4454
3.45k
  // The OpenCL operations take the __c11 forms with one extra argument for
4455
3.45k
  // synchronization scope.
4456
3.45k
  enum {
4457
3.45k
    // C    __c11_atomic_init(A *, C)
4458
3.45k
    Init,
4459
3.45k
4460
3.45k
    // C    __c11_atomic_load(A *, int)
4461
3.45k
    Load,
4462
3.45k
4463
3.45k
    // void __atomic_load(A *, CP, int)
4464
3.45k
    LoadCopy,
4465
3.45k
4466
3.45k
    // void __atomic_store(A *, CP, int)
4467
3.45k
    Copy,
4468
3.45k
4469
3.45k
    // C    __c11_atomic_add(A *, M, int)
4470
3.45k
    Arithmetic,
4471
3.45k
4472
3.45k
    // C    __atomic_exchange_n(A *, CP, int)
4473
3.45k
    Xchg,
4474
3.45k
4475
3.45k
    // void __atomic_exchange(A *, C *, CP, int)
4476
3.45k
    GNUXchg,
4477
3.45k
4478
3.45k
    // bool __c11_atomic_compare_exchange_strong(A *, C *, CP, int, int)
4479
3.45k
    C11CmpXchg,
4480
3.45k
4481
3.45k
    // bool __atomic_compare_exchange(A *, C *, CP, bool, int, int)
4482
3.45k
    GNUCmpXchg
4483
3.45k
  } Form = Init;
4484
3.45k
4485
3.45k
  const unsigned NumForm = GNUCmpXchg + 1;
4486
3.45k
  const unsigned NumArgs[] = { 2, 2, 3, 3, 3, 3, 4, 5, 6 };
4487
3.45k
  const unsigned NumVals[] = { 1, 0, 1, 1, 1, 1, 2, 2, 3 };
4488
3.45k
  // where:
4489
3.45k
  //   C is an appropriate type,
4490
3.45k
  //   A is volatile _Atomic(C) for __c11 builtins and is C for GNU builtins,
4491
3.45k
  //   CP is C for __c11 builtins and GNU _n builtins and is C * otherwise,
4492
3.45k
  //   M is C if C is an integer, and ptrdiff_t if C is a pointer, and
4493
3.45k
  //   the int parameters are for orderings.
4494
3.45k
4495
3.45k
  static_assert(sizeof(NumArgs)/sizeof(NumArgs[0]) == NumForm
4496
3.45k
      && sizeof(NumVals)/sizeof(NumVals[0]) == NumForm,
4497
3.45k
      "need to update code for modified forms");
4498
3.45k
  static_assert(AtomicExpr::AO__c11_atomic_init == 0 &&
4499
3.45k
                    AtomicExpr::AO__c11_atomic_fetch_xor + 1 ==
4500
3.45k
                        AtomicExpr::AO__atomic_load,
4501
3.45k
                "need to update code for modified C11 atomics");
4502
3.45k
  bool IsOpenCL = Op >= AtomicExpr::AO__opencl_atomic_init &&
4503
3.45k
                  
Op <= AtomicExpr::AO__opencl_atomic_fetch_max328
;
4504
3.45k
  bool IsC11 = (Op >= AtomicExpr::AO__c11_atomic_init &&
4505
3.45k
               Op <= AtomicExpr::AO__c11_atomic_fetch_xor) ||
4506
3.45k
               
IsOpenCL1.79k
;
4507
3.45k
  bool IsN = Op == AtomicExpr::AO__atomic_load_n ||
4508
3.45k
             
Op == AtomicExpr::AO__atomic_store_n3.11k
||
4509
3.45k
             
Op == AtomicExpr::AO__atomic_exchange_n3.07k
||
4510
3.45k
             
Op == AtomicExpr::AO__atomic_compare_exchange_n3.06k
;
4511
3.45k
  bool IsAddSub = false;
4512
3.45k
  bool IsMinMax = false;
4513
3.45k
4514
3.45k
  switch (Op) {
4515
3.45k
  case AtomicExpr::AO__c11_atomic_init:
4516
49
  case AtomicExpr::AO__opencl_atomic_init:
4517
49
    Form = Init;
4518
49
    break;
4519
49
4520
466
  case AtomicExpr::AO__c11_atomic_load:
4521
466
  case AtomicExpr::AO__opencl_atomic_load:
4522
466
  case AtomicExpr::AO__atomic_load_n:
4523
466
    Form = Load;
4524
466
    break;
4525
466
4526
466
  case AtomicExpr::AO__atomic_load:
4527
108
    Form = LoadCopy;
4528
108
    break;
4529
466
4530
898
  case AtomicExpr::AO__c11_atomic_store:
4531
898
  case AtomicExpr::AO__opencl_atomic_store:
4532
898
  case AtomicExpr::AO__atomic_store:
4533
898
  case AtomicExpr::AO__atomic_store_n:
4534
898
    Form = Copy;
4535
898
    break;
4536
898
4537
898
  case AtomicExpr::AO__c11_atomic_fetch_add:
4538
789
  case AtomicExpr::AO__c11_atomic_fetch_sub:
4539
789
  case AtomicExpr::AO__opencl_atomic_fetch_add:
4540
789
  case AtomicExpr::AO__opencl_atomic_fetch_sub:
4541
789
  case AtomicExpr::AO__opencl_atomic_fetch_min:
4542
789
  case AtomicExpr::AO__opencl_atomic_fetch_max:
4543
789
  case AtomicExpr::AO__atomic_fetch_add:
4544
789
  case AtomicExpr::AO__atomic_fetch_sub:
4545
789
  case AtomicExpr::AO__atomic_add_fetch:
4546
789
  case AtomicExpr::AO__atomic_sub_fetch:
4547
789
    IsAddSub = true;
4548
789
    LLVM_FALLTHROUGH;
4549
965
  case AtomicExpr::AO__c11_atomic_fetch_and:
4550
965
  case AtomicExpr::AO__c11_atomic_fetch_or:
4551
965
  case AtomicExpr::AO__c11_atomic_fetch_xor:
4552
965
  case AtomicExpr::AO__opencl_atomic_fetch_and:
4553
965
  case AtomicExpr::AO__opencl_atomic_fetch_or:
4554
965
  case AtomicExpr::AO__opencl_atomic_fetch_xor:
4555
965
  case AtomicExpr::AO__atomic_fetch_and:
4556
965
  case AtomicExpr::AO__atomic_fetch_or:
4557
965
  case AtomicExpr::AO__atomic_fetch_xor:
4558
965
  case AtomicExpr::AO__atomic_fetch_nand:
4559
965
  case AtomicExpr::AO__atomic_and_fetch:
4560
965
  case AtomicExpr::AO__atomic_or_fetch:
4561
965
  case AtomicExpr::AO__atomic_xor_fetch:
4562
965
  case AtomicExpr::AO__atomic_nand_fetch:
4563
965
    Form = Arithmetic;
4564
965
    break;
4565
965
4566
965
  case AtomicExpr::AO__atomic_fetch_min:
4567
27
  case AtomicExpr::AO__atomic_fetch_max:
4568
27
    IsMinMax = true;
4569
27
    Form = Arithmetic;
4570
27
    break;
4571
27
4572
722
  case AtomicExpr::AO__c11_atomic_exchange:
4573
722
  case AtomicExpr::AO__opencl_atomic_exchange:
4574
722
  case AtomicExpr::AO__atomic_exchange_n:
4575
722
    Form = Xchg;
4576
722
    break;
4577
722
4578
722
  case AtomicExpr::AO__atomic_exchange:
4579
32
    Form = GNUXchg;
4580
32
    break;
4581
722
4582
722
  case AtomicExpr::AO__c11_atomic_compare_exchange_strong:
4583
124
  case AtomicExpr::AO__c11_atomic_compare_exchange_weak:
4584
124
  case AtomicExpr::AO__opencl_atomic_compare_exchange_strong:
4585
124
  case AtomicExpr::AO__opencl_atomic_compare_exchange_weak:
4586
124
    Form = C11CmpXchg;
4587
124
    break;
4588
124
4589
124
  case AtomicExpr::AO__atomic_compare_exchange:
4590
66
  case AtomicExpr::AO__atomic_compare_exchange_n:
4591
66
    Form = GNUCmpXchg;
4592
66
    break;
4593
3.45k
  }
4594
3.45k
4595
3.45k
  unsigned AdjustedNumArgs = NumArgs[Form];
4596
3.45k
  if (IsOpenCL && 
Op != AtomicExpr::AO__opencl_atomic_init301
)
4597
287
    ++AdjustedNumArgs;
4598
3.45k
  // Check we have the right number of arguments.
4599
3.45k
  if (TheCall->getNumArgs() < AdjustedNumArgs) {
4600
5
    Diag(TheCall->getEndLoc(), diag::err_typecheck_call_too_few_args)
4601
5
        << 0 << AdjustedNumArgs << TheCall->getNumArgs()
4602
5
        << TheCall->getCallee()->getSourceRange();
4603
5
    return ExprError();
4604
3.45k
  } else if (TheCall->getNumArgs() > AdjustedNumArgs) {
4605
4
    Diag(TheCall->getArg(AdjustedNumArgs)->getBeginLoc(),
4606
4
         diag::err_typecheck_call_too_many_args)
4607
4
        << 0 << AdjustedNumArgs << TheCall->getNumArgs()
4608
4
        << TheCall->getCallee()->getSourceRange();
4609
4
    return ExprError();
4610
4
  }
4611
3.44k
4612
3.44k
  // Inspect the first argument of the atomic operation.
4613
3.44k
  Expr *Ptr = TheCall->getArg(0);
4614
3.44k
  ExprResult ConvertedPtr = DefaultFunctionArrayLvalueConversion(Ptr);
4615
3.44k
  if (ConvertedPtr.isInvalid())
4616
1
    return ExprError();
4617
3.44k
4618
3.44k
  Ptr = ConvertedPtr.get();
4619
3.44k
  const PointerType *pointerType = Ptr->getType()->getAs<PointerType>();
4620
3.44k
  if (!pointerType) {
4621
3
    Diag(DRE->getBeginLoc(), diag::err_atomic_builtin_must_be_pointer)
4622
3
        << Ptr->getType() << Ptr->getSourceRange();
4623
3
    return ExprError();
4624
3
  }
4625
3.44k
4626
3.44k
  // For a __c11 builtin, this should be a pointer to an _Atomic type.
4627
3.44k
  QualType AtomTy = pointerType->getPointeeType(); // 'A'
4628
3.44k
  QualType ValType = AtomTy; // 'C'
4629
3.44k
  if (IsC11) {
4630
1.95k
    if (!AtomTy->isAtomicType()) {
4631
10
      Diag(DRE->getBeginLoc(), diag::err_atomic_op_needs_atomic)
4632
10
          << Ptr->getType() << Ptr->getSourceRange();
4633
10
      return ExprError();
4634
10
    }
4635
1.94k
    if ((Form != Load && 
Form != LoadCopy1.82k
&&
AtomTy.isConstQualified()1.82k
) ||
4636
1.94k
        
AtomTy.getAddressSpace() == LangAS::opencl_constant1.92k
) {
4637
19
      Diag(DRE->getBeginLoc(), diag::err_atomic_op_needs_non_const_atomic)
4638
19
          << (AtomTy.isConstQualified() ? 
015
:
14
) << Ptr->getType()
4639
19
          << Ptr->getSourceRange();
4640
19
      return ExprError();
4641
19
    }
4642
1.92k
    ValType = AtomTy->getAs<AtomicType>()->getValueType();
4643
1.92k
  } else 
if (1.49k
Form != Load1.49k
&&
Form != LoadCopy1.15k
) {
4644
1.04k
    if (ValType.isConstQualified()) {
4645
6
      Diag(DRE->getBeginLoc(), diag::err_atomic_op_needs_non_const_pointer)
4646
6
          << Ptr->getType() << Ptr->getSourceRange();
4647
6
      return ExprError();
4648
6
    }
4649
3.40k
  }
4650
3.40k
4651
3.40k
  // For an arithmetic operation, the implied arithmetic must be well-formed.
4652
3.40k
  if (Form == Arithmetic) {
4653
989
    // gcc does not enforce these rules for GNU atomics, but we do so for sanity.
4654
989
    if (IsAddSub && 
!ValType->isIntegerType()787
4655
989
        && 
!ValType->isPointerType()24
) {
4656
10
      Diag(DRE->getBeginLoc(), diag::err_atomic_op_needs_atomic_int_or_ptr)
4657
10
          << IsC11 << Ptr->getType() << Ptr->getSourceRange();
4658
10
      return ExprError();
4659
10
    }
4660
979
    if (IsMinMax) {
4661
26
      const BuiltinType *BT = ValType->getAs<BuiltinType>();
4662
26
      if (!BT || 
(25
BT->getKind() != BuiltinType::Int25
&&
4663
25
                  
BT->getKind() != BuiltinType::UInt3
)) {
4664
2
        Diag(DRE->getBeginLoc(), diag::err_atomic_op_needs_int32_or_ptr);
4665
2
        return ExprError();
4666
2
      }
4667
977
    }
4668
977
    if (!IsAddSub && 
!IsMinMax200
&&
!ValType->isIntegerType()176
) {
4669
8
      Diag(DRE->getBeginLoc(), diag::err_atomic_op_bitwise_needs_atomic_int)
4670
8
          << IsC11 << Ptr->getType() << Ptr->getSourceRange();
4671
8
      return ExprError();
4672
8
    }
4673
969
    if (IsC11 && 
ValType->isPointerType()188
&&
4674
969
        RequireCompleteType(Ptr->getBeginLoc(), ValType->getPointeeType(),
4675
8
                            diag::err_incomplete_type)) {
4676
1
      return ExprError();
4677
1
    }
4678
2.42k
  } else if (IsN && 
!ValType->isIntegerType()421
&&
!ValType->isPointerType()12
) {
4679
5
    // For __atomic_*_n operations, the value type must be a scalar integral or
4680
5
    // pointer type which is 1, 2, 4, 8 or 16 bytes in length.
4681
5
    Diag(DRE->getBeginLoc(), diag::err_atomic_op_needs_atomic_int_or_ptr)
4682
5
        << IsC11 << Ptr->getType() << Ptr->getSourceRange();
4683
5
    return ExprError();
4684
5
  }
4685
3.38k
4686
3.38k
  if (!IsC11 && 
!AtomTy.isTriviallyCopyableType(Context)1.47k
&&
4687
3.38k
      
!AtomTy->isScalarType()2
) {
4688
2
    // For GNU atomics, require a trivially-copyable type. This is not part of
4689
2
    // the GNU atomics specification, but we enforce it for sanity.
4690
2
    Diag(DRE->getBeginLoc(), diag::err_atomic_op_needs_trivial_copy)
4691
2
        << Ptr->getType() << Ptr->getSourceRange();
4692
2
    return ExprError();
4693
2
  }
4694
3.38k
4695
3.38k
  switch (ValType.getObjCLifetime()) {
4696
3.38k
  case Qualifiers::OCL_None:
4697
3.38k
  case Qualifiers::OCL_ExplicitNone:
4698
3.38k
    // okay
4699
3.38k
    break;
4700
3.38k
4701
3.38k
  case Qualifiers::OCL_Weak:
4702
0
  case Qualifiers::OCL_Strong:
4703
0
  case Qualifiers::OCL_Autoreleasing:
4704
0
    // FIXME: Can this happen? By this point, ValType should be known
4705
0
    // to be trivially copyable.
4706
0
    Diag(DRE->getBeginLoc(), diag::err_arc_atomic_ownership)
4707
0
        << ValType << Ptr->getSourceRange();
4708
0
    return ExprError();
4709
3.38k
  }
4710
3.38k
4711
3.38k
  // All atomic operations have an overload which takes a pointer to a volatile
4712
3.38k
  // 'A'.  We shouldn't let the volatile-ness of the pointee-type inject itself
4713
3.38k
  // into the result or the other operands. Similarly atomic_load takes a
4714
3.38k
  // pointer to a const 'A'.
4715
3.38k
  ValType.removeLocalVolatile();
4716
3.38k
  ValType.removeLocalConst();
4717
3.38k
  QualType ResultType = ValType;
4718
3.38k
  if (Form == Copy || 
Form == LoadCopy2.50k
||
Form == GNUXchg2.39k
||
4719
3.38k
      
Form == Init2.36k
)
4720
1.05k
    ResultType = Context.VoidTy;
4721
2.32k
  else if (Form == C11CmpXchg || 
Form == GNUCmpXchg2.20k
)
4722
187
    ResultType = Context.BoolTy;
4723
3.38k
4724
3.38k
  // The type of a parameter passed 'by value'. In the GNU atomics, such
4725
3.38k
  // arguments are actually passed as pointers.
4726
3.38k
  QualType ByValType = ValType; // 'CP'
4727
3.38k
  bool IsPassedByAddress = false;
4728
3.38k
  if (!IsC11 && 
!IsN1.47k
) {
4729
1.05k
    ByValType = Ptr->getType();
4730
1.05k
    IsPassedByAddress = true;
4731
1.05k
  }
4732
3.38k
4733
3.38k
  // The first argument's non-CV pointer type is used to deduce the type of
4734
3.38k
  // subsequent arguments, except for:
4735
3.38k
  //  - weak flag (always converted to bool)
4736
3.38k
  //  - memory order (always converted to int)
4737
3.38k
  //  - scope  (always converted to int)
4738
13.7k
  for (unsigned i = 0; i != TheCall->getNumArgs(); 
++i10.3k
) {
4739
10.3k
    QualType Ty;
4740
10.3k
    if (i < NumVals[Form] + 1) {
4741
6.58k
      switch (i) {
4742
6.58k
      case 0:
4743
3.38k
        // The first argument is always a pointer. It has a fixed type.
4744
3.38k
        // It is always dereferenced, a nullptr is undefined.
4745
3.38k
        CheckNonNullArgument(*this, TheCall->getArg(i), DRE->getBeginLoc());
4746
3.38k
        // Nothing else to do: we already know all we want about this pointer.
4747
3.38k
        continue;
4748
6.58k
      case 1:
4749
2.92k
        // The second argument is the non-atomic operand. For arithmetic, this
4750
2.92k
        // is always passed by value, and for a compare_exchange it is always
4751
2.92k
        // passed by address. For the rest, GNU uses by-address and C11 uses
4752
2.92k
        // by-value.
4753
2.92k
        assert(Form != Load);
4754
2.92k
        if (Form == Init || 
(2.88k
Form == Arithmetic2.88k
&&
ValType->isIntegerType()968
))
4755
994
          Ty = ValType;
4756
1.93k
        else if (Form == Copy || 
Form == Xchg1.05k
) {
4757
1.59k
          if (IsPassedByAddress)
4758
98
            // The value pointer is always dereferenced, a nullptr is undefined.
4759
98
            CheckNonNullArgument(*this, TheCall->getArg(i), DRE->getBeginLoc());
4760
1.59k
          Ty = ByValType;
4761
1.59k
        } else 
if (337
Form == Arithmetic337
)
4762
13
          Ty = Context.getPointerDiffType();
4763
324
        else {
4764
324
          Expr *ValArg = TheCall->getArg(i);
4765
324
          // The value pointer is always dereferenced, a nullptr is undefined.
4766
324
          CheckNonNullArgument(*this, ValArg, DRE->getBeginLoc());
4767
324
          LangAS AS = LangAS::Default;
4768
324
          // Keep address space of non-atomic pointer type.
4769
324
          if (const PointerType *PtrTy =
4770
323
                  ValArg->getType()->getAs<PointerType>()) {
4771
323
            AS = PtrTy->getPointeeType().getAddressSpace();
4772
323
          }
4773
324
          Ty = Context.getPointerType(
4774
324
              Context.getAddrSpaceQualType(ValType.getUnqualifiedType(), AS));
4775
324
        }
4776
2.92k
        break;
4777
6.58k
      case 2:
4778
218
        // The third argument to compare_exchange / GNU exchange is the desired
4779
218
        // value, either by-value (for the C11 and *_n variant) or as a pointer.
4780
218
        if (IsPassedByAddress)
4781
69
          CheckNonNullArgument(*this, TheCall->getArg(i), DRE->getBeginLoc());
4782
218
        Ty = ByValType;
4783
218
        break;
4784
6.58k
      case 3:
4785
64
        // The fourth argument to GNU compare_exchange is a 'weak' flag.
4786
64
        Ty = Context.BoolTy;
4787
64
        break;
4788
3.78k
      }
4789
3.78k
    } else {
4790
3.78k
      // The order(s) and scope are always converted to int.
4791
3.78k
      Ty = Context.IntTy;
4792
3.78k
    }
4793
10.3k
4794
10.3k
    InitializedEntity Entity =
4795
6.99k
        InitializedEntity::InitializeParameter(Context, Ty, false);
4796
6.99k
    ExprResult Arg = TheCall->getArg(i);
4797
6.99k
    Arg = PerformCopyInitialization(Entity, SourceLocation(), Arg);
4798
6.99k
    if (Arg.isInvalid())
4799
4
      return true;
4800
6.99k
    TheCall->setArg(i, Arg.get());
4801
6.99k
  }
4802
3.38k
4803
3.38k
  // Permute the arguments into a 'consistent' order.
4804
3.38k
  SmallVector<Expr*, 5> SubExprs;
4805
3.37k
  SubExprs.push_back(Ptr);
4806
3.37k
  switch (Form) {
4807
3.37k
  case Init:
4808
39
    // Note, AtomicExpr::getVal1() has a special case for this atomic.
4809
39
    SubExprs.push_back(TheCall->getArg(1)); // Val1
4810
39
    break;
4811
3.37k
  case Load:
4812
452
    SubExprs.push_back(TheCall->getArg(1)); // Order
4813
452
    break;
4814
3.37k
  case LoadCopy:
4815
2.66k
  case Copy:
4816
2.66k
  case Arithmetic:
4817
2.66k
  case Xchg:
4818
2.66k
    SubExprs.push_back(TheCall->getArg(2)); // Order
4819
2.66k
    SubExprs.push_back(TheCall->getArg(1)); // Val1
4820
2.66k
    break;
4821
2.66k
  case GNUXchg:
4822
31
    // Note, AtomicExpr::getVal2() has a special case for this atomic.
4823
31
    SubExprs.push_back(TheCall->getArg(3)); // Order
4824
31
    SubExprs.push_back(TheCall->getArg(1)); // Val1
4825
31
    SubExprs.push_back(TheCall->getArg(2)); // Val2
4826
31
    break;
4827
2.66k
  case C11CmpXchg:
4828
123
    SubExprs.push_back(TheCall->getArg(3)); // Order
4829
123
    SubExprs.push_back(TheCall->getArg(1)); // Val1
4830
123
    SubExprs.push_back(TheCall->getArg(4)); // OrderFail
4831
123
    SubExprs.push_back(TheCall->getArg(2)); // Val2
4832
123
    break;
4833
2.66k
  case GNUCmpXchg:
4834
64
    SubExprs.push_back(TheCall->getArg(4)); // Order
4835
64
    SubExprs.push_back(TheCall->getArg(1)); // Val1
4836
64
    SubExprs.push_back(TheCall->getArg(5)); // OrderFail
4837
64
    SubExprs.push_back(TheCall->getArg(2)); // Val2
4838
64
    SubExprs.push_back(TheCall->getArg(3)); // Weak
4839
64
    break;
4840
3.37k
  }
4841
3.37k
4842
3.37k
  if (SubExprs.size() >= 2 && Form != Init) {
4843
3.33k
    llvm::APSInt Result(32);
4844
3.33k
    if (SubExprs[1]->isIntegerConstantExpr(Result, Context) &&
4845
3.33k
        
!isValidOrderingForOp(Result.getSExtValue(), Op)2.05k
)
4846
27
      Diag(SubExprs[1]->getBeginLoc(),
4847
27
           diag::warn_atomic_op_has_invalid_memory_order)
4848
27
          << SubExprs[1]->getSourceRange();
4849
3.33k
  }
4850
3.37k
4851
3.37k
  if (auto ScopeModel = AtomicExpr::getScopeModel(Op)) {
4852
257
    auto *Scope = TheCall->getArg(TheCall->getNumArgs() - 1);
4853
257
    llvm::APSInt Result(32);
4854
257
    if (Scope->isIntegerConstantExpr(Result, Context) &&
4855
257
        
!ScopeModel->isValid(Result.getZExtValue())245
) {
4856
4
      Diag(Scope->getBeginLoc(), diag::err_atomic_op_has_invalid_synch_scope)
4857
4
          << Scope->getSourceRange();
4858
4
    }
4859
257
    SubExprs.push_back(Scope);
4860
257
  }
4861
3.37k
4862
3.37k
  AtomicExpr *AE =
4863
3.37k
      new (Context) AtomicExpr(TheCall->getCallee()->getBeginLoc(), SubExprs,
4864
3.37k
                               ResultType, Op, TheCall->getRParenLoc());
4865
3.37k
4866
3.37k
  if ((Op == AtomicExpr::AO__c11_atomic_load ||
4867
3.37k
       
Op == AtomicExpr::AO__c11_atomic_store3.32k
||
4868
3.37k
       
Op == AtomicExpr::AO__opencl_atomic_load2.62k
||
4869
3.37k
       
Op == AtomicExpr::AO__opencl_atomic_store2.56k
) &&
4870
3.37k
      
Context.AtomicUsesUnsupportedLibcall(AE)858
)
4871
2
    Diag(AE->getBeginLoc(), diag::err_atomic_load_store_uses_lib)
4872
2
        << ((Op == AtomicExpr::AO__c11_atomic_load ||
4873
2
             
Op == AtomicExpr::AO__opencl_atomic_load1
)
4874
2
                ? 
01
4875
2
                : 
11
);
4876
3.37k
4877
3.37k
  return AE;
4878
3.37k
}
4879
4880
/// checkBuiltinArgument - Given a call to a builtin function, perform
4881
/// normal type-checking on the given argument, updating the call in
4882
/// place.  This is useful when a builtin function requires custom
4883
/// type-checking for some of its arguments but not necessarily all of
4884
/// them.
4885
///
4886
/// Returns true on error.
4887
806
static bool checkBuiltinArgument(Sema &S, CallExpr *E, unsigned ArgIndex) {
4888
806
  FunctionDecl *Fn = E->getDirectCallee();
4889
806
  assert(Fn && "builtin call without direct callee!");
4890
806
4891
806
  ParmVarDecl *Param = Fn->getParamDecl(ArgIndex);
4892
806
  InitializedEntity Entity =
4893
806
    InitializedEntity::InitializeParameter(S.Context, Param);
4894
806
4895
806
  ExprResult Arg = E->getArg(0);
4896
806
  Arg = S.PerformCopyInitialization(Entity, SourceLocation(), Arg);
4897
806
  if (Arg.isInvalid())
4898
4
    return true;
4899
802
4900
802
  E->setArg(ArgIndex, Arg.get());
4901
802
  return false;
4902
802
}
4903
4904
/// We have a call to a function like __sync_fetch_and_add, which is an
4905
/// overloaded function based on the pointer type of its first argument.
4906
/// The main BuildCallExpr routines have already promoted the types of
4907
/// arguments because all of these calls are prototyped as void(...).
4908
///
4909
/// This function goes through and does final semantic checking for these
4910
/// builtins, as well as generating any warnings.