Coverage Report

Created: 2020-02-25 14:32

/Users/buildslave/jenkins/workspace/coverage/llvm-project/clang/lib/Basic/Targets/AMDGPU.cpp
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//===--- AMDGPU.cpp - Implement AMDGPU target feature support -------------===//
2
//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
5
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
8
//
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// This file implements AMDGPU TargetInfo objects.
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//
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//===----------------------------------------------------------------------===//
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13
#include "AMDGPU.h"
14
#include "clang/Basic/Builtins.h"
15
#include "clang/Basic/CodeGenOptions.h"
16
#include "clang/Basic/LangOptions.h"
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#include "clang/Basic/MacroBuilder.h"
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#include "clang/Basic/TargetBuiltins.h"
19
#include "llvm/ADT/StringSwitch.h"
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#include "llvm/IR/DataLayout.h"
21
22
using namespace clang;
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using namespace clang::targets;
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25
namespace clang {
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namespace targets {
27
28
// If you edit the description strings, make sure you update
29
// getPointerWidthV().
30
31
static const char *const DataLayoutStringR600 =
32
    "e-p:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128"
33
    "-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5";
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static const char *const DataLayoutStringAMDGCN =
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    "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32"
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    "-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128"
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    "-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5"
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    "-ni:7";
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const LangASMap AMDGPUTargetInfo::AMDGPUDefIsGenMap = {
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    Generic,  // Default
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    Global,   // opencl_global
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    Local,    // opencl_local
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    Constant, // opencl_constant
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    Private,  // opencl_private
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    Generic,  // opencl_generic
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    Global,   // cuda_device
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    Constant, // cuda_constant
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    Local,    // cuda_shared
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    Generic,  // ptr32_sptr
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    Generic,  // ptr32_uptr
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    Generic   // ptr64
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};
55
56
const LangASMap AMDGPUTargetInfo::AMDGPUDefIsPrivMap = {
57
    Private,  // Default
58
    Global,   // opencl_global
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    Local,    // opencl_local
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    Constant, // opencl_constant
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    Private,  // opencl_private
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    Generic,  // opencl_generic
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    Global,   // cuda_device
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    Constant, // cuda_constant
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    Local,    // cuda_shared
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    Generic,  // ptr32_sptr
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    Generic,  // ptr32_uptr
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    Generic   // ptr64
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};
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} // namespace targets
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} // namespace clang
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const Builtin::Info AMDGPUTargetInfo::BuiltinInfo[] = {
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#define BUILTIN(ID, TYPE, ATTRS)                                               \
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  {#ID, TYPE, ATTRS, nullptr, ALL_LANGUAGES, nullptr},
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#define TARGET_BUILTIN(ID, TYPE, ATTRS, FEATURE)                               \
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  {#ID, TYPE, ATTRS, nullptr, ALL_LANGUAGES, FEATURE},
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#include "clang/Basic/BuiltinsAMDGPU.def"
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};
81
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const char *const AMDGPUTargetInfo::GCCRegNames[] = {
83
  "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8",
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  "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17",
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  "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26",
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  "v27", "v28", "v29", "v30", "v31", "v32", "v33", "v34", "v35",
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  "v36", "v37", "v38", "v39", "v40", "v41", "v42", "v43", "v44",
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  "v45", "v46", "v47", "v48", "v49", "v50", "v51", "v52", "v53",
89
  "v54", "v55", "v56", "v57", "v58", "v59", "v60", "v61", "v62",
90
  "v63", "v64", "v65", "v66", "v67", "v68", "v69", "v70", "v71",
91
  "v72", "v73", "v74", "v75", "v76", "v77", "v78", "v79", "v80",
92
  "v81", "v82", "v83", "v84", "v85", "v86", "v87", "v88", "v89",
93
  "v90", "v91", "v92", "v93", "v94", "v95", "v96", "v97", "v98",
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  "v99", "v100", "v101", "v102", "v103", "v104", "v105", "v106", "v107",
95
  "v108", "v109", "v110", "v111", "v112", "v113", "v114", "v115", "v116",
96
  "v117", "v118", "v119", "v120", "v121", "v122", "v123", "v124", "v125",
97
  "v126", "v127", "v128", "v129", "v130", "v131", "v132", "v133", "v134",
98
  "v135", "v136", "v137", "v138", "v139", "v140", "v141", "v142", "v143",
99
  "v144", "v145", "v146", "v147", "v148", "v149", "v150", "v151", "v152",
100
  "v153", "v154", "v155", "v156", "v157", "v158", "v159", "v160", "v161",
101
  "v162", "v163", "v164", "v165", "v166", "v167", "v168", "v169", "v170",
102
  "v171", "v172", "v173", "v174", "v175", "v176", "v177", "v178", "v179",
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  "v180", "v181", "v182", "v183", "v184", "v185", "v186", "v187", "v188",
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  "v189", "v190", "v191", "v192", "v193", "v194", "v195", "v196", "v197",
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  "v198", "v199", "v200", "v201", "v202", "v203", "v204", "v205", "v206",
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  "v207", "v208", "v209", "v210", "v211", "v212", "v213", "v214", "v215",
107
  "v216", "v217", "v218", "v219", "v220", "v221", "v222", "v223", "v224",
108
  "v225", "v226", "v227", "v228", "v229", "v230", "v231", "v232", "v233",
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  "v234", "v235", "v236", "v237", "v238", "v239", "v240", "v241", "v242",
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  "v243", "v244", "v245", "v246", "v247", "v248", "v249", "v250", "v251",
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  "v252", "v253", "v254", "v255", "s0", "s1", "s2", "s3", "s4",
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  "s5", "s6", "s7", "s8", "s9", "s10", "s11", "s12", "s13",
113
  "s14", "s15", "s16", "s17", "s18", "s19", "s20", "s21", "s22",
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  "s23", "s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31",
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  "s32", "s33", "s34", "s35", "s36", "s37", "s38", "s39", "s40",
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  "s41", "s42", "s43", "s44", "s45", "s46", "s47", "s48", "s49",
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  "s50", "s51", "s52", "s53", "s54", "s55", "s56", "s57", "s58",
118
  "s59", "s60", "s61", "s62", "s63", "s64", "s65", "s66", "s67",
119
  "s68", "s69", "s70", "s71", "s72", "s73", "s74", "s75", "s76",
120
  "s77", "s78", "s79", "s80", "s81", "s82", "s83", "s84", "s85",
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  "s86", "s87", "s88", "s89", "s90", "s91", "s92", "s93", "s94",
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  "s95", "s96", "s97", "s98", "s99", "s100", "s101", "s102", "s103",
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  "s104", "s105", "s106", "s107", "s108", "s109", "s110", "s111", "s112",
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  "s113", "s114", "s115", "s116", "s117", "s118", "s119", "s120", "s121",
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  "s122", "s123", "s124", "s125", "s126", "s127", "exec", "vcc", "scc",
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  "m0", "flat_scratch", "exec_lo", "exec_hi", "vcc_lo", "vcc_hi",
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  "flat_scratch_lo", "flat_scratch_hi"
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};
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ArrayRef<const char *> AMDGPUTargetInfo::getGCCRegNames() const {
131
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  return llvm::makeArrayRef(GCCRegNames);
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}
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bool AMDGPUTargetInfo::initFeatureMap(
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    llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags, StringRef CPU,
136
559
    const std::vector<std::string> &FeatureVec) const {
137
559
138
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  using namespace llvm::AMDGPU;
139
559
140
559
  // XXX - What does the member GPU mean if device name string passed here?
141
559
  if (isAMDGCN(getTriple())) {
142
493
    switch (llvm::AMDGPU::parseArchAMDGCN(CPU)) {
143
57
    case GK_GFX1012:
144
57
    case GK_GFX1011:
145
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      Features["dot1-insts"] = true;
146
57
      Features["dot2-insts"] = true;
147
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      Features["dot5-insts"] = true;
148
57
      Features["dot6-insts"] = true;
149
57
      LLVM_FALLTHROUGH;
150
105
    case GK_GFX1010:
151
105
      Features["dl-insts"] = true;
152
105
      Features["ci-insts"] = true;
153
105
      Features["flat-address-space"] = true;
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105
      Features["16-bit-insts"] = true;
155
105
      Features["dpp"] = true;
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      Features["gfx8-insts"] = true;
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      Features["gfx9-insts"] = true;
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      Features["gfx10-insts"] = true;
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      Features["s-memrealtime"] = true;
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      break;
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    case GK_GFX908:
162
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      Features["dot3-insts"] = true;
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      Features["dot4-insts"] = true;
164
28
      Features["dot5-insts"] = true;
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      Features["dot6-insts"] = true;
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      Features["mai-insts"] = true;
167
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      LLVM_FALLTHROUGH;
168
55
    case GK_GFX906:
169
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      Features["dl-insts"] = true;
170
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      Features["dot1-insts"] = true;
171
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      Features["dot2-insts"] = true;
172
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      LLVM_FALLTHROUGH;
173
101
    case GK_GFX909:
174
101
    case GK_GFX904:
175
101
    case GK_GFX902:
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101
    case GK_GFX900:
177
101
      Features["gfx9-insts"] = true;
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      LLVM_FALLTHROUGH;
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149
    case GK_GFX810:
180
149
    case GK_GFX803:
181
149
    case GK_GFX802:
182
149
    case GK_GFX801:
183
149
      Features["gfx8-insts"] = true;
184
149
      Features["16-bit-insts"] = true;
185
149
      Features["dpp"] = true;
186
149
      Features["s-memrealtime"] = true;
187
149
      LLVM_FALLTHROUGH;
188
176
    case GK_GFX704:
189
176
    case GK_GFX703:
190
176
    case GK_GFX702:
191
176
    case GK_GFX701:
192
176
    case GK_GFX700:
193
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      Features["ci-insts"] = true;
194
176
      Features["flat-address-space"] = true;
195
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      LLVM_FALLTHROUGH;
196
218
    case GK_GFX601:
197
218
    case GK_GFX600:
198
218
      break;
199
218
    case GK_NONE:
200
170
      break;
201
218
    default:
202
0
      llvm_unreachable("Unhandled GPU!");
203
66
    }
204
66
  } else {
205
66
    if (CPU.empty())
206
6
      CPU = "r600";
207
66
208
66
    switch (llvm::AMDGPU::parseArchR600(CPU)) {
209
26
    case GK_CAYMAN:
210
26
    case GK_CYPRESS:
211
26
    case GK_RV770:
212
26
    case GK_RV670:
213
26
      // TODO: Add fp64 when implemented.
214
26
      break;
215
40
    case GK_TURKS:
216
40
    case GK_CAICOS:
217
40
    case GK_BARTS:
218
40
    case GK_SUMO:
219
40
    case GK_REDWOOD:
220
40
    case GK_JUNIPER:
221
40
    case GK_CEDAR:
222
40
    case GK_RV730:
223
40
    case GK_RV710:
224
40
    case GK_RS880:
225
40
    case GK_R630:
226
40
    case GK_R600:
227
40
      break;
228
40
    default:
229
0
      llvm_unreachable("Unhandled GPU!");
230
559
    }
231
559
  }
232
559
233
559
  return TargetInfo::initFeatureMap(Features, Diags, CPU, FeatureVec);
234
559
}
235
236
void AMDGPUTargetInfo::adjustTargetOptions(const CodeGenOptions &CGOpts,
237
288
                                           TargetOptions &TargetOpts) const {
238
288
  bool hasFP32Denormals = false;
239
288
  bool hasFP64Denormals = false;
240
288
241
288
  for (auto &I : TargetOpts.FeaturesAsWritten) {
242
0
    if (I == "+fp32-denormals" || I == "-fp32-denormals")
243
0
      hasFP32Denormals = true;
244
0
    if (I == "+fp64-fp16-denormals" || I == "-fp64-fp16-denormals")
245
0
      hasFP64Denormals = true;
246
0
  }
247
288
  if (!hasFP32Denormals)
248
288
    TargetOpts.Features.push_back(
249
288
      (Twine(hasFastFMAF() && 
hasFullRateDenormalsF32()186
&&
250
288
             
CGOpts.FP32DenormalMode.Output == llvm::DenormalMode::IEEE46
251
288
             ? 
'+'1
:
'-'287
) + Twine("fp32-denormals"))
252
288
            .str());
253
288
  // Always do not flush fp64 or fp16 denorms.
254
288
  if (!hasFP64Denormals && hasFP64())
255
222
    TargetOpts.Features.push_back("+fp64-fp16-denormals");
256
288
}
257
258
void AMDGPUTargetInfo::fillValidCPUList(
259
2
    SmallVectorImpl<StringRef> &Values) const {
260
2
  if (isAMDGCN(getTriple()))
261
1
    llvm::AMDGPU::fillValidArchListAMDGCN(Values);
262
1
  else
263
1
    llvm::AMDGPU::fillValidArchListR600(Values);
264
2
}
265
266
871
void AMDGPUTargetInfo::setAddressSpaceMap(bool DefaultIsPrivate) {
267
871
  AddrSpaceMap = DefaultIsPrivate ? 
&AMDGPUDefIsPrivMap532
:
&AMDGPUDefIsGenMap339
;
268
871
}
269
270
AMDGPUTargetInfo::AMDGPUTargetInfo(const llvm::Triple &Triple,
271
                                   const TargetOptions &Opts)
272
    : TargetInfo(Triple),
273
      GPUKind(isAMDGCN(Triple) ?
274
              llvm::AMDGPU::parseArchAMDGCN(Opts.CPU) :
275
              llvm::AMDGPU::parseArchR600(Opts.CPU)),
276
      GPUFeatures(isAMDGCN(Triple) ?
277
                  llvm::AMDGPU::getArchAttrAMDGCN(GPUKind) :
278
296
                  llvm::AMDGPU::getArchAttrR600(GPUKind)) {
279
296
  resetDataLayout(isAMDGCN(getTriple()) ? 
DataLayoutStringAMDGCN229
280
296
                                        : 
DataLayoutStringR60067
);
281
296
  assert(DataLayout->getAllocaAddrSpace() == Private);
282
296
283
296
  setAddressSpaceMap(Triple.getOS() == llvm::Triple::Mesa3D ||
284
296
                     
!isAMDGCN(Triple)294
);
285
296
  UseAddrSpaceMapMangling = true;
286
296
287
296
  HasLegalHalfType = true;
288
296
  HasFloat16 = true;
289
296
290
296
  // Set pointer width and alignment for target address space 0.
291
296
  PointerWidth = PointerAlign = DataLayout->getPointerSizeInBits();
292
296
  if (getMaxPointerWidth() == 64) {
293
229
    LongWidth = LongAlign = 64;
294
229
    SizeType = UnsignedLong;
295
229
    PtrDiffType = SignedLong;
296
229
    IntPtrType = SignedLong;
297
229
  }
298
296
299
296
  MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
300
296
}
Unexecuted instantiation: clang::targets::AMDGPUTargetInfo::AMDGPUTargetInfo(llvm::Triple const&, clang::TargetOptions const&)
clang::targets::AMDGPUTargetInfo::AMDGPUTargetInfo(llvm::Triple const&, clang::TargetOptions const&)
Line
Count
Source
278
296
                  llvm::AMDGPU::getArchAttrR600(GPUKind)) {
279
296
  resetDataLayout(isAMDGCN(getTriple()) ? 
DataLayoutStringAMDGCN229
280
296
                                        : 
DataLayoutStringR60067
);
281
296
  assert(DataLayout->getAllocaAddrSpace() == Private);
282
296
283
296
  setAddressSpaceMap(Triple.getOS() == llvm::Triple::Mesa3D ||
284
296
                     
!isAMDGCN(Triple)294
);
285
296
  UseAddrSpaceMapMangling = true;
286
296
287
296
  HasLegalHalfType = true;
288
296
  HasFloat16 = true;
289
296
290
296
  // Set pointer width and alignment for target address space 0.
291
296
  PointerWidth = PointerAlign = DataLayout->getPointerSizeInBits();
292
296
  if (getMaxPointerWidth() == 64) {
293
229
    LongWidth = LongAlign = 64;
294
229
    SizeType = UnsignedLong;
295
229
    PtrDiffType = SignedLong;
296
229
    IntPtrType = SignedLong;
297
229
  }
298
296
299
296
  MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
300
296
}
301
302
575
void AMDGPUTargetInfo::adjust(LangOptions &Opts) {
303
575
  TargetInfo::adjust(Opts);
304
575
  // ToDo: There are still a few places using default address space as private
305
575
  // address space in OpenCL, which needs to be cleaned up, then Opts.OpenCL
306
575
  // can be removed from the following line.
307
575
  setAddressSpaceMap(/*DefaultIsPrivate=*/Opts.OpenCL ||
308
575
                     
!isAMDGCN(getTriple())121
);
309
575
}
310
311
293
ArrayRef<Builtin::Info> AMDGPUTargetInfo::getTargetBuiltins() const {
312
293
  return llvm::makeArrayRef(BuiltinInfo, clang::AMDGPU::LastTSBuiltin -
313
293
                                             Builtin::FirstTSBuiltin);
314
293
}
315
316
void AMDGPUTargetInfo::getTargetDefines(const LangOptions &Opts,
317
293
                                        MacroBuilder &Builder) const {
318
293
  Builder.defineMacro("__AMD__");
319
293
  Builder.defineMacro("__AMDGPU__");
320
293
321
293
  if (isAMDGCN(getTriple()))
322
228
    Builder.defineMacro("__AMDGCN__");
323
65
  else
324
65
    Builder.defineMacro("__R600__");
325
293
326
293
  if (GPUKind != llvm::AMDGPU::GK_NONE) {
327
160
    StringRef CanonName = isAMDGCN(getTriple()) ?
328
100
      getArchNameAMDGCN(GPUKind) : 
getArchNameR600(GPUKind)60
;
329
160
    Builder.defineMacro(Twine("__") + Twine(CanonName) + Twine("__"));
330
160
  }
331
293
332
293
  // TODO: __HAS_FMAF__, __HAS_LDEXPF__, __HAS_FP64__ are deprecated and will be
333
293
  // removed in the near future.
334
293
  if (hasFMAF())
335
251
    Builder.defineMacro("__HAS_FMAF__");
336
293
  if (hasFastFMAF())
337
192
    Builder.defineMacro("FP_FAST_FMAF");
338
293
  if (hasLDEXPF())
339
228
    Builder.defineMacro("__HAS_LDEXPF__");
340
293
  if (hasFP64())
341
228
    Builder.defineMacro("__HAS_FP64__");
342
293
  if (hasFastFMA())
343
228
    Builder.defineMacro("FP_FAST_FMA");
344
293
}
345
346
4
void AMDGPUTargetInfo::setAuxTarget(const TargetInfo *Aux) {
347
4
  assert(HalfFormat == Aux->HalfFormat);
348
4
  assert(FloatFormat == Aux->FloatFormat);
349
4
  assert(DoubleFormat == Aux->DoubleFormat);
350
4
351
4
  // On x86_64 long double is 80-bit extended precision format, which is
352
4
  // not supported by AMDGPU. 128-bit floating point format is also not
353
4
  // supported by AMDGPU. Therefore keep its own format for these two types.
354
4
  auto SaveLongDoubleFormat = LongDoubleFormat;
355
4
  auto SaveFloat128Format = Float128Format;
356
4
  copyAuxTarget(Aux);
357
4
  LongDoubleFormat = SaveLongDoubleFormat;
358
4
  Float128Format = SaveFloat128Format;
359
4
}