Coverage Report

Created: 2021-09-21 08:58

/Users/buildslave/jenkins/workspace/coverage/llvm-project/clang/lib/Basic/Targets/AMDGPU.h
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Source (jump to first uncovered line)
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//===--- AMDGPU.h - Declare AMDGPU target feature support -------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4
// See https://llvm.org/LICENSE.txt for license information.
5
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
8
//
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// This file declares AMDGPU TargetInfo objects.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CLANG_LIB_BASIC_TARGETS_AMDGPU_H
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#define LLVM_CLANG_LIB_BASIC_TARGETS_AMDGPU_H
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#include "clang/Basic/TargetID.h"
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#include "clang/Basic/TargetInfo.h"
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#include "clang/Basic/TargetOptions.h"
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#include "llvm/ADT/StringSet.h"
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#include "llvm/ADT/Triple.h"
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#include "llvm/Support/Compiler.h"
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#include "llvm/Support/TargetParser.h"
23
24
namespace clang {
25
namespace targets {
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class LLVM_LIBRARY_VISIBILITY AMDGPUTargetInfo final : public TargetInfo {
28
29
  static const Builtin::Info BuiltinInfo[];
30
  static const char *const GCCRegNames[];
31
32
  enum AddrSpace {
33
    Generic = 0,
34
    Global = 1,
35
    Local = 3,
36
    Constant = 4,
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    Private = 5
38
  };
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  static const LangASMap AMDGPUDefIsGenMap;
40
  static const LangASMap AMDGPUDefIsPrivMap;
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42
  llvm::AMDGPU::GPUKind GPUKind;
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  unsigned GPUFeatures;
44
  unsigned WavefrontSize;
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46
  /// Target ID is device name followed by optional feature name postfixed
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  /// by plus or minus sign delimitted by colon, e.g. gfx908:xnack+:sramecc-.
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  /// If the target ID contains feature+, map it to true.
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  /// If the target ID contains feature-, map it to false.
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  /// If the target ID does not contain a feature (default), do not map it.
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  llvm::StringMap<bool> OffloadArchFeatures;
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  std::string TargetID;
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54
1.41k
  bool hasFP64() const {
55
1.41k
    return getTriple().getArch() == llvm::Triple::amdgcn ||
56
1.41k
           
!!(GPUFeatures & llvm::AMDGPU::FEATURE_FP64)227
;
57
1.41k
  }
58
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  /// Has fast fma f32
60
465
  bool hasFastFMAF() const {
61
465
    return !!(GPUFeatures & llvm::AMDGPU::FEATURE_FAST_FMA_F32);
62
465
  }
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64
  /// Has fast fma f64
65
465
  bool hasFastFMA() const {
66
465
    return getTriple().getArch() == llvm::Triple::amdgcn;
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465
  }
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69
465
  bool hasFMAF() const {
70
465
    return getTriple().getArch() == llvm::Triple::amdgcn ||
71
465
           
!!(GPUFeatures & llvm::AMDGPU::FEATURE_FMA)75
;
72
465
  }
73
74
0
  bool hasFullRateDenormalsF32() const {
75
0
    return !!(GPUFeatures & llvm::AMDGPU::FEATURE_FAST_DENORMAL_F32);
76
0
  }
77
78
465
  bool hasLDEXPF() const {
79
465
    return getTriple().getArch() == llvm::Triple::amdgcn ||
80
465
           
!!(GPUFeatures & llvm::AMDGPU::FEATURE_LDEXP)75
;
81
465
  }
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83
4.38k
  static bool isAMDGCN(const llvm::Triple &TT) {
84
4.38k
    return TT.getArch() == llvm::Triple::amdgcn;
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4.38k
  }
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87
2.00k
  static bool isR600(const llvm::Triple &TT) {
88
2.00k
    return TT.getArch() == llvm::Triple::r600;
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2.00k
  }
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public:
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  AMDGPUTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts);
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  void setAddressSpaceMap(bool DefaultIsPrivate);
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  void adjust(DiagnosticsEngine &Diags, LangOptions &Opts) override;
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98
2.00k
  uint64_t getPointerWidthV(unsigned AddrSpace) const override {
99
2.00k
    if (isR600(getTriple()))
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163
      return 32;
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102
1.84k
    if (AddrSpace == Private || 
AddrSpace == Local1.55k
)
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737
      return 32;
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105
1.10k
    return 64;
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1.84k
  }
107
108
687
  uint64_t getPointerAlignV(unsigned AddrSpace) const override {
109
687
    return getPointerWidthV(AddrSpace);
110
687
  }
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112
3.56k
  uint64_t getMaxPointerWidth() const override {
113
3.56k
    return getTriple().getArch() == llvm::Triple::amdgcn ? 
643.30k
:
32263
;
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3.56k
  }
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116
9
  const char *getClobbers() const override { return ""; }
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  ArrayRef<const char *> getGCCRegNames() const override;
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120
70
  ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override {
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70
    return None;
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70
  }
123
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  /// Accepted register names: (n, m is unsigned integer, n < m)
125
  /// v
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  /// s
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  /// a
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  /// {vn}, {v[n]}
129
  /// {sn}, {s[n]}
130
  /// {an}, {a[n]}
131
  /// {S} , where S is a special register name
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  ////{v[n:m]}
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  /// {s[n:m]}
134
  /// {a[n:m]}
135
  bool validateAsmConstraint(const char *&Name,
136
130
                             TargetInfo::ConstraintInfo &Info) const override {
137
130
    static const ::llvm::StringSet<> SpecialRegs({
138
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        "exec", "vcc", "flat_scratch", "m0", "scc", "tba", "tma",
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        "flat_scratch_lo", "flat_scratch_hi", "vcc_lo", "vcc_hi", "exec_lo",
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        "exec_hi", "tma_lo", "tma_hi", "tba_lo", "tba_hi",
141
130
    });
142
143
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    switch (*Name) {
144
5
    case 'I':
145
5
      Info.setRequiresImmediate(-16, 64);
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5
      return true;
147
5
    case 'J':
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5
      Info.setRequiresImmediate(-32768, 32767);
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5
      return true;
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1
    case 'A':
151
2
    case 'B':
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3
    case 'C':
153
3
      Info.setRequiresImmediate();
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3
      return true;
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117
    default:
156
117
      break;
157
130
    }
158
159
117
    StringRef S(Name);
160
161
117
    if (S == "DA" || 
S == "DB"114
) {
162
6
      Name++;
163
6
      Info.setRequiresImmediate();
164
6
      return true;
165
6
    }
166
167
111
    bool HasLeftParen = false;
168
111
    if (S.front() == '{') {
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57
      HasLeftParen = true;
170
57
      S = S.drop_front();
171
57
    }
172
111
    if (S.empty())
173
1
      return false;
174
110
    if (S.front() != 'v' && 
S.front() != 's'47
&&
S.front() != 'a'26
) {
175
5
      if (!HasLeftParen)
176
0
        return false;
177
5
      auto E = S.find('}');
178
5
      if (!SpecialRegs.count(S.substr(0, E)))
179
2
        return false;
180
3
      S = S.drop_front(E + 1);
181
3
      if (!S.empty())
182
2
        return false;
183
      // Found {S} where S is a special register.
184
1
      Info.setAllowsRegister();
185
1
      Name = S.data() - 1;
186
1
      return true;
187
3
    }
188
105
    S = S.drop_front();
189
105
    if (!HasLeftParen) {
190
54
      if (!S.empty())
191
4
        return false;
192
      // Found s, v or a.
193
50
      Info.setAllowsRegister();
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50
      Name = S.data() - 1;
195
50
      return true;
196
54
    }
197
51
    bool HasLeftBracket = false;
198
51
    if (!S.empty() && 
S.front() == '['50
) {
199
27
      HasLeftBracket = true;
200
27
      S = S.drop_front();
201
27
    }
202
51
    unsigned long long N;
203
51
    if (S.empty() || 
consumeUnsignedInteger(S, 10, N)50
)
204
7
      return false;
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44
    if (!S.empty() && 
S.front() == ':'43
) {
206
20
      if (!HasLeftBracket)
207
0
        return false;
208
20
      S = S.drop_front();
209
20
      unsigned long long M;
210
20
      if (consumeUnsignedInteger(S, 10, M) || 
N >= M18
)
211
3
        return false;
212
20
    }
213
41
    if (HasLeftBracket) {
214
22
      if (S.empty() || S.front() != ']')
215
2
        return false;
216
20
      S = S.drop_front();
217
20
    }
218
39
    if (S.empty() || 
S.front() != '}'36
)
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5
      return false;
220
34
    S = S.drop_front();
221
34
    if (!S.empty())
222
2
      return false;
223
    // Found {vn}, {sn}, {an}, {v[n]}, {s[n]}, {a[n]}, {v[n:m]}, {s[n:m]}
224
    // or {a[n:m]}.
225
32
    Info.setAllowsRegister();
226
32
    Name = S.data() - 1;
227
32
    return true;
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34
  }
229
230
  // \p Constraint will be left pointing at the last character of
231
  // the constraint.  In practice, it won't be changed unless the
232
  // constraint is longer than one character.
233
16
  std::string convertConstraint(const char *&Constraint) const override {
234
235
16
    StringRef S(Constraint);
236
16
    if (S == "DA" || 
S == "DB"15
) {
237
2
      return std::string("^") + std::string(Constraint++, 2);
238
2
    }
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240
14
    const char *Begin = Constraint;
241
14
    TargetInfo::ConstraintInfo Info("", "");
242
14
    if (validateAsmConstraint(Constraint, Info))
243
14
      return std::string(Begin).substr(0, Constraint - Begin + 1);
244
245
0
    Constraint = Begin;
246
0
    return std::string(1, *Constraint);
247
14
  }
248
249
  bool
250
  initFeatureMap(llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags,
251
                 StringRef CPU,
252
                 const std::vector<std::string> &FeatureVec) const override;
253
254
  ArrayRef<Builtin::Info> getTargetBuiltins() const override;
255
256
2.16k
  bool useFP16ConversionIntrinsics() const override { return false; }
257
258
  void getTargetDefines(const LangOptions &Opts,
259
                        MacroBuilder &Builder) const override;
260
261
349
  BuiltinVaListKind getBuiltinVaListKind() const override {
262
349
    return TargetInfo::CharPtrBuiltinVaList;
263
349
  }
264
265
17
  bool isValidCPUName(StringRef Name) const override {
266
17
    if (getTriple().getArch() == llvm::Triple::amdgcn)
267
17
      return llvm::AMDGPU::parseArchAMDGCN(Name) != llvm::AMDGPU::GK_NONE;
268
0
    return llvm::AMDGPU::parseArchR600(Name) != llvm::AMDGPU::GK_NONE;
269
17
  }
270
271
  void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override;
272
273
267
  bool setCPU(const std::string &Name) override {
274
267
    if (getTriple().getArch() == llvm::Triple::amdgcn) {
275
206
      GPUKind = llvm::AMDGPU::parseArchAMDGCN(Name);
276
206
      GPUFeatures = llvm::AMDGPU::getArchAttrAMDGCN(GPUKind);
277
206
    } else {
278
61
      GPUKind = llvm::AMDGPU::parseArchR600(Name);
279
61
      GPUFeatures = llvm::AMDGPU::getArchAttrR600(GPUKind);
280
61
    }
281
282
267
    return GPUKind != llvm::AMDGPU::GK_NONE;
283
267
  }
284
285
473
  void setSupportedOpenCLOpts() override {
286
473
    auto &Opts = getSupportedOpenCLOpts();
287
473
    Opts["cl_clang_storage_class_specifiers"] = true;
288
473
    Opts["__cl_clang_variadic_functions"] = true;
289
473
    Opts["__cl_clang_function_pointers"] = true;
290
473
    Opts["__cl_clang_non_portable_kernel_param_types"] = true;
291
473
    Opts["__cl_clang_bitfields"] = true;
292
293
473
    bool IsAMDGCN = isAMDGCN(getTriple());
294
295
473
    Opts["cl_khr_fp64"] = hasFP64();
296
473
    Opts["__opencl_c_fp64"] = hasFP64();
297
298
473
    if (IsAMDGCN || 
GPUKind >= llvm::AMDGPU::GK_CEDAR76
) {
299
432
      Opts["cl_khr_byte_addressable_store"] = true;
300
432
      Opts["cl_khr_global_int32_base_atomics"] = true;
301
432
      Opts["cl_khr_global_int32_extended_atomics"] = true;
302
432
      Opts["cl_khr_local_int32_base_atomics"] = true;
303
432
      Opts["cl_khr_local_int32_extended_atomics"] = true;
304
432
    }
305
306
473
    if (IsAMDGCN) {
307
397
      Opts["cl_khr_fp16"] = true;
308
397
      Opts["cl_khr_int64_base_atomics"] = true;
309
397
      Opts["cl_khr_int64_extended_atomics"] = true;
310
397
      Opts["cl_khr_mipmap_image"] = true;
311
397
      Opts["cl_khr_mipmap_image_writes"] = true;
312
397
      Opts["cl_khr_subgroups"] = true;
313
397
      Opts["cl_amd_media_ops"] = true;
314
397
      Opts["cl_amd_media_ops2"] = true;
315
316
397
      Opts["__opencl_c_images"] = true;
317
397
      Opts["__opencl_c_3d_image_writes"] = true;
318
397
      Opts["cl_khr_3d_image_writes"] = true;
319
397
    }
320
473
  }
321
322
40
  LangAS getOpenCLTypeAddrSpace(OpenCLTypeKind TK) const override {
323
40
    switch (TK) {
324
18
    case OCLTK_Image:
325
18
      return LangAS::opencl_constant;
326
327
2
    case OCLTK_ClkEvent:
328
10
    case OCLTK_Queue:
329
12
    case OCLTK_ReserveID:
330
12
      return LangAS::opencl_global;
331
332
10
    default:
333
10
      return TargetInfo::getOpenCLTypeAddrSpace(TK);
334
40
    }
335
40
  }
336
337
172
  LangAS getOpenCLBuiltinAddressSpace(unsigned AS) const override {
338
172
    switch (AS) {
339
70
    case 0:
340
70
      return LangAS::opencl_generic;
341
26
    case 1:
342
26
      return LangAS::opencl_global;
343
62
    case 3:
344
62
      return LangAS::opencl_local;
345
11
    case 4:
346
11
      return LangAS::opencl_constant;
347
0
    case 5:
348
0
      return LangAS::opencl_private;
349
3
    default:
350
3
      return getLangASFromTargetAS(AS);
351
172
    }
352
172
  }
353
354
26
  LangAS getCUDABuiltinAddressSpace(unsigned AS) const override {
355
26
    switch (AS) {
356
6
    case 0:
357
6
      return LangAS::Default;
358
0
    case 1:
359
0
      return LangAS::cuda_device;
360
14
    case 3:
361
14
      return LangAS::cuda_shared;
362
6
    case 4:
363
6
      return LangAS::cuda_constant;
364
0
    default:
365
0
      return getLangASFromTargetAS(AS);
366
26
    }
367
26
  }
368
369
107
  llvm::Optional<LangAS> getConstantAddressSpace() const override {
370
107
    return getLangASFromTargetAS(Constant);
371
107
  }
372
373
168
  const llvm::omp::GV &getGridValue() const override {
374
168
    switch (WavefrontSize) {
375
0
    case 32:
376
0
      return llvm::omp::getAMDGPUGridValues<32>();
377
168
    case 64:
378
168
      return llvm::omp::getAMDGPUGridValues<64>();
379
0
    default:
380
0
      llvm_unreachable("getGridValue not implemented for this wavesize");
381
168
    }
382
168
  }
383
384
  /// \returns Target specific vtbl ptr address space.
385
0
  unsigned getVtblPtrAddressSpace() const override {
386
0
    return static_cast<unsigned>(Constant);
387
0
  }
388
389
  /// \returns If a target requires an address within a target specific address
390
  /// space \p AddressSpace to be converted in order to be used, then return the
391
  /// corresponding target specific DWARF address space.
392
  ///
393
  /// \returns Otherwise return None and no conversion will be emitted in the
394
  /// DWARF.
395
  Optional<unsigned>
396
208
  getDWARFAddressSpace(unsigned AddressSpace) const override {
397
208
    const unsigned DWARF_Private = 1;
398
208
    const unsigned DWARF_Local = 2;
399
208
    if (AddressSpace == Private) {
400
77
      return DWARF_Private;
401
131
    } else if (AddressSpace == Local) {
402
26
      return DWARF_Local;
403
105
    } else {
404
105
      return None;
405
105
    }
406
208
  }
407
408
396
  CallingConvCheckResult checkCallingConvention(CallingConv CC) const override {
409
396
    switch (CC) {
410
396
    default:
411
396
      return CCCR_Warning;
412
0
    case CC_C:
413
0
    case CC_OpenCLKernel:
414
0
      return CCCR_OK;
415
396
    }
416
396
  }
417
418
  // In amdgcn target the null pointer in global, constant, and generic
419
  // address space has value 0 but in private and local address space has
420
  // value ~0.
421
3.37k
  uint64_t getNullPointerValue(LangAS AS) const override {
422
    // FIXME: Also should handle region.
423
3.37k
    return (AS == LangAS::opencl_local || 
AS == LangAS::opencl_private2.89k
)
424
3.37k
      ? 
~01.05k
:
02.32k
;
425
3.37k
  }
426
427
  void setAuxTarget(const TargetInfo *Aux) override;
428
429
15
  bool hasExtIntType() const override { return true; }
430
431
  // Record offload arch features since they are needed for defining the
432
  // pre-defined macros.
433
  bool handleTargetFeatures(std::vector<std::string> &Features,
434
473
                            DiagnosticsEngine &Diags) override {
435
473
    auto TargetIDFeatures =
436
473
        getAllPossibleTargetIDFeatures(getTriple(), getArchNameAMDGCN(GPUKind));
437
1.99k
    llvm::for_each(Features, [&](const auto &F) {
438
1.99k
      assert(F.front() == '+' || F.front() == '-');
439
1.99k
      if (F == "+wavefrontsize64")
440
8
        WavefrontSize = 64;
441
1.99k
      bool IsOn = F.front() == '+';
442
1.99k
      StringRef Name = StringRef(F).drop_front();
443
1.99k
      if (llvm::find(TargetIDFeatures, Name) == TargetIDFeatures.end())
444
1.98k
        return;
445
8
      assert(OffloadArchFeatures.find(Name) == OffloadArchFeatures.end());
446
0
      OffloadArchFeatures[Name] = IsOn;
447
8
    });
448
473
    return true;
449
473
  }
450
451
200
  Optional<std::string> getTargetID() const override {
452
200
    if (!isAMDGCN(getTriple()))
453
0
      return llvm::None;
454
    // When -target-cpu is not set, we assume generic code that it is valid
455
    // for all GPU and use an empty string as target ID to represent that.
456
200
    if (GPUKind == llvm::AMDGPU::GK_NONE)
457
0
      return std::string("");
458
200
    return getCanonicalTargetID(getArchNameAMDGCN(GPUKind),
459
200
                                OffloadArchFeatures);
460
200
  }
461
};
462
463
} // namespace targets
464
} // namespace clang
465
466
#endif // LLVM_CLANG_LIB_BASIC_TARGETS_AMDGPU_H