Coverage Report

Created: 2021-06-15 06:44

/Users/buildslave/jenkins/workspace/coverage/llvm-project/clang/lib/Basic/Targets/AMDGPU.h
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//===--- AMDGPU.h - Declare AMDGPU target feature support -------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4
// See https://llvm.org/LICENSE.txt for license information.
5
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares AMDGPU TargetInfo objects.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CLANG_LIB_BASIC_TARGETS_AMDGPU_H
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#define LLVM_CLANG_LIB_BASIC_TARGETS_AMDGPU_H
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#include "clang/Basic/TargetID.h"
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#include "clang/Basic/TargetInfo.h"
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#include "clang/Basic/TargetOptions.h"
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#include "llvm/ADT/StringSet.h"
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#include "llvm/ADT/Triple.h"
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#include "llvm/Support/Compiler.h"
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#include "llvm/Support/TargetParser.h"
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namespace clang {
25
namespace targets {
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class LLVM_LIBRARY_VISIBILITY AMDGPUTargetInfo final : public TargetInfo {
28
29
  static const Builtin::Info BuiltinInfo[];
30
  static const char *const GCCRegNames[];
31
32
  enum AddrSpace {
33
    Generic = 0,
34
    Global = 1,
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    Local = 3,
36
    Constant = 4,
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    Private = 5
38
  };
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  static const LangASMap AMDGPUDefIsGenMap;
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  static const LangASMap AMDGPUDefIsPrivMap;
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  llvm::AMDGPU::GPUKind GPUKind;
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  unsigned GPUFeatures;
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  unsigned WavefrontSize;
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  /// Target ID is device name followed by optional feature name postfixed
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  /// by plus or minus sign delimitted by colon, e.g. gfx908:xnack+:sramecc-.
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  /// If the target ID contains feature+, map it to true.
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  /// If the target ID contains feature-, map it to false.
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  /// If the target ID does not contain a feature (default), do not map it.
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  llvm::StringMap<bool> OffloadArchFeatures;
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  std::string TargetID;
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54
1.25k
  bool hasFP64() const {
55
1.25k
    return getTriple().getArch() == llvm::Triple::amdgcn ||
56
1.25k
           
!!(GPUFeatures & llvm::AMDGPU::FEATURE_FP64)200
;
57
1.25k
  }
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  /// Has fast fma f32
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412
  bool hasFastFMAF() const {
61
412
    return !!(GPUFeatures & llvm::AMDGPU::FEATURE_FAST_FMA_F32);
62
412
  }
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  /// Has fast fma f64
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412
  bool hasFastFMA() const {
66
412
    return getTriple().getArch() == llvm::Triple::amdgcn;
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412
  }
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412
  bool hasFMAF() const {
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412
    return getTriple().getArch() == llvm::Triple::amdgcn ||
71
412
           
!!(GPUFeatures & llvm::AMDGPU::FEATURE_FMA)66
;
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412
  }
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74
0
  bool hasFullRateDenormalsF32() const {
75
0
    return !!(GPUFeatures & llvm::AMDGPU::FEATURE_FAST_DENORMAL_F32);
76
0
  }
77
78
412
  bool hasLDEXPF() const {
79
412
    return getTriple().getArch() == llvm::Triple::amdgcn ||
80
412
           
!!(GPUFeatures & llvm::AMDGPU::FEATURE_LDEXP)66
;
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412
  }
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83
3.85k
  static bool isAMDGCN(const llvm::Triple &TT) {
84
3.85k
    return TT.getArch() == llvm::Triple::amdgcn;
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3.85k
  }
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1.71k
  static bool isR600(const llvm::Triple &TT) {
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1.71k
    return TT.getArch() == llvm::Triple::r600;
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1.71k
  }
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public:
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  AMDGPUTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts);
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  void setAddressSpaceMap(bool DefaultIsPrivate);
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  void adjust(LangOptions &Opts) override;
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1.71k
  uint64_t getPointerWidthV(unsigned AddrSpace) const override {
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1.71k
    if (isR600(getTriple()))
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118
      return 32;
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102
1.59k
    if (AddrSpace == Private || 
AddrSpace == Local1.34k
)
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665
      return 32;
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105
933
    return 64;
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1.59k
  }
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574
  uint64_t getPointerAlignV(unsigned AddrSpace) const override {
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574
    return getPointerWidthV(AddrSpace);
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574
  }
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3.19k
  uint64_t getMaxPointerWidth() const override {
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3.19k
    return getTriple().getArch() == llvm::Triple::amdgcn ? 
642.97k
:
32217
;
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3.19k
  }
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9
  const char *getClobbers() const override { return ""; }
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  ArrayRef<const char *> getGCCRegNames() const override;
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  ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override {
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    return None;
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70
  }
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  /// Accepted register names: (n, m is unsigned integer, n < m)
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  /// v
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  /// s
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  /// a
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  /// {vn}, {v[n]}
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  /// {sn}, {s[n]}
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  /// {an}, {a[n]}
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  /// {S} , where S is a special register name
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  ////{v[n:m]}
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  /// {s[n:m]}
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  /// {a[n:m]}
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  bool validateAsmConstraint(const char *&Name,
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                             TargetInfo::ConstraintInfo &Info) const override {
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    static const ::llvm::StringSet<> SpecialRegs({
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        "exec", "vcc", "flat_scratch", "m0", "scc", "tba", "tma",
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        "flat_scratch_lo", "flat_scratch_hi", "vcc_lo", "vcc_hi", "exec_lo",
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        "exec_hi", "tma_lo", "tma_hi", "tba_lo", "tba_hi",
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    });
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    switch (*Name) {
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5
    case 'I':
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5
      Info.setRequiresImmediate(-16, 64);
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5
      return true;
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5
    case 'J':
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5
      Info.setRequiresImmediate(-32768, 32767);
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5
      return true;
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1
    case 'A':
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2
    case 'B':
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3
    case 'C':
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3
      Info.setRequiresImmediate();
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3
      return true;
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117
    default:
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117
      break;
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    }
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117
    StringRef S(Name);
160
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117
    if (S == "DA" || 
S == "DB"114
) {
162
6
      Name++;
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6
      Info.setRequiresImmediate();
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6
      return true;
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6
    }
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    bool HasLeftParen = false;
168
111
    if (S.front() == '{') {
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      HasLeftParen = true;
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      S = S.drop_front();
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    }
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111
    if (S.empty())
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1
      return false;
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110
    if (S.front() != 'v' && 
S.front() != 's'47
&&
S.front() != 'a'26
) {
175
5
      if (!HasLeftParen)
176
0
        return false;
177
5
      auto E = S.find('}');
178
5
      if (!SpecialRegs.count(S.substr(0, E)))
179
2
        return false;
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3
      S = S.drop_front(E + 1);
181
3
      if (!S.empty())
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2
        return false;
183
      // Found {S} where S is a special register.
184
1
      Info.setAllowsRegister();
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1
      Name = S.data() - 1;
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1
      return true;
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3
    }
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105
    S = S.drop_front();
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105
    if (!HasLeftParen) {
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54
      if (!S.empty())
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4
        return false;
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      // Found s, v or a.
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      Info.setAllowsRegister();
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50
      Name = S.data() - 1;
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50
      return true;
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54
    }
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    bool HasLeftBracket = false;
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51
    if (!S.empty() && 
S.front() == '['50
) {
199
27
      HasLeftBracket = true;
200
27
      S = S.drop_front();
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27
    }
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51
    unsigned long long N;
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51
    if (S.empty() || 
consumeUnsignedInteger(S, 10, N)50
)
204
7
      return false;
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44
    if (!S.empty() && 
S.front() == ':'43
) {
206
20
      if (!HasLeftBracket)
207
0
        return false;
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20
      S = S.drop_front();
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20
      unsigned long long M;
210
20
      if (consumeUnsignedInteger(S, 10, M) || 
N >= M18
)
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3
        return false;
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20
    }
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41
    if (HasLeftBracket) {
214
22
      if (S.empty() || S.front() != ']')
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2
        return false;
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20
      S = S.drop_front();
217
20
    }
218
39
    if (S.empty() || 
S.front() != '}'36
)
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5
      return false;
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34
    S = S.drop_front();
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34
    if (!S.empty())
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2
      return false;
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    // Found {vn}, {sn}, {an}, {v[n]}, {s[n]}, {a[n]}, {v[n:m]}, {s[n:m]}
224
    // or {a[n:m]}.
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32
    Info.setAllowsRegister();
226
32
    Name = S.data() - 1;
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    return true;
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34
  }
229
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  // \p Constraint will be left pointing at the last character of
231
  // the constraint.  In practice, it won't be changed unless the
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  // constraint is longer than one character.
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16
  std::string convertConstraint(const char *&Constraint) const override {
234
235
16
    StringRef S(Constraint);
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16
    if (S == "DA" || 
S == "DB"15
) {
237
2
      return std::string("^") + std::string(Constraint++, 2);
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2
    }
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14
    const char *Begin = Constraint;
241
14
    TargetInfo::ConstraintInfo Info("", "");
242
14
    if (validateAsmConstraint(Constraint, Info))
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14
      return std::string(Begin).substr(0, Constraint - Begin + 1);
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245
0
    Constraint = Begin;
246
0
    return std::string(1, *Constraint);
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14
  }
248
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  bool
250
  initFeatureMap(llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags,
251
                 StringRef CPU,
252
                 const std::vector<std::string> &FeatureVec) const override;
253
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  ArrayRef<Builtin::Info> getTargetBuiltins() const override;
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256
503
  bool useFP16ConversionIntrinsics() const override { return false; }
257
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  void getTargetDefines(const LangOptions &Opts,
259
                        MacroBuilder &Builder) const override;
260
261
298
  BuiltinVaListKind getBuiltinVaListKind() const override {
262
298
    return TargetInfo::CharPtrBuiltinVaList;
263
298
  }
264
265
17
  bool isValidCPUName(StringRef Name) const override {
266
17
    if (getTriple().getArch() == llvm::Triple::amdgcn)
267
17
      return llvm::AMDGPU::parseArchAMDGCN(Name) != llvm::AMDGPU::GK_NONE;
268
0
    return llvm::AMDGPU::parseArchR600(Name) != llvm::AMDGPU::GK_NONE;
269
17
  }
270
271
  void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override;
272
273
241
  bool setCPU(const std::string &Name) override {
274
241
    if (getTriple().getArch() == llvm::Triple::amdgcn) {
275
183
      GPUKind = llvm::AMDGPU::parseArchAMDGCN(Name);
276
183
      GPUFeatures = llvm::AMDGPU::getArchAttrAMDGCN(GPUKind);
277
183
    } else {
278
58
      GPUKind = llvm::AMDGPU::parseArchR600(Name);
279
58
      GPUFeatures = llvm::AMDGPU::getArchAttrR600(GPUKind);
280
58
    }
281
282
241
    return GPUKind != llvm::AMDGPU::GK_NONE;
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241
  }
284
285
420
  void setSupportedOpenCLOpts() override {
286
420
    auto &Opts = getSupportedOpenCLOpts();
287
420
    Opts["cl_clang_storage_class_specifiers"] = true;
288
420
    Opts["__cl_clang_variadic_functions"] = true;
289
420
    Opts["__cl_clang_function_pointers"] = true;
290
420
    Opts["__cl_clang_non_portable_kernel_param_types"] = true;
291
420
    Opts["__cl_clang_bitfields"] = true;
292
293
420
    bool IsAMDGCN = isAMDGCN(getTriple());
294
295
420
    Opts["cl_khr_fp64"] = hasFP64();
296
420
    Opts["__opencl_c_fp64"] = hasFP64();
297
298
420
    if (IsAMDGCN || 
GPUKind >= llvm::AMDGPU::GK_CEDAR67
) {
299
388
      Opts["cl_khr_byte_addressable_store"] = true;
300
388
      Opts["cl_khr_global_int32_base_atomics"] = true;
301
388
      Opts["cl_khr_global_int32_extended_atomics"] = true;
302
388
      Opts["cl_khr_local_int32_base_atomics"] = true;
303
388
      Opts["cl_khr_local_int32_extended_atomics"] = true;
304
388
    }
305
306
420
    if (IsAMDGCN) {
307
353
      Opts["cl_khr_fp16"] = true;
308
353
      Opts["cl_khr_int64_base_atomics"] = true;
309
353
      Opts["cl_khr_int64_extended_atomics"] = true;
310
353
      Opts["cl_khr_mipmap_image"] = true;
311
353
      Opts["cl_khr_mipmap_image_writes"] = true;
312
353
      Opts["cl_khr_subgroups"] = true;
313
353
      Opts["cl_khr_3d_image_writes"] = true;
314
353
      Opts["cl_amd_media_ops"] = true;
315
353
      Opts["cl_amd_media_ops2"] = true;
316
353
    }
317
420
  }
318
319
40
  LangAS getOpenCLTypeAddrSpace(OpenCLTypeKind TK) const override {
320
40
    switch (TK) {
321
18
    case OCLTK_Image:
322
18
      return LangAS::opencl_constant;
323
324
2
    case OCLTK_ClkEvent:
325
10
    case OCLTK_Queue:
326
12
    case OCLTK_ReserveID:
327
12
      return LangAS::opencl_global;
328
329
10
    default:
330
10
      return TargetInfo::getOpenCLTypeAddrSpace(TK);
331
40
    }
332
40
  }
333
334
104
  LangAS getOpenCLBuiltinAddressSpace(unsigned AS) const override {
335
104
    switch (AS) {
336
46
    case 0:
337
46
      return LangAS::opencl_generic;
338
0
    case 1:
339
0
      return LangAS::opencl_global;
340
44
    case 3:
341
44
      return LangAS::opencl_local;
342
11
    case 4:
343
11
      return LangAS::opencl_constant;
344
0
    case 5:
345
0
      return LangAS::opencl_private;
346
3
    default:
347
3
      return getLangASFromTargetAS(AS);
348
104
    }
349
104
  }
350
351
8
  LangAS getCUDABuiltinAddressSpace(unsigned AS) const override {
352
8
    return LangAS::Default;
353
8
  }
354
355
107
  llvm::Optional<LangAS> getConstantAddressSpace() const override {
356
107
    return getLangASFromTargetAS(Constant);
357
107
  }
358
359
  /// \returns Target specific vtbl ptr address space.
360
0
  unsigned getVtblPtrAddressSpace() const override {
361
0
    return static_cast<unsigned>(Constant);
362
0
  }
363
364
  /// \returns If a target requires an address within a target specific address
365
  /// space \p AddressSpace to be converted in order to be used, then return the
366
  /// corresponding target specific DWARF address space.
367
  ///
368
  /// \returns Otherwise return None and no conversion will be emitted in the
369
  /// DWARF.
370
  Optional<unsigned>
371
208
  getDWARFAddressSpace(unsigned AddressSpace) const override {
372
208
    const unsigned DWARF_Private = 1;
373
208
    const unsigned DWARF_Local = 2;
374
208
    if (AddressSpace == Private) {
375
77
      return DWARF_Private;
376
131
    } else if (AddressSpace == Local) {
377
26
      return DWARF_Local;
378
105
    } else {
379
105
      return None;
380
105
    }
381
208
  }
382
383
0
  CallingConvCheckResult checkCallingConvention(CallingConv CC) const override {
384
0
    switch (CC) {
385
0
    default:
386
0
      return CCCR_Warning;
387
0
    case CC_C:
388
0
    case CC_OpenCLKernel:
389
0
      return CCCR_OK;
390
0
    }
391
0
  }
392
393
  // In amdgcn target the null pointer in global, constant, and generic
394
  // address space has value 0 but in private and local address space has
395
  // value ~0.
396
3.35k
  uint64_t getNullPointerValue(LangAS AS) const override {
397
    // FIXME: Also should handle region.
398
3.35k
    return (AS == LangAS::opencl_local || 
AS == LangAS::opencl_private2.87k
)
399
3.35k
      ? 
~01.04k
:
02.30k
;
400
3.35k
  }
401
402
  void setAuxTarget(const TargetInfo *Aux) override;
403
404
15
  bool hasExtIntType() const override { return true; }
405
406
  // Record offload arch features since they are needed for defining the
407
  // pre-defined macros.
408
  bool handleTargetFeatures(std::vector<std::string> &Features,
409
420
                            DiagnosticsEngine &Diags) override {
410
420
    auto TargetIDFeatures =
411
420
        getAllPossibleTargetIDFeatures(getTriple(), getArchNameAMDGCN(GPUKind));
412
1.66k
    llvm::for_each(Features, [&](const auto &F) {
413
1.66k
      assert(F.front() == '+' || F.front() == '-');
414
1.66k
      if (F == "+wavefrontsize64")
415
8
        WavefrontSize = 64;
416
1.66k
      bool IsOn = F.front() == '+';
417
1.66k
      StringRef Name = StringRef(F).drop_front();
418
1.66k
      if (llvm::find(TargetIDFeatures, Name) == TargetIDFeatures.end())
419
1.66k
        return;
420
8
      assert(OffloadArchFeatures.find(Name) == OffloadArchFeatures.end());
421
0
      OffloadArchFeatures[Name] = IsOn;
422
8
    });
423
420
    return true;
424
420
  }
425
426
177
  Optional<std::string> getTargetID() const override {
427
177
    if (!isAMDGCN(getTriple()))
428
0
      return llvm::None;
429
    // When -target-cpu is not set, we assume generic code that it is valid
430
    // for all GPU and use an empty string as target ID to represent that.
431
177
    if (GPUKind == llvm::AMDGPU::GK_NONE)
432
0
      return std::string("");
433
177
    return getCanonicalTargetID(getArchNameAMDGCN(GPUKind),
434
177
                                OffloadArchFeatures);
435
177
  }
436
};
437
438
} // namespace targets
439
} // namespace clang
440
441
#endif // LLVM_CLANG_LIB_BASIC_TARGETS_AMDGPU_H