Coverage Report

Created: 2020-02-25 14:32

/Users/buildslave/jenkins/workspace/coverage/llvm-project/clang/lib/Basic/Targets/PPC.cpp
Line
Count
Source (jump to first uncovered line)
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//===--- PPC.cpp - Implement PPC target feature support -------------------===//
2
//
3
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4
// See https://llvm.org/LICENSE.txt for license information.
5
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6
//
7
//===----------------------------------------------------------------------===//
8
//
9
// This file implements PPC TargetInfo objects.
10
//
11
//===----------------------------------------------------------------------===//
12
13
#include "PPC.h"
14
#include "clang/Basic/Diagnostic.h"
15
#include "clang/Basic/MacroBuilder.h"
16
#include "clang/Basic/TargetBuiltins.h"
17
18
using namespace clang;
19
using namespace clang::targets;
20
21
const Builtin::Info PPCTargetInfo::BuiltinInfo[] = {
22
#define BUILTIN(ID, TYPE, ATTRS)                                               \
23
  {#ID, TYPE, ATTRS, nullptr, ALL_LANGUAGES, nullptr},
24
#define LIBBUILTIN(ID, TYPE, ATTRS, HEADER)                                    \
25
  {#ID, TYPE, ATTRS, HEADER, ALL_LANGUAGES, nullptr},
26
#include "clang/Basic/BuiltinsPPC.def"
27
};
28
29
/// handleTargetFeatures - Perform initialization based on the user
30
/// configured set of features.
31
bool PPCTargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
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2.85k
                                         DiagnosticsEngine &Diags) {
33
2.85k
  FloatABI = HardFloat;
34
31.3k
  for (const auto &Feature : Features) {
35
31.3k
    if (Feature == "+altivec") {
36
135
      HasAltivec = true;
37
31.2k
    } else if (Feature == "+vsx") {
38
93
      HasVSX = true;
39
31.1k
    } else if (Feature == "+bpermd") {
40
63
      HasBPERMD = true;
41
31.0k
    } else if (Feature == "+extdiv") {
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63
      HasExtDiv = true;
43
31.0k
    } else if (Feature == "+power8-vector") {
44
71
      HasP8Vector = true;
45
30.9k
    } else if (Feature == "+crypto") {
46
58
      HasP8Crypto = true;
47
30.9k
    } else if (Feature == "+direct-move") {
48
57
      HasDirectMove = true;
49
30.8k
    } else if (Feature == "+qpx") {
50
1
      HasQPX = true;
51
30.8k
    } else if (Feature == "+htm") {
52
64
      HasHTM = true;
53
30.7k
    } else if (Feature == "+float128") {
54
8
      HasFloat128 = true;
55
30.7k
    } else if (Feature == "+power9-vector") {
56
19
      HasP9Vector = true;
57
30.7k
    } else if (Feature == "+spe") {
58
2
      HasSPE = true;
59
2
      LongDoubleWidth = LongDoubleAlign = 64;
60
2
      LongDoubleFormat = &llvm::APFloat::IEEEdouble();
61
30.7k
    } else if (Feature == "-hard-float") {
62
2
      FloatABI = SoftFloat;
63
2
    }
64
31.3k
    // TODO: Finish this list and add an assert that we've handled them
65
31.3k
    // all.
66
31.3k
  }
67
2.85k
68
2.85k
  return true;
69
2.85k
}
70
71
/// PPCTargetInfo::getTargetDefines - Return a set of the PowerPC-specific
72
/// #defines that are not tied to a specific subtarget.
73
void PPCTargetInfo::getTargetDefines(const LangOptions &Opts,
74
2.84k
                                     MacroBuilder &Builder) const {
75
2.84k
  // Target identification.
76
2.84k
  Builder.defineMacro("__ppc__");
77
2.84k
  Builder.defineMacro("__PPC__");
78
2.84k
  Builder.defineMacro("_ARCH_PPC");
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2.84k
  Builder.defineMacro("__powerpc__");
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2.84k
  Builder.defineMacro("__POWERPC__");
81
2.84k
  if (PointerWidth == 64) {
82
2.77k
    Builder.defineMacro("_ARCH_PPC64");
83
2.77k
    Builder.defineMacro("__powerpc64__");
84
2.77k
    Builder.defineMacro("__ppc64__");
85
2.77k
    Builder.defineMacro("__PPC64__");
86
2.77k
  }
87
2.84k
88
2.84k
  // Target properties.
89
2.84k
  if (getTriple().getArch() == llvm::Triple::ppc64le) {
90
2.61k
    Builder.defineMacro("_LITTLE_ENDIAN");
91
2.61k
  } else {
92
236
    if (!getTriple().isOSNetBSD() &&
93
236
        
!getTriple().isOSOpenBSD()231
)
94
228
      Builder.defineMacro("_BIG_ENDIAN");
95
236
  }
96
2.84k
97
2.84k
  // ABI options.
98
2.84k
  if (ABI == "elfv1" || 
ABI == "elfv1-qpx"2.69k
)
99
157
    Builder.defineMacro("_CALL_ELF", "1");
100
2.84k
  if (ABI == "elfv2")
101
2.61k
    Builder.defineMacro("_CALL_ELF", "2");
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2.84k
103
2.84k
  // This typically is only for a new enough linker (bfd >= 2.16.2 or gold), but
104
2.84k
  // our support post-dates this and it should work on all 64-bit ppc linux
105
2.84k
  // platforms. It is guaranteed to work on all elfv2 platforms.
106
2.84k
  if (getTriple().getOS() == llvm::Triple::Linux && 
PointerWidth == 64223
)
107
197
    Builder.defineMacro("_CALL_LINUX", "1");
108
2.84k
109
2.84k
  // Subtarget options.
110
2.84k
  if (!getTriple().isOSAIX()){
111
2.82k
    Builder.defineMacro("__NATURAL_ALIGNMENT__");
112
2.82k
  }
113
2.84k
  Builder.defineMacro("__REGISTER_PREFIX__", "");
114
2.84k
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2.84k
  // FIXME: Should be controlled by command line option.
116
2.84k
  if (LongDoubleWidth == 128) {
117
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    Builder.defineMacro("__LONG_DOUBLE_128__");
118
2.80k
    Builder.defineMacro("__LONGDOUBLE128");
119
2.80k
  }
120
2.84k
121
2.84k
  // Define this for elfv2 (64-bit only) or 64-bit darwin.
122
2.84k
  if (ABI == "elfv2" ||
123
2.84k
      
(234
getTriple().getOS() == llvm::Triple::Darwin234
&&
PointerWidth == 645
))
124
2.61k
    Builder.defineMacro("__STRUCT_PARM_ALIGN__", "16");
125
2.84k
126
2.84k
  if (ArchDefs & ArchDefineName)
127
4
    Builder.defineMacro(Twine("_ARCH_", StringRef(CPU).upper()));
128
2.84k
  if (ArchDefs & ArchDefinePpcgr)
129
87
    Builder.defineMacro("_ARCH_PPCGR");
130
2.84k
  if (ArchDefs & ArchDefinePpcsq)
131
82
    Builder.defineMacro("_ARCH_PPCSQ");
132
2.84k
  if (ArchDefs & ArchDefine440)
133
0
    Builder.defineMacro("_ARCH_440");
134
2.84k
  if (ArchDefs & ArchDefine603)
135
2
    Builder.defineMacro("_ARCH_603");
136
2.84k
  if (ArchDefs & ArchDefine604)
137
0
    Builder.defineMacro("_ARCH_604");
138
2.84k
  if (ArchDefs & ArchDefinePwr4)
139
82
    Builder.defineMacro("_ARCH_PWR4");
140
2.84k
  if (ArchDefs & ArchDefinePwr5)
141
80
    Builder.defineMacro("_ARCH_PWR5");
142
2.84k
  if (ArchDefs & ArchDefinePwr5x)
143
78
    Builder.defineMacro("_ARCH_PWR5X");
144
2.84k
  if (ArchDefs & ArchDefinePwr6)
145
76
    Builder.defineMacro("_ARCH_PWR6");
146
2.84k
  if (ArchDefs & ArchDefinePwr6x)
147
2
    Builder.defineMacro("_ARCH_PWR6X");
148
2.84k
  if (ArchDefs & ArchDefinePwr7)
149
68
    Builder.defineMacro("_ARCH_PWR7");
150
2.84k
  if (ArchDefs & ArchDefinePwr8)
151
61
    Builder.defineMacro("_ARCH_PWR8");
152
2.84k
  if (ArchDefs & ArchDefinePwr9)
153
14
    Builder.defineMacro("_ARCH_PWR9");
154
2.84k
  if (ArchDefs & ArchDefineA2)
155
1
    Builder.defineMacro("_ARCH_A2");
156
2.84k
  if (ArchDefs & ArchDefineA2q) {
157
1
    Builder.defineMacro("_ARCH_A2Q");
158
1
    Builder.defineMacro("_ARCH_QP");
159
1
  }
160
2.84k
  if (ArchDefs & ArchDefineE500)
161
1
    Builder.defineMacro("__NO_LWSYNC__");
162
2.84k
  if (ArchDefs & ArchDefineFuture)
163
1
    Builder.defineMacro("_ARCH_PWR_FUTURE");
164
2.84k
165
2.84k
  if (getTriple().getVendor() == llvm::Triple::BGQ) {
166
1
    Builder.defineMacro("__bg__");
167
1
    Builder.defineMacro("__THW_BLUEGENE__");
168
1
    Builder.defineMacro("__bgq__");
169
1
    Builder.defineMacro("__TOS_BGQ__");
170
1
  }
171
2.84k
172
2.84k
  if (HasAltivec) {
173
135
    Builder.defineMacro("__VEC__", "10206");
174
135
    Builder.defineMacro("__ALTIVEC__");
175
135
  }
176
2.84k
  if (HasSPE) {
177
2
    Builder.defineMacro("__SPE__");
178
2
    Builder.defineMacro("__NO_FPRS__");
179
2
  }
180
2.84k
  if (HasVSX)
181
93
    Builder.defineMacro("__VSX__");
182
2.84k
  if (HasP8Vector)
183
71
    Builder.defineMacro("__POWER8_VECTOR__");
184
2.84k
  if (HasP8Crypto)
185
58
    Builder.defineMacro("__CRYPTO__");
186
2.84k
  if (HasHTM)
187
64
    Builder.defineMacro("__HTM__");
188
2.84k
  if (HasFloat128)
189
8
    Builder.defineMacro("__FLOAT128__");
190
2.84k
  if (HasP9Vector)
191
19
    Builder.defineMacro("__POWER9_VECTOR__");
192
2.84k
193
2.84k
  Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1");
194
2.84k
  Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2");
195
2.84k
  Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4");
196
2.84k
  if (PointerWidth == 64)
197
2.77k
    Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8");
198
2.84k
199
2.84k
  // We have support for the bswap intrinsics so we can define this.
200
2.84k
  Builder.defineMacro("__HAVE_BSWAP__", "1");
201
2.84k
202
2.84k
  // FIXME: The following are not yet generated here by Clang, but are
203
2.84k
  //        generated by GCC:
204
2.84k
  //
205
2.84k
  //   _SOFT_FLOAT_
206
2.84k
  //   __RECIP_PRECISION__
207
2.84k
  //   __APPLE_ALTIVEC__
208
2.84k
  //   __RECIP__
209
2.84k
  //   __RECIPF__
210
2.84k
  //   __RSQRTE__
211
2.84k
  //   __RSQRTEF__
212
2.84k
  //   _SOFT_DOUBLE_
213
2.84k
  //   __NO_LWSYNC__
214
2.84k
  //   __CMODEL_MEDIUM__
215
2.84k
  //   __CMODEL_LARGE__
216
2.84k
  //   _CALL_SYSV
217
2.84k
  //   _CALL_DARWIN
218
2.84k
}
219
220
// Handle explicit options being passed to the compiler here: if we've
221
// explicitly turned off vsx and turned on any of:
222
// - power8-vector
223
// - direct-move
224
// - float128
225
// - power9-vector
226
// then go ahead and error since the customer has expressed an incompatible
227
// set of options.
228
static bool ppcUserFeaturesCheck(DiagnosticsEngine &Diags,
229
3.15k
                                 const std::vector<std::string> &FeaturesVec) {
230
3.15k
231
3.15k
  if (llvm::find(FeaturesVec, "-vsx") != FeaturesVec.end()) {
232
99
    if (llvm::find(FeaturesVec, "+power8-vector") != FeaturesVec.end()) {
233
4
      Diags.Report(diag::err_opt_not_valid_with_opt) << "-mpower8-vector"
234
4
                                                     << "-mno-vsx";
235
4
      return false;
236
4
    }
237
95
238
95
    if (llvm::find(FeaturesVec, "+direct-move") != FeaturesVec.end()) {
239
2
      Diags.Report(diag::err_opt_not_valid_with_opt) << "-mdirect-move"
240
2
                                                     << "-mno-vsx";
241
2
      return false;
242
2
    }
243
93
244
93
    if (llvm::find(FeaturesVec, "+float128") != FeaturesVec.end()) {
245
1
      Diags.Report(diag::err_opt_not_valid_with_opt) << "-mfloat128"
246
1
                                                     << "-mno-vsx";
247
1
      return false;
248
1
    }
249
92
250
92
    if (llvm::find(FeaturesVec, "+power9-vector") != FeaturesVec.end()) {
251
1
      Diags.Report(diag::err_opt_not_valid_with_opt) << "-mpower9-vector"
252
1
                                                     << "-mno-vsx";
253
1
      return false;
254
1
    }
255
3.14k
  }
256
3.14k
257
3.14k
  return true;
258
3.14k
}
259
260
bool PPCTargetInfo::initFeatureMap(
261
    llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags, StringRef CPU,
262
3.15k
    const std::vector<std::string> &FeaturesVec) const {
263
3.15k
  Features["altivec"] = llvm::StringSwitch<bool>(CPU)
264
3.15k
                            .Case("7400", true)
265
3.15k
                            .Case("g4", true)
266
3.15k
                            .Case("7450", true)
267
3.15k
                            .Case("g4+", true)
268
3.15k
                            .Case("970", true)
269
3.15k
                            .Case("g5", true)
270
3.15k
                            .Case("pwr6", true)
271
3.15k
                            .Case("pwr7", true)
272
3.15k
                            .Case("pwr8", true)
273
3.15k
                            .Case("pwr9", true)
274
3.15k
                            .Case("ppc64", true)
275
3.15k
                            .Case("ppc64le", true)
276
3.15k
                            .Default(false);
277
3.15k
278
3.15k
  Features["qpx"] = (CPU == "a2q");
279
3.15k
  Features["power9-vector"] = (CPU == "pwr9");
280
3.15k
  Features["crypto"] = llvm::StringSwitch<bool>(CPU)
281
3.15k
                           .Case("ppc64le", true)
282
3.15k
                           .Case("pwr9", true)
283
3.15k
                           .Case("pwr8", true)
284
3.15k
                           .Default(false);
285
3.15k
  Features["power8-vector"] = llvm::StringSwitch<bool>(CPU)
286
3.15k
                                  .Case("ppc64le", true)
287
3.15k
                                  .Case("pwr9", true)
288
3.15k
                                  .Case("pwr8", true)
289
3.15k
                                  .Default(false);
290
3.15k
  Features["bpermd"] = llvm::StringSwitch<bool>(CPU)
291
3.15k
                           .Case("ppc64le", true)
292
3.15k
                           .Case("pwr9", true)
293
3.15k
                           .Case("pwr8", true)
294
3.15k
                           .Case("pwr7", true)
295
3.15k
                           .Default(false);
296
3.15k
  Features["extdiv"] = llvm::StringSwitch<bool>(CPU)
297
3.15k
                           .Case("ppc64le", true)
298
3.15k
                           .Case("pwr9", true)
299
3.15k
                           .Case("pwr8", true)
300
3.15k
                           .Case("pwr7", true)
301
3.15k
                           .Default(false);
302
3.15k
  Features["direct-move"] = llvm::StringSwitch<bool>(CPU)
303
3.15k
                                .Case("ppc64le", true)
304
3.15k
                                .Case("pwr9", true)
305
3.15k
                                .Case("pwr8", true)
306
3.15k
                                .Default(false);
307
3.15k
  Features["vsx"] = llvm::StringSwitch<bool>(CPU)
308
3.15k
                        .Case("ppc64le", true)
309
3.15k
                        .Case("pwr9", true)
310
3.15k
                        .Case("pwr8", true)
311
3.15k
                        .Case("pwr7", true)
312
3.15k
                        .Default(false);
313
3.15k
  Features["htm"] = llvm::StringSwitch<bool>(CPU)
314
3.15k
                        .Case("ppc64le", true)
315
3.15k
                        .Case("pwr9", true)
316
3.15k
                        .Case("pwr8", true)
317
3.15k
                        .Default(false);
318
3.15k
319
3.15k
  Features["spe"] = llvm::StringSwitch<bool>(CPU)
320
3.15k
                        .Case("8548", true)
321
3.15k
                        .Case("e500", true)
322
3.15k
                        .Default(false);
323
3.15k
324
3.15k
  // Future CPU should include all of the features of Power 9 as well as any
325
3.15k
  // additional features (yet to be determined) specific to it.
326
3.15k
  if (CPU == "future") {
327
1
    initFeatureMap(Features, Diags, "pwr9", FeaturesVec);
328
1
    addFutureSpecificFeatures(Features);
329
1
  }
330
3.15k
331
3.15k
  if (!ppcUserFeaturesCheck(Diags, FeaturesVec))
332
8
    return false;
333
3.14k
334
3.14k
  if (!(ArchDefs & ArchDefinePwr9) && 
(ArchDefs & ArchDefinePpcgr)3.12k
&&
335
3.14k
      
llvm::find(FeaturesVec, "+float128") != FeaturesVec.end()274
) {
336
3
    // We have __float128 on PPC but not power 9 and above.
337
3
    Diags.Report(diag::err_opt_not_valid_with_opt) << "-mfloat128" << CPU;
338
3
    return false;
339
3
  }
340
3.14k
341
3.14k
  return TargetInfo::initFeatureMap(Features, Diags, CPU, FeaturesVec);
342
3.14k
}
343
344
// Add features specific to the "Future" CPU.
345
void PPCTargetInfo::addFutureSpecificFeatures(
346
1
    llvm::StringMap<bool> &Features) const {
347
1
  return;
348
1
}
349
350
20.5k
bool PPCTargetInfo::hasFeature(StringRef Feature) const {
351
20.5k
  return llvm::StringSwitch<bool>(Feature)
352
20.5k
      .Case("powerpc", true)
353
20.5k
      .Case("altivec", HasAltivec)
354
20.5k
      .Case("vsx", HasVSX)
355
20.5k
      .Case("power8-vector", HasP8Vector)
356
20.5k
      .Case("crypto", HasP8Crypto)
357
20.5k
      .Case("direct-move", HasDirectMove)
358
20.5k
      .Case("qpx", HasQPX)
359
20.5k
      .Case("htm", HasHTM)
360
20.5k
      .Case("bpermd", HasBPERMD)
361
20.5k
      .Case("extdiv", HasExtDiv)
362
20.5k
      .Case("float128", HasFloat128)
363
20.5k
      .Case("power9-vector", HasP9Vector)
364
20.5k
      .Case("spe", HasSPE)
365
20.5k
      .Default(false);
366
20.5k
}
367
368
void PPCTargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
369
3.31k
                                      StringRef Name, bool Enabled) const {
370
3.31k
  if (Enabled) {
371
1.72k
    // If we're enabling any of the vsx based features then enable vsx and
372
1.72k
    // altivec. We'll diagnose any problems later.
373
1.72k
    bool FeatureHasVSX = llvm::StringSwitch<bool>(Name)
374
1.72k
                             .Case("vsx", true)
375
1.72k
                             .Case("direct-move", true)
376
1.72k
                             .Case("power8-vector", true)
377
1.72k
                             .Case("power9-vector", true)
378
1.72k
                             .Case("float128", true)
379
1.72k
                             .Default(false);
380
1.72k
    if (FeatureHasVSX)
381
648
      Features["vsx"] = Features["altivec"] = true;
382
1.72k
    if (Name == "power9-vector")
383
10
      Features["power8-vector"] = true;
384
1.72k
    Features[Name] = true;
385
1.72k
  } else {
386
1.59k
    // If we're disabling altivec or vsx go ahead and disable all of the vsx
387
1.59k
    // features.
388
1.59k
    if ((Name == "altivec") || 
(Name == "vsx")1.50k
)
389
180
      Features["vsx"] = Features["direct-move"] = Features["power8-vector"] =
390
180
          Features["float128"] = Features["power9-vector"] = false;
391
1.59k
    if (Name == "power8-vector")
392
90
      Features["power9-vector"] = false;
393
1.59k
    Features[Name] = false;
394
1.59k
  }
395
3.31k
}
396
397
const char *const PPCTargetInfo::GCCRegNames[] = {
398
    "r0",  "r1",     "r2",   "r3",      "r4",      "r5",  "r6",  "r7",  "r8",
399
    "r9",  "r10",    "r11",  "r12",     "r13",     "r14", "r15", "r16", "r17",
400
    "r18", "r19",    "r20",  "r21",     "r22",     "r23", "r24", "r25", "r26",
401
    "r27", "r28",    "r29",  "r30",     "r31",     "f0",  "f1",  "f2",  "f3",
402
    "f4",  "f5",     "f6",   "f7",      "f8",      "f9",  "f10", "f11", "f12",
403
    "f13", "f14",    "f15",  "f16",     "f17",     "f18", "f19", "f20", "f21",
404
    "f22", "f23",    "f24",  "f25",     "f26",     "f27", "f28", "f29", "f30",
405
    "f31", "mq",     "lr",   "ctr",     "ap",      "cr0", "cr1", "cr2", "cr3",
406
    "cr4", "cr5",    "cr6",  "cr7",     "xer",     "v0",  "v1",  "v2",  "v3",
407
    "v4",  "v5",     "v6",   "v7",      "v8",      "v9",  "v10", "v11", "v12",
408
    "v13", "v14",    "v15",  "v16",     "v17",     "v18", "v19", "v20", "v21",
409
    "v22", "v23",    "v24",  "v25",     "v26",     "v27", "v28", "v29", "v30",
410
    "v31", "vrsave", "vscr", "spe_acc", "spefscr", "sfp"
411
};
412
413
112
ArrayRef<const char *> PPCTargetInfo::getGCCRegNames() const {
414
112
  return llvm::makeArrayRef(GCCRegNames);
415
112
}
416
417
const TargetInfo::GCCRegAlias PPCTargetInfo::GCCRegAliases[] = {
418
    // While some of these aliases do map to different registers
419
    // they still share the same register name.
420
    {{"0"}, "r0"},     {{"1"}, "r1"},     {{"2"}, "r2"},     {{"3"}, "r3"},
421
    {{"4"}, "r4"},     {{"5"}, "r5"},     {{"6"}, "r6"},     {{"7"}, "r7"},
422
    {{"8"}, "r8"},     {{"9"}, "r9"},     {{"10"}, "r10"},   {{"11"}, "r11"},
423
    {{"12"}, "r12"},   {{"13"}, "r13"},   {{"14"}, "r14"},   {{"15"}, "r15"},
424
    {{"16"}, "r16"},   {{"17"}, "r17"},   {{"18"}, "r18"},   {{"19"}, "r19"},
425
    {{"20"}, "r20"},   {{"21"}, "r21"},   {{"22"}, "r22"},   {{"23"}, "r23"},
426
    {{"24"}, "r24"},   {{"25"}, "r25"},   {{"26"}, "r26"},   {{"27"}, "r27"},
427
    {{"28"}, "r28"},   {{"29"}, "r29"},   {{"30"}, "r30"},   {{"31"}, "r31"},
428
    {{"fr0"}, "f0"},   {{"fr1"}, "f1"},   {{"fr2"}, "f2"},   {{"fr3"}, "f3"},
429
    {{"fr4"}, "f4"},   {{"fr5"}, "f5"},   {{"fr6"}, "f6"},   {{"fr7"}, "f7"},
430
    {{"fr8"}, "f8"},   {{"fr9"}, "f9"},   {{"fr10"}, "f10"}, {{"fr11"}, "f11"},
431
    {{"fr12"}, "f12"}, {{"fr13"}, "f13"}, {{"fr14"}, "f14"}, {{"fr15"}, "f15"},
432
    {{"fr16"}, "f16"}, {{"fr17"}, "f17"}, {{"fr18"}, "f18"}, {{"fr19"}, "f19"},
433
    {{"fr20"}, "f20"}, {{"fr21"}, "f21"}, {{"fr22"}, "f22"}, {{"fr23"}, "f23"},
434
    {{"fr24"}, "f24"}, {{"fr25"}, "f25"}, {{"fr26"}, "f26"}, {{"fr27"}, "f27"},
435
    {{"fr28"}, "f28"}, {{"fr29"}, "f29"}, {{"fr30"}, "f30"}, {{"fr31"}, "f31"},
436
    {{"cc"}, "cr0"},
437
};
438
439
98
ArrayRef<TargetInfo::GCCRegAlias> PPCTargetInfo::getGCCRegAliases() const {
440
98
  return llvm::makeArrayRef(GCCRegAliases);
441
98
}
442
443
// PPC ELFABIv2 DWARF Definitoin "Table 2.26. Mappings of Common Registers".
444
// vs0 ~ vs31 is mapping to 32 - 63,
445
// vs32 ~ vs63 is mapping to 77 - 108. 
446
const TargetInfo::AddlRegName GCCAddlRegNames[] = {
447
    // Table of additional register names to use in user input.
448
    {{"vs0"}, 32},   {{"vs1"}, 33},   {{"vs2"}, 34},   {{"vs3"}, 35}, 
449
    {{"vs4"}, 36},   {{"vs5"}, 37},   {{"vs6"}, 38},   {{"vs7"}, 39},
450
    {{"vs8"}, 40},   {{"vs9"}, 41},   {{"vs10"}, 42},  {{"vs11"}, 43},
451
    {{"vs12"}, 44},  {{"vs13"}, 45},  {{"vs14"}, 46},  {{"vs15"}, 47},
452
    {{"vs16"}, 48},  {{"vs17"}, 49},  {{"vs18"}, 50},  {{"vs19"}, 51},
453
    {{"vs20"}, 52},  {{"vs21"}, 53},  {{"vs22"}, 54},  {{"vs23"}, 55},
454
    {{"vs24"}, 56},  {{"vs25"}, 57},  {{"vs26"}, 58},  {{"vs27"}, 59},
455
    {{"vs28"}, 60},  {{"vs29"}, 61},  {{"vs30"}, 62},  {{"vs31"}, 63},
456
    {{"vs32"}, 77},  {{"vs33"}, 78},  {{"vs34"}, 79},  {{"vs35"}, 80},
457
    {{"vs36"}, 81},  {{"vs37"}, 82},  {{"vs38"}, 83},  {{"vs39"}, 84},
458
    {{"vs40"}, 85},  {{"vs41"}, 86},  {{"vs42"}, 87},  {{"vs43"}, 88},
459
    {{"vs44"}, 89},  {{"vs45"}, 90},  {{"vs46"}, 91},  {{"vs47"}, 92},
460
    {{"vs48"}, 93},  {{"vs49"}, 94},  {{"vs50"}, 95},  {{"vs51"}, 96},
461
    {{"vs52"}, 97},  {{"vs53"}, 98},  {{"vs54"}, 99},  {{"vs55"}, 100},
462
    {{"vs56"}, 101}, {{"vs57"}, 102}, {{"vs58"}, 103}, {{"vs59"}, 104},
463
    {{"vs60"}, 105}, {{"vs61"}, 106}, {{"vs62"}, 107}, {{"vs63"}, 108},
464
};
465
466
103
ArrayRef<TargetInfo::AddlRegName> PPCTargetInfo::getGCCAddlRegNames() const {
467
103
  if (ABI == "elfv2")
468
44
    return llvm::makeArrayRef(GCCAddlRegNames);
469
59
  else 
470
59
    return TargetInfo::getGCCAddlRegNames(); 
471
103
}
472
473
static constexpr llvm::StringLiteral ValidCPUNames[] = {
474
    {"generic"},   {"440"},       {"450"},         {"601"},         {"602"},
475
    {"603"},       {"603e"},      {"603ev"},       {"604"},         {"604e"},
476
    {"620"},       {"630"},       {"g3"},          {"7400"},        {"g4"},
477
    {"7450"},      {"g4+"},       {"750"},         {"8548"},        {"970"},
478
    {"g5"},        {"a2"},        {"a2q"},         {"e500"},        {"e500mc"},
479
    {"e5500"},     {"power3"},    {"pwr3"},        {"power4"},      {"pwr4"},
480
    {"power5"},    {"pwr5"},      {"power5x"},     {"pwr5x"},       {"power6"},
481
    {"pwr6"},      {"power6x"},   {"pwr6x"},       {"power7"},      {"pwr7"},
482
    {"power8"},    {"pwr8"},      {"power9"},      {"pwr9"},        {"powerpc"},
483
    {"ppc"},       {"powerpc64"}, {"ppc64"},       {"powerpc64le"}, {"ppc64le"},
484
    {"future"}
485
};
486
487
119
bool PPCTargetInfo::isValidCPUName(StringRef Name) const {
488
119
  return llvm::find(ValidCPUNames, Name) != std::end(ValidCPUNames);
489
119
}
490
491
1
void PPCTargetInfo::fillValidCPUList(SmallVectorImpl<StringRef> &Values) const {
492
1
  Values.append(std::begin(ValidCPUNames), std::end(ValidCPUNames));
493
1
}
494
495
5.64k
void PPCTargetInfo::adjust(LangOptions &Opts) {
496
5.64k
  if (HasAltivec)
497
258
    Opts.AltiVec = 1;
498
5.64k
  TargetInfo::adjust(Opts);
499
5.64k
  if (LongDoubleFormat != &llvm::APFloat::IEEEdouble())
500
5.56k
    LongDoubleFormat = Opts.PPCIEEELongDouble
501
5.56k
                           ? 
&llvm::APFloat::IEEEquad()4
502
5.56k
                           : 
&llvm::APFloat::PPCDoubleDouble()5.56k
;
503
5.64k
}
504
505
2.84k
ArrayRef<Builtin::Info> PPCTargetInfo::getTargetBuiltins() const {
506
2.84k
  return llvm::makeArrayRef(BuiltinInfo, clang::PPC::LastTSBuiltin -
507
2.84k
                                             Builtin::FirstTSBuiltin);
508
2.84k
}