Coverage Report

Created: 2021-09-21 08:58

/Users/buildslave/jenkins/workspace/coverage/llvm-project/clang/lib/Basic/Targets/SystemZ.h
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//===--- SystemZ.h - Declare SystemZ target feature support -----*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares SystemZ TargetInfo objects.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CLANG_LIB_BASIC_TARGETS_SYSTEMZ_H
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#define LLVM_CLANG_LIB_BASIC_TARGETS_SYSTEMZ_H
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#include "clang/Basic/TargetInfo.h"
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#include "clang/Basic/TargetOptions.h"
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#include "llvm/ADT/Triple.h"
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#include "llvm/Support/Compiler.h"
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namespace clang {
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namespace targets {
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class LLVM_LIBRARY_VISIBILITY SystemZTargetInfo : public TargetInfo {
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  static const Builtin::Info BuiltinInfo[];
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  static const char *const GCCRegNames[];
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  std::string CPU;
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  int ISARevision;
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  bool HasTransactionalExecution;
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  bool HasVector;
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  bool SoftFloat;
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public:
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  SystemZTargetInfo(const llvm::Triple &Triple, const TargetOptions &)
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      : TargetInfo(Triple), CPU("z10"), ISARevision(8),
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        HasTransactionalExecution(false), HasVector(false), SoftFloat(false) {
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    IntMaxType = SignedLong;
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    Int64Type = SignedLong;
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    TLSSupported = true;
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    IntWidth = IntAlign = 32;
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    LongWidth = LongLongWidth = LongAlign = LongLongAlign = 64;
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    PointerWidth = PointerAlign = 64;
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    LongDoubleWidth = 128;
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    LongDoubleAlign = 64;
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    LongDoubleFormat = &llvm::APFloat::IEEEquad();
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    DefaultAlignForAttributeAligned = 64;
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    MinGlobalAlign = 16;
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    resetDataLayout("E-m:e-i1:8:16-i8:8:16-i64:64-f128:64-a:8:16-n32:64");
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    MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
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    HasStrictFP = true;
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  }
clang::targets::SystemZTargetInfo::SystemZTargetInfo(llvm::Triple const&, clang::TargetOptions const&)
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        HasTransactionalExecution(false), HasVector(false), SoftFloat(false) {
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    IntMaxType = SignedLong;
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    Int64Type = SignedLong;
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    TLSSupported = true;
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    IntWidth = IntAlign = 32;
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    LongWidth = LongLongWidth = LongAlign = LongLongAlign = 64;
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    PointerWidth = PointerAlign = 64;
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    LongDoubleWidth = 128;
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    LongDoubleAlign = 64;
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    LongDoubleFormat = &llvm::APFloat::IEEEquad();
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    DefaultAlignForAttributeAligned = 64;
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    MinGlobalAlign = 16;
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    resetDataLayout("E-m:e-i1:8:16-i8:8:16-i64:64-f128:64-a:8:16-n32:64");
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    MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
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    HasStrictFP = true;
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  }
clang::targets::SystemZTargetInfo::SystemZTargetInfo(llvm::Triple const&, clang::TargetOptions const&)
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        HasTransactionalExecution(false), HasVector(false), SoftFloat(false) {
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    IntMaxType = SignedLong;
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    Int64Type = SignedLong;
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    TLSSupported = true;
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    IntWidth = IntAlign = 32;
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    LongWidth = LongLongWidth = LongAlign = LongLongAlign = 64;
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    PointerWidth = PointerAlign = 64;
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    LongDoubleWidth = 128;
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    LongDoubleAlign = 64;
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    LongDoubleFormat = &llvm::APFloat::IEEEquad();
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    DefaultAlignForAttributeAligned = 64;
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    MinGlobalAlign = 16;
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    resetDataLayout("E-m:e-i1:8:16-i8:8:16-i64:64-f128:64-a:8:16-n32:64");
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    MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
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    HasStrictFP = true;
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  }
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  void getTargetDefines(const LangOptions &Opts,
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                        MacroBuilder &Builder) const override;
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  ArrayRef<Builtin::Info> getTargetBuiltins() const override;
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  ArrayRef<const char *> getGCCRegNames() const override;
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  ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override {
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    // No aliases.
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    return None;
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  }
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  ArrayRef<TargetInfo::AddlRegName> getGCCAddlRegNames() const override;
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  bool isSPRegName(StringRef RegName) const override {
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    return RegName.equals("r15");
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  }
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  bool validateAsmConstraint(const char *&Name,
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                             TargetInfo::ConstraintInfo &info) const override;
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  const char *getClobbers() const override {
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    // FIXME: Is this really right?
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    return "";
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  }
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  BuiltinVaListKind getBuiltinVaListKind() const override {
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    return TargetInfo::SystemZBuiltinVaList;
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  }
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  int getISARevision(StringRef Name) const;
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  bool isValidCPUName(StringRef Name) const override {
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    return getISARevision(Name) != -1;
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  }
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  void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override;
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  bool setCPU(const std::string &Name) override {
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    CPU = Name;
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    ISARevision = getISARevision(CPU);
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    return ISARevision != -1;
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  }
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  bool
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  initFeatureMap(llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags,
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                 StringRef CPU,
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                 const std::vector<std::string> &FeaturesVec) const override {
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    int ISARevision = getISARevision(CPU);
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    if (ISARevision >= 10)
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      Features["transactional-execution"] = true;
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    if (ISARevision >= 11)
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      Features["vector"] = true;
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    if (ISARevision >= 12)
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      Features["vector-enhancements-1"] = true;
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    if (ISARevision >= 13)
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      Features["vector-enhancements-2"] = true;
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    if (ISARevision >= 14)
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      Features["nnp-assist"] = true;
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    return TargetInfo::initFeatureMap(Features, Diags, CPU, FeaturesVec);
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  }
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  bool handleTargetFeatures(std::vector<std::string> &Features,
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                            DiagnosticsEngine &Diags) override {
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    HasTransactionalExecution = false;
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    HasVector = false;
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    SoftFloat = false;
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    for (const auto &Feature : Features) {
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      if (Feature == "+transactional-execution")
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        HasTransactionalExecution = true;
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      else if (Feature == "+vector")
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        HasVector = true;
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      else if (Feature == "+soft-float")
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        SoftFloat = true;
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    }
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    HasVector &= !SoftFloat;
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    // If we use the vector ABI, vector types are 64-bit aligned.
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    if (HasVector) {
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      MaxVectorAlign = 64;
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      resetDataLayout("E-m:e-i1:8:16-i8:8:16-i64:64-f128:64"
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                      "-v128:64-a:8:16-n32:64");
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    }
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    return true;
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  }
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  bool hasFeature(StringRef Feature) const override;
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  CallingConvCheckResult checkCallingConvention(CallingConv CC) const override {
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    switch (CC) {
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    case CC_C:
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    case CC_Swift:
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    case CC_OpenCLKernel:
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      return CCCR_OK;
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    case CC_SwiftAsync:
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      return CCCR_Error;
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    default:
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      return CCCR_Warning;
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    }
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  }
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  StringRef getABI() const override {
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    if (HasVector)
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      return "vector";
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    return "";
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  }
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  const char *getLongDoubleMangling() const override { return "g"; }
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  bool hasExtIntType() const override { return true; }
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  int getEHDataRegisterNumber(unsigned RegNo) const override {
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    return RegNo < 4 ? 6 + RegNo : 
-10
;
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  }
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};
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} // namespace targets
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} // namespace clang
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#endif // LLVM_CLANG_LIB_BASIC_TARGETS_SYSTEMZ_H