Coverage Report

Created: 2020-09-15 12:33

/Users/buildslave/jenkins/workspace/coverage/llvm-project/clang/lib/Driver/ToolChains/Arch/ARM.cpp
Line
Count
Source (jump to first uncovered line)
1
//===--- ARM.cpp - ARM (not AArch64) Helpers for Tools ----------*- C++ -*-===//
2
//
3
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4
// See https://llvm.org/LICENSE.txt for license information.
5
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6
//
7
//===----------------------------------------------------------------------===//
8
9
#include "ARM.h"
10
#include "clang/Driver/Driver.h"
11
#include "clang/Driver/DriverDiagnostic.h"
12
#include "clang/Driver/Options.h"
13
#include "llvm/ADT/StringSwitch.h"
14
#include "llvm/Option/ArgList.h"
15
#include "llvm/Support/TargetParser.h"
16
#include "llvm/Support/Host.h"
17
18
using namespace clang::driver;
19
using namespace clang::driver::tools;
20
using namespace clang;
21
using namespace llvm::opt;
22
23
// Get SubArch (vN).
24
5.55k
int arm::getARMSubArchVersionNumber(const llvm::Triple &Triple) {
25
5.55k
  llvm::StringRef Arch = Triple.getArchName();
26
5.55k
  return llvm::ARM::parseArchVersion(Arch);
27
5.55k
}
28
29
// True if M-profile.
30
20
bool arm::isARMMProfile(const llvm::Triple &Triple) {
31
20
  llvm::StringRef Arch = Triple.getArchName();
32
20
  return llvm::ARM::parseArchProfile(Arch) == llvm::ARM::ProfileKind::M;
33
20
}
34
35
// Get Arch/CPU from args.
36
void arm::getARMArchCPUFromArgs(const ArgList &Args, llvm::StringRef &Arch,
37
3.47k
                                llvm::StringRef &CPU, bool FromAs) {
38
3.47k
  if (const Arg *A = Args.getLastArg(clang::driver::options::OPT_mcpu_EQ))
39
1.03k
    CPU = A->getValue();
40
3.47k
  if (const Arg *A = Args.getLastArg(options::OPT_march_EQ))
41
1.00k
    Arch = A->getValue();
42
3.47k
  if (!FromAs)
43
3.41k
    return;
44
63
45
63
  for (const Arg *A :
46
14
       Args.filtered(options::OPT_Wa_COMMA, options::OPT_Xassembler)) {
47
14
    StringRef Value = A->getValue();
48
14
    if (Value.startswith("-mcpu="))
49
3
      CPU = Value.substr(6);
50
14
    if (Value.startswith("-march="))
51
2
      Arch = Value.substr(7);
52
14
  }
53
63
}
54
55
// Handle -mhwdiv=.
56
// FIXME: Use ARMTargetParser.
57
static void getARMHWDivFeatures(const Driver &D, const Arg *A,
58
                                const ArgList &Args, StringRef HWDiv,
59
25
                                std::vector<StringRef> &Features) {
60
25
  uint64_t HWDivID = llvm::ARM::parseHWDiv(HWDiv);
61
25
  if (!llvm::ARM::getHWDivFeatures(HWDivID, Features))
62
1
    D.Diag(clang::diag::err_drv_clang_unsupported) << A->getAsString(Args);
63
25
}
64
65
// Handle -mfpu=.
66
static unsigned getARMFPUFeatures(const Driver &D, const Arg *A,
67
                                  const ArgList &Args, StringRef FPU,
68
147
                                  std::vector<StringRef> &Features) {
69
147
  unsigned FPUID = llvm::ARM::parseFPU(FPU);
70
147
  if (!llvm::ARM::getFPUFeatures(FPUID, Features))
71
6
    D.Diag(clang::diag::err_drv_clang_unsupported) << A->getAsString(Args);
72
147
  return FPUID;
73
147
}
74
75
// Decode ARM features from string like +[no]featureA+[no]featureB+...
76
static bool DecodeARMFeatures(const Driver &D, StringRef text, StringRef CPU,
77
                              llvm::ARM::ArchKind ArchKind,
78
                              std::vector<StringRef> &Features,
79
173
                              unsigned &ArgFPUID) {
80
173
  SmallVector<StringRef, 8> Split;
81
173
  text.split(Split, StringRef("+"), -1, false);
82
173
83
249
  for (StringRef Feature : Split) {
84
249
    if (!appendArchExtFeatures(CPU, ArchKind, Feature, Features, ArgFPUID))
85
1
      return false;
86
249
  }
87
172
  return true;
88
173
}
89
90
static void DecodeARMFeaturesFromCPU(const Driver &D, StringRef CPU,
91
522
                                     std::vector<StringRef> &Features) {
92
522
  CPU = CPU.split("+").first;
93
522
  if (CPU != "generic") {
94
487
    llvm::ARM::ArchKind ArchKind = llvm::ARM::parseCPUArch(CPU);
95
487
    uint64_t Extension = llvm::ARM::getDefaultExtensions(CPU, ArchKind);
96
487
    llvm::ARM::getExtensionFeatures(Extension, Features);
97
487
  }
98
522
}
99
100
// Check if -march is valid by checking if it can be canonicalised and parsed.
101
// getARMArch is used here instead of just checking the -march value in order
102
// to handle -march=native correctly.
103
static void checkARMArchName(const Driver &D, const Arg *A, const ArgList &Args,
104
                             llvm::StringRef ArchName, llvm::StringRef CPUName,
105
                             std::vector<StringRef> &Features,
106
514
                             const llvm::Triple &Triple, unsigned &ArgFPUID) {
107
514
  std::pair<StringRef, StringRef> Split = ArchName.split("+");
108
514
109
514
  std::string MArch = arm::getARMArch(ArchName, Triple);
110
514
  llvm::ARM::ArchKind ArchKind = llvm::ARM::parseArch(MArch);
111
514
  if (ArchKind == llvm::ARM::ArchKind::INVALID ||
112
509
      (Split.second.size() && !DecodeARMFeatures(D, Split.second, CPUName,
113
152
                                                 ArchKind, Features, ArgFPUID)))
114
5
    D.Diag(clang::diag::err_drv_clang_unsupported) << A->getAsString(Args);
115
514
}
116
117
// Check -mcpu=. Needs ArchName to handle -mcpu=generic.
118
static void checkARMCPUName(const Driver &D, const Arg *A, const ArgList &Args,
119
                            llvm::StringRef CPUName, llvm::StringRef ArchName,
120
                            std::vector<StringRef> &Features,
121
522
                            const llvm::Triple &Triple, unsigned &ArgFPUID) {
122
522
  std::pair<StringRef, StringRef> Split = CPUName.split("+");
123
522
124
522
  std::string CPU = arm::getARMTargetCPU(CPUName, ArchName, Triple);
125
522
  llvm::ARM::ArchKind ArchKind =
126
522
    arm::getLLVMArchKindForARM(CPU, ArchName, Triple);
127
522
  if (ArchKind == llvm::ARM::ArchKind::INVALID ||
128
520
      (Split.second.size() &&
129
21
       !DecodeARMFeatures(D, Split.second, CPU, ArchKind, Features, ArgFPUID)))
130
3
    D.Diag(clang::diag::err_drv_clang_unsupported) << A->getAsString(Args);
131
522
}
132
133
25
bool arm::useAAPCSForMachO(const llvm::Triple &T) {
134
  // The backend is hardwired to assume AAPCS for M-class processors, ensure
135
  // the frontend matches that.
136
25
  return T.getEnvironment() == llvm::Triple::EABI ||
137
23
         T.getOS() == llvm::Triple::UnknownOS || 
isARMMProfile(T)8
;
138
25
}
139
140
// Select mode for reading thread pointer (-mtp=soft/cp15).
141
1.76k
arm::ReadTPMode arm::getReadTPMode(const Driver &D, const ArgList &Args) {
142
1.76k
  if (Arg *A = Args.getLastArg(options::OPT_mtp_mode_EQ)) {
143
2
    arm::ReadTPMode ThreadPointer =
144
2
        llvm::StringSwitch<arm::ReadTPMode>(A->getValue())
145
2
            .Case("cp15", ReadTPMode::Cp15)
146
2
            .Case("soft", ReadTPMode::Soft)
147
2
            .Default(ReadTPMode::Invalid);
148
2
    if (ThreadPointer != ReadTPMode::Invalid)
149
2
      return ThreadPointer;
150
0
    if (StringRef(A->getValue()).empty())
151
0
      D.Diag(diag::err_drv_missing_arg_mtp) << A->getAsString(Args);
152
0
    else
153
0
      D.Diag(diag::err_drv_invalid_mtp) << A->getAsString(Args);
154
0
    return ReadTPMode::Invalid;
155
0
  }
156
1.75k
  return ReadTPMode::Soft;
157
1.75k
}
158
159
1.92k
arm::FloatABI arm::getARMFloatABI(const ToolChain &TC, const ArgList &Args) {
160
1.92k
  return arm::getARMFloatABI(TC.getDriver(), TC.getEffectiveTriple(), Args);
161
1.92k
}
162
163
// Select the float ABI as determined by -msoft-float, -mhard-float, and
164
// -mfloat-abi=.
165
arm::FloatABI arm::getARMFloatABI(const Driver &D, const llvm::Triple &Triple,
166
3.68k
                                  const ArgList &Args) {
167
3.68k
  auto SubArch = getARMSubArchVersionNumber(Triple);
168
3.68k
  arm::FloatABI ABI = FloatABI::Invalid;
169
3.68k
  if (Arg *A =
170
159
          Args.getLastArg(options::OPT_msoft_float, options::OPT_mhard_float,
171
159
                          options::OPT_mfloat_abi_EQ)) {
172
159
    if (A->getOption().matches(options::OPT_msoft_float)) {
173
12
      ABI = FloatABI::Soft;
174
147
    } else if (A->getOption().matches(options::OPT_mhard_float)) {
175
20
      ABI = FloatABI::Hard;
176
127
    } else {
177
127
      ABI = llvm::StringSwitch<arm::FloatABI>(A->getValue())
178
127
                .Case("soft", FloatABI::Soft)
179
127
                .Case("softfp", FloatABI::SoftFP)
180
127
                .Case("hard", FloatABI::Hard)
181
127
                .Default(FloatABI::Invalid);
182
127
      if (ABI == FloatABI::Invalid && 
!StringRef(A->getValue()).empty()0
) {
183
0
        D.Diag(diag::err_drv_invalid_mfloat_abi) << A->getAsString(Args);
184
0
        ABI = FloatABI::Soft;
185
0
      }
186
127
    }
187
159
188
    // It is incorrect to select hard float ABI on MachO platforms if the ABI is
189
    // "apcs-gnu".
190
159
    if (Triple.isOSBinFormatMachO() && 
!useAAPCSForMachO(Triple)25
&&
191
8
        ABI == FloatABI::Hard) {
192
4
      D.Diag(diag::err_drv_unsupported_opt_for_target) << A->getAsString(Args)
193
4
                                                       << Triple.getArchName();
194
4
    }
195
159
  }
196
3.68k
197
  // If unspecified, choose the default based on the platform.
198
3.68k
  if (ABI == FloatABI::Invalid) {
199
3.52k
    switch (Triple.getOS()) {
200
164
    case llvm::Triple::Darwin:
201
164
    case llvm::Triple::MacOSX:
202
164
    case llvm::Triple::IOS:
203
164
    case llvm::Triple::TvOS: {
204
      // Darwin defaults to "softfp" for v6 and v7.
205
164
      ABI = (SubArch == 6 || 
SubArch == 7150
) ?
FloatABI::SoftFP152
:
FloatABI::Soft12
;
206
156
      ABI = Triple.isWatchABI() ? 
FloatABI::Hard8
: ABI;
207
164
      break;
208
164
    }
209
42
    case llvm::Triple::WatchOS:
210
42
      ABI = FloatABI::Hard;
211
42
      break;
212
164
213
    // FIXME: this is invalid for WindowsCE
214
135
    case llvm::Triple::Win32:
215
135
      ABI = FloatABI::Hard;
216
135
      break;
217
164
218
78
    case llvm::Triple::NetBSD:
219
78
      switch (Triple.getEnvironment()) {
220
12
      case llvm::Triple::EABIHF:
221
12
      case llvm::Triple::GNUEABIHF:
222
12
        ABI = FloatABI::Hard;
223
12
        break;
224
66
      default:
225
66
        ABI = FloatABI::Soft;
226
66
        break;
227
78
      }
228
78
      break;
229
78
230
15
    case llvm::Triple::FreeBSD:
231
15
      switch (Triple.getEnvironment()) {
232
7
      case llvm::Triple::GNUEABIHF:
233
7
        ABI = FloatABI::Hard;
234
7
        break;
235
8
      default:
236
        // FreeBSD defaults to soft float
237
8
        ABI = FloatABI::Soft;
238
8
        break;
239
15
      }
240
15
      break;
241
15
242
30
    case llvm::Triple::OpenBSD:
243
30
      ABI = FloatABI::SoftFP;
244
30
      break;
245
15
246
3.05k
    default:
247
3.05k
      switch (Triple.getEnvironment()) {
248
142
      case llvm::Triple::GNUEABIHF:
249
142
      case llvm::Triple::MuslEABIHF:
250
142
      case llvm::Triple::EABIHF:
251
142
        ABI = FloatABI::Hard;
252
142
        break;
253
1.45k
      case llvm::Triple::GNUEABI:
254
1.45k
      case llvm::Triple::MuslEABI:
255
1.45k
      case llvm::Triple::EABI:
256
        // EABI is always AAPCS, and if it was not marked 'hard', it's softfp
257
1.45k
        ABI = FloatABI::SoftFP;
258
1.45k
        break;
259
212
      case llvm::Triple::Android:
260
169
        ABI = (SubArch >= 7) ? 
FloatABI::SoftFP43
: FloatABI::Soft;
261
212
        break;
262
1.25k
      default:
263
        // Assume "soft", but warn the user we are guessing.
264
1.25k
        if (Triple.isOSBinFormatMachO() &&
265
54
            Triple.getSubArch() == llvm::Triple::ARMSubArch_v7em)
266
11
          ABI = FloatABI::Hard;
267
1.24k
        else
268
1.24k
          ABI = FloatABI::Soft;
269
1.25k
270
1.25k
        if (Triple.getOS() != llvm::Triple::UnknownOS ||
271
1.02k
            !Triple.isOSBinFormatMachO())
272
1.20k
          D.Diag(diag::warn_drv_assuming_mfloat_abi_is) << "soft";
273
1.25k
        break;
274
3.68k
      }
275
3.52k
    }
276
3.52k
  }
277
3.68k
278
3.68k
  assert(ABI != FloatABI::Invalid && "must select an ABI");
279
3.68k
  return ABI;
280
3.68k
}
281
282
26
static bool hasIntegerMVE(const std::vector<StringRef> &F) {
283
26
  auto MVE = llvm::find(llvm::reverse(F), "+mve");
284
26
  auto NoMVE = llvm::find(llvm::reverse(F), "-mve");
285
26
  return MVE != F.rend() &&
286
5
         (NoMVE == F.rend() || 
std::distance(MVE, NoMVE) > 01
);
287
26
}
288
289
void arm::getARMTargetFeatures(const Driver &D, const llvm::Triple &Triple,
290
                               const ArgList &Args, ArgStringList &CmdArgs,
291
1.76k
                               std::vector<StringRef> &Features, bool ForAS) {
292
1.76k
  bool KernelOrKext =
293
1.76k
      Args.hasArg(options::OPT_mkernel, options::OPT_fapple_kext);
294
1.76k
  arm::FloatABI ABI = arm::getARMFloatABI(D, Triple, Args);
295
1.76k
  arm::ReadTPMode ThreadPointer = arm::getReadTPMode(D, Args);
296
1.76k
  const Arg *WaCPU = nullptr, *WaFPU = nullptr;
297
1.76k
  const Arg *WaHDiv = nullptr, *WaArch = nullptr;
298
1.76k
299
  // This vector will accumulate features from the architecture
300
  // extension suffixes on -mcpu and -march (e.g. the 'bar' in
301
  // -mcpu=foo+bar). We want to apply those after the features derived
302
  // from the FPU, in case -mfpu generates a negative feature which
303
  // the +bar is supposed to override.
304
1.76k
  std::vector<StringRef> ExtensionFeatures;
305
1.76k
306
1.76k
  if (!ForAS) {
307
    // FIXME: Note, this is a hack, the LLVM backend doesn't actually use these
308
    // yet (it uses the -mfloat-abi and -msoft-float options), and it is
309
    // stripped out by the ARM target. We should probably pass this a new
310
    // -target-option, which is handled by the -cc1/-cc1as invocation.
311
    //
312
    // FIXME2:  For consistency, it would be ideal if we set up the target
313
    // machine state the same when using the frontend or the assembler. We don't
314
    // currently do that for the assembler, we pass the options directly to the
315
    // backend and never even instantiate the frontend TargetInfo. If we did,
316
    // and used its handleTargetFeatures hook, then we could ensure the
317
    // assembler and the frontend behave the same.
318
1.70k
319
    // Use software floating point operations?
320
1.70k
    if (ABI == arm::FloatABI::Soft)
321
738
      Features.push_back("+soft-float");
322
1.70k
323
    // Use software floating point argument passing?
324
1.70k
    if (ABI != arm::FloatABI::Hard)
325
1.52k
      Features.push_back("+soft-float-abi");
326
54
  } else {
327
    // Here, we make sure that -Wa,-mfpu/cpu/arch/hwdiv will be passed down
328
    // to the assembler correctly.
329
54
    for (const Arg *A :
330
14
         Args.filtered(options::OPT_Wa_COMMA, options::OPT_Xassembler)) {
331
14
      StringRef Value = A->getValue();
332
14
      if (Value.startswith("-mfpu=")) {
333
3
        WaFPU = A;
334
11
      } else if (Value.startswith("-mcpu=")) {
335
3
        WaCPU = A;
336
8
      } else if (Value.startswith("-mhwdiv=")) {
337
4
        WaHDiv = A;
338
4
      } else if (Value.startswith("-march=")) {
339
2
        WaArch = A;
340
2
      }
341
14
    }
342
54
  }
343
1.76k
344
1.76k
  if (ThreadPointer == arm::ReadTPMode::Cp15)
345
1
    Features.push_back("+read-tp-hard");
346
1.76k
347
1.76k
  const Arg *ArchArg = Args.getLastArg(options::OPT_march_EQ);
348
1.76k
  const Arg *CPUArg = Args.getLastArg(options::OPT_mcpu_EQ);
349
1.76k
  StringRef ArchName;
350
1.76k
  StringRef CPUName;
351
1.76k
  unsigned ArchArgFPUID = llvm::ARM::FK_INVALID;
352
1.76k
  unsigned CPUArgFPUID = llvm::ARM::FK_INVALID;
353
1.76k
354
  // Check -mcpu. ClangAs gives preference to -Wa,-mcpu=.
355
1.76k
  if (WaCPU) {
356
3
    if (CPUArg)
357
1
      D.Diag(clang::diag::warn_drv_unused_argument)
358
1
          << CPUArg->getAsString(Args);
359
3
    CPUName = StringRef(WaCPU->getValue()).substr(6);
360
3
    CPUArg = WaCPU;
361
1.75k
  } else if (CPUArg)
362
519
    CPUName = CPUArg->getValue();
363
1.76k
364
  // Check -march. ClangAs gives preference to -Wa,-march=.
365
1.76k
  if (WaArch) {
366
2
    if (ArchArg)
367
1
      D.Diag(clang::diag::warn_drv_unused_argument)
368
1
          << ArchArg->getAsString(Args);
369
2
    ArchName = StringRef(WaArch->getValue()).substr(7);
370
2
    checkARMArchName(D, WaArch, Args, ArchName, CPUName, ExtensionFeatures,
371
2
                     Triple, ArchArgFPUID);
372
    // FIXME: Set Arch.
373
2
    D.Diag(clang::diag::warn_drv_unused_argument) << WaArch->getAsString(Args);
374
1.75k
  } else if (ArchArg) {
375
512
    ArchName = ArchArg->getValue();
376
512
    checkARMArchName(D, ArchArg, Args, ArchName, CPUName, ExtensionFeatures,
377
512
                     Triple, ArchArgFPUID);
378
512
  }
379
1.76k
380
  // Add CPU features for generic CPUs
381
1.76k
  if (CPUName == "native") {
382
0
    llvm::StringMap<bool> HostFeatures;
383
0
    if (llvm::sys::getHostCPUFeatures(HostFeatures))
384
0
      for (auto &F : HostFeatures)
385
0
        Features.push_back(
386
0
            Args.MakeArgString((F.second ? "+" : "-") + F.first()));
387
1.76k
  } else if (!CPUName.empty()) {
388
    // This sets the default features for the specified CPU. We certainly don't
389
    // want to override the features that have been explicitly specified on the
390
    // command line. Therefore, process them directly instead of appending them
391
    // at the end later.
392
522
    DecodeARMFeaturesFromCPU(D, CPUName, Features);
393
522
  }
394
1.76k
395
1.76k
  if (CPUArg)
396
522
    checkARMCPUName(D, CPUArg, Args, CPUName, ArchName, ExtensionFeatures,
397
522
                    Triple, CPUArgFPUID);
398
  // Honor -mfpu=. ClangAs gives preference to -Wa,-mfpu=.
399
1.76k
  unsigned FPUID = llvm::ARM::FK_INVALID;
400
1.76k
  const Arg *FPUArg = Args.getLastArg(options::OPT_mfpu_EQ);
401
1.76k
  if (WaFPU) {
402
3
    if (FPUArg)
403
1
      D.Diag(clang::diag::warn_drv_unused_argument)
404
1
          << FPUArg->getAsString(Args);
405
3
    (void)getARMFPUFeatures(D, WaFPU, Args, StringRef(WaFPU->getValue()).substr(6),
406
3
                            Features);
407
1.75k
  } else if (FPUArg) {
408
144
    FPUID = getARMFPUFeatures(D, FPUArg, Args, FPUArg->getValue(), Features);
409
1.61k
  } else if (Triple.isAndroid() && 
getARMSubArchVersionNumber(Triple) >= 794
) {
410
20
    const char *AndroidFPU = "neon";
411
20
    FPUID = llvm::ARM::parseFPU(AndroidFPU);
412
20
    if (!llvm::ARM::getFPUFeatures(FPUID, Features))
413
0
      D.Diag(clang::diag::err_drv_clang_unsupported)
414
0
          << std::string("-mfpu=") + AndroidFPU;
415
20
  }
416
1.76k
417
  // Now we've finished accumulating features from arch, cpu and fpu,
418
  // we can append the ones for architecture extensions that we
419
  // collected separately.
420
1.76k
  Features.insert(std::end(Features),
421
1.76k
                  std::begin(ExtensionFeatures), std::end(ExtensionFeatures));
422
1.76k
423
  // Honor -mhwdiv=. ClangAs gives preference to -Wa,-mhwdiv=.
424
1.76k
  const Arg *HDivArg = Args.getLastArg(options::OPT_mhwdiv_EQ);
425
1.76k
  if (WaHDiv) {
426
4
    if (HDivArg)
427
1
      D.Diag(clang::diag::warn_drv_unused_argument)
428
1
          << HDivArg->getAsString(Args);
429
4
    getARMHWDivFeatures(D, WaHDiv, Args,
430
4
                        StringRef(WaHDiv->getValue()).substr(8), Features);
431
1.75k
  } else if (HDivArg)
432
21
    getARMHWDivFeatures(D, HDivArg, Args, HDivArg->getValue(), Features);
433
1.76k
434
  // Handle (arch-dependent) fp16fml/fullfp16 relationship.
435
  // Must happen before any features are disabled due to soft-float.
436
  // FIXME: this fp16fml option handling will be reimplemented after the
437
  // TargetParser rewrite.
438
1.76k
  const auto ItRNoFullFP16 = std::find(Features.rbegin(), Features.rend(), "-fullfp16");
439
1.76k
  const auto ItRFP16FML = std::find(Features.rbegin(), Features.rend(), "+fp16fml");
440
1.76k
  if (Triple.getSubArch() == llvm::Triple::SubArchType::ARMSubArch_v8_4a) {
441
42
    const auto ItRFullFP16  = std::find(Features.rbegin(), Features.rend(), "+fullfp16");
442
42
    if (ItRFullFP16 < ItRNoFullFP16 && 
ItRFullFP16 < ItRFP16FML13
) {
443
      // Only entangled feature that can be to the right of this +fullfp16 is -fp16fml.
444
      // Only append the +fp16fml if there is no -fp16fml after the +fullfp16.
445
11
      if (std::find(Features.rbegin(), ItRFullFP16, "-fp16fml") == ItRFullFP16)
446
9
        Features.push_back("+fp16fml");
447
11
    }
448
31
    else
449
31
      goto fp16_fml_fallthrough;
450
1.71k
  }
451
1.71k
  else {
452
1.74k
fp16_fml_fallthrough:
453
    // In both of these cases, putting the 'other' feature on the end of the vector will
454
    // result in the same effect as placing it immediately after the current feature.
455
1.74k
    if (ItRNoFullFP16 < ItRFP16FML)
456
532
      Features.push_back("-fp16fml");
457
1.21k
    else if (ItRNoFullFP16 > ItRFP16FML)
458
23
      Features.push_back("+fullfp16");
459
1.74k
  }
460
1.76k
461
  // Setting -msoft-float/-mfloat-abi=soft, -mfpu=none, or adding +nofp to
462
  // -march/-mcpu effectively disables the FPU (GCC ignores the -mfpu options in
463
  // this case). Note that the ABI can also be set implicitly by the target
464
  // selected.
465
1.76k
  if (ABI == arm::FloatABI::Soft) {
466
749
    llvm::ARM::getFPUFeatures(llvm::ARM::FK_NONE, Features);
467
749
468
    // Disable all features relating to hardware FP, not already disabled by the
469
    // above call.
470
749
    Features.insert(Features.end(), {"-dotprod", "-fp16fml", "-bf16", "-mve",
471
749
                                     "-mve.fp", "-fpregs"});
472
1.01k
  } else if (FPUID == llvm::ARM::FK_NONE ||
473
994
             ArchArgFPUID == llvm::ARM::FK_NONE ||
474
987
             CPUArgFPUID == llvm::ARM::FK_NONE) {
475
    // -mfpu=none, -march=armvX+nofp or -mcpu=X+nofp is *very* similar to
476
    // -mfloat-abi=soft, only that it should not disable MVE-I. They disable the
477
    // FPU, but not the FPU registers, thus MVE-I, which depends only on the
478
    // latter, is still supported.
479
26
    Features.insert(Features.end(),
480
26
                    {"-dotprod", "-fp16fml", "-bf16", "-mve.fp"});
481
26
    if (!hasIntegerMVE(Features))
482
22
      Features.emplace_back("-fpregs");
483
26
  }
484
1.76k
485
  // En/disable crc code generation.
486
1.76k
  if (Arg *A = Args.getLastArg(options::OPT_mcrc, options::OPT_mnocrc)) {
487
3
    if (A->getOption().matches(options::OPT_mcrc))
488
1
      Features.push_back("+crc");
489
2
    else
490
2
      Features.push_back("-crc");
491
3
  }
492
1.76k
493
  // For Arch >= ARMv8.0 && A profile:  crypto = sha2 + aes
494
  // FIXME: this needs reimplementation after the TargetParser rewrite
495
11.9k
  auto CryptoIt = llvm::find_if(llvm::reverse(Features), [](const StringRef F) {
496
11.9k
    return F.contains("crypto");
497
11.9k
  });
498
1.76k
  if (CryptoIt != Features.rend()) {
499
1.14k
    if (CryptoIt->take_front() == "+") {
500
33
      StringRef ArchSuffix = arm::getLLVMArchSuffixForARM(
501
33
          arm::getARMTargetCPU(CPUName, ArchName, Triple), ArchName, Triple);
502
33
      if (llvm::ARM::parseArchVersion(ArchSuffix) >= 8 &&
503
27
          llvm::ARM::parseArchProfile(ArchSuffix) ==
504
23
              llvm::ARM::ProfileKind::A) {
505
23
        if (ArchName.find_lower("+nosha2") == StringRef::npos &&
506
22
            CPUName.find_lower("+nosha2") == StringRef::npos)
507
20
          Features.push_back("+sha2");
508
23
        if (ArchName.find_lower("+noaes") == StringRef::npos &&
509
22
            CPUName.find_lower("+noaes") == StringRef::npos)
510
20
          Features.push_back("+aes");
511
10
      } else {
512
10
        D.Diag(clang::diag::warn_target_unsupported_extension)
513
10
            << "crypto"
514
10
            << llvm::ARM::getArchName(llvm::ARM::parseArch(ArchSuffix));
515
        // With -fno-integrated-as -mfpu=crypto-neon-fp-armv8 some assemblers such as the GNU assembler
516
        // will permit the use of crypto instructions as the fpu will override the architecture.
517
        // We keep the crypto feature in this case to preserve compatibility.
518
        // In all other cases we remove the crypto feature.
519
10
        if (!Args.hasArg(options::OPT_fno_integrated_as))
520
6
          Features.push_back("-crypto");
521
10
      }
522
33
    }
523
1.14k
  }
524
1.76k
525
  // CMSE: Check for target 8M (for -mcmse to be applicable) is performed later.
526
1.76k
  if (Args.getLastArg(options::OPT_mcmse))
527
17
    Features.push_back("+8msecext");
528
1.76k
529
  // Look for the last occurrence of -mlong-calls or -mno-long-calls. If
530
  // neither options are specified, see if we are compiling for kernel/kext and
531
  // decide whether to pass "+long-calls" based on the OS and its version.
532
1.76k
  if (Arg *A = Args.getLastArg(options::OPT_mlong_calls,
533
4
                               options::OPT_mno_long_calls)) {
534
4
    if (A->getOption().matches(options::OPT_mlong_calls))
535
3
      Features.push_back("+long-calls");
536
1.75k
  } else if (KernelOrKext && 
(8
!Triple.isiOS()8
||
Triple.isOSVersionLT(6)7
) &&
537
5
             !Triple.isWatchOS()) {
538
4
      Features.push_back("+long-calls");
539
4
  }
540
1.76k
541
  // Generate execute-only output (no data access to code sections).
542
  // This only makes sense for the compiler, not for the assembler.
543
1.76k
  if (!ForAS) {
544
    // Supported only on ARMv6T2 and ARMv7 and above.
545
    // Cannot be combined with -mno-movt or -mlong-calls
546
1.70k
    if (Arg *A = Args.getLastArg(options::OPT_mexecute_only, options::OPT_mno_execute_only)) {
547
22
      if (A->getOption().matches(options::OPT_mexecute_only)) {
548
14
        if (getARMSubArchVersionNumber(Triple) < 7 &&
549
4
            llvm::ARM::parseArch(Triple.getArchName()) != llvm::ARM::ArchKind::ARMV6T2)
550
2
              D.Diag(diag::err_target_unsupported_execute_only) << Triple.getArchName();
551
12
        else if (Arg *B = Args.getLastArg(options::OPT_mno_movt))
552
2
          D.Diag(diag::err_opt_not_valid_with_opt) << A->getAsString(Args) << B->getAsString(Args);
553
        // Long calls create constant pool entries and have not yet been fixed up
554
        // to play nicely with execute-only. Hence, they cannot be used in
555
        // execute-only code for now
556
10
        else if (Arg *B = Args.getLastArg(options::OPT_mlong_calls, options::OPT_mno_long_calls)) {
557
2
          if (B->getOption().matches(options::OPT_mlong_calls))
558
2
            D.Diag(diag::err_opt_not_valid_with_opt) << A->getAsString(Args) << B->getAsString(Args);
559
2
        }
560
14
        Features.push_back("+execute-only");
561
14
      }
562
22
    }
563
1.70k
  }
564
1.76k
565
  // Kernel code has more strict alignment requirements.
566
1.76k
  if (KernelOrKext)
567
8
    Features.push_back("+strict-align");
568
1.75k
  else if (Arg *A = Args.getLastArg(options::OPT_mno_unaligned_access,
569
11
                                    options::OPT_munaligned_access)) {
570
11
    if (A->getOption().matches(options::OPT_munaligned_access)) {
571
      // No v6M core supports unaligned memory access (v6M ARM ARM A3.2).
572
6
      if (Triple.getSubArch() == llvm::Triple::SubArchType::ARMSubArch_v6m)
573
2
        D.Diag(diag::err_target_unsupported_unaligned) << "v6m";
574
      // v8M Baseline follows on from v6M, so doesn't support unaligned memory
575
      // access either.
576
4
      else if (Triple.getSubArch() == llvm::Triple::SubArchType::ARMSubArch_v8m_baseline)
577
1
        D.Diag(diag::err_target_unsupported_unaligned) << "v8m.base";
578
6
    } else
579
5
      Features.push_back("+strict-align");
580
1.74k
  } else {
581
    // Assume pre-ARMv6 doesn't support unaligned accesses.
582
    //
583
    // ARMv6 may or may not support unaligned accesses depending on the
584
    // SCTLR.U bit, which is architecture-specific. We assume ARMv6
585
    // Darwin and NetBSD targets support unaligned accesses, and others don't.
586
    //
587
    // ARMv7 always has SCTLR.U set to 1, but it has a new SCTLR.A bit
588
    // which raises an alignment fault on unaligned accesses. Linux
589
    // defaults this bit to 0 and handles it as a system-wide (not
590
    // per-process) setting. It is therefore safe to assume that ARMv7+
591
    // Linux targets support unaligned accesses. The same goes for NaCl.
592
    //
593
    // The above behavior is consistent with GCC.
594
1.74k
    int VersionNum = getARMSubArchVersionNumber(Triple);
595
1.74k
    if (Triple.isOSDarwin() || 
Triple.isOSNetBSD()1.63k
) {
596
142
      if (VersionNum < 6 ||
597
113
          Triple.getSubArch() == llvm::Triple::SubArchType::ARMSubArch_v6m)
598
30
        Features.push_back("+strict-align");
599
1.59k
    } else if (Triple.isOSLinux() || 
Triple.isOSNaCl()1.01k
) {
600
593
      if (VersionNum < 7)
601
236
        Features.push_back("+strict-align");
602
593
    } else
603
1.00k
      Features.push_back("+strict-align");
604
1.74k
  }
605
1.76k
606
  // llvm does not support reserving registers in general. There is support
607
  // for reserving r9 on ARM though (defined as a platform-specific register
608
  // in ARM EABI).
609
1.76k
  if (Args.hasArg(options::OPT_ffixed_r9))
610
1
    Features.push_back("+reserve-r9");
611
1.76k
612
  // The kext linker doesn't know how to deal with movw/movt.
613
1.76k
  if (KernelOrKext || 
Args.hasArg(options::OPT_mno_movt)1.75k
)
614
11
    Features.push_back("+no-movt");
615
1.76k
616
1.76k
  if (Args.hasArg(options::OPT_mno_neg_immediates))
617
1
    Features.push_back("+no-neg-immediates");
618
1.76k
}
619
620
5.87k
const std::string arm::getARMArch(StringRef Arch, const llvm::Triple &Triple) {
621
5.87k
  std::string MArch;
622
5.87k
  if (!Arch.empty())
623
2.87k
    MArch = std::string(Arch);
624
3.00k
  else
625
3.00k
    MArch = std::string(Triple.getArchName());
626
5.87k
  MArch = StringRef(MArch).split("+").first.lower();
627
5.87k
628
  // Handle -march=native.
629
5.87k
  if (MArch == "native") {
630
0
    std::string CPU = std::string(llvm::sys::getHostCPUName());
631
0
    if (CPU != "generic") {
632
      // Translate the native cpu into the architecture suffix for that CPU.
633
0
      StringRef Suffix = arm::getLLVMArchSuffixForARM(CPU, MArch, Triple);
634
      // If there is no valid architecture suffix for this CPU we don't know how
635
      // to handle it, so return no architecture.
636
0
      if (Suffix.empty())
637
0
        MArch = "";
638
0
      else
639
0
        MArch = std::string("arm") + Suffix.str();
640
0
    }
641
0
  }
642
5.87k
643
5.87k
  return MArch;
644
5.87k
}
645
646
/// Get the (LLVM) name of the minimum ARM CPU for the arch we are targeting.
647
4.36k
StringRef arm::getARMCPUForMArch(StringRef Arch, const llvm::Triple &Triple) {
648
4.36k
  std::string MArch = getARMArch(Arch, Triple);
649
  // getARMCPUForArch defaults to the triple if MArch is empty, but empty MArch
650
  // here means an -march=native that we can't handle, so instead return no CPU.
651
4.36k
  if (MArch.empty())
652
0
    return StringRef();
653
4.36k
654
  // We need to return an empty string here on invalid MArch values as the
655
  // various places that call this function can't cope with a null result.
656
4.36k
  return Triple.getARMCPUForArch(MArch);
657
4.36k
}
658
659
/// getARMTargetCPU - Get the (LLVM) name of the ARM cpu we are targeting.
660
std::string arm::getARMTargetCPU(StringRef CPU, StringRef Arch,
661
6.07k
                                 const llvm::Triple &Triple) {
662
  // FIXME: Warn on inconsistent use of -mcpu and -march.
663
  // If we have -mcpu=, use that.
664
6.07k
  if (!CPU.empty()) {
665
2.12k
    std::string MCPU = StringRef(CPU).split("+").first.lower();
666
    // Handle -mcpu=native.
667
2.12k
    if (MCPU == "native")
668
0
      return std::string(llvm::sys::getHostCPUName());
669
2.12k
    else
670
2.12k
      return MCPU;
671
3.94k
  }
672
3.94k
673
3.94k
  return std::string(getARMCPUForMArch(Arch, Triple));
674
3.94k
}
675
676
/// getLLVMArchSuffixForARM - Get the LLVM ArchKind value to use for a
677
/// particular CPU (or Arch, if CPU is generic). This is needed to
678
/// pass to functions like llvm::ARM::getDefaultFPU which need an
679
/// ArchKind as well as a CPU name.
680
llvm::ARM::ArchKind arm::getLLVMArchKindForARM(StringRef CPU, StringRef Arch,
681
3.02k
                                               const llvm::Triple &Triple) {
682
3.02k
  llvm::ARM::ArchKind ArchKind;
683
3.02k
  if (CPU == "generic" || 
CPU.empty()2.03k
) {
684
988
    std::string ARMArch = tools::arm::getARMArch(Arch, Triple);
685
988
    ArchKind = llvm::ARM::parseArch(ARMArch);
686
988
    if (ArchKind == llvm::ARM::ArchKind::INVALID)
687
      // In case of generic Arch, i.e. "arm",
688
      // extract arch from default cpu of the Triple
689
8
      ArchKind = llvm::ARM::parseCPUArch(Triple.getARMCPUForArch(ARMArch));
690
2.03k
  } else {
691
    // FIXME: horrible hack to get around the fact that Cortex-A7 is only an
692
    // armv7k triple if it's actually been specified via "-arch armv7k".
693
2.03k
    ArchKind = (Arch == "armv7k" || 
Arch == "thumbv7k"1.97k
)
694
58
                          ? llvm::ARM::ArchKind::ARMV7K
695
1.97k
                          : llvm::ARM::parseCPUArch(CPU);
696
2.03k
  }
697
3.02k
  return ArchKind;
698
3.02k
}
699
700
/// getLLVMArchSuffixForARM - Get the LLVM arch name to use for a particular
701
/// CPU  (or Arch, if CPU is generic).
702
// FIXME: This is redundant with -mcpu, why does LLVM use this.
703
StringRef arm::getLLVMArchSuffixForARM(StringRef CPU, StringRef Arch,
704
2.49k
                                       const llvm::Triple &Triple) {
705
2.49k
  llvm::ARM::ArchKind ArchKind = getLLVMArchKindForARM(CPU, Arch, Triple);
706
2.49k
  if (ArchKind == llvm::ARM::ArchKind::INVALID)
707
3
    return "";
708
2.49k
  return llvm::ARM::getSubArch(ArchKind);
709
2.49k
}
710
711
void arm::appendBE8LinkFlag(const ArgList &Args, ArgStringList &CmdArgs,
712
20
                            const llvm::Triple &Triple) {
713
20
  if (Args.hasArg(options::OPT_r))
714
1
    return;
715
19
716
  // ARMv7 (and later) and ARMv6-M do not support BE-32, so instruct the linker
717
  // to generate BE-8 executables.
718
19
  if (arm::getARMSubArchVersionNumber(Triple) >= 7 || 
arm::isARMMProfile(Triple)12
)
719
7
    CmdArgs.push_back("--be8");
720
19
}