Coverage Report

Created: 2020-11-24 06:42

/Users/buildslave/jenkins/workspace/coverage/llvm-project/clang/lib/Driver/ToolChains/Arch/ARM.cpp
Line
Count
Source (jump to first uncovered line)
1
//===--- ARM.cpp - ARM (not AArch64) Helpers for Tools ----------*- C++ -*-===//
2
//
3
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4
// See https://llvm.org/LICENSE.txt for license information.
5
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6
//
7
//===----------------------------------------------------------------------===//
8
9
#include "ARM.h"
10
#include "clang/Driver/Driver.h"
11
#include "clang/Driver/DriverDiagnostic.h"
12
#include "clang/Driver/Options.h"
13
#include "llvm/ADT/StringSwitch.h"
14
#include "llvm/Option/ArgList.h"
15
#include "llvm/Support/TargetParser.h"
16
#include "llvm/Support/Host.h"
17
18
using namespace clang::driver;
19
using namespace clang::driver::tools;
20
using namespace clang;
21
using namespace llvm::opt;
22
23
// Get SubArch (vN).
24
9.20k
int arm::getARMSubArchVersionNumber(const llvm::Triple &Triple) {
25
9.20k
  llvm::StringRef Arch = Triple.getArchName();
26
9.20k
  return llvm::ARM::parseArchVersion(Arch);
27
9.20k
}
28
29
// True if M-profile.
30
12
bool arm::isARMMProfile(const llvm::Triple &Triple) {
31
12
  llvm::StringRef Arch = Triple.getArchName();
32
12
  return llvm::ARM::parseArchProfile(Arch) == llvm::ARM::ProfileKind::M;
33
12
}
34
35
// Get Arch/CPU from args.
36
void arm::getARMArchCPUFromArgs(const ArgList &Args, llvm::StringRef &Arch,
37
3.52k
                                llvm::StringRef &CPU, bool FromAs) {
38
3.52k
  if (const Arg *A = Args.getLastArg(clang::driver::options::OPT_mcpu_EQ))
39
1.06k
    CPU = A->getValue();
40
3.52k
  if (const Arg *A = Args.getLastArg(options::OPT_march_EQ))
41
1.01k
    Arch = A->getValue();
42
3.52k
  if (!FromAs)
43
3.46k
    return;
44
45
63
  for (const Arg *A :
46
14
       Args.filtered(options::OPT_Wa_COMMA, options::OPT_Xassembler)) {
47
14
    StringRef Value = A->getValue();
48
14
    if (Value.startswith("-mcpu="))
49
3
      CPU = Value.substr(6);
50
14
    if (Value.startswith("-march="))
51
2
      Arch = Value.substr(7);
52
14
  }
53
63
}
54
55
// Handle -mhwdiv=.
56
// FIXME: Use ARMTargetParser.
57
static void getARMHWDivFeatures(const Driver &D, const Arg *A,
58
                                const ArgList &Args, StringRef HWDiv,
59
25
                                std::vector<StringRef> &Features) {
60
25
  uint64_t HWDivID = llvm::ARM::parseHWDiv(HWDiv);
61
25
  if (!llvm::ARM::getHWDivFeatures(HWDivID, Features))
62
1
    D.Diag(clang::diag::err_drv_clang_unsupported) << A->getAsString(Args);
63
25
}
64
65
// Handle -mfpu=.
66
static unsigned getARMFPUFeatures(const Driver &D, const Arg *A,
67
                                  const ArgList &Args, StringRef FPU,
68
147
                                  std::vector<StringRef> &Features) {
69
147
  unsigned FPUID = llvm::ARM::parseFPU(FPU);
70
147
  if (!llvm::ARM::getFPUFeatures(FPUID, Features))
71
6
    D.Diag(clang::diag::err_drv_clang_unsupported) << A->getAsString(Args);
72
147
  return FPUID;
73
147
}
74
75
// Decode ARM features from string like +[no]featureA+[no]featureB+...
76
static bool DecodeARMFeatures(const Driver &D, StringRef text, StringRef CPU,
77
                              llvm::ARM::ArchKind ArchKind,
78
                              std::vector<StringRef> &Features,
79
173
                              unsigned &ArgFPUID) {
80
173
  SmallVector<StringRef, 8> Split;
81
173
  text.split(Split, StringRef("+"), -1, false);
82
83
249
  for (StringRef Feature : Split) {
84
249
    if (!appendArchExtFeatures(CPU, ArchKind, Feature, Features, ArgFPUID))
85
1
      return false;
86
249
  }
87
172
  return true;
88
173
}
89
90
static void DecodeARMFeaturesFromCPU(const Driver &D, StringRef CPU,
91
535
                                     std::vector<StringRef> &Features) {
92
535
  CPU = CPU.split("+").first;
93
535
  if (CPU != "generic") {
94
500
    llvm::ARM::ArchKind ArchKind = llvm::ARM::parseCPUArch(CPU);
95
500
    uint64_t Extension = llvm::ARM::getDefaultExtensions(CPU, ArchKind);
96
500
    llvm::ARM::getExtensionFeatures(Extension, Features);
97
500
  }
98
535
}
99
100
// Check if -march is valid by checking if it can be canonicalised and parsed.
101
// getARMArch is used here instead of just checking the -march value in order
102
// to handle -march=native correctly.
103
static void checkARMArchName(const Driver &D, const Arg *A, const ArgList &Args,
104
                             llvm::StringRef ArchName, llvm::StringRef CPUName,
105
                             std::vector<StringRef> &Features,
106
517
                             const llvm::Triple &Triple, unsigned &ArgFPUID) {
107
517
  std::pair<StringRef, StringRef> Split = ArchName.split("+");
108
109
517
  std::string MArch = arm::getARMArch(ArchName, Triple);
110
517
  llvm::ARM::ArchKind ArchKind = llvm::ARM::parseArch(MArch);
111
517
  if (ArchKind == llvm::ARM::ArchKind::INVALID ||
112
512
      (Split.second.size() && !DecodeARMFeatures(D, Split.second, CPUName,
113
152
                                                 ArchKind, Features, ArgFPUID)))
114
5
    D.Diag(clang::diag::err_drv_clang_unsupported) << A->getAsString(Args);
115
517
}
116
117
// Check -mcpu=. Needs ArchName to handle -mcpu=generic.
118
static void checkARMCPUName(const Driver &D, const Arg *A, const ArgList &Args,
119
                            llvm::StringRef CPUName, llvm::StringRef ArchName,
120
                            std::vector<StringRef> &Features,
121
535
                            const llvm::Triple &Triple, unsigned &ArgFPUID) {
122
535
  std::pair<StringRef, StringRef> Split = CPUName.split("+");
123
124
535
  std::string CPU = arm::getARMTargetCPU(CPUName, ArchName, Triple);
125
535
  llvm::ARM::ArchKind ArchKind =
126
535
    arm::getLLVMArchKindForARM(CPU, ArchName, Triple);
127
535
  if (ArchKind == llvm::ARM::ArchKind::INVALID ||
128
533
      (Split.second.size() &&
129
21
       !DecodeARMFeatures(D, Split.second, CPU, ArchKind, Features, ArgFPUID)))
130
3
    D.Diag(clang::diag::err_drv_clang_unsupported) << A->getAsString(Args);
131
535
}
132
133
0
bool arm::useAAPCSForMachO(const llvm::Triple &T) {
134
  // The backend is hardwired to assume AAPCS for M-class processors, ensure
135
  // the frontend matches that.
136
0
  return T.getEnvironment() == llvm::Triple::EABI ||
137
0
         T.getEnvironment() == llvm::Triple::EABIHF ||
138
0
         T.getOS() == llvm::Triple::UnknownOS || isARMMProfile(T);
139
0
}
140
141
// Select mode for reading thread pointer (-mtp=soft/cp15).
142
1.78k
arm::ReadTPMode arm::getReadTPMode(const Driver &D, const ArgList &Args) {
143
1.78k
  if (Arg *A = Args.getLastArg(options::OPT_mtp_mode_EQ)) {
144
2
    arm::ReadTPMode ThreadPointer =
145
2
        llvm::StringSwitch<arm::ReadTPMode>(A->getValue())
146
2
            .Case("cp15", ReadTPMode::Cp15)
147
2
            .Case("soft", ReadTPMode::Soft)
148
2
            .Default(ReadTPMode::Invalid);
149
2
    if (ThreadPointer != ReadTPMode::Invalid)
150
2
      return ThreadPointer;
151
0
    if (StringRef(A->getValue()).empty())
152
0
      D.Diag(diag::err_drv_missing_arg_mtp) << A->getAsString(Args);
153
0
    else
154
0
      D.Diag(diag::err_drv_invalid_mtp) << A->getAsString(Args);
155
0
    return ReadTPMode::Invalid;
156
0
  }
157
1.78k
  return ReadTPMode::Soft;
158
1.78k
}
159
160
1.94k
arm::FloatABI arm::getARMFloatABI(const ToolChain &TC, const ArgList &Args) {
161
1.94k
  return arm::getARMFloatABI(TC.getDriver(), TC.getEffectiveTriple(), Args);
162
1.94k
}
163
164
7.31k
arm::FloatABI arm::getDefaultFloatABI(const llvm::Triple &Triple) {
165
7.31k
  auto SubArch = getARMSubArchVersionNumber(Triple);
166
7.31k
  switch (Triple.getOS()) {
167
801
  case llvm::Triple::Darwin:
168
801
  case llvm::Triple::MacOSX:
169
801
  case llvm::Triple::IOS:
170
801
  case llvm::Triple::TvOS:
171
    // Darwin defaults to "softfp" for v6 and v7.
172
801
    if (Triple.isWatchABI())
173
74
      return FloatABI::Hard;
174
727
    else
175
727
      return (SubArch == 6 || 
SubArch == 7661
) ?
FloatABI::SoftFP669
:
FloatABI::Soft58
;
176
177
149
  case llvm::Triple::WatchOS:
178
149
    return FloatABI::Hard;
179
180
  // FIXME: this is invalid for WindowsCE
181
293
  case llvm::Triple::Win32:
182
293
    return FloatABI::Hard;
183
184
165
  case llvm::Triple::NetBSD:
185
165
    switch (Triple.getEnvironment()) {
186
22
    case llvm::Triple::EABIHF:
187
22
    case llvm::Triple::GNUEABIHF:
188
22
      return FloatABI::Hard;
189
143
    default:
190
143
      return FloatABI::Soft;
191
0
    }
192
0
    break;
193
194
31
  case llvm::Triple::FreeBSD:
195
31
    switch (Triple.getEnvironment()) {
196
12
    case llvm::Triple::GNUEABIHF:
197
12
      return FloatABI::Hard;
198
19
    default:
199
      // FreeBSD defaults to soft float
200
19
      return FloatABI::Soft;
201
0
    }
202
0
    break;
203
204
64
  case llvm::Triple::OpenBSD:
205
64
    return FloatABI::SoftFP;
206
207
5.80k
  default:
208
5.80k
    switch (Triple.getEnvironment()) {
209
242
    case llvm::Triple::GNUEABIHF:
210
242
    case llvm::Triple::MuslEABIHF:
211
242
    case llvm::Triple::EABIHF:
212
242
      return FloatABI::Hard;
213
2.33k
    case llvm::Triple::GNUEABI:
214
2.33k
    case llvm::Triple::MuslEABI:
215
2.33k
    case llvm::Triple::EABI:
216
      // EABI is always AAPCS, and if it was not marked 'hard', it's softfp
217
2.33k
      return FloatABI::SoftFP;
218
553
    case llvm::Triple::Android:
219
443
      return (SubArch >= 7) ? 
FloatABI::SoftFP110
: FloatABI::Soft;
220
2.67k
    default:
221
2.67k
      return FloatABI::Invalid;
222
0
    }
223
0
  }
224
0
  return FloatABI::Invalid;
225
0
}
226
227
// Select the float ABI as determined by -msoft-float, -mhard-float, and
228
// -mfloat-abi=.
229
arm::FloatABI arm::getARMFloatABI(const Driver &D, const llvm::Triple &Triple,
230
6.24k
                                  const ArgList &Args) {
231
6.24k
  arm::FloatABI ABI = FloatABI::Invalid;
232
6.24k
  if (Arg *A =
233
310
          Args.getLastArg(options::OPT_msoft_float, options::OPT_mhard_float,
234
310
                          options::OPT_mfloat_abi_EQ)) {
235
310
    if (A->getOption().matches(options::OPT_msoft_float)) {
236
21
      ABI = FloatABI::Soft;
237
289
    } else if (A->getOption().matches(options::OPT_mhard_float)) {
238
35
      ABI = FloatABI::Hard;
239
254
    } else {
240
254
      ABI = llvm::StringSwitch<arm::FloatABI>(A->getValue())
241
254
                .Case("soft", FloatABI::Soft)
242
254
                .Case("softfp", FloatABI::SoftFP)
243
254
                .Case("hard", FloatABI::Hard)
244
254
                .Default(FloatABI::Invalid);
245
254
      if (ABI == FloatABI::Invalid && 
!StringRef(A->getValue()).empty()0
) {
246
0
        D.Diag(diag::err_drv_invalid_mfloat_abi) << A->getAsString(Args);
247
0
        ABI = FloatABI::Soft;
248
0
      }
249
254
    }
250
310
  }
251
252
  // If unspecified, choose the default based on the platform.
253
6.24k
  if (ABI == FloatABI::Invalid)
254
5.93k
    ABI = arm::getDefaultFloatABI(Triple);
255
256
6.24k
  if (ABI == FloatABI::Invalid) {
257
    // Assume "soft", but warn the user we are guessing.
258
1.96k
    if (Triple.isOSBinFormatMachO() &&
259
85
        Triple.getSubArch() == llvm::Triple::ARMSubArch_v7em)
260
17
      ABI = FloatABI::Hard;
261
1.95k
    else
262
1.95k
      ABI = FloatABI::Soft;
263
264
1.96k
    if (Triple.getOS() != llvm::Triple::UnknownOS ||
265
1.59k
        !Triple.isOSBinFormatMachO())
266
1.88k
      D.Diag(diag::warn_drv_assuming_mfloat_abi_is) << "soft";
267
1.96k
  }
268
269
6.24k
  assert(ABI != FloatABI::Invalid && "must select an ABI");
270
6.24k
  return ABI;
271
6.24k
}
272
273
26
static bool hasIntegerMVE(const std::vector<StringRef> &F) {
274
26
  auto MVE = llvm::find(llvm::reverse(F), "+mve");
275
26
  auto NoMVE = llvm::find(llvm::reverse(F), "-mve");
276
26
  return MVE != F.rend() &&
277
5
         (NoMVE == F.rend() || 
std::distance(MVE, NoMVE) > 01
);
278
26
}
279
280
void arm::getARMTargetFeatures(const Driver &D, const llvm::Triple &Triple,
281
                               const ArgList &Args, ArgStringList &CmdArgs,
282
1.78k
                               std::vector<StringRef> &Features, bool ForAS) {
283
1.78k
  bool KernelOrKext =
284
1.78k
      Args.hasArg(options::OPT_mkernel, options::OPT_fapple_kext);
285
1.78k
  arm::FloatABI ABI = arm::getARMFloatABI(D, Triple, Args);
286
1.78k
  arm::ReadTPMode ThreadPointer = arm::getReadTPMode(D, Args);
287
1.78k
  const Arg *WaCPU = nullptr, *WaFPU = nullptr;
288
1.78k
  const Arg *WaHDiv = nullptr, *WaArch = nullptr;
289
290
  // This vector will accumulate features from the architecture
291
  // extension suffixes on -mcpu and -march (e.g. the 'bar' in
292
  // -mcpu=foo+bar). We want to apply those after the features derived
293
  // from the FPU, in case -mfpu generates a negative feature which
294
  // the +bar is supposed to override.
295
1.78k
  std::vector<StringRef> ExtensionFeatures;
296
297
1.78k
  if (!ForAS) {
298
    // FIXME: Note, this is a hack, the LLVM backend doesn't actually use these
299
    // yet (it uses the -mfloat-abi and -msoft-float options), and it is
300
    // stripped out by the ARM target. We should probably pass this a new
301
    // -target-option, which is handled by the -cc1/-cc1as invocation.
302
    //
303
    // FIXME2:  For consistency, it would be ideal if we set up the target
304
    // machine state the same when using the frontend or the assembler. We don't
305
    // currently do that for the assembler, we pass the options directly to the
306
    // backend and never even instantiate the frontend TargetInfo. If we did,
307
    // and used its handleTargetFeatures hook, then we could ensure the
308
    // assembler and the frontend behave the same.
309
310
    // Use software floating point operations?
311
1.73k
    if (ABI == arm::FloatABI::Soft)
312
749
      Features.push_back("+soft-float");
313
314
    // Use software floating point argument passing?
315
1.73k
    if (ABI != arm::FloatABI::Hard)
316
1.53k
      Features.push_back("+soft-float-abi");
317
54
  } else {
318
    // Here, we make sure that -Wa,-mfpu/cpu/arch/hwdiv will be passed down
319
    // to the assembler correctly.
320
54
    for (const Arg *A :
321
14
         Args.filtered(options::OPT_Wa_COMMA, options::OPT_Xassembler)) {
322
14
      StringRef Value = A->getValue();
323
14
      if (Value.startswith("-mfpu=")) {
324
3
        WaFPU = A;
325
11
      } else if (Value.startswith("-mcpu=")) {
326
3
        WaCPU = A;
327
8
      } else if (Value.startswith("-mhwdiv=")) {
328
4
        WaHDiv = A;
329
4
      } else if (Value.startswith("-march=")) {
330
2
        WaArch = A;
331
2
      }
332
14
    }
333
54
  }
334
335
1.78k
  if (ThreadPointer == arm::ReadTPMode::Cp15)
336
1
    Features.push_back("+read-tp-hard");
337
338
1.78k
  const Arg *ArchArg = Args.getLastArg(options::OPT_march_EQ);
339
1.78k
  const Arg *CPUArg = Args.getLastArg(options::OPT_mcpu_EQ);
340
1.78k
  StringRef ArchName;
341
1.78k
  StringRef CPUName;
342
1.78k
  unsigned ArchArgFPUID = llvm::ARM::FK_INVALID;
343
1.78k
  unsigned CPUArgFPUID = llvm::ARM::FK_INVALID;
344
345
  // Check -mcpu. ClangAs gives preference to -Wa,-mcpu=.
346
1.78k
  if (WaCPU) {
347
3
    if (CPUArg)
348
1
      D.Diag(clang::diag::warn_drv_unused_argument)
349
1
          << CPUArg->getAsString(Args);
350
3
    CPUName = StringRef(WaCPU->getValue()).substr(6);
351
3
    CPUArg = WaCPU;
352
1.78k
  } else if (CPUArg)
353
532
    CPUName = CPUArg->getValue();
354
355
  // Check -march. ClangAs gives preference to -Wa,-march=.
356
1.78k
  if (WaArch) {
357
2
    if (ArchArg)
358
1
      D.Diag(clang::diag::warn_drv_unused_argument)
359
1
          << ArchArg->getAsString(Args);
360
2
    ArchName = StringRef(WaArch->getValue()).substr(7);
361
2
    checkARMArchName(D, WaArch, Args, ArchName, CPUName, ExtensionFeatures,
362
2
                     Triple, ArchArgFPUID);
363
    // FIXME: Set Arch.
364
2
    D.Diag(clang::diag::warn_drv_unused_argument) << WaArch->getAsString(Args);
365
1.78k
  } else if (ArchArg) {
366
515
    ArchName = ArchArg->getValue();
367
515
    checkARMArchName(D, ArchArg, Args, ArchName, CPUName, ExtensionFeatures,
368
515
                     Triple, ArchArgFPUID);
369
515
  }
370
371
  // Add CPU features for generic CPUs
372
1.78k
  if (CPUName == "native") {
373
0
    llvm::StringMap<bool> HostFeatures;
374
0
    if (llvm::sys::getHostCPUFeatures(HostFeatures))
375
0
      for (auto &F : HostFeatures)
376
0
        Features.push_back(
377
0
            Args.MakeArgString((F.second ? "+" : "-") + F.first()));
378
1.78k
  } else if (!CPUName.empty()) {
379
    // This sets the default features for the specified CPU. We certainly don't
380
    // want to override the features that have been explicitly specified on the
381
    // command line. Therefore, process them directly instead of appending them
382
    // at the end later.
383
535
    DecodeARMFeaturesFromCPU(D, CPUName, Features);
384
535
  }
385
386
1.78k
  if (CPUArg)
387
535
    checkARMCPUName(D, CPUArg, Args, CPUName, ArchName, ExtensionFeatures,
388
535
                    Triple, CPUArgFPUID);
389
  // Honor -mfpu=. ClangAs gives preference to -Wa,-mfpu=.
390
1.78k
  unsigned FPUID = llvm::ARM::FK_INVALID;
391
1.78k
  const Arg *FPUArg = Args.getLastArg(options::OPT_mfpu_EQ);
392
1.78k
  if (WaFPU) {
393
3
    if (FPUArg)
394
1
      D.Diag(clang::diag::warn_drv_unused_argument)
395
1
          << FPUArg->getAsString(Args);
396
3
    (void)getARMFPUFeatures(D, WaFPU, Args, StringRef(WaFPU->getValue()).substr(6),
397
3
                            Features);
398
1.78k
  } else if (FPUArg) {
399
144
    FPUID = getARMFPUFeatures(D, FPUArg, Args, FPUArg->getValue(), Features);
400
1.63k
  } else if (Triple.isAndroid() && 
getARMSubArchVersionNumber(Triple) >= 797
) {
401
23
    const char *AndroidFPU = "neon";
402
23
    FPUID = llvm::ARM::parseFPU(AndroidFPU);
403
23
    if (!llvm::ARM::getFPUFeatures(FPUID, Features))
404
0
      D.Diag(clang::diag::err_drv_clang_unsupported)
405
0
          << std::string("-mfpu=") + AndroidFPU;
406
23
  }
407
408
  // Now we've finished accumulating features from arch, cpu and fpu,
409
  // we can append the ones for architecture extensions that we
410
  // collected separately.
411
1.78k
  Features.insert(std::end(Features),
412
1.78k
                  std::begin(ExtensionFeatures), std::end(ExtensionFeatures));
413
414
  // Honor -mhwdiv=. ClangAs gives preference to -Wa,-mhwdiv=.
415
1.78k
  const Arg *HDivArg = Args.getLastArg(options::OPT_mhwdiv_EQ);
416
1.78k
  if (WaHDiv) {
417
4
    if (HDivArg)
418
1
      D.Diag(clang::diag::warn_drv_unused_argument)
419
1
          << HDivArg->getAsString(Args);
420
4
    getARMHWDivFeatures(D, WaHDiv, Args,
421
4
                        StringRef(WaHDiv->getValue()).substr(8), Features);
422
1.78k
  } else if (HDivArg)
423
21
    getARMHWDivFeatures(D, HDivArg, Args, HDivArg->getValue(), Features);
424
425
  // Handle (arch-dependent) fp16fml/fullfp16 relationship.
426
  // Must happen before any features are disabled due to soft-float.
427
  // FIXME: this fp16fml option handling will be reimplemented after the
428
  // TargetParser rewrite.
429
1.78k
  const auto ItRNoFullFP16 = std::find(Features.rbegin(), Features.rend(), "-fullfp16");
430
1.78k
  const auto ItRFP16FML = std::find(Features.rbegin(), Features.rend(), "+fp16fml");
431
1.78k
  if (Triple.getSubArch() == llvm::Triple::SubArchType::ARMSubArch_v8_4a) {
432
50
    const auto ItRFullFP16  = std::find(Features.rbegin(), Features.rend(), "+fullfp16");
433
50
    if (ItRFullFP16 < ItRNoFullFP16 && 
ItRFullFP16 < ItRFP16FML21
) {
434
      // Only entangled feature that can be to the right of this +fullfp16 is -fp16fml.
435
      // Only append the +fp16fml if there is no -fp16fml after the +fullfp16.
436
19
      if (std::find(Features.rbegin(), ItRFullFP16, "-fp16fml") == ItRFullFP16)
437
9
        Features.push_back("+fp16fml");
438
19
    }
439
31
    else
440
31
      goto fp16_fml_fallthrough;
441
1.73k
  }
442
1.73k
  else {
443
1.76k
fp16_fml_fallthrough:
444
    // In both of these cases, putting the 'other' feature on the end of the vector will
445
    // result in the same effect as placing it immediately after the current feature.
446
1.76k
    if (ItRNoFullFP16 < ItRFP16FML)
447
540
      Features.push_back("-fp16fml");
448
1.22k
    else if (ItRNoFullFP16 > ItRFP16FML)
449
23
      Features.push_back("+fullfp16");
450
1.76k
  }
451
452
  // Setting -msoft-float/-mfloat-abi=soft, -mfpu=none, or adding +nofp to
453
  // -march/-mcpu effectively disables the FPU (GCC ignores the -mfpu options in
454
  // this case). Note that the ABI can also be set implicitly by the target
455
  // selected.
456
1.78k
  if (ABI == arm::FloatABI::Soft) {
457
760
    llvm::ARM::getFPUFeatures(llvm::ARM::FK_NONE, Features);
458
459
    // Disable all features relating to hardware FP, not already disabled by the
460
    // above call.
461
760
    Features.insert(Features.end(), {"-dotprod", "-fp16fml", "-bf16", "-mve",
462
760
                                     "-mve.fp", "-fpregs"});
463
1.02k
  } else if (FPUID == llvm::ARM::FK_NONE ||
464
1.00k
             ArchArgFPUID == llvm::ARM::FK_NONE ||
465
1.00k
             CPUArgFPUID == llvm::ARM::FK_NONE) {
466
    // -mfpu=none, -march=armvX+nofp or -mcpu=X+nofp is *very* similar to
467
    // -mfloat-abi=soft, only that it should not disable MVE-I. They disable the
468
    // FPU, but not the FPU registers, thus MVE-I, which depends only on the
469
    // latter, is still supported.
470
26
    Features.insert(Features.end(),
471
26
                    {"-dotprod", "-fp16fml", "-bf16", "-mve.fp"});
472
26
    if (!hasIntegerMVE(Features))
473
22
      Features.emplace_back("-fpregs");
474
26
  }
475
476
  // En/disable crc code generation.
477
1.78k
  if (Arg *A = Args.getLastArg(options::OPT_mcrc, options::OPT_mnocrc)) {
478
3
    if (A->getOption().matches(options::OPT_mcrc))
479
1
      Features.push_back("+crc");
480
2
    else
481
2
      Features.push_back("-crc");
482
3
  }
483
484
  // For Arch >= ARMv8.0 && A profile:  crypto = sha2 + aes
485
  // FIXME: this needs reimplementation after the TargetParser rewrite
486
12.1k
  auto CryptoIt = llvm::find_if(llvm::reverse(Features), [](const StringRef F) {
487
12.1k
    return F.contains("crypto");
488
12.1k
  });
489
1.78k
  if (CryptoIt != Features.rend()) {
490
1.16k
    if (CryptoIt->take_front() == "+") {
491
33
      StringRef ArchSuffix = arm::getLLVMArchSuffixForARM(
492
33
          arm::getARMTargetCPU(CPUName, ArchName, Triple), ArchName, Triple);
493
33
      if (llvm::ARM::parseArchVersion(ArchSuffix) >= 8 &&
494
27
          llvm::ARM::parseArchProfile(ArchSuffix) ==
495
23
              llvm::ARM::ProfileKind::A) {
496
23
        if (ArchName.find_lower("+nosha2") == StringRef::npos &&
497
22
            CPUName.find_lower("+nosha2") == StringRef::npos)
498
20
          Features.push_back("+sha2");
499
23
        if (ArchName.find_lower("+noaes") == StringRef::npos &&
500
22
            CPUName.find_lower("+noaes") == StringRef::npos)
501
20
          Features.push_back("+aes");
502
10
      } else {
503
10
        D.Diag(clang::diag::warn_target_unsupported_extension)
504
10
            << "crypto"
505
10
            << llvm::ARM::getArchName(llvm::ARM::parseArch(ArchSuffix));
506
        // With -fno-integrated-as -mfpu=crypto-neon-fp-armv8 some assemblers such as the GNU assembler
507
        // will permit the use of crypto instructions as the fpu will override the architecture.
508
        // We keep the crypto feature in this case to preserve compatibility.
509
        // In all other cases we remove the crypto feature.
510
10
        if (!Args.hasArg(options::OPT_fno_integrated_as))
511
6
          Features.push_back("-crypto");
512
10
      }
513
33
    }
514
1.16k
  }
515
516
  // CMSE: Check for target 8M (for -mcmse to be applicable) is performed later.
517
1.78k
  if (Args.getLastArg(options::OPT_mcmse))
518
17
    Features.push_back("+8msecext");
519
520
  // Look for the last occurrence of -mlong-calls or -mno-long-calls. If
521
  // neither options are specified, see if we are compiling for kernel/kext and
522
  // decide whether to pass "+long-calls" based on the OS and its version.
523
1.78k
  if (Arg *A = Args.getLastArg(options::OPT_mlong_calls,
524
4
                               options::OPT_mno_long_calls)) {
525
4
    if (A->getOption().matches(options::OPT_mlong_calls))
526
3
      Features.push_back("+long-calls");
527
1.78k
  } else if (KernelOrKext && 
(8
!Triple.isiOS()8
||
Triple.isOSVersionLT(6)7
) &&
528
5
             !Triple.isWatchOS()) {
529
4
      Features.push_back("+long-calls");
530
4
  }
531
532
  // Generate execute-only output (no data access to code sections).
533
  // This only makes sense for the compiler, not for the assembler.
534
1.78k
  if (!ForAS) {
535
    // Supported only on ARMv6T2 and ARMv7 and above.
536
    // Cannot be combined with -mno-movt or -mlong-calls
537
1.73k
    if (Arg *A = Args.getLastArg(options::OPT_mexecute_only, options::OPT_mno_execute_only)) {
538
22
      if (A->getOption().matches(options::OPT_mexecute_only)) {
539
14
        if (getARMSubArchVersionNumber(Triple) < 7 &&
540
4
            llvm::ARM::parseArch(Triple.getArchName()) != llvm::ARM::ArchKind::ARMV6T2)
541
2
              D.Diag(diag::err_target_unsupported_execute_only) << Triple.getArchName();
542
12
        else if (Arg *B = Args.getLastArg(options::OPT_mno_movt))
543
2
          D.Diag(diag::err_opt_not_valid_with_opt) << A->getAsString(Args) << B->getAsString(Args);
544
        // Long calls create constant pool entries and have not yet been fixed up
545
        // to play nicely with execute-only. Hence, they cannot be used in
546
        // execute-only code for now
547
10
        else if (Arg *B = Args.getLastArg(options::OPT_mlong_calls, options::OPT_mno_long_calls)) {
548
2
          if (B->getOption().matches(options::OPT_mlong_calls))
549
2
            D.Diag(diag::err_opt_not_valid_with_opt) << A->getAsString(Args) << B->getAsString(Args);
550
2
        }
551
14
        Features.push_back("+execute-only");
552
14
      }
553
22
    }
554
1.73k
  }
555
556
  // Kernel code has more strict alignment requirements.
557
1.78k
  if (KernelOrKext)
558
8
    Features.push_back("+strict-align");
559
1.77k
  else if (Arg *A = Args.getLastArg(options::OPT_mno_unaligned_access,
560
11
                                    options::OPT_munaligned_access)) {
561
11
    if (A->getOption().matches(options::OPT_munaligned_access)) {
562
      // No v6M core supports unaligned memory access (v6M ARM ARM A3.2).
563
6
      if (Triple.getSubArch() == llvm::Triple::SubArchType::ARMSubArch_v6m)
564
2
        D.Diag(diag::err_target_unsupported_unaligned) << "v6m";
565
      // v8M Baseline follows on from v6M, so doesn't support unaligned memory
566
      // access either.
567
4
      else if (Triple.getSubArch() == llvm::Triple::SubArchType::ARMSubArch_v8m_baseline)
568
1
        D.Diag(diag::err_target_unsupported_unaligned) << "v8m.base";
569
6
    } else
570
5
      Features.push_back("+strict-align");
571
1.76k
  } else {
572
    // Assume pre-ARMv6 doesn't support unaligned accesses.
573
    //
574
    // ARMv6 may or may not support unaligned accesses depending on the
575
    // SCTLR.U bit, which is architecture-specific. We assume ARMv6
576
    // Darwin and NetBSD targets support unaligned accesses, and others don't.
577
    //
578
    // ARMv7 always has SCTLR.U set to 1, but it has a new SCTLR.A bit
579
    // which raises an alignment fault on unaligned accesses. Linux
580
    // defaults this bit to 0 and handles it as a system-wide (not
581
    // per-process) setting. It is therefore safe to assume that ARMv7+
582
    // Linux targets support unaligned accesses. The same goes for NaCl.
583
    //
584
    // The above behavior is consistent with GCC.
585
1.76k
    int VersionNum = getARMSubArchVersionNumber(Triple);
586
1.76k
    if (Triple.isOSDarwin() || 
Triple.isOSNetBSD()1.65k
) {
587
145
      if (VersionNum < 6 ||
588
116
          Triple.getSubArch() == llvm::Triple::SubArchType::ARMSubArch_v6m)
589
30
        Features.push_back("+strict-align");
590
1.62k
    } else if (Triple.isOSLinux() || 
Triple.isOSNaCl()1.02k
) {
591
599
      if (VersionNum < 7)
592
239
        Features.push_back("+strict-align");
593
599
    } else
594
1.02k
      Features.push_back("+strict-align");
595
1.76k
  }
596
597
  // llvm does not support reserving registers in general. There is support
598
  // for reserving r9 on ARM though (defined as a platform-specific register
599
  // in ARM EABI).
600
1.78k
  if (Args.hasArg(options::OPT_ffixed_r9))
601
1
    Features.push_back("+reserve-r9");
602
603
  // The kext linker doesn't know how to deal with movw/movt.
604
1.78k
  if (KernelOrKext || 
Args.hasArg(options::OPT_mno_movt)1.77k
)
605
11
    Features.push_back("+no-movt");
606
607
1.78k
  if (Args.hasArg(options::OPT_mno_neg_immediates))
608
1
    Features.push_back("+no-neg-immediates");
609
1.78k
}
610
611
5.94k
const std::string arm::getARMArch(StringRef Arch, const llvm::Triple &Triple) {
612
5.94k
  std::string MArch;
613
5.94k
  if (!Arch.empty())
614
2.90k
    MArch = std::string(Arch);
615
3.03k
  else
616
3.03k
    MArch = std::string(Triple.getArchName());
617
5.94k
  MArch = StringRef(MArch).split("+").first.lower();
618
619
  // Handle -march=native.
620
5.94k
  if (MArch == "native") {
621
0
    std::string CPU = std::string(llvm::sys::getHostCPUName());
622
0
    if (CPU != "generic") {
623
      // Translate the native cpu into the architecture suffix for that CPU.
624
0
      StringRef Suffix = arm::getLLVMArchSuffixForARM(CPU, MArch, Triple);
625
      // If there is no valid architecture suffix for this CPU we don't know how
626
      // to handle it, so return no architecture.
627
0
      if (Suffix.empty())
628
0
        MArch = "";
629
0
      else
630
0
        MArch = std::string("arm") + Suffix.str();
631
0
    }
632
0
  }
633
634
5.94k
  return MArch;
635
5.94k
}
636
637
/// Get the (LLVM) name of the minimum ARM CPU for the arch we are targeting.
638
4.42k
StringRef arm::getARMCPUForMArch(StringRef Arch, const llvm::Triple &Triple) {
639
4.42k
  std::string MArch = getARMArch(Arch, Triple);
640
  // getARMCPUForArch defaults to the triple if MArch is empty, but empty MArch
641
  // here means an -march=native that we can't handle, so instead return no CPU.
642
4.42k
  if (MArch.empty())
643
0
    return StringRef();
644
645
  // We need to return an empty string here on invalid MArch values as the
646
  // various places that call this function can't cope with a null result.
647
4.42k
  return Triple.getARMCPUForArch(MArch);
648
4.42k
}
649
650
/// getARMTargetCPU - Get the (LLVM) name of the ARM cpu we are targeting.
651
std::string arm::getARMTargetCPU(StringRef CPU, StringRef Arch,
652
6.17k
                                 const llvm::Triple &Triple) {
653
  // FIXME: Warn on inconsistent use of -mcpu and -march.
654
  // If we have -mcpu=, use that.
655
6.17k
  if (!CPU.empty()) {
656
2.18k
    std::string MCPU = StringRef(CPU).split("+").first.lower();
657
    // Handle -mcpu=native.
658
2.18k
    if (MCPU == "native")
659
0
      return std::string(llvm::sys::getHostCPUName());
660
2.18k
    else
661
2.18k
      return MCPU;
662
3.99k
  }
663
664
3.99k
  return std::string(getARMCPUForMArch(Arch, Triple));
665
3.99k
}
666
667
/// getLLVMArchSuffixForARM - Get the LLVM ArchKind value to use for a
668
/// particular CPU (or Arch, if CPU is generic). This is needed to
669
/// pass to functions like llvm::ARM::getDefaultFPU which need an
670
/// ArchKind as well as a CPU name.
671
llvm::ARM::ArchKind arm::getLLVMArchKindForARM(StringRef CPU, StringRef Arch,
672
3.08k
                                               const llvm::Triple &Triple) {
673
3.08k
  llvm::ARM::ArchKind ArchKind;
674
3.08k
  if (CPU == "generic" || 
CPU.empty()2.08k
) {
675
1.00k
    std::string ARMArch = tools::arm::getARMArch(Arch, Triple);
676
1.00k
    ArchKind = llvm::ARM::parseArch(ARMArch);
677
1.00k
    if (ArchKind == llvm::ARM::ArchKind::INVALID)
678
      // In case of generic Arch, i.e. "arm",
679
      // extract arch from default cpu of the Triple
680
8
      ArchKind = llvm::ARM::parseCPUArch(Triple.getARMCPUForArch(ARMArch));
681
2.08k
  } else {
682
    // FIXME: horrible hack to get around the fact that Cortex-A7 is only an
683
    // armv7k triple if it's actually been specified via "-arch armv7k".
684
2.08k
    ArchKind = (Arch == "armv7k" || 
Arch == "thumbv7k"2.02k
)
685
58
                          ? llvm::ARM::ArchKind::ARMV7K
686
2.02k
                          : llvm::ARM::parseCPUArch(CPU);
687
2.08k
  }
688
3.08k
  return ArchKind;
689
3.08k
}
690
691
/// getLLVMArchSuffixForARM - Get the LLVM arch name to use for a particular
692
/// CPU  (or Arch, if CPU is generic).
693
// FIXME: This is redundant with -mcpu, why does LLVM use this.
694
StringRef arm::getLLVMArchSuffixForARM(StringRef CPU, StringRef Arch,
695
2.54k
                                       const llvm::Triple &Triple) {
696
2.54k
  llvm::ARM::ArchKind ArchKind = getLLVMArchKindForARM(CPU, Arch, Triple);
697
2.54k
  if (ArchKind == llvm::ARM::ArchKind::INVALID)
698
3
    return "";
699
2.54k
  return llvm::ARM::getSubArch(ArchKind);
700
2.54k
}
701
702
void arm::appendBE8LinkFlag(const ArgList &Args, ArgStringList &CmdArgs,
703
20
                            const llvm::Triple &Triple) {
704
20
  if (Args.hasArg(options::OPT_r))
705
1
    return;
706
707
  // ARMv7 (and later) and ARMv6-M do not support BE-32, so instruct the linker
708
  // to generate BE-8 executables.
709
19
  if (arm::getARMSubArchVersionNumber(Triple) >= 7 || 
arm::isARMMProfile(Triple)12
)
710
7
    CmdArgs.push_back("--be8");
711
19
}