Coverage Report

Created: 2022-07-16 07:03

/Users/buildslave/jenkins/workspace/coverage/llvm-project/lldb/source/Plugins/ABI/AArch64/ABIAArch64.cpp
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//===-- AArch66.h ---------------------------------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "ABIAArch64.h"
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#include "ABIMacOSX_arm64.h"
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#include "ABISysV_arm64.h"
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#include "Utility/ARM64_DWARF_Registers.h"
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#include "lldb/Core/PluginManager.h"
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#include "lldb/Target/Process.h"
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#include <bitset>
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LLDB_PLUGIN_DEFINE(ABIAArch64)
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void ABIAArch64::Initialize() {
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  ABISysV_arm64::Initialize();
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  ABIMacOSX_arm64::Initialize();
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}
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void ABIAArch64::Terminate() {
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  ABISysV_arm64::Terminate();
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  ABIMacOSX_arm64::Terminate();
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}
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lldb::addr_t ABIAArch64::FixCodeAddress(lldb::addr_t pc) {
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  if (lldb::ProcessSP process_sp = GetProcessSP())
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    return FixAddress(pc, process_sp->GetCodeAddressMask());
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  return pc;
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}
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lldb::addr_t ABIAArch64::FixDataAddress(lldb::addr_t pc) {
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  if (lldb::ProcessSP process_sp = GetProcessSP())
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    return FixAddress(pc, process_sp->GetDataAddressMask());
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  return pc;
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}
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std::pair<uint32_t, uint32_t>
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ABIAArch64::GetEHAndDWARFNums(llvm::StringRef name) {
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  if (name == "pc")
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    return {LLDB_INVALID_REGNUM, arm64_dwarf::pc};
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  if (name == "cpsr")
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    return {LLDB_INVALID_REGNUM, arm64_dwarf::cpsr};
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  return MCBasedABI::GetEHAndDWARFNums(name);
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}
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std::string ABIAArch64::GetMCName(std::string reg) {
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  MapRegisterName(reg, "v", "q");
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  MapRegisterName(reg, "x29", "fp");
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  MapRegisterName(reg, "x30", "lr");
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  return reg;
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}
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uint32_t ABIAArch64::GetGenericNum(llvm::StringRef name) {
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  return llvm::StringSwitch<uint32_t>(name)
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      .Case("pc", LLDB_REGNUM_GENERIC_PC)
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      .Cases("lr", "x30", LLDB_REGNUM_GENERIC_RA)
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      .Cases("sp", "x31", LLDB_REGNUM_GENERIC_SP)
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      .Cases("fp", "x29", LLDB_REGNUM_GENERIC_FP)
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      .Case("cpsr", LLDB_REGNUM_GENERIC_FLAGS)
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      .Case("x0", LLDB_REGNUM_GENERIC_ARG1)
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      .Case("x1", LLDB_REGNUM_GENERIC_ARG2)
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      .Case("x2", LLDB_REGNUM_GENERIC_ARG3)
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      .Case("x3", LLDB_REGNUM_GENERIC_ARG4)
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      .Case("x4", LLDB_REGNUM_GENERIC_ARG5)
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      .Case("x5", LLDB_REGNUM_GENERIC_ARG6)
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      .Case("x6", LLDB_REGNUM_GENERIC_ARG7)
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      .Case("x7", LLDB_REGNUM_GENERIC_ARG8)
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      .Default(LLDB_INVALID_REGNUM);
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}
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static void addPartialRegisters(
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    std::vector<lldb_private::DynamicRegisterInfo::Register> &regs,
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    llvm::ArrayRef<llvm::Optional<uint32_t>> full_reg_indices,
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    uint32_t full_reg_size, const char *partial_reg_format,
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    uint32_t partial_reg_size, lldb::Encoding encoding, lldb::Format format) {
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  for (auto it : llvm::enumerate(full_reg_indices)) {
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    llvm::Optional<uint32_t> full_reg_index = it.value();
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    if (!full_reg_index || 
regs[*full_reg_index].byte_size != full_reg_size224
)
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      return;
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    lldb_private::DynamicRegisterInfo::Register partial_reg{
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        lldb_private::ConstString(
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            llvm::formatv(partial_reg_format, it.index()).str()),
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        lldb_private::ConstString(),
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        lldb_private::ConstString("supplementary registers"),
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        partial_reg_size,
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        LLDB_INVALID_INDEX32,
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        encoding,
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        format,
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        LLDB_INVALID_REGNUM,
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        LLDB_INVALID_REGNUM,
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        LLDB_INVALID_REGNUM,
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        LLDB_INVALID_REGNUM,
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        {*full_reg_index},
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        {}};
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    addSupplementaryRegister(regs, partial_reg);
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  }
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}
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void ABIAArch64::AugmentRegisterInfo(
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    std::vector<lldb_private::DynamicRegisterInfo::Register> &regs) {
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  lldb_private::MCBasedABI::AugmentRegisterInfo(regs);
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  lldb_private::ConstString sp_string{"sp"};
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  std::array<llvm::Optional<uint32_t>, 32> x_regs;
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  std::array<llvm::Optional<uint32_t>, 32> v_regs;
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  for (auto it : llvm::enumerate(regs)) {
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    lldb_private::DynamicRegisterInfo::Register &info = it.value();
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    // GDB sends x31 as "sp".  Add the "x31" alt_name for convenience.
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    if (info.name == sp_string && 
!info.alt_name7
)
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      info.alt_name.SetCString("x31");
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    unsigned int reg_num;
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    auto get_reg = [&info, &reg_num](const char *prefix) {
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      llvm::StringRef reg_name = info.name.GetStringRef();
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      llvm::StringRef alt_name = info.alt_name.GetStringRef();
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      return (reg_name.consume_front(prefix) &&
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llvm::to_integer(reg_name, reg_num, 10)251
&&
reg_num < 32251
) ||
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(118
alt_name.consume_front(prefix)118
&&
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llvm::to_integer(alt_name, reg_num, 10)7
&&
reg_num < 327
);
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    };
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    if (get_reg("x"))
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      x_regs[reg_num] = it.index();
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    else if (get_reg("v"))
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      v_regs[reg_num] = it.index();
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    // if we have at least one subregister, abort
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    else if (get_reg("w") || 
get_reg("s")15
||
get_reg("d")15
)
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      return;
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  }
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  // Create aliases for partial registers: wN for xN, and sN/dN for vN.
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  addPartialRegisters(regs, x_regs, 8, "w{0}", 4, lldb::eEncodingUint,
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                      lldb::eFormatHex);
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  addPartialRegisters(regs, v_regs, 16, "s{0}", 4, lldb::eEncodingIEEE754,
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                      lldb::eFormatFloat);
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  addPartialRegisters(regs, v_regs, 16, "d{0}", 8, lldb::eEncodingIEEE754,
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                      lldb::eFormatFloat);
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}