Coverage Report

Created: 2022-01-22 13:19

/Users/buildslave/jenkins/workspace/coverage/llvm-project/lldb/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.h
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//===-- EmulateInstructionMIPS.h ------------------------------------*- C++
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//-*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLDB_SOURCE_PLUGINS_INSTRUCTION_MIPS_EMULATEINSTRUCTIONMIPS_H
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#define LLDB_SOURCE_PLUGINS_INSTRUCTION_MIPS_EMULATEINSTRUCTIONMIPS_H
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namespace llvm {
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class MCDisassembler;
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class MCSubtargetInfo;
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class MCRegisterInfo;
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class MCAsmInfo;
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class MCContext;
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class MCInstrInfo;
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class MCInst;
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}
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namespace lldb_private {
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  class OptionValueDictionary;
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}
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#include "lldb/Core/EmulateInstruction.h"
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#include "lldb/Utility/Status.h"
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class EmulateInstructionMIPS : public lldb_private::EmulateInstruction {
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public:
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  static void Initialize();
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  static void Terminate();
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  static llvm::StringRef GetPluginNameStatic() { return "mips32"; }
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  static llvm::StringRef GetPluginDescriptionStatic();
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  static lldb_private::EmulateInstruction *
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  CreateInstance(const lldb_private::ArchSpec &arch,
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                 lldb_private::InstructionType inst_type);
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  static bool SupportsEmulatingInstructionsOfTypeStatic(
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      lldb_private::InstructionType inst_type) {
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    switch (inst_type) {
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    case lldb_private::eInstructionTypeAny:
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    case lldb_private::eInstructionTypePrologueEpilogue:
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    case lldb_private::eInstructionTypePCModifying:
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      return true;
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    case lldb_private::eInstructionTypeAll:
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      return false;
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    }
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    return false;
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  }
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  llvm::StringRef GetPluginName() override { return GetPluginNameStatic(); }
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  bool SetTargetTriple(const lldb_private::ArchSpec &arch) override;
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  EmulateInstructionMIPS(const lldb_private::ArchSpec &arch);
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  bool SupportsEmulatingInstructionsOfType(
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      lldb_private::InstructionType inst_type) override {
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    return SupportsEmulatingInstructionsOfTypeStatic(inst_type);
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  }
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  bool ReadInstruction() override;
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  bool EvaluateInstruction(uint32_t evaluate_options) override;
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  bool SetInstruction(const lldb_private::Opcode &insn_opcode,
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                      const lldb_private::Address &inst_addr,
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                      lldb_private::Target *target) override;
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  bool TestEmulation(lldb_private::Stream *out_stream,
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                     lldb_private::ArchSpec &arch,
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                     lldb_private::OptionValueDictionary *test_data) override {
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    return false;
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  }
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  bool GetRegisterInfo(lldb::RegisterKind reg_kind, uint32_t reg_num,
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                       lldb_private::RegisterInfo &reg_info) override;
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  bool
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  CreateFunctionEntryUnwind(lldb_private::UnwindPlan &unwind_plan) override;
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protected:
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  typedef struct {
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    const char *op_name;
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    bool (EmulateInstructionMIPS::*callback)(llvm::MCInst &insn);
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    const char *insn_name;
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  } MipsOpcode;
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  static MipsOpcode *GetOpcodeForInstruction(const char *op_name);
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  uint32_t GetSizeOfInstruction(lldb_private::DataExtractor &data,
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                                uint64_t inst_addr);
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  bool Emulate_ADDiu(llvm::MCInst &insn);
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  bool Emulate_SUBU_ADDU(llvm::MCInst &insn);
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  bool Emulate_LUI(llvm::MCInst &insn);
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  bool Emulate_SW(llvm::MCInst &insn);
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  bool Emulate_LW(llvm::MCInst &insn);
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  bool Emulate_ADDIUSP(llvm::MCInst &insn);
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  bool Emulate_ADDIUS5(llvm::MCInst &insn);
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  bool Emulate_SWSP(llvm::MCInst &insn);
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  bool Emulate_SWM16_32(llvm::MCInst &insn);
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  bool Emulate_LWSP(llvm::MCInst &insn);
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  bool Emulate_LWM16_32(llvm::MCInst &insn);
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  bool Emulate_JRADDIUSP(llvm::MCInst &insn);
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  bool Emulate_LDST_Imm(llvm::MCInst &insn);
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  bool Emulate_LDST_Reg(llvm::MCInst &insn);
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  bool Emulate_BXX_3ops(llvm::MCInst &insn);
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  bool Emulate_BXX_3ops_C(llvm::MCInst &insn);
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  bool Emulate_BXX_2ops(llvm::MCInst &insn);
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  bool Emulate_BXX_2ops_C(llvm::MCInst &insn);
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  bool Emulate_Bcond_Link_C(llvm::MCInst &insn);
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  bool Emulate_Bcond_Link(llvm::MCInst &insn);
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  bool Emulate_FP_branch(llvm::MCInst &insn);
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  bool Emulate_3D_branch(llvm::MCInst &insn);
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  bool Emulate_BAL(llvm::MCInst &insn);
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  bool Emulate_BALC(llvm::MCInst &insn);
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  bool Emulate_BC(llvm::MCInst &insn);
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  bool Emulate_J(llvm::MCInst &insn);
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  bool Emulate_JAL(llvm::MCInst &insn);
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  bool Emulate_JALR(llvm::MCInst &insn);
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  bool Emulate_JIALC(llvm::MCInst &insn);
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  bool Emulate_JIC(llvm::MCInst &insn);
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  bool Emulate_JR(llvm::MCInst &insn);
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  bool Emulate_BC1EQZ(llvm::MCInst &insn);
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  bool Emulate_BC1NEZ(llvm::MCInst &insn);
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  bool Emulate_BNZB(llvm::MCInst &insn);
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  bool Emulate_BNZH(llvm::MCInst &insn);
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  bool Emulate_BNZW(llvm::MCInst &insn);
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  bool Emulate_BNZD(llvm::MCInst &insn);
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  bool Emulate_BZB(llvm::MCInst &insn);
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  bool Emulate_BZH(llvm::MCInst &insn);
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  bool Emulate_BZW(llvm::MCInst &insn);
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  bool Emulate_BZD(llvm::MCInst &insn);
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  bool Emulate_MSA_Branch_DF(llvm::MCInst &insn, int element_byte_size,
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                             bool bnz);
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  bool Emulate_BNZV(llvm::MCInst &insn);
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  bool Emulate_BZV(llvm::MCInst &insn);
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  bool Emulate_MSA_Branch_V(llvm::MCInst &insn, bool bnz);
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  bool Emulate_B16_MM(llvm::MCInst &insn);
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  bool Emulate_Branch_MM(llvm::MCInst &insn);
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  bool Emulate_JALRx16_MM(llvm::MCInst &insn);
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  bool Emulate_JALx(llvm::MCInst &insn);
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  bool Emulate_JALRS(llvm::MCInst &insn);
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  bool nonvolatile_reg_p(uint32_t regnum);
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  const char *GetRegisterName(unsigned reg_num, bool alternate_name);
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private:
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  std::unique_ptr<llvm::MCDisassembler> m_disasm;
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  std::unique_ptr<llvm::MCDisassembler> m_alt_disasm;
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  std::unique_ptr<llvm::MCSubtargetInfo> m_subtype_info;
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  std::unique_ptr<llvm::MCSubtargetInfo> m_alt_subtype_info;
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  std::unique_ptr<llvm::MCRegisterInfo> m_reg_info;
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  std::unique_ptr<llvm::MCAsmInfo> m_asm_info;
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  std::unique_ptr<llvm::MCContext> m_context;
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  std::unique_ptr<llvm::MCInstrInfo> m_insn_info;
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  uint32_t m_next_inst_size;
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  bool m_use_alt_disaasm;
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};
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#endif // LLDB_SOURCE_PLUGINS_INSTRUCTION_MIPS_EMULATEINSTRUCTIONMIPS_H