Coverage Report

Created: 2022-01-25 06:29

/Users/buildslave/jenkins/workspace/coverage/llvm-project/lldb/source/Plugins/UnwindAssembly/x86/x86AssemblyInspectionEngine.h
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//===-- x86AssemblyInspectionEngine.h ---------------------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLDB_SOURCE_PLUGINS_UNWINDASSEMBLY_X86_X86ASSEMBLYINSPECTIONENGINE_H
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#define LLDB_SOURCE_PLUGINS_UNWINDASSEMBLY_X86_X86ASSEMBLYINSPECTIONENGINE_H
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#include "llvm-c/Disassembler.h"
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#include "lldb/Utility/ArchSpec.h"
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#include "lldb/Utility/ConstString.h"
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#include "lldb/lldb-enumerations.h"
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#include "lldb/lldb-forward.h"
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#include "lldb/lldb-private.h"
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#include <map>
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#include <vector>
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namespace lldb_private {
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// x86AssemblyInspectionEngine - a class which will take a buffer of bytes
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// of i386/x86_64 instructions and create an UnwindPlan based on those
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// assembly instructions.
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class x86AssemblyInspectionEngine {
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public:
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  /// default ctor
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  x86AssemblyInspectionEngine(const lldb_private::ArchSpec &arch);
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  /// default dtor
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  ~x86AssemblyInspectionEngine();
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  /// One of the two initialize methods that can be called on this object;
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  /// they must be called before any of the assembly inspection methods
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  /// are called.  This one should be used if the caller has access to a
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  /// valid RegisterContext.
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  void Initialize(lldb::RegisterContextSP &reg_ctx);
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  /// One of the two initialize methods that can be called on this object;
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  /// they must be called before any of the assembly inspection methods
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  /// are called.  This one takes a vector of register name and lldb
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  /// register numbers.
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  struct lldb_reg_info {
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    const char *name = nullptr;
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    uint32_t lldb_regnum = LLDB_INVALID_REGNUM;
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    lldb_reg_info() = default;
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  };
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  void Initialize(std::vector<lldb_reg_info> &reg_info);
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  /// Create an UnwindPlan for a "non-call site" stack frame situation.
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  /// This is usually when this function/method is currently executing, and may
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  /// be at
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  /// a location where exception-handling style unwind information (eh_frame,
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  /// compact unwind info, arm unwind info)
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  /// are not valid.
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  /// \p data is a pointer to the instructions for the function
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  /// \p size is the size of the instruction buffer above
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  /// \p func_range is the start Address and size of the function, to be
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  /// included in the UnwindPlan
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  /// \p unwind_plan is the unwind plan that this method creates
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  /// \returns true if it was able to create an UnwindPlan; false if not.
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  bool
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  GetNonCallSiteUnwindPlanFromAssembly(uint8_t *data, size_t size,
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                                       lldb_private::AddressRange &func_range,
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                                       lldb_private::UnwindPlan &unwind_plan);
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  /// Take an existing UnwindPlan, probably from eh_frame which may be missing
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  /// description
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  /// of the epilogue instructions, and add the epilogue description to it based
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  /// on the
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  /// instructions in the function.
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  ///
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  /// The \p unwind_plan 's register numbers must be converted into the lldb
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  /// register numbering
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  /// scheme OR a RegisterContext must be provided in \p reg_ctx.  If the \p
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  /// unwind_plan
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  /// register numbers are already in lldb register numbering, \p reg_ctx may be
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  /// null.
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  /// \returns true if the \p unwind_plan was updated, false if it was not.
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  bool AugmentUnwindPlanFromCallSite(uint8_t *data, size_t size,
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                                     lldb_private::AddressRange &func_range,
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                                     lldb_private::UnwindPlan &unwind_plan,
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                                     lldb::RegisterContextSP &reg_ctx);
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  bool FindFirstNonPrologueInstruction(uint8_t *data, size_t size,
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                                       size_t &offset);
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private:
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  bool nonvolatile_reg_p(int machine_regno);
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  bool push_rbp_pattern_p();
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  bool push_0_pattern_p();
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  bool push_imm_pattern_p();
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  bool push_extended_pattern_p();
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  bool push_misc_reg_p();
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  bool mov_rsp_rbp_pattern_p();
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  bool mov_rsp_rbx_pattern_p();
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  bool mov_rbp_rsp_pattern_p();
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  bool mov_rbx_rsp_pattern_p();
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  bool sub_rsp_pattern_p(int &amount);
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  bool add_rsp_pattern_p(int &amount);
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  bool lea_rsp_pattern_p(int &amount);
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  bool lea_rbp_rsp_pattern_p(int &amount);
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  bool lea_rbx_rsp_pattern_p(int &amount);
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  bool and_rsp_pattern_p();
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  bool push_reg_p(int &regno);
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  bool pop_reg_p(int &regno);
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  bool pop_rbp_pattern_p();
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  bool pop_misc_reg_p();
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  bool leave_pattern_p();
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  bool call_next_insn_pattern_p();
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  bool mov_reg_to_local_stack_frame_p(int &regno, int &rbp_offset);
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  bool ret_pattern_p();
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  bool jmp_to_reg_p();
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  bool pc_rel_branch_or_jump_p (const int instruction_length, int &offset);
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  bool non_local_branch_p (const lldb::addr_t current_func_text_offset, 
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                           const lldb_private::AddressRange &func_range,
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                           const int instruction_length);
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  bool local_branch_p (const lldb::addr_t current_func_text_offset, 
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                       const lldb_private::AddressRange &func_range,
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                       const int instruction_length,
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                       lldb::addr_t &target_insn_offset);
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  uint16_t extract_2(uint8_t *b);
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  int16_t extract_2_signed(uint8_t *b);
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  uint32_t extract_4(uint8_t *b);
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  int32_t extract_4_signed(uint8_t *b);
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  bool instruction_length(uint8_t *insn, int &length, uint32_t buffer_remaining_bytes);
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  bool machine_regno_to_lldb_regno(int machine_regno, uint32_t &lldb_regno);
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  enum CPU { k_i386, k_x86_64, k_cpu_unspecified };
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  enum i386_register_numbers {
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    k_machine_eax = 0,
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    k_machine_ecx = 1,
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    k_machine_edx = 2,
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    k_machine_ebx = 3,
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    k_machine_esp = 4,
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    k_machine_ebp = 5,
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    k_machine_esi = 6,
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    k_machine_edi = 7,
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    k_machine_eip = 8
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  };
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  enum x86_64_register_numbers {
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    k_machine_rax = 0,
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    k_machine_rcx = 1,
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    k_machine_rdx = 2,
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    k_machine_rbx = 3,
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    k_machine_rsp = 4,
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    k_machine_rbp = 5,
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    k_machine_rsi = 6,
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    k_machine_rdi = 7,
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    k_machine_r8 = 8,
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    k_machine_r9 = 9,
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    k_machine_r10 = 10,
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    k_machine_r11 = 11,
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    k_machine_r12 = 12,
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    k_machine_r13 = 13,
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    k_machine_r14 = 14,
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    k_machine_r15 = 15,
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    k_machine_rip = 16
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  };
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  enum { kMaxInstructionByteSize = 32 };
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  uint8_t *m_cur_insn;
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  uint32_t m_machine_ip_regnum;
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  uint32_t m_machine_sp_regnum;
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  uint32_t m_machine_fp_regnum;
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  uint32_t m_machine_alt_fp_regnum;
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  uint32_t m_lldb_ip_regnum;
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  uint32_t m_lldb_sp_regnum;
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  uint32_t m_lldb_fp_regnum;
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  uint32_t m_lldb_alt_fp_regnum;
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  typedef std::map<uint32_t, lldb_reg_info> MachineRegnumToNameAndLLDBRegnum;
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  MachineRegnumToNameAndLLDBRegnum m_reg_map;
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  lldb_private::ArchSpec m_arch;
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  CPU m_cpu;
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  int m_wordsize;
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  bool m_register_map_initialized;
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  ::LLVMDisasmContextRef m_disasm_context;
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  x86AssemblyInspectionEngine(const x86AssemblyInspectionEngine &) = delete;
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  const x86AssemblyInspectionEngine &
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  operator=(const x86AssemblyInspectionEngine &) = delete;
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};
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} // namespace lldb_private
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#endif // LLDB_SOURCE_PLUGINS_UNWINDASSEMBLY_X86_X86ASSEMBLYINSPECTIONENGINE_H