/Users/buildslave/jenkins/sharedspace/clang-stage2-coverage-R@2/llvm/include/llvm/BinaryFormat/ELF.h
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1 | | //===- llvm/BinaryFormat/ELF.h - ELF constants and structures ---*- C++ -*-===// |
2 | | // |
3 | | // The LLVM Compiler Infrastructure |
4 | | // |
5 | | // This file is distributed under the University of Illinois Open Source |
6 | | // License. See LICENSE.TXT for details. |
7 | | // |
8 | | //===----------------------------------------------------------------------===// |
9 | | // |
10 | | // This header contains common, non-processor-specific data structures and |
11 | | // constants for the ELF file format. |
12 | | // |
13 | | // The details of the ELF32 bits in this file are largely based on the Tool |
14 | | // Interface Standard (TIS) Executable and Linking Format (ELF) Specification |
15 | | // Version 1.2, May 1995. The ELF64 stuff is based on ELF-64 Object File Format |
16 | | // Version 1.5, Draft 2, May 1998 as well as OpenBSD header files. |
17 | | // |
18 | | //===----------------------------------------------------------------------===// |
19 | | |
20 | | #ifndef LLVM_BINARYFORMAT_ELF_H |
21 | | #define LLVM_BINARYFORMAT_ELF_H |
22 | | |
23 | | #include <cstdint> |
24 | | #include <cstring> |
25 | | |
26 | | namespace llvm { |
27 | | namespace ELF { |
28 | | |
29 | | using Elf32_Addr = uint32_t; // Program address |
30 | | using Elf32_Off = uint32_t; // File offset |
31 | | using Elf32_Half = uint16_t; |
32 | | using Elf32_Word = uint32_t; |
33 | | using Elf32_Sword = int32_t; |
34 | | |
35 | | using Elf64_Addr = uint64_t; |
36 | | using Elf64_Off = uint64_t; |
37 | | using Elf64_Half = uint16_t; |
38 | | using Elf64_Word = uint32_t; |
39 | | using Elf64_Sword = int32_t; |
40 | | using Elf64_Xword = uint64_t; |
41 | | using Elf64_Sxword = int64_t; |
42 | | |
43 | | // Object file magic string. |
44 | | static const char ElfMagic[] = {0x7f, 'E', 'L', 'F', '\0'}; |
45 | | |
46 | | // e_ident size and indices. |
47 | | enum { |
48 | | EI_MAG0 = 0, // File identification index. |
49 | | EI_MAG1 = 1, // File identification index. |
50 | | EI_MAG2 = 2, // File identification index. |
51 | | EI_MAG3 = 3, // File identification index. |
52 | | EI_CLASS = 4, // File class. |
53 | | EI_DATA = 5, // Data encoding. |
54 | | EI_VERSION = 6, // File version. |
55 | | EI_OSABI = 7, // OS/ABI identification. |
56 | | EI_ABIVERSION = 8, // ABI version. |
57 | | EI_PAD = 9, // Start of padding bytes. |
58 | | EI_NIDENT = 16 // Number of bytes in e_ident. |
59 | | }; |
60 | | |
61 | | struct Elf32_Ehdr { |
62 | | unsigned char e_ident[EI_NIDENT]; // ELF Identification bytes |
63 | | Elf32_Half e_type; // Type of file (see ET_* below) |
64 | | Elf32_Half e_machine; // Required architecture for this file (see EM_*) |
65 | | Elf32_Word e_version; // Must be equal to 1 |
66 | | Elf32_Addr e_entry; // Address to jump to in order to start program |
67 | | Elf32_Off e_phoff; // Program header table's file offset, in bytes |
68 | | Elf32_Off e_shoff; // Section header table's file offset, in bytes |
69 | | Elf32_Word e_flags; // Processor-specific flags |
70 | | Elf32_Half e_ehsize; // Size of ELF header, in bytes |
71 | | Elf32_Half e_phentsize; // Size of an entry in the program header table |
72 | | Elf32_Half e_phnum; // Number of entries in the program header table |
73 | | Elf32_Half e_shentsize; // Size of an entry in the section header table |
74 | | Elf32_Half e_shnum; // Number of entries in the section header table |
75 | | Elf32_Half e_shstrndx; // Sect hdr table index of sect name string table |
76 | | |
77 | 0 | bool checkMagic() const { |
78 | 0 | return (memcmp(e_ident, ElfMagic, strlen(ElfMagic))) == 0; |
79 | 0 | } |
80 | | |
81 | 0 | unsigned char getFileClass() const { return e_ident[EI_CLASS]; } |
82 | 0 | unsigned char getDataEncoding() const { return e_ident[EI_DATA]; } |
83 | | }; |
84 | | |
85 | | // 64-bit ELF header. Fields are the same as for ELF32, but with different |
86 | | // types (see above). |
87 | | struct Elf64_Ehdr { |
88 | | unsigned char e_ident[EI_NIDENT]; |
89 | | Elf64_Half e_type; |
90 | | Elf64_Half e_machine; |
91 | | Elf64_Word e_version; |
92 | | Elf64_Addr e_entry; |
93 | | Elf64_Off e_phoff; |
94 | | Elf64_Off e_shoff; |
95 | | Elf64_Word e_flags; |
96 | | Elf64_Half e_ehsize; |
97 | | Elf64_Half e_phentsize; |
98 | | Elf64_Half e_phnum; |
99 | | Elf64_Half e_shentsize; |
100 | | Elf64_Half e_shnum; |
101 | | Elf64_Half e_shstrndx; |
102 | | |
103 | 0 | bool checkMagic() const { |
104 | 0 | return (memcmp(e_ident, ElfMagic, strlen(ElfMagic))) == 0; |
105 | 0 | } |
106 | | |
107 | 0 | unsigned char getFileClass() const { return e_ident[EI_CLASS]; } |
108 | 0 | unsigned char getDataEncoding() const { return e_ident[EI_DATA]; } |
109 | | }; |
110 | | |
111 | | // File types |
112 | | enum { |
113 | | ET_NONE = 0, // No file type |
114 | | ET_REL = 1, // Relocatable file |
115 | | ET_EXEC = 2, // Executable file |
116 | | ET_DYN = 3, // Shared object file |
117 | | ET_CORE = 4, // Core file |
118 | | ET_LOPROC = 0xff00, // Beginning of processor-specific codes |
119 | | ET_HIPROC = 0xffff // Processor-specific |
120 | | }; |
121 | | |
122 | | // Versioning |
123 | | enum { EV_NONE = 0, EV_CURRENT = 1 }; |
124 | | |
125 | | // Machine architectures |
126 | | // See current registered ELF machine architectures at: |
127 | | // http://www.uxsglobal.com/developers/gabi/latest/ch4.eheader.html |
128 | | enum { |
129 | | EM_NONE = 0, // No machine |
130 | | EM_M32 = 1, // AT&T WE 32100 |
131 | | EM_SPARC = 2, // SPARC |
132 | | EM_386 = 3, // Intel 386 |
133 | | EM_68K = 4, // Motorola 68000 |
134 | | EM_88K = 5, // Motorola 88000 |
135 | | EM_IAMCU = 6, // Intel MCU |
136 | | EM_860 = 7, // Intel 80860 |
137 | | EM_MIPS = 8, // MIPS R3000 |
138 | | EM_S370 = 9, // IBM System/370 |
139 | | EM_MIPS_RS3_LE = 10, // MIPS RS3000 Little-endian |
140 | | EM_PARISC = 15, // Hewlett-Packard PA-RISC |
141 | | EM_VPP500 = 17, // Fujitsu VPP500 |
142 | | EM_SPARC32PLUS = 18, // Enhanced instruction set SPARC |
143 | | EM_960 = 19, // Intel 80960 |
144 | | EM_PPC = 20, // PowerPC |
145 | | EM_PPC64 = 21, // PowerPC64 |
146 | | EM_S390 = 22, // IBM System/390 |
147 | | EM_SPU = 23, // IBM SPU/SPC |
148 | | EM_V800 = 36, // NEC V800 |
149 | | EM_FR20 = 37, // Fujitsu FR20 |
150 | | EM_RH32 = 38, // TRW RH-32 |
151 | | EM_RCE = 39, // Motorola RCE |
152 | | EM_ARM = 40, // ARM |
153 | | EM_ALPHA = 41, // DEC Alpha |
154 | | EM_SH = 42, // Hitachi SH |
155 | | EM_SPARCV9 = 43, // SPARC V9 |
156 | | EM_TRICORE = 44, // Siemens TriCore |
157 | | EM_ARC = 45, // Argonaut RISC Core |
158 | | EM_H8_300 = 46, // Hitachi H8/300 |
159 | | EM_H8_300H = 47, // Hitachi H8/300H |
160 | | EM_H8S = 48, // Hitachi H8S |
161 | | EM_H8_500 = 49, // Hitachi H8/500 |
162 | | EM_IA_64 = 50, // Intel IA-64 processor architecture |
163 | | EM_MIPS_X = 51, // Stanford MIPS-X |
164 | | EM_COLDFIRE = 52, // Motorola ColdFire |
165 | | EM_68HC12 = 53, // Motorola M68HC12 |
166 | | EM_MMA = 54, // Fujitsu MMA Multimedia Accelerator |
167 | | EM_PCP = 55, // Siemens PCP |
168 | | EM_NCPU = 56, // Sony nCPU embedded RISC processor |
169 | | EM_NDR1 = 57, // Denso NDR1 microprocessor |
170 | | EM_STARCORE = 58, // Motorola Star*Core processor |
171 | | EM_ME16 = 59, // Toyota ME16 processor |
172 | | EM_ST100 = 60, // STMicroelectronics ST100 processor |
173 | | EM_TINYJ = 61, // Advanced Logic Corp. TinyJ embedded processor family |
174 | | EM_X86_64 = 62, // AMD x86-64 architecture |
175 | | EM_PDSP = 63, // Sony DSP Processor |
176 | | EM_PDP10 = 64, // Digital Equipment Corp. PDP-10 |
177 | | EM_PDP11 = 65, // Digital Equipment Corp. PDP-11 |
178 | | EM_FX66 = 66, // Siemens FX66 microcontroller |
179 | | EM_ST9PLUS = 67, // STMicroelectronics ST9+ 8/16 bit microcontroller |
180 | | EM_ST7 = 68, // STMicroelectronics ST7 8-bit microcontroller |
181 | | EM_68HC16 = 69, // Motorola MC68HC16 Microcontroller |
182 | | EM_68HC11 = 70, // Motorola MC68HC11 Microcontroller |
183 | | EM_68HC08 = 71, // Motorola MC68HC08 Microcontroller |
184 | | EM_68HC05 = 72, // Motorola MC68HC05 Microcontroller |
185 | | EM_SVX = 73, // Silicon Graphics SVx |
186 | | EM_ST19 = 74, // STMicroelectronics ST19 8-bit microcontroller |
187 | | EM_VAX = 75, // Digital VAX |
188 | | EM_CRIS = 76, // Axis Communications 32-bit embedded processor |
189 | | EM_JAVELIN = 77, // Infineon Technologies 32-bit embedded processor |
190 | | EM_FIREPATH = 78, // Element 14 64-bit DSP Processor |
191 | | EM_ZSP = 79, // LSI Logic 16-bit DSP Processor |
192 | | EM_MMIX = 80, // Donald Knuth's educational 64-bit processor |
193 | | EM_HUANY = 81, // Harvard University machine-independent object files |
194 | | EM_PRISM = 82, // SiTera Prism |
195 | | EM_AVR = 83, // Atmel AVR 8-bit microcontroller |
196 | | EM_FR30 = 84, // Fujitsu FR30 |
197 | | EM_D10V = 85, // Mitsubishi D10V |
198 | | EM_D30V = 86, // Mitsubishi D30V |
199 | | EM_V850 = 87, // NEC v850 |
200 | | EM_M32R = 88, // Mitsubishi M32R |
201 | | EM_MN10300 = 89, // Matsushita MN10300 |
202 | | EM_MN10200 = 90, // Matsushita MN10200 |
203 | | EM_PJ = 91, // picoJava |
204 | | EM_OPENRISC = 92, // OpenRISC 32-bit embedded processor |
205 | | EM_ARC_COMPACT = 93, // ARC International ARCompact processor (old |
206 | | // spelling/synonym: EM_ARC_A5) |
207 | | EM_XTENSA = 94, // Tensilica Xtensa Architecture |
208 | | EM_VIDEOCORE = 95, // Alphamosaic VideoCore processor |
209 | | EM_TMM_GPP = 96, // Thompson Multimedia General Purpose Processor |
210 | | EM_NS32K = 97, // National Semiconductor 32000 series |
211 | | EM_TPC = 98, // Tenor Network TPC processor |
212 | | EM_SNP1K = 99, // Trebia SNP 1000 processor |
213 | | EM_ST200 = 100, // STMicroelectronics (www.st.com) ST200 |
214 | | EM_IP2K = 101, // Ubicom IP2xxx microcontroller family |
215 | | EM_MAX = 102, // MAX Processor |
216 | | EM_CR = 103, // National Semiconductor CompactRISC microprocessor |
217 | | EM_F2MC16 = 104, // Fujitsu F2MC16 |
218 | | EM_MSP430 = 105, // Texas Instruments embedded microcontroller msp430 |
219 | | EM_BLACKFIN = 106, // Analog Devices Blackfin (DSP) processor |
220 | | EM_SE_C33 = 107, // S1C33 Family of Seiko Epson processors |
221 | | EM_SEP = 108, // Sharp embedded microprocessor |
222 | | EM_ARCA = 109, // Arca RISC Microprocessor |
223 | | EM_UNICORE = 110, // Microprocessor series from PKU-Unity Ltd. and MPRC |
224 | | // of Peking University |
225 | | EM_EXCESS = 111, // eXcess: 16/32/64-bit configurable embedded CPU |
226 | | EM_DXP = 112, // Icera Semiconductor Inc. Deep Execution Processor |
227 | | EM_ALTERA_NIOS2 = 113, // Altera Nios II soft-core processor |
228 | | EM_CRX = 114, // National Semiconductor CompactRISC CRX |
229 | | EM_XGATE = 115, // Motorola XGATE embedded processor |
230 | | EM_C166 = 116, // Infineon C16x/XC16x processor |
231 | | EM_M16C = 117, // Renesas M16C series microprocessors |
232 | | EM_DSPIC30F = 118, // Microchip Technology dsPIC30F Digital Signal |
233 | | // Controller |
234 | | EM_CE = 119, // Freescale Communication Engine RISC core |
235 | | EM_M32C = 120, // Renesas M32C series microprocessors |
236 | | EM_TSK3000 = 131, // Altium TSK3000 core |
237 | | EM_RS08 = 132, // Freescale RS08 embedded processor |
238 | | EM_SHARC = 133, // Analog Devices SHARC family of 32-bit DSP |
239 | | // processors |
240 | | EM_ECOG2 = 134, // Cyan Technology eCOG2 microprocessor |
241 | | EM_SCORE7 = 135, // Sunplus S+core7 RISC processor |
242 | | EM_DSP24 = 136, // New Japan Radio (NJR) 24-bit DSP Processor |
243 | | EM_VIDEOCORE3 = 137, // Broadcom VideoCore III processor |
244 | | EM_LATTICEMICO32 = 138, // RISC processor for Lattice FPGA architecture |
245 | | EM_SE_C17 = 139, // Seiko Epson C17 family |
246 | | EM_TI_C6000 = 140, // The Texas Instruments TMS320C6000 DSP family |
247 | | EM_TI_C2000 = 141, // The Texas Instruments TMS320C2000 DSP family |
248 | | EM_TI_C5500 = 142, // The Texas Instruments TMS320C55x DSP family |
249 | | EM_MMDSP_PLUS = 160, // STMicroelectronics 64bit VLIW Data Signal Processor |
250 | | EM_CYPRESS_M8C = 161, // Cypress M8C microprocessor |
251 | | EM_R32C = 162, // Renesas R32C series microprocessors |
252 | | EM_TRIMEDIA = 163, // NXP Semiconductors TriMedia architecture family |
253 | | EM_HEXAGON = 164, // Qualcomm Hexagon processor |
254 | | EM_8051 = 165, // Intel 8051 and variants |
255 | | EM_STXP7X = 166, // STMicroelectronics STxP7x family of configurable |
256 | | // and extensible RISC processors |
257 | | EM_NDS32 = 167, // Andes Technology compact code size embedded RISC |
258 | | // processor family |
259 | | EM_ECOG1 = 168, // Cyan Technology eCOG1X family |
260 | | EM_ECOG1X = 168, // Cyan Technology eCOG1X family |
261 | | EM_MAXQ30 = 169, // Dallas Semiconductor MAXQ30 Core Micro-controllers |
262 | | EM_XIMO16 = 170, // New Japan Radio (NJR) 16-bit DSP Processor |
263 | | EM_MANIK = 171, // M2000 Reconfigurable RISC Microprocessor |
264 | | EM_CRAYNV2 = 172, // Cray Inc. NV2 vector architecture |
265 | | EM_RX = 173, // Renesas RX family |
266 | | EM_METAG = 174, // Imagination Technologies META processor |
267 | | // architecture |
268 | | EM_MCST_ELBRUS = 175, // MCST Elbrus general purpose hardware architecture |
269 | | EM_ECOG16 = 176, // Cyan Technology eCOG16 family |
270 | | EM_CR16 = 177, // National Semiconductor CompactRISC CR16 16-bit |
271 | | // microprocessor |
272 | | EM_ETPU = 178, // Freescale Extended Time Processing Unit |
273 | | EM_SLE9X = 179, // Infineon Technologies SLE9X core |
274 | | EM_L10M = 180, // Intel L10M |
275 | | EM_K10M = 181, // Intel K10M |
276 | | EM_AARCH64 = 183, // ARM AArch64 |
277 | | EM_AVR32 = 185, // Atmel Corporation 32-bit microprocessor family |
278 | | EM_STM8 = 186, // STMicroeletronics STM8 8-bit microcontroller |
279 | | EM_TILE64 = 187, // Tilera TILE64 multicore architecture family |
280 | | EM_TILEPRO = 188, // Tilera TILEPro multicore architecture family |
281 | | EM_CUDA = 190, // NVIDIA CUDA architecture |
282 | | EM_TILEGX = 191, // Tilera TILE-Gx multicore architecture family |
283 | | EM_CLOUDSHIELD = 192, // CloudShield architecture family |
284 | | EM_COREA_1ST = 193, // KIPO-KAIST Core-A 1st generation processor family |
285 | | EM_COREA_2ND = 194, // KIPO-KAIST Core-A 2nd generation processor family |
286 | | EM_ARC_COMPACT2 = 195, // Synopsys ARCompact V2 |
287 | | EM_OPEN8 = 196, // Open8 8-bit RISC soft processor core |
288 | | EM_RL78 = 197, // Renesas RL78 family |
289 | | EM_VIDEOCORE5 = 198, // Broadcom VideoCore V processor |
290 | | EM_78KOR = 199, // Renesas 78KOR family |
291 | | EM_56800EX = 200, // Freescale 56800EX Digital Signal Controller (DSC) |
292 | | EM_BA1 = 201, // Beyond BA1 CPU architecture |
293 | | EM_BA2 = 202, // Beyond BA2 CPU architecture |
294 | | EM_XCORE = 203, // XMOS xCORE processor family |
295 | | EM_MCHP_PIC = 204, // Microchip 8-bit PIC(r) family |
296 | | EM_INTEL205 = 205, // Reserved by Intel |
297 | | EM_INTEL206 = 206, // Reserved by Intel |
298 | | EM_INTEL207 = 207, // Reserved by Intel |
299 | | EM_INTEL208 = 208, // Reserved by Intel |
300 | | EM_INTEL209 = 209, // Reserved by Intel |
301 | | EM_KM32 = 210, // KM211 KM32 32-bit processor |
302 | | EM_KMX32 = 211, // KM211 KMX32 32-bit processor |
303 | | EM_KMX16 = 212, // KM211 KMX16 16-bit processor |
304 | | EM_KMX8 = 213, // KM211 KMX8 8-bit processor |
305 | | EM_KVARC = 214, // KM211 KVARC processor |
306 | | EM_CDP = 215, // Paneve CDP architecture family |
307 | | EM_COGE = 216, // Cognitive Smart Memory Processor |
308 | | EM_COOL = 217, // iCelero CoolEngine |
309 | | EM_NORC = 218, // Nanoradio Optimized RISC |
310 | | EM_CSR_KALIMBA = 219, // CSR Kalimba architecture family |
311 | | EM_AMDGPU = 224, // AMD GPU architecture |
312 | | EM_RISCV = 243, // RISC-V |
313 | | EM_LANAI = 244, // Lanai 32-bit processor |
314 | | EM_BPF = 247, // Linux kernel bpf virtual machine |
315 | | |
316 | | // A request has been made to the maintainer of the official registry for |
317 | | // such numbers for an official value for WebAssembly. As soon as one is |
318 | | // allocated, this enum will be updated to use it. |
319 | | EM_WEBASSEMBLY = 0x4157, // WebAssembly architecture |
320 | | }; |
321 | | |
322 | | // Object file classes. |
323 | | enum { |
324 | | ELFCLASSNONE = 0, |
325 | | ELFCLASS32 = 1, // 32-bit object file |
326 | | ELFCLASS64 = 2 // 64-bit object file |
327 | | }; |
328 | | |
329 | | // Object file byte orderings. |
330 | | enum { |
331 | | ELFDATANONE = 0, // Invalid data encoding. |
332 | | ELFDATA2LSB = 1, // Little-endian object file |
333 | | ELFDATA2MSB = 2 // Big-endian object file |
334 | | }; |
335 | | |
336 | | // OS ABI identification. |
337 | | enum { |
338 | | ELFOSABI_NONE = 0, // UNIX System V ABI |
339 | | ELFOSABI_HPUX = 1, // HP-UX operating system |
340 | | ELFOSABI_NETBSD = 2, // NetBSD |
341 | | ELFOSABI_GNU = 3, // GNU/Linux |
342 | | ELFOSABI_LINUX = 3, // Historical alias for ELFOSABI_GNU. |
343 | | ELFOSABI_HURD = 4, // GNU/Hurd |
344 | | ELFOSABI_SOLARIS = 6, // Solaris |
345 | | ELFOSABI_AIX = 7, // AIX |
346 | | ELFOSABI_IRIX = 8, // IRIX |
347 | | ELFOSABI_FREEBSD = 9, // FreeBSD |
348 | | ELFOSABI_TRU64 = 10, // TRU64 UNIX |
349 | | ELFOSABI_MODESTO = 11, // Novell Modesto |
350 | | ELFOSABI_OPENBSD = 12, // OpenBSD |
351 | | ELFOSABI_OPENVMS = 13, // OpenVMS |
352 | | ELFOSABI_NSK = 14, // Hewlett-Packard Non-Stop Kernel |
353 | | ELFOSABI_AROS = 15, // AROS |
354 | | ELFOSABI_FENIXOS = 16, // FenixOS |
355 | | ELFOSABI_CLOUDABI = 17, // Nuxi CloudABI |
356 | | ELFOSABI_C6000_ELFABI = 64, // Bare-metal TMS320C6000 |
357 | | ELFOSABI_AMDGPU_HSA = 64, // AMD HSA runtime |
358 | | ELFOSABI_C6000_LINUX = 65, // Linux TMS320C6000 |
359 | | ELFOSABI_ARM = 97, // ARM |
360 | | ELFOSABI_STANDALONE = 255 // Standalone (embedded) application |
361 | | }; |
362 | | |
363 | | #define ELF_RELOC(name, value) name = value, |
364 | | |
365 | | // X86_64 relocations. |
366 | | enum { |
367 | | #include "ELFRelocs/x86_64.def" |
368 | | }; |
369 | | |
370 | | // i386 relocations. |
371 | | enum { |
372 | | #include "ELFRelocs/i386.def" |
373 | | }; |
374 | | |
375 | | // ELF Relocation types for PPC32 |
376 | | enum { |
377 | | #include "ELFRelocs/PowerPC.def" |
378 | | }; |
379 | | |
380 | | // Specific e_flags for PPC64 |
381 | | enum { |
382 | | // e_flags bits specifying ABI: |
383 | | // 1 for original ABI using function descriptors, |
384 | | // 2 for revised ABI without function descriptors, |
385 | | // 0 for unspecified or not using any features affected by the differences. |
386 | | EF_PPC64_ABI = 3 |
387 | | }; |
388 | | |
389 | | // Special values for the st_other field in the symbol table entry for PPC64. |
390 | | enum { |
391 | | STO_PPC64_LOCAL_BIT = 5, |
392 | | STO_PPC64_LOCAL_MASK = (7 << STO_PPC64_LOCAL_BIT) |
393 | | }; |
394 | 9 | static inline int64_t decodePPC64LocalEntryOffset(unsigned Other) { |
395 | 9 | unsigned Val = (Other & STO_PPC64_LOCAL_MASK) >> STO_PPC64_LOCAL_BIT; |
396 | 9 | return ((1 << Val) >> 2) << 2; |
397 | 9 | } Unexecuted instantiation: AArch64AsmBackend.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int) Unexecuted instantiation: AArch64ELFObjectWriter.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int) Unexecuted instantiation: AArch64ELFStreamer.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int) Unexecuted instantiation: AArch64MCExpr.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int) Unexecuted instantiation: AMDGPUAsmPrinter.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int) Unexecuted instantiation: AMDGPUTargetObjectFile.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int) Unexecuted instantiation: AMDGPUAsmParser.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int) Unexecuted instantiation: AMDGPUELFObjectWriter.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int) Unexecuted instantiation: AMDGPUTargetStreamer.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int) Unexecuted instantiation: AMDGPUBaseInfo.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int) Unexecuted instantiation: ARMAsmPrinter.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int) Unexecuted instantiation: ARMTargetObjectFile.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int) Unexecuted instantiation: ARMAsmBackend.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int) Unexecuted instantiation: ARMELFObjectWriter.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int) Unexecuted instantiation: ARMELFStreamer.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int) Unexecuted instantiation: BPFELFObjectWriter.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int) Unexecuted instantiation: HexagonAsmPrinter.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int) Unexecuted instantiation: HexagonTargetObjectFile.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int) Unexecuted instantiation: HexagonAsmParser.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int) Unexecuted instantiation: HexagonAsmBackend.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int) Unexecuted instantiation: HexagonELFObjectWriter.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int) Unexecuted instantiation: HexagonMCELFStreamer.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int) Unexecuted instantiation: HexagonMCExpr.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int) Unexecuted instantiation: HexagonMCTargetDesc.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int) Unexecuted instantiation: LanaiTargetObjectFile.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int) Unexecuted instantiation: LanaiAsmBackend.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int) Unexecuted instantiation: LanaiELFObjectWriter.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int) Unexecuted instantiation: MipsAsmPrinter.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int) Unexecuted instantiation: MipsTargetObjectFile.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int) Unexecuted instantiation: MipsAsmParser.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int) Unexecuted instantiation: MipsAsmBackend.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int) Unexecuted instantiation: MipsELFObjectWriter.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int) Unexecuted instantiation: MipsELFStreamer.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int) Unexecuted instantiation: MipsMCExpr.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int) Unexecuted instantiation: MipsOptionRecord.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int) Unexecuted instantiation: MipsTargetStreamer.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int) Unexecuted instantiation: PPCAsmPrinter.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int) Unexecuted instantiation: PPCAsmBackend.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int) PPCMCTargetDesc.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int) Line | Count | Source | 394 | 9 | static inline int64_t decodePPC64LocalEntryOffset(unsigned Other) { | 395 | 9 | unsigned Val = (Other & STO_PPC64_LOCAL_MASK) >> STO_PPC64_LOCAL_BIT; | 396 | 9 | return ((1 << Val) >> 2) << 2; | 397 | 9 | } |
Unexecuted instantiation: PPCELFObjectWriter.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int) Unexecuted instantiation: SparcAsmBackend.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int) Unexecuted instantiation: SparcELFObjectWriter.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int) Unexecuted instantiation: SparcMCExpr.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int) Unexecuted instantiation: SystemZMCAsmBackend.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int) Unexecuted instantiation: SystemZMCObjectWriter.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int) Unexecuted instantiation: X86MCInstLower.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int) Unexecuted instantiation: X86AsmBackend.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int) Unexecuted instantiation: X86MCAsmInfo.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int) Unexecuted instantiation: X86ELFObjectWriter.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int) Unexecuted instantiation: XCoreTargetObjectFile.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int) Unexecuted instantiation: AsmPrinter.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int) Unexecuted instantiation: ErlangGCPrinter.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int) Unexecuted instantiation: TargetLoweringObjectFileImpl.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int) Unexecuted instantiation: ELFObjectWriter.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int) Unexecuted instantiation: MCAsmInfoELF.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int) Unexecuted instantiation: MCContext.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int) Unexecuted instantiation: MCELFObjectTargetWriter.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int) Unexecuted instantiation: MCELFStreamer.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int) Unexecuted instantiation: MCObjectFileInfo.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int) Unexecuted instantiation: MCSectionELF.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int) Unexecuted instantiation: MCSymbolELF.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int) Unexecuted instantiation: ELFAsmParser.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int) |
398 | 9 | static inline unsigned encodePPC64LocalEntryOffset(int64_t Offset) { |
399 | 9 | unsigned Val = |
400 | 2 | (Offset >= 4 * 4 ? (Offset >= 8 * 4 ? 2 (Offset >= 16 * 4 ? 2 62 : 50 ) : 40 ) |
401 | 7 | : (Offset >= 2 * 4 ? 7 36 : (Offset >= 1 * 4 ? 1 21 : 00 ))); |
402 | 9 | return Val << STO_PPC64_LOCAL_BIT; |
403 | 9 | } Unexecuted instantiation: AArch64AsmBackend.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long) Unexecuted instantiation: AArch64ELFObjectWriter.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long) Unexecuted instantiation: AArch64ELFStreamer.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long) Unexecuted instantiation: AArch64MCExpr.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long) Unexecuted instantiation: AMDGPUAsmPrinter.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long) Unexecuted instantiation: AMDGPUTargetObjectFile.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long) Unexecuted instantiation: AMDGPUAsmParser.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long) Unexecuted instantiation: AMDGPUELFObjectWriter.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long) Unexecuted instantiation: AMDGPUTargetStreamer.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long) Unexecuted instantiation: AMDGPUBaseInfo.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long) Unexecuted instantiation: ARMAsmPrinter.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long) Unexecuted instantiation: ARMTargetObjectFile.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long) Unexecuted instantiation: ARMAsmBackend.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long) Unexecuted instantiation: ARMELFObjectWriter.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long) Unexecuted instantiation: ARMELFStreamer.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long) Unexecuted instantiation: BPFELFObjectWriter.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long) Unexecuted instantiation: HexagonAsmPrinter.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long) Unexecuted instantiation: HexagonTargetObjectFile.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long) Unexecuted instantiation: HexagonAsmParser.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long) Unexecuted instantiation: HexagonAsmBackend.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long) Unexecuted instantiation: HexagonELFObjectWriter.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long) Unexecuted instantiation: HexagonMCELFStreamer.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long) Unexecuted instantiation: HexagonMCExpr.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long) Unexecuted instantiation: HexagonMCTargetDesc.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long) Unexecuted instantiation: LanaiTargetObjectFile.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long) Unexecuted instantiation: LanaiAsmBackend.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long) Unexecuted instantiation: LanaiELFObjectWriter.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long) Unexecuted instantiation: MipsAsmPrinter.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long) Unexecuted instantiation: MipsTargetObjectFile.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long) Unexecuted instantiation: MipsAsmParser.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long) Unexecuted instantiation: MipsAsmBackend.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long) Unexecuted instantiation: MipsELFObjectWriter.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long) Unexecuted instantiation: MipsELFStreamer.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long) Unexecuted instantiation: MipsMCExpr.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long) Unexecuted instantiation: MipsOptionRecord.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long) Unexecuted instantiation: MipsTargetStreamer.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long) Unexecuted instantiation: PPCAsmPrinter.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long) Unexecuted instantiation: PPCAsmBackend.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long) PPCMCTargetDesc.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long) Line | Count | Source | 398 | 9 | static inline unsigned encodePPC64LocalEntryOffset(int64_t Offset) { | 399 | 9 | unsigned Val = | 400 | 2 | (Offset >= 4 * 4 ? (Offset >= 8 * 4 ? 2 (Offset >= 16 * 4 ? 2 62 : 50 ) : 40 ) | 401 | 7 | : (Offset >= 2 * 4 ? 7 36 : (Offset >= 1 * 4 ? 1 21 : 00 ))); | 402 | 9 | return Val << STO_PPC64_LOCAL_BIT; | 403 | 9 | } |
Unexecuted instantiation: PPCELFObjectWriter.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long) Unexecuted instantiation: SparcAsmBackend.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long) Unexecuted instantiation: SparcELFObjectWriter.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long) Unexecuted instantiation: SparcMCExpr.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long) Unexecuted instantiation: SystemZMCAsmBackend.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long) Unexecuted instantiation: SystemZMCObjectWriter.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long) Unexecuted instantiation: X86MCInstLower.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long) Unexecuted instantiation: X86AsmBackend.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long) Unexecuted instantiation: X86MCAsmInfo.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long) Unexecuted instantiation: X86ELFObjectWriter.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long) Unexecuted instantiation: XCoreTargetObjectFile.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long) Unexecuted instantiation: AsmPrinter.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long) Unexecuted instantiation: ErlangGCPrinter.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long) Unexecuted instantiation: TargetLoweringObjectFileImpl.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long) Unexecuted instantiation: ELFObjectWriter.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long) Unexecuted instantiation: MCAsmInfoELF.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long) Unexecuted instantiation: MCContext.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long) Unexecuted instantiation: MCELFObjectTargetWriter.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long) Unexecuted instantiation: MCELFStreamer.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long) Unexecuted instantiation: MCObjectFileInfo.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long) Unexecuted instantiation: MCSectionELF.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long) Unexecuted instantiation: MCSymbolELF.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long) Unexecuted instantiation: ELFAsmParser.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long) |
404 | | |
405 | | // ELF Relocation types for PPC64 |
406 | | enum { |
407 | | #include "ELFRelocs/PowerPC64.def" |
408 | | }; |
409 | | |
410 | | // ELF Relocation types for AArch64 |
411 | | enum { |
412 | | #include "ELFRelocs/AArch64.def" |
413 | | }; |
414 | | |
415 | | // ARM Specific e_flags |
416 | | enum : unsigned { |
417 | | EF_ARM_SOFT_FLOAT = 0x00000200U, |
418 | | EF_ARM_VFP_FLOAT = 0x00000400U, |
419 | | EF_ARM_EABI_UNKNOWN = 0x00000000U, |
420 | | EF_ARM_EABI_VER1 = 0x01000000U, |
421 | | EF_ARM_EABI_VER2 = 0x02000000U, |
422 | | EF_ARM_EABI_VER3 = 0x03000000U, |
423 | | EF_ARM_EABI_VER4 = 0x04000000U, |
424 | | EF_ARM_EABI_VER5 = 0x05000000U, |
425 | | EF_ARM_EABIMASK = 0xFF000000U |
426 | | }; |
427 | | |
428 | | // ELF Relocation types for ARM |
429 | | enum { |
430 | | #include "ELFRelocs/ARM.def" |
431 | | }; |
432 | | |
433 | | // ARC Specific e_flags |
434 | | enum : unsigned { |
435 | | EF_ARC_MACH_MSK = 0x000000ff, |
436 | | EF_ARC_OSABI_MSK = 0x00000f00, |
437 | | E_ARC_MACH_ARC600 = 0x00000002, |
438 | | E_ARC_MACH_ARC601 = 0x00000004, |
439 | | E_ARC_MACH_ARC700 = 0x00000003, |
440 | | EF_ARC_CPU_ARCV2EM = 0x00000005, |
441 | | EF_ARC_CPU_ARCV2HS = 0x00000006, |
442 | | E_ARC_OSABI_ORIG = 0x00000000, |
443 | | E_ARC_OSABI_V2 = 0x00000200, |
444 | | E_ARC_OSABI_V3 = 0x00000300, |
445 | | E_ARC_OSABI_V4 = 0x00000400, |
446 | | EF_ARC_PIC = 0x00000100 |
447 | | }; |
448 | | |
449 | | // ELF Relocation types for ARC |
450 | | enum { |
451 | | #include "ELFRelocs/ARC.def" |
452 | | }; |
453 | | |
454 | | // AVR specific e_flags |
455 | | enum : unsigned { |
456 | | EF_AVR_ARCH_AVR1 = 1, |
457 | | EF_AVR_ARCH_AVR2 = 2, |
458 | | EF_AVR_ARCH_AVR25 = 25, |
459 | | EF_AVR_ARCH_AVR3 = 3, |
460 | | EF_AVR_ARCH_AVR31 = 31, |
461 | | EF_AVR_ARCH_AVR35 = 35, |
462 | | EF_AVR_ARCH_AVR4 = 4, |
463 | | EF_AVR_ARCH_AVR5 = 5, |
464 | | EF_AVR_ARCH_AVR51 = 51, |
465 | | EF_AVR_ARCH_AVR6 = 6, |
466 | | EF_AVR_ARCH_AVRTINY = 100, |
467 | | EF_AVR_ARCH_XMEGA1 = 101, |
468 | | EF_AVR_ARCH_XMEGA2 = 102, |
469 | | EF_AVR_ARCH_XMEGA3 = 103, |
470 | | EF_AVR_ARCH_XMEGA4 = 104, |
471 | | EF_AVR_ARCH_XMEGA5 = 105, |
472 | | EF_AVR_ARCH_XMEGA6 = 106, |
473 | | EF_AVR_ARCH_XMEGA7 = 107 |
474 | | }; |
475 | | |
476 | | // ELF Relocation types for AVR |
477 | | enum { |
478 | | #include "ELFRelocs/AVR.def" |
479 | | }; |
480 | | |
481 | | // Mips Specific e_flags |
482 | | enum : unsigned { |
483 | | EF_MIPS_NOREORDER = 0x00000001, // Don't reorder instructions |
484 | | EF_MIPS_PIC = 0x00000002, // Position independent code |
485 | | EF_MIPS_CPIC = 0x00000004, // Call object with Position independent code |
486 | | EF_MIPS_ABI2 = 0x00000020, // File uses N32 ABI |
487 | | EF_MIPS_32BITMODE = 0x00000100, // Code compiled for a 64-bit machine |
488 | | // in 32-bit mode |
489 | | EF_MIPS_FP64 = 0x00000200, // Code compiled for a 32-bit machine |
490 | | // but uses 64-bit FP registers |
491 | | EF_MIPS_NAN2008 = 0x00000400, // Uses IEE 754-2008 NaN encoding |
492 | | |
493 | | // ABI flags |
494 | | EF_MIPS_ABI_O32 = 0x00001000, // This file follows the first MIPS 32 bit ABI |
495 | | EF_MIPS_ABI_O64 = 0x00002000, // O32 ABI extended for 64-bit architecture. |
496 | | EF_MIPS_ABI_EABI32 = 0x00003000, // EABI in 32 bit mode. |
497 | | EF_MIPS_ABI_EABI64 = 0x00004000, // EABI in 64 bit mode. |
498 | | EF_MIPS_ABI = 0x0000f000, // Mask for selecting EF_MIPS_ABI_ variant. |
499 | | |
500 | | // MIPS machine variant |
501 | | EF_MIPS_MACH_NONE = 0x00000000, // A standard MIPS implementation. |
502 | | EF_MIPS_MACH_3900 = 0x00810000, // Toshiba R3900 |
503 | | EF_MIPS_MACH_4010 = 0x00820000, // LSI R4010 |
504 | | EF_MIPS_MACH_4100 = 0x00830000, // NEC VR4100 |
505 | | EF_MIPS_MACH_4650 = 0x00850000, // MIPS R4650 |
506 | | EF_MIPS_MACH_4120 = 0x00870000, // NEC VR4120 |
507 | | EF_MIPS_MACH_4111 = 0x00880000, // NEC VR4111/VR4181 |
508 | | EF_MIPS_MACH_SB1 = 0x008a0000, // Broadcom SB-1 |
509 | | EF_MIPS_MACH_OCTEON = 0x008b0000, // Cavium Networks Octeon |
510 | | EF_MIPS_MACH_XLR = 0x008c0000, // RMI Xlr |
511 | | EF_MIPS_MACH_OCTEON2 = 0x008d0000, // Cavium Networks Octeon2 |
512 | | EF_MIPS_MACH_OCTEON3 = 0x008e0000, // Cavium Networks Octeon3 |
513 | | EF_MIPS_MACH_5400 = 0x00910000, // NEC VR5400 |
514 | | EF_MIPS_MACH_5900 = 0x00920000, // MIPS R5900 |
515 | | EF_MIPS_MACH_5500 = 0x00980000, // NEC VR5500 |
516 | | EF_MIPS_MACH_9000 = 0x00990000, // Unknown |
517 | | EF_MIPS_MACH_LS2E = 0x00a00000, // ST Microelectronics Loongson 2E |
518 | | EF_MIPS_MACH_LS2F = 0x00a10000, // ST Microelectronics Loongson 2F |
519 | | EF_MIPS_MACH_LS3A = 0x00a20000, // Loongson 3A |
520 | | EF_MIPS_MACH = 0x00ff0000, // EF_MIPS_MACH_xxx selection mask |
521 | | |
522 | | // ARCH_ASE |
523 | | EF_MIPS_MICROMIPS = 0x02000000, // microMIPS |
524 | | EF_MIPS_ARCH_ASE_M16 = 0x04000000, // Has Mips-16 ISA extensions |
525 | | EF_MIPS_ARCH_ASE_MDMX = 0x08000000, // Has MDMX multimedia extensions |
526 | | EF_MIPS_ARCH_ASE = 0x0f000000, // Mask for EF_MIPS_ARCH_ASE_xxx flags |
527 | | |
528 | | // ARCH |
529 | | EF_MIPS_ARCH_1 = 0x00000000, // MIPS1 instruction set |
530 | | EF_MIPS_ARCH_2 = 0x10000000, // MIPS2 instruction set |
531 | | EF_MIPS_ARCH_3 = 0x20000000, // MIPS3 instruction set |
532 | | EF_MIPS_ARCH_4 = 0x30000000, // MIPS4 instruction set |
533 | | EF_MIPS_ARCH_5 = 0x40000000, // MIPS5 instruction set |
534 | | EF_MIPS_ARCH_32 = 0x50000000, // MIPS32 instruction set per linux not elf.h |
535 | | EF_MIPS_ARCH_64 = 0x60000000, // MIPS64 instruction set per linux not elf.h |
536 | | EF_MIPS_ARCH_32R2 = 0x70000000, // mips32r2, mips32r3, mips32r5 |
537 | | EF_MIPS_ARCH_64R2 = 0x80000000, // mips64r2, mips64r3, mips64r5 |
538 | | EF_MIPS_ARCH_32R6 = 0x90000000, // mips32r6 |
539 | | EF_MIPS_ARCH_64R6 = 0xa0000000, // mips64r6 |
540 | | EF_MIPS_ARCH = 0xf0000000 // Mask for applying EF_MIPS_ARCH_ variant |
541 | | }; |
542 | | |
543 | | // ELF Relocation types for Mips |
544 | | enum { |
545 | | #include "ELFRelocs/Mips.def" |
546 | | }; |
547 | | |
548 | | // Special values for the st_other field in the symbol table entry for MIPS. |
549 | | enum { |
550 | | STO_MIPS_OPTIONAL = 0x04, // Symbol whose definition is optional |
551 | | STO_MIPS_PLT = 0x08, // PLT entry related dynamic table record |
552 | | STO_MIPS_PIC = 0x20, // PIC func in an object mixes PIC/non-PIC |
553 | | STO_MIPS_MICROMIPS = 0x80, // MIPS Specific ISA for MicroMips |
554 | | STO_MIPS_MIPS16 = 0xf0 // MIPS Specific ISA for Mips16 |
555 | | }; |
556 | | |
557 | | // .MIPS.options section descriptor kinds |
558 | | enum { |
559 | | ODK_NULL = 0, // Undefined |
560 | | ODK_REGINFO = 1, // Register usage information |
561 | | ODK_EXCEPTIONS = 2, // Exception processing options |
562 | | ODK_PAD = 3, // Section padding options |
563 | | ODK_HWPATCH = 4, // Hardware patches applied |
564 | | ODK_FILL = 5, // Linker fill value |
565 | | ODK_TAGS = 6, // Space for tool identification |
566 | | ODK_HWAND = 7, // Hardware AND patches applied |
567 | | ODK_HWOR = 8, // Hardware OR patches applied |
568 | | ODK_GP_GROUP = 9, // GP group to use for text/data sections |
569 | | ODK_IDENT = 10, // ID information |
570 | | ODK_PAGESIZE = 11 // Page size information |
571 | | }; |
572 | | |
573 | | // Hexagon-specific e_flags |
574 | | enum { |
575 | | // Object processor version flags, bits[11:0] |
576 | | EF_HEXAGON_MACH_V2 = 0x00000001, // Hexagon V2 |
577 | | EF_HEXAGON_MACH_V3 = 0x00000002, // Hexagon V3 |
578 | | EF_HEXAGON_MACH_V4 = 0x00000003, // Hexagon V4 |
579 | | EF_HEXAGON_MACH_V5 = 0x00000004, // Hexagon V5 |
580 | | EF_HEXAGON_MACH_V55 = 0x00000005, // Hexagon V55 |
581 | | EF_HEXAGON_MACH_V60 = 0x00000060, // Hexagon V60 |
582 | | EF_HEXAGON_MACH_V62 = 0x00000062, // Hexagon V62 |
583 | | |
584 | | // Highest ISA version flags |
585 | | EF_HEXAGON_ISA_MACH = 0x00000000, // Same as specified in bits[11:0] |
586 | | // of e_flags |
587 | | EF_HEXAGON_ISA_V2 = 0x00000010, // Hexagon V2 ISA |
588 | | EF_HEXAGON_ISA_V3 = 0x00000020, // Hexagon V3 ISA |
589 | | EF_HEXAGON_ISA_V4 = 0x00000030, // Hexagon V4 ISA |
590 | | EF_HEXAGON_ISA_V5 = 0x00000040, // Hexagon V5 ISA |
591 | | EF_HEXAGON_ISA_V55 = 0x00000050, // Hexagon V55 ISA |
592 | | EF_HEXAGON_ISA_V60 = 0x00000060, // Hexagon V60 ISA |
593 | | EF_HEXAGON_ISA_V62 = 0x00000062, // Hexagon V62 ISA |
594 | | }; |
595 | | |
596 | | // Hexagon-specific section indexes for common small data |
597 | | enum { |
598 | | SHN_HEXAGON_SCOMMON = 0xff00, // Other access sizes |
599 | | SHN_HEXAGON_SCOMMON_1 = 0xff01, // Byte-sized access |
600 | | SHN_HEXAGON_SCOMMON_2 = 0xff02, // Half-word-sized access |
601 | | SHN_HEXAGON_SCOMMON_4 = 0xff03, // Word-sized access |
602 | | SHN_HEXAGON_SCOMMON_8 = 0xff04 // Double-word-size access |
603 | | }; |
604 | | |
605 | | // ELF Relocation types for Hexagon |
606 | | enum { |
607 | | #include "ELFRelocs/Hexagon.def" |
608 | | }; |
609 | | |
610 | | // ELF Relocation type for Lanai. |
611 | | enum { |
612 | | #include "ELFRelocs/Lanai.def" |
613 | | }; |
614 | | |
615 | | // RISCV Specific e_flags |
616 | | enum : unsigned { |
617 | | EF_RISCV_RVC = 0x0001, |
618 | | EF_RISCV_FLOAT_ABI = 0x0006, |
619 | | EF_RISCV_FLOAT_ABI_SOFT = 0x0000, |
620 | | EF_RISCV_FLOAT_ABI_SINGLE = 0x0002, |
621 | | EF_RISCV_FLOAT_ABI_DOUBLE = 0x0004, |
622 | | EF_RISCV_FLOAT_ABI_QUAD = 0x0006, |
623 | | EF_RISCV_RVE = 0x0008 |
624 | | }; |
625 | | |
626 | | // ELF Relocation types for RISC-V |
627 | | enum { |
628 | | #include "ELFRelocs/RISCV.def" |
629 | | }; |
630 | | |
631 | | // ELF Relocation types for S390/zSeries |
632 | | enum { |
633 | | #include "ELFRelocs/SystemZ.def" |
634 | | }; |
635 | | |
636 | | // ELF Relocation type for Sparc. |
637 | | enum { |
638 | | #include "ELFRelocs/Sparc.def" |
639 | | }; |
640 | | |
641 | | // ELF Relocation types for WebAssembly |
642 | | enum { |
643 | | #include "ELFRelocs/WebAssembly.def" |
644 | | }; |
645 | | |
646 | | // ELF Relocation types for AMDGPU |
647 | | enum { |
648 | | #include "ELFRelocs/AMDGPU.def" |
649 | | }; |
650 | | |
651 | | // ELF Relocation types for BPF |
652 | | enum { |
653 | | #include "ELFRelocs/BPF.def" |
654 | | }; |
655 | | |
656 | | #undef ELF_RELOC |
657 | | |
658 | | // Section header. |
659 | | struct Elf32_Shdr { |
660 | | Elf32_Word sh_name; // Section name (index into string table) |
661 | | Elf32_Word sh_type; // Section type (SHT_*) |
662 | | Elf32_Word sh_flags; // Section flags (SHF_*) |
663 | | Elf32_Addr sh_addr; // Address where section is to be loaded |
664 | | Elf32_Off sh_offset; // File offset of section data, in bytes |
665 | | Elf32_Word sh_size; // Size of section, in bytes |
666 | | Elf32_Word sh_link; // Section type-specific header table index link |
667 | | Elf32_Word sh_info; // Section type-specific extra information |
668 | | Elf32_Word sh_addralign; // Section address alignment |
669 | | Elf32_Word sh_entsize; // Size of records contained within the section |
670 | | }; |
671 | | |
672 | | // Section header for ELF64 - same fields as ELF32, different types. |
673 | | struct Elf64_Shdr { |
674 | | Elf64_Word sh_name; |
675 | | Elf64_Word sh_type; |
676 | | Elf64_Xword sh_flags; |
677 | | Elf64_Addr sh_addr; |
678 | | Elf64_Off sh_offset; |
679 | | Elf64_Xword sh_size; |
680 | | Elf64_Word sh_link; |
681 | | Elf64_Word sh_info; |
682 | | Elf64_Xword sh_addralign; |
683 | | Elf64_Xword sh_entsize; |
684 | | }; |
685 | | |
686 | | // Special section indices. |
687 | | enum { |
688 | | SHN_UNDEF = 0, // Undefined, missing, irrelevant, or meaningless |
689 | | SHN_LORESERVE = 0xff00, // Lowest reserved index |
690 | | SHN_LOPROC = 0xff00, // Lowest processor-specific index |
691 | | SHN_HIPROC = 0xff1f, // Highest processor-specific index |
692 | | SHN_LOOS = 0xff20, // Lowest operating system-specific index |
693 | | SHN_HIOS = 0xff3f, // Highest operating system-specific index |
694 | | SHN_ABS = 0xfff1, // Symbol has absolute value; does not need relocation |
695 | | SHN_COMMON = 0xfff2, // FORTRAN COMMON or C external global variables |
696 | | SHN_XINDEX = 0xffff, // Mark that the index is >= SHN_LORESERVE |
697 | | SHN_HIRESERVE = 0xffff // Highest reserved index |
698 | | }; |
699 | | |
700 | | // Section types. |
701 | | enum : unsigned { |
702 | | SHT_NULL = 0, // No associated section (inactive entry). |
703 | | SHT_PROGBITS = 1, // Program-defined contents. |
704 | | SHT_SYMTAB = 2, // Symbol table. |
705 | | SHT_STRTAB = 3, // String table. |
706 | | SHT_RELA = 4, // Relocation entries; explicit addends. |
707 | | SHT_HASH = 5, // Symbol hash table. |
708 | | SHT_DYNAMIC = 6, // Information for dynamic linking. |
709 | | SHT_NOTE = 7, // Information about the file. |
710 | | SHT_NOBITS = 8, // Data occupies no space in the file. |
711 | | SHT_REL = 9, // Relocation entries; no explicit addends. |
712 | | SHT_SHLIB = 10, // Reserved. |
713 | | SHT_DYNSYM = 11, // Symbol table. |
714 | | SHT_INIT_ARRAY = 14, // Pointers to initialization functions. |
715 | | SHT_FINI_ARRAY = 15, // Pointers to termination functions. |
716 | | SHT_PREINIT_ARRAY = 16, // Pointers to pre-init functions. |
717 | | SHT_GROUP = 17, // Section group. |
718 | | SHT_SYMTAB_SHNDX = 18, // Indices for SHN_XINDEX entries. |
719 | | SHT_LOOS = 0x60000000, // Lowest operating system-specific type. |
720 | | SHT_LLVM_ODRTAB = 0x6fff4c00, // LLVM ODR table. |
721 | | SHT_GNU_ATTRIBUTES = 0x6ffffff5, // Object attributes. |
722 | | SHT_GNU_HASH = 0x6ffffff6, // GNU-style hash table. |
723 | | SHT_GNU_verdef = 0x6ffffffd, // GNU version definitions. |
724 | | SHT_GNU_verneed = 0x6ffffffe, // GNU version references. |
725 | | SHT_GNU_versym = 0x6fffffff, // GNU symbol versions table. |
726 | | SHT_HIOS = 0x6fffffff, // Highest operating system-specific type. |
727 | | SHT_LOPROC = 0x70000000, // Lowest processor arch-specific type. |
728 | | // Fixme: All this is duplicated in MCSectionELF. Why?? |
729 | | // Exception Index table |
730 | | SHT_ARM_EXIDX = 0x70000001U, |
731 | | // BPABI DLL dynamic linking pre-emption map |
732 | | SHT_ARM_PREEMPTMAP = 0x70000002U, |
733 | | // Object file compatibility attributes |
734 | | SHT_ARM_ATTRIBUTES = 0x70000003U, |
735 | | SHT_ARM_DEBUGOVERLAY = 0x70000004U, |
736 | | SHT_ARM_OVERLAYSECTION = 0x70000005U, |
737 | | SHT_HEX_ORDERED = 0x70000000, // Link editor is to sort the entries in |
738 | | // this section based on their sizes |
739 | | SHT_X86_64_UNWIND = 0x70000001, // Unwind information |
740 | | |
741 | | SHT_MIPS_REGINFO = 0x70000006, // Register usage information |
742 | | SHT_MIPS_OPTIONS = 0x7000000d, // General options |
743 | | SHT_MIPS_DWARF = 0x7000001e, // DWARF debugging section. |
744 | | SHT_MIPS_ABIFLAGS = 0x7000002a, // ABI information. |
745 | | |
746 | | SHT_HIPROC = 0x7fffffff, // Highest processor arch-specific type. |
747 | | SHT_LOUSER = 0x80000000, // Lowest type reserved for applications. |
748 | | SHT_HIUSER = 0xffffffff // Highest type reserved for applications. |
749 | | }; |
750 | | |
751 | | // Section flags. |
752 | | enum : unsigned { |
753 | | // Section data should be writable during execution. |
754 | | SHF_WRITE = 0x1, |
755 | | |
756 | | // Section occupies memory during program execution. |
757 | | SHF_ALLOC = 0x2, |
758 | | |
759 | | // Section contains executable machine instructions. |
760 | | SHF_EXECINSTR = 0x4, |
761 | | |
762 | | // The data in this section may be merged. |
763 | | SHF_MERGE = 0x10, |
764 | | |
765 | | // The data in this section is null-terminated strings. |
766 | | SHF_STRINGS = 0x20, |
767 | | |
768 | | // A field in this section holds a section header table index. |
769 | | SHF_INFO_LINK = 0x40U, |
770 | | |
771 | | // Adds special ordering requirements for link editors. |
772 | | SHF_LINK_ORDER = 0x80U, |
773 | | |
774 | | // This section requires special OS-specific processing to avoid incorrect |
775 | | // behavior. |
776 | | SHF_OS_NONCONFORMING = 0x100U, |
777 | | |
778 | | // This section is a member of a section group. |
779 | | SHF_GROUP = 0x200U, |
780 | | |
781 | | // This section holds Thread-Local Storage. |
782 | | SHF_TLS = 0x400U, |
783 | | |
784 | | // Identifies a section containing compressed data. |
785 | | SHF_COMPRESSED = 0x800U, |
786 | | |
787 | | // This section is excluded from the final executable or shared library. |
788 | | SHF_EXCLUDE = 0x80000000U, |
789 | | |
790 | | // Start of target-specific flags. |
791 | | |
792 | | SHF_MASKOS = 0x0ff00000, |
793 | | |
794 | | // Bits indicating processor-specific flags. |
795 | | SHF_MASKPROC = 0xf0000000, |
796 | | |
797 | | /// All sections with the "d" flag are grouped together by the linker to form |
798 | | /// the data section and the dp register is set to the start of the section by |
799 | | /// the boot code. |
800 | | XCORE_SHF_DP_SECTION = 0x10000000, |
801 | | |
802 | | /// All sections with the "c" flag are grouped together by the linker to form |
803 | | /// the constant pool and the cp register is set to the start of the constant |
804 | | /// pool by the boot code. |
805 | | XCORE_SHF_CP_SECTION = 0x20000000, |
806 | | |
807 | | // If an object file section does not have this flag set, then it may not hold |
808 | | // more than 2GB and can be freely referred to in objects using smaller code |
809 | | // models. Otherwise, only objects using larger code models can refer to them. |
810 | | // For example, a medium code model object can refer to data in a section that |
811 | | // sets this flag besides being able to refer to data in a section that does |
812 | | // not set it; likewise, a small code model object can refer only to code in a |
813 | | // section that does not set this flag. |
814 | | SHF_X86_64_LARGE = 0x10000000, |
815 | | |
816 | | // All sections with the GPREL flag are grouped into a global data area |
817 | | // for faster accesses |
818 | | SHF_HEX_GPREL = 0x10000000, |
819 | | |
820 | | // Section contains text/data which may be replicated in other sections. |
821 | | // Linker must retain only one copy. |
822 | | SHF_MIPS_NODUPES = 0x01000000, |
823 | | |
824 | | // Linker must generate implicit hidden weak names. |
825 | | SHF_MIPS_NAMES = 0x02000000, |
826 | | |
827 | | // Section data local to process. |
828 | | SHF_MIPS_LOCAL = 0x04000000, |
829 | | |
830 | | // Do not strip this section. |
831 | | SHF_MIPS_NOSTRIP = 0x08000000, |
832 | | |
833 | | // Section must be part of global data area. |
834 | | SHF_MIPS_GPREL = 0x10000000, |
835 | | |
836 | | // This section should be merged. |
837 | | SHF_MIPS_MERGE = 0x20000000, |
838 | | |
839 | | // Address size to be inferred from section entry size. |
840 | | SHF_MIPS_ADDR = 0x40000000, |
841 | | |
842 | | // Section data is string data by default. |
843 | | SHF_MIPS_STRING = 0x80000000, |
844 | | |
845 | | // Make code section unreadable when in execute-only mode |
846 | | SHF_ARM_PURECODE = 0x20000000 |
847 | | }; |
848 | | |
849 | | // Section Group Flags |
850 | | enum : unsigned { |
851 | | GRP_COMDAT = 0x1, |
852 | | GRP_MASKOS = 0x0ff00000, |
853 | | GRP_MASKPROC = 0xf0000000 |
854 | | }; |
855 | | |
856 | | // Symbol table entries for ELF32. |
857 | | struct Elf32_Sym { |
858 | | Elf32_Word st_name; // Symbol name (index into string table) |
859 | | Elf32_Addr st_value; // Value or address associated with the symbol |
860 | | Elf32_Word st_size; // Size of the symbol |
861 | | unsigned char st_info; // Symbol's type and binding attributes |
862 | | unsigned char st_other; // Must be zero; reserved |
863 | | Elf32_Half st_shndx; // Which section (header table index) it's defined in |
864 | | |
865 | | // These accessors and mutators correspond to the ELF32_ST_BIND, |
866 | | // ELF32_ST_TYPE, and ELF32_ST_INFO macros defined in the ELF specification: |
867 | 0 | unsigned char getBinding() const { return st_info >> 4; } |
868 | 0 | unsigned char getType() const { return st_info & 0x0f; } |
869 | 0 | void setBinding(unsigned char b) { setBindingAndType(b, getType()); } |
870 | 0 | void setType(unsigned char t) { setBindingAndType(getBinding(), t); } |
871 | 0 | void setBindingAndType(unsigned char b, unsigned char t) { |
872 | 0 | st_info = (b << 4) + (t & 0x0f); |
873 | 0 | } |
874 | | }; |
875 | | |
876 | | // Symbol table entries for ELF64. |
877 | | struct Elf64_Sym { |
878 | | Elf64_Word st_name; // Symbol name (index into string table) |
879 | | unsigned char st_info; // Symbol's type and binding attributes |
880 | | unsigned char st_other; // Must be zero; reserved |
881 | | Elf64_Half st_shndx; // Which section (header tbl index) it's defined in |
882 | | Elf64_Addr st_value; // Value or address associated with the symbol |
883 | | Elf64_Xword st_size; // Size of the symbol |
884 | | |
885 | | // These accessors and mutators are identical to those defined for ELF32 |
886 | | // symbol table entries. |
887 | 0 | unsigned char getBinding() const { return st_info >> 4; } |
888 | 0 | unsigned char getType() const { return st_info & 0x0f; } |
889 | 0 | void setBinding(unsigned char b) { setBindingAndType(b, getType()); } |
890 | 0 | void setType(unsigned char t) { setBindingAndType(getBinding(), t); } |
891 | 0 | void setBindingAndType(unsigned char b, unsigned char t) { |
892 | 0 | st_info = (b << 4) + (t & 0x0f); |
893 | 0 | } |
894 | | }; |
895 | | |
896 | | // The size (in bytes) of symbol table entries. |
897 | | enum { |
898 | | SYMENTRY_SIZE32 = 16, // 32-bit symbol entry size |
899 | | SYMENTRY_SIZE64 = 24 // 64-bit symbol entry size. |
900 | | }; |
901 | | |
902 | | // Symbol bindings. |
903 | | enum { |
904 | | STB_LOCAL = 0, // Local symbol, not visible outside obj file containing def |
905 | | STB_GLOBAL = 1, // Global symbol, visible to all object files being combined |
906 | | STB_WEAK = 2, // Weak symbol, like global but lower-precedence |
907 | | STB_GNU_UNIQUE = 10, |
908 | | STB_LOOS = 10, // Lowest operating system-specific binding type |
909 | | STB_HIOS = 12, // Highest operating system-specific binding type |
910 | | STB_LOPROC = 13, // Lowest processor-specific binding type |
911 | | STB_HIPROC = 15 // Highest processor-specific binding type |
912 | | }; |
913 | | |
914 | | // Symbol types. |
915 | | enum { |
916 | | STT_NOTYPE = 0, // Symbol's type is not specified |
917 | | STT_OBJECT = 1, // Symbol is a data object (variable, array, etc.) |
918 | | STT_FUNC = 2, // Symbol is executable code (function, etc.) |
919 | | STT_SECTION = 3, // Symbol refers to a section |
920 | | STT_FILE = 4, // Local, absolute symbol that refers to a file |
921 | | STT_COMMON = 5, // An uninitialized common block |
922 | | STT_TLS = 6, // Thread local data object |
923 | | STT_GNU_IFUNC = 10, // GNU indirect function |
924 | | STT_LOOS = 10, // Lowest operating system-specific symbol type |
925 | | STT_HIOS = 12, // Highest operating system-specific symbol type |
926 | | STT_LOPROC = 13, // Lowest processor-specific symbol type |
927 | | STT_HIPROC = 15, // Highest processor-specific symbol type |
928 | | |
929 | | // AMDGPU symbol types |
930 | | STT_AMDGPU_HSA_KERNEL = 10 |
931 | | }; |
932 | | |
933 | | enum { |
934 | | STV_DEFAULT = 0, // Visibility is specified by binding type |
935 | | STV_INTERNAL = 1, // Defined by processor supplements |
936 | | STV_HIDDEN = 2, // Not visible to other components |
937 | | STV_PROTECTED = 3 // Visible in other components but not preemptable |
938 | | }; |
939 | | |
940 | | // Symbol number. |
941 | | enum { STN_UNDEF = 0 }; |
942 | | |
943 | | // Special relocation symbols used in the MIPS64 ELF relocation entries |
944 | | enum { |
945 | | RSS_UNDEF = 0, // None |
946 | | RSS_GP = 1, // Value of gp |
947 | | RSS_GP0 = 2, // Value of gp used to create object being relocated |
948 | | RSS_LOC = 3 // Address of location being relocated |
949 | | }; |
950 | | |
951 | | // Relocation entry, without explicit addend. |
952 | | struct Elf32_Rel { |
953 | | Elf32_Addr r_offset; // Location (file byte offset, or program virtual addr) |
954 | | Elf32_Word r_info; // Symbol table index and type of relocation to apply |
955 | | |
956 | | // These accessors and mutators correspond to the ELF32_R_SYM, ELF32_R_TYPE, |
957 | | // and ELF32_R_INFO macros defined in the ELF specification: |
958 | 0 | Elf32_Word getSymbol() const { return (r_info >> 8); } |
959 | 0 | unsigned char getType() const { return (unsigned char)(r_info & 0x0ff); } |
960 | 0 | void setSymbol(Elf32_Word s) { setSymbolAndType(s, getType()); } |
961 | 0 | void setType(unsigned char t) { setSymbolAndType(getSymbol(), t); } |
962 | 0 | void setSymbolAndType(Elf32_Word s, unsigned char t) { |
963 | 0 | r_info = (s << 8) + t; |
964 | 0 | } |
965 | | }; |
966 | | |
967 | | // Relocation entry with explicit addend. |
968 | | struct Elf32_Rela { |
969 | | Elf32_Addr r_offset; // Location (file byte offset, or program virtual addr) |
970 | | Elf32_Word r_info; // Symbol table index and type of relocation to apply |
971 | | Elf32_Sword r_addend; // Compute value for relocatable field by adding this |
972 | | |
973 | | // These accessors and mutators correspond to the ELF32_R_SYM, ELF32_R_TYPE, |
974 | | // and ELF32_R_INFO macros defined in the ELF specification: |
975 | 0 | Elf32_Word getSymbol() const { return (r_info >> 8); } |
976 | 0 | unsigned char getType() const { return (unsigned char)(r_info & 0x0ff); } |
977 | 0 | void setSymbol(Elf32_Word s) { setSymbolAndType(s, getType()); } |
978 | 0 | void setType(unsigned char t) { setSymbolAndType(getSymbol(), t); } |
979 | 3.90k | void setSymbolAndType(Elf32_Word s, unsigned char t) { |
980 | 3.90k | r_info = (s << 8) + t; |
981 | 3.90k | } |
982 | | }; |
983 | | |
984 | | // Relocation entry, without explicit addend. |
985 | | struct Elf64_Rel { |
986 | | Elf64_Addr r_offset; // Location (file byte offset, or program virtual addr). |
987 | | Elf64_Xword r_info; // Symbol table index and type of relocation to apply. |
988 | | |
989 | | // These accessors and mutators correspond to the ELF64_R_SYM, ELF64_R_TYPE, |
990 | | // and ELF64_R_INFO macros defined in the ELF specification: |
991 | 0 | Elf64_Word getSymbol() const { return (r_info >> 32); } |
992 | 0 | Elf64_Word getType() const { return (Elf64_Word)(r_info & 0xffffffffL); } |
993 | 0 | void setSymbol(Elf64_Word s) { setSymbolAndType(s, getType()); } |
994 | 0 | void setType(Elf64_Word t) { setSymbolAndType(getSymbol(), t); } |
995 | 0 | void setSymbolAndType(Elf64_Word s, Elf64_Word t) { |
996 | 0 | r_info = ((Elf64_Xword)s << 32) + (t & 0xffffffffL); |
997 | 0 | } |
998 | | }; |
999 | | |
1000 | | // Relocation entry with explicit addend. |
1001 | | struct Elf64_Rela { |
1002 | | Elf64_Addr r_offset; // Location (file byte offset, or program virtual addr). |
1003 | | Elf64_Xword r_info; // Symbol table index and type of relocation to apply. |
1004 | | Elf64_Sxword r_addend; // Compute value for relocatable field by adding this. |
1005 | | |
1006 | | // These accessors and mutators correspond to the ELF64_R_SYM, ELF64_R_TYPE, |
1007 | | // and ELF64_R_INFO macros defined in the ELF specification: |
1008 | 0 | Elf64_Word getSymbol() const { return (r_info >> 32); } |
1009 | 0 | Elf64_Word getType() const { return (Elf64_Word)(r_info & 0xffffffffL); } |
1010 | 0 | void setSymbol(Elf64_Word s) { setSymbolAndType(s, getType()); } |
1011 | 0 | void setType(Elf64_Word t) { setSymbolAndType(getSymbol(), t); } |
1012 | 5.53k | void setSymbolAndType(Elf64_Word s, Elf64_Word t) { |
1013 | 5.53k | r_info = ((Elf64_Xword)s << 32) + (t & 0xffffffffL); |
1014 | 5.53k | } |
1015 | | }; |
1016 | | |
1017 | | // Program header for ELF32. |
1018 | | struct Elf32_Phdr { |
1019 | | Elf32_Word p_type; // Type of segment |
1020 | | Elf32_Off p_offset; // File offset where segment is located, in bytes |
1021 | | Elf32_Addr p_vaddr; // Virtual address of beginning of segment |
1022 | | Elf32_Addr p_paddr; // Physical address of beginning of segment (OS-specific) |
1023 | | Elf32_Word p_filesz; // Num. of bytes in file image of segment (may be zero) |
1024 | | Elf32_Word p_memsz; // Num. of bytes in mem image of segment (may be zero) |
1025 | | Elf32_Word p_flags; // Segment flags |
1026 | | Elf32_Word p_align; // Segment alignment constraint |
1027 | | }; |
1028 | | |
1029 | | // Program header for ELF64. |
1030 | | struct Elf64_Phdr { |
1031 | | Elf64_Word p_type; // Type of segment |
1032 | | Elf64_Word p_flags; // Segment flags |
1033 | | Elf64_Off p_offset; // File offset where segment is located, in bytes |
1034 | | Elf64_Addr p_vaddr; // Virtual address of beginning of segment |
1035 | | Elf64_Addr p_paddr; // Physical addr of beginning of segment (OS-specific) |
1036 | | Elf64_Xword p_filesz; // Num. of bytes in file image of segment (may be zero) |
1037 | | Elf64_Xword p_memsz; // Num. of bytes in mem image of segment (may be zero) |
1038 | | Elf64_Xword p_align; // Segment alignment constraint |
1039 | | }; |
1040 | | |
1041 | | // Segment types. |
1042 | | enum { |
1043 | | PT_NULL = 0, // Unused segment. |
1044 | | PT_LOAD = 1, // Loadable segment. |
1045 | | PT_DYNAMIC = 2, // Dynamic linking information. |
1046 | | PT_INTERP = 3, // Interpreter pathname. |
1047 | | PT_NOTE = 4, // Auxiliary information. |
1048 | | PT_SHLIB = 5, // Reserved. |
1049 | | PT_PHDR = 6, // The program header table itself. |
1050 | | PT_TLS = 7, // The thread-local storage template. |
1051 | | PT_LOOS = 0x60000000, // Lowest operating system-specific pt entry type. |
1052 | | PT_HIOS = 0x6fffffff, // Highest operating system-specific pt entry type. |
1053 | | PT_LOPROC = 0x70000000, // Lowest processor-specific program hdr entry type. |
1054 | | PT_HIPROC = 0x7fffffff, // Highest processor-specific program hdr entry type. |
1055 | | |
1056 | | // x86-64 program header types. |
1057 | | // These all contain stack unwind tables. |
1058 | | PT_GNU_EH_FRAME = 0x6474e550, |
1059 | | PT_SUNW_EH_FRAME = 0x6474e550, |
1060 | | PT_SUNW_UNWIND = 0x6464e550, |
1061 | | |
1062 | | PT_GNU_STACK = 0x6474e551, // Indicates stack executability. |
1063 | | PT_GNU_RELRO = 0x6474e552, // Read-only after relocation. |
1064 | | |
1065 | | PT_OPENBSD_RANDOMIZE = 0x65a3dbe6, // Fill with random data. |
1066 | | PT_OPENBSD_WXNEEDED = 0x65a3dbe7, // Program does W^X violations. |
1067 | | PT_OPENBSD_BOOTDATA = 0x65a41be6, // Section for boot arguments. |
1068 | | |
1069 | | // ARM program header types. |
1070 | | PT_ARM_ARCHEXT = 0x70000000, // Platform architecture compatibility info |
1071 | | // These all contain stack unwind tables. |
1072 | | PT_ARM_EXIDX = 0x70000001, |
1073 | | PT_ARM_UNWIND = 0x70000001, |
1074 | | |
1075 | | // MIPS program header types. |
1076 | | PT_MIPS_REGINFO = 0x70000000, // Register usage information. |
1077 | | PT_MIPS_RTPROC = 0x70000001, // Runtime procedure table. |
1078 | | PT_MIPS_OPTIONS = 0x70000002, // Options segment. |
1079 | | PT_MIPS_ABIFLAGS = 0x70000003, // Abiflags segment. |
1080 | | |
1081 | | // WebAssembly program header types. |
1082 | | PT_WEBASSEMBLY_FUNCTIONS = PT_LOPROC + 0, // Function definitions. |
1083 | | }; |
1084 | | |
1085 | | // Segment flag bits. |
1086 | | enum : unsigned { |
1087 | | PF_X = 1, // Execute |
1088 | | PF_W = 2, // Write |
1089 | | PF_R = 4, // Read |
1090 | | PF_MASKOS = 0x0ff00000, // Bits for operating system-specific semantics. |
1091 | | PF_MASKPROC = 0xf0000000 // Bits for processor-specific semantics. |
1092 | | }; |
1093 | | |
1094 | | // Dynamic table entry for ELF32. |
1095 | | struct Elf32_Dyn { |
1096 | | Elf32_Sword d_tag; // Type of dynamic table entry. |
1097 | | union { |
1098 | | Elf32_Word d_val; // Integer value of entry. |
1099 | | Elf32_Addr d_ptr; // Pointer value of entry. |
1100 | | } d_un; |
1101 | | }; |
1102 | | |
1103 | | // Dynamic table entry for ELF64. |
1104 | | struct Elf64_Dyn { |
1105 | | Elf64_Sxword d_tag; // Type of dynamic table entry. |
1106 | | union { |
1107 | | Elf64_Xword d_val; // Integer value of entry. |
1108 | | Elf64_Addr d_ptr; // Pointer value of entry. |
1109 | | } d_un; |
1110 | | }; |
1111 | | |
1112 | | // Dynamic table entry tags. |
1113 | | enum { |
1114 | | DT_NULL = 0, // Marks end of dynamic array. |
1115 | | DT_NEEDED = 1, // String table offset of needed library. |
1116 | | DT_PLTRELSZ = 2, // Size of relocation entries in PLT. |
1117 | | DT_PLTGOT = 3, // Address associated with linkage table. |
1118 | | DT_HASH = 4, // Address of symbolic hash table. |
1119 | | DT_STRTAB = 5, // Address of dynamic string table. |
1120 | | DT_SYMTAB = 6, // Address of dynamic symbol table. |
1121 | | DT_RELA = 7, // Address of relocation table (Rela entries). |
1122 | | DT_RELASZ = 8, // Size of Rela relocation table. |
1123 | | DT_RELAENT = 9, // Size of a Rela relocation entry. |
1124 | | DT_STRSZ = 10, // Total size of the string table. |
1125 | | DT_SYMENT = 11, // Size of a symbol table entry. |
1126 | | DT_INIT = 12, // Address of initialization function. |
1127 | | DT_FINI = 13, // Address of termination function. |
1128 | | DT_SONAME = 14, // String table offset of a shared objects name. |
1129 | | DT_RPATH = 15, // String table offset of library search path. |
1130 | | DT_SYMBOLIC = 16, // Changes symbol resolution algorithm. |
1131 | | DT_REL = 17, // Address of relocation table (Rel entries). |
1132 | | DT_RELSZ = 18, // Size of Rel relocation table. |
1133 | | DT_RELENT = 19, // Size of a Rel relocation entry. |
1134 | | DT_PLTREL = 20, // Type of relocation entry used for linking. |
1135 | | DT_DEBUG = 21, // Reserved for debugger. |
1136 | | DT_TEXTREL = 22, // Relocations exist for non-writable segments. |
1137 | | DT_JMPREL = 23, // Address of relocations associated with PLT. |
1138 | | DT_BIND_NOW = 24, // Process all relocations before execution. |
1139 | | DT_INIT_ARRAY = 25, // Pointer to array of initialization functions. |
1140 | | DT_FINI_ARRAY = 26, // Pointer to array of termination functions. |
1141 | | DT_INIT_ARRAYSZ = 27, // Size of DT_INIT_ARRAY. |
1142 | | DT_FINI_ARRAYSZ = 28, // Size of DT_FINI_ARRAY. |
1143 | | DT_RUNPATH = 29, // String table offset of lib search path. |
1144 | | DT_FLAGS = 30, // Flags. |
1145 | | DT_ENCODING = 32, // Values from here to DT_LOOS follow the rules |
1146 | | // for the interpretation of the d_un union. |
1147 | | |
1148 | | DT_PREINIT_ARRAY = 32, // Pointer to array of preinit functions. |
1149 | | DT_PREINIT_ARRAYSZ = 33, // Size of the DT_PREINIT_ARRAY array. |
1150 | | |
1151 | | DT_LOOS = 0x60000000, // Start of environment specific tags. |
1152 | | DT_HIOS = 0x6FFFFFFF, // End of environment specific tags. |
1153 | | DT_LOPROC = 0x70000000, // Start of processor specific tags. |
1154 | | DT_HIPROC = 0x7FFFFFFF, // End of processor specific tags. |
1155 | | |
1156 | | DT_GNU_HASH = 0x6FFFFEF5, // Reference to the GNU hash table. |
1157 | | DT_TLSDESC_PLT = |
1158 | | 0x6FFFFEF6, // Location of PLT entry for TLS descriptor resolver calls. |
1159 | | DT_TLSDESC_GOT = 0x6FFFFEF7, // Location of GOT entry used by TLS descriptor |
1160 | | // resolver PLT entry. |
1161 | | DT_RELACOUNT = 0x6FFFFFF9, // ELF32_Rela count. |
1162 | | DT_RELCOUNT = 0x6FFFFFFA, // ELF32_Rel count. |
1163 | | |
1164 | | DT_FLAGS_1 = 0X6FFFFFFB, // Flags_1. |
1165 | | DT_VERSYM = 0x6FFFFFF0, // The address of .gnu.version section. |
1166 | | DT_VERDEF = 0X6FFFFFFC, // The address of the version definition table. |
1167 | | DT_VERDEFNUM = 0X6FFFFFFD, // The number of entries in DT_VERDEF. |
1168 | | DT_VERNEED = 0X6FFFFFFE, // The address of the version Dependency table. |
1169 | | DT_VERNEEDNUM = 0X6FFFFFFF, // The number of entries in DT_VERNEED. |
1170 | | |
1171 | | // Hexagon specific dynamic table entries |
1172 | | DT_HEXAGON_SYMSZ = 0x70000000, |
1173 | | DT_HEXAGON_VER = 0x70000001, |
1174 | | DT_HEXAGON_PLT = 0x70000002, |
1175 | | |
1176 | | // Mips specific dynamic table entry tags. |
1177 | | DT_MIPS_RLD_VERSION = 0x70000001, // 32 bit version number for runtime |
1178 | | // linker interface. |
1179 | | DT_MIPS_TIME_STAMP = 0x70000002, // Time stamp. |
1180 | | DT_MIPS_ICHECKSUM = 0x70000003, // Checksum of external strings |
1181 | | // and common sizes. |
1182 | | DT_MIPS_IVERSION = 0x70000004, // Index of version string |
1183 | | // in string table. |
1184 | | DT_MIPS_FLAGS = 0x70000005, // 32 bits of flags. |
1185 | | DT_MIPS_BASE_ADDRESS = 0x70000006, // Base address of the segment. |
1186 | | DT_MIPS_MSYM = 0x70000007, // Address of .msym section. |
1187 | | DT_MIPS_CONFLICT = 0x70000008, // Address of .conflict section. |
1188 | | DT_MIPS_LIBLIST = 0x70000009, // Address of .liblist section. |
1189 | | DT_MIPS_LOCAL_GOTNO = 0x7000000a, // Number of local global offset |
1190 | | // table entries. |
1191 | | DT_MIPS_CONFLICTNO = 0x7000000b, // Number of entries |
1192 | | // in the .conflict section. |
1193 | | DT_MIPS_LIBLISTNO = 0x70000010, // Number of entries |
1194 | | // in the .liblist section. |
1195 | | DT_MIPS_SYMTABNO = 0x70000011, // Number of entries |
1196 | | // in the .dynsym section. |
1197 | | DT_MIPS_UNREFEXTNO = 0x70000012, // Index of first external dynamic symbol |
1198 | | // not referenced locally. |
1199 | | DT_MIPS_GOTSYM = 0x70000013, // Index of first dynamic symbol |
1200 | | // in global offset table. |
1201 | | DT_MIPS_HIPAGENO = 0x70000014, // Number of page table entries |
1202 | | // in global offset table. |
1203 | | DT_MIPS_RLD_MAP = 0x70000016, // Address of run time loader map, |
1204 | | // used for debugging. |
1205 | | DT_MIPS_DELTA_CLASS = 0x70000017, // Delta C++ class definition. |
1206 | | DT_MIPS_DELTA_CLASS_NO = 0x70000018, // Number of entries |
1207 | | // in DT_MIPS_DELTA_CLASS. |
1208 | | DT_MIPS_DELTA_INSTANCE = 0x70000019, // Delta C++ class instances. |
1209 | | DT_MIPS_DELTA_INSTANCE_NO = 0x7000001A, // Number of entries |
1210 | | // in DT_MIPS_DELTA_INSTANCE. |
1211 | | DT_MIPS_DELTA_RELOC = 0x7000001B, // Delta relocations. |
1212 | | DT_MIPS_DELTA_RELOC_NO = 0x7000001C, // Number of entries |
1213 | | // in DT_MIPS_DELTA_RELOC. |
1214 | | DT_MIPS_DELTA_SYM = 0x7000001D, // Delta symbols that Delta |
1215 | | // relocations refer to. |
1216 | | DT_MIPS_DELTA_SYM_NO = 0x7000001E, // Number of entries |
1217 | | // in DT_MIPS_DELTA_SYM. |
1218 | | DT_MIPS_DELTA_CLASSSYM = 0x70000020, // Delta symbols that hold |
1219 | | // class declarations. |
1220 | | DT_MIPS_DELTA_CLASSSYM_NO = 0x70000021, // Number of entries |
1221 | | // in DT_MIPS_DELTA_CLASSSYM. |
1222 | | DT_MIPS_CXX_FLAGS = 0x70000022, // Flags indicating information |
1223 | | // about C++ flavor. |
1224 | | DT_MIPS_PIXIE_INIT = 0x70000023, // Pixie information. |
1225 | | DT_MIPS_SYMBOL_LIB = 0x70000024, // Address of .MIPS.symlib |
1226 | | DT_MIPS_LOCALPAGE_GOTIDX = 0x70000025, // The GOT index of the first PTE |
1227 | | // for a segment |
1228 | | DT_MIPS_LOCAL_GOTIDX = 0x70000026, // The GOT index of the first PTE |
1229 | | // for a local symbol |
1230 | | DT_MIPS_HIDDEN_GOTIDX = 0x70000027, // The GOT index of the first PTE |
1231 | | // for a hidden symbol |
1232 | | DT_MIPS_PROTECTED_GOTIDX = 0x70000028, // The GOT index of the first PTE |
1233 | | // for a protected symbol |
1234 | | DT_MIPS_OPTIONS = 0x70000029, // Address of `.MIPS.options'. |
1235 | | DT_MIPS_INTERFACE = 0x7000002A, // Address of `.interface'. |
1236 | | DT_MIPS_DYNSTR_ALIGN = 0x7000002B, // Unknown. |
1237 | | DT_MIPS_INTERFACE_SIZE = 0x7000002C, // Size of the .interface section. |
1238 | | DT_MIPS_RLD_TEXT_RESOLVE_ADDR = 0x7000002D, // Size of rld_text_resolve |
1239 | | // function stored in the GOT. |
1240 | | DT_MIPS_PERF_SUFFIX = 0x7000002E, // Default suffix of DSO to be added |
1241 | | // by rld on dlopen() calls. |
1242 | | DT_MIPS_COMPACT_SIZE = 0x7000002F, // Size of compact relocation |
1243 | | // section (O32). |
1244 | | DT_MIPS_GP_VALUE = 0x70000030, // GP value for auxiliary GOTs. |
1245 | | DT_MIPS_AUX_DYNAMIC = 0x70000031, // Address of auxiliary .dynamic. |
1246 | | DT_MIPS_PLTGOT = 0x70000032, // Address of the base of the PLTGOT. |
1247 | | DT_MIPS_RWPLT = 0x70000034, // Points to the base |
1248 | | // of a writable PLT. |
1249 | | DT_MIPS_RLD_MAP_REL = 0x70000035, // Relative offset of run time loader |
1250 | | // map, used for debugging. |
1251 | | |
1252 | | // Sun machine-independent extensions. |
1253 | | DT_AUXILIARY = 0x7FFFFFFD, // Shared object to load before self |
1254 | | DT_FILTER = 0x7FFFFFFF // Shared object to get values from |
1255 | | }; |
1256 | | |
1257 | | // DT_FLAGS values. |
1258 | | enum { |
1259 | | DF_ORIGIN = 0x01, // The object may reference $ORIGIN. |
1260 | | DF_SYMBOLIC = 0x02, // Search the shared lib before searching the exe. |
1261 | | DF_TEXTREL = 0x04, // Relocations may modify a non-writable segment. |
1262 | | DF_BIND_NOW = 0x08, // Process all relocations on load. |
1263 | | DF_STATIC_TLS = 0x10 // Reject attempts to load dynamically. |
1264 | | }; |
1265 | | |
1266 | | // State flags selectable in the `d_un.d_val' element of the DT_FLAGS_1 entry. |
1267 | | enum { |
1268 | | DF_1_NOW = 0x00000001, // Set RTLD_NOW for this object. |
1269 | | DF_1_GLOBAL = 0x00000002, // Set RTLD_GLOBAL for this object. |
1270 | | DF_1_GROUP = 0x00000004, // Set RTLD_GROUP for this object. |
1271 | | DF_1_NODELETE = 0x00000008, // Set RTLD_NODELETE for this object. |
1272 | | DF_1_LOADFLTR = 0x00000010, // Trigger filtee loading at runtime. |
1273 | | DF_1_INITFIRST = 0x00000020, // Set RTLD_INITFIRST for this object. |
1274 | | DF_1_NOOPEN = 0x00000040, // Set RTLD_NOOPEN for this object. |
1275 | | DF_1_ORIGIN = 0x00000080, // $ORIGIN must be handled. |
1276 | | DF_1_DIRECT = 0x00000100, // Direct binding enabled. |
1277 | | DF_1_TRANS = 0x00000200, |
1278 | | DF_1_INTERPOSE = 0x00000400, // Object is used to interpose. |
1279 | | DF_1_NODEFLIB = 0x00000800, // Ignore default lib search path. |
1280 | | DF_1_NODUMP = 0x00001000, // Object can't be dldump'ed. |
1281 | | DF_1_CONFALT = 0x00002000, // Configuration alternative created. |
1282 | | DF_1_ENDFILTEE = 0x00004000, // Filtee terminates filters search. |
1283 | | DF_1_DISPRELDNE = 0x00008000, // Disp reloc applied at build time. |
1284 | | DF_1_DISPRELPND = 0x00010000, // Disp reloc applied at run-time. |
1285 | | DF_1_NODIRECT = 0x00020000, // Object has no-direct binding. |
1286 | | DF_1_IGNMULDEF = 0x00040000, |
1287 | | DF_1_NOKSYMS = 0x00080000, |
1288 | | DF_1_NOHDR = 0x00100000, |
1289 | | DF_1_EDITED = 0x00200000, // Object is modified after built. |
1290 | | DF_1_NORELOC = 0x00400000, |
1291 | | DF_1_SYMINTPOSE = 0x00800000, // Object has individual interposers. |
1292 | | DF_1_GLOBAUDIT = 0x01000000, // Global auditing required. |
1293 | | DF_1_SINGLETON = 0x02000000 // Singleton symbols are used. |
1294 | | }; |
1295 | | |
1296 | | // DT_MIPS_FLAGS values. |
1297 | | enum { |
1298 | | RHF_NONE = 0x00000000, // No flags. |
1299 | | RHF_QUICKSTART = 0x00000001, // Uses shortcut pointers. |
1300 | | RHF_NOTPOT = 0x00000002, // Hash size is not a power of two. |
1301 | | RHS_NO_LIBRARY_REPLACEMENT = 0x00000004, // Ignore LD_LIBRARY_PATH. |
1302 | | RHF_NO_MOVE = 0x00000008, // DSO address may not be relocated. |
1303 | | RHF_SGI_ONLY = 0x00000010, // SGI specific features. |
1304 | | RHF_GUARANTEE_INIT = 0x00000020, // Guarantee that .init will finish |
1305 | | // executing before any non-init |
1306 | | // code in DSO is called. |
1307 | | RHF_DELTA_C_PLUS_PLUS = 0x00000040, // Contains Delta C++ code. |
1308 | | RHF_GUARANTEE_START_INIT = 0x00000080, // Guarantee that .init will start |
1309 | | // executing before any non-init |
1310 | | // code in DSO is called. |
1311 | | RHF_PIXIE = 0x00000100, // Generated by pixie. |
1312 | | RHF_DEFAULT_DELAY_LOAD = 0x00000200, // Delay-load DSO by default. |
1313 | | RHF_REQUICKSTART = 0x00000400, // Object may be requickstarted |
1314 | | RHF_REQUICKSTARTED = 0x00000800, // Object has been requickstarted |
1315 | | RHF_CORD = 0x00001000, // Generated by cord. |
1316 | | RHF_NO_UNRES_UNDEF = 0x00002000, // Object contains no unresolved |
1317 | | // undef symbols. |
1318 | | RHF_RLD_ORDER_SAFE = 0x00004000 // Symbol table is in a safe order. |
1319 | | }; |
1320 | | |
1321 | | // ElfXX_VerDef structure version (GNU versioning) |
1322 | | enum { VER_DEF_NONE = 0, VER_DEF_CURRENT = 1 }; |
1323 | | |
1324 | | // VerDef Flags (ElfXX_VerDef::vd_flags) |
1325 | | enum { VER_FLG_BASE = 0x1, VER_FLG_WEAK = 0x2, VER_FLG_INFO = 0x4 }; |
1326 | | |
1327 | | // Special constants for the version table. (SHT_GNU_versym/.gnu.version) |
1328 | | enum { |
1329 | | VER_NDX_LOCAL = 0, // Unversioned local symbol |
1330 | | VER_NDX_GLOBAL = 1, // Unversioned global symbol |
1331 | | VERSYM_VERSION = 0x7fff, // Version Index mask |
1332 | | VERSYM_HIDDEN = 0x8000 // Hidden bit (non-default version) |
1333 | | }; |
1334 | | |
1335 | | // ElfXX_VerNeed structure version (GNU versioning) |
1336 | | enum { VER_NEED_NONE = 0, VER_NEED_CURRENT = 1 }; |
1337 | | |
1338 | | // SHT_NOTE section types |
1339 | | enum { |
1340 | | NT_FREEBSD_THRMISC = 7, |
1341 | | NT_FREEBSD_PROCSTAT_PROC = 8, |
1342 | | NT_FREEBSD_PROCSTAT_FILES = 9, |
1343 | | NT_FREEBSD_PROCSTAT_VMMAP = 10, |
1344 | | NT_FREEBSD_PROCSTAT_GROUPS = 11, |
1345 | | NT_FREEBSD_PROCSTAT_UMASK = 12, |
1346 | | NT_FREEBSD_PROCSTAT_RLIMIT = 13, |
1347 | | NT_FREEBSD_PROCSTAT_OSREL = 14, |
1348 | | NT_FREEBSD_PROCSTAT_PSSTRINGS = 15, |
1349 | | NT_FREEBSD_PROCSTAT_AUXV = 16, |
1350 | | }; |
1351 | | |
1352 | | enum { |
1353 | | NT_GNU_ABI_TAG = 1, |
1354 | | NT_GNU_HWCAP = 2, |
1355 | | NT_GNU_BUILD_ID = 3, |
1356 | | NT_GNU_GOLD_VERSION = 4, |
1357 | | }; |
1358 | | |
1359 | | enum { |
1360 | | GNU_ABI_TAG_LINUX = 0, |
1361 | | GNU_ABI_TAG_HURD = 1, |
1362 | | GNU_ABI_TAG_SOLARIS = 2, |
1363 | | GNU_ABI_TAG_FREEBSD = 3, |
1364 | | GNU_ABI_TAG_NETBSD = 4, |
1365 | | GNU_ABI_TAG_SYLLABLE = 5, |
1366 | | GNU_ABI_TAG_NACL = 6, |
1367 | | }; |
1368 | | |
1369 | | // Compressed section header for ELF32. |
1370 | | struct Elf32_Chdr { |
1371 | | Elf32_Word ch_type; |
1372 | | Elf32_Word ch_size; |
1373 | | Elf32_Word ch_addralign; |
1374 | | }; |
1375 | | |
1376 | | // Compressed section header for ELF64. |
1377 | | struct Elf64_Chdr { |
1378 | | Elf64_Word ch_type; |
1379 | | Elf64_Word ch_reserved; |
1380 | | Elf64_Xword ch_size; |
1381 | | Elf64_Xword ch_addralign; |
1382 | | }; |
1383 | | |
1384 | | // Legal values for ch_type field of compressed section header. |
1385 | | enum { |
1386 | | ELFCOMPRESS_ZLIB = 1, // ZLIB/DEFLATE algorithm. |
1387 | | ELFCOMPRESS_LOOS = 0x60000000, // Start of OS-specific. |
1388 | | ELFCOMPRESS_HIOS = 0x6fffffff, // End of OS-specific. |
1389 | | ELFCOMPRESS_LOPROC = 0x70000000, // Start of processor-specific. |
1390 | | ELFCOMPRESS_HIPROC = 0x7fffffff // End of processor-specific. |
1391 | | }; |
1392 | | |
1393 | | } // end namespace ELF |
1394 | | } // end namespace llvm |
1395 | | |
1396 | | #endif // LLVM_BINARYFORMAT_ELF_H |