/Users/buildslave/jenkins/sharedspace/clang-stage2-coverage-R@2/llvm/lib/Target/NVPTX/NVPTXFrameLowering.cpp
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1 | | //=======- NVPTXFrameLowering.cpp - NVPTX Frame Information ---*- C++ -*-=====// |
2 | | // |
3 | | // The LLVM Compiler Infrastructure |
4 | | // |
5 | | // This file is distributed under the University of Illinois Open Source |
6 | | // License. See LICENSE.TXT for details. |
7 | | // |
8 | | //===----------------------------------------------------------------------===// |
9 | | // |
10 | | // This file contains the NVPTX implementation of TargetFrameLowering class. |
11 | | // |
12 | | //===----------------------------------------------------------------------===// |
13 | | |
14 | | #include "NVPTXFrameLowering.h" |
15 | | #include "NVPTX.h" |
16 | | #include "NVPTXRegisterInfo.h" |
17 | | #include "NVPTXSubtarget.h" |
18 | | #include "NVPTXTargetMachine.h" |
19 | | #include "llvm/CodeGen/MachineFrameInfo.h" |
20 | | #include "llvm/CodeGen/MachineFunction.h" |
21 | | #include "llvm/CodeGen/MachineInstrBuilder.h" |
22 | | #include "llvm/CodeGen/MachineRegisterInfo.h" |
23 | | #include "llvm/MC/MachineLocation.h" |
24 | | #include "llvm/Target/TargetInstrInfo.h" |
25 | | |
26 | | using namespace llvm; |
27 | | |
28 | | NVPTXFrameLowering::NVPTXFrameLowering() |
29 | 582 | : TargetFrameLowering(TargetFrameLowering::StackGrowsUp, 8, 0) {} |
30 | | |
31 | 0 | bool NVPTXFrameLowering::hasFP(const MachineFunction &MF) const { return true; } |
32 | | |
33 | | void NVPTXFrameLowering::emitPrologue(MachineFunction &MF, |
34 | 1.50k | MachineBasicBlock &MBB) const { |
35 | 1.50k | if (MF.getFrameInfo().hasStackObjects()1.50k ) { |
36 | 22 | assert(&MF.front() == &MBB && "Shrink-wrapping not yet supported"); |
37 | 22 | MachineInstr *MI = &MBB.front(); |
38 | 22 | MachineRegisterInfo &MR = MF.getRegInfo(); |
39 | 22 | |
40 | 22 | // This instruction really occurs before first instruction |
41 | 22 | // in the BB, so giving it no debug location. |
42 | 22 | DebugLoc dl = DebugLoc(); |
43 | 22 | |
44 | 22 | // Emits |
45 | 22 | // mov %SPL, %depot; |
46 | 22 | // cvta.local %SP, %SPL; |
47 | 22 | // for local address accesses in MF. |
48 | 22 | bool Is64Bit = |
49 | 22 | static_cast<const NVPTXTargetMachine &>(MF.getTarget()).is64Bit(); |
50 | 22 | unsigned CvtaLocalOpcode = |
51 | 22 | (Is64Bit ? NVPTX::cvta_local_yes_648 : NVPTX::cvta_local_yes14 ); |
52 | 22 | unsigned MovDepotOpcode = |
53 | 22 | (Is64Bit ? NVPTX::MOV_DEPOT_ADDR_648 : NVPTX::MOV_DEPOT_ADDR14 ); |
54 | 22 | if (!MR.use_empty(NVPTX::VRFrame)22 ) { |
55 | 22 | // If %SP is not used, do not bother emitting "cvta.local %SP, %SPL". |
56 | 22 | MI = BuildMI(MBB, MI, dl, |
57 | 22 | MF.getSubtarget().getInstrInfo()->get(CvtaLocalOpcode), |
58 | 22 | NVPTX::VRFrame) |
59 | 22 | .addReg(NVPTX::VRFrameLocal); |
60 | 22 | } |
61 | 22 | BuildMI(MBB, MI, dl, MF.getSubtarget().getInstrInfo()->get(MovDepotOpcode), |
62 | 22 | NVPTX::VRFrameLocal) |
63 | 22 | .addImm(MF.getFunctionNumber()); |
64 | 22 | } |
65 | 1.50k | } |
66 | | |
67 | | void NVPTXFrameLowering::emitEpilogue(MachineFunction &MF, |
68 | 1.50k | MachineBasicBlock &MBB) const {} |
69 | | |
70 | | // This function eliminates ADJCALLSTACKDOWN, |
71 | | // ADJCALLSTACKUP pseudo instructions |
72 | | MachineBasicBlock::iterator NVPTXFrameLowering::eliminateCallFramePseudoInstr( |
73 | | MachineFunction &MF, MachineBasicBlock &MBB, |
74 | 0 | MachineBasicBlock::iterator I) const { |
75 | 0 | // Simply discard ADJCALLSTACKDOWN, |
76 | 0 | // ADJCALLSTACKUP instructions. |
77 | 0 | return MBB.erase(I); |
78 | 0 | } |