Coverage Report

Created: 2017-10-03 07:32

/Users/buildslave/jenkins/sharedspace/clang-stage2-coverage-R@2/llvm/lib/Target/NVPTX/NVPTXFrameLowering.cpp
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//=======- NVPTXFrameLowering.cpp - NVPTX Frame Information ---*- C++ -*-=====//
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//
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//                     The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the NVPTX implementation of TargetFrameLowering class.
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//
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//===----------------------------------------------------------------------===//
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#include "NVPTXFrameLowering.h"
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#include "NVPTX.h"
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#include "NVPTXRegisterInfo.h"
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#include "NVPTXSubtarget.h"
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#include "NVPTXTargetMachine.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/MC/MachineLocation.h"
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#include "llvm/Target/TargetInstrInfo.h"
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using namespace llvm;
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NVPTXFrameLowering::NVPTXFrameLowering()
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    : TargetFrameLowering(TargetFrameLowering::StackGrowsUp, 8, 0) {}
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bool NVPTXFrameLowering::hasFP(const MachineFunction &MF) const { return true; }
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void NVPTXFrameLowering::emitPrologue(MachineFunction &MF,
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1.50k
                                      MachineBasicBlock &MBB) const {
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1.50k
  if (
MF.getFrameInfo().hasStackObjects()1.50k
) {
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    assert(&MF.front() == &MBB && "Shrink-wrapping not yet supported");
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    MachineInstr *MI = &MBB.front();
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    MachineRegisterInfo &MR = MF.getRegInfo();
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    // This instruction really occurs before first instruction
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    // in the BB, so giving it no debug location.
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    DebugLoc dl = DebugLoc();
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    // Emits
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    //   mov %SPL, %depot;
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    //   cvta.local %SP, %SPL;
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    // for local address accesses in MF.
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    bool Is64Bit =
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        static_cast<const NVPTXTargetMachine &>(MF.getTarget()).is64Bit();
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    unsigned CvtaLocalOpcode =
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        (Is64Bit ? 
NVPTX::cvta_local_yes_648
:
NVPTX::cvta_local_yes14
);
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    unsigned MovDepotOpcode =
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        (Is64Bit ? 
NVPTX::MOV_DEPOT_ADDR_648
:
NVPTX::MOV_DEPOT_ADDR14
);
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    if (
!MR.use_empty(NVPTX::VRFrame)22
) {
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      // If %SP is not used, do not bother emitting "cvta.local %SP, %SPL".
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      MI = BuildMI(MBB, MI, dl,
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                   MF.getSubtarget().getInstrInfo()->get(CvtaLocalOpcode),
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                   NVPTX::VRFrame)
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               .addReg(NVPTX::VRFrameLocal);
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    }
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    BuildMI(MBB, MI, dl, MF.getSubtarget().getInstrInfo()->get(MovDepotOpcode),
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            NVPTX::VRFrameLocal)
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        .addImm(MF.getFunctionNumber());
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  }
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}
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void NVPTXFrameLowering::emitEpilogue(MachineFunction &MF,
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                                      MachineBasicBlock &MBB) const {}
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// This function eliminates ADJCALLSTACKDOWN,
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// ADJCALLSTACKUP pseudo instructions
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MachineBasicBlock::iterator NVPTXFrameLowering::eliminateCallFramePseudoInstr(
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    MachineFunction &MF, MachineBasicBlock &MBB,
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    MachineBasicBlock::iterator I) const {
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  // Simply discard ADJCALLSTACKDOWN,
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  // ADJCALLSTACKUP instructions.
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  return MBB.erase(I);
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}