/Users/buildslave/jenkins/sharedspace/clang-stage2-coverage-R@2/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.h
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1 | | //===-- PPCMachineFunctionInfo.h - Private data used for PowerPC --*- C++ -*-=// |
2 | | // |
3 | | // The LLVM Compiler Infrastructure |
4 | | // |
5 | | // This file is distributed under the University of Illinois Open Source |
6 | | // License. See LICENSE.TXT for details. |
7 | | // |
8 | | //===----------------------------------------------------------------------===// |
9 | | // |
10 | | // This file declares the PowerPC specific subclass of MachineFunctionInfo. |
11 | | // |
12 | | //===----------------------------------------------------------------------===// |
13 | | |
14 | | #ifndef LLVM_LIB_TARGET_POWERPC_PPCMACHINEFUNCTIONINFO_H |
15 | | #define LLVM_LIB_TARGET_POWERPC_PPCMACHINEFUNCTIONINFO_H |
16 | | |
17 | | #include "llvm/ADT/SmallVector.h" |
18 | | #include "llvm/CodeGen/MachineFunction.h" |
19 | | |
20 | | namespace llvm { |
21 | | |
22 | | /// PPCFunctionInfo - This class is derived from MachineFunction private |
23 | | /// PowerPC target-specific information for each MachineFunction. |
24 | | class PPCFunctionInfo : public MachineFunctionInfo { |
25 | | virtual void anchor(); |
26 | | |
27 | | /// FramePointerSaveIndex - Frame index of where the old frame pointer is |
28 | | /// stored. Also used as an anchor for instructions that need to be altered |
29 | | /// when using frame pointers (dyna_add, dyna_sub.) |
30 | | int FramePointerSaveIndex = 0; |
31 | | |
32 | | /// ReturnAddrSaveIndex - Frame index of where the return address is stored. |
33 | | /// |
34 | | int ReturnAddrSaveIndex = 0; |
35 | | |
36 | | /// Frame index where the old base pointer is stored. |
37 | | int BasePointerSaveIndex = 0; |
38 | | |
39 | | /// Frame index where the old PIC base pointer is stored. |
40 | | int PICBasePointerSaveIndex = 0; |
41 | | |
42 | | /// MustSaveLR - Indicates whether LR is defined (or clobbered) in the current |
43 | | /// function. This is only valid after the initial scan of the function by |
44 | | /// PEI. |
45 | | bool MustSaveLR; |
46 | | |
47 | | /// Does this function have any stack spills. |
48 | | bool HasSpills = false; |
49 | | |
50 | | /// Does this function spill using instructions with only r+r (not r+i) |
51 | | /// forms. |
52 | | bool HasNonRISpills = false; |
53 | | |
54 | | /// SpillsCR - Indicates whether CR is spilled in the current function. |
55 | | bool SpillsCR = false; |
56 | | |
57 | | /// Indicates whether VRSAVE is spilled in the current function. |
58 | | bool SpillsVRSAVE = false; |
59 | | |
60 | | /// LRStoreRequired - The bool indicates whether there is some explicit use of |
61 | | /// the LR/LR8 stack slot that is not obvious from scanning the code. This |
62 | | /// requires that the code generator produce a store of LR to the stack on |
63 | | /// entry, even though LR may otherwise apparently not be used. |
64 | | bool LRStoreRequired = false; |
65 | | |
66 | | /// This function makes use of the PPC64 ELF TOC base pointer (register r2). |
67 | | bool UsesTOCBasePtr = false; |
68 | | |
69 | | /// MinReservedArea - This is the frame size that is at least reserved in a |
70 | | /// potential caller (parameter+linkage area). |
71 | | unsigned MinReservedArea = 0; |
72 | | |
73 | | /// TailCallSPDelta - Stack pointer delta used when tail calling. Maximum |
74 | | /// amount the stack pointer is adjusted to make the frame bigger for tail |
75 | | /// calls. Used for creating an area before the register spill area. |
76 | | int TailCallSPDelta = 0; |
77 | | |
78 | | /// HasFastCall - Does this function contain a fast call. Used to determine |
79 | | /// how the caller's stack pointer should be calculated (epilog/dynamicalloc). |
80 | | bool HasFastCall = false; |
81 | | |
82 | | /// VarArgsFrameIndex - FrameIndex for start of varargs area. |
83 | | int VarArgsFrameIndex = 0; |
84 | | |
85 | | /// VarArgsStackOffset - StackOffset for start of stack |
86 | | /// arguments. |
87 | | |
88 | | int VarArgsStackOffset = 0; |
89 | | |
90 | | /// VarArgsNumGPR - Index of the first unused integer |
91 | | /// register for parameter passing. |
92 | | unsigned VarArgsNumGPR = 0; |
93 | | |
94 | | /// VarArgsNumFPR - Index of the first unused double |
95 | | /// register for parameter passing. |
96 | | unsigned VarArgsNumFPR = 0; |
97 | | |
98 | | /// CRSpillFrameIndex - FrameIndex for CR spill slot for 32-bit SVR4. |
99 | | int CRSpillFrameIndex = 0; |
100 | | |
101 | | /// If any of CR[2-4] need to be saved in the prologue and restored in the |
102 | | /// epilogue then they are added to this array. This is used for the |
103 | | /// 64-bit SVR4 ABI. |
104 | | SmallVector<unsigned, 3> MustSaveCRs; |
105 | | |
106 | | /// Hold onto our MachineFunction context. |
107 | | MachineFunction &MF; |
108 | | |
109 | | /// Whether this uses the PIC Base register or not. |
110 | | bool UsesPICBase = false; |
111 | | |
112 | | /// True if this function has a subset of CSRs that is handled explicitly via |
113 | | /// copies |
114 | | bool IsSplitCSR = false; |
115 | | |
116 | | public: |
117 | 7.51k | explicit PPCFunctionInfo(MachineFunction &MF) : MF(MF) {} |
118 | | |
119 | 16.4k | int getFramePointerSaveIndex() const { return FramePointerSaveIndex; } |
120 | 159 | void setFramePointerSaveIndex(int Idx) { FramePointerSaveIndex = Idx; } |
121 | | |
122 | 5 | int getReturnAddrSaveIndex() const { return ReturnAddrSaveIndex; } |
123 | 5 | void setReturnAddrSaveIndex(int idx) { ReturnAddrSaveIndex = idx; } |
124 | | |
125 | 7.65k | int getBasePointerSaveIndex() const { return BasePointerSaveIndex; } |
126 | 26 | void setBasePointerSaveIndex(int Idx) { BasePointerSaveIndex = Idx; } |
127 | | |
128 | 26 | int getPICBasePointerSaveIndex() const { return PICBasePointerSaveIndex; } |
129 | 10 | void setPICBasePointerSaveIndex(int Idx) { PICBasePointerSaveIndex = Idx; } |
130 | | |
131 | 6 | unsigned getMinReservedArea() const { return MinReservedArea; } |
132 | 7.49k | void setMinReservedArea(unsigned size) { MinReservedArea = size; } |
133 | | |
134 | 68 | int getTailCallSPDelta() const { return TailCallSPDelta; } |
135 | 0 | void setTailCallSPDelta(int size) { TailCallSPDelta = size; } |
136 | | |
137 | | /// MustSaveLR - This is set when the prolog/epilog inserter does its initial |
138 | | /// scan of the function. It is true if the LR/LR8 register is ever explicitly |
139 | | /// defined/clobbered in the machine function (e.g. by calls and movpctolr, |
140 | | /// which is used in PIC generation), or if the LR stack slot is explicitly |
141 | | /// referenced by builtin_return_address. |
142 | 7.58k | void setMustSaveLR(bool U) { MustSaveLR = U; } |
143 | 14.9k | bool mustSaveLR() const { return MustSaveLR; } |
144 | | |
145 | 4.16k | void setHasSpills() { HasSpills = true; } |
146 | 7.37k | bool hasSpills() const { return HasSpills; } |
147 | | |
148 | 412 | void setHasNonRISpills() { HasNonRISpills = true; } |
149 | 7.45k | bool hasNonRISpills() const { return HasNonRISpills; } |
150 | | |
151 | 117 | void setSpillsCR() { SpillsCR = true; } |
152 | 7.94k | bool isCRSpilled() const { return SpillsCR; } |
153 | | |
154 | 0 | void setSpillsVRSAVE() { SpillsVRSAVE = true; } |
155 | 7.54k | bool isVRSAVESpilled() const { return SpillsVRSAVE; } |
156 | | |
157 | 6 | void setLRStoreRequired() { LRStoreRequired = true; } |
158 | 27.9k | bool isLRStoreRequired() const { return LRStoreRequired; } |
159 | | |
160 | 3.25k | void setUsesTOCBasePtr() { UsesTOCBasePtr = true; } |
161 | 22.4k | bool usesTOCBasePtr() const { return UsesTOCBasePtr; } |
162 | | |
163 | 3 | void setHasFastCall() { HasFastCall = true; } |
164 | 1.05k | bool hasFastCall() const { return HasFastCall;} |
165 | | |
166 | 18 | int getVarArgsFrameIndex() const { return VarArgsFrameIndex; } |
167 | 12 | void setVarArgsFrameIndex(int Index) { VarArgsFrameIndex = Index; } |
168 | | |
169 | 0 | int getVarArgsStackOffset() const { return VarArgsStackOffset; } |
170 | 1 | void setVarArgsStackOffset(int Offset) { VarArgsStackOffset = Offset; } |
171 | | |
172 | 0 | unsigned getVarArgsNumGPR() const { return VarArgsNumGPR; } |
173 | 1 | void setVarArgsNumGPR(unsigned Num) { VarArgsNumGPR = Num; } |
174 | | |
175 | 0 | unsigned getVarArgsNumFPR() const { return VarArgsNumFPR; } |
176 | 1 | void setVarArgsNumFPR(unsigned Num) { VarArgsNumFPR = Num; } |
177 | | |
178 | 11 | int getCRSpillFrameIndex() const { return CRSpillFrameIndex; } |
179 | 7 | void setCRSpillFrameIndex(int idx) { CRSpillFrameIndex = idx; } |
180 | | |
181 | | const SmallVectorImpl<unsigned> & |
182 | 14.9k | getMustSaveCRs() const { return MustSaveCRs; } |
183 | 59 | void addMustSaveCR(unsigned Reg) { MustSaveCRs.push_back(Reg); } |
184 | | |
185 | 10 | void setUsesPICBase(bool uses) { UsesPICBase = uses; } |
186 | 45.6k | bool usesPICBase() const { return UsesPICBase; } |
187 | | |
188 | 139k | bool isSplitCSR() const { return IsSplitCSR; } |
189 | 3 | void setIsSplitCSR(bool s) { IsSplitCSR = s; } |
190 | | |
191 | | MCSymbol *getPICOffsetSymbol() const; |
192 | | |
193 | | MCSymbol *getGlobalEPSymbol() const; |
194 | | MCSymbol *getLocalEPSymbol() const; |
195 | | MCSymbol *getTOCOffsetSymbol() const; |
196 | | }; |
197 | | |
198 | | } // end namespace llvm |
199 | | |
200 | | #endif // LLVM_LIB_TARGET_POWERPC_PPCMACHINEFUNCTIONINFO_H |