/Users/buildslave/jenkins/sharedspace/clang-stage2-coverage-R@2/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp
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1 | | //===-- SparcMCTargetDesc.cpp - Sparc Target Descriptions -----------------===// |
2 | | // |
3 | | // The LLVM Compiler Infrastructure |
4 | | // |
5 | | // This file is distributed under the University of Illinois Open Source |
6 | | // License. See LICENSE.TXT for details. |
7 | | // |
8 | | //===----------------------------------------------------------------------===// |
9 | | // |
10 | | // This file provides Sparc specific target descriptions. |
11 | | // |
12 | | //===----------------------------------------------------------------------===// |
13 | | |
14 | | #include "SparcMCTargetDesc.h" |
15 | | #include "InstPrinter/SparcInstPrinter.h" |
16 | | #include "SparcMCAsmInfo.h" |
17 | | #include "SparcTargetStreamer.h" |
18 | | #include "llvm/MC/MCInstrInfo.h" |
19 | | #include "llvm/MC/MCRegisterInfo.h" |
20 | | #include "llvm/MC/MCSubtargetInfo.h" |
21 | | #include "llvm/Support/ErrorHandling.h" |
22 | | #include "llvm/Support/TargetRegistry.h" |
23 | | |
24 | | using namespace llvm; |
25 | | |
26 | | #define GET_INSTRINFO_MC_DESC |
27 | | #include "SparcGenInstrInfo.inc" |
28 | | |
29 | | #define GET_SUBTARGETINFO_MC_DESC |
30 | | #include "SparcGenSubtargetInfo.inc" |
31 | | |
32 | | #define GET_REGINFO_MC_DESC |
33 | | #include "SparcGenRegisterInfo.inc" |
34 | | |
35 | | static MCAsmInfo *createSparcMCAsmInfo(const MCRegisterInfo &MRI, |
36 | 170 | const Triple &TT) { |
37 | 170 | MCAsmInfo *MAI = new SparcELFMCAsmInfo(TT); |
38 | 170 | unsigned Reg = MRI.getDwarfRegNum(SP::O6, true); |
39 | 170 | MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(nullptr, Reg, 0); |
40 | 170 | MAI->addInitialFrameState(Inst); |
41 | 170 | return MAI; |
42 | 170 | } |
43 | | |
44 | | static MCAsmInfo *createSparcV9MCAsmInfo(const MCRegisterInfo &MRI, |
45 | 99 | const Triple &TT) { |
46 | 99 | MCAsmInfo *MAI = new SparcELFMCAsmInfo(TT); |
47 | 99 | unsigned Reg = MRI.getDwarfRegNum(SP::O6, true); |
48 | 99 | MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(nullptr, Reg, 2047); |
49 | 99 | MAI->addInitialFrameState(Inst); |
50 | 99 | return MAI; |
51 | 99 | } |
52 | | |
53 | 304 | static MCInstrInfo *createSparcMCInstrInfo() { |
54 | 304 | MCInstrInfo *X = new MCInstrInfo(); |
55 | 304 | InitSparcMCInstrInfo(X); |
56 | 304 | return X; |
57 | 304 | } |
58 | | |
59 | 274 | static MCRegisterInfo *createSparcMCRegisterInfo(const Triple &TT) { |
60 | 274 | MCRegisterInfo *X = new MCRegisterInfo(); |
61 | 274 | InitSparcMCRegisterInfo(X, SP::O7); |
62 | 274 | return X; |
63 | 274 | } |
64 | | |
65 | | static MCSubtargetInfo * |
66 | 267 | createSparcMCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS) { |
67 | 267 | if (CPU.empty()) |
68 | 233 | CPU = (TT.getArch() == Triple::sparcv9) ? 233 "v9"96 : "v8"137 ; |
69 | 267 | return createSparcMCSubtargetInfoImpl(TT, CPU, FS); |
70 | 267 | } |
71 | | |
72 | | static MCTargetStreamer * |
73 | 25 | createObjectTargetStreamer(MCStreamer &S, const MCSubtargetInfo &STI) { |
74 | 25 | return new SparcTargetELFStreamer(S); |
75 | 25 | } |
76 | | |
77 | | static MCTargetStreamer *createTargetAsmStreamer(MCStreamer &S, |
78 | | formatted_raw_ostream &OS, |
79 | | MCInstPrinter *InstPrint, |
80 | 209 | bool isVerboseAsm) { |
81 | 209 | return new SparcTargetAsmStreamer(S, OS); |
82 | 209 | } |
83 | | |
84 | | static MCInstPrinter *createSparcMCInstPrinter(const Triple &T, |
85 | | unsigned SyntaxVariant, |
86 | | const MCAsmInfo &MAI, |
87 | | const MCInstrInfo &MII, |
88 | 212 | const MCRegisterInfo &MRI) { |
89 | 212 | return new SparcInstPrinter(MAI, MII, MRI); |
90 | 212 | } |
91 | | |
92 | 70.1k | extern "C" void LLVMInitializeSparcTargetMC() { |
93 | 70.1k | // Register the MC asm info. |
94 | 70.1k | RegisterMCAsmInfoFn X(getTheSparcTarget(), createSparcMCAsmInfo); |
95 | 70.1k | RegisterMCAsmInfoFn Y(getTheSparcV9Target(), createSparcV9MCAsmInfo); |
96 | 70.1k | RegisterMCAsmInfoFn Z(getTheSparcelTarget(), createSparcMCAsmInfo); |
97 | 70.1k | |
98 | 70.1k | for (Target *T : |
99 | 210k | {&getTheSparcTarget(), &getTheSparcV9Target(), &getTheSparcelTarget()}) { |
100 | 210k | // Register the MC instruction info. |
101 | 210k | TargetRegistry::RegisterMCInstrInfo(*T, createSparcMCInstrInfo); |
102 | 210k | |
103 | 210k | // Register the MC register info. |
104 | 210k | TargetRegistry::RegisterMCRegInfo(*T, createSparcMCRegisterInfo); |
105 | 210k | |
106 | 210k | // Register the MC subtarget info. |
107 | 210k | TargetRegistry::RegisterMCSubtargetInfo(*T, createSparcMCSubtargetInfo); |
108 | 210k | |
109 | 210k | // Register the MC Code Emitter. |
110 | 210k | TargetRegistry::RegisterMCCodeEmitter(*T, createSparcMCCodeEmitter); |
111 | 210k | |
112 | 210k | // Register the asm backend. |
113 | 210k | TargetRegistry::RegisterMCAsmBackend(*T, createSparcAsmBackend); |
114 | 210k | |
115 | 210k | // Register the object target streamer. |
116 | 210k | TargetRegistry::RegisterObjectTargetStreamer(*T, |
117 | 210k | createObjectTargetStreamer); |
118 | 210k | |
119 | 210k | // Register the asm streamer. |
120 | 210k | TargetRegistry::RegisterAsmTargetStreamer(*T, createTargetAsmStreamer); |
121 | 210k | |
122 | 210k | // Register the MCInstPrinter |
123 | 210k | TargetRegistry::RegisterMCInstPrinter(*T, createSparcMCInstPrinter); |
124 | 210k | } |
125 | 70.1k | } |