Coverage Report

Created: 2017-10-03 07:32

/Users/buildslave/jenkins/sharedspace/clang-stage2-coverage-R@2/llvm/lib/Target/Sparc/SparcTargetMachine.h
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//===-- SparcTargetMachine.h - Define TargetMachine for Sparc ---*- C++ -*-===//
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//
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//                     The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares the Sparc specific subclass of TargetMachine.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_SPARC_SPARCTARGETMACHINE_H
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#define LLVM_LIB_TARGET_SPARC_SPARCTARGETMACHINE_H
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#include "SparcInstrInfo.h"
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#include "SparcSubtarget.h"
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#include "llvm/Target/TargetMachine.h"
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namespace llvm {
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class SparcTargetMachine : public LLVMTargetMachine {
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  std::unique_ptr<TargetLoweringObjectFile> TLOF;
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  SparcSubtarget Subtarget;
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  bool is64Bit;
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  mutable StringMap<std::unique_ptr<SparcSubtarget>> SubtargetMap;
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public:
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  SparcTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
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                     StringRef FS, const TargetOptions &Options,
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                     Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
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                     CodeGenOpt::Level OL, bool JIT, bool is64bit);
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  ~SparcTargetMachine() override;
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  const SparcSubtarget *getSubtargetImpl() const { return &Subtarget; }
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  const SparcSubtarget *getSubtargetImpl(const Function &) const override;
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  // Pass Pipeline Configuration
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  TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
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  TargetLoweringObjectFile *getObjFileLowering() const override {
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    return TLOF.get();
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  }
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  bool isMachineVerifierClean() const override {
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    return false;
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  }
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};
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/// Sparc 32-bit target machine
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///
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class SparcV8TargetMachine : public SparcTargetMachine {
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  virtual void anchor();
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public:
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  SparcV8TargetMachine(const Target &T, const Triple &TT, StringRef CPU,
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                       StringRef FS, const TargetOptions &Options,
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                       Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
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                       CodeGenOpt::Level OL, bool JIT);
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};
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/// Sparc 64-bit target machine
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///
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class SparcV9TargetMachine : public SparcTargetMachine {
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  virtual void anchor();
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public:
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  SparcV9TargetMachine(const Target &T, const Triple &TT, StringRef CPU,
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                       StringRef FS, const TargetOptions &Options,
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                       Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
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                       CodeGenOpt::Level OL, bool JIT);
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};
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class SparcelTargetMachine : public SparcTargetMachine {
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  virtual void anchor();
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public:
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  SparcelTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
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                       StringRef FS, const TargetOptions &Options,
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                       Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
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                       CodeGenOpt::Level OL, bool JIT);
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};
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} // end namespace llvm
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#endif