Coverage Report

Created: 2017-10-03 07:32

/Users/buildslave/jenkins/sharedspace/clang-stage2-coverage-R@2/llvm/lib/Target/SystemZ/SystemZRegisterInfo.h
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//===-- SystemZRegisterInfo.h - SystemZ register information ----*- C++ -*-===//
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//
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//                     The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZREGISTERINFO_H
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#define LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZREGISTERINFO_H
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#include "SystemZ.h"
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#include "llvm/Target/TargetRegisterInfo.h"
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#define GET_REGINFO_HEADER
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#include "SystemZGenRegisterInfo.inc"
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namespace llvm {
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namespace SystemZ {
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// Return the subreg to use for referring to the even and odd registers
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// in a GR128 pair.  Is32Bit says whether we want a GR32 or GR64.
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inline unsigned even128(bool Is32bit) {
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  return Is32bit ? 
subreg_hl3284
:
subreg_h64131
;
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}
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inline unsigned odd128(bool Is32bit) {
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  return Is32bit ? 
subreg_l3284
:
subreg_l64131
;
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}
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} // end namespace SystemZ
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struct SystemZRegisterInfo : public SystemZGenRegisterInfo {
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public:
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  SystemZRegisterInfo();
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  /// getPointerRegClass - Return the register class to use to hold pointers.
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  /// This is currently only used by LOAD_STACK_GUARD, which requires a non-%r0
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  /// register, hence ADDR64.
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  const TargetRegisterClass *
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  getPointerRegClass(const MachineFunction &MF,
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                     unsigned Kind=0) const override {
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    return &SystemZ::ADDR64BitRegClass;
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  }
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  // Override TargetRegisterInfo.h.
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  bool requiresRegisterScavenging(const MachineFunction &MF) const override {
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    return true;
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  }
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  bool requiresFrameIndexScavenging(const MachineFunction &MF) const override {
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    return true;
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  }
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  bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const override {
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    return true;
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  }
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  const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
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  const uint32_t *getCallPreservedMask(const MachineFunction &MF,
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                                       CallingConv::ID CC) const override;
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  BitVector getReservedRegs(const MachineFunction &MF) const override;
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  void eliminateFrameIndex(MachineBasicBlock::iterator MI,
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                           int SPAdj, unsigned FIOperandNum,
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                           RegScavenger *RS) const override;
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  unsigned getFrameRegister(const MachineFunction &MF) const override;
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};
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} // end namespace llvm
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#endif