Coverage Report

Created: 2017-10-03 07:32

/Users/buildslave/jenkins/sharedspace/clang-stage2-coverage-R@2/llvm/tools/lld/ELF/Arch/PPC64.cpp
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//===- PPC64.cpp ----------------------------------------------------------===//
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//
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//                             The LLVM Linker
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "Error.h"
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#include "Symbols.h"
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#include "SyntheticSections.h"
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#include "Target.h"
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#include "llvm/Support/Endian.h"
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using namespace llvm;
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using namespace llvm::support::endian;
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using namespace llvm::ELF;
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using namespace lld;
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using namespace lld::elf;
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static uint64_t PPC64TocOffset = 0x8000;
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uint64_t elf::getPPC64TocBase() {
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  // The TOC consists of sections .got, .toc, .tocbss, .plt in that order. The
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  // TOC starts where the first of these sections starts. We always create a
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  // .got when we see a relocation that uses it, so for us the start is always
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  // the .got.
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  uint64_t TocVA = InX::Got->getVA();
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  // Per the ppc64-elf-linux ABI, The TOC base is TOC value plus 0x8000
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  // thus permitting a full 64 Kbytes segment. Note that the glibc startup
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  // code (crt1.o) assumes that you can get from the TOC base to the
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  // start of the .toc section with only a single (signed) 16-bit relocation.
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  return TocVA + PPC64TocOffset;
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}
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namespace {
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class PPC64 final : public TargetInfo {
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public:
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  PPC64();
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  RelExpr getRelExpr(uint32_t Type, const SymbolBody &S, const InputFile &File,
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                     const uint8_t *Loc) const override;
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  void writePlt(uint8_t *Buf, uint64_t GotPltEntryAddr, uint64_t PltEntryAddr,
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                int32_t Index, unsigned RelOff) const override;
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  void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
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};
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} // namespace
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// Relocation masks following the #lo(value), #hi(value), #ha(value),
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// #higher(value), #highera(value), #highest(value), and #highesta(value)
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// macros defined in section 4.5.1. Relocation Types of the PPC-elf64abi
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// document.
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static uint16_t applyPPCLo(uint64_t V) { return V; }
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static uint16_t applyPPCHi(uint64_t V) { return V >> 16; }
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static uint16_t applyPPCHa(uint64_t V) { return (V + 0x8000) >> 16; }
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static uint16_t applyPPCHigher(uint64_t V) { return V >> 32; }
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static uint16_t applyPPCHighera(uint64_t V) { return (V + 0x8000) >> 32; }
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static uint16_t applyPPCHighest(uint64_t V) { return V >> 48; }
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static uint16_t applyPPCHighesta(uint64_t V) { return (V + 0x8000) >> 48; }
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PPC64::PPC64() {
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  PltRel = GotRel = R_PPC64_GLOB_DAT;
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  RelativeRel = R_PPC64_RELATIVE;
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  GotEntrySize = 8;
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  GotPltEntrySize = 8;
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  PltEntrySize = 32;
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  PltHeaderSize = 0;
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  // We need 64K pages (at least under glibc/Linux, the loader won't
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  // set different permissions on a finer granularity than that).
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  DefaultMaxPageSize = 65536;
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  // The PPC64 ELF ABI v1 spec, says:
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  //
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  //   It is normally desirable to put segments with different characteristics
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  //   in separate 256 Mbyte portions of the address space, to give the
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  //   operating system full paging flexibility in the 64-bit address space.
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  //
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  // And because the lowest non-zero 256M boundary is 0x10000000, PPC64 linkers
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  // use 0x10000000 as the starting address.
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  DefaultImageBase = 0x10000000;
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}
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RelExpr PPC64::getRelExpr(uint32_t Type, const SymbolBody &S,
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                          const InputFile &File, const uint8_t *Loc) const {
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  switch (Type) {
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  default:
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    return R_ABS;
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  case R_PPC64_TOC16:
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  case R_PPC64_TOC16_DS:
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  case R_PPC64_TOC16_HA:
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  case R_PPC64_TOC16_HI:
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  case R_PPC64_TOC16_LO:
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  case R_PPC64_TOC16_LO_DS:
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    return R_GOTREL;
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  case R_PPC64_TOC:
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    return R_PPC_TOC;
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  case R_PPC64_REL24:
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    return R_PPC_PLT_OPD;
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  }
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}
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void PPC64::writePlt(uint8_t *Buf, uint64_t GotPltEntryAddr,
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                     uint64_t PltEntryAddr, int32_t Index,
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                     unsigned RelOff) const {
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  uint64_t Off = GotPltEntryAddr - getPPC64TocBase();
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  // FIXME: What we should do, in theory, is get the offset of the function
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  // descriptor in the .opd section, and use that as the offset from %r2 (the
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  // TOC-base pointer). Instead, we have the GOT-entry offset, and that will
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  // be a pointer to the function descriptor in the .opd section. Using
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  // this scheme is simpler, but requires an extra indirection per PLT dispatch.
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  write32be(Buf, 0xf8410028);                       // std %r2, 40(%r1)
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  write32be(Buf + 4, 0x3d620000 | applyPPCHa(Off)); // addis %r11, %r2, X@ha
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  write32be(Buf + 8, 0xe98b0000 | applyPPCLo(Off)); // ld %r12, X@l(%r11)
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  write32be(Buf + 12, 0xe96c0000);                  // ld %r11,0(%r12)
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  write32be(Buf + 16, 0x7d6903a6);                  // mtctr %r11
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  write32be(Buf + 20, 0xe84c0008);                  // ld %r2,8(%r12)
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  write32be(Buf + 24, 0xe96c0010);                  // ld %r11,16(%r12)
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  write32be(Buf + 28, 0x4e800420);                  // bctr
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}
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static std::pair<uint32_t, uint64_t> toAddr16Rel(uint32_t Type, uint64_t Val) {
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  uint64_t V = Val - PPC64TocOffset;
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  switch (Type) {
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  case R_PPC64_TOC16:
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    return {R_PPC64_ADDR16, V};
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  case R_PPC64_TOC16_DS:
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    return {R_PPC64_ADDR16_DS, V};
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  case R_PPC64_TOC16_HA:
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    return {R_PPC64_ADDR16_HA, V};
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  case R_PPC64_TOC16_HI:
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    return {R_PPC64_ADDR16_HI, V};
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  case R_PPC64_TOC16_LO:
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    return {R_PPC64_ADDR16_LO, V};
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  case R_PPC64_TOC16_LO_DS:
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    return {R_PPC64_ADDR16_LO_DS, V};
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  default:
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    return {Type, Val};
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  }
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}
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void PPC64::relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const {
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  // For a TOC-relative relocation, proceed in terms of the corresponding
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  // ADDR16 relocation type.
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  std::tie(Type, Val) = toAddr16Rel(Type, Val);
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  switch (Type) {
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  case R_PPC64_ADDR14: {
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    checkAlignment<4>(Loc, Val, Type);
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    // Preserve the AA/LK bits in the branch instruction
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    uint8_t AALK = Loc[3];
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    write16be(Loc + 2, (AALK & 3) | (Val & 0xfffc));
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    break;
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  }
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  case R_PPC64_ADDR16:
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    checkInt<16>(Loc, Val, Type);
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    write16be(Loc, Val);
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    break;
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  case R_PPC64_ADDR16_DS:
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    checkInt<16>(Loc, Val, Type);
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    write16be(Loc, (read16be(Loc) & 3) | (Val & ~3));
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    break;
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  case R_PPC64_ADDR16_HA:
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  case R_PPC64_REL16_HA:
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    write16be(Loc, applyPPCHa(Val));
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    break;
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  case R_PPC64_ADDR16_HI:
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  case R_PPC64_REL16_HI:
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    write16be(Loc, applyPPCHi(Val));
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    break;
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  case R_PPC64_ADDR16_HIGHER:
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    write16be(Loc, applyPPCHigher(Val));
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    break;
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  case R_PPC64_ADDR16_HIGHERA:
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    write16be(Loc, applyPPCHighera(Val));
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    break;
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  case R_PPC64_ADDR16_HIGHEST:
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    write16be(Loc, applyPPCHighest(Val));
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    break;
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  case R_PPC64_ADDR16_HIGHESTA:
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    write16be(Loc, applyPPCHighesta(Val));
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    break;
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  case R_PPC64_ADDR16_LO:
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    write16be(Loc, applyPPCLo(Val));
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    break;
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  case R_PPC64_ADDR16_LO_DS:
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  case R_PPC64_REL16_LO:
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    write16be(Loc, (read16be(Loc) & 3) | (applyPPCLo(Val) & ~3));
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    break;
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  case R_PPC64_ADDR32:
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  case R_PPC64_REL32:
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    checkInt<32>(Loc, Val, Type);
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    write32be(Loc, Val);
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    break;
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  case R_PPC64_ADDR64:
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  case R_PPC64_REL64:
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  case R_PPC64_TOC:
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    write64be(Loc, Val);
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    break;
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  case R_PPC64_REL24: {
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    uint32_t Mask = 0x03FFFFFC;
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    checkInt<24>(Loc, Val, Type);
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    write32be(Loc, (read32be(Loc) & ~Mask) | (Val & Mask));
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    break;
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  }
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  default:
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    error(getErrorLocation(Loc) + "unrecognized reloc " + Twine(Type));
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  }
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}
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TargetInfo *elf::getPPC64TargetInfo() {
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  static PPC64 Target;
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  return &Target;
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}