Coverage Report

Created: 2018-06-25 02:00

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/llvm/tools/lld/ELF/InputSection.cpp
Line
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Source (jump to first uncovered line)
1
//===- InputSection.cpp ---------------------------------------------------===//
2
//
3
//                             The LLVM Linker
4
//
5
// This file is distributed under the University of Illinois Open Source
6
// License. See LICENSE.TXT for details.
7
//
8
//===----------------------------------------------------------------------===//
9
10
#include "InputSection.h"
11
#include "Config.h"
12
#include "EhFrame.h"
13
#include "InputFiles.h"
14
#include "LinkerScript.h"
15
#include "OutputSections.h"
16
#include "Relocations.h"
17
#include "Symbols.h"
18
#include "SyntheticSections.h"
19
#include "Target.h"
20
#include "Thunks.h"
21
#include "lld/Common/ErrorHandler.h"
22
#include "lld/Common/Memory.h"
23
#include "llvm/Object/Decompressor.h"
24
#include "llvm/Support/Compiler.h"
25
#include "llvm/Support/Compression.h"
26
#include "llvm/Support/Endian.h"
27
#include "llvm/Support/Threading.h"
28
#include "llvm/Support/xxhash.h"
29
#include <mutex>
30
31
using namespace llvm;
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using namespace llvm::ELF;
33
using namespace llvm::object;
34
using namespace llvm::support;
35
using namespace llvm::support::endian;
36
using namespace llvm::sys;
37
38
using namespace lld;
39
using namespace lld::elf;
40
41
std::vector<InputSectionBase *> elf::InputSections;
42
43
// Returns a string to construct an error message.
44
276
std::string lld::toString(const InputSectionBase *Sec) {
45
276
  return (toString(Sec->File) + ":(" + Sec->Name + ")").str();
46
276
}
47
48
template <class ELFT>
49
static ArrayRef<uint8_t> getSectionContents(ObjFile<ELFT> &File,
50
202k
                                            const typename ELFT::Shdr &Hdr) {
51
202k
  if (Hdr.sh_type == SHT_NOBITS)
52
369
    return makeArrayRef<uint8_t>(nullptr, Hdr.sh_size);
53
202k
  return check(File.getObj().getSectionContents(&Hdr));
54
202k
}
InputSection.cpp:llvm::ArrayRef<unsigned char> getSectionContents<llvm::object::ELFType<(llvm::support::endianness)1, false> >(lld::elf::ObjFile<llvm::object::ELFType<(llvm::support::endianness)1, false> >&, llvm::object::ELFType<(llvm::support::endianness)1, false>::Shdr const&)
Line
Count
Source
50
1.02k
                                            const typename ELFT::Shdr &Hdr) {
51
1.02k
  if (Hdr.sh_type == SHT_NOBITS)
52
48
    return makeArrayRef<uint8_t>(nullptr, Hdr.sh_size);
53
981
  return check(File.getObj().getSectionContents(&Hdr));
54
981
}
InputSection.cpp:llvm::ArrayRef<unsigned char> getSectionContents<llvm::object::ELFType<(llvm::support::endianness)0, false> >(lld::elf::ObjFile<llvm::object::ELFType<(llvm::support::endianness)0, false> >&, llvm::object::ELFType<(llvm::support::endianness)0, false>::Shdr const&)
Line
Count
Source
50
845
                                            const typename ELFT::Shdr &Hdr) {
51
845
  if (Hdr.sh_type == SHT_NOBITS)
52
155
    return makeArrayRef<uint8_t>(nullptr, Hdr.sh_size);
53
690
  return check(File.getObj().getSectionContents(&Hdr));
54
690
}
InputSection.cpp:llvm::ArrayRef<unsigned char> getSectionContents<llvm::object::ELFType<(llvm::support::endianness)1, true> >(lld::elf::ObjFile<llvm::object::ELFType<(llvm::support::endianness)1, true> >&, llvm::object::ELFType<(llvm::support::endianness)1, true>::Shdr const&)
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Count
Source
50
200k
                                            const typename ELFT::Shdr &Hdr) {
51
200k
  if (Hdr.sh_type == SHT_NOBITS)
52
120
    return makeArrayRef<uint8_t>(nullptr, Hdr.sh_size);
53
200k
  return check(File.getObj().getSectionContents(&Hdr));
54
200k
}
InputSection.cpp:llvm::ArrayRef<unsigned char> getSectionContents<llvm::object::ELFType<(llvm::support::endianness)0, true> >(lld::elf::ObjFile<llvm::object::ELFType<(llvm::support::endianness)0, true> >&, llvm::object::ELFType<(llvm::support::endianness)0, true>::Shdr const&)
Line
Count
Source
50
325
                                            const typename ELFT::Shdr &Hdr) {
51
325
  if (Hdr.sh_type == SHT_NOBITS)
52
46
    return makeArrayRef<uint8_t>(nullptr, Hdr.sh_size);
53
279
  return check(File.getObj().getSectionContents(&Hdr));
54
279
}
55
56
InputSectionBase::InputSectionBase(InputFile *File, uint64_t Flags,
57
                                   uint32_t Type, uint64_t Entsize,
58
                                   uint32_t Link, uint32_t Info,
59
                                   uint32_t Alignment, ArrayRef<uint8_t> Data,
60
                                   StringRef Name, Kind SectionKind)
61
    : SectionBase(SectionKind, Name, Flags, Entsize, Alignment, Type, Info,
62
                  Link),
63
250k
      File(File), Data(Data) {
64
250k
  // In order to reduce memory allocation, we assume that mergeable
65
250k
  // sections are smaller than 4 GiB, which is not an unreasonable
66
250k
  // assumption as of 2017.
67
250k
  if (SectionKind == SectionBase::Merge && 
Data.size() > UINT32_MAX2.17k
)
68
250k
    
error(toString(this) + ": section too large")0
;
69
250k
70
250k
  NumRelocations = 0;
71
250k
  AreRelocsRela = false;
72
250k
73
250k
  // The ELF spec states that a value of 0 means the section has
74
250k
  // no alignment constraits.
75
250k
  uint32_t V = std::max<uint64_t>(Alignment, 1);
76
250k
  if (!isPowerOf2_64(V))
77
0
    fatal(toString(File) + ": section sh_addralign is not a power of 2");
78
250k
  this->Alignment = V;
79
250k
}
80
81
// Drop SHF_GROUP bit unless we are producing a re-linkable object file.
82
// SHF_GROUP is a marker that a section belongs to some comdat group.
83
// That flag doesn't make sense in an executable.
84
202k
static uint64_t getFlags(uint64_t Flags) {
85
202k
  Flags &= ~(uint64_t)SHF_INFO_LINK;
86
202k
  if (!Config->Relocatable)
87
202k
    Flags &= ~(uint64_t)SHF_GROUP;
88
202k
  return Flags;
89
202k
}
90
91
// GNU assembler 2.24 and LLVM 4.0.0's MC (the newest release as of
92
// March 2017) fail to infer section types for sections starting with
93
// ".init_array." or ".fini_array.". They set SHT_PROGBITS instead of
94
// SHF_INIT_ARRAY. As a result, the following assembler directive
95
// creates ".init_array.100" with SHT_PROGBITS, for example.
96
//
97
//   .section .init_array.100, "aw"
98
//
99
// This function forces SHT_{INIT,FINI}_ARRAY so that we can handle
100
// incorrect inputs as if they were correct from the beginning.
101
202k
static uint64_t getType(uint64_t Type, StringRef Name) {
102
202k
  if (Type == SHT_PROGBITS && 
Name.startswith(".init_array.")201k
)
103
1
    return SHT_INIT_ARRAY;
104
202k
  if (Type == SHT_PROGBITS && 
Name.startswith(".fini_array.")201k
)
105
1
    return SHT_FINI_ARRAY;
106
202k
  return Type;
107
202k
}
108
109
template <class ELFT>
110
InputSectionBase::InputSectionBase(ObjFile<ELFT> &File,
111
                                   const typename ELFT::Shdr &Hdr,
112
                                   StringRef Name, Kind SectionKind)
113
    : InputSectionBase(&File, getFlags(Hdr.sh_flags),
114
                       getType(Hdr.sh_type, Name), Hdr.sh_entsize, Hdr.sh_link,
115
                       Hdr.sh_info, Hdr.sh_addralign,
116
202k
                       getSectionContents(File, Hdr), Name, SectionKind) {
117
202k
  // We reject object files having insanely large alignments even though
118
202k
  // they are allowed by the spec. I think 4GB is a reasonable limitation.
119
202k
  // We might want to relax this in the future.
120
202k
  if (Hdr.sh_addralign > UINT32_MAX)
121
202k
    
fatal(toString(&File) + ": section sh_addralign is too large")0
;
122
202k
}
lld::elf::InputSectionBase::InputSectionBase<llvm::object::ELFType<(llvm::support::endianness)1, false> >(lld::elf::ObjFile<llvm::object::ELFType<(llvm::support::endianness)1, false> >&, llvm::object::ELFType<(llvm::support::endianness)1, false>::Shdr const&, llvm::StringRef, lld::elf::SectionBase::Kind)
Line
Count
Source
116
1.02k
                       getSectionContents(File, Hdr), Name, SectionKind) {
117
1.02k
  // We reject object files having insanely large alignments even though
118
1.02k
  // they are allowed by the spec. I think 4GB is a reasonable limitation.
119
1.02k
  // We might want to relax this in the future.
120
1.02k
  if (Hdr.sh_addralign > UINT32_MAX)
121
1.02k
    
fatal(toString(&File) + ": section sh_addralign is too large")0
;
122
1.02k
}
lld::elf::InputSectionBase::InputSectionBase<llvm::object::ELFType<(llvm::support::endianness)0, false> >(lld::elf::ObjFile<llvm::object::ELFType<(llvm::support::endianness)0, false> >&, llvm::object::ELFType<(llvm::support::endianness)0, false>::Shdr const&, llvm::StringRef, lld::elf::SectionBase::Kind)
Line
Count
Source
116
845
                       getSectionContents(File, Hdr), Name, SectionKind) {
117
845
  // We reject object files having insanely large alignments even though
118
845
  // they are allowed by the spec. I think 4GB is a reasonable limitation.
119
845
  // We might want to relax this in the future.
120
845
  if (Hdr.sh_addralign > UINT32_MAX)
121
845
    
fatal(toString(&File) + ": section sh_addralign is too large")0
;
122
845
}
lld::elf::InputSectionBase::InputSectionBase<llvm::object::ELFType<(llvm::support::endianness)1, true> >(lld::elf::ObjFile<llvm::object::ELFType<(llvm::support::endianness)1, true> >&, llvm::object::ELFType<(llvm::support::endianness)1, true>::Shdr const&, llvm::StringRef, lld::elf::SectionBase::Kind)
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Count
Source
116
200k
                       getSectionContents(File, Hdr), Name, SectionKind) {
117
200k
  // We reject object files having insanely large alignments even though
118
200k
  // they are allowed by the spec. I think 4GB is a reasonable limitation.
119
200k
  // We might want to relax this in the future.
120
200k
  if (Hdr.sh_addralign > UINT32_MAX)
121
200k
    
fatal(toString(&File) + ": section sh_addralign is too large")0
;
122
200k
}
lld::elf::InputSectionBase::InputSectionBase<llvm::object::ELFType<(llvm::support::endianness)0, true> >(lld::elf::ObjFile<llvm::object::ELFType<(llvm::support::endianness)0, true> >&, llvm::object::ELFType<(llvm::support::endianness)0, true>::Shdr const&, llvm::StringRef, lld::elf::SectionBase::Kind)
Line
Count
Source
116
325
                       getSectionContents(File, Hdr), Name, SectionKind) {
117
325
  // We reject object files having insanely large alignments even though
118
325
  // they are allowed by the spec. I think 4GB is a reasonable limitation.
119
325
  // We might want to relax this in the future.
120
325
  if (Hdr.sh_addralign > UINT32_MAX)
121
325
    
fatal(toString(&File) + ": section sh_addralign is too large")0
;
122
325
}
123
124
454k
size_t InputSectionBase::getSize() const {
125
454k
  if (auto *S = dyn_cast<SyntheticSection>(this))
126
39.7k
    return S->getSize();
127
414k
128
414k
  return Data.size();
129
414k
}
130
131
72
uint64_t InputSectionBase::getOffsetInFile() const {
132
72
  const uint8_t *FileStart = (const uint8_t *)File->MB.getBufferStart();
133
72
  const uint8_t *SecStart = Data.begin();
134
72
  return SecStart - FileStart;
135
72
}
136
137
73.8k
uint64_t SectionBase::getOffset(uint64_t Offset) const {
138
73.8k
  switch (kind()) {
139
73.8k
  case Output: {
140
1.42k
    auto *OS = cast<OutputSection>(this);
141
1.42k
    // For output sections we treat offset -1 as the end of the section.
142
1.42k
    return Offset == uint64_t(-1) ? 
OS->Size72
:
Offset1.35k
;
143
73.8k
  }
144
73.8k
  case Regular:
145
72.3k
  case Synthetic:
146
72.3k
    return cast<InputSection>(this)->getOffset(Offset);
147
72.3k
  case EHFrame:
148
8
    // The file crtbeginT.o has relocations pointing to the start of an empty
149
8
    // .eh_frame that is known to be the first in the link. It does that to
150
8
    // identify the start of the output .eh_frame.
151
8
    return Offset;
152
72.3k
  case Merge:
153
117
    const MergeInputSection *MS = cast<MergeInputSection>(this);
154
117
    if (InputSection *IS = MS->getParent())
155
114
      return IS->getOffset(MS->getParentOffset(Offset));
156
3
    return MS->getParentOffset(Offset);
157
0
  }
158
0
  llvm_unreachable("invalid section kind");
159
0
}
160
161
73.3k
uint64_t SectionBase::getVA(uint64_t Offset) const {
162
73.3k
  const OutputSection *Out = getOutputSection();
163
73.3k
  return (Out ? 
Out->Addr73.2k
:
031
) + getOffset(Offset);
164
73.3k
}
165
166
105k
OutputSection *SectionBase::getOutputSection() {
167
105k
  InputSection *Sec;
168
105k
  if (auto *IS = dyn_cast<InputSection>(this))
169
103k
    Sec = IS;
170
2.29k
  else if (auto *MS = dyn_cast<MergeInputSection>(this))
171
146
    Sec = MS->getParent();
172
2.14k
  else if (auto *EH = dyn_cast<EhInputSection>(this))
173
135
    Sec = EH->getParent();
174
2.00k
  else
175
2.00k
    return cast<OutputSection>(this);
176
103k
  return Sec ? 
Sec->getParent()103k
:
nullptr3
;
177
103k
}
178
179
// Decompress section contents if required. Note that this function
180
// is called from parallelForEach, so it must be thread-safe.
181
203k
void InputSectionBase::maybeDecompress() {
182
203k
  if (DecompressBuf)
183
1
    return;
184
204k
  
if (203k
!(Flags & SHF_COMPRESSED)203k
&& !Name.startswith(".zdebug"))
185
204k
    return;
186
18.4E
187
18.4E
  // Decompress a section.
188
18.4E
  Decompressor Dec = check(Decompressor::create(Name, toStringRef(Data),
189
18.4E
                                                Config->IsLE, Config->Is64));
190
18.4E
191
18.4E
  size_t Size = Dec.getDecompressedSize();
192
18.4E
  DecompressBuf.reset(new char[Size + Name.size()]());
193
18.4E
  if (Error E = Dec.decompress({DecompressBuf.get(), Size}))
194
0
    fatal(toString(this) +
195
0
          ": decompress failed: " + llvm::toString(std::move(E)));
196
18.4E
197
18.4E
  Data = makeArrayRef((uint8_t *)DecompressBuf.get(), Size);
198
18.4E
  Flags &= ~(uint64_t)SHF_COMPRESSED;
199
18.4E
200
18.4E
  // A section name may have been altered if compressed. If that's
201
18.4E
  // the case, restore the original name. (i.e. ".zdebug_" -> ".debug_")
202
18.4E
  if (Name.startswith(".zdebug")) {
203
6
    DecompressBuf[Size] = '.';
204
6
    memcpy(&DecompressBuf[Size + 1], Name.data() + 2, Name.size() - 2);
205
6
    Name = StringRef(&DecompressBuf[Size], Name.size() - 1);
206
6
  }
207
18.4E
}
208
209
153
InputSection *InputSectionBase::getLinkOrderDep() const {
210
153
  assert(Link);
211
153
  assert(Flags & SHF_LINK_ORDER);
212
153
  return cast<InputSection>(File->getSections()[Link]);
213
153
}
214
215
// Returns a source location string. Used to construct an error message.
216
template <class ELFT>
217
1.84k
std::string InputSectionBase::getLocation(uint64_t Offset) {
218
1.84k
  // We don't have file for synthetic sections.
219
1.84k
  if (getFile<ELFT>() == nullptr)
220
1
    return (Config->OutputFile + ":(" + Name + "+0x" + utohexstr(Offset) + ")")
221
1
        .str();
222
1.84k
223
1.84k
  // First check if we can get desired values from debugging information.
224
1.84k
  std::string LineInfo = getFile<ELFT>()->getLineInfo(this, Offset);
225
1.84k
  if (!LineInfo.empty())
226
0
    return LineInfo;
227
1.84k
228
1.84k
  // File->SourceFile contains STT_FILE symbol that contains a
229
1.84k
  // source file name. If it's missing, we use an object file name.
230
1.84k
  std::string SrcFile = getFile<ELFT>()->SourceFile;
231
1.84k
  if (SrcFile.empty())
232
1.84k
    SrcFile = toString(File);
233
1.84k
234
1.84k
  // Find a function symbol that encloses a given location.
235
1.84k
  for (Symbol *B : File->getSymbols())
236
18.1M
    if (auto *D = dyn_cast<Defined>(B))
237
18.1M
      if (D->Section == this && 
D->Type == STT_FUNC18.1M
)
238
4
        if (D->Value <= Offset && Offset < D->Value + D->Size)
239
0
          return SrcFile + ":(function " + toString(*D) + ")";
240
1.84k
241
1.84k
  // If there's no symbol, print out the offset in the section.
242
1.84k
  return (SrcFile + ":(" + Name + "+0x" + utohexstr(Offset) + ")").str();
243
1.84k
}
std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char> > lld::elf::InputSectionBase::getLocation<llvm::object::ELFType<(llvm::support::endianness)1, false> >(unsigned long long)
Line
Count
Source
217
4
std::string InputSectionBase::getLocation(uint64_t Offset) {
218
4
  // We don't have file for synthetic sections.
219
4
  if (getFile<ELFT>() == nullptr)
220
0
    return (Config->OutputFile + ":(" + Name + "+0x" + utohexstr(Offset) + ")")
221
0
        .str();
222
4
223
4
  // First check if we can get desired values from debugging information.
224
4
  std::string LineInfo = getFile<ELFT>()->getLineInfo(this, Offset);
225
4
  if (!LineInfo.empty())
226
0
    return LineInfo;
227
4
228
4
  // File->SourceFile contains STT_FILE symbol that contains a
229
4
  // source file name. If it's missing, we use an object file name.
230
4
  std::string SrcFile = getFile<ELFT>()->SourceFile;
231
4
  if (SrcFile.empty())
232
4
    SrcFile = toString(File);
233
4
234
4
  // Find a function symbol that encloses a given location.
235
4
  for (Symbol *B : File->getSymbols())
236
9
    if (auto *D = dyn_cast<Defined>(B))
237
5
      if (D->Section == this && 
D->Type == STT_FUNC1
)
238
0
        if (D->Value <= Offset && Offset < D->Value + D->Size)
239
0
          return SrcFile + ":(function " + toString(*D) + ")";
240
4
241
4
  // If there's no symbol, print out the offset in the section.
242
4
  return (SrcFile + ":(" + Name + "+0x" + utohexstr(Offset) + ")").str();
243
4
}
std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char> > lld::elf::InputSectionBase::getLocation<llvm::object::ELFType<(llvm::support::endianness)0, false> >(unsigned long long)
Line
Count
Source
217
1
std::string InputSectionBase::getLocation(uint64_t Offset) {
218
1
  // We don't have file for synthetic sections.
219
1
  if (getFile<ELFT>() == nullptr)
220
0
    return (Config->OutputFile + ":(" + Name + "+0x" + utohexstr(Offset) + ")")
221
0
        .str();
222
1
223
1
  // First check if we can get desired values from debugging information.
224
1
  std::string LineInfo = getFile<ELFT>()->getLineInfo(this, Offset);
225
1
  if (!LineInfo.empty())
226
0
    return LineInfo;
227
1
228
1
  // File->SourceFile contains STT_FILE symbol that contains a
229
1
  // source file name. If it's missing, we use an object file name.
230
1
  std::string SrcFile = getFile<ELFT>()->SourceFile;
231
1
  if (SrcFile.empty())
232
1
    SrcFile = toString(File);
233
1
234
1
  // Find a function symbol that encloses a given location.
235
1
  for (Symbol *B : File->getSymbols())
236
3
    if (auto *D = dyn_cast<Defined>(B))
237
2
      if (D->Section == this && 
D->Type == STT_FUNC1
)
238
0
        if (D->Value <= Offset && Offset < D->Value + D->Size)
239
0
          return SrcFile + ":(function " + toString(*D) + ")";
240
1
241
1
  // If there's no symbol, print out the offset in the section.
242
1
  return (SrcFile + ":(" + Name + "+0x" + utohexstr(Offset) + ")").str();
243
1
}
std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char> > lld::elf::InputSectionBase::getLocation<llvm::object::ELFType<(llvm::support::endianness)1, true> >(unsigned long long)
Line
Count
Source
217
31
std::string InputSectionBase::getLocation(uint64_t Offset) {
218
31
  // We don't have file for synthetic sections.
219
31
  if (getFile<ELFT>() == nullptr)
220
1
    return (Config->OutputFile + ":(" + Name + "+0x" + utohexstr(Offset) + ")")
221
1
        .str();
222
30
223
30
  // First check if we can get desired values from debugging information.
224
30
  std::string LineInfo = getFile<ELFT>()->getLineInfo(this, Offset);
225
30
  if (!LineInfo.empty())
226
0
    return LineInfo;
227
30
228
30
  // File->SourceFile contains STT_FILE symbol that contains a
229
30
  // source file name. If it's missing, we use an object file name.
230
30
  std::string SrcFile = getFile<ELFT>()->SourceFile;
231
30
  if (SrcFile.empty())
232
30
    SrcFile = toString(File);
233
30
234
30
  // Find a function symbol that encloses a given location.
235
30
  for (Symbol *B : File->getSymbols())
236
114
    if (auto *D = dyn_cast<Defined>(B))
237
82
      if (D->Section == this && 
D->Type == STT_FUNC28
)
238
4
        if (D->Value <= Offset && Offset < D->Value + D->Size)
239
0
          return SrcFile + ":(function " + toString(*D) + ")";
240
30
241
30
  // If there's no symbol, print out the offset in the section.
242
30
  return (SrcFile + ":(" + Name + "+0x" + utohexstr(Offset) + ")").str();
243
30
}
std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char> > lld::elf::InputSectionBase::getLocation<llvm::object::ELFType<(llvm::support::endianness)0, true> >(unsigned long long)
Line
Count
Source
217
1.81k
std::string InputSectionBase::getLocation(uint64_t Offset) {
218
1.81k
  // We don't have file for synthetic sections.
219
1.81k
  if (getFile<ELFT>() == nullptr)
220
0
    return (Config->OutputFile + ":(" + Name + "+0x" + utohexstr(Offset) + ")")
221
0
        .str();
222
1.81k
223
1.81k
  // First check if we can get desired values from debugging information.
224
1.81k
  std::string LineInfo = getFile<ELFT>()->getLineInfo(this, Offset);
225
1.81k
  if (!LineInfo.empty())
226
0
    return LineInfo;
227
1.81k
228
1.81k
  // File->SourceFile contains STT_FILE symbol that contains a
229
1.81k
  // source file name. If it's missing, we use an object file name.
230
1.81k
  std::string SrcFile = getFile<ELFT>()->SourceFile;
231
1.81k
  if (SrcFile.empty())
232
1.81k
    SrcFile = toString(File);
233
1.81k
234
1.81k
  // Find a function symbol that encloses a given location.
235
1.81k
  for (Symbol *B : File->getSymbols())
236
18.1M
    if (auto *D = dyn_cast<Defined>(B))
237
18.1M
      if (D->Section == this && 
D->Type == STT_FUNC18.1M
)
238
0
        if (D->Value <= Offset && Offset < D->Value + D->Size)
239
0
          return SrcFile + ":(function " + toString(*D) + ")";
240
1.81k
241
1.81k
  // If there's no symbol, print out the offset in the section.
242
1.81k
  return (SrcFile + ":(" + Name + "+0x" + utohexstr(Offset) + ")").str();
243
1.81k
}
244
245
// This function is intended to be used for constructing an error message.
246
// The returned message looks like this:
247
//
248
//   foo.c:42 (/home/alice/possibly/very/long/path/foo.c:42)
249
//
250
//  Returns an empty string if there's no way to get line info.
251
178
std::string InputSectionBase::getSrcMsg(const Symbol &Sym, uint64_t Offset) {
252
178
  // Synthetic sections don't have input files.
253
178
  if (!File)
254
0
    return "";
255
178
  return File->getSrcMsg(Sym, *this, Offset);
256
178
}
257
258
// Returns a filename string along with an optional section name. This
259
// function is intended to be used for constructing an error
260
// message. The returned message looks like this:
261
//
262
//   path/to/foo.o:(function bar)
263
//
264
// or
265
//
266
//   path/to/foo.o:(function bar) in archive path/to/bar.a
267
178
std::string InputSectionBase::getObjMsg(uint64_t Off) {
268
178
  // Synthetic sections don't have input files.
269
178
  if (!File)
270
0
    return ("<internal>:(" + Name + "+0x" + utohexstr(Off) + ")").str();
271
178
  std::string Filename = File->getName();
272
178
273
178
  std::string Archive;
274
178
  if (!File->ArchiveName.empty())
275
5
    Archive = " in archive " + File->ArchiveName;
276
178
277
178
  // Find a symbol that encloses a given location.
278
178
  for (Symbol *B : File->getSymbols())
279
678
    if (auto *D = dyn_cast<Defined>(B))
280
322
      if (D->Section == this && 
D->Value <= Off179
&&
Off < D->Value + D->Size168
)
281
14
        return Filename + ":(" + toString(*D) + ")" + Archive;
282
178
283
178
  // If there's no symbol, print out the offset in the section.
284
178
  return (Filename + ":(" + Name + "+0x" + utohexstr(Off) + ")" + Archive)
285
164
      .str();
286
178
}
287
288
InputSection InputSection::Discarded(nullptr, 0, 0, 0, ArrayRef<uint8_t>(), "");
289
290
InputSection::InputSection(InputFile *F, uint64_t Flags, uint32_t Type,
291
                           uint32_t Alignment, ArrayRef<uint8_t> Data,
292
                           StringRef Name, Kind K)
293
    : InputSectionBase(F, Flags, Type,
294
                       /*Entsize*/ 0, /*Link*/ 0, /*Info*/ 0, Alignment, Data,
295
45.6k
                       Name, K) {}
296
297
template <class ELFT>
298
InputSection::InputSection(ObjFile<ELFT> &F, const typename ELFT::Shdr &Header,
299
                           StringRef Name)
300
202k
    : InputSectionBase(F, Header, Name, InputSectionBase::Regular) {}
lld::elf::InputSection::InputSection<llvm::object::ELFType<(llvm::support::endianness)1, false> >(lld::elf::ObjFile<llvm::object::ELFType<(llvm::support::endianness)1, false> >&, llvm::object::ELFType<(llvm::support::endianness)1, false>::Shdr const&, llvm::StringRef)
Line
Count
Source
300
1.02k
    : InputSectionBase(F, Header, Name, InputSectionBase::Regular) {}
lld::elf::InputSection::InputSection<llvm::object::ELFType<(llvm::support::endianness)0, false> >(lld::elf::ObjFile<llvm::object::ELFType<(llvm::support::endianness)0, false> >&, llvm::object::ELFType<(llvm::support::endianness)0, false>::Shdr const&, llvm::StringRef)
Line
Count
Source
300
843
    : InputSectionBase(F, Header, Name, InputSectionBase::Regular) {}
lld::elf::InputSection::InputSection<llvm::object::ELFType<(llvm::support::endianness)1, true> >(lld::elf::ObjFile<llvm::object::ELFType<(llvm::support::endianness)1, true> >&, llvm::object::ELFType<(llvm::support::endianness)1, true>::Shdr const&, llvm::StringRef)
Line
Count
Source
300
200k
    : InputSectionBase(F, Header, Name, InputSectionBase::Regular) {}
lld::elf::InputSection::InputSection<llvm::object::ELFType<(llvm::support::endianness)0, true> >(lld::elf::ObjFile<llvm::object::ELFType<(llvm::support::endianness)0, true> >&, llvm::object::ELFType<(llvm::support::endianness)0, true>::Shdr const&, llvm::StringRef)
Line
Count
Source
300
321
    : InputSectionBase(F, Header, Name, InputSectionBase::Regular) {}
301
302
986k
bool InputSection::classof(const SectionBase *S) {
303
986k
  return S->kind() == SectionBase::Regular ||
304
986k
         
S->kind() == SectionBase::Synthetic163k
;
305
986k
}
306
307
221k
OutputSection *InputSection::getParent() const {
308
221k
  return cast_or_null<OutputSection>(Parent);
309
221k
}
310
311
// Copy SHT_GROUP section contents. Used only for the -r option.
312
8
template <class ELFT> void InputSection::copyShtGroup(uint8_t *Buf) {
313
8
  // ELFT::Word is the 32-bit integral type in the target endianness.
314
8
  typedef typename ELFT::Word u32;
315
8
  ArrayRef<u32> From = getDataAs<u32>();
316
8
  auto *To = reinterpret_cast<u32 *>(Buf);
317
8
318
8
  // The first entry is not a section number but a flag.
319
8
  *To++ = From[0];
320
8
321
8
  // Adjust section numbers because section numbers in an input object
322
8
  // files are different in the output.
323
8
  ArrayRef<InputSectionBase *> Sections = File->getSections();
324
8
  for (uint32_t Idx : From.slice(1))
325
11
    *To++ = Sections[Idx]->getOutputSection()->SectionIndex;
326
8
}
Unexecuted instantiation: void lld::elf::InputSection::copyShtGroup<llvm::object::ELFType<(llvm::support::endianness)1, false> >(unsigned char*)
Unexecuted instantiation: void lld::elf::InputSection::copyShtGroup<llvm::object::ELFType<(llvm::support::endianness)0, false> >(unsigned char*)
void lld::elf::InputSection::copyShtGroup<llvm::object::ELFType<(llvm::support::endianness)1, true> >(unsigned char*)
Line
Count
Source
312
8
template <class ELFT> void InputSection::copyShtGroup(uint8_t *Buf) {
313
8
  // ELFT::Word is the 32-bit integral type in the target endianness.
314
8
  typedef typename ELFT::Word u32;
315
8
  ArrayRef<u32> From = getDataAs<u32>();
316
8
  auto *To = reinterpret_cast<u32 *>(Buf);
317
8
318
8
  // The first entry is not a section number but a flag.
319
8
  *To++ = From[0];
320
8
321
8
  // Adjust section numbers because section numbers in an input object
322
8
  // files are different in the output.
323
8
  ArrayRef<InputSectionBase *> Sections = File->getSections();
324
8
  for (uint32_t Idx : From.slice(1))
325
11
    *To++ = Sections[Idx]->getOutputSection()->SectionIndex;
326
8
}
Unexecuted instantiation: void lld::elf::InputSection::copyShtGroup<llvm::object::ELFType<(llvm::support::endianness)0, true> >(unsigned char*)
327
328
624k
InputSectionBase *InputSection::getRelocatedSection() const {
329
624k
  if (!File || 
(536k
Type != SHT_RELA536k
&&
Type != SHT_REL535k
))
330
623k
    return nullptr;
331
361
  ArrayRef<InputSectionBase *> Sections = File->getSections();
332
361
  return Sections[Info];
333
361
}
334
335
// This is used for -r and --emit-relocs. We can't use memcpy to copy
336
// relocations because we need to update symbol table offset and section index
337
// for each relocation. So we copy relocations one by one.
338
template <class ELFT, class RelTy>
339
86
void InputSection::copyRelocations(uint8_t *Buf, ArrayRef<RelTy> Rels) {
340
86
  InputSectionBase *Sec = getRelocatedSection();
341
86
342
129
  for (const RelTy &Rel : Rels) {
343
129
    RelType Type = Rel.getType(Config->IsMips64EL);
344
129
    Symbol &Sym = getFile<ELFT>()->getRelocTargetSym(Rel);
345
129
346
129
    auto *P = reinterpret_cast<typename ELFT::Rela *>(Buf);
347
129
    Buf += sizeof(RelTy);
348
129
349
129
    if (RelTy::IsRela)
350
100
      P->r_addend = getAddend<ELFT>(Rel);
351
129
352
129
    // Output section VA is zero for -r, so r_offset is an offset within the
353
129
    // section, but for --emit-relocs it is an virtual address.
354
129
    P->r_offset = Sec->getVA(Rel.r_offset);
355
129
    P->setSymbolAndType(InX::SymTab->getSymbolIndex(&Sym), Type,
356
129
                        Config->IsMips64EL);
357
129
358
129
    if (Sym.Type == STT_SECTION) {
359
67
      // We combine multiple section symbols into only one per
360
67
      // section. This means we have to update the addend. That is
361
67
      // trivial for Elf_Rela, but for Elf_Rel we have to write to the
362
67
      // section data. We do that by adding to the Relocation vector.
363
67
364
67
      // .eh_frame is horribly special and can reference discarded sections. To
365
67
      // avoid having to parse and recreate .eh_frame, we just replace any
366
67
      // relocation in it pointing to discarded sections with R_*_NONE, which
367
67
      // hopefully creates a frame that is ignored at runtime.
368
67
      auto *D = dyn_cast<Defined>(&Sym);
369
67
      if (!D) {
370
1
        error("STT_SECTION symbol should be defined");
371
1
        continue;
372
1
      }
373
66
      SectionBase *Section = D->Section;
374
66
      if (Section == &InputSection::Discarded) {
375
2
        P->setSymbolAndType(0, 0, false);
376
2
        continue;
377
2
      }
378
64
379
64
      int64_t Addend = getAddend<ELFT>(Rel);
380
64
      const uint8_t *BufLoc = Sec->Data.begin() + Rel.r_offset;
381
64
      if (!RelTy::IsRela)
382
22
        Addend = Target->getImplicitAddend(BufLoc, Type);
383
64
384
64
      if (Config->EMachine == EM_MIPS && 
Config->Relocatable11
&&
385
64
          
Target->getRelExpr(Type, Sym, BufLoc) == R_MIPS_GOTREL11
) {
386
7
        // Some MIPS relocations depend on "gp" value. By default,
387
7
        // this value has 0x7ff0 offset from a .got section. But
388
7
        // relocatable files produced by a complier or a linker
389
7
        // might redefine this default value and we must use it
390
7
        // for a calculation of the relocation result. When we
391
7
        // generate EXE or DSO it's trivial. Generating a relocatable
392
7
        // output is more difficult case because the linker does
393
7
        // not calculate relocations in this mode and loses
394
7
        // individual "gp" values used by each input object file.
395
7
        // As a workaround we add the "gp" value to the relocation
396
7
        // addend and save it back to the file.
397
7
        Addend += Sec->getFile<ELFT>()->MipsGp0;
398
7
      }
399
64
400
64
      if (RelTy::IsRela)
401
42
        P->r_addend = Sym.getVA(Addend) - Section->getOutputSection()->Addr;
402
22
      else if (Config->Relocatable)
403
22
        Sec->Relocations.push_back({R_ABS, Type, Rel.r_offset, Addend, &Sym});
404
64
    }
405
129
  }
406
86
}
Unexecuted instantiation: void lld::elf::InputSection::copyRelocations<llvm::object::ELFType<(llvm::support::endianness)1, false>, llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)1, false>, true> >(unsigned char*, llvm::ArrayRef<llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)1, false>, true> >)
void lld::elf::InputSection::copyRelocations<llvm::object::ELFType<(llvm::support::endianness)1, false>, llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)1, false>, false> >(unsigned char*, llvm::ArrayRef<llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)1, false>, false> >)
Line
Count
Source
339
13
void InputSection::copyRelocations(uint8_t *Buf, ArrayRef<RelTy> Rels) {
340
13
  InputSectionBase *Sec = getRelocatedSection();
341
13
342
19
  for (const RelTy &Rel : Rels) {
343
19
    RelType Type = Rel.getType(Config->IsMips64EL);
344
19
    Symbol &Sym = getFile<ELFT>()->getRelocTargetSym(Rel);
345
19
346
19
    auto *P = reinterpret_cast<typename ELFT::Rela *>(Buf);
347
19
    Buf += sizeof(RelTy);
348
19
349
19
    if (RelTy::IsRela)
350
0
      P->r_addend = getAddend<ELFT>(Rel);
351
19
352
19
    // Output section VA is zero for -r, so r_offset is an offset within the
353
19
    // section, but for --emit-relocs it is an virtual address.
354
19
    P->r_offset = Sec->getVA(Rel.r_offset);
355
19
    P->setSymbolAndType(InX::SymTab->getSymbolIndex(&Sym), Type,
356
19
                        Config->IsMips64EL);
357
19
358
19
    if (Sym.Type == STT_SECTION) {
359
13
      // We combine multiple section symbols into only one per
360
13
      // section. This means we have to update the addend. That is
361
13
      // trivial for Elf_Rela, but for Elf_Rel we have to write to the
362
13
      // section data. We do that by adding to the Relocation vector.
363
13
364
13
      // .eh_frame is horribly special and can reference discarded sections. To
365
13
      // avoid having to parse and recreate .eh_frame, we just replace any
366
13
      // relocation in it pointing to discarded sections with R_*_NONE, which
367
13
      // hopefully creates a frame that is ignored at runtime.
368
13
      auto *D = dyn_cast<Defined>(&Sym);
369
13
      if (!D) {
370
0
        error("STT_SECTION symbol should be defined");
371
0
        continue;
372
0
      }
373
13
      SectionBase *Section = D->Section;
374
13
      if (Section == &InputSection::Discarded) {
375
0
        P->setSymbolAndType(0, 0, false);
376
0
        continue;
377
0
      }
378
13
379
13
      int64_t Addend = getAddend<ELFT>(Rel);
380
13
      const uint8_t *BufLoc = Sec->Data.begin() + Rel.r_offset;
381
13
      if (!RelTy::IsRela)
382
13
        Addend = Target->getImplicitAddend(BufLoc, Type);
383
13
384
13
      if (Config->EMachine == EM_MIPS && 
Config->Relocatable0
&&
385
13
          
Target->getRelExpr(Type, Sym, BufLoc) == R_MIPS_GOTREL0
) {
386
0
        // Some MIPS relocations depend on "gp" value. By default,
387
0
        // this value has 0x7ff0 offset from a .got section. But
388
0
        // relocatable files produced by a complier or a linker
389
0
        // might redefine this default value and we must use it
390
0
        // for a calculation of the relocation result. When we
391
0
        // generate EXE or DSO it's trivial. Generating a relocatable
392
0
        // output is more difficult case because the linker does
393
0
        // not calculate relocations in this mode and loses
394
0
        // individual "gp" values used by each input object file.
395
0
        // As a workaround we add the "gp" value to the relocation
396
0
        // addend and save it back to the file.
397
0
        Addend += Sec->getFile<ELFT>()->MipsGp0;
398
0
      }
399
13
400
13
      if (RelTy::IsRela)
401
0
        P->r_addend = Sym.getVA(Addend) - Section->getOutputSection()->Addr;
402
13
      else if (Config->Relocatable)
403
13
        Sec->Relocations.push_back({R_ABS, Type, Rel.r_offset, Addend, &Sym});
404
13
    }
405
19
  }
406
13
}
Unexecuted instantiation: void lld::elf::InputSection::copyRelocations<llvm::object::ELFType<(llvm::support::endianness)0, false>, llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)0, false>, true> >(unsigned char*, llvm::ArrayRef<llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)0, false>, true> >)
void lld::elf::InputSection::copyRelocations<llvm::object::ELFType<(llvm::support::endianness)0, false>, llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)0, false>, false> >(unsigned char*, llvm::ArrayRef<llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)0, false>, false> >)
Line
Count
Source
339
8
void InputSection::copyRelocations(uint8_t *Buf, ArrayRef<RelTy> Rels) {
340
8
  InputSectionBase *Sec = getRelocatedSection();
341
8
342
12
  for (const RelTy &Rel : Rels) {
343
12
    RelType Type = Rel.getType(Config->IsMips64EL);
344
12
    Symbol &Sym = getFile<ELFT>()->getRelocTargetSym(Rel);
345
12
346
12
    auto *P = reinterpret_cast<typename ELFT::Rela *>(Buf);
347
12
    Buf += sizeof(RelTy);
348
12
349
12
    if (RelTy::IsRela)
350
0
      P->r_addend = getAddend<ELFT>(Rel);
351
12
352
12
    // Output section VA is zero for -r, so r_offset is an offset within the
353
12
    // section, but for --emit-relocs it is an virtual address.
354
12
    P->r_offset = Sec->getVA(Rel.r_offset);
355
12
    P->setSymbolAndType(InX::SymTab->getSymbolIndex(&Sym), Type,
356
12
                        Config->IsMips64EL);
357
12
358
12
    if (Sym.Type == STT_SECTION) {
359
9
      // We combine multiple section symbols into only one per
360
9
      // section. This means we have to update the addend. That is
361
9
      // trivial for Elf_Rela, but for Elf_Rel we have to write to the
362
9
      // section data. We do that by adding to the Relocation vector.
363
9
364
9
      // .eh_frame is horribly special and can reference discarded sections. To
365
9
      // avoid having to parse and recreate .eh_frame, we just replace any
366
9
      // relocation in it pointing to discarded sections with R_*_NONE, which
367
9
      // hopefully creates a frame that is ignored at runtime.
368
9
      auto *D = dyn_cast<Defined>(&Sym);
369
9
      if (!D) {
370
0
        error("STT_SECTION symbol should be defined");
371
0
        continue;
372
0
      }
373
9
      SectionBase *Section = D->Section;
374
9
      if (Section == &InputSection::Discarded) {
375
0
        P->setSymbolAndType(0, 0, false);
376
0
        continue;
377
0
      }
378
9
379
9
      int64_t Addend = getAddend<ELFT>(Rel);
380
9
      const uint8_t *BufLoc = Sec->Data.begin() + Rel.r_offset;
381
9
      if (!RelTy::IsRela)
382
9
        Addend = Target->getImplicitAddend(BufLoc, Type);
383
9
384
9
      if (Config->EMachine == EM_MIPS && Config->Relocatable &&
385
9
          Target->getRelExpr(Type, Sym, BufLoc) == R_MIPS_GOTREL) {
386
5
        // Some MIPS relocations depend on "gp" value. By default,
387
5
        // this value has 0x7ff0 offset from a .got section. But
388
5
        // relocatable files produced by a complier or a linker
389
5
        // might redefine this default value and we must use it
390
5
        // for a calculation of the relocation result. When we
391
5
        // generate EXE or DSO it's trivial. Generating a relocatable
392
5
        // output is more difficult case because the linker does
393
5
        // not calculate relocations in this mode and loses
394
5
        // individual "gp" values used by each input object file.
395
5
        // As a workaround we add the "gp" value to the relocation
396
5
        // addend and save it back to the file.
397
5
        Addend += Sec->getFile<ELFT>()->MipsGp0;
398
5
      }
399
9
400
9
      if (RelTy::IsRela)
401
0
        P->r_addend = Sym.getVA(Addend) - Section->getOutputSection()->Addr;
402
9
      else if (Config->Relocatable)
403
9
        Sec->Relocations.push_back({R_ABS, Type, Rel.r_offset, Addend, &Sym});
404
9
    }
405
12
  }
406
8
}
void lld::elf::InputSection::copyRelocations<llvm::object::ELFType<(llvm::support::endianness)1, true>, llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)1, true>, true> >(unsigned char*, llvm::ArrayRef<llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)1, true>, true> >)
Line
Count
Source
339
63
void InputSection::copyRelocations(uint8_t *Buf, ArrayRef<RelTy> Rels) {
340
63
  InputSectionBase *Sec = getRelocatedSection();
341
63
342
96
  for (const RelTy &Rel : Rels) {
343
96
    RelType Type = Rel.getType(Config->IsMips64EL);
344
96
    Symbol &Sym = getFile<ELFT>()->getRelocTargetSym(Rel);
345
96
346
96
    auto *P = reinterpret_cast<typename ELFT::Rela *>(Buf);
347
96
    Buf += sizeof(RelTy);
348
96
349
96
    if (RelTy::IsRela)
350
98
      P->r_addend = getAddend<ELFT>(Rel);
351
96
352
96
    // Output section VA is zero for -r, so r_offset is an offset within the
353
96
    // section, but for --emit-relocs it is an virtual address.
354
96
    P->r_offset = Sec->getVA(Rel.r_offset);
355
96
    P->setSymbolAndType(InX::SymTab->getSymbolIndex(&Sym), Type,
356
96
                        Config->IsMips64EL);
357
96
358
96
    if (Sym.Type == STT_SECTION) {
359
43
      // We combine multiple section symbols into only one per
360
43
      // section. This means we have to update the addend. That is
361
43
      // trivial for Elf_Rela, but for Elf_Rel we have to write to the
362
43
      // section data. We do that by adding to the Relocation vector.
363
43
364
43
      // .eh_frame is horribly special and can reference discarded sections. To
365
43
      // avoid having to parse and recreate .eh_frame, we just replace any
366
43
      // relocation in it pointing to discarded sections with R_*_NONE, which
367
43
      // hopefully creates a frame that is ignored at runtime.
368
43
      auto *D = dyn_cast<Defined>(&Sym);
369
43
      if (!D) {
370
1
        error("STT_SECTION symbol should be defined");
371
1
        continue;
372
1
      }
373
42
      SectionBase *Section = D->Section;
374
42
      if (Section == &InputSection::Discarded) {
375
2
        P->setSymbolAndType(0, 0, false);
376
2
        continue;
377
2
      }
378
40
379
40
      int64_t Addend = getAddend<ELFT>(Rel);
380
40
      const uint8_t *BufLoc = Sec->Data.begin() + Rel.r_offset;
381
40
      if (!RelTy::IsRela)
382
0
        Addend = Target->getImplicitAddend(BufLoc, Type);
383
40
384
40
      if (Config->EMachine == EM_MIPS && 
Config->Relocatable0
&&
385
40
          
Target->getRelExpr(Type, Sym, BufLoc) == R_MIPS_GOTREL0
) {
386
0
        // Some MIPS relocations depend on "gp" value. By default,
387
0
        // this value has 0x7ff0 offset from a .got section. But
388
0
        // relocatable files produced by a complier or a linker
389
0
        // might redefine this default value and we must use it
390
0
        // for a calculation of the relocation result. When we
391
0
        // generate EXE or DSO it's trivial. Generating a relocatable
392
0
        // output is more difficult case because the linker does
393
0
        // not calculate relocations in this mode and loses
394
0
        // individual "gp" values used by each input object file.
395
0
        // As a workaround we add the "gp" value to the relocation
396
0
        // addend and save it back to the file.
397
0
        Addend += Sec->getFile<ELFT>()->MipsGp0;
398
0
      }
399
40
400
40
      if (RelTy::IsRela)
401
40
        P->r_addend = Sym.getVA(Addend) - Section->getOutputSection()->Addr;
402
0
      else if (Config->Relocatable)
403
0
        Sec->Relocations.push_back({R_ABS, Type, Rel.r_offset, Addend, &Sym});
404
40
    }
405
96
  }
406
63
}
Unexecuted instantiation: void lld::elf::InputSection::copyRelocations<llvm::object::ELFType<(llvm::support::endianness)1, true>, llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)1, true>, false> >(unsigned char*, llvm::ArrayRef<llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)1, true>, false> >)
void lld::elf::InputSection::copyRelocations<llvm::object::ELFType<(llvm::support::endianness)0, true>, llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)0, true>, true> >(unsigned char*, llvm::ArrayRef<llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)0, true>, true> >)
Line
Count
Source
339
2
void InputSection::copyRelocations(uint8_t *Buf, ArrayRef<RelTy> Rels) {
340
2
  InputSectionBase *Sec = getRelocatedSection();
341
2
342
2
  for (const RelTy &Rel : Rels) {
343
2
    RelType Type = Rel.getType(Config->IsMips64EL);
344
2
    Symbol &Sym = getFile<ELFT>()->getRelocTargetSym(Rel);
345
2
346
2
    auto *P = reinterpret_cast<typename ELFT::Rela *>(Buf);
347
2
    Buf += sizeof(RelTy);
348
2
349
2
    if (RelTy::IsRela)
350
2
      P->r_addend = getAddend<ELFT>(Rel);
351
2
352
2
    // Output section VA is zero for -r, so r_offset is an offset within the
353
2
    // section, but for --emit-relocs it is an virtual address.
354
2
    P->r_offset = Sec->getVA(Rel.r_offset);
355
2
    P->setSymbolAndType(InX::SymTab->getSymbolIndex(&Sym), Type,
356
2
                        Config->IsMips64EL);
357
2
358
2
    if (Sym.Type == STT_SECTION) {
359
2
      // We combine multiple section symbols into only one per
360
2
      // section. This means we have to update the addend. That is
361
2
      // trivial for Elf_Rela, but for Elf_Rel we have to write to the
362
2
      // section data. We do that by adding to the Relocation vector.
363
2
364
2
      // .eh_frame is horribly special and can reference discarded sections. To
365
2
      // avoid having to parse and recreate .eh_frame, we just replace any
366
2
      // relocation in it pointing to discarded sections with R_*_NONE, which
367
2
      // hopefully creates a frame that is ignored at runtime.
368
2
      auto *D = dyn_cast<Defined>(&Sym);
369
2
      if (!D) {
370
0
        error("STT_SECTION symbol should be defined");
371
0
        continue;
372
0
      }
373
2
      SectionBase *Section = D->Section;
374
2
      if (Section == &InputSection::Discarded) {
375
0
        P->setSymbolAndType(0, 0, false);
376
0
        continue;
377
0
      }
378
2
379
2
      int64_t Addend = getAddend<ELFT>(Rel);
380
2
      const uint8_t *BufLoc = Sec->Data.begin() + Rel.r_offset;
381
2
      if (!RelTy::IsRela)
382
0
        Addend = Target->getImplicitAddend(BufLoc, Type);
383
2
384
2
      if (Config->EMachine == EM_MIPS && Config->Relocatable &&
385
2
          Target->getRelExpr(Type, Sym, BufLoc) == R_MIPS_GOTREL) {
386
2
        // Some MIPS relocations depend on "gp" value. By default,
387
2
        // this value has 0x7ff0 offset from a .got section. But
388
2
        // relocatable files produced by a complier or a linker
389
2
        // might redefine this default value and we must use it
390
2
        // for a calculation of the relocation result. When we
391
2
        // generate EXE or DSO it's trivial. Generating a relocatable
392
2
        // output is more difficult case because the linker does
393
2
        // not calculate relocations in this mode and loses
394
2
        // individual "gp" values used by each input object file.
395
2
        // As a workaround we add the "gp" value to the relocation
396
2
        // addend and save it back to the file.
397
2
        Addend += Sec->getFile<ELFT>()->MipsGp0;
398
2
      }
399
2
400
2
      if (RelTy::IsRela)
401
2
        P->r_addend = Sym.getVA(Addend) - Section->getOutputSection()->Addr;
402
0
      else if (Config->Relocatable)
403
0
        Sec->Relocations.push_back({R_ABS, Type, Rel.r_offset, Addend, &Sym});
404
2
    }
405
2
  }
406
2
}
Unexecuted instantiation: void lld::elf::InputSection::copyRelocations<llvm::object::ELFType<(llvm::support::endianness)0, true>, llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)0, true>, false> >(unsigned char*, llvm::ArrayRef<llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)0, true>, false> >)
407
408
// The ARM and AArch64 ABI handle pc-relative relocations to undefined weak
409
// references specially. The general rule is that the value of the symbol in
410
// this context is the address of the place P. A further special case is that
411
// branch relocations to an undefined weak reference resolve to the next
412
// instruction.
413
static uint32_t getARMUndefinedRelativeWeakVA(RelType Type, uint32_t A,
414
15
                                              uint32_t P) {
415
15
  switch (Type) {
416
15
  // Unresolved branch relocations to weak references resolve to next
417
15
  // instruction, this will be either 2 or 4 bytes on from P.
418
15
  case R_ARM_THM_JUMP11:
419
0
    return P + 2 + A;
420
15
  case R_ARM_CALL:
421
7
  case R_ARM_JUMP24:
422
7
  case R_ARM_PC24:
423
7
  case R_ARM_PLT32:
424
7
  case R_ARM_PREL31:
425
7
  case R_ARM_THM_JUMP19:
426
7
  case R_ARM_THM_JUMP24:
427
7
    return P + 4 + A;
428
7
  case R_ARM_THM_CALL:
429
3
    // We don't want an interworking BLX to ARM
430
3
    return P + 5 + A;
431
7
  // Unresolved non branch pc-relative relocations
432
7
  // R_ARM_TARGET2 which can be resolved relatively is not present as it never
433
7
  // targets a weak-reference.
434
7
  case R_ARM_MOVW_PREL_NC:
435
5
  case R_ARM_MOVT_PREL:
436
5
  case R_ARM_REL32:
437
5
  case R_ARM_THM_MOVW_PREL_NC:
438
5
  case R_ARM_THM_MOVT_PREL:
439
5
    return P + A;
440
0
  }
441
0
  llvm_unreachable("ARM pc-relative relocation expected\n");
442
0
}
443
444
// The comment above getARMUndefinedRelativeWeakVA applies to this function.
445
static uint64_t getAArch64UndefinedRelativeWeakVA(uint64_t Type, uint64_t A,
446
9
                                                  uint64_t P) {
447
9
  switch (Type) {
448
9
  // Unresolved branch relocations to weak references resolve to next
449
9
  // instruction, this is 4 bytes on from P.
450
9
  case R_AARCH64_CALL26:
451
4
  case R_AARCH64_CONDBR19:
452
4
  case R_AARCH64_JUMP26:
453
4
  case R_AARCH64_TSTBR14:
454
4
    return P + 4 + A;
455
4
  // Unresolved non branch pc-relative relocations
456
5
  case R_AARCH64_PREL16:
457
5
  case R_AARCH64_PREL32:
458
5
  case R_AARCH64_PREL64:
459
5
  case R_AARCH64_ADR_PREL_LO21:
460
5
  case R_AARCH64_LD_PREL_LO19:
461
5
    return P + A;
462
0
  }
463
0
  llvm_unreachable("AArch64 pc-relative relocation expected\n");
464
0
}
465
466
// ARM SBREL relocations are of the form S + A - B where B is the static base
467
// The ARM ABI defines base to be "addressing origin of the output segment
468
// defining the symbol S". We defined the "addressing origin"/static base to be
469
// the base of the PT_LOAD segment containing the Sym.
470
// The procedure call standard only defines a Read Write Position Independent
471
// RWPI variant so in practice we should expect the static base to be the base
472
// of the RW segment.
473
4
static uint64_t getARMStaticBase(const Symbol &Sym) {
474
4
  OutputSection *OS = Sym.getOutputSection();
475
4
  if (!OS || !OS->PtLoad || !OS->PtLoad->FirstSec)
476
0
    fatal("SBREL relocation to " + Sym.getName() + " without static base");
477
4
  return OS->PtLoad->FirstSec->Addr;
478
4
}
479
480
static uint64_t getRelocTargetVA(const InputFile *File, RelType Type, int64_t A,
481
12.6k
                                 uint64_t P, const Symbol &Sym, RelExpr Expr) {
482
12.6k
  switch (Expr) {
483
12.6k
  case R_INVALID:
484
2
    return 0;
485
12.6k
  case R_ABS:
486
688
  case R_RELAX_GOT_PC_NOPIC:
487
688
    return Sym.getVA(A);
488
688
  case R_ADDEND:
489
13
    return A;
490
688
  case R_ARM_SBREL:
491
4
    return Sym.getVA(A) - getARMStaticBase(Sym);
492
688
  case R_GOT:
493
74
  case R_RELAX_TLS_GD_TO_IE_ABS:
494
74
    return Sym.getGotVA() + A;
495
74
  case R_GOTONLY_PC:
496
0
    return InX::Got->getVA() + A - P;
497
74
  case R_GOTONLY_PC_FROM_END:
498
8
    return InX::Got->getVA() + A - P + InX::Got->getSize();
499
74
  case R_GOTREL:
500
31
    return Sym.getVA(A) - InX::Got->getVA();
501
74
  case R_GOTREL_FROM_END:
502
5
    return Sym.getVA(A) - InX::Got->getVA() - InX::Got->getSize();
503
74
  case R_GOT_FROM_END:
504
28
  case R_RELAX_TLS_GD_TO_IE_END:
505
28
    return Sym.getGotOffset() + A - InX::Got->getSize();
506
28
  case R_GOT_OFF:
507
13
    return Sym.getGotOffset() + A;
508
28
  case R_GOT_PAGE_PC:
509
8
  case R_RELAX_TLS_GD_TO_IE_PAGE_PC:
510
8
    return getAArch64Page(Sym.getGotVA() + A) - getAArch64Page(P);
511
99
  case R_GOT_PC:
512
99
  case R_RELAX_TLS_GD_TO_IE:
513
99
    return Sym.getGotVA() + A - P;
514
99
  case R_HINT:
515
0
  case R_NONE:
516
0
  case R_TLSDESC_CALL:
517
0
    llvm_unreachable("cannot relocate hint relocs");
518
19
  case R_MIPS_GOTREL:
519
19
    return Sym.getVA(A) - InX::MipsGot->getGp(File);
520
2
  case R_MIPS_GOT_GP:
521
2
    return InX::MipsGot->getGp(File) + A;
522
20
  case R_MIPS_GOT_GP_PC: {
523
20
    // R_MIPS_LO16 expression has R_MIPS_GOT_GP_PC type iif the target
524
20
    // is _gp_disp symbol. In that case we should use the following
525
20
    // formula for calculation "AHL + GP - P + 4". For details see p. 4-19 at
526
20
    // ftp://www.linux-mips.org/pub/linux/mips/doc/ABI/mipsabi.pdf
527
20
    // microMIPS variants of these relocations use slightly different
528
20
    // expressions: AHL + GP - P + 3 for %lo() and AHL + GP - P - 1 for %hi()
529
20
    // to correctly handle less-sugnificant bit of the microMIPS symbol.
530
20
    uint64_t V = InX::MipsGot->getGp(File) + A - P;
531
20
    if (Type == R_MIPS_LO16 || 
Type == R_MICROMIPS_LO1612
)
532
10
      V += 4;
533
20
    if (Type == R_MICROMIPS_LO16 || 
Type == R_MICROMIPS_HI1618
)
534
4
      V -= 1;
535
20
    return V;
536
0
  }
537
29
  case R_MIPS_GOT_LOCAL_PAGE:
538
29
    // If relocation against MIPS local symbol requires GOT entry, this entry
539
29
    // should be initialized by 'page address'. This address is high 16-bits
540
29
    // of sum the symbol's value and the addend.
541
29
    return InX::MipsGot->getVA() +
542
29
           InX::MipsGot->getPageEntryOffset(File, Sym, A) -
543
29
           InX::MipsGot->getGp(File);
544
10.0k
  case R_MIPS_GOT_OFF:
545
10.0k
  case R_MIPS_GOT_OFF32:
546
10.0k
    // In case of MIPS if a GOT relocation has non-zero addend this addend
547
10.0k
    // should be applied to the GOT entry content not to the GOT entry offset.
548
10.0k
    // That is why we use separate expression type.
549
10.0k
    return InX::MipsGot->getVA() +
550
10.0k
           InX::MipsGot->getSymEntryOffset(File, Sym, A) -
551
10.0k
           InX::MipsGot->getGp(File);
552
10.0k
  case R_MIPS_TLSGD:
553
12
    return InX::MipsGot->getVA() + InX::MipsGot->getGlobalDynOffset(File, Sym) -
554
12
           InX::MipsGot->getGp(File);
555
10.0k
  case R_MIPS_TLSLD:
556
6
    return InX::MipsGot->getVA() + InX::MipsGot->getTlsIndexOffset(File) -
557
6
           InX::MipsGot->getGp(File);
558
10.0k
  case R_PAGE_PC:
559
83
  case R_PLT_PAGE_PC: {
560
83
    uint64_t Dest;
561
83
    if (Sym.isUndefWeak())
562
1
      Dest = getAArch64Page(A);
563
82
    else
564
82
      Dest = getAArch64Page(Sym.getVA(A));
565
83
    return Dest - getAArch64Page(P);
566
83
  }
567
911
  case R_PC: {
568
911
    uint64_t Dest;
569
911
    if (Sym.isUndefWeak()) {
570
30
      // On ARM and AArch64 a branch to an undefined weak resolves to the
571
30
      // next instruction, otherwise the place.
572
30
      if (Config->EMachine == EM_ARM)
573
15
        Dest = getARMUndefinedRelativeWeakVA(Type, A, P);
574
15
      else if (Config->EMachine == EM_AARCH64)
575
9
        Dest = getAArch64UndefinedRelativeWeakVA(Type, A, P);
576
6
      else
577
6
        Dest = Sym.getVA(A);
578
881
    } else {
579
881
      Dest = Sym.getVA(A);
580
881
    }
581
911
    return Dest - P;
582
83
  }
583
83
  case R_PLT:
584
12
    return Sym.getPltVA() + A;
585
255
  case R_PLT_PC:
586
255
  case R_PPC_CALL_PLT:
587
255
    return Sym.getPltVA() + A - P;
588
255
  case R_PPC_CALL: {
589
42
    uint64_t SymVA = Sym.getVA(A);
590
42
    // If we have an undefined weak symbol, we might get here with a symbol
591
42
    // address of zero. That could overflow, but the code must be unreachable,
592
42
    // so don't bother doing anything at all.
593
42
    if (!SymVA)
594
2
      return 0;
595
40
596
40
    // PPC64 V2 ABI describes two entry points to a function. The global entry
597
40
    // point sets up the TOC base pointer. When calling a local function, the
598
40
    // call should branch to the local entry point rather than the global entry
599
40
    // point. Section 3.4.1 describes using the 3 most significant bits of the
600
40
    // st_other field to find out how many instructions there are between the
601
40
    // local and global entry point.
602
40
    uint8_t StOther = (Sym.StOther >> 5) & 7;
603
40
    if (StOther == 0 || 
StOther == 14
)
604
36
      return SymVA - P;
605
4
606
4
    return SymVA - P + (1LL << StOther);
607
4
  }
608
4
  case R_PPC_TOC:
609
0
    return getPPC64TocBase() + A;
610
23
  case R_RELAX_GOT_PC:
611
23
    return Sym.getVA(A) - P;
612
112
  case R_RELAX_TLS_GD_TO_LE:
613
112
  case R_RELAX_TLS_IE_TO_LE:
614
112
  case R_RELAX_TLS_LD_TO_LE:
615
112
  case R_TLS:
616
112
    // A weak undefined TLS symbol resolves to the base of the TLS
617
112
    // block, i.e. gets a value of zero. If we pass --gc-sections to
618
112
    // lld and .tbss is not referenced, it gets reclaimed and we don't
619
112
    // create a TLS program header. Therefore, we resolve this
620
112
    // statically to zero.
621
112
    if (Sym.isTls() && Sym.isUndefWeak())
622
3
      return 0;
623
109
624
109
    // For TLS variant 1 the TCB is a fixed size, whereas for TLS variant 2 the
625
109
    // TCB is on unspecified size and content. Targets that implement variant 1
626
109
    // should set TcbSize.
627
109
    if (Target->TcbSize) {
628
44
      // PPC64 V2 ABI has the thread pointer offset into the middle of the TLS
629
44
      // storage area by TlsTpOffset for efficient addressing TCB and up to
630
44
      // 4KB – 8 B of other thread library information (placed before the TCB).
631
44
      // Subtracting this offset will get the address of the first TLS block.
632
44
      if (Target->TlsTpOffset)
633
14
        return Sym.getVA(A) - Target->TlsTpOffset;
634
30
635
30
      // If thread pointer is not offset into the middle, the first thing in the
636
30
      // TLS storage area is the TCB. Add the TcbSize to get the address of the
637
30
      // first TLS block.
638
30
      return Sym.getVA(A) + alignTo(Target->TcbSize, Out::TlsPhdr->p_align);
639
30
    }
640
65
    return Sym.getVA(A) - Out::TlsPhdr->p_memsz;
641
65
  case R_RELAX_TLS_GD_TO_LE_NEG:
642
4
  case R_NEG_TLS:
643
4
    return Out::TlsPhdr->p_memsz - Sym.getVA(A);
644
24
  case R_SIZE:
645
24
    return Sym.getSize() + A;
646
8
  case R_TLSDESC:
647
8
    return InX::Got->getGlobalDynAddr(Sym) + A;
648
4
  case R_TLSDESC_PAGE:
649
4
    return getAArch64Page(InX::Got->getGlobalDynAddr(Sym) + A) -
650
4
           getAArch64Page(P);
651
8
  case R_TLSGD_GOT:
652
8
    return InX::Got->getGlobalDynOffset(Sym) + A;
653
4
  case R_TLSGD_GOT_FROM_END:
654
2
    return InX::Got->getGlobalDynOffset(Sym) + A - InX::Got->getSize();
655
19
  case R_TLSGD_PC:
656
19
    return InX::Got->getGlobalDynAddr(Sym) + A - P;
657
4
  case R_TLSLD_GOT_FROM_END:
658
2
    return InX::Got->getTlsIndexOff() + A - InX::Got->getSize();
659
20
  case R_TLSLD_GOT:
660
20
      return InX::Got->getTlsIndexOff() + A;
661
5
  case R_TLSLD_PC:
662
5
    return InX::Got->getTlsIndexVA() + A - P;
663
0
  }
664
0
  llvm_unreachable("Invalid expression");
665
0
}
666
667
// This function applies relocations to sections without SHF_ALLOC bit.
668
// Such sections are never mapped to memory at runtime. Debug sections are
669
// an example. Relocations in non-alloc sections are much easier to
670
// handle than in allocated sections because it will never need complex
671
// treatement such as GOT or PLT (because at runtime no one refers them).
672
// So, we handle relocations for non-alloc sections directly in this
673
// function as a performance optimization.
674
template <class ELFT, class RelTy>
675
130k
void InputSection::relocateNonAlloc(uint8_t *Buf, ArrayRef<RelTy> Rels) {
676
130k
  const unsigned Bits = sizeof(typename ELFT::uint) * 8;
677
130k
678
130k
  for (const RelTy &Rel : Rels) {
679
118
    RelType Type = Rel.getType(Config->IsMips64EL);
680
118
681
118
    // GCC 8.0 or earlier have a bug that they emit R_386_GOTPC relocations
682
118
    // against _GLOBAL_OFFSET_TABLE_ for .debug_info. The bug has been fixed
683
118
    // in 2017 (https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82630), but we
684
118
    // need to keep this bug-compatible code for a while.
685
118
    if (Config->EMachine == EM_386 && 
Type == R_386_GOTPC2
)
686
1
      continue;
687
117
688
117
    uint64_t Offset = getOffset(Rel.r_offset);
689
117
    uint8_t *BufLoc = Buf + Offset;
690
117
    int64_t Addend = getAddend<ELFT>(Rel);
691
117
    if (!RelTy::IsRela)
692
4
      Addend += Target->getImplicitAddend(BufLoc, Type);
693
117
694
117
    Symbol &Sym = getFile<ELFT>()->getRelocTargetSym(Rel);
695
117
    RelExpr Expr = Target->getRelExpr(Type, Sym, BufLoc);
696
117
    if (Expr == R_NONE)
697
1
      continue;
698
116
699
116
    if (Expr != R_ABS) {
700
3
      std::string Msg = getLocation<ELFT>(Offset) +
701
3
                        ": has non-ABS relocation " + toString(Type) +
702
3
                        " against symbol '" + toString(Sym) + "'";
703
3
      if (Expr != R_PC) {
704
1
        error(Msg);
705
1
        return;
706
1
      }
707
2
708
2
      // If the control reaches here, we found a PC-relative relocation in a
709
2
      // non-ALLOC section. Since non-ALLOC section is not loaded into memory
710
2
      // at runtime, the notion of PC-relative doesn't make sense here. So,
711
2
      // this is a usage error. However, GNU linkers historically accept such
712
2
      // relocations without any errors and relocate them as if they were at
713
2
      // address 0. For bug-compatibilty, we accept them with warnings. We
714
2
      // know Steel Bank Common Lisp as of 2018 have this bug.
715
2
      warn(Msg);
716
2
      Target->relocateOne(BufLoc, Type,
717
2
                          SignExtend64<Bits>(Sym.getVA(Addend - Offset)));
718
2
      continue;
719
2
    }
720
113
721
113
    if (Sym.isTls() && 
!Out::TlsPhdr5
)
722
1
      Target->relocateOne(BufLoc, Type, 0);
723
112
    else
724
112
      Target->relocateOne(BufLoc, Type, SignExtend64<Bits>(Sym.getVA(Addend)));
725
113
  }
726
130k
}
Unexecuted instantiation: void lld::elf::InputSection::relocateNonAlloc<llvm::object::ELFType<(llvm::support::endianness)1, false>, llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)1, false>, true> >(unsigned char*, llvm::ArrayRef<llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)1, false>, true> >)
void lld::elf::InputSection::relocateNonAlloc<llvm::object::ELFType<(llvm::support::endianness)1, false>, llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)1, false>, false> >(unsigned char*, llvm::ArrayRef<llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)1, false>, false> >)
Line
Count
Source
675
11
void InputSection::relocateNonAlloc(uint8_t *Buf, ArrayRef<RelTy> Rels) {
676
11
  const unsigned Bits = sizeof(typename ELFT::uint) * 8;
677
11
678
11
  for (const RelTy &Rel : Rels) {
679
2
    RelType Type = Rel.getType(Config->IsMips64EL);
680
2
681
2
    // GCC 8.0 or earlier have a bug that they emit R_386_GOTPC relocations
682
2
    // against _GLOBAL_OFFSET_TABLE_ for .debug_info. The bug has been fixed
683
2
    // in 2017 (https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82630), but we
684
2
    // need to keep this bug-compatible code for a while.
685
2
    if (Config->EMachine == EM_386 && Type == R_386_GOTPC)
686
1
      continue;
687
1
688
1
    uint64_t Offset = getOffset(Rel.r_offset);
689
1
    uint8_t *BufLoc = Buf + Offset;
690
1
    int64_t Addend = getAddend<ELFT>(Rel);
691
1
    if (!RelTy::IsRela)
692
1
      Addend += Target->getImplicitAddend(BufLoc, Type);
693
1
694
1
    Symbol &Sym = getFile<ELFT>()->getRelocTargetSym(Rel);
695
1
    RelExpr Expr = Target->getRelExpr(Type, Sym, BufLoc);
696
1
    if (Expr == R_NONE)
697
0
      continue;
698
1
699
1
    if (Expr != R_ABS) {
700
1
      std::string Msg = getLocation<ELFT>(Offset) +
701
1
                        ": has non-ABS relocation " + toString(Type) +
702
1
                        " against symbol '" + toString(Sym) + "'";
703
1
      if (Expr != R_PC) {
704
1
        error(Msg);
705
1
        return;
706
1
      }
707
0
708
0
      // If the control reaches here, we found a PC-relative relocation in a
709
0
      // non-ALLOC section. Since non-ALLOC section is not loaded into memory
710
0
      // at runtime, the notion of PC-relative doesn't make sense here. So,
711
0
      // this is a usage error. However, GNU linkers historically accept such
712
0
      // relocations without any errors and relocate them as if they were at
713
0
      // address 0. For bug-compatibilty, we accept them with warnings. We
714
0
      // know Steel Bank Common Lisp as of 2018 have this bug.
715
0
      warn(Msg);
716
0
      Target->relocateOne(BufLoc, Type,
717
0
                          SignExtend64<Bits>(Sym.getVA(Addend - Offset)));
718
0
      continue;
719
0
    }
720
0
721
0
    if (Sym.isTls() && !Out::TlsPhdr)
722
0
      Target->relocateOne(BufLoc, Type, 0);
723
0
    else
724
0
      Target->relocateOne(BufLoc, Type, SignExtend64<Bits>(Sym.getVA(Addend)));
725
0
  }
726
11
}
Unexecuted instantiation: void lld::elf::InputSection::relocateNonAlloc<llvm::object::ELFType<(llvm::support::endianness)0, false>, llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)0, false>, true> >(unsigned char*, llvm::ArrayRef<llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)0, false>, true> >)
void lld::elf::InputSection::relocateNonAlloc<llvm::object::ELFType<(llvm::support::endianness)0, false>, llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)0, false>, false> >(unsigned char*, llvm::ArrayRef<llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)0, false>, false> >)
Line
Count
Source
675
5
void InputSection::relocateNonAlloc(uint8_t *Buf, ArrayRef<RelTy> Rels) {
676
5
  const unsigned Bits = sizeof(typename ELFT::uint) * 8;
677
5
678
5
  for (const RelTy &Rel : Rels) {
679
3
    RelType Type = Rel.getType(Config->IsMips64EL);
680
3
681
3
    // GCC 8.0 or earlier have a bug that they emit R_386_GOTPC relocations
682
3
    // against _GLOBAL_OFFSET_TABLE_ for .debug_info. The bug has been fixed
683
3
    // in 2017 (https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82630), but we
684
3
    // need to keep this bug-compatible code for a while.
685
3
    if (Config->EMachine == EM_386 && 
Type == R_386_GOTPC0
)
686
0
      continue;
687
3
688
3
    uint64_t Offset = getOffset(Rel.r_offset);
689
3
    uint8_t *BufLoc = Buf + Offset;
690
3
    int64_t Addend = getAddend<ELFT>(Rel);
691
3
    if (!RelTy::IsRela)
692
3
      Addend += Target->getImplicitAddend(BufLoc, Type);
693
3
694
3
    Symbol &Sym = getFile<ELFT>()->getRelocTargetSym(Rel);
695
3
    RelExpr Expr = Target->getRelExpr(Type, Sym, BufLoc);
696
3
    if (Expr == R_NONE)
697
0
      continue;
698
3
699
3
    if (Expr != R_ABS) {
700
0
      std::string Msg = getLocation<ELFT>(Offset) +
701
0
                        ": has non-ABS relocation " + toString(Type) +
702
0
                        " against symbol '" + toString(Sym) + "'";
703
0
      if (Expr != R_PC) {
704
0
        error(Msg);
705
0
        return;
706
0
      }
707
0
708
0
      // If the control reaches here, we found a PC-relative relocation in a
709
0
      // non-ALLOC section. Since non-ALLOC section is not loaded into memory
710
0
      // at runtime, the notion of PC-relative doesn't make sense here. So,
711
0
      // this is a usage error. However, GNU linkers historically accept such
712
0
      // relocations without any errors and relocate them as if they were at
713
0
      // address 0. For bug-compatibilty, we accept them with warnings. We
714
0
      // know Steel Bank Common Lisp as of 2018 have this bug.
715
0
      warn(Msg);
716
0
      Target->relocateOne(BufLoc, Type,
717
0
                          SignExtend64<Bits>(Sym.getVA(Addend - Offset)));
718
0
      continue;
719
0
    }
720
3
721
3
    if (Sym.isTls() && 
!Out::TlsPhdr0
)
722
0
      Target->relocateOne(BufLoc, Type, 0);
723
3
    else
724
3
      Target->relocateOne(BufLoc, Type, SignExtend64<Bits>(Sym.getVA(Addend)));
725
3
  }
726
5
}
void lld::elf::InputSection::relocateNonAlloc<llvm::object::ELFType<(llvm::support::endianness)1, true>, llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)1, true>, true> >(unsigned char*, llvm::ArrayRef<llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)1, true>, true> >)
Line
Count
Source
675
43
void InputSection::relocateNonAlloc(uint8_t *Buf, ArrayRef<RelTy> Rels) {
676
43
  const unsigned Bits = sizeof(typename ELFT::uint) * 8;
677
43
678
111
  for (const RelTy &Rel : Rels) {
679
111
    RelType Type = Rel.getType(Config->IsMips64EL);
680
111
681
111
    // GCC 8.0 or earlier have a bug that they emit R_386_GOTPC relocations
682
111
    // against _GLOBAL_OFFSET_TABLE_ for .debug_info. The bug has been fixed
683
111
    // in 2017 (https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82630), but we
684
111
    // need to keep this bug-compatible code for a while.
685
111
    if (Config->EMachine == EM_386 && 
Type == R_386_GOTPC0
)
686
0
      continue;
687
111
688
111
    uint64_t Offset = getOffset(Rel.r_offset);
689
111
    uint8_t *BufLoc = Buf + Offset;
690
111
    int64_t Addend = getAddend<ELFT>(Rel);
691
111
    if (!RelTy::IsRela)
692
0
      Addend += Target->getImplicitAddend(BufLoc, Type);
693
111
694
111
    Symbol &Sym = getFile<ELFT>()->getRelocTargetSym(Rel);
695
111
    RelExpr Expr = Target->getRelExpr(Type, Sym, BufLoc);
696
111
    if (Expr == R_NONE)
697
1
      continue;
698
110
699
110
    if (Expr != R_ABS) {
700
2
      std::string Msg = getLocation<ELFT>(Offset) +
701
2
                        ": has non-ABS relocation " + toString(Type) +
702
2
                        " against symbol '" + toString(Sym) + "'";
703
2
      if (Expr != R_PC) {
704
0
        error(Msg);
705
0
        return;
706
0
      }
707
2
708
2
      // If the control reaches here, we found a PC-relative relocation in a
709
2
      // non-ALLOC section. Since non-ALLOC section is not loaded into memory
710
2
      // at runtime, the notion of PC-relative doesn't make sense here. So,
711
2
      // this is a usage error. However, GNU linkers historically accept such
712
2
      // relocations without any errors and relocate them as if they were at
713
2
      // address 0. For bug-compatibilty, we accept them with warnings. We
714
2
      // know Steel Bank Common Lisp as of 2018 have this bug.
715
2
      warn(Msg);
716
2
      Target->relocateOne(BufLoc, Type,
717
2
                          SignExtend64<Bits>(Sym.getVA(Addend - Offset)));
718
2
      continue;
719
2
    }
720
108
721
108
    if (Sym.isTls() && 
!Out::TlsPhdr4
)
722
1
      Target->relocateOne(BufLoc, Type, 0);
723
107
    else
724
107
      Target->relocateOne(BufLoc, Type, SignExtend64<Bits>(Sym.getVA(Addend)));
725
108
  }
726
43
}
void lld::elf::InputSection::relocateNonAlloc<llvm::object::ELFType<(llvm::support::endianness)1, true>, llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)1, true>, false> >(unsigned char*, llvm::ArrayRef<llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)1, true>, false> >)
Line
Count
Source
675
130k
void InputSection::relocateNonAlloc(uint8_t *Buf, ArrayRef<RelTy> Rels) {
676
130k
  const unsigned Bits = sizeof(typename ELFT::uint) * 8;
677
130k
678
130k
  for (const RelTy &Rel : Rels) {
679
0
    RelType Type = Rel.getType(Config->IsMips64EL);
680
0
681
0
    // GCC 8.0 or earlier have a bug that they emit R_386_GOTPC relocations
682
0
    // against _GLOBAL_OFFSET_TABLE_ for .debug_info. The bug has been fixed
683
0
    // in 2017 (https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82630), but we
684
0
    // need to keep this bug-compatible code for a while.
685
0
    if (Config->EMachine == EM_386 && Type == R_386_GOTPC)
686
0
      continue;
687
0
688
0
    uint64_t Offset = getOffset(Rel.r_offset);
689
0
    uint8_t *BufLoc = Buf + Offset;
690
0
    int64_t Addend = getAddend<ELFT>(Rel);
691
0
    if (!RelTy::IsRela)
692
0
      Addend += Target->getImplicitAddend(BufLoc, Type);
693
0
694
0
    Symbol &Sym = getFile<ELFT>()->getRelocTargetSym(Rel);
695
0
    RelExpr Expr = Target->getRelExpr(Type, Sym, BufLoc);
696
0
    if (Expr == R_NONE)
697
0
      continue;
698
0
699
0
    if (Expr != R_ABS) {
700
0
      std::string Msg = getLocation<ELFT>(Offset) +
701
0
                        ": has non-ABS relocation " + toString(Type) +
702
0
                        " against symbol '" + toString(Sym) + "'";
703
0
      if (Expr != R_PC) {
704
0
        error(Msg);
705
0
        return;
706
0
      }
707
0
708
0
      // If the control reaches here, we found a PC-relative relocation in a
709
0
      // non-ALLOC section. Since non-ALLOC section is not loaded into memory
710
0
      // at runtime, the notion of PC-relative doesn't make sense here. So,
711
0
      // this is a usage error. However, GNU linkers historically accept such
712
0
      // relocations without any errors and relocate them as if they were at
713
0
      // address 0. For bug-compatibilty, we accept them with warnings. We
714
0
      // know Steel Bank Common Lisp as of 2018 have this bug.
715
0
      warn(Msg);
716
0
      Target->relocateOne(BufLoc, Type,
717
0
                          SignExtend64<Bits>(Sym.getVA(Addend - Offset)));
718
0
      continue;
719
0
    }
720
0
721
0
    if (Sym.isTls() && !Out::TlsPhdr)
722
0
      Target->relocateOne(BufLoc, Type, 0);
723
0
    else
724
0
      Target->relocateOne(BufLoc, Type, SignExtend64<Bits>(Sym.getVA(Addend)));
725
0
  }
726
130k
}
void lld::elf::InputSection::relocateNonAlloc<llvm::object::ELFType<(llvm::support::endianness)0, true>, llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)0, true>, true> >(unsigned char*, llvm::ArrayRef<llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)0, true>, true> >)
Line
Count
Source
675
2
void InputSection::relocateNonAlloc(uint8_t *Buf, ArrayRef<RelTy> Rels) {
676
2
  const unsigned Bits = sizeof(typename ELFT::uint) * 8;
677
2
678
2
  for (const RelTy &Rel : Rels) {
679
2
    RelType Type = Rel.getType(Config->IsMips64EL);
680
2
681
2
    // GCC 8.0 or earlier have a bug that they emit R_386_GOTPC relocations
682
2
    // against _GLOBAL_OFFSET_TABLE_ for .debug_info. The bug has been fixed
683
2
    // in 2017 (https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82630), but we
684
2
    // need to keep this bug-compatible code for a while.
685
2
    if (Config->EMachine == EM_386 && 
Type == R_386_GOTPC0
)
686
0
      continue;
687
2
688
2
    uint64_t Offset = getOffset(Rel.r_offset);
689
2
    uint8_t *BufLoc = Buf + Offset;
690
2
    int64_t Addend = getAddend<ELFT>(Rel);
691
2
    if (!RelTy::IsRela)
692
0
      Addend += Target->getImplicitAddend(BufLoc, Type);
693
2
694
2
    Symbol &Sym = getFile<ELFT>()->getRelocTargetSym(Rel);
695
2
    RelExpr Expr = Target->getRelExpr(Type, Sym, BufLoc);
696
2
    if (Expr == R_NONE)
697
0
      continue;
698
2
699
2
    if (Expr != R_ABS) {
700
0
      std::string Msg = getLocation<ELFT>(Offset) +
701
0
                        ": has non-ABS relocation " + toString(Type) +
702
0
                        " against symbol '" + toString(Sym) + "'";
703
0
      if (Expr != R_PC) {
704
0
        error(Msg);
705
0
        return;
706
0
      }
707
0
708
0
      // If the control reaches here, we found a PC-relative relocation in a
709
0
      // non-ALLOC section. Since non-ALLOC section is not loaded into memory
710
0
      // at runtime, the notion of PC-relative doesn't make sense here. So,
711
0
      // this is a usage error. However, GNU linkers historically accept such
712
0
      // relocations without any errors and relocate them as if they were at
713
0
      // address 0. For bug-compatibilty, we accept them with warnings. We
714
0
      // know Steel Bank Common Lisp as of 2018 have this bug.
715
0
      warn(Msg);
716
0
      Target->relocateOne(BufLoc, Type,
717
0
                          SignExtend64<Bits>(Sym.getVA(Addend - Offset)));
718
0
      continue;
719
0
    }
720
2
721
2
    if (Sym.isTls() && 
!Out::TlsPhdr1
)
722
0
      Target->relocateOne(BufLoc, Type, 0);
723
2
    else
724
2
      Target->relocateOne(BufLoc, Type, SignExtend64<Bits>(Sym.getVA(Addend)));
725
2
  }
726
2
}
void lld::elf::InputSection::relocateNonAlloc<llvm::object::ELFType<(llvm::support::endianness)0, true>, llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)0, true>, false> >(unsigned char*, llvm::ArrayRef<llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)0, true>, false> >)
Line
Count
Source
675
4
void InputSection::relocateNonAlloc(uint8_t *Buf, ArrayRef<RelTy> Rels) {
676
4
  const unsigned Bits = sizeof(typename ELFT::uint) * 8;
677
4
678
4
  for (const RelTy &Rel : Rels) {
679
0
    RelType Type = Rel.getType(Config->IsMips64EL);
680
0
681
0
    // GCC 8.0 or earlier have a bug that they emit R_386_GOTPC relocations
682
0
    // against _GLOBAL_OFFSET_TABLE_ for .debug_info. The bug has been fixed
683
0
    // in 2017 (https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82630), but we
684
0
    // need to keep this bug-compatible code for a while.
685
0
    if (Config->EMachine == EM_386 && Type == R_386_GOTPC)
686
0
      continue;
687
0
688
0
    uint64_t Offset = getOffset(Rel.r_offset);
689
0
    uint8_t *BufLoc = Buf + Offset;
690
0
    int64_t Addend = getAddend<ELFT>(Rel);
691
0
    if (!RelTy::IsRela)
692
0
      Addend += Target->getImplicitAddend(BufLoc, Type);
693
0
694
0
    Symbol &Sym = getFile<ELFT>()->getRelocTargetSym(Rel);
695
0
    RelExpr Expr = Target->getRelExpr(Type, Sym, BufLoc);
696
0
    if (Expr == R_NONE)
697
0
      continue;
698
0
699
0
    if (Expr != R_ABS) {
700
0
      std::string Msg = getLocation<ELFT>(Offset) +
701
0
                        ": has non-ABS relocation " + toString(Type) +
702
0
                        " against symbol '" + toString(Sym) + "'";
703
0
      if (Expr != R_PC) {
704
0
        error(Msg);
705
0
        return;
706
0
      }
707
0
708
0
      // If the control reaches here, we found a PC-relative relocation in a
709
0
      // non-ALLOC section. Since non-ALLOC section is not loaded into memory
710
0
      // at runtime, the notion of PC-relative doesn't make sense here. So,
711
0
      // this is a usage error. However, GNU linkers historically accept such
712
0
      // relocations without any errors and relocate them as if they were at
713
0
      // address 0. For bug-compatibilty, we accept them with warnings. We
714
0
      // know Steel Bank Common Lisp as of 2018 have this bug.
715
0
      warn(Msg);
716
0
      Target->relocateOne(BufLoc, Type,
717
0
                          SignExtend64<Bits>(Sym.getVA(Addend - Offset)));
718
0
      continue;
719
0
    }
720
0
721
0
    if (Sym.isTls() && !Out::TlsPhdr)
722
0
      Target->relocateOne(BufLoc, Type, 0);
723
0
    else
724
0
      Target->relocateOne(BufLoc, Type, SignExtend64<Bits>(Sym.getVA(Addend)));
725
0
  }
726
4
}
727
728
template <class ELFT>
729
200k
void InputSectionBase::relocate(uint8_t *Buf, uint8_t *BufEnd) {
730
200k
  if (Flags & SHF_ALLOC) {
731
70.1k
    relocateAlloc(Buf, BufEnd);
732
70.1k
    return;
733
70.1k
  }
734
130k
735
130k
  auto *Sec = cast<InputSection>(this);
736
130k
  if (Sec->AreRelocsRela)
737
45
    Sec->relocateNonAlloc<ELFT>(Buf, Sec->template relas<ELFT>());
738
130k
  else
739
130k
    Sec->relocateNonAlloc<ELFT>(Buf, Sec->template rels<ELFT>());
740
130k
}
void lld::elf::InputSectionBase::relocate<llvm::object::ELFType<(llvm::support::endianness)1, false> >(unsigned char*, unsigned char*)
Line
Count
Source
729
876
void InputSectionBase::relocate(uint8_t *Buf, uint8_t *BufEnd) {
730
876
  if (Flags & SHF_ALLOC) {
731
867
    relocateAlloc(Buf, BufEnd);
732
867
    return;
733
867
  }
734
9
735
9
  auto *Sec = cast<InputSection>(this);
736
9
  if (Sec->AreRelocsRela)
737
0
    Sec->relocateNonAlloc<ELFT>(Buf, Sec->template relas<ELFT>());
738
9
  else
739
9
    Sec->relocateNonAlloc<ELFT>(Buf, Sec->template rels<ELFT>());
740
9
}
void lld::elf::InputSectionBase::relocate<llvm::object::ELFType<(llvm::support::endianness)0, false> >(unsigned char*, unsigned char*)
Line
Count
Source
729
355
void InputSectionBase::relocate(uint8_t *Buf, uint8_t *BufEnd) {
730
355
  if (Flags & SHF_ALLOC) {
731
350
    relocateAlloc(Buf, BufEnd);
732
350
    return;
733
350
  }
734
5
735
5
  auto *Sec = cast<InputSection>(this);
736
5
  if (Sec->AreRelocsRela)
737
0
    Sec->relocateNonAlloc<ELFT>(Buf, Sec->template relas<ELFT>());
738
5
  else
739
5
    Sec->relocateNonAlloc<ELFT>(Buf, Sec->template rels<ELFT>());
740
5
}
void lld::elf::InputSectionBase::relocate<llvm::object::ELFType<(llvm::support::endianness)1, true> >(unsigned char*, unsigned char*)
Line
Count
Source
729
199k
void InputSectionBase::relocate(uint8_t *Buf, uint8_t *BufEnd) {
730
199k
  if (Flags & SHF_ALLOC) {
731
68.7k
    relocateAlloc(Buf, BufEnd);
732
68.7k
    return;
733
68.7k
  }
734
130k
735
130k
  auto *Sec = cast<InputSection>(this);
736
130k
  if (Sec->AreRelocsRela)
737
43
    Sec->relocateNonAlloc<ELFT>(Buf, Sec->template relas<ELFT>());
738
130k
  else
739
130k
    Sec->relocateNonAlloc<ELFT>(Buf, Sec->template rels<ELFT>());
740
130k
}
void lld::elf::InputSectionBase::relocate<llvm::object::ELFType<(llvm::support::endianness)0, true> >(unsigned char*, unsigned char*)
Line
Count
Source
729
180
void InputSectionBase::relocate(uint8_t *Buf, uint8_t *BufEnd) {
730
180
  if (Flags & SHF_ALLOC) {
731
174
    relocateAlloc(Buf, BufEnd);
732
174
    return;
733
174
  }
734
6
735
6
  auto *Sec = cast<InputSection>(this);
736
6
  if (Sec->AreRelocsRela)
737
2
    Sec->relocateNonAlloc<ELFT>(Buf, Sec->template relas<ELFT>());
738
4
  else
739
4
    Sec->relocateNonAlloc<ELFT>(Buf, Sec->template rels<ELFT>());
740
6
}
741
742
70.3k
void InputSectionBase::relocateAlloc(uint8_t *Buf, uint8_t *BufEnd) {
743
70.3k
  assert(Flags & SHF_ALLOC);
744
70.3k
  const unsigned Bits = Config->Wordsize * 8;
745
70.3k
746
70.3k
  for (const Relocation &Rel : Relocations) {
747
12.6k
    uint64_t Offset = Rel.Offset;
748
12.6k
    if (auto *Sec = dyn_cast<InputSection>(this))
749
12.5k
      Offset += Sec->OutSecOff;
750
12.6k
    uint8_t *BufLoc = Buf + Offset;
751
12.6k
    RelType Type = Rel.Type;
752
12.6k
753
12.6k
    uint64_t AddrLoc = getOutputSection()->Addr + Offset;
754
12.6k
    RelExpr Expr = Rel.Expr;
755
12.6k
    uint64_t TargetVA = SignExtend64(
756
12.6k
        getRelocTargetVA(File, Type, Rel.Addend, AddrLoc, *Rel.Sym, Expr),
757
12.6k
        Bits);
758
12.6k
759
12.6k
    switch (Expr) {
760
12.6k
    case R_RELAX_GOT_PC:
761
32
    case R_RELAX_GOT_PC_NOPIC:
762
32
      Target->relaxGot(BufLoc, TargetVA);
763
32
      break;
764
48
    case R_RELAX_TLS_IE_TO_LE:
765
48
      Target->relaxTlsIeToLe(BufLoc, Type, TargetVA);
766
48
      break;
767
32
    case R_RELAX_TLS_LD_TO_LE:
768
12
      Target->relaxTlsLdToLe(BufLoc, Type, TargetVA);
769
12
      break;
770
32
    case R_RELAX_TLS_GD_TO_LE:
771
13
    case R_RELAX_TLS_GD_TO_LE_NEG:
772
13
      Target->relaxTlsGdToLe(BufLoc, Type, TargetVA);
773
13
      break;
774
13
    case R_RELAX_TLS_GD_TO_IE:
775
10
    case R_RELAX_TLS_GD_TO_IE_ABS:
776
10
    case R_RELAX_TLS_GD_TO_IE_PAGE_PC:
777
10
    case R_RELAX_TLS_GD_TO_IE_END:
778
10
      Target->relaxTlsGdToIe(BufLoc, Type, TargetVA);
779
10
      break;
780
42
    case R_PPC_CALL:
781
42
      // Patch a nop (0x60000000) to a ld.
782
42
      if (Rel.Sym->NeedsTocRestore) {
783
28
        if (BufLoc + 8 > BufEnd || 
read32(BufLoc + 4) != 0x6000000024
) {
784
4
          error(getErrorLocation(BufLoc) + "call lacks nop, can't restore toc");
785
4
          break;
786
4
        }
787
24
        write32(BufLoc + 4, 0xe8410018); // ld %r2, 24(%r1)
788
24
      }
789
42
      Target->relocateOne(BufLoc, Type, TargetVA);
790
38
      break;
791
12.5k
    default:
792
12.5k
      Target->relocateOne(BufLoc, Type, TargetVA);
793
12.5k
      break;
794
12.6k
    }
795
12.6k
  }
796
70.3k
}
797
798
215k
template <class ELFT> void InputSection::writeTo(uint8_t *Buf) {
799
215k
  if (Type == SHT_NOBITS)
800
1
    return;
801
215k
802
215k
  if (auto *S = dyn_cast<SyntheticSection>(this)) {
803
14.7k
    S->writeTo(Buf + OutSecOff);
804
14.7k
    return;
805
14.7k
  }
806
200k
807
200k
  // If -r or --emit-relocs is given, then an InputSection
808
200k
  // may be a relocation section.
809
200k
  if (Type == SHT_RELA) {
810
65
    copyRelocations<ELFT>(Buf + OutSecOff, getDataAs<typename ELFT::Rela>());
811
65
    return;
812
65
  }
813
200k
  if (Type == SHT_REL) {
814
21
    copyRelocations<ELFT>(Buf + OutSecOff, getDataAs<typename ELFT::Rel>());
815
21
    return;
816
21
  }
817
200k
818
200k
  // If -r is given, we may have a SHT_GROUP section.
819
200k
  if (Type == SHT_GROUP) {
820
8
    copyShtGroup<ELFT>(Buf + OutSecOff);
821
8
    return;
822
8
  }
823
200k
824
200k
  // Copy section contents from source object file to output file
825
200k
  // and then apply relocations.
826
200k
  memcpy(Buf + OutSecOff, Data.data(), Data.size());
827
200k
  uint8_t *BufEnd = Buf + OutSecOff + Data.size();
828
200k
  relocate<ELFT>(Buf, BufEnd);
829
200k
}
void lld::elf::InputSection::writeTo<llvm::object::ELFType<(llvm::support::endianness)1, false> >(unsigned char*)
Line
Count
Source
798
2.85k
template <class ELFT> void InputSection::writeTo(uint8_t *Buf) {
799
2.85k
  if (Type == SHT_NOBITS)
800
0
    return;
801
2.85k
802
2.85k
  if (auto *S = dyn_cast<SyntheticSection>(this)) {
803
1.96k
    S->writeTo(Buf + OutSecOff);
804
1.96k
    return;
805
1.96k
  }
806
890
807
890
  // If -r or --emit-relocs is given, then an InputSection
808
890
  // may be a relocation section.
809
890
  if (Type == SHT_RELA) {
810
0
    copyRelocations<ELFT>(Buf + OutSecOff, getDataAs<typename ELFT::Rela>());
811
0
    return;
812
0
  }
813
890
  if (Type == SHT_REL) {
814
13
    copyRelocations<ELFT>(Buf + OutSecOff, getDataAs<typename ELFT::Rel>());
815
13
    return;
816
13
  }
817
877
818
877
  // If -r is given, we may have a SHT_GROUP section.
819
877
  if (Type == SHT_GROUP) {
820
0
    copyShtGroup<ELFT>(Buf + OutSecOff);
821
0
    return;
822
0
  }
823
877
824
877
  // Copy section contents from source object file to output file
825
877
  // and then apply relocations.
826
877
  memcpy(Buf + OutSecOff, Data.data(), Data.size());
827
877
  uint8_t *BufEnd = Buf + OutSecOff + Data.size();
828
877
  relocate<ELFT>(Buf, BufEnd);
829
877
}
void lld::elf::InputSection::writeTo<llvm::object::ELFType<(llvm::support::endianness)0, false> >(unsigned char*)
Line
Count
Source
798
1.52k
template <class ELFT> void InputSection::writeTo(uint8_t *Buf) {
799
1.52k
  if (Type == SHT_NOBITS)
800
0
    return;
801
1.52k
802
1.52k
  if (auto *S = dyn_cast<SyntheticSection>(this)) {
803
1.15k
    S->writeTo(Buf + OutSecOff);
804
1.15k
    return;
805
1.15k
  }
806
363
807
363
  // If -r or --emit-relocs is given, then an InputSection
808
363
  // may be a relocation section.
809
363
  if (Type == SHT_RELA) {
810
0
    copyRelocations<ELFT>(Buf + OutSecOff, getDataAs<typename ELFT::Rela>());
811
0
    return;
812
0
  }
813
363
  if (Type == SHT_REL) {
814
8
    copyRelocations<ELFT>(Buf + OutSecOff, getDataAs<typename ELFT::Rel>());
815
8
    return;
816
8
  }
817
355
818
355
  // If -r is given, we may have a SHT_GROUP section.
819
355
  if (Type == SHT_GROUP) {
820
0
    copyShtGroup<ELFT>(Buf + OutSecOff);
821
0
    return;
822
0
  }
823
355
824
355
  // Copy section contents from source object file to output file
825
355
  // and then apply relocations.
826
355
  memcpy(Buf + OutSecOff, Data.data(), Data.size());
827
355
  uint8_t *BufEnd = Buf + OutSecOff + Data.size();
828
355
  relocate<ELFT>(Buf, BufEnd);
829
355
}
void lld::elf::InputSection::writeTo<llvm::object::ELFType<(llvm::support::endianness)1, true> >(unsigned char*)
Line
Count
Source
798
210k
template <class ELFT> void InputSection::writeTo(uint8_t *Buf) {
799
210k
  if (Type == SHT_NOBITS)
800
1
    return;
801
210k
802
210k
  if (auto *S = dyn_cast<SyntheticSection>(this)) {
803
10.9k
    S->writeTo(Buf + OutSecOff);
804
10.9k
    return;
805
10.9k
  }
806
199k
807
199k
  // If -r or --emit-relocs is given, then an InputSection
808
199k
  // may be a relocation section.
809
199k
  if (Type == SHT_RELA) {
810
63
    copyRelocations<ELFT>(Buf + OutSecOff, getDataAs<typename ELFT::Rela>());
811
63
    return;
812
63
  }
813
199k
  if (Type == SHT_REL) {
814
0
    copyRelocations<ELFT>(Buf + OutSecOff, getDataAs<typename ELFT::Rel>());
815
0
    return;
816
0
  }
817
199k
818
199k
  // If -r is given, we may have a SHT_GROUP section.
819
199k
  if (Type == SHT_GROUP) {
820
8
    copyShtGroup<ELFT>(Buf + OutSecOff);
821
8
    return;
822
8
  }
823
199k
824
199k
  // Copy section contents from source object file to output file
825
199k
  // and then apply relocations.
826
199k
  memcpy(Buf + OutSecOff, Data.data(), Data.size());
827
199k
  uint8_t *BufEnd = Buf + OutSecOff + Data.size();
828
199k
  relocate<ELFT>(Buf, BufEnd);
829
199k
}
void lld::elf::InputSection::writeTo<llvm::object::ELFType<(llvm::support::endianness)0, true> >(unsigned char*)
Line
Count
Source
798
864
template <class ELFT> void InputSection::writeTo(uint8_t *Buf) {
799
864
  if (Type == SHT_NOBITS)
800
0
    return;
801
864
802
864
  if (auto *S = dyn_cast<SyntheticSection>(this)) {
803
682
    S->writeTo(Buf + OutSecOff);
804
682
    return;
805
682
  }
806
182
807
182
  // If -r or --emit-relocs is given, then an InputSection
808
182
  // may be a relocation section.
809
182
  if (Type == SHT_RELA) {
810
2
    copyRelocations<ELFT>(Buf + OutSecOff, getDataAs<typename ELFT::Rela>());
811
2
    return;
812
2
  }
813
180
  if (Type == SHT_REL) {
814
0
    copyRelocations<ELFT>(Buf + OutSecOff, getDataAs<typename ELFT::Rel>());
815
0
    return;
816
0
  }
817
180
818
180
  // If -r is given, we may have a SHT_GROUP section.
819
180
  if (Type == SHT_GROUP) {
820
0
    copyShtGroup<ELFT>(Buf + OutSecOff);
821
0
    return;
822
0
  }
823
180
824
180
  // Copy section contents from source object file to output file
825
180
  // and then apply relocations.
826
180
  memcpy(Buf + OutSecOff, Data.data(), Data.size());
827
180
  uint8_t *BufEnd = Buf + OutSecOff + Data.size();
828
180
  relocate<ELFT>(Buf, BufEnd);
829
180
}
830
831
52
void InputSection::replace(InputSection *Other) {
832
52
  Alignment = std::max(Alignment, Other->Alignment);
833
52
  Other->Repl = Repl;
834
52
  Other->Live = false;
835
52
}
836
837
template <class ELFT>
838
EhInputSection::EhInputSection(ObjFile<ELFT> &F,
839
                               const typename ELFT::Shdr &Header,
840
                               StringRef Name)
841
97
    : InputSectionBase(F, Header, Name, InputSectionBase::EHFrame) {}
lld::elf::EhInputSection::EhInputSection<llvm::object::ELFType<(llvm::support::endianness)1, false> >(lld::elf::ObjFile<llvm::object::ELFType<(llvm::support::endianness)1, false> >&, llvm::object::ELFType<(llvm::support::endianness)1, false>::Shdr const&, llvm::StringRef)
Line
Count
Source
841
4
    : InputSectionBase(F, Header, Name, InputSectionBase::EHFrame) {}
lld::elf::EhInputSection::EhInputSection<llvm::object::ELFType<(llvm::support::endianness)0, false> >(lld::elf::ObjFile<llvm::object::ELFType<(llvm::support::endianness)0, false> >&, llvm::object::ELFType<(llvm::support::endianness)0, false>::Shdr const&, llvm::StringRef)
Line
Count
Source
841
1
    : InputSectionBase(F, Header, Name, InputSectionBase::EHFrame) {}
lld::elf::EhInputSection::EhInputSection<llvm::object::ELFType<(llvm::support::endianness)1, true> >(lld::elf::ObjFile<llvm::object::ELFType<(llvm::support::endianness)1, true> >&, llvm::object::ELFType<(llvm::support::endianness)1, true>::Shdr const&, llvm::StringRef)
Line
Count
Source
841
88
    : InputSectionBase(F, Header, Name, InputSectionBase::EHFrame) {}
lld::elf::EhInputSection::EhInputSection<llvm::object::ELFType<(llvm::support::endianness)0, true> >(lld::elf::ObjFile<llvm::object::ELFType<(llvm::support::endianness)0, true> >&, llvm::object::ELFType<(llvm::support::endianness)0, true>::Shdr const&, llvm::StringRef)
Line
Count
Source
841
4
    : InputSectionBase(F, Header, Name, InputSectionBase::EHFrame) {}
842
843
135
SyntheticSection *EhInputSection::getParent() const {
844
135
  return cast_or_null<SyntheticSection>(Parent);
845
135
}
846
847
// Returns the index of the first relocation that points to a region between
848
// Begin and Begin+Size.
849
template <class IntTy, class RelTy>
850
static unsigned getReloc(IntTy Begin, IntTy Size, const ArrayRef<RelTy> &Rels,
851
217
                         unsigned &RelocI) {
852
217
  // Start search from RelocI for fast access. That works because the
853
217
  // relocations are sorted in .eh_frame.
854
261
  for (unsigned N = Rels.size(); RelocI < N; 
++RelocI44
) {
855
253
    const RelTy &Rel = Rels[RelocI];
856
253
    if (Rel.r_offset < Begin)
857
44
      continue;
858
209
859
209
    if (Rel.r_offset < Begin + Size)
860
131
      return RelocI;
861
78
    return -1;
862
78
  }
863
217
  
return -18
;
864
217
}
Unexecuted instantiation: InputSection.cpp:unsigned int getReloc<unsigned long, llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)1, false>, true> >(unsigned long, unsigned long, llvm::ArrayRef<llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)1, false>, true> > const&, unsigned int&)
InputSection.cpp:unsigned int getReloc<unsigned long, llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)1, false>, false> >(unsigned long, unsigned long, llvm::ArrayRef<llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)1, false>, false> > const&, unsigned int&)
Line
Count
Source
851
8
                         unsigned &RelocI) {
852
8
  // Start search from RelocI for fast access. That works because the
853
8
  // relocations are sorted in .eh_frame.
854
10
  for (unsigned N = Rels.size(); RelocI < N; 
++RelocI2
) {
855
10
    const RelTy &Rel = Rels[RelocI];
856
10
    if (Rel.r_offset < Begin)
857
2
      continue;
858
8
859
8
    if (Rel.r_offset < Begin + Size)
860
6
      return RelocI;
861
2
    return -1;
862
2
  }
863
8
  
return -10
;
864
8
}
Unexecuted instantiation: InputSection.cpp:unsigned int getReloc<unsigned long, llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)0, false>, true> >(unsigned long, unsigned long, llvm::ArrayRef<llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)0, false>, true> > const&, unsigned int&)
InputSection.cpp:unsigned int getReloc<unsigned long, llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)0, false>, false> >(unsigned long, unsigned long, llvm::ArrayRef<llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)0, false>, false> > const&, unsigned int&)
Line
Count
Source
851
2
                         unsigned &RelocI) {
852
2
  // Start search from RelocI for fast access. That works because the
853
2
  // relocations are sorted in .eh_frame.
854
2
  for (unsigned N = Rels.size(); RelocI < N; 
++RelocI0
) {
855
2
    const RelTy &Rel = Rels[RelocI];
856
2
    if (Rel.r_offset < Begin)
857
0
      continue;
858
2
859
2
    if (Rel.r_offset < Begin + Size)
860
1
      return RelocI;
861
1
    return -1;
862
1
  }
863
2
  
return -10
;
864
2
}
InputSection.cpp:unsigned int getReloc<unsigned long, llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)1, true>, true> >(unsigned long, unsigned long, llvm::ArrayRef<llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)1, true>, true> > const&, unsigned int&)
Line
Count
Source
851
193
                         unsigned &RelocI) {
852
193
  // Start search from RelocI for fast access. That works because the
853
193
  // relocations are sorted in .eh_frame.
854
234
  for (unsigned N = Rels.size(); RelocI < N; 
++RelocI41
) {
855
234
    const RelTy &Rel = Rels[RelocI];
856
234
    if (Rel.r_offset < Begin)
857
41
      continue;
858
193
859
193
    if (Rel.r_offset < Begin + Size)
860
120
      return RelocI;
861
73
    return -1;
862
73
  }
863
193
  
return -10
;
864
193
}
InputSection.cpp:unsigned int getReloc<unsigned long, llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)1, true>, false> >(unsigned long, unsigned long, llvm::ArrayRef<llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)1, true>, false> > const&, unsigned int&)
Line
Count
Source
851
7
                         unsigned &RelocI) {
852
7
  // Start search from RelocI for fast access. That works because the
853
7
  // relocations are sorted in .eh_frame.
854
7
  for (unsigned N = Rels.size(); RelocI < N; 
++RelocI0
) {
855
0
    const RelTy &Rel = Rels[RelocI];
856
0
    if (Rel.r_offset < Begin)
857
0
      continue;
858
0
859
0
    if (Rel.r_offset < Begin + Size)
860
0
      return RelocI;
861
0
    return -1;
862
0
  }
863
7
  return -1;
864
7
}
InputSection.cpp:unsigned int getReloc<unsigned long, llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)0, true>, true> >(unsigned long, unsigned long, llvm::ArrayRef<llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)0, true>, true> > const&, unsigned int&)
Line
Count
Source
851
6
                         unsigned &RelocI) {
852
6
  // Start search from RelocI for fast access. That works because the
853
6
  // relocations are sorted in .eh_frame.
854
7
  for (unsigned N = Rels.size(); RelocI < N; 
++RelocI1
) {
855
7
    const RelTy &Rel = Rels[RelocI];
856
7
    if (Rel.r_offset < Begin)
857
1
      continue;
858
6
859
6
    if (Rel.r_offset < Begin + Size)
860
4
      return RelocI;
861
2
    return -1;
862
2
  }
863
6
  
return -10
;
864
6
}
InputSection.cpp:unsigned int getReloc<unsigned long, llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)0, true>, false> >(unsigned long, unsigned long, llvm::ArrayRef<llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)0, true>, false> > const&, unsigned int&)
Line
Count
Source
851
1
                         unsigned &RelocI) {
852
1
  // Start search from RelocI for fast access. That works because the
853
1
  // relocations are sorted in .eh_frame.
854
1
  for (unsigned N = Rels.size(); RelocI < N; 
++RelocI0
) {
855
0
    const RelTy &Rel = Rels[RelocI];
856
0
    if (Rel.r_offset < Begin)
857
0
      continue;
858
0
859
0
    if (Rel.r_offset < Begin + Size)
860
0
      return RelocI;
861
0
    return -1;
862
0
  }
863
1
  return -1;
864
1
}
865
866
// .eh_frame is a sequence of CIE or FDE records.
867
// This function splits an input section into records and returns them.
868
97
template <class ELFT> void EhInputSection::split() {
869
97
  if (AreRelocsRela)
870
82
    split<ELFT>(relas<ELFT>());
871
15
  else
872
15
    split<ELFT>(rels<ELFT>());
873
97
}
void lld::elf::EhInputSection::split<llvm::object::ELFType<(llvm::support::endianness)1, false> >()
Line
Count
Source
868
4
template <class ELFT> void EhInputSection::split() {
869
4
  if (AreRelocsRela)
870
0
    split<ELFT>(relas<ELFT>());
871
4
  else
872
4
    split<ELFT>(rels<ELFT>());
873
4
}
void lld::elf::EhInputSection::split<llvm::object::ELFType<(llvm::support::endianness)0, false> >()
Line
Count
Source
868
1
template <class ELFT> void EhInputSection::split() {
869
1
  if (AreRelocsRela)
870
0
    split<ELFT>(relas<ELFT>());
871
1
  else
872
1
    split<ELFT>(rels<ELFT>());
873
1
}
void lld::elf::EhInputSection::split<llvm::object::ELFType<(llvm::support::endianness)1, true> >()
Line
Count
Source
868
88
template <class ELFT> void EhInputSection::split() {
869
88
  if (AreRelocsRela)
870
79
    split<ELFT>(relas<ELFT>());
871
9
  else
872
9
    split<ELFT>(rels<ELFT>());
873
88
}
void lld::elf::EhInputSection::split<llvm::object::ELFType<(llvm::support::endianness)0, true> >()
Line
Count
Source
868
4
template <class ELFT> void EhInputSection::split() {
869
4
  if (AreRelocsRela)
870
3
    split<ELFT>(relas<ELFT>());
871
1
  else
872
1
    split<ELFT>(rels<ELFT>());
873
4
}
874
875
template <class ELFT, class RelTy>
876
97
void EhInputSection::split(ArrayRef<RelTy> Rels) {
877
97
  unsigned RelI = 0;
878
309
  for (size_t Off = 0, End = Data.size(); Off != End;) {
879
217
    size_t Size = readEhRecordSize(this, Off);
880
217
    Pieces.emplace_back(Off, this, Size, getReloc(Off, Size, Rels, RelI));
881
217
    // The empty record is the end marker.
882
217
    if (Size == 4)
883
5
      break;
884
212
    Off += Size;
885
212
  }
886
97
}
Unexecuted instantiation: void lld::elf::EhInputSection::split<llvm::object::ELFType<(llvm::support::endianness)1, false>, llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)1, false>, true> >(llvm::ArrayRef<llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)1, false>, true> >)
void lld::elf::EhInputSection::split<llvm::object::ELFType<(llvm::support::endianness)1, false>, llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)1, false>, false> >(llvm::ArrayRef<llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)1, false>, false> >)
Line
Count
Source
876
4
void EhInputSection::split(ArrayRef<RelTy> Rels) {
877
4
  unsigned RelI = 0;
878
12
  for (size_t Off = 0, End = Data.size(); Off != End;) {
879
8
    size_t Size = readEhRecordSize(this, Off);
880
8
    Pieces.emplace_back(Off, this, Size, getReloc(Off, Size, Rels, RelI));
881
8
    // The empty record is the end marker.
882
8
    if (Size == 4)
883
0
      break;
884
8
    Off += Size;
885
8
  }
886
4
}
Unexecuted instantiation: void lld::elf::EhInputSection::split<llvm::object::ELFType<(llvm::support::endianness)0, false>, llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)0, false>, true> >(llvm::ArrayRef<llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)0, false>, true> >)
void lld::elf::EhInputSection::split<llvm::object::ELFType<(llvm::support::endianness)0, false>, llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)0, false>, false> >(llvm::ArrayRef<llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)0, false>, false> >)
Line
Count
Source
876
1
void EhInputSection::split(ArrayRef<RelTy> Rels) {
877
1
  unsigned RelI = 0;
878
3
  for (size_t Off = 0, End = Data.size(); Off != End;) {
879
2
    size_t Size = readEhRecordSize(this, Off);
880
2
    Pieces.emplace_back(Off, this, Size, getReloc(Off, Size, Rels, RelI));
881
2
    // The empty record is the end marker.
882
2
    if (Size == 4)
883
0
      break;
884
2
    Off += Size;
885
2
  }
886
1
}
void lld::elf::EhInputSection::split<llvm::object::ELFType<(llvm::support::endianness)1, true>, llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)1, true>, true> >(llvm::ArrayRef<llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)1, true>, true> >)
Line
Count
Source
876
79
void EhInputSection::split(ArrayRef<RelTy> Rels) {
877
79
  unsigned RelI = 0;
878
272
  for (size_t Off = 0, End = Data.size(); Off != End;) {
879
193
    size_t Size = readEhRecordSize(this, Off);
880
193
    Pieces.emplace_back(Off, this, Size, getReloc(Off, Size, Rels, RelI));
881
193
    // The empty record is the end marker.
882
193
    if (Size == 4)
883
0
      break;
884
193
    Off += Size;
885
193
  }
886
79
}
void lld::elf::EhInputSection::split<llvm::object::ELFType<(llvm::support::endianness)1, true>, llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)1, true>, false> >(llvm::ArrayRef<llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)1, true>, false> >)
Line
Count
Source
876
9
void EhInputSection::split(ArrayRef<RelTy> Rels) {
877
9
  unsigned RelI = 0;
878
11
  for (size_t Off = 0, End = Data.size(); Off != End;) {
879
7
    size_t Size = readEhRecordSize(this, Off);
880
7
    Pieces.emplace_back(Off, this, Size, getReloc(Off, Size, Rels, RelI));
881
7
    // The empty record is the end marker.
882
7
    if (Size == 4)
883
5
      break;
884
2
    Off += Size;
885
2
  }
886
9
}
void lld::elf::EhInputSection::split<llvm::object::ELFType<(llvm::support::endianness)0, true>, llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)0, true>, true> >(llvm::ArrayRef<llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)0, true>, true> >)
Line
Count
Source
876
3
void EhInputSection::split(ArrayRef<RelTy> Rels) {
877
3
  unsigned RelI = 0;
878
9
  for (size_t Off = 0, End = Data.size(); Off != End;) {
879
6
    size_t Size = readEhRecordSize(this, Off);
880
6
    Pieces.emplace_back(Off, this, Size, getReloc(Off, Size, Rels, RelI));
881
6
    // The empty record is the end marker.
882
6
    if (Size == 4)
883
0
      break;
884
6
    Off += Size;
885
6
  }
886
3
}
void lld::elf::EhInputSection::split<llvm::object::ELFType<(llvm::support::endianness)0, true>, llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)0, true>, false> >(llvm::ArrayRef<llvm::object::Elf_Rel_Impl<llvm::object::ELFType<(llvm::support::endianness)0, true>, false> >)
Line
Count
Source
876
1
void EhInputSection::split(ArrayRef<RelTy> Rels) {
877
1
  unsigned RelI = 0;
878
2
  for (size_t Off = 0, End = Data.size(); Off != End;) {
879
1
    size_t Size = readEhRecordSize(this, Off);
880
1
    Pieces.emplace_back(Off, this, Size, getReloc(Off, Size, Rels, RelI));
881
1
    // The empty record is the end marker.
882
1
    if (Size == 4)
883
0
      break;
884
1
    Off += Size;
885
1
  }
886
1
}
887
888
2.19k
static size_t findNull(StringRef S, size_t EntSize) {
889
2.19k
  // Optimize the common case.
890
2.19k
  if (EntSize == 1)
891
2.19k
    return S.find(0);
892
5
893
7
  
for (unsigned I = 0, N = S.size(); 5
I != N;
I += EntSize2
) {
894
7
    const char *B = S.begin() + I;
895
30
    if (
std::all_of(B, B + EntSize, [](char C) 7
{ return C == 0; }))
896
5
      return I;
897
7
  }
898
5
  
return StringRef::npos0
;
899
5
}
900
901
273
SyntheticSection *MergeInputSection::getParent() const {
902
273
  return cast_or_null<SyntheticSection>(Parent);
903
273
}
904
905
// Split SHF_STRINGS section. Such section is a sequence of
906
// null-terminated strings.
907
2.12k
void MergeInputSection::splitStrings(ArrayRef<uint8_t> Data, size_t EntSize) {
908
2.12k
  size_t Off = 0;
909
2.12k
  bool IsAlloc = Flags & SHF_ALLOC;
910
2.12k
  StringRef S = toStringRef(Data);
911
2.12k
912
4.32k
  while (!S.empty()) {
913
2.19k
    size_t End = findNull(S, EntSize);
914
2.19k
    if (End == StringRef::npos)
915
0
      fatal(toString(this) + ": string is not null terminated");
916
2.19k
    size_t Size = End + EntSize;
917
2.19k
918
2.19k
    Pieces.emplace_back(Off, xxHash64(S.substr(0, Size)), !IsAlloc);
919
2.19k
    S = S.substr(Size);
920
2.19k
    Off += Size;
921
2.19k
  }
922
2.12k
}
923
924
// Split non-SHF_STRINGS section. Such section is a sequence of
925
// fixed size records.
926
void MergeInputSection::splitNonStrings(ArrayRef<uint8_t> Data,
927
35
                                        size_t EntSize) {
928
35
  size_t Size = Data.size();
929
35
  assert((Size % EntSize) == 0);
930
35
  bool IsAlloc = Flags & SHF_ALLOC;
931
35
932
85
  for (size_t I = 0; I != Size; 
I += EntSize50
)
933
50
    Pieces.emplace_back(I, xxHash64(toStringRef(Data.slice(I, EntSize))),
934
50
                        !IsAlloc);
935
35
}
936
937
template <class ELFT>
938
MergeInputSection::MergeInputSection(ObjFile<ELFT> &F,
939
                                     const typename ELFT::Shdr &Header,
940
                                     StringRef Name)
941
108
    : InputSectionBase(F, Header, Name, InputSectionBase::Merge) {}
lld::elf::MergeInputSection::MergeInputSection<llvm::object::ELFType<(llvm::support::endianness)1, false> >(lld::elf::ObjFile<llvm::object::ELFType<(llvm::support::endianness)1, false> >&, llvm::object::ELFType<(llvm::support::endianness)1, false>::Shdr const&, llvm::StringRef)
Line
Count
Source
941
5
    : InputSectionBase(F, Header, Name, InputSectionBase::Merge) {}
lld::elf::MergeInputSection::MergeInputSection<llvm::object::ELFType<(llvm::support::endianness)0, false> >(lld::elf::ObjFile<llvm::object::ELFType<(llvm::support::endianness)0, false> >&, llvm::object::ELFType<(llvm::support::endianness)0, false>::Shdr const&, llvm::StringRef)
Line
Count
Source
941
1
    : InputSectionBase(F, Header, Name, InputSectionBase::Merge) {}
lld::elf::MergeInputSection::MergeInputSection<llvm::object::ELFType<(llvm::support::endianness)1, true> >(lld::elf::ObjFile<llvm::object::ELFType<(llvm::support::endianness)1, true> >&, llvm::object::ELFType<(llvm::support::endianness)1, true>::Shdr const&, llvm::StringRef)
Line
Count
Source
941
102
    : InputSectionBase(F, Header, Name, InputSectionBase::Merge) {}
Unexecuted instantiation: lld::elf::MergeInputSection::MergeInputSection<llvm::object::ELFType<(llvm::support::endianness)0, true> >(lld::elf::ObjFile<llvm::object::ELFType<(llvm::support::endianness)0, true> >&, llvm::object::ELFType<(llvm::support::endianness)0, true>::Shdr const&, llvm::StringRef)
942
943
MergeInputSection::MergeInputSection(uint64_t Flags, uint32_t Type,
944
                                     uint64_t Entsize, ArrayRef<uint8_t> Data,
945
                                     StringRef Name)
946
    : InputSectionBase(nullptr, Flags, Type, Entsize, /*Link*/ 0, /*Info*/ 0,
947
2.06k
                       /*Alignment*/ Entsize, Data, Name, SectionBase::Merge) {}
948
949
// This function is called after we obtain a complete list of input sections
950
// that need to be linked. This is responsible to split section contents
951
// into small chunks for further processing.
952
//
953
// Note that this function is called from parallelForEach. This must be
954
// thread-safe (i.e. no memory allocation from the pools).
955
2.16k
void MergeInputSection::splitIntoPieces() {
956
2.16k
  assert(Pieces.empty());
957
2.16k
958
2.16k
  if (Flags & SHF_STRINGS)
959
2.12k
    splitStrings(Data, Entsize);
960
35
  else
961
35
    splitNonStrings(Data, Entsize);
962
2.16k
963
2.16k
  OffsetMap.reserve(Pieces.size());
964
4.41k
  for (size_t I = 0, E = Pieces.size(); I != E; 
++I2.24k
)
965
2.24k
    OffsetMap[Pieces[I].InputOff] = I;
966
2.16k
}
967
968
template <class It, class T, class Compare>
969
12
static It fastUpperBound(It First, It Last, const T &Value, Compare Comp) {
970
12
  size_t Size = std::distance(First, Last);
971
12
  assert(Size != 0);
972
27
  while (Size != 1) {
973
15
    size_t H = Size / 2;
974
15
    const It MI = First + H;
975
15
    Size -= H;
976
15
    First = Comp(Value, *MI) ? 
First9
:
First + H6
;
977
15
  }
978
12
  return Comp(Value, *First) ? 
First0
: First + 1;
979
12
}
980
981
// Do binary search to get a section piece at a given input offset.
982
12
static SectionPiece *findSectionPiece(MergeInputSection *Sec, uint64_t Offset) {
983
12
  if (Sec->Data.size() <= Offset)
984
0
    fatal(toString(Sec) + ": entry is past the end of the section");
985
12
986
12
  // Find the element this offset points to.
987
12
  auto I = fastUpperBound(
988
12
      Sec->Pieces.begin(), Sec->Pieces.end(), Offset,
989
27
      [](const uint64_t &A, const SectionPiece &B) { return A < B.InputOff; });
990
12
  --I;
991
12
  return &*I;
992
12
}
993
994
75
SectionPiece *MergeInputSection::getSectionPiece(uint64_t Offset) {
995
75
  // Find a piece starting at a given offset.
996
75
  auto It = OffsetMap.find(Offset);
997
75
  if (It != OffsetMap.end())
998
72
    return &Pieces[It->second];
999
3
1000
3
  // If Offset is not at beginning of a section piece, it is not in the map.
1001
3
  // In that case we need to search from the original section piece vector.
1002
3
  return findSectionPiece(this, Offset);
1003
3
}
1004
1005
// Returns the offset in an output section for a given input offset.
1006
// Because contents of a mergeable section is not contiguous in output,
1007
// it is not just an addition to a base output offset.
1008
117
uint64_t MergeInputSection::getParentOffset(uint64_t Offset) const {
1009
117
  // Find a string starting at a given offset.
1010
117
  auto It = OffsetMap.find(Offset);
1011
117
  if (It != OffsetMap.end())
1012
108
    return Pieces[It->second].OutputOff;
1013
9
1014
9
  // If Offset is not at beginning of a section piece, it is not in the map.
1015
9
  // In that case we need to search from the original section piece vector.
1016
9
  const SectionPiece &Piece =
1017
9
      *findSectionPiece(const_cast<MergeInputSection *>(this), Offset);
1018
9
  uint64_t Addend = Offset - Piece.InputOff;
1019
9
  return Piece.OutputOff + Addend;
1020
9
}
1021
1022
template InputSection::InputSection(ObjFile<ELF32LE> &, const ELF32LE::Shdr &,
1023
                                    StringRef);
1024
template InputSection::InputSection(ObjFile<ELF32BE> &, const ELF32BE::Shdr &,
1025
                                    StringRef);
1026
template InputSection::InputSection(ObjFile<ELF64LE> &, const ELF64LE::Shdr &,
1027
                                    StringRef);
1028
template InputSection::InputSection(ObjFile<ELF64BE> &, const ELF64BE::Shdr &,
1029
                                    StringRef);
1030
1031
template std::string InputSectionBase::getLocation<ELF32LE>(uint64_t);
1032
template std::string InputSectionBase::getLocation<ELF32BE>(uint64_t);
1033
template std::string InputSectionBase::getLocation<ELF64LE>(uint64_t);
1034
template std::string InputSectionBase::getLocation<ELF64BE>(uint64_t);
1035
1036
template void InputSection::writeTo<ELF32LE>(uint8_t *);
1037
template void InputSection::writeTo<ELF32BE>(uint8_t *);
1038
template void InputSection::writeTo<ELF64LE>(uint8_t *);
1039
template void InputSection::writeTo<ELF64BE>(uint8_t *);
1040
1041
template MergeInputSection::MergeInputSection(ObjFile<ELF32LE> &,
1042
                                              const ELF32LE::Shdr &, StringRef);
1043
template MergeInputSection::MergeInputSection(ObjFile<ELF32BE> &,
1044
                                              const ELF32BE::Shdr &, StringRef);
1045
template MergeInputSection::MergeInputSection(ObjFile<ELF64LE> &,
1046
                                              const ELF64LE::Shdr &, StringRef);
1047
template MergeInputSection::MergeInputSection(ObjFile<ELF64BE> &,
1048
                                              const ELF64BE::Shdr &, StringRef);
1049
1050
template EhInputSection::EhInputSection(ObjFile<ELF32LE> &,
1051
                                        const ELF32LE::Shdr &, StringRef);
1052
template EhInputSection::EhInputSection(ObjFile<ELF32BE> &,
1053
                                        const ELF32BE::Shdr &, StringRef);
1054
template EhInputSection::EhInputSection(ObjFile<ELF64LE> &,
1055
                                        const ELF64LE::Shdr &, StringRef);
1056
template EhInputSection::EhInputSection(ObjFile<ELF64BE> &,
1057
                                        const ELF64BE::Shdr &, StringRef);
1058
1059
template void EhInputSection::split<ELF32LE>();
1060
template void EhInputSection::split<ELF32BE>();
1061
template void EhInputSection::split<ELF64LE>();
1062
template void EhInputSection::split<ELF64BE>();