Coverage Report

Created: 2018-08-19 21:11

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/llvm/tools/lld/ELF/Target.cpp
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Source (jump to first uncovered line)
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//===- Target.cpp ---------------------------------------------------------===//
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//
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//                             The LLVM Linker
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// Machine-specific things, such as applying relocations, creation of
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// GOT or PLT entries, etc., are handled in this file.
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//
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// Refer the ELF spec for the single letter variables, S, A or P, used
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// in this file.
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//
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// Some functions defined in this file has "relaxTls" as part of their names.
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// They do peephole optimization for TLS variables by rewriting instructions.
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// They are not part of the ABI but optional optimization, so you can skip
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// them if you are not interested in how TLS variables are optimized.
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// See the following paper for the details.
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//
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//   Ulrich Drepper, ELF Handling For Thread-Local Storage
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//   http://www.akkadia.org/drepper/tls.pdf
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//
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//===----------------------------------------------------------------------===//
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#include "Target.h"
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#include "InputFiles.h"
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#include "OutputSections.h"
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#include "SymbolTable.h"
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#include "Symbols.h"
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#include "lld/Common/ErrorHandler.h"
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#include "llvm/Object/ELF.h"
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using namespace llvm;
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using namespace llvm::object;
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using namespace llvm::ELF;
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using namespace lld;
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using namespace lld::elf;
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TargetInfo *elf::Target;
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1.88k
std::string lld::toString(RelType Type) {
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1.88k
  StringRef S = getELFRelocationTypeName(elf::Config->EMachine, Type);
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1.88k
  if (S == "Unknown")
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1
    return ("Unknown (" + Twine(Type) + ")").str();
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  return S;
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}
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TargetInfo *elf::getTarget() {
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2.32k
  switch (Config->EMachine) {
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2.32k
  case EM_386:
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126
  case EM_IAMCU:
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    return getX86TargetInfo();
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126
  case EM_AARCH64:
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94
    return getAArch64TargetInfo();
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126
  case EM_AMDGPU:
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5
    return getAMDGPUTargetInfo();
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138
  case EM_ARM:
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138
    return getARMTargetInfo();
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126
  case EM_AVR:
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0
    return getAVRTargetInfo();
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126
  case EM_HEXAGON:
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1
    return getHexagonTargetInfo();
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181
  case EM_MIPS:
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    switch (Config->EKind) {
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    case ELF32LEKind:
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17
      return getMipsTargetInfo<ELF32LE>();
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181
    case ELF32BEKind:
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      return getMipsTargetInfo<ELF32BE>();
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181
    case ELF64LEKind:
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2
      return getMipsTargetInfo<ELF64LE>();
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181
    case ELF64BEKind:
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45
      return getMipsTargetInfo<ELF64BE>();
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181
    default:
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0
      fatal("unsupported MIPS target");
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0
    }
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3
  case EM_PPC:
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3
    return getPPCTargetInfo();
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  case EM_PPC64:
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    return getPPC64TargetInfo();
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0
  case EM_RISCV:
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0
    return getRISCVTargetInfo();
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1
  case EM_SPARCV9:
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1
    return getSPARCV9TargetInfo();
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1.68k
  case EM_X86_64:
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1.68k
    if (Config->EKind == ELF32LEKind)
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3
      return getX32TargetInfo();
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1.68k
    return getX86_64TargetInfo();
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0
  }
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  fatal("unknown target machine");
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0
}
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template <class ELFT> static ErrorPlace getErrPlace(const uint8_t *Loc) {
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  for (InputSectionBase *D : InputSections) {
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    auto *IS = cast<InputSection>(D);
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    if (!IS->getParent())
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      continue;
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    uint8_t *ISLoc = IS->getParent()->Loc + IS->OutSecOff;
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    if (ISLoc <= Loc && Loc < ISLoc + IS->getSize())
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      return {IS, IS->template getLocation<ELFT>(Loc - ISLoc) + ": "};
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  }
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return {}2
;
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}
Target.cpp:lld::elf::ErrorPlace getErrPlace<llvm::object::ELFType<(llvm::support::endianness)1, false> >(unsigned char const*)
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Source
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3
template <class ELFT> static ErrorPlace getErrPlace(const uint8_t *Loc) {
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  for (InputSectionBase *D : InputSections) {
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    auto *IS = cast<InputSection>(D);
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    if (!IS->getParent())
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      continue;
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    uint8_t *ISLoc = IS->getParent()->Loc + IS->OutSecOff;
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    if (ISLoc <= Loc && Loc < ISLoc + IS->getSize())
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      return {IS, IS->template getLocation<ELFT>(Loc - ISLoc) + ": "};
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  }
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return {}0
;
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3
}
Target.cpp:lld::elf::ErrorPlace getErrPlace<llvm::object::ELFType<(llvm::support::endianness)0, false> >(unsigned char const*)
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1
template <class ELFT> static ErrorPlace getErrPlace(const uint8_t *Loc) {
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  for (InputSectionBase *D : InputSections) {
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    auto *IS = cast<InputSection>(D);
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    if (!IS->getParent())
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      continue;
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    uint8_t *ISLoc = IS->getParent()->Loc + IS->OutSecOff;
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    if (ISLoc <= Loc && Loc < ISLoc + IS->getSize())
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      return {IS, IS->template getLocation<ELFT>(Loc - ISLoc) + ": "};
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  }
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return {}0
;
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}
Target.cpp:lld::elf::ErrorPlace getErrPlace<llvm::object::ELFType<(llvm::support::endianness)1, true> >(unsigned char const*)
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Source
94
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template <class ELFT> static ErrorPlace getErrPlace(const uint8_t *Loc) {
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  for (InputSectionBase *D : InputSections) {
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    auto *IS = cast<InputSection>(D);
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    if (!IS->getParent())
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      continue;
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    uint8_t *ISLoc = IS->getParent()->Loc + IS->OutSecOff;
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    if (ISLoc <= Loc && Loc < ISLoc + IS->getSize())
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      return {IS, IS->template getLocation<ELFT>(Loc - ISLoc) + ": "};
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  }
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return {}2
;
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}
Target.cpp:lld::elf::ErrorPlace getErrPlace<llvm::object::ELFType<(llvm::support::endianness)0, true> >(unsigned char const*)
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Source
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1.81k
template <class ELFT> static ErrorPlace getErrPlace(const uint8_t *Loc) {
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1.81k
  for (InputSectionBase *D : InputSections) {
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    auto *IS = cast<InputSection>(D);
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    if (!IS->getParent())
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      continue;
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    uint8_t *ISLoc = IS->getParent()->Loc + IS->OutSecOff;
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    if (ISLoc <= Loc && Loc < ISLoc + IS->getSize())
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      return {IS, IS->template getLocation<ELFT>(Loc - ISLoc) + ": "};
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  }
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return {}0
;
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}
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ErrorPlace elf::getErrorPlace(const uint8_t *Loc) {
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1.85k
  switch (Config->EKind) {
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1.85k
  case ELF32LEKind:
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3
    return getErrPlace<ELF32LE>(Loc);
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  case ELF32BEKind:
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    return getErrPlace<ELF32BE>(Loc);
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  case ELF64LEKind:
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    return getErrPlace<ELF64LE>(Loc);
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1.85k
  case ELF64BEKind:
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    return getErrPlace<ELF64BE>(Loc);
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  default:
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    llvm_unreachable("unknown ELF type");
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  }
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}
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TargetInfo::~TargetInfo() {}
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2
int64_t TargetInfo::getImplicitAddend(const uint8_t *Buf, RelType Type) const {
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2
  return 0;
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2
}
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bool TargetInfo::usesOnlyLowPageBits(RelType Type) const { return false; }
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bool TargetInfo::needsThunk(RelExpr Expr, RelType Type, const InputFile *File,
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0
                            uint64_t BranchAddr, const Symbol &S) const {
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  return false;
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0
}
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bool TargetInfo::adjustPrologueForCrossSplitStack(uint8_t *Loc,
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0
                                                  uint8_t *End) const {
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  llvm_unreachable("Target doesn't support split stacks.");
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0
}
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bool TargetInfo::inBranchRange(RelType Type, uint64_t Src, uint64_t Dst) const {
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  return true;
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}
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void TargetInfo::writeIgotPlt(uint8_t *Buf, const Symbol &S) const {
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  writeGotPlt(Buf, S);
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}
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RelExpr TargetInfo::adjustRelaxExpr(RelType Type, const uint8_t *Data,
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3
                                    RelExpr Expr) const {
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3
  return Expr;
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3
}
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0
void TargetInfo::relaxGot(uint8_t *Loc, uint64_t Val) const {
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  llvm_unreachable("Should not have claimed to be relaxable");
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0
}
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void TargetInfo::relaxTlsGdToLe(uint8_t *Loc, RelType Type,
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0
                                uint64_t Val) const {
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  llvm_unreachable("Should not have claimed to be relaxable");
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}
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void TargetInfo::relaxTlsGdToIe(uint8_t *Loc, RelType Type,
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0
                                uint64_t Val) const {
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  llvm_unreachable("Should not have claimed to be relaxable");
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0
}
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void TargetInfo::relaxTlsIeToLe(uint8_t *Loc, RelType Type,
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                                uint64_t Val) const {
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  llvm_unreachable("Should not have claimed to be relaxable");
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0
}
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void TargetInfo::relaxTlsLdToLe(uint8_t *Loc, RelType Type,
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0
                                uint64_t Val) const {
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  llvm_unreachable("Should not have claimed to be relaxable");
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0
}
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2.28k
uint64_t TargetInfo::getImageBase() {
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2.28k
  // Use -image-base if set. Fall back to the target default if not.
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2.28k
  if (Config->ImageBase)
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11
    return *Config->ImageBase;
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  return Config->Pic ? 
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:
DefaultImageBase1.29k
;
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2.27k
}