/Users/buildslave/jenkins/sharedspace/clang-stage2-coverage-R@2/llvm/include/llvm/CodeGen/Passes.h
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1 | | //===-- Passes.h - Target independent code generation passes ----*- C++ -*-===// |
2 | | // |
3 | | // The LLVM Compiler Infrastructure |
4 | | // |
5 | | // This file is distributed under the University of Illinois Open Source |
6 | | // License. See LICENSE.TXT for details. |
7 | | // |
8 | | //===----------------------------------------------------------------------===// |
9 | | // |
10 | | // This file defines interfaces to access the target independent code generation |
11 | | // passes provided by the LLVM backend. |
12 | | // |
13 | | //===----------------------------------------------------------------------===// |
14 | | |
15 | | #ifndef LLVM_CODEGEN_PASSES_H |
16 | | #define LLVM_CODEGEN_PASSES_H |
17 | | |
18 | | #include <functional> |
19 | | #include <string> |
20 | | |
21 | | namespace llvm { |
22 | | |
23 | | class FunctionPass; |
24 | | class MachineFunction; |
25 | | class MachineFunctionPass; |
26 | | class ModulePass; |
27 | | class Pass; |
28 | | class TargetMachine; |
29 | | class TargetRegisterClass; |
30 | | class raw_ostream; |
31 | | |
32 | | } // End llvm namespace |
33 | | |
34 | | /// List of target independent CodeGen pass IDs. |
35 | | namespace llvm { |
36 | | FunctionPass *createAtomicExpandPass(const TargetMachine *TM); |
37 | | |
38 | | /// createUnreachableBlockEliminationPass - The LLVM code generator does not |
39 | | /// work well with unreachable basic blocks (what live ranges make sense for a |
40 | | /// block that cannot be reached?). As such, a code generator should either |
41 | | /// not instruction select unreachable blocks, or run this pass as its |
42 | | /// last LLVM modifying pass to clean up blocks that are not reachable from |
43 | | /// the entry block. |
44 | | FunctionPass *createUnreachableBlockEliminationPass(); |
45 | | |
46 | | /// Insert mcount-like function calls. |
47 | | FunctionPass *createCountingFunctionInserterPass(); |
48 | | |
49 | | /// MachineFunctionPrinter pass - This pass prints out the machine function to |
50 | | /// the given stream as a debugging tool. |
51 | | MachineFunctionPass * |
52 | | createMachineFunctionPrinterPass(raw_ostream &OS, |
53 | | const std::string &Banner =""); |
54 | | |
55 | | /// MIRPrinting pass - this pass prints out the LLVM IR into the given stream |
56 | | /// using the MIR serialization format. |
57 | | MachineFunctionPass *createPrintMIRPass(raw_ostream &OS); |
58 | | |
59 | | /// This pass resets a MachineFunction when it has the FailedISel property |
60 | | /// as if it was just created. |
61 | | /// If EmitFallbackDiag is true, the pass will emit a |
62 | | /// DiagnosticInfoISelFallback for every MachineFunction it resets. |
63 | | /// If AbortOnFailedISel is true, abort compilation instead of resetting. |
64 | | MachineFunctionPass *createResetMachineFunctionPass(bool EmitFallbackDiag, |
65 | | bool AbortOnFailedISel); |
66 | | |
67 | | /// createCodeGenPreparePass - Transform the code to expose more pattern |
68 | | /// matching during instruction selection. |
69 | | FunctionPass *createCodeGenPreparePass(const TargetMachine *TM = nullptr); |
70 | | |
71 | | /// createScalarizeMaskedMemIntrinPass - Replace masked load, store, gather |
72 | | /// and scatter intrinsics with scalar code when target doesn't support them. |
73 | | FunctionPass *createScalarizeMaskedMemIntrinPass(); |
74 | | |
75 | | /// AtomicExpandID -- Lowers atomic operations in terms of either cmpxchg |
76 | | /// load-linked/store-conditional loops. |
77 | | extern char &AtomicExpandID; |
78 | | |
79 | | /// MachineLoopInfo - This pass is a loop analysis pass. |
80 | | extern char &MachineLoopInfoID; |
81 | | |
82 | | /// MachineDominators - This pass is a machine dominators analysis pass. |
83 | | extern char &MachineDominatorsID; |
84 | | |
85 | | /// MachineDominanaceFrontier - This pass is a machine dominators analysis pass. |
86 | | extern char &MachineDominanceFrontierID; |
87 | | |
88 | | /// MachineRegionInfo - This pass computes SESE regions for machine functions. |
89 | | extern char &MachineRegionInfoPassID; |
90 | | |
91 | | /// EdgeBundles analysis - Bundle machine CFG edges. |
92 | | extern char &EdgeBundlesID; |
93 | | |
94 | | /// LiveVariables pass - This pass computes the set of blocks in which each |
95 | | /// variable is life and sets machine operand kill flags. |
96 | | extern char &LiveVariablesID; |
97 | | |
98 | | /// PHIElimination - This pass eliminates machine instruction PHI nodes |
99 | | /// by inserting copy instructions. This destroys SSA information, but is the |
100 | | /// desired input for some register allocators. This pass is "required" by |
101 | | /// these register allocator like this: AU.addRequiredID(PHIEliminationID); |
102 | | extern char &PHIEliminationID; |
103 | | |
104 | | /// LiveIntervals - This analysis keeps track of the live ranges of virtual |
105 | | /// and physical registers. |
106 | | extern char &LiveIntervalsID; |
107 | | |
108 | | /// LiveStacks pass. An analysis keeping track of the liveness of stack slots. |
109 | | extern char &LiveStacksID; |
110 | | |
111 | | /// TwoAddressInstruction - This pass reduces two-address instructions to |
112 | | /// use two operands. This destroys SSA information but it is desired by |
113 | | /// register allocators. |
114 | | extern char &TwoAddressInstructionPassID; |
115 | | |
116 | | /// ProcessImpicitDefs pass - This pass removes IMPLICIT_DEFs. |
117 | | extern char &ProcessImplicitDefsID; |
118 | | |
119 | | /// RegisterCoalescer - This pass merges live ranges to eliminate copies. |
120 | | extern char &RegisterCoalescerID; |
121 | | |
122 | | /// MachineScheduler - This pass schedules machine instructions. |
123 | | extern char &MachineSchedulerID; |
124 | | |
125 | | /// PostMachineScheduler - This pass schedules machine instructions postRA. |
126 | | extern char &PostMachineSchedulerID; |
127 | | |
128 | | /// SpillPlacement analysis. Suggest optimal placement of spill code between |
129 | | /// basic blocks. |
130 | | extern char &SpillPlacementID; |
131 | | |
132 | | /// ShrinkWrap pass. Look for the best place to insert save and restore |
133 | | // instruction and update the MachineFunctionInfo with that information. |
134 | | extern char &ShrinkWrapID; |
135 | | |
136 | | /// LiveRangeShrink pass. Move instruction close to its definition to shrink |
137 | | /// the definition's live range. |
138 | | extern char &LiveRangeShrinkID; |
139 | | |
140 | | /// Greedy register allocator. |
141 | | extern char &RAGreedyID; |
142 | | |
143 | | /// VirtRegRewriter pass. Rewrite virtual registers to physical registers as |
144 | | /// assigned in VirtRegMap. |
145 | | extern char &VirtRegRewriterID; |
146 | | |
147 | | /// UnreachableMachineBlockElimination - This pass removes unreachable |
148 | | /// machine basic blocks. |
149 | | extern char &UnreachableMachineBlockElimID; |
150 | | |
151 | | /// DeadMachineInstructionElim - This pass removes dead machine instructions. |
152 | | extern char &DeadMachineInstructionElimID; |
153 | | |
154 | | /// This pass adds dead/undef flags after analyzing subregister lanes. |
155 | | extern char &DetectDeadLanesID; |
156 | | |
157 | | /// FastRegisterAllocation Pass - This pass register allocates as fast as |
158 | | /// possible. It is best suited for debug code where live ranges are short. |
159 | | /// |
160 | | FunctionPass *createFastRegisterAllocator(); |
161 | | |
162 | | /// BasicRegisterAllocation Pass - This pass implements a degenerate global |
163 | | /// register allocator using the basic regalloc framework. |
164 | | /// |
165 | | FunctionPass *createBasicRegisterAllocator(); |
166 | | |
167 | | /// Greedy register allocation pass - This pass implements a global register |
168 | | /// allocator for optimized builds. |
169 | | /// |
170 | | FunctionPass *createGreedyRegisterAllocator(); |
171 | | |
172 | | /// PBQPRegisterAllocation Pass - This pass implements the Partitioned Boolean |
173 | | /// Quadratic Prograaming (PBQP) based register allocator. |
174 | | /// |
175 | | FunctionPass *createDefaultPBQPRegisterAllocator(); |
176 | | |
177 | | /// PrologEpilogCodeInserter - This pass inserts prolog and epilog code, |
178 | | /// and eliminates abstract frame references. |
179 | | extern char &PrologEpilogCodeInserterID; |
180 | | MachineFunctionPass *createPrologEpilogInserterPass(const TargetMachine *TM); |
181 | | |
182 | | /// ExpandPostRAPseudos - This pass expands pseudo instructions after |
183 | | /// register allocation. |
184 | | extern char &ExpandPostRAPseudosID; |
185 | | |
186 | | /// createPostRAHazardRecognizer - This pass runs the post-ra hazard |
187 | | /// recognizer. |
188 | | extern char &PostRAHazardRecognizerID; |
189 | | |
190 | | /// createPostRAScheduler - This pass performs post register allocation |
191 | | /// scheduling. |
192 | | extern char &PostRASchedulerID; |
193 | | |
194 | | /// BranchFolding - This pass performs machine code CFG based |
195 | | /// optimizations to delete branches to branches, eliminate branches to |
196 | | /// successor blocks (creating fall throughs), and eliminating branches over |
197 | | /// branches. |
198 | | extern char &BranchFolderPassID; |
199 | | |
200 | | /// BranchRelaxation - This pass replaces branches that need to jump further |
201 | | /// than is supported by a branch instruction. |
202 | | extern char &BranchRelaxationPassID; |
203 | | |
204 | | /// MachineFunctionPrinterPass - This pass prints out MachineInstr's. |
205 | | extern char &MachineFunctionPrinterPassID; |
206 | | |
207 | | /// MIRPrintingPass - this pass prints out the LLVM IR using the MIR |
208 | | /// serialization format. |
209 | | extern char &MIRPrintingPassID; |
210 | | |
211 | | /// TailDuplicate - Duplicate blocks with unconditional branches |
212 | | /// into tails of their predecessors. |
213 | | extern char &TailDuplicateID; |
214 | | |
215 | | /// MachineTraceMetrics - This pass computes critical path and CPU resource |
216 | | /// usage in an ensemble of traces. |
217 | | extern char &MachineTraceMetricsID; |
218 | | |
219 | | /// EarlyIfConverter - This pass performs if-conversion on SSA form by |
220 | | /// inserting cmov instructions. |
221 | | extern char &EarlyIfConverterID; |
222 | | |
223 | | /// This pass performs instruction combining using trace metrics to estimate |
224 | | /// critical-path and resource depth. |
225 | | extern char &MachineCombinerID; |
226 | | |
227 | | /// StackSlotColoring - This pass performs stack coloring and merging. |
228 | | /// It merges disjoint allocas to reduce the stack size. |
229 | | extern char &StackColoringID; |
230 | | |
231 | | /// IfConverter - This pass performs machine code if conversion. |
232 | | extern char &IfConverterID; |
233 | | |
234 | | FunctionPass *createIfConverter( |
235 | | std::function<bool(const MachineFunction &)> Ftor); |
236 | | |
237 | | /// MachineBlockPlacement - This pass places basic blocks based on branch |
238 | | /// probabilities. |
239 | | extern char &MachineBlockPlacementID; |
240 | | |
241 | | /// MachineBlockPlacementStats - This pass collects statistics about the |
242 | | /// basic block placement using branch probabilities and block frequency |
243 | | /// information. |
244 | | extern char &MachineBlockPlacementStatsID; |
245 | | |
246 | | /// GCLowering Pass - Used by gc.root to perform its default lowering |
247 | | /// operations. |
248 | | FunctionPass *createGCLoweringPass(); |
249 | | |
250 | | /// ShadowStackGCLowering - Implements the custom lowering mechanism |
251 | | /// used by the shadow stack GC. Only runs on functions which opt in to |
252 | | /// the shadow stack collector. |
253 | | FunctionPass *createShadowStackGCLoweringPass(); |
254 | | |
255 | | /// GCMachineCodeAnalysis - Target-independent pass to mark safe points |
256 | | /// in machine code. Must be added very late during code generation, just |
257 | | /// prior to output, and importantly after all CFG transformations (such as |
258 | | /// branch folding). |
259 | | extern char &GCMachineCodeAnalysisID; |
260 | | |
261 | | /// Creates a pass to print GC metadata. |
262 | | /// |
263 | | FunctionPass *createGCInfoPrinter(raw_ostream &OS); |
264 | | |
265 | | /// MachineCSE - This pass performs global CSE on machine instructions. |
266 | | extern char &MachineCSEID; |
267 | | |
268 | | /// ImplicitNullChecks - This pass folds null pointer checks into nearby |
269 | | /// memory operations. |
270 | | extern char &ImplicitNullChecksID; |
271 | | |
272 | | /// MachineLICM - This pass performs LICM on machine instructions. |
273 | | extern char &MachineLICMID; |
274 | | |
275 | | /// MachineSinking - This pass performs sinking on machine instructions. |
276 | | extern char &MachineSinkingID; |
277 | | |
278 | | /// MachineCopyPropagation - This pass performs copy propagation on |
279 | | /// machine instructions. |
280 | | extern char &MachineCopyPropagationID; |
281 | | |
282 | | /// PeepholeOptimizer - This pass performs peephole optimizations - |
283 | | /// like extension and comparison eliminations. |
284 | | extern char &PeepholeOptimizerID; |
285 | | |
286 | | /// OptimizePHIs - This pass optimizes machine instruction PHIs |
287 | | /// to take advantage of opportunities created during DAG legalization. |
288 | | extern char &OptimizePHIsID; |
289 | | |
290 | | /// StackSlotColoring - This pass performs stack slot coloring. |
291 | | extern char &StackSlotColoringID; |
292 | | |
293 | | /// \brief This pass lays out funclets contiguously. |
294 | | extern char &FuncletLayoutID; |
295 | | |
296 | | /// This pass inserts the XRay instrumentation sleds if they are supported by |
297 | | /// the target platform. |
298 | | extern char &XRayInstrumentationID; |
299 | | |
300 | | /// This pass inserts FEntry calls |
301 | | extern char &FEntryInserterID; |
302 | | |
303 | | /// \brief This pass implements the "patchable-function" attribute. |
304 | | extern char &PatchableFunctionID; |
305 | | |
306 | | /// createStackProtectorPass - This pass adds stack protectors to functions. |
307 | | /// |
308 | | FunctionPass *createStackProtectorPass(const TargetMachine *TM); |
309 | | |
310 | | /// createMachineVerifierPass - This pass verifies cenerated machine code |
311 | | /// instructions for correctness. |
312 | | /// |
313 | | FunctionPass *createMachineVerifierPass(const std::string& Banner); |
314 | | |
315 | | /// createDwarfEHPass - This pass mulches exception handling code into a form |
316 | | /// adapted to code generation. Required if using dwarf exception handling. |
317 | | FunctionPass *createDwarfEHPass(const TargetMachine *TM); |
318 | | |
319 | | /// createWinEHPass - Prepares personality functions used by MSVC on Windows, |
320 | | /// in addition to the Itanium LSDA based personalities. |
321 | | FunctionPass *createWinEHPass(const TargetMachine *TM); |
322 | | |
323 | | /// createSjLjEHPreparePass - This pass adapts exception handling code to use |
324 | | /// the GCC-style builtin setjmp/longjmp (sjlj) to handling EH control flow. |
325 | | /// |
326 | | FunctionPass *createSjLjEHPreparePass(); |
327 | | |
328 | | /// LocalStackSlotAllocation - This pass assigns local frame indices to stack |
329 | | /// slots relative to one another and allocates base registers to access them |
330 | | /// when it is estimated by the target to be out of range of normal frame |
331 | | /// pointer or stack pointer index addressing. |
332 | | extern char &LocalStackSlotAllocationID; |
333 | | |
334 | | /// ExpandISelPseudos - This pass expands pseudo-instructions. |
335 | | extern char &ExpandISelPseudosID; |
336 | | |
337 | | /// UnpackMachineBundles - This pass unpack machine instruction bundles. |
338 | | extern char &UnpackMachineBundlesID; |
339 | | |
340 | | FunctionPass * |
341 | | createUnpackMachineBundles(std::function<bool(const MachineFunction &)> Ftor); |
342 | | |
343 | | /// FinalizeMachineBundles - This pass finalize machine instruction |
344 | | /// bundles (created earlier, e.g. during pre-RA scheduling). |
345 | | extern char &FinalizeMachineBundlesID; |
346 | | |
347 | | /// StackMapLiveness - This pass analyses the register live-out set of |
348 | | /// stackmap/patchpoint intrinsics and attaches the calculated information to |
349 | | /// the intrinsic for later emission to the StackMap. |
350 | | extern char &StackMapLivenessID; |
351 | | |
352 | | /// LiveDebugValues pass |
353 | | extern char &LiveDebugValuesID; |
354 | | |
355 | | /// createJumpInstrTables - This pass creates jump-instruction tables. |
356 | | ModulePass *createJumpInstrTablesPass(); |
357 | | |
358 | | /// createForwardControlFlowIntegrityPass - This pass adds control-flow |
359 | | /// integrity. |
360 | | ModulePass *createForwardControlFlowIntegrityPass(); |
361 | | |
362 | | /// InterleavedAccess Pass - This pass identifies and matches interleaved |
363 | | /// memory accesses to target specific intrinsics. |
364 | | /// |
365 | | FunctionPass *createInterleavedAccessPass(const TargetMachine *TM); |
366 | | |
367 | | /// LowerEmuTLS - This pass generates __emutls_[vt].xyz variables for all |
368 | | /// TLS variables for the emulated TLS model. |
369 | | /// |
370 | | ModulePass *createLowerEmuTLSPass(const TargetMachine *TM); |
371 | | |
372 | | /// This pass lowers the @llvm.load.relative intrinsic to instructions. |
373 | | /// This is unsafe to do earlier because a pass may combine the constant |
374 | | /// initializer into the load, which may result in an overflowing evaluation. |
375 | | ModulePass *createPreISelIntrinsicLoweringPass(); |
376 | | |
377 | | /// GlobalMerge - This pass merges internal (by default) globals into structs |
378 | | /// to enable reuse of a base pointer by indexed addressing modes. |
379 | | /// It can also be configured to focus on size optimizations only. |
380 | | /// |
381 | | Pass *createGlobalMergePass(const TargetMachine *TM, unsigned MaximalOffset, |
382 | | bool OnlyOptimizeForSize = false, |
383 | | bool MergeExternalByDefault = false); |
384 | | |
385 | | /// This pass splits the stack into a safe stack and an unsafe stack to |
386 | | /// protect against stack-based overflow vulnerabilities. |
387 | | FunctionPass *createSafeStackPass(const TargetMachine *TM = nullptr); |
388 | | |
389 | | /// This pass detects subregister lanes in a virtual register that are used |
390 | | /// independently of other lanes and splits them into separate virtual |
391 | | /// registers. |
392 | | extern char &RenameIndependentSubregsID; |
393 | | |
394 | | /// This pass is executed POST-RA to collect which physical registers are |
395 | | /// preserved by given machine function. |
396 | | FunctionPass *createRegUsageInfoCollector(); |
397 | | |
398 | | /// Return a MachineFunction pass that identifies call sites |
399 | | /// and propagates register usage information of callee to caller |
400 | | /// if available with PysicalRegisterUsageInfo pass. |
401 | | FunctionPass *createRegUsageInfoPropPass(); |
402 | | |
403 | | /// This pass performs software pipelining on machine instructions. |
404 | | extern char &MachinePipelinerID; |
405 | | |
406 | | /// This pass frees the memory occupied by the MachineFunction. |
407 | | FunctionPass *createFreeMachineFunctionPass(); |
408 | | |
409 | | /// This pass combine basic blocks guarded by the same branch. |
410 | | extern char &BranchCoalescingID; |
411 | | |
412 | | /// This pass performs outlining on machine instructions directly before |
413 | | /// printing assembly. |
414 | | ModulePass *createMachineOutlinerPass(); |
415 | | |
416 | | /// This pass expands the experimental reduction intrinsics into sequences of |
417 | | /// shuffles. |
418 | | FunctionPass *createExpandReductionsPass(); |
419 | | |
420 | | } // End llvm namespace |
421 | | |
422 | | /// Target machine pass initializer for passes with dependencies. Use with |
423 | | /// INITIALIZE_TM_PASS_END. |
424 | 600k | #define INITIALIZE_TM_PASS_BEGIN INITIALIZE_PASS_BEGIN |
425 | | |
426 | | /// Target machine pass initializer for passes with dependencies. Use with |
427 | | /// INITIALIZE_TM_PASS_BEGIN. |
428 | | #define INITIALIZE_TM_PASS_END(passName, arg, name, cfg, analysis) \ |
429 | 600k | PassInfo *PI = new PassInfo( \ |
430 | 600k | name, arg, &passName::ID, \ |
431 | 600k | PassInfo::NormalCtor_t(callDefaultCtor<passName>), cfg, analysis, \ |
432 | 600k | PassInfo::TargetMachineCtor_t(callTargetMachineCtor<passName>)); \ |
433 | 600k | Registry.registerPass(*PI, true); \ |
434 | 600k | return PI; \ |
435 | 600k | } \ |
436 | | static llvm::once_flag Initialize##passName##PassFlag; \ |
437 | 1.15M | void llvm::initialize##passName##Pass(PassRegistry &Registry) { \ |
438 | 1.15M | llvm::call_once(Initialize##passName##PassFlag, \ |
439 | 1.15M | initialize##passName##PassOnce, std::ref(Registry)); \ |
440 | 1.15M | } llvm::initializeAMDGPUCodeGenPreparePass(llvm::PassRegistry&) Line | Count | Source | 437 | 120k | void llvm::initialize##passName##Pass(PassRegistry &Registry) { \ | 438 | 120k | llvm::call_once(Initialize##passName##PassFlag, \ | 439 | 120k | initialize##passName##PassOnce, std::ref(Registry)); \ | 440 | 120k | } |
llvm::initializeAMDGPULowerIntrinsicsPass(llvm::PassRegistry&) Line | Count | Source | 437 | 120k | void llvm::initialize##passName##Pass(PassRegistry &Registry) { \ | 438 | 120k | llvm::call_once(Initialize##passName##PassFlag, \ | 439 | 120k | initialize##passName##PassOnce, std::ref(Registry)); \ | 440 | 120k | } |
llvm::initializeAMDGPUPromoteAllocaPass(llvm::PassRegistry&) Line | Count | Source | 437 | 120k | void llvm::initialize##passName##Pass(PassRegistry &Registry) { \ | 438 | 120k | llvm::call_once(Initialize##passName##PassFlag, \ | 439 | 120k | initialize##passName##PassOnce, std::ref(Registry)); \ | 440 | 120k | } |
llvm::initializeAtomicExpandPass(llvm::PassRegistry&) Line | Count | Source | 437 | 85.6k | void llvm::initialize##passName##Pass(PassRegistry &Registry) { \ | 438 | 85.6k | llvm::call_once(Initialize##passName##PassFlag, \ | 439 | 85.6k | initialize##passName##PassOnce, std::ref(Registry)); \ | 440 | 85.6k | } |
llvm::initializeCodeGenPreparePass(llvm::PassRegistry&) Line | Count | Source | 437 | 87.0k | void llvm::initialize##passName##Pass(PassRegistry &Registry) { \ | 438 | 87.0k | llvm::call_once(Initialize##passName##PassFlag, \ | 439 | 87.0k | initialize##passName##PassOnce, std::ref(Registry)); \ | 440 | 87.0k | } |
llvm::initializeDwarfEHPreparePass(llvm::PassRegistry&) Line | Count | Source | 437 | 55.6k | void llvm::initialize##passName##Pass(PassRegistry &Registry) { \ | 438 | 55.6k | llvm::call_once(Initialize##passName##PassFlag, \ | 439 | 55.6k | initialize##passName##PassOnce, std::ref(Registry)); \ | 440 | 55.6k | } |
llvm::initializeInterleavedAccessPass(llvm::PassRegistry&) Line | Count | Source | 437 | 81.1k | void llvm::initialize##passName##Pass(PassRegistry &Registry) { \ | 438 | 81.1k | llvm::call_once(Initialize##passName##PassFlag, \ | 439 | 81.1k | initialize##passName##PassOnce, std::ref(Registry)); \ | 440 | 81.1k | } |
llvm::initializeMachineModuleInfoPass(llvm::PassRegistry&) Line | Count | Source | 437 | 81.5k | void llvm::initialize##passName##Pass(PassRegistry &Registry) { \ | 438 | 81.5k | llvm::call_once(Initialize##passName##PassFlag, \ | 439 | 81.5k | initialize##passName##PassOnce, std::ref(Registry)); \ | 440 | 81.5k | } |
llvm::initializePEIPass(llvm::PassRegistry&) Line | Count | Source | 437 | 80.8k | void llvm::initialize##passName##Pass(PassRegistry &Registry) { \ | 438 | 80.8k | llvm::call_once(Initialize##passName##PassFlag, \ | 439 | 80.8k | initialize##passName##PassOnce, std::ref(Registry)); \ | 440 | 80.8k | } |
llvm::initializeSafeStackLegacyPassPass(llvm::PassRegistry&) Line | Count | Source | 437 | 88.4k | void llvm::initialize##passName##Pass(PassRegistry &Registry) { \ | 438 | 88.4k | llvm::call_once(Initialize##passName##PassFlag, \ | 439 | 88.4k | initialize##passName##PassOnce, std::ref(Registry)); \ | 440 | 88.4k | } |
llvm::initializeStackProtectorPass(llvm::PassRegistry&) Line | Count | Source | 437 | 180k | void llvm::initialize##passName##Pass(PassRegistry &Registry) { \ | 438 | 180k | llvm::call_once(Initialize##passName##PassFlag, \ | 439 | 180k | initialize##passName##PassOnce, std::ref(Registry)); \ | 440 | 180k | } |
llvm::initializeWinEHPreparePass(llvm::PassRegistry&) Line | Count | Source | 437 | 55.6k | void llvm::initialize##passName##Pass(PassRegistry &Registry) { \ | 438 | 55.6k | llvm::call_once(Initialize##passName##PassFlag, \ | 439 | 55.6k | initialize##passName##PassOnce, std::ref(Registry)); \ | 440 | 55.6k | } |
|
441 | | |
442 | | /// This initializer registers TargetMachine constructor, so the pass being |
443 | | /// initialized can use target dependent interfaces. Please do not move this |
444 | | /// macro to be together with INITIALIZE_PASS, which is a complete target |
445 | | /// independent initializer, and we don't want to make libScalarOpts depend |
446 | | /// on libCodeGen. |
447 | | #define INITIALIZE_TM_PASS(passName, arg, name, cfg, analysis) \ |
448 | 319k | INITIALIZE_TM_PASS_BEGIN319k (passName, arg, name, cfg, analysis) \319k |
449 | 319k | INITIALIZE_TM_PASS_END(passName, arg, name, cfg, analysis) AMDGPULowerIntrinsics.cpp:initializeAMDGPULowerIntrinsicsPassOnce(llvm::PassRegistry&) Line | Count | Source | 448 | 86.6k | INITIALIZE_TM_PASS_BEGIN86.6k (passName, arg, name, cfg, analysis) \86.6k | 449 | 86.6k | INITIALIZE_TM_PASS_END(passName, arg, name, cfg, analysis) |
AMDGPUPromoteAlloca.cpp:initializeAMDGPUPromoteAllocaPassOnce(llvm::PassRegistry&) Line | Count | Source | 448 | 86.6k | INITIALIZE_TM_PASS_BEGIN86.6k (passName, arg, name, cfg, analysis) \86.6k | 449 | 86.6k | INITIALIZE_TM_PASS_END(passName, arg, name, cfg, analysis) |
AtomicExpandPass.cpp:initializeAtomicExpandPassOnce(llvm::PassRegistry&) Line | Count | Source | 448 | 40.2k | INITIALIZE_TM_PASS_BEGIN40.2k (passName, arg, name, cfg, analysis) \40.2k | 449 | 40.2k | INITIALIZE_TM_PASS_END(passName, arg, name, cfg, analysis) |
MachineModuleInfo.cpp:initializeMachineModuleInfoPassOnce(llvm::PassRegistry&) Line | Count | Source | 448 | 32.9k | INITIALIZE_TM_PASS_BEGIN32.9k (passName, arg, name, cfg, analysis) \32.9k | 449 | 32.9k | INITIALIZE_TM_PASS_END(passName, arg, name, cfg, analysis) |
StackProtector.cpp:initializeStackProtectorPassOnce(llvm::PassRegistry&) Line | Count | Source | 448 | 32.9k | INITIALIZE_TM_PASS_BEGIN32.9k (passName, arg, name, cfg, analysis) \32.9k | 449 | 32.9k | INITIALIZE_TM_PASS_END(passName, arg, name, cfg, analysis) |
WinEHPrepare.cpp:initializeWinEHPreparePassOnce(llvm::PassRegistry&) Line | Count | Source | 448 | 40.2k | INITIALIZE_TM_PASS_BEGIN40.2k (passName, arg, name, cfg, analysis) \40.2k | 449 | 40.2k | INITIALIZE_TM_PASS_END(passName, arg, name, cfg, analysis) |
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450 | | |
451 | | #endif |