/Users/buildslave/jenkins/sharedspace/clang-stage2-coverage-R@2/llvm/lib/Target/Sparc/Sparc.h
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1 | | //===-- Sparc.h - Top-level interface for Sparc representation --*- C++ -*-===// |
2 | | // |
3 | | // The LLVM Compiler Infrastructure |
4 | | // |
5 | | // This file is distributed under the University of Illinois Open Source |
6 | | // License. See LICENSE.TXT for details. |
7 | | // |
8 | | //===----------------------------------------------------------------------===// |
9 | | // |
10 | | // This file contains the entry points for global functions defined in the LLVM |
11 | | // Sparc back-end. |
12 | | // |
13 | | //===----------------------------------------------------------------------===// |
14 | | |
15 | | #ifndef LLVM_LIB_TARGET_SPARC_SPARC_H |
16 | | #define LLVM_LIB_TARGET_SPARC_SPARC_H |
17 | | |
18 | | #include "MCTargetDesc/SparcMCTargetDesc.h" |
19 | | #include "llvm/Support/ErrorHandling.h" |
20 | | #include "llvm/Target/TargetMachine.h" |
21 | | |
22 | | namespace llvm { |
23 | | class FunctionPass; |
24 | | class SparcTargetMachine; |
25 | | class formatted_raw_ostream; |
26 | | class AsmPrinter; |
27 | | class MCInst; |
28 | | class MachineInstr; |
29 | | |
30 | | FunctionPass *createSparcISelDag(SparcTargetMachine &TM); |
31 | | FunctionPass *createSparcDelaySlotFillerPass(); |
32 | | |
33 | | void LowerSparcMachineInstrToMCInst(const MachineInstr *MI, |
34 | | MCInst &OutMI, |
35 | | AsmPrinter &AP); |
36 | | } // end namespace llvm; |
37 | | |
38 | | namespace llvm { |
39 | | // Enums corresponding to Sparc condition codes, both icc's and fcc's. These |
40 | | // values must be kept in sync with the ones in the .td file. |
41 | | namespace SPCC { |
42 | | enum CondCodes { |
43 | | ICC_A = 8 , // Always |
44 | | ICC_N = 0 , // Never |
45 | | ICC_NE = 9 , // Not Equal |
46 | | ICC_E = 1 , // Equal |
47 | | ICC_G = 10 , // Greater |
48 | | ICC_LE = 2 , // Less or Equal |
49 | | ICC_GE = 11 , // Greater or Equal |
50 | | ICC_L = 3 , // Less |
51 | | ICC_GU = 12 , // Greater Unsigned |
52 | | ICC_LEU = 4 , // Less or Equal Unsigned |
53 | | ICC_CC = 13 , // Carry Clear/Great or Equal Unsigned |
54 | | ICC_CS = 5 , // Carry Set/Less Unsigned |
55 | | ICC_POS = 14 , // Positive |
56 | | ICC_NEG = 6 , // Negative |
57 | | ICC_VC = 15 , // Overflow Clear |
58 | | ICC_VS = 7 , // Overflow Set |
59 | | |
60 | | FCC_A = 8+16, // Always |
61 | | FCC_N = 0+16, // Never |
62 | | FCC_U = 7+16, // Unordered |
63 | | FCC_G = 6+16, // Greater |
64 | | FCC_UG = 5+16, // Unordered or Greater |
65 | | FCC_L = 4+16, // Less |
66 | | FCC_UL = 3+16, // Unordered or Less |
67 | | FCC_LG = 2+16, // Less or Greater |
68 | | FCC_NE = 1+16, // Not Equal |
69 | | FCC_E = 9+16, // Equal |
70 | | FCC_UE = 10+16, // Unordered or Equal |
71 | | FCC_GE = 11+16, // Greater or Equal |
72 | | FCC_UGE = 12+16, // Unordered or Greater or Equal |
73 | | FCC_LE = 13+16, // Less or Equal |
74 | | FCC_ULE = 14+16, // Unordered or Less or Equal |
75 | | FCC_O = 15+16, // Ordered |
76 | | |
77 | | CPCC_A = 8+32, // Always |
78 | | CPCC_N = 0+32, // Never |
79 | | CPCC_3 = 7+32, |
80 | | CPCC_2 = 6+32, |
81 | | CPCC_23 = 5+32, |
82 | | CPCC_1 = 4+32, |
83 | | CPCC_13 = 3+32, |
84 | | CPCC_12 = 2+32, |
85 | | CPCC_123 = 1+32, |
86 | | CPCC_0 = 9+32, |
87 | | CPCC_03 = 10+32, |
88 | | CPCC_02 = 11+32, |
89 | | CPCC_023 = 12+32, |
90 | | CPCC_01 = 13+32, |
91 | | CPCC_013 = 14+32, |
92 | | CPCC_012 = 15+32 |
93 | | }; |
94 | | } |
95 | | |
96 | 506 | inline static const char *SPARCCondCodeToString(SPCC::CondCodes CC) { |
97 | 506 | switch (CC) { |
98 | 0 | case SPCC::ICC_A: return "a"; |
99 | 0 | case SPCC::ICC_N: return "n"; |
100 | 14 | case SPCC::ICC_NE: return "ne"; |
101 | 34 | case SPCC::ICC_E: return "e"; |
102 | 18 | case SPCC::ICC_G: return "g"; |
103 | 11 | case SPCC::ICC_LE: return "le"; |
104 | 11 | case SPCC::ICC_GE: return "ge"; |
105 | 14 | case SPCC::ICC_L: return "l"; |
106 | 15 | case SPCC::ICC_GU: return "gu"; |
107 | 12 | case SPCC::ICC_LEU: return "leu"; |
108 | 11 | case SPCC::ICC_CC: return "cc"; |
109 | 13 | case SPCC::ICC_CS: return "cs"; |
110 | 11 | case SPCC::ICC_POS: return "pos"; |
111 | 9 | case SPCC::ICC_NEG: return "neg"; |
112 | 9 | case SPCC::ICC_VC: return "vc"; |
113 | 9 | case SPCC::ICC_VS: return "vs"; |
114 | 6 | case SPCC::FCC_A: return "a"; |
115 | 3 | case SPCC::FCC_N: return "n"; |
116 | 13 | case SPCC::FCC_U: return "u"; |
117 | 12 | case SPCC::FCC_G: return "g"; |
118 | 12 | case SPCC::FCC_UG: return "ug"; |
119 | 28 | case SPCC::FCC_L: return "l"; |
120 | 14 | case SPCC::FCC_UL: return "ul"; |
121 | 11 | case SPCC::FCC_LG: return "lg"; |
122 | 22 | case SPCC::FCC_NE: return "ne"; |
123 | 13 | case SPCC::FCC_E: return "e"; |
124 | 11 | case SPCC::FCC_UE: return "ue"; |
125 | 11 | case SPCC::FCC_GE: return "ge"; |
126 | 14 | case SPCC::FCC_UGE: return "uge"; |
127 | 11 | case SPCC::FCC_LE: return "le"; |
128 | 16 | case SPCC::FCC_ULE: return "ule"; |
129 | 13 | case SPCC::FCC_O: return "o"; |
130 | 5 | case SPCC::CPCC_A: return "a"; |
131 | 3 | case SPCC::CPCC_N: return "n"; |
132 | 7 | case SPCC::CPCC_3: return "3"; |
133 | 7 | case SPCC::CPCC_2: return "2"; |
134 | 7 | case SPCC::CPCC_23: return "23"; |
135 | 7 | case SPCC::CPCC_1: return "1"; |
136 | 7 | case SPCC::CPCC_13: return "13"; |
137 | 7 | case SPCC::CPCC_12: return "12"; |
138 | 7 | case SPCC::CPCC_123: return "123"; |
139 | 6 | case SPCC::CPCC_0: return "0"; |
140 | 7 | case SPCC::CPCC_03: return "03"; |
141 | 7 | case SPCC::CPCC_02: return "02"; |
142 | 7 | case SPCC::CPCC_023: return "023"; |
143 | 7 | case SPCC::CPCC_01: return "01"; |
144 | 7 | case SPCC::CPCC_013: return "013"; |
145 | 7 | case SPCC::CPCC_012: return "012"; |
146 | 506 | } |
147 | 0 | llvm_unreachable0 ("Invalid cond code"); |
148 | 506 | } Unexecuted instantiation: DelaySlotFiller.cpp:llvm::SPARCCondCodeToString(llvm::SPCC::CondCodes) Unexecuted instantiation: SparcTargetInfo.cpp:llvm::SPARCCondCodeToString(llvm::SPCC::CondCodes) SparcInstPrinter.cpp:llvm::SPARCCondCodeToString(llvm::SPCC::CondCodes) Line | Count | Source | 96 | 506 | inline static const char *SPARCCondCodeToString(SPCC::CondCodes CC) { | 97 | 506 | switch (CC) { | 98 | 0 | case SPCC::ICC_A: return "a"; | 99 | 0 | case SPCC::ICC_N: return "n"; | 100 | 14 | case SPCC::ICC_NE: return "ne"; | 101 | 34 | case SPCC::ICC_E: return "e"; | 102 | 18 | case SPCC::ICC_G: return "g"; | 103 | 11 | case SPCC::ICC_LE: return "le"; | 104 | 11 | case SPCC::ICC_GE: return "ge"; | 105 | 14 | case SPCC::ICC_L: return "l"; | 106 | 15 | case SPCC::ICC_GU: return "gu"; | 107 | 12 | case SPCC::ICC_LEU: return "leu"; | 108 | 11 | case SPCC::ICC_CC: return "cc"; | 109 | 13 | case SPCC::ICC_CS: return "cs"; | 110 | 11 | case SPCC::ICC_POS: return "pos"; | 111 | 9 | case SPCC::ICC_NEG: return "neg"; | 112 | 9 | case SPCC::ICC_VC: return "vc"; | 113 | 9 | case SPCC::ICC_VS: return "vs"; | 114 | 6 | case SPCC::FCC_A: return "a"; | 115 | 3 | case SPCC::FCC_N: return "n"; | 116 | 13 | case SPCC::FCC_U: return "u"; | 117 | 12 | case SPCC::FCC_G: return "g"; | 118 | 12 | case SPCC::FCC_UG: return "ug"; | 119 | 28 | case SPCC::FCC_L: return "l"; | 120 | 14 | case SPCC::FCC_UL: return "ul"; | 121 | 11 | case SPCC::FCC_LG: return "lg"; | 122 | 22 | case SPCC::FCC_NE: return "ne"; | 123 | 13 | case SPCC::FCC_E: return "e"; | 124 | 11 | case SPCC::FCC_UE: return "ue"; | 125 | 11 | case SPCC::FCC_GE: return "ge"; | 126 | 14 | case SPCC::FCC_UGE: return "uge"; | 127 | 11 | case SPCC::FCC_LE: return "le"; | 128 | 16 | case SPCC::FCC_ULE: return "ule"; | 129 | 13 | case SPCC::FCC_O: return "o"; | 130 | 5 | case SPCC::CPCC_A: return "a"; | 131 | 3 | case SPCC::CPCC_N: return "n"; | 132 | 7 | case SPCC::CPCC_3: return "3"; | 133 | 7 | case SPCC::CPCC_2: return "2"; | 134 | 7 | case SPCC::CPCC_23: return "23"; | 135 | 7 | case SPCC::CPCC_1: return "1"; | 136 | 7 | case SPCC::CPCC_13: return "13"; | 137 | 7 | case SPCC::CPCC_12: return "12"; | 138 | 7 | case SPCC::CPCC_123: return "123"; | 139 | 6 | case SPCC::CPCC_0: return "0"; | 140 | 7 | case SPCC::CPCC_03: return "03"; | 141 | 7 | case SPCC::CPCC_02: return "02"; | 142 | 7 | case SPCC::CPCC_023: return "023"; | 143 | 7 | case SPCC::CPCC_01: return "01"; | 144 | 7 | case SPCC::CPCC_013: return "013"; | 145 | 7 | case SPCC::CPCC_012: return "012"; | 146 | 506 | } | 147 | 0 | llvm_unreachable0 ("Invalid cond code"); | 148 | | } |
Unexecuted instantiation: SparcMCInstLower.cpp:llvm::SPARCCondCodeToString(llvm::SPCC::CondCodes) Unexecuted instantiation: SparcTargetMachine.cpp:llvm::SPARCCondCodeToString(llvm::SPCC::CondCodes) Unexecuted instantiation: SparcSubtarget.cpp:llvm::SPARCCondCodeToString(llvm::SPCC::CondCodes) Unexecuted instantiation: SparcRegisterInfo.cpp:llvm::SPARCCondCodeToString(llvm::SPCC::CondCodes) Unexecuted instantiation: SparcFrameLowering.cpp:llvm::SPARCCondCodeToString(llvm::SPCC::CondCodes) Unexecuted instantiation: SparcISelLowering.cpp:llvm::SPARCCondCodeToString(llvm::SPCC::CondCodes) Unexecuted instantiation: SparcISelDAGToDAG.cpp:llvm::SPARCCondCodeToString(llvm::SPCC::CondCodes) Unexecuted instantiation: SparcInstrInfo.cpp:llvm::SPARCCondCodeToString(llvm::SPCC::CondCodes) Unexecuted instantiation: SparcAsmPrinter.cpp:llvm::SPARCCondCodeToString(llvm::SPCC::CondCodes) Unexecuted instantiation: LeonPasses.cpp:llvm::SPARCCondCodeToString(llvm::SPCC::CondCodes) |
149 | | |
150 | 4 | inline static unsigned HI22(int64_t imm) { |
151 | 4 | return (unsigned)((imm >> 10) & ((1 << 22)-1)); |
152 | 4 | } SparcFrameLowering.cpp:llvm::HI22(long long) Line | Count | Source | 150 | 2 | inline static unsigned HI22(int64_t imm) { | 151 | 2 | return (unsigned)((imm >> 10) & ((1 << 22)-1)); | 152 | 2 | } |
Unexecuted instantiation: SparcTargetInfo.cpp:llvm::HI22(long long) Unexecuted instantiation: SparcInstPrinter.cpp:llvm::HI22(long long) Unexecuted instantiation: SparcMCInstLower.cpp:llvm::HI22(long long) Unexecuted instantiation: SparcTargetMachine.cpp:llvm::HI22(long long) Unexecuted instantiation: SparcSubtarget.cpp:llvm::HI22(long long) SparcRegisterInfo.cpp:llvm::HI22(long long) Line | Count | Source | 150 | 2 | inline static unsigned HI22(int64_t imm) { | 151 | 2 | return (unsigned)((imm >> 10) & ((1 << 22)-1)); | 152 | 2 | } |
Unexecuted instantiation: SparcISelLowering.cpp:llvm::HI22(long long) Unexecuted instantiation: SparcISelDAGToDAG.cpp:llvm::HI22(long long) Unexecuted instantiation: SparcInstrInfo.cpp:llvm::HI22(long long) Unexecuted instantiation: SparcAsmPrinter.cpp:llvm::HI22(long long) Unexecuted instantiation: LeonPasses.cpp:llvm::HI22(long long) Unexecuted instantiation: DelaySlotFiller.cpp:llvm::HI22(long long) |
153 | | |
154 | 4 | inline static unsigned LO10(int64_t imm) { |
155 | 4 | return (unsigned)(imm & 0x3FF); |
156 | 4 | } Unexecuted instantiation: DelaySlotFiller.cpp:llvm::LO10(long long) SparcFrameLowering.cpp:llvm::LO10(long long) Line | Count | Source | 154 | 2 | inline static unsigned LO10(int64_t imm) { | 155 | 2 | return (unsigned)(imm & 0x3FF); | 156 | 2 | } |
Unexecuted instantiation: LeonPasses.cpp:llvm::LO10(long long) Unexecuted instantiation: SparcAsmPrinter.cpp:llvm::LO10(long long) Unexecuted instantiation: SparcInstrInfo.cpp:llvm::LO10(long long) Unexecuted instantiation: SparcISelDAGToDAG.cpp:llvm::LO10(long long) Unexecuted instantiation: SparcISelLowering.cpp:llvm::LO10(long long) SparcRegisterInfo.cpp:llvm::LO10(long long) Line | Count | Source | 154 | 2 | inline static unsigned LO10(int64_t imm) { | 155 | 2 | return (unsigned)(imm & 0x3FF); | 156 | 2 | } |
Unexecuted instantiation: SparcSubtarget.cpp:llvm::LO10(long long) Unexecuted instantiation: SparcTargetMachine.cpp:llvm::LO10(long long) Unexecuted instantiation: SparcMCInstLower.cpp:llvm::LO10(long long) Unexecuted instantiation: SparcInstPrinter.cpp:llvm::LO10(long long) Unexecuted instantiation: SparcTargetInfo.cpp:llvm::LO10(long long) |
157 | | |
158 | 4 | inline static unsigned HIX22(int64_t imm) { |
159 | 4 | return HI22(~imm); |
160 | 4 | } Unexecuted instantiation: SparcTargetInfo.cpp:llvm::HIX22(long long) Unexecuted instantiation: DelaySlotFiller.cpp:llvm::HIX22(long long) Unexecuted instantiation: SparcInstPrinter.cpp:llvm::HIX22(long long) Unexecuted instantiation: SparcMCInstLower.cpp:llvm::HIX22(long long) Unexecuted instantiation: SparcTargetMachine.cpp:llvm::HIX22(long long) Unexecuted instantiation: SparcSubtarget.cpp:llvm::HIX22(long long) SparcRegisterInfo.cpp:llvm::HIX22(long long) Line | Count | Source | 158 | 2 | inline static unsigned HIX22(int64_t imm) { | 159 | 2 | return HI22(~imm); | 160 | 2 | } |
SparcFrameLowering.cpp:llvm::HIX22(long long) Line | Count | Source | 158 | 2 | inline static unsigned HIX22(int64_t imm) { | 159 | 2 | return HI22(~imm); | 160 | 2 | } |
Unexecuted instantiation: SparcISelLowering.cpp:llvm::HIX22(long long) Unexecuted instantiation: SparcISelDAGToDAG.cpp:llvm::HIX22(long long) Unexecuted instantiation: SparcInstrInfo.cpp:llvm::HIX22(long long) Unexecuted instantiation: SparcAsmPrinter.cpp:llvm::HIX22(long long) Unexecuted instantiation: LeonPasses.cpp:llvm::HIX22(long long) |
161 | | |
162 | 4 | inline static unsigned LOX10(int64_t imm) { |
163 | 4 | return ~LO10(~imm); |
164 | 4 | } Unexecuted instantiation: LeonPasses.cpp:llvm::LOX10(long long) Unexecuted instantiation: SparcMCInstLower.cpp:llvm::LOX10(long long) Unexecuted instantiation: SparcTargetMachine.cpp:llvm::LOX10(long long) Unexecuted instantiation: SparcSubtarget.cpp:llvm::LOX10(long long) SparcRegisterInfo.cpp:llvm::LOX10(long long) Line | Count | Source | 162 | 2 | inline static unsigned LOX10(int64_t imm) { | 163 | 2 | return ~LO10(~imm); | 164 | 2 | } |
Unexecuted instantiation: SparcTargetInfo.cpp:llvm::LOX10(long long) Unexecuted instantiation: DelaySlotFiller.cpp:llvm::LOX10(long long) SparcFrameLowering.cpp:llvm::LOX10(long long) Line | Count | Source | 162 | 2 | inline static unsigned LOX10(int64_t imm) { | 163 | 2 | return ~LO10(~imm); | 164 | 2 | } |
Unexecuted instantiation: SparcISelLowering.cpp:llvm::LOX10(long long) Unexecuted instantiation: SparcISelDAGToDAG.cpp:llvm::LOX10(long long) Unexecuted instantiation: SparcInstrInfo.cpp:llvm::LOX10(long long) Unexecuted instantiation: SparcAsmPrinter.cpp:llvm::LOX10(long long) Unexecuted instantiation: SparcInstPrinter.cpp:llvm::LOX10(long long) |
165 | | |
166 | | } // end namespace llvm |
167 | | #endif |