Coverage Report

Created: 2019-07-24 05:18

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/llvm/include/llvm/BinaryFormat/ELF.h
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//===- llvm/BinaryFormat/ELF.h - ELF constants and structures ---*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This header contains common, non-processor-specific data structures and
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// constants for the ELF file format.
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//
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// The details of the ELF32 bits in this file are largely based on the Tool
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// Interface Standard (TIS) Executable and Linking Format (ELF) Specification
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// Version 1.2, May 1995. The ELF64 stuff is based on ELF-64 Object File Format
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// Version 1.5, Draft 2, May 1998 as well as OpenBSD header files.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_BINARYFORMAT_ELF_H
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#define LLVM_BINARYFORMAT_ELF_H
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#include <cstdint>
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#include <cstring>
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namespace llvm {
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namespace ELF {
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using Elf32_Addr = uint32_t; // Program address
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using Elf32_Off = uint32_t;  // File offset
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using Elf32_Half = uint16_t;
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using Elf32_Word = uint32_t;
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using Elf32_Sword = int32_t;
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using Elf64_Addr = uint64_t;
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using Elf64_Off = uint64_t;
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using Elf64_Half = uint16_t;
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using Elf64_Word = uint32_t;
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using Elf64_Sword = int32_t;
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using Elf64_Xword = uint64_t;
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using Elf64_Sxword = int64_t;
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// Object file magic string.
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static const char ElfMagic[] = {0x7f, 'E', 'L', 'F', '\0'};
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// e_ident size and indices.
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enum {
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  EI_MAG0 = 0,       // File identification index.
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  EI_MAG1 = 1,       // File identification index.
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  EI_MAG2 = 2,       // File identification index.
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  EI_MAG3 = 3,       // File identification index.
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  EI_CLASS = 4,      // File class.
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  EI_DATA = 5,       // Data encoding.
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  EI_VERSION = 6,    // File version.
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  EI_OSABI = 7,      // OS/ABI identification.
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  EI_ABIVERSION = 8, // ABI version.
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  EI_PAD = 9,        // Start of padding bytes.
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  EI_NIDENT = 16     // Number of bytes in e_ident.
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};
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struct Elf32_Ehdr {
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  unsigned char e_ident[EI_NIDENT]; // ELF Identification bytes
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  Elf32_Half e_type;                // Type of file (see ET_* below)
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  Elf32_Half e_machine;   // Required architecture for this file (see EM_*)
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  Elf32_Word e_version;   // Must be equal to 1
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  Elf32_Addr e_entry;     // Address to jump to in order to start program
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  Elf32_Off e_phoff;      // Program header table's file offset, in bytes
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  Elf32_Off e_shoff;      // Section header table's file offset, in bytes
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  Elf32_Word e_flags;     // Processor-specific flags
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  Elf32_Half e_ehsize;    // Size of ELF header, in bytes
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  Elf32_Half e_phentsize; // Size of an entry in the program header table
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  Elf32_Half e_phnum;     // Number of entries in the program header table
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  Elf32_Half e_shentsize; // Size of an entry in the section header table
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  Elf32_Half e_shnum;     // Number of entries in the section header table
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  Elf32_Half e_shstrndx;  // Sect hdr table index of sect name string table
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0
  bool checkMagic() const {
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0
    return (memcmp(e_ident, ElfMagic, strlen(ElfMagic))) == 0;
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0
  }
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  unsigned char getFileClass() const { return e_ident[EI_CLASS]; }
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0
  unsigned char getDataEncoding() const { return e_ident[EI_DATA]; }
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};
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// 64-bit ELF header. Fields are the same as for ELF32, but with different
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// types (see above).
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struct Elf64_Ehdr {
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  unsigned char e_ident[EI_NIDENT];
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  Elf64_Half e_type;
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  Elf64_Half e_machine;
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  Elf64_Word e_version;
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  Elf64_Addr e_entry;
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  Elf64_Off e_phoff;
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  Elf64_Off e_shoff;
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  Elf64_Word e_flags;
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  Elf64_Half e_ehsize;
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  Elf64_Half e_phentsize;
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  Elf64_Half e_phnum;
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  Elf64_Half e_shentsize;
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  Elf64_Half e_shnum;
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  Elf64_Half e_shstrndx;
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  bool checkMagic() const {
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0
    return (memcmp(e_ident, ElfMagic, strlen(ElfMagic))) == 0;
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0
  }
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0
  unsigned char getFileClass() const { return e_ident[EI_CLASS]; }
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  unsigned char getDataEncoding() const { return e_ident[EI_DATA]; }
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};
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// File types
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enum {
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  ET_NONE = 0,        // No file type
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  ET_REL = 1,         // Relocatable file
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  ET_EXEC = 2,        // Executable file
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  ET_DYN = 3,         // Shared object file
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  ET_CORE = 4,        // Core file
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  ET_LOPROC = 0xff00, // Beginning of processor-specific codes
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  ET_HIPROC = 0xffff  // Processor-specific
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};
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// Versioning
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enum { EV_NONE = 0, EV_CURRENT = 1 };
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// Machine architectures
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// See current registered ELF machine architectures at:
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//    http://www.uxsglobal.com/developers/gabi/latest/ch4.eheader.html
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enum {
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  EM_NONE = 0,           // No machine
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  EM_M32 = 1,            // AT&T WE 32100
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  EM_SPARC = 2,          // SPARC
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  EM_386 = 3,            // Intel 386
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  EM_68K = 4,            // Motorola 68000
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  EM_88K = 5,            // Motorola 88000
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  EM_IAMCU = 6,          // Intel MCU
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  EM_860 = 7,            // Intel 80860
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  EM_MIPS = 8,           // MIPS R3000
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  EM_S370 = 9,           // IBM System/370
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  EM_MIPS_RS3_LE = 10,   // MIPS RS3000 Little-endian
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  EM_PARISC = 15,        // Hewlett-Packard PA-RISC
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  EM_VPP500 = 17,        // Fujitsu VPP500
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  EM_SPARC32PLUS = 18,   // Enhanced instruction set SPARC
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  EM_960 = 19,           // Intel 80960
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  EM_PPC = 20,           // PowerPC
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  EM_PPC64 = 21,         // PowerPC64
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  EM_S390 = 22,          // IBM System/390
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  EM_SPU = 23,           // IBM SPU/SPC
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  EM_V800 = 36,          // NEC V800
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  EM_FR20 = 37,          // Fujitsu FR20
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  EM_RH32 = 38,          // TRW RH-32
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  EM_RCE = 39,           // Motorola RCE
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  EM_ARM = 40,           // ARM
152
  EM_ALPHA = 41,         // DEC Alpha
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  EM_SH = 42,            // Hitachi SH
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  EM_SPARCV9 = 43,       // SPARC V9
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  EM_TRICORE = 44,       // Siemens TriCore
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  EM_ARC = 45,           // Argonaut RISC Core
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  EM_H8_300 = 46,        // Hitachi H8/300
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  EM_H8_300H = 47,       // Hitachi H8/300H
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  EM_H8S = 48,           // Hitachi H8S
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  EM_H8_500 = 49,        // Hitachi H8/500
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  EM_IA_64 = 50,         // Intel IA-64 processor architecture
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  EM_MIPS_X = 51,        // Stanford MIPS-X
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  EM_COLDFIRE = 52,      // Motorola ColdFire
164
  EM_68HC12 = 53,        // Motorola M68HC12
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  EM_MMA = 54,           // Fujitsu MMA Multimedia Accelerator
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  EM_PCP = 55,           // Siemens PCP
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  EM_NCPU = 56,          // Sony nCPU embedded RISC processor
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  EM_NDR1 = 57,          // Denso NDR1 microprocessor
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  EM_STARCORE = 58,      // Motorola Star*Core processor
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  EM_ME16 = 59,          // Toyota ME16 processor
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  EM_ST100 = 60,         // STMicroelectronics ST100 processor
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  EM_TINYJ = 61,         // Advanced Logic Corp. TinyJ embedded processor family
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  EM_X86_64 = 62,        // AMD x86-64 architecture
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  EM_PDSP = 63,          // Sony DSP Processor
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  EM_PDP10 = 64,         // Digital Equipment Corp. PDP-10
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  EM_PDP11 = 65,         // Digital Equipment Corp. PDP-11
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  EM_FX66 = 66,          // Siemens FX66 microcontroller
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  EM_ST9PLUS = 67,       // STMicroelectronics ST9+ 8/16 bit microcontroller
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  EM_ST7 = 68,           // STMicroelectronics ST7 8-bit microcontroller
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  EM_68HC16 = 69,        // Motorola MC68HC16 Microcontroller
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  EM_68HC11 = 70,        // Motorola MC68HC11 Microcontroller
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  EM_68HC08 = 71,        // Motorola MC68HC08 Microcontroller
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  EM_68HC05 = 72,        // Motorola MC68HC05 Microcontroller
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  EM_SVX = 73,           // Silicon Graphics SVx
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  EM_ST19 = 74,          // STMicroelectronics ST19 8-bit microcontroller
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  EM_VAX = 75,           // Digital VAX
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  EM_CRIS = 76,          // Axis Communications 32-bit embedded processor
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  EM_JAVELIN = 77,       // Infineon Technologies 32-bit embedded processor
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  EM_FIREPATH = 78,      // Element 14 64-bit DSP Processor
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  EM_ZSP = 79,           // LSI Logic 16-bit DSP Processor
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  EM_MMIX = 80,          // Donald Knuth's educational 64-bit processor
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  EM_HUANY = 81,         // Harvard University machine-independent object files
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  EM_PRISM = 82,         // SiTera Prism
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  EM_AVR = 83,           // Atmel AVR 8-bit microcontroller
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  EM_FR30 = 84,          // Fujitsu FR30
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  EM_D10V = 85,          // Mitsubishi D10V
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  EM_D30V = 86,          // Mitsubishi D30V
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  EM_V850 = 87,          // NEC v850
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  EM_M32R = 88,          // Mitsubishi M32R
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  EM_MN10300 = 89,       // Matsushita MN10300
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  EM_MN10200 = 90,       // Matsushita MN10200
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  EM_PJ = 91,            // picoJava
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  EM_OPENRISC = 92,      // OpenRISC 32-bit embedded processor
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  EM_ARC_COMPACT = 93,   // ARC International ARCompact processor (old
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                         // spelling/synonym: EM_ARC_A5)
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  EM_XTENSA = 94,        // Tensilica Xtensa Architecture
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  EM_VIDEOCORE = 95,     // Alphamosaic VideoCore processor
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  EM_TMM_GPP = 96,       // Thompson Multimedia General Purpose Processor
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  EM_NS32K = 97,         // National Semiconductor 32000 series
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  EM_TPC = 98,           // Tenor Network TPC processor
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  EM_SNP1K = 99,         // Trebia SNP 1000 processor
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  EM_ST200 = 100,        // STMicroelectronics (www.st.com) ST200
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  EM_IP2K = 101,         // Ubicom IP2xxx microcontroller family
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  EM_MAX = 102,          // MAX Processor
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  EM_CR = 103,           // National Semiconductor CompactRISC microprocessor
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  EM_F2MC16 = 104,       // Fujitsu F2MC16
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  EM_MSP430 = 105,       // Texas Instruments embedded microcontroller msp430
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  EM_BLACKFIN = 106,     // Analog Devices Blackfin (DSP) processor
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  EM_SE_C33 = 107,       // S1C33 Family of Seiko Epson processors
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  EM_SEP = 108,          // Sharp embedded microprocessor
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  EM_ARCA = 109,         // Arca RISC Microprocessor
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  EM_UNICORE = 110,      // Microprocessor series from PKU-Unity Ltd. and MPRC
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                         // of Peking University
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  EM_EXCESS = 111,       // eXcess: 16/32/64-bit configurable embedded CPU
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  EM_DXP = 112,          // Icera Semiconductor Inc. Deep Execution Processor
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  EM_ALTERA_NIOS2 = 113, // Altera Nios II soft-core processor
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  EM_CRX = 114,          // National Semiconductor CompactRISC CRX
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  EM_XGATE = 115,        // Motorola XGATE embedded processor
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  EM_C166 = 116,         // Infineon C16x/XC16x processor
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  EM_M16C = 117,         // Renesas M16C series microprocessors
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  EM_DSPIC30F = 118,     // Microchip Technology dsPIC30F Digital Signal
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                         // Controller
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  EM_CE = 119,           // Freescale Communication Engine RISC core
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  EM_M32C = 120,         // Renesas M32C series microprocessors
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  EM_TSK3000 = 131,      // Altium TSK3000 core
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  EM_RS08 = 132,         // Freescale RS08 embedded processor
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  EM_SHARC = 133,        // Analog Devices SHARC family of 32-bit DSP
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                         // processors
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  EM_ECOG2 = 134,        // Cyan Technology eCOG2 microprocessor
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  EM_SCORE7 = 135,       // Sunplus S+core7 RISC processor
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  EM_DSP24 = 136,        // New Japan Radio (NJR) 24-bit DSP Processor
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  EM_VIDEOCORE3 = 137,   // Broadcom VideoCore III processor
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  EM_LATTICEMICO32 = 138, // RISC processor for Lattice FPGA architecture
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  EM_SE_C17 = 139,        // Seiko Epson C17 family
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  EM_TI_C6000 = 140,      // The Texas Instruments TMS320C6000 DSP family
246
  EM_TI_C2000 = 141,      // The Texas Instruments TMS320C2000 DSP family
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  EM_TI_C5500 = 142,      // The Texas Instruments TMS320C55x DSP family
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  EM_MMDSP_PLUS = 160,    // STMicroelectronics 64bit VLIW Data Signal Processor
249
  EM_CYPRESS_M8C = 161,   // Cypress M8C microprocessor
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  EM_R32C = 162,          // Renesas R32C series microprocessors
251
  EM_TRIMEDIA = 163,      // NXP Semiconductors TriMedia architecture family
252
  EM_HEXAGON = 164,       // Qualcomm Hexagon processor
253
  EM_8051 = 165,          // Intel 8051 and variants
254
  EM_STXP7X = 166,        // STMicroelectronics STxP7x family of configurable
255
                          // and extensible RISC processors
256
  EM_NDS32 = 167,         // Andes Technology compact code size embedded RISC
257
                          // processor family
258
  EM_ECOG1 = 168,         // Cyan Technology eCOG1X family
259
  EM_ECOG1X = 168,        // Cyan Technology eCOG1X family
260
  EM_MAXQ30 = 169,        // Dallas Semiconductor MAXQ30 Core Micro-controllers
261
  EM_XIMO16 = 170,        // New Japan Radio (NJR) 16-bit DSP Processor
262
  EM_MANIK = 171,         // M2000 Reconfigurable RISC Microprocessor
263
  EM_CRAYNV2 = 172,       // Cray Inc. NV2 vector architecture
264
  EM_RX = 173,            // Renesas RX family
265
  EM_METAG = 174,         // Imagination Technologies META processor
266
                          // architecture
267
  EM_MCST_ELBRUS = 175,   // MCST Elbrus general purpose hardware architecture
268
  EM_ECOG16 = 176,        // Cyan Technology eCOG16 family
269
  EM_CR16 = 177,          // National Semiconductor CompactRISC CR16 16-bit
270
                          // microprocessor
271
  EM_ETPU = 178,          // Freescale Extended Time Processing Unit
272
  EM_SLE9X = 179,         // Infineon Technologies SLE9X core
273
  EM_L10M = 180,          // Intel L10M
274
  EM_K10M = 181,          // Intel K10M
275
  EM_AARCH64 = 183,       // ARM AArch64
276
  EM_AVR32 = 185,         // Atmel Corporation 32-bit microprocessor family
277
  EM_STM8 = 186,          // STMicroeletronics STM8 8-bit microcontroller
278
  EM_TILE64 = 187,        // Tilera TILE64 multicore architecture family
279
  EM_TILEPRO = 188,       // Tilera TILEPro multicore architecture family
280
  EM_CUDA = 190,          // NVIDIA CUDA architecture
281
  EM_TILEGX = 191,        // Tilera TILE-Gx multicore architecture family
282
  EM_CLOUDSHIELD = 192,   // CloudShield architecture family
283
  EM_COREA_1ST = 193,     // KIPO-KAIST Core-A 1st generation processor family
284
  EM_COREA_2ND = 194,     // KIPO-KAIST Core-A 2nd generation processor family
285
  EM_ARC_COMPACT2 = 195,  // Synopsys ARCompact V2
286
  EM_OPEN8 = 196,         // Open8 8-bit RISC soft processor core
287
  EM_RL78 = 197,          // Renesas RL78 family
288
  EM_VIDEOCORE5 = 198,    // Broadcom VideoCore V processor
289
  EM_78KOR = 199,         // Renesas 78KOR family
290
  EM_56800EX = 200,       // Freescale 56800EX Digital Signal Controller (DSC)
291
  EM_BA1 = 201,           // Beyond BA1 CPU architecture
292
  EM_BA2 = 202,           // Beyond BA2 CPU architecture
293
  EM_XCORE = 203,         // XMOS xCORE processor family
294
  EM_MCHP_PIC = 204,      // Microchip 8-bit PIC(r) family
295
  EM_INTEL205 = 205,      // Reserved by Intel
296
  EM_INTEL206 = 206,      // Reserved by Intel
297
  EM_INTEL207 = 207,      // Reserved by Intel
298
  EM_INTEL208 = 208,      // Reserved by Intel
299
  EM_INTEL209 = 209,      // Reserved by Intel
300
  EM_KM32 = 210,          // KM211 KM32 32-bit processor
301
  EM_KMX32 = 211,         // KM211 KMX32 32-bit processor
302
  EM_KMX16 = 212,         // KM211 KMX16 16-bit processor
303
  EM_KMX8 = 213,          // KM211 KMX8 8-bit processor
304
  EM_KVARC = 214,         // KM211 KVARC processor
305
  EM_CDP = 215,           // Paneve CDP architecture family
306
  EM_COGE = 216,          // Cognitive Smart Memory Processor
307
  EM_COOL = 217,          // iCelero CoolEngine
308
  EM_NORC = 218,          // Nanoradio Optimized RISC
309
  EM_CSR_KALIMBA = 219,   // CSR Kalimba architecture family
310
  EM_AMDGPU = 224,        // AMD GPU architecture
311
  EM_RISCV = 243,         // RISC-V
312
  EM_LANAI = 244,         // Lanai 32-bit processor
313
  EM_BPF = 247,           // Linux kernel bpf virtual machine
314
};
315
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// Object file classes.
317
enum {
318
  ELFCLASSNONE = 0,
319
  ELFCLASS32 = 1, // 32-bit object file
320
  ELFCLASS64 = 2  // 64-bit object file
321
};
322
323
// Object file byte orderings.
324
enum {
325
  ELFDATANONE = 0, // Invalid data encoding.
326
  ELFDATA2LSB = 1, // Little-endian object file
327
  ELFDATA2MSB = 2  // Big-endian object file
328
};
329
330
// OS ABI identification.
331
enum {
332
  ELFOSABI_NONE = 0,           // UNIX System V ABI
333
  ELFOSABI_HPUX = 1,           // HP-UX operating system
334
  ELFOSABI_NETBSD = 2,         // NetBSD
335
  ELFOSABI_GNU = 3,            // GNU/Linux
336
  ELFOSABI_LINUX = 3,          // Historical alias for ELFOSABI_GNU.
337
  ELFOSABI_HURD = 4,           // GNU/Hurd
338
  ELFOSABI_SOLARIS = 6,        // Solaris
339
  ELFOSABI_AIX = 7,            // AIX
340
  ELFOSABI_IRIX = 8,           // IRIX
341
  ELFOSABI_FREEBSD = 9,        // FreeBSD
342
  ELFOSABI_TRU64 = 10,         // TRU64 UNIX
343
  ELFOSABI_MODESTO = 11,       // Novell Modesto
344
  ELFOSABI_OPENBSD = 12,       // OpenBSD
345
  ELFOSABI_OPENVMS = 13,       // OpenVMS
346
  ELFOSABI_NSK = 14,           // Hewlett-Packard Non-Stop Kernel
347
  ELFOSABI_AROS = 15,          // AROS
348
  ELFOSABI_FENIXOS = 16,       // FenixOS
349
  ELFOSABI_CLOUDABI = 17,      // Nuxi CloudABI
350
  ELFOSABI_FIRST_ARCH = 64,    // First architecture-specific OS ABI
351
  ELFOSABI_AMDGPU_HSA = 64,    // AMD HSA runtime
352
  ELFOSABI_AMDGPU_PAL = 65,    // AMD PAL runtime
353
  ELFOSABI_AMDGPU_MESA3D = 66, // AMD GCN GPUs (GFX6+) for MESA runtime
354
  ELFOSABI_ARM = 97,           // ARM
355
  ELFOSABI_C6000_ELFABI = 64,  // Bare-metal TMS320C6000
356
  ELFOSABI_C6000_LINUX = 65,   // Linux TMS320C6000
357
  ELFOSABI_STANDALONE = 255,   // Standalone (embedded) application
358
  ELFOSABI_LAST_ARCH = 255     // Last Architecture-specific OS ABI
359
};
360
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#define ELF_RELOC(name, value) name = value,
362
363
// X86_64 relocations.
364
enum {
365
#include "ELFRelocs/x86_64.def"
366
};
367
368
// i386 relocations.
369
enum {
370
#include "ELFRelocs/i386.def"
371
};
372
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// ELF Relocation types for PPC32
374
enum {
375
#include "ELFRelocs/PowerPC.def"
376
};
377
378
// Specific e_flags for PPC64
379
enum {
380
  // e_flags bits specifying ABI:
381
  // 1 for original ABI using function descriptors,
382
  // 2 for revised ABI without function descriptors,
383
  // 0 for unspecified or not using any features affected by the differences.
384
  EF_PPC64_ABI = 3
385
};
386
387
// Special values for the st_other field in the symbol table entry for PPC64.
388
enum {
389
  STO_PPC64_LOCAL_BIT = 5,
390
  STO_PPC64_LOCAL_MASK = (7 << STO_PPC64_LOCAL_BIT)
391
};
392
116
static inline int64_t decodePPC64LocalEntryOffset(unsigned Other) {
393
116
  unsigned Val = (Other & STO_PPC64_LOCAL_MASK) >> STO_PPC64_LOCAL_BIT;
394
116
  return ((1 << Val) >> 2) << 2;
395
116
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: AArch64AsmBackend.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: AArch64ELFObjectWriter.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: AArch64ELFStreamer.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: AArch64MCExpr.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: AMDGPUAsmPrinter.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: AMDGPUTargetObjectFile.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: R600AsmPrinter.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: AMDGPUAsmParser.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: AMDGPUAsmBackend.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: AMDGPUELFObjectWriter.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: AMDGPUELFStreamer.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: AMDGPUTargetStreamer.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: AMDGPUBaseInfo.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: AMDGPUPALMetadata.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: ARMTargetObjectFile.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: ARMAsmBackend.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: ARMELFObjectWriter.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: ARMELFStreamer.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: BTFDebug.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: BPFELFObjectWriter.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: HexagonAsmPrinter.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: HexagonTargetObjectFile.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: HexagonAsmParser.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: HexagonAsmBackend.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: HexagonELFObjectWriter.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: HexagonMCELFStreamer.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: HexagonMCExpr.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: HexagonMCTargetDesc.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: LanaiTargetObjectFile.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: LanaiAsmBackend.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: LanaiELFObjectWriter.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: MipsAsmPrinter.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: MipsTargetObjectFile.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: MipsAsmParser.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: MipsAsmBackend.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: MipsELFObjectWriter.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: MipsELFStreamer.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: MipsMCExpr.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: MipsOptionRecord.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: MipsTargetStreamer.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: MSP430AsmPrinter.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: MSP430AsmBackend.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: MSP430ELFObjectWriter.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: MSP430ELFStreamer.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: PPCAsmPrinter.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: PPCAsmBackend.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
PPCMCTargetDesc.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Line
Count
Source
392
116
static inline int64_t decodePPC64LocalEntryOffset(unsigned Other) {
393
116
  unsigned Val = (Other & STO_PPC64_LOCAL_MASK) >> STO_PPC64_LOCAL_BIT;
394
116
  return ((1 << Val) >> 2) << 2;
395
116
}
Unexecuted instantiation: PPCELFObjectWriter.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: RISCVTargetObjectFile.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: RISCVAsmBackend.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: RISCVELFObjectWriter.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: RISCVMCExpr.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: RISCVELFStreamer.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: SparcAsmBackend.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: SparcELFObjectWriter.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: SparcMCExpr.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: SystemZMCAsmBackend.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: SystemZMCObjectWriter.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: X86AsmPrinter.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: X86AsmBackend.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: X86ELFObjectWriter.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: XCoreTargetObjectFile.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: TargetLoweringObjectFileImpl.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: ELFObjectWriter.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: MCAsmBackend.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: MCAsmInfoELF.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: MCContext.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: MCELFObjectTargetWriter.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: MCELFStreamer.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: MCObjectFileInfo.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: MCSectionELF.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: MCSymbolELF.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: ELFAsmParser.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: ObjectFilePCHContainerOperations.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: InterfaceStubFunctionsConsumer.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: AsmPrinter.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: DWARFAbbreviationDeclaration.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: DWARFAcceleratorTable.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: DWARFCompileUnit.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: DWARFContext.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: DWARFDataExtractor.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: DWARFDebugAddr.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: DWARFDebugAranges.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: DWARFDebugInfoEntry.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: DWARFDebugLine.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: DWARFDebugLoc.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: DWARFDebugPubTable.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: DWARFDebugRangeList.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: DWARFDebugRnglists.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: DWARFDie.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: DWARFExpression.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: DWARFFormValue.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: DWARFTypeUnit.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: DWARFUnit.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: DWARFVerifier.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: Decompressor.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: ELF.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: ELFObjectFile.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: RelocationResolver.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: Magic.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
Unexecuted instantiation: ErlangGCPrinter.cpp:llvm::ELF::decodePPC64LocalEntryOffset(unsigned int)
396
116
static inline unsigned encodePPC64LocalEntryOffset(int64_t Offset) {
397
116
  unsigned Val =
398
116
      (Offset >= 4 * 4 ? 
(Offset >= 8 * 4 2
?
(Offset >= 16 * 4 2
?
62
:
50
) :
40
)
399
116
                       : 
(Offset >= 2 * 4 114
?
3113
:
(Offset >= 1 * 4 1
?
21
:
00
)));
400
116
  return Val << STO_PPC64_LOCAL_BIT;
401
116
}
Unexecuted instantiation: AArch64AsmPrinter.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: AArch64AsmBackend.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: AArch64ELFObjectWriter.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: AArch64ELFStreamer.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: AArch64MCExpr.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: AMDGPUAsmPrinter.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: AMDGPUTargetObjectFile.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: R600AsmPrinter.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: AMDGPUAsmParser.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: AMDGPUAsmBackend.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: AMDGPUELFObjectWriter.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: AMDGPUELFStreamer.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: AMDGPUTargetStreamer.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: AMDGPUBaseInfo.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: AMDGPUPALMetadata.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: ARMTargetObjectFile.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: ARMAsmBackend.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: ARMELFObjectWriter.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: ARMELFStreamer.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: BTFDebug.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: BPFELFObjectWriter.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: HexagonAsmPrinter.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: HexagonTargetObjectFile.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: HexagonAsmParser.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: HexagonAsmBackend.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: HexagonELFObjectWriter.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: HexagonMCELFStreamer.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: HexagonMCExpr.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: HexagonMCTargetDesc.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: LanaiTargetObjectFile.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: LanaiAsmBackend.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: LanaiELFObjectWriter.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: MipsAsmPrinter.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: MipsTargetObjectFile.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: MipsAsmParser.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: MipsAsmBackend.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: MipsELFObjectWriter.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: MipsELFStreamer.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: MipsMCExpr.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: MipsOptionRecord.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: MipsTargetStreamer.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: MSP430AsmPrinter.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: MSP430AsmBackend.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: MSP430ELFObjectWriter.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: MSP430ELFStreamer.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: PPCAsmPrinter.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: PPCAsmBackend.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
PPCMCTargetDesc.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Line
Count
Source
396
116
static inline unsigned encodePPC64LocalEntryOffset(int64_t Offset) {
397
116
  unsigned Val =
398
116
      (Offset >= 4 * 4 ? 
(Offset >= 8 * 4 2
?
(Offset >= 16 * 4 2
?
62
:
50
) :
40
)
399
116
                       : 
(Offset >= 2 * 4 114
?
3113
:
(Offset >= 1 * 4 1
?
21
:
00
)));
400
116
  return Val << STO_PPC64_LOCAL_BIT;
401
116
}
Unexecuted instantiation: PPCELFObjectWriter.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: RISCVTargetObjectFile.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: RISCVAsmBackend.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: RISCVELFObjectWriter.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: RISCVMCExpr.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: RISCVELFStreamer.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: SparcAsmBackend.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: SparcELFObjectWriter.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: SparcMCExpr.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: SystemZMCAsmBackend.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: SystemZMCObjectWriter.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: X86AsmPrinter.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: X86AsmBackend.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: X86ELFObjectWriter.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: XCoreTargetObjectFile.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: TargetLoweringObjectFileImpl.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: ELFObjectWriter.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: MCAsmBackend.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: MCAsmInfoELF.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: MCContext.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: MCELFObjectTargetWriter.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: MCELFStreamer.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: MCObjectFileInfo.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: MCSectionELF.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: MCSymbolELF.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: ELFAsmParser.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: ObjectFilePCHContainerOperations.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: InterfaceStubFunctionsConsumer.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: AsmPrinter.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: DWARFAbbreviationDeclaration.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: DWARFAcceleratorTable.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: DWARFCompileUnit.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: DWARFContext.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: DWARFDataExtractor.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: DWARFDebugAddr.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: DWARFDebugAranges.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: DWARFDebugInfoEntry.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: DWARFDebugLine.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: DWARFDebugLoc.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: DWARFDebugPubTable.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: DWARFDebugRangeList.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: DWARFDebugRnglists.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: DWARFDie.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: DWARFExpression.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: DWARFFormValue.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: DWARFTypeUnit.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: DWARFUnit.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: DWARFVerifier.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: Decompressor.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: ELF.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: ELFObjectFile.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: RelocationResolver.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: Magic.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
Unexecuted instantiation: ErlangGCPrinter.cpp:llvm::ELF::encodePPC64LocalEntryOffset(long long)
402
403
// ELF Relocation types for PPC64
404
enum {
405
#include "ELFRelocs/PowerPC64.def"
406
};
407
408
// ELF Relocation types for AArch64
409
enum {
410
#include "ELFRelocs/AArch64.def"
411
};
412
413
// ARM Specific e_flags
414
enum : unsigned {
415
  EF_ARM_SOFT_FLOAT = 0x00000200U,     // Legacy pre EABI_VER5
416
  EF_ARM_ABI_FLOAT_SOFT = 0x00000200U, // EABI_VER5
417
  EF_ARM_VFP_FLOAT = 0x00000400U,      // Legacy pre EABI_VER5
418
  EF_ARM_ABI_FLOAT_HARD = 0x00000400U, // EABI_VER5
419
  EF_ARM_EABI_UNKNOWN = 0x00000000U,
420
  EF_ARM_EABI_VER1 = 0x01000000U,
421
  EF_ARM_EABI_VER2 = 0x02000000U,
422
  EF_ARM_EABI_VER3 = 0x03000000U,
423
  EF_ARM_EABI_VER4 = 0x04000000U,
424
  EF_ARM_EABI_VER5 = 0x05000000U,
425
  EF_ARM_EABIMASK = 0xFF000000U
426
};
427
428
// ELF Relocation types for ARM
429
enum {
430
#include "ELFRelocs/ARM.def"
431
};
432
433
// ARC Specific e_flags
434
enum : unsigned {
435
  EF_ARC_MACH_MSK = 0x000000ff,
436
  EF_ARC_OSABI_MSK = 0x00000f00,
437
  E_ARC_MACH_ARC600 = 0x00000002,
438
  E_ARC_MACH_ARC601 = 0x00000004,
439
  E_ARC_MACH_ARC700 = 0x00000003,
440
  EF_ARC_CPU_ARCV2EM = 0x00000005,
441
  EF_ARC_CPU_ARCV2HS = 0x00000006,
442
  E_ARC_OSABI_ORIG = 0x00000000,
443
  E_ARC_OSABI_V2 = 0x00000200,
444
  E_ARC_OSABI_V3 = 0x00000300,
445
  E_ARC_OSABI_V4 = 0x00000400,
446
  EF_ARC_PIC = 0x00000100
447
};
448
449
// ELF Relocation types for ARC
450
enum {
451
#include "ELFRelocs/ARC.def"
452
};
453
454
// AVR specific e_flags
455
enum : unsigned {
456
  EF_AVR_ARCH_AVR1 = 1,
457
  EF_AVR_ARCH_AVR2 = 2,
458
  EF_AVR_ARCH_AVR25 = 25,
459
  EF_AVR_ARCH_AVR3 = 3,
460
  EF_AVR_ARCH_AVR31 = 31,
461
  EF_AVR_ARCH_AVR35 = 35,
462
  EF_AVR_ARCH_AVR4 = 4,
463
  EF_AVR_ARCH_AVR5 = 5,
464
  EF_AVR_ARCH_AVR51 = 51,
465
  EF_AVR_ARCH_AVR6 = 6,
466
  EF_AVR_ARCH_AVRTINY = 100,
467
  EF_AVR_ARCH_XMEGA1 = 101,
468
  EF_AVR_ARCH_XMEGA2 = 102,
469
  EF_AVR_ARCH_XMEGA3 = 103,
470
  EF_AVR_ARCH_XMEGA4 = 104,
471
  EF_AVR_ARCH_XMEGA5 = 105,
472
  EF_AVR_ARCH_XMEGA6 = 106,
473
  EF_AVR_ARCH_XMEGA7 = 107
474
};
475
476
// ELF Relocation types for AVR
477
enum {
478
#include "ELFRelocs/AVR.def"
479
};
480
481
// Mips Specific e_flags
482
enum : unsigned {
483
  EF_MIPS_NOREORDER = 0x00000001, // Don't reorder instructions
484
  EF_MIPS_PIC = 0x00000002,       // Position independent code
485
  EF_MIPS_CPIC = 0x00000004,      // Call object with Position independent code
486
  EF_MIPS_ABI2 = 0x00000020,      // File uses N32 ABI
487
  EF_MIPS_32BITMODE = 0x00000100, // Code compiled for a 64-bit machine
488
                                  // in 32-bit mode
489
  EF_MIPS_FP64 = 0x00000200,      // Code compiled for a 32-bit machine
490
                                  // but uses 64-bit FP registers
491
  EF_MIPS_NAN2008 = 0x00000400,   // Uses IEE 754-2008 NaN encoding
492
493
  // ABI flags
494
  EF_MIPS_ABI_O32 = 0x00001000, // This file follows the first MIPS 32 bit ABI
495
  EF_MIPS_ABI_O64 = 0x00002000, // O32 ABI extended for 64-bit architecture.
496
  EF_MIPS_ABI_EABI32 = 0x00003000, // EABI in 32 bit mode.
497
  EF_MIPS_ABI_EABI64 = 0x00004000, // EABI in 64 bit mode.
498
  EF_MIPS_ABI = 0x0000f000,        // Mask for selecting EF_MIPS_ABI_ variant.
499
500
  // MIPS machine variant
501
  EF_MIPS_MACH_NONE = 0x00000000,    // A standard MIPS implementation.
502
  EF_MIPS_MACH_3900 = 0x00810000,    // Toshiba R3900
503
  EF_MIPS_MACH_4010 = 0x00820000,    // LSI R4010
504
  EF_MIPS_MACH_4100 = 0x00830000,    // NEC VR4100
505
  EF_MIPS_MACH_4650 = 0x00850000,    // MIPS R4650
506
  EF_MIPS_MACH_4120 = 0x00870000,    // NEC VR4120
507
  EF_MIPS_MACH_4111 = 0x00880000,    // NEC VR4111/VR4181
508
  EF_MIPS_MACH_SB1 = 0x008a0000,     // Broadcom SB-1
509
  EF_MIPS_MACH_OCTEON = 0x008b0000,  // Cavium Networks Octeon
510
  EF_MIPS_MACH_XLR = 0x008c0000,     // RMI Xlr
511
  EF_MIPS_MACH_OCTEON2 = 0x008d0000, // Cavium Networks Octeon2
512
  EF_MIPS_MACH_OCTEON3 = 0x008e0000, // Cavium Networks Octeon3
513
  EF_MIPS_MACH_5400 = 0x00910000,    // NEC VR5400
514
  EF_MIPS_MACH_5900 = 0x00920000,    // MIPS R5900
515
  EF_MIPS_MACH_5500 = 0x00980000,    // NEC VR5500
516
  EF_MIPS_MACH_9000 = 0x00990000,    // Unknown
517
  EF_MIPS_MACH_LS2E = 0x00a00000,    // ST Microelectronics Loongson 2E
518
  EF_MIPS_MACH_LS2F = 0x00a10000,    // ST Microelectronics Loongson 2F
519
  EF_MIPS_MACH_LS3A = 0x00a20000,    // Loongson 3A
520
  EF_MIPS_MACH = 0x00ff0000,         // EF_MIPS_MACH_xxx selection mask
521
522
  // ARCH_ASE
523
  EF_MIPS_MICROMIPS = 0x02000000,     // microMIPS
524
  EF_MIPS_ARCH_ASE_M16 = 0x04000000,  // Has Mips-16 ISA extensions
525
  EF_MIPS_ARCH_ASE_MDMX = 0x08000000, // Has MDMX multimedia extensions
526
  EF_MIPS_ARCH_ASE = 0x0f000000,      // Mask for EF_MIPS_ARCH_ASE_xxx flags
527
528
  // ARCH
529
  EF_MIPS_ARCH_1 = 0x00000000,    // MIPS1 instruction set
530
  EF_MIPS_ARCH_2 = 0x10000000,    // MIPS2 instruction set
531
  EF_MIPS_ARCH_3 = 0x20000000,    // MIPS3 instruction set
532
  EF_MIPS_ARCH_4 = 0x30000000,    // MIPS4 instruction set
533
  EF_MIPS_ARCH_5 = 0x40000000,    // MIPS5 instruction set
534
  EF_MIPS_ARCH_32 = 0x50000000,   // MIPS32 instruction set per linux not elf.h
535
  EF_MIPS_ARCH_64 = 0x60000000,   // MIPS64 instruction set per linux not elf.h
536
  EF_MIPS_ARCH_32R2 = 0x70000000, // mips32r2, mips32r3, mips32r5
537
  EF_MIPS_ARCH_64R2 = 0x80000000, // mips64r2, mips64r3, mips64r5
538
  EF_MIPS_ARCH_32R6 = 0x90000000, // mips32r6
539
  EF_MIPS_ARCH_64R6 = 0xa0000000, // mips64r6
540
  EF_MIPS_ARCH = 0xf0000000       // Mask for applying EF_MIPS_ARCH_ variant
541
};
542
543
// ELF Relocation types for Mips
544
enum {
545
#include "ELFRelocs/Mips.def"
546
};
547
548
// Special values for the st_other field in the symbol table entry for MIPS.
549
enum {
550
  STO_MIPS_OPTIONAL = 0x04,  // Symbol whose definition is optional
551
  STO_MIPS_PLT = 0x08,       // PLT entry related dynamic table record
552
  STO_MIPS_PIC = 0x20,       // PIC func in an object mixes PIC/non-PIC
553
  STO_MIPS_MICROMIPS = 0x80, // MIPS Specific ISA for MicroMips
554
  STO_MIPS_MIPS16 = 0xf0     // MIPS Specific ISA for Mips16
555
};
556
557
// .MIPS.options section descriptor kinds
558
enum {
559
  ODK_NULL = 0,       // Undefined
560
  ODK_REGINFO = 1,    // Register usage information
561
  ODK_EXCEPTIONS = 2, // Exception processing options
562
  ODK_PAD = 3,        // Section padding options
563
  ODK_HWPATCH = 4,    // Hardware patches applied
564
  ODK_FILL = 5,       // Linker fill value
565
  ODK_TAGS = 6,       // Space for tool identification
566
  ODK_HWAND = 7,      // Hardware AND patches applied
567
  ODK_HWOR = 8,       // Hardware OR patches applied
568
  ODK_GP_GROUP = 9,   // GP group to use for text/data sections
569
  ODK_IDENT = 10,     // ID information
570
  ODK_PAGESIZE = 11   // Page size information
571
};
572
573
// Hexagon-specific e_flags
574
enum {
575
  // Object processor version flags, bits[11:0]
576
  EF_HEXAGON_MACH_V2 = 0x00000001,  // Hexagon V2
577
  EF_HEXAGON_MACH_V3 = 0x00000002,  // Hexagon V3
578
  EF_HEXAGON_MACH_V4 = 0x00000003,  // Hexagon V4
579
  EF_HEXAGON_MACH_V5 = 0x00000004,  // Hexagon V5
580
  EF_HEXAGON_MACH_V55 = 0x00000005, // Hexagon V55
581
  EF_HEXAGON_MACH_V60 = 0x00000060, // Hexagon V60
582
  EF_HEXAGON_MACH_V62 = 0x00000062, // Hexagon V62
583
  EF_HEXAGON_MACH_V65 = 0x00000065, // Hexagon V65
584
  EF_HEXAGON_MACH_V66 = 0x00000066, // Hexagon V66
585
586
  // Highest ISA version flags
587
  EF_HEXAGON_ISA_MACH = 0x00000000, // Same as specified in bits[11:0]
588
                                    // of e_flags
589
  EF_HEXAGON_ISA_V2 = 0x00000010,   // Hexagon V2 ISA
590
  EF_HEXAGON_ISA_V3 = 0x00000020,   // Hexagon V3 ISA
591
  EF_HEXAGON_ISA_V4 = 0x00000030,   // Hexagon V4 ISA
592
  EF_HEXAGON_ISA_V5 = 0x00000040,   // Hexagon V5 ISA
593
  EF_HEXAGON_ISA_V55 = 0x00000050,  // Hexagon V55 ISA
594
  EF_HEXAGON_ISA_V60 = 0x00000060,  // Hexagon V60 ISA
595
  EF_HEXAGON_ISA_V62 = 0x00000062,  // Hexagon V62 ISA
596
  EF_HEXAGON_ISA_V65 = 0x00000065,  // Hexagon V65 ISA
597
  EF_HEXAGON_ISA_V66 = 0x00000066,  // Hexagon V66 ISA
598
};
599
600
// Hexagon-specific section indexes for common small data
601
enum {
602
  SHN_HEXAGON_SCOMMON = 0xff00,   // Other access sizes
603
  SHN_HEXAGON_SCOMMON_1 = 0xff01, // Byte-sized access
604
  SHN_HEXAGON_SCOMMON_2 = 0xff02, // Half-word-sized access
605
  SHN_HEXAGON_SCOMMON_4 = 0xff03, // Word-sized access
606
  SHN_HEXAGON_SCOMMON_8 = 0xff04  // Double-word-size access
607
};
608
609
// ELF Relocation types for Hexagon
610
enum {
611
#include "ELFRelocs/Hexagon.def"
612
};
613
614
// ELF Relocation type for Lanai.
615
enum {
616
#include "ELFRelocs/Lanai.def"
617
};
618
619
// RISCV Specific e_flags
620
enum : unsigned {
621
  EF_RISCV_RVC = 0x0001,
622
  EF_RISCV_FLOAT_ABI = 0x0006,
623
  EF_RISCV_FLOAT_ABI_SOFT = 0x0000,
624
  EF_RISCV_FLOAT_ABI_SINGLE = 0x0002,
625
  EF_RISCV_FLOAT_ABI_DOUBLE = 0x0004,
626
  EF_RISCV_FLOAT_ABI_QUAD = 0x0006,
627
  EF_RISCV_RVE = 0x0008
628
};
629
630
// ELF Relocation types for RISC-V
631
enum {
632
#include "ELFRelocs/RISCV.def"
633
};
634
635
// ELF Relocation types for S390/zSeries
636
enum {
637
#include "ELFRelocs/SystemZ.def"
638
};
639
640
// ELF Relocation type for Sparc.
641
enum {
642
#include "ELFRelocs/Sparc.def"
643
};
644
645
// AMDGPU specific e_flags.
646
enum : unsigned {
647
  // Processor selection mask for EF_AMDGPU_MACH_* values.
648
  EF_AMDGPU_MACH = 0x0ff,
649
650
  // Not specified processor.
651
  EF_AMDGPU_MACH_NONE = 0x000,
652
653
  // R600-based processors.
654
655
  // Radeon HD 2000/3000 Series (R600).
656
  EF_AMDGPU_MACH_R600_R600 = 0x001,
657
  EF_AMDGPU_MACH_R600_R630 = 0x002,
658
  EF_AMDGPU_MACH_R600_RS880 = 0x003,
659
  EF_AMDGPU_MACH_R600_RV670 = 0x004,
660
  // Radeon HD 4000 Series (R700).
661
  EF_AMDGPU_MACH_R600_RV710 = 0x005,
662
  EF_AMDGPU_MACH_R600_RV730 = 0x006,
663
  EF_AMDGPU_MACH_R600_RV770 = 0x007,
664
  // Radeon HD 5000 Series (Evergreen).
665
  EF_AMDGPU_MACH_R600_CEDAR = 0x008,
666
  EF_AMDGPU_MACH_R600_CYPRESS = 0x009,
667
  EF_AMDGPU_MACH_R600_JUNIPER = 0x00a,
668
  EF_AMDGPU_MACH_R600_REDWOOD = 0x00b,
669
  EF_AMDGPU_MACH_R600_SUMO = 0x00c,
670
  // Radeon HD 6000 Series (Northern Islands).
671
  EF_AMDGPU_MACH_R600_BARTS = 0x00d,
672
  EF_AMDGPU_MACH_R600_CAICOS = 0x00e,
673
  EF_AMDGPU_MACH_R600_CAYMAN = 0x00f,
674
  EF_AMDGPU_MACH_R600_TURKS = 0x010,
675
676
  // Reserved for R600-based processors.
677
  EF_AMDGPU_MACH_R600_RESERVED_FIRST = 0x011,
678
  EF_AMDGPU_MACH_R600_RESERVED_LAST = 0x01f,
679
680
  // First/last R600-based processors.
681
  EF_AMDGPU_MACH_R600_FIRST = EF_AMDGPU_MACH_R600_R600,
682
  EF_AMDGPU_MACH_R600_LAST = EF_AMDGPU_MACH_R600_TURKS,
683
684
  // AMDGCN-based processors.
685
686
  // AMDGCN GFX6.
687
  EF_AMDGPU_MACH_AMDGCN_GFX600 = 0x020,
688
  EF_AMDGPU_MACH_AMDGCN_GFX601 = 0x021,
689
  // AMDGCN GFX7.
690
  EF_AMDGPU_MACH_AMDGCN_GFX700 = 0x022,
691
  EF_AMDGPU_MACH_AMDGCN_GFX701 = 0x023,
692
  EF_AMDGPU_MACH_AMDGCN_GFX702 = 0x024,
693
  EF_AMDGPU_MACH_AMDGCN_GFX703 = 0x025,
694
  EF_AMDGPU_MACH_AMDGCN_GFX704 = 0x026,
695
  // AMDGCN GFX8.
696
  EF_AMDGPU_MACH_AMDGCN_GFX801 = 0x028,
697
  EF_AMDGPU_MACH_AMDGCN_GFX802 = 0x029,
698
  EF_AMDGPU_MACH_AMDGCN_GFX803 = 0x02a,
699
  EF_AMDGPU_MACH_AMDGCN_GFX810 = 0x02b,
700
  // AMDGCN GFX9.
701
  EF_AMDGPU_MACH_AMDGCN_GFX900 = 0x02c,
702
  EF_AMDGPU_MACH_AMDGCN_GFX902 = 0x02d,
703
  EF_AMDGPU_MACH_AMDGCN_GFX904 = 0x02e,
704
  EF_AMDGPU_MACH_AMDGCN_GFX906 = 0x02f,
705
  EF_AMDGPU_MACH_AMDGCN_GFX908 = 0x030,
706
  EF_AMDGPU_MACH_AMDGCN_GFX909 = 0x031,
707
  // AMDGCN GFX10.
708
  EF_AMDGPU_MACH_AMDGCN_GFX1010 = 0x033,
709
  EF_AMDGPU_MACH_AMDGCN_GFX1011 = 0x034,
710
  EF_AMDGPU_MACH_AMDGCN_GFX1012 = 0x035,
711
712
  // Reserved for AMDGCN-based processors.
713
  EF_AMDGPU_MACH_AMDGCN_RESERVED0 = 0x027,
714
  EF_AMDGPU_MACH_AMDGCN_RESERVED1 = 0x032,
715
716
  // First/last AMDGCN-based processors.
717
  EF_AMDGPU_MACH_AMDGCN_FIRST = EF_AMDGPU_MACH_AMDGCN_GFX600,
718
  EF_AMDGPU_MACH_AMDGCN_LAST = EF_AMDGPU_MACH_AMDGCN_GFX1012,
719
720
  // Indicates if the "xnack" target feature is enabled for all code contained
721
  // in the object.
722
  EF_AMDGPU_XNACK = 0x100,
723
  // Indicates if the "sram-ecc" target feature is enabled for all code
724
  // contained in the object.
725
  EF_AMDGPU_SRAM_ECC = 0x200,
726
};
727
728
// ELF Relocation types for AMDGPU
729
enum {
730
#include "ELFRelocs/AMDGPU.def"
731
};
732
733
// ELF Relocation types for BPF
734
enum {
735
#include "ELFRelocs/BPF.def"
736
};
737
738
// MSP430 specific e_flags
739
enum : unsigned {
740
  EF_MSP430_MACH_MSP430x11 = 11,
741
  EF_MSP430_MACH_MSP430x11x1 = 110,
742
  EF_MSP430_MACH_MSP430x12 = 12,
743
  EF_MSP430_MACH_MSP430x13 = 13,
744
  EF_MSP430_MACH_MSP430x14 = 14,
745
  EF_MSP430_MACH_MSP430x15 = 15,
746
  EF_MSP430_MACH_MSP430x16 = 16,
747
  EF_MSP430_MACH_MSP430x20 = 20,
748
  EF_MSP430_MACH_MSP430x22 = 22,
749
  EF_MSP430_MACH_MSP430x23 = 23,
750
  EF_MSP430_MACH_MSP430x24 = 24,
751
  EF_MSP430_MACH_MSP430x26 = 26,
752
  EF_MSP430_MACH_MSP430x31 = 31,
753
  EF_MSP430_MACH_MSP430x32 = 32,
754
  EF_MSP430_MACH_MSP430x33 = 33,
755
  EF_MSP430_MACH_MSP430x41 = 41,
756
  EF_MSP430_MACH_MSP430x42 = 42,
757
  EF_MSP430_MACH_MSP430x43 = 43,
758
  EF_MSP430_MACH_MSP430x44 = 44,
759
  EF_MSP430_MACH_MSP430X = 45,
760
  EF_MSP430_MACH_MSP430x46 = 46,
761
  EF_MSP430_MACH_MSP430x47 = 47,
762
  EF_MSP430_MACH_MSP430x54 = 54,
763
};
764
765
// ELF Relocation types for MSP430
766
enum {
767
#include "ELFRelocs/MSP430.def"
768
};
769
770
#undef ELF_RELOC
771
772
// Section header.
773
struct Elf32_Shdr {
774
  Elf32_Word sh_name;      // Section name (index into string table)
775
  Elf32_Word sh_type;      // Section type (SHT_*)
776
  Elf32_Word sh_flags;     // Section flags (SHF_*)
777
  Elf32_Addr sh_addr;      // Address where section is to be loaded
778
  Elf32_Off sh_offset;     // File offset of section data, in bytes
779
  Elf32_Word sh_size;      // Size of section, in bytes
780
  Elf32_Word sh_link;      // Section type-specific header table index link
781
  Elf32_Word sh_info;      // Section type-specific extra information
782
  Elf32_Word sh_addralign; // Section address alignment
783
  Elf32_Word sh_entsize;   // Size of records contained within the section
784
};
785
786
// Section header for ELF64 - same fields as ELF32, different types.
787
struct Elf64_Shdr {
788
  Elf64_Word sh_name;
789
  Elf64_Word sh_type;
790
  Elf64_Xword sh_flags;
791
  Elf64_Addr sh_addr;
792
  Elf64_Off sh_offset;
793
  Elf64_Xword sh_size;
794
  Elf64_Word sh_link;
795
  Elf64_Word sh_info;
796
  Elf64_Xword sh_addralign;
797
  Elf64_Xword sh_entsize;
798
};
799
800
// Special section indices.
801
enum {
802
  SHN_UNDEF = 0,          // Undefined, missing, irrelevant, or meaningless
803
  SHN_LORESERVE = 0xff00, // Lowest reserved index
804
  SHN_LOPROC = 0xff00,    // Lowest processor-specific index
805
  SHN_HIPROC = 0xff1f,    // Highest processor-specific index
806
  SHN_LOOS = 0xff20,      // Lowest operating system-specific index
807
  SHN_HIOS = 0xff3f,      // Highest operating system-specific index
808
  SHN_ABS = 0xfff1,       // Symbol has absolute value; does not need relocation
809
  SHN_COMMON = 0xfff2,    // FORTRAN COMMON or C external global variables
810
  SHN_XINDEX = 0xffff,    // Mark that the index is >= SHN_LORESERVE
811
  SHN_HIRESERVE = 0xffff  // Highest reserved index
812
};
813
814
// Section types.
815
enum : unsigned {
816
  SHT_NULL = 0,                         // No associated section (inactive entry).
817
  SHT_PROGBITS = 1,                     // Program-defined contents.
818
  SHT_SYMTAB = 2,                       // Symbol table.
819
  SHT_STRTAB = 3,                       // String table.
820
  SHT_RELA = 4,                         // Relocation entries; explicit addends.
821
  SHT_HASH = 5,                         // Symbol hash table.
822
  SHT_DYNAMIC = 6,                      // Information for dynamic linking.
823
  SHT_NOTE = 7,                         // Information about the file.
824
  SHT_NOBITS = 8,                       // Data occupies no space in the file.
825
  SHT_REL = 9,                          // Relocation entries; no explicit addends.
826
  SHT_SHLIB = 10,                       // Reserved.
827
  SHT_DYNSYM = 11,                      // Symbol table.
828
  SHT_INIT_ARRAY = 14,                  // Pointers to initialization functions.
829
  SHT_FINI_ARRAY = 15,                  // Pointers to termination functions.
830
  SHT_PREINIT_ARRAY = 16,               // Pointers to pre-init functions.
831
  SHT_GROUP = 17,                       // Section group.
832
  SHT_SYMTAB_SHNDX = 18,                // Indices for SHN_XINDEX entries.
833
  // Experimental support for SHT_RELR sections. For details, see proposal
834
  // at https://groups.google.com/forum/#!topic/generic-abi/bX460iggiKg
835
  SHT_RELR = 19,                        // Relocation entries; only offsets.
836
  SHT_LOOS = 0x60000000,                // Lowest operating system-specific type.
837
  // Android packed relocation section types.
838
  // https://android.googlesource.com/platform/bionic/+/6f12bfece5dcc01325e0abba56a46b1bcf991c69/tools/relocation_packer/src/elf_file.cc#37
839
  SHT_ANDROID_REL = 0x60000001,
840
  SHT_ANDROID_RELA = 0x60000002,
841
  SHT_LLVM_ODRTAB = 0x6fff4c00,         // LLVM ODR table.
842
  SHT_LLVM_LINKER_OPTIONS = 0x6fff4c01, // LLVM Linker Options.
843
  SHT_LLVM_CALL_GRAPH_PROFILE = 0x6fff4c02, // LLVM Call Graph Profile.
844
  SHT_LLVM_ADDRSIG = 0x6fff4c03,        // List of address-significant symbols
845
                                        // for safe ICF.
846
  SHT_LLVM_DEPENDENT_LIBRARIES = 0x6fff4c04, // LLVM Dependent Library Specifiers.
847
  SHT_LLVM_SYMPART = 0x6fff4c05,        // Symbol partition specification.
848
  SHT_LLVM_PART_EHDR = 0x6fff4c06,      // ELF header for loadable partition.
849
  SHT_LLVM_PART_PHDR = 0x6fff4c07,      // Phdrs for loadable partition.
850
  // Android's experimental support for SHT_RELR sections.
851
  // https://android.googlesource.com/platform/bionic/+/b7feec74547f84559a1467aca02708ff61346d2a/libc/include/elf.h#512
852
  SHT_ANDROID_RELR = 0x6fffff00,        // Relocation entries; only offsets.
853
  SHT_GNU_ATTRIBUTES = 0x6ffffff5,      // Object attributes.
854
  SHT_GNU_HASH = 0x6ffffff6,            // GNU-style hash table.
855
  SHT_GNU_verdef = 0x6ffffffd,          // GNU version definitions.
856
  SHT_GNU_verneed = 0x6ffffffe,         // GNU version references.
857
  SHT_GNU_versym = 0x6fffffff,          // GNU symbol versions table.
858
  SHT_HIOS = 0x6fffffff,                // Highest operating system-specific type.
859
  SHT_LOPROC = 0x70000000,              // Lowest processor arch-specific type.
860
  // Fixme: All this is duplicated in MCSectionELF. Why??
861
  // Exception Index table
862
  SHT_ARM_EXIDX = 0x70000001U,
863
  // BPABI DLL dynamic linking pre-emption map
864
  SHT_ARM_PREEMPTMAP = 0x70000002U,
865
  //  Object file compatibility attributes
866
  SHT_ARM_ATTRIBUTES = 0x70000003U,
867
  SHT_ARM_DEBUGOVERLAY = 0x70000004U,
868
  SHT_ARM_OVERLAYSECTION = 0x70000005U,
869
  SHT_HEX_ORDERED = 0x70000000,         // Link editor is to sort the entries in
870
                                        // this section based on their sizes
871
  SHT_X86_64_UNWIND = 0x70000001,       // Unwind information
872
873
  SHT_MIPS_REGINFO = 0x70000006,        // Register usage information
874
  SHT_MIPS_OPTIONS = 0x7000000d,        // General options
875
  SHT_MIPS_DWARF = 0x7000001e,          // DWARF debugging section.
876
  SHT_MIPS_ABIFLAGS = 0x7000002a,       // ABI information.
877
878
  SHT_MSP430_ATTRIBUTES = 0x70000003U,
879
880
  SHT_HIPROC = 0x7fffffff,              // Highest processor arch-specific type.
881
  SHT_LOUSER = 0x80000000,              // Lowest type reserved for applications.
882
  SHT_HIUSER = 0xffffffff               // Highest type reserved for applications.
883
};
884
885
// Section flags.
886
enum : unsigned {
887
  // Section data should be writable during execution.
888
  SHF_WRITE = 0x1,
889
890
  // Section occupies memory during program execution.
891
  SHF_ALLOC = 0x2,
892
893
  // Section contains executable machine instructions.
894
  SHF_EXECINSTR = 0x4,
895
896
  // The data in this section may be merged.
897
  SHF_MERGE = 0x10,
898
899
  // The data in this section is null-terminated strings.
900
  SHF_STRINGS = 0x20,
901
902
  // A field in this section holds a section header table index.
903
  SHF_INFO_LINK = 0x40U,
904
905
  // Adds special ordering requirements for link editors.
906
  SHF_LINK_ORDER = 0x80U,
907
908
  // This section requires special OS-specific processing to avoid incorrect
909
  // behavior.
910
  SHF_OS_NONCONFORMING = 0x100U,
911
912
  // This section is a member of a section group.
913
  SHF_GROUP = 0x200U,
914
915
  // This section holds Thread-Local Storage.
916
  SHF_TLS = 0x400U,
917
918
  // Identifies a section containing compressed data.
919
  SHF_COMPRESSED = 0x800U,
920
921
  // This section is excluded from the final executable or shared library.
922
  SHF_EXCLUDE = 0x80000000U,
923
924
  // Start of target-specific flags.
925
926
  SHF_MASKOS = 0x0ff00000,
927
928
  // Bits indicating processor-specific flags.
929
  SHF_MASKPROC = 0xf0000000,
930
931
  /// All sections with the "d" flag are grouped together by the linker to form
932
  /// the data section and the dp register is set to the start of the section by
933
  /// the boot code.
934
  XCORE_SHF_DP_SECTION = 0x10000000,
935
936
  /// All sections with the "c" flag are grouped together by the linker to form
937
  /// the constant pool and the cp register is set to the start of the constant
938
  /// pool by the boot code.
939
  XCORE_SHF_CP_SECTION = 0x20000000,
940
941
  // If an object file section does not have this flag set, then it may not hold
942
  // more than 2GB and can be freely referred to in objects using smaller code
943
  // models. Otherwise, only objects using larger code models can refer to them.
944
  // For example, a medium code model object can refer to data in a section that
945
  // sets this flag besides being able to refer to data in a section that does
946
  // not set it; likewise, a small code model object can refer only to code in a
947
  // section that does not set this flag.
948
  SHF_X86_64_LARGE = 0x10000000,
949
950
  // All sections with the GPREL flag are grouped into a global data area
951
  // for faster accesses
952
  SHF_HEX_GPREL = 0x10000000,
953
954
  // Section contains text/data which may be replicated in other sections.
955
  // Linker must retain only one copy.
956
  SHF_MIPS_NODUPES = 0x01000000,
957
958
  // Linker must generate implicit hidden weak names.
959
  SHF_MIPS_NAMES = 0x02000000,
960
961
  // Section data local to process.
962
  SHF_MIPS_LOCAL = 0x04000000,
963
964
  // Do not strip this section.
965
  SHF_MIPS_NOSTRIP = 0x08000000,
966
967
  // Section must be part of global data area.
968
  SHF_MIPS_GPREL = 0x10000000,
969
970
  // This section should be merged.
971
  SHF_MIPS_MERGE = 0x20000000,
972
973
  // Address size to be inferred from section entry size.
974
  SHF_MIPS_ADDR = 0x40000000,
975
976
  // Section data is string data by default.
977
  SHF_MIPS_STRING = 0x80000000,
978
979
  // Make code section unreadable when in execute-only mode
980
  SHF_ARM_PURECODE = 0x20000000
981
};
982
983
// Section Group Flags
984
enum : unsigned {
985
  GRP_COMDAT = 0x1,
986
  GRP_MASKOS = 0x0ff00000,
987
  GRP_MASKPROC = 0xf0000000
988
};
989
990
// Symbol table entries for ELF32.
991
struct Elf32_Sym {
992
  Elf32_Word st_name;     // Symbol name (index into string table)
993
  Elf32_Addr st_value;    // Value or address associated with the symbol
994
  Elf32_Word st_size;     // Size of the symbol
995
  unsigned char st_info;  // Symbol's type and binding attributes
996
  unsigned char st_other; // Must be zero; reserved
997
  Elf32_Half st_shndx;    // Which section (header table index) it's defined in
998
999
  // These accessors and mutators correspond to the ELF32_ST_BIND,
1000
  // ELF32_ST_TYPE, and ELF32_ST_INFO macros defined in the ELF specification:
1001
0
  unsigned char getBinding() const { return st_info >> 4; }
1002
0
  unsigned char getType() const { return st_info & 0x0f; }
1003
0
  void setBinding(unsigned char b) { setBindingAndType(b, getType()); }
1004
0
  void setType(unsigned char t) { setBindingAndType(getBinding(), t); }
1005
0
  void setBindingAndType(unsigned char b, unsigned char t) {
1006
0
    st_info = (b << 4) + (t & 0x0f);
1007
0
  }
1008
};
1009
1010
// Symbol table entries for ELF64.
1011
struct Elf64_Sym {
1012
  Elf64_Word st_name;     // Symbol name (index into string table)
1013
  unsigned char st_info;  // Symbol's type and binding attributes
1014
  unsigned char st_other; // Must be zero; reserved
1015
  Elf64_Half st_shndx;    // Which section (header tbl index) it's defined in
1016
  Elf64_Addr st_value;    // Value or address associated with the symbol
1017
  Elf64_Xword st_size;    // Size of the symbol
1018
1019
  // These accessors and mutators are identical to those defined for ELF32
1020
  // symbol table entries.
1021
0
  unsigned char getBinding() const { return st_info >> 4; }
1022
0
  unsigned char getType() const { return st_info & 0x0f; }
1023
0
  void setBinding(unsigned char b) { setBindingAndType(b, getType()); }
1024
0
  void setType(unsigned char t) { setBindingAndType(getBinding(), t); }
1025
0
  void setBindingAndType(unsigned char b, unsigned char t) {
1026
0
    st_info = (b << 4) + (t & 0x0f);
1027
0
  }
1028
};
1029
1030
// The size (in bytes) of symbol table entries.
1031
enum {
1032
  SYMENTRY_SIZE32 = 16, // 32-bit symbol entry size
1033
  SYMENTRY_SIZE64 = 24  // 64-bit symbol entry size.
1034
};
1035
1036
// Symbol bindings.
1037
enum {
1038
  STB_LOCAL = 0,  // Local symbol, not visible outside obj file containing def
1039
  STB_GLOBAL = 1, // Global symbol, visible to all object files being combined
1040
  STB_WEAK = 2,   // Weak symbol, like global but lower-precedence
1041
  STB_GNU_UNIQUE = 10,
1042
  STB_LOOS = 10,   // Lowest operating system-specific binding type
1043
  STB_HIOS = 12,   // Highest operating system-specific binding type
1044
  STB_LOPROC = 13, // Lowest processor-specific binding type
1045
  STB_HIPROC = 15  // Highest processor-specific binding type
1046
};
1047
1048
// Symbol types.
1049
enum {
1050
  STT_NOTYPE = 0,     // Symbol's type is not specified
1051
  STT_OBJECT = 1,     // Symbol is a data object (variable, array, etc.)
1052
  STT_FUNC = 2,       // Symbol is executable code (function, etc.)
1053
  STT_SECTION = 3,    // Symbol refers to a section
1054
  STT_FILE = 4,       // Local, absolute symbol that refers to a file
1055
  STT_COMMON = 5,     // An uninitialized common block
1056
  STT_TLS = 6,        // Thread local data object
1057
  STT_GNU_IFUNC = 10, // GNU indirect function
1058
  STT_LOOS = 10,      // Lowest operating system-specific symbol type
1059
  STT_HIOS = 12,      // Highest operating system-specific symbol type
1060
  STT_LOPROC = 13,    // Lowest processor-specific symbol type
1061
  STT_HIPROC = 15,    // Highest processor-specific symbol type
1062
1063
  // AMDGPU symbol types
1064
  STT_AMDGPU_HSA_KERNEL = 10
1065
};
1066
1067
enum {
1068
  STV_DEFAULT = 0,  // Visibility is specified by binding type
1069
  STV_INTERNAL = 1, // Defined by processor supplements
1070
  STV_HIDDEN = 2,   // Not visible to other components
1071
  STV_PROTECTED = 3 // Visible in other components but not preemptable
1072
};
1073
1074
// Symbol number.
1075
enum { STN_UNDEF = 0 };
1076
1077
// Special relocation symbols used in the MIPS64 ELF relocation entries
1078
enum {
1079
  RSS_UNDEF = 0, // None
1080
  RSS_GP = 1,    // Value of gp
1081
  RSS_GP0 = 2,   // Value of gp used to create object being relocated
1082
  RSS_LOC = 3    // Address of location being relocated
1083
};
1084
1085
// Relocation entry, without explicit addend.
1086
struct Elf32_Rel {
1087
  Elf32_Addr r_offset; // Location (file byte offset, or program virtual addr)
1088
  Elf32_Word r_info;   // Symbol table index and type of relocation to apply
1089
1090
  // These accessors and mutators correspond to the ELF32_R_SYM, ELF32_R_TYPE,
1091
  // and ELF32_R_INFO macros defined in the ELF specification:
1092
0
  Elf32_Word getSymbol() const { return (r_info >> 8); }
1093
0
  unsigned char getType() const { return (unsigned char)(r_info & 0x0ff); }
1094
0
  void setSymbol(Elf32_Word s) { setSymbolAndType(s, getType()); }
1095
0
  void setType(unsigned char t) { setSymbolAndType(getSymbol(), t); }
1096
0
  void setSymbolAndType(Elf32_Word s, unsigned char t) {
1097
0
    r_info = (s << 8) + t;
1098
0
  }
1099
};
1100
1101
// Relocation entry with explicit addend.
1102
struct Elf32_Rela {
1103
  Elf32_Addr r_offset;  // Location (file byte offset, or program virtual addr)
1104
  Elf32_Word r_info;    // Symbol table index and type of relocation to apply
1105
  Elf32_Sword r_addend; // Compute value for relocatable field by adding this
1106
1107
  // These accessors and mutators correspond to the ELF32_R_SYM, ELF32_R_TYPE,
1108
  // and ELF32_R_INFO macros defined in the ELF specification:
1109
0
  Elf32_Word getSymbol() const { return (r_info >> 8); }
1110
0
  unsigned char getType() const { return (unsigned char)(r_info & 0x0ff); }
1111
0
  void setSymbol(Elf32_Word s) { setSymbolAndType(s, getType()); }
1112
0
  void setType(unsigned char t) { setSymbolAndType(getSymbol(), t); }
1113
5.57k
  void setSymbolAndType(Elf32_Word s, unsigned char t) {
1114
5.57k
    r_info = (s << 8) + t;
1115
5.57k
  }
1116
};
1117
1118
// Relocation entry without explicit addend or info (relative relocations only).
1119
typedef Elf32_Word Elf32_Relr; // offset/bitmap for relative relocations
1120
1121
// Relocation entry, without explicit addend.
1122
struct Elf64_Rel {
1123
  Elf64_Addr r_offset; // Location (file byte offset, or program virtual addr).
1124
  Elf64_Xword r_info;  // Symbol table index and type of relocation to apply.
1125
1126
  // These accessors and mutators correspond to the ELF64_R_SYM, ELF64_R_TYPE,
1127
  // and ELF64_R_INFO macros defined in the ELF specification:
1128
0
  Elf64_Word getSymbol() const { return (r_info >> 32); }
1129
0
  Elf64_Word getType() const { return (Elf64_Word)(r_info & 0xffffffffL); }
1130
0
  void setSymbol(Elf64_Word s) { setSymbolAndType(s, getType()); }
1131
0
  void setType(Elf64_Word t) { setSymbolAndType(getSymbol(), t); }
1132
0
  void setSymbolAndType(Elf64_Word s, Elf64_Word t) {
1133
0
    r_info = ((Elf64_Xword)s << 32) + (t & 0xffffffffL);
1134
0
  }
1135
};
1136
1137
// Relocation entry with explicit addend.
1138
struct Elf64_Rela {
1139
  Elf64_Addr r_offset; // Location (file byte offset, or program virtual addr).
1140
  Elf64_Xword r_info;  // Symbol table index and type of relocation to apply.
1141
  Elf64_Sxword r_addend; // Compute value for relocatable field by adding this.
1142
1143
  // These accessors and mutators correspond to the ELF64_R_SYM, ELF64_R_TYPE,
1144
  // and ELF64_R_INFO macros defined in the ELF specification:
1145
0
  Elf64_Word getSymbol() const { return (r_info >> 32); }
1146
0
  Elf64_Word getType() const { return (Elf64_Word)(r_info & 0xffffffffL); }
1147
0
  void setSymbol(Elf64_Word s) { setSymbolAndType(s, getType()); }
1148
0
  void setType(Elf64_Word t) { setSymbolAndType(getSymbol(), t); }
1149
10.8k
  void setSymbolAndType(Elf64_Word s, Elf64_Word t) {
1150
10.8k
    r_info = ((Elf64_Xword)s << 32) + (t & 0xffffffffL);
1151
10.8k
  }
1152
};
1153
1154
// Relocation entry without explicit addend or info (relative relocations only).
1155
typedef Elf64_Xword Elf64_Relr; // offset/bitmap for relative relocations
1156
1157
// Program header for ELF32.
1158
struct Elf32_Phdr {
1159
  Elf32_Word p_type;   // Type of segment
1160
  Elf32_Off p_offset;  // File offset where segment is located, in bytes
1161
  Elf32_Addr p_vaddr;  // Virtual address of beginning of segment
1162
  Elf32_Addr p_paddr;  // Physical address of beginning of segment (OS-specific)
1163
  Elf32_Word p_filesz; // Num. of bytes in file image of segment (may be zero)
1164
  Elf32_Word p_memsz;  // Num. of bytes in mem image of segment (may be zero)
1165
  Elf32_Word p_flags;  // Segment flags
1166
  Elf32_Word p_align;  // Segment alignment constraint
1167
};
1168
1169
// Program header for ELF64.
1170
struct Elf64_Phdr {
1171
  Elf64_Word p_type;    // Type of segment
1172
  Elf64_Word p_flags;   // Segment flags
1173
  Elf64_Off p_offset;   // File offset where segment is located, in bytes
1174
  Elf64_Addr p_vaddr;   // Virtual address of beginning of segment
1175
  Elf64_Addr p_paddr;   // Physical addr of beginning of segment (OS-specific)
1176
  Elf64_Xword p_filesz; // Num. of bytes in file image of segment (may be zero)
1177
  Elf64_Xword p_memsz;  // Num. of bytes in mem image of segment (may be zero)
1178
  Elf64_Xword p_align;  // Segment alignment constraint
1179
};
1180
1181
// Segment types.
1182
enum {
1183
  PT_NULL = 0,            // Unused segment.
1184
  PT_LOAD = 1,            // Loadable segment.
1185
  PT_DYNAMIC = 2,         // Dynamic linking information.
1186
  PT_INTERP = 3,          // Interpreter pathname.
1187
  PT_NOTE = 4,            // Auxiliary information.
1188
  PT_SHLIB = 5,           // Reserved.
1189
  PT_PHDR = 6,            // The program header table itself.
1190
  PT_TLS = 7,             // The thread-local storage template.
1191
  PT_LOOS = 0x60000000,   // Lowest operating system-specific pt entry type.
1192
  PT_HIOS = 0x6fffffff,   // Highest operating system-specific pt entry type.
1193
  PT_LOPROC = 0x70000000, // Lowest processor-specific program hdr entry type.
1194
  PT_HIPROC = 0x7fffffff, // Highest processor-specific program hdr entry type.
1195
1196
  // x86-64 program header types.
1197
  // These all contain stack unwind tables.
1198
  PT_GNU_EH_FRAME = 0x6474e550,
1199
  PT_SUNW_EH_FRAME = 0x6474e550,
1200
  PT_SUNW_UNWIND = 0x6464e550,
1201
1202
  PT_GNU_STACK = 0x6474e551, // Indicates stack executability.
1203
  PT_GNU_RELRO = 0x6474e552, // Read-only after relocation.
1204
1205
  PT_OPENBSD_RANDOMIZE = 0x65a3dbe6, // Fill with random data.
1206
  PT_OPENBSD_WXNEEDED = 0x65a3dbe7,  // Program does W^X violations.
1207
  PT_OPENBSD_BOOTDATA = 0x65a41be6,  // Section for boot arguments.
1208
1209
  // ARM program header types.
1210
  PT_ARM_ARCHEXT = 0x70000000, // Platform architecture compatibility info
1211
  // These all contain stack unwind tables.
1212
  PT_ARM_EXIDX = 0x70000001,
1213
  PT_ARM_UNWIND = 0x70000001,
1214
1215
  // MIPS program header types.
1216
  PT_MIPS_REGINFO = 0x70000000,  // Register usage information.
1217
  PT_MIPS_RTPROC = 0x70000001,   // Runtime procedure table.
1218
  PT_MIPS_OPTIONS = 0x70000002,  // Options segment.
1219
  PT_MIPS_ABIFLAGS = 0x70000003, // Abiflags segment.
1220
};
1221
1222
// Segment flag bits.
1223
enum : unsigned {
1224
  PF_X = 1,                // Execute
1225
  PF_W = 2,                // Write
1226
  PF_R = 4,                // Read
1227
  PF_MASKOS = 0x0ff00000,  // Bits for operating system-specific semantics.
1228
  PF_MASKPROC = 0xf0000000 // Bits for processor-specific semantics.
1229
};
1230
1231
// Dynamic table entry for ELF32.
1232
struct Elf32_Dyn {
1233
  Elf32_Sword d_tag; // Type of dynamic table entry.
1234
  union {
1235
    Elf32_Word d_val; // Integer value of entry.
1236
    Elf32_Addr d_ptr; // Pointer value of entry.
1237
  } d_un;
1238
};
1239
1240
// Dynamic table entry for ELF64.
1241
struct Elf64_Dyn {
1242
  Elf64_Sxword d_tag; // Type of dynamic table entry.
1243
  union {
1244
    Elf64_Xword d_val; // Integer value of entry.
1245
    Elf64_Addr d_ptr;  // Pointer value of entry.
1246
  } d_un;
1247
};
1248
1249
// Dynamic table entry tags.
1250
enum {
1251
#define DYNAMIC_TAG(name, value) DT_##name = value,
1252
#include "DynamicTags.def"
1253
#undef DYNAMIC_TAG
1254
};
1255
1256
// DT_FLAGS values.
1257
enum {
1258
  DF_ORIGIN = 0x01,    // The object may reference $ORIGIN.
1259
  DF_SYMBOLIC = 0x02,  // Search the shared lib before searching the exe.
1260
  DF_TEXTREL = 0x04,   // Relocations may modify a non-writable segment.
1261
  DF_BIND_NOW = 0x08,  // Process all relocations on load.
1262
  DF_STATIC_TLS = 0x10 // Reject attempts to load dynamically.
1263
};
1264
1265
// State flags selectable in the `d_un.d_val' element of the DT_FLAGS_1 entry.
1266
enum {
1267
  DF_1_NOW = 0x00000001,       // Set RTLD_NOW for this object.
1268
  DF_1_GLOBAL = 0x00000002,    // Set RTLD_GLOBAL for this object.
1269
  DF_1_GROUP = 0x00000004,     // Set RTLD_GROUP for this object.
1270
  DF_1_NODELETE = 0x00000008,  // Set RTLD_NODELETE for this object.
1271
  DF_1_LOADFLTR = 0x00000010,  // Trigger filtee loading at runtime.
1272
  DF_1_INITFIRST = 0x00000020, // Set RTLD_INITFIRST for this object.
1273
  DF_1_NOOPEN = 0x00000040,    // Set RTLD_NOOPEN for this object.
1274
  DF_1_ORIGIN = 0x00000080,    // $ORIGIN must be handled.
1275
  DF_1_DIRECT = 0x00000100,    // Direct binding enabled.
1276
  DF_1_TRANS = 0x00000200,
1277
  DF_1_INTERPOSE = 0x00000400,  // Object is used to interpose.
1278
  DF_1_NODEFLIB = 0x00000800,   // Ignore default lib search path.
1279
  DF_1_NODUMP = 0x00001000,     // Object can't be dldump'ed.
1280
  DF_1_CONFALT = 0x00002000,    // Configuration alternative created.
1281
  DF_1_ENDFILTEE = 0x00004000,  // Filtee terminates filters search.
1282
  DF_1_DISPRELDNE = 0x00008000, // Disp reloc applied at build time.
1283
  DF_1_DISPRELPND = 0x00010000, // Disp reloc applied at run-time.
1284
  DF_1_NODIRECT = 0x00020000,   // Object has no-direct binding.
1285
  DF_1_IGNMULDEF = 0x00040000,
1286
  DF_1_NOKSYMS = 0x00080000,
1287
  DF_1_NOHDR = 0x00100000,
1288
  DF_1_EDITED = 0x00200000, // Object is modified after built.
1289
  DF_1_NORELOC = 0x00400000,
1290
  DF_1_SYMINTPOSE = 0x00800000, // Object has individual interposers.
1291
  DF_1_GLOBAUDIT = 0x01000000,  // Global auditing required.
1292
  DF_1_SINGLETON = 0x02000000   // Singleton symbols are used.
1293
};
1294
1295
// DT_MIPS_FLAGS values.
1296
enum {
1297
  RHF_NONE = 0x00000000,                   // No flags.
1298
  RHF_QUICKSTART = 0x00000001,             // Uses shortcut pointers.
1299
  RHF_NOTPOT = 0x00000002,                 // Hash size is not a power of two.
1300
  RHS_NO_LIBRARY_REPLACEMENT = 0x00000004, // Ignore LD_LIBRARY_PATH.
1301
  RHF_NO_MOVE = 0x00000008,                // DSO address may not be relocated.
1302
  RHF_SGI_ONLY = 0x00000010,               // SGI specific features.
1303
  RHF_GUARANTEE_INIT = 0x00000020,         // Guarantee that .init will finish
1304
                                           // executing before any non-init
1305
                                           // code in DSO is called.
1306
  RHF_DELTA_C_PLUS_PLUS = 0x00000040,      // Contains Delta C++ code.
1307
  RHF_GUARANTEE_START_INIT = 0x00000080,   // Guarantee that .init will start
1308
                                           // executing before any non-init
1309
                                           // code in DSO is called.
1310
  RHF_PIXIE = 0x00000100,                  // Generated by pixie.
1311
  RHF_DEFAULT_DELAY_LOAD = 0x00000200,     // Delay-load DSO by default.
1312
  RHF_REQUICKSTART = 0x00000400,           // Object may be requickstarted
1313
  RHF_REQUICKSTARTED = 0x00000800,         // Object has been requickstarted
1314
  RHF_CORD = 0x00001000,                   // Generated by cord.
1315
  RHF_NO_UNRES_UNDEF = 0x00002000,         // Object contains no unresolved
1316
                                           // undef symbols.
1317
  RHF_RLD_ORDER_SAFE = 0x00004000          // Symbol table is in a safe order.
1318
};
1319
1320
// ElfXX_VerDef structure version (GNU versioning)
1321
enum { VER_DEF_NONE = 0, VER_DEF_CURRENT = 1 };
1322
1323
// VerDef Flags (ElfXX_VerDef::vd_flags)
1324
enum { VER_FLG_BASE = 0x1, VER_FLG_WEAK = 0x2, VER_FLG_INFO = 0x4 };
1325
1326
// Special constants for the version table. (SHT_GNU_versym/.gnu.version)
1327
enum {
1328
  VER_NDX_LOCAL = 0,       // Unversioned local symbol
1329
  VER_NDX_GLOBAL = 1,      // Unversioned global symbol
1330
  VERSYM_VERSION = 0x7fff, // Version Index mask
1331
  VERSYM_HIDDEN = 0x8000   // Hidden bit (non-default version)
1332
};
1333
1334
// ElfXX_VerNeed structure version (GNU versioning)
1335
enum { VER_NEED_NONE = 0, VER_NEED_CURRENT = 1 };
1336
1337
// SHT_NOTE section types
1338
enum {
1339
  NT_FREEBSD_THRMISC = 7,
1340
  NT_FREEBSD_PROCSTAT_PROC = 8,
1341
  NT_FREEBSD_PROCSTAT_FILES = 9,
1342
  NT_FREEBSD_PROCSTAT_VMMAP = 10,
1343
  NT_FREEBSD_PROCSTAT_GROUPS = 11,
1344
  NT_FREEBSD_PROCSTAT_UMASK = 12,
1345
  NT_FREEBSD_PROCSTAT_RLIMIT = 13,
1346
  NT_FREEBSD_PROCSTAT_OSREL = 14,
1347
  NT_FREEBSD_PROCSTAT_PSSTRINGS = 15,
1348
  NT_FREEBSD_PROCSTAT_AUXV = 16,
1349
};
1350
1351
// Generic note types
1352
enum : unsigned {
1353
  NT_VERSION = 1,
1354
  NT_ARCH = 2,
1355
  NT_GNU_BUILD_ATTRIBUTE_OPEN = 0x100,
1356
  NT_GNU_BUILD_ATTRIBUTE_FUNC = 0x101,
1357
};
1358
1359
enum {
1360
  NT_GNU_ABI_TAG = 1,
1361
  NT_GNU_HWCAP = 2,
1362
  NT_GNU_BUILD_ID = 3,
1363
  NT_GNU_GOLD_VERSION = 4,
1364
  NT_GNU_PROPERTY_TYPE_0 = 5,
1365
};
1366
1367
// Property types used in GNU_PROPERTY_TYPE_0 notes.
1368
enum : unsigned {
1369
  GNU_PROPERTY_STACK_SIZE = 1,
1370
  GNU_PROPERTY_NO_COPY_ON_PROTECTED = 2,
1371
  GNU_PROPERTY_AARCH64_FEATURE_1_AND = 0xc0000000,
1372
  GNU_PROPERTY_X86_FEATURE_1_AND = 0xc0000002,
1373
  GNU_PROPERTY_X86_ISA_1_NEEDED = 0xc0008000,
1374
  GNU_PROPERTY_X86_FEATURE_2_NEEDED = 0xc0008001,
1375
  GNU_PROPERTY_X86_ISA_1_USED = 0xc0010000,
1376
  GNU_PROPERTY_X86_FEATURE_2_USED = 0xc0010001,
1377
};
1378
1379
// aarch64 processor feature bits.
1380
enum : unsigned {
1381
  GNU_PROPERTY_AARCH64_FEATURE_1_BTI = 1 << 0,
1382
  GNU_PROPERTY_AARCH64_FEATURE_1_PAC = 1 << 1,
1383
};
1384
1385
// x86 processor feature bits.
1386
enum : unsigned {
1387
  GNU_PROPERTY_X86_FEATURE_1_IBT = 1 << 0,
1388
  GNU_PROPERTY_X86_FEATURE_1_SHSTK = 1 << 1,
1389
1390
  GNU_PROPERTY_X86_ISA_1_CMOV = 1 << 0,
1391
  GNU_PROPERTY_X86_ISA_1_SSE = 1 << 1,
1392
  GNU_PROPERTY_X86_ISA_1_SSE2 = 1 << 2,
1393
  GNU_PROPERTY_X86_ISA_1_SSE3 = 1 << 3,
1394
  GNU_PROPERTY_X86_ISA_1_SSSE3 = 1 << 4,
1395
  GNU_PROPERTY_X86_ISA_1_SSE4_1 = 1 << 5,
1396
  GNU_PROPERTY_X86_ISA_1_SSE4_2 = 1 << 6,
1397
  GNU_PROPERTY_X86_ISA_1_AVX = 1 << 7,
1398
  GNU_PROPERTY_X86_ISA_1_AVX2 = 1 << 8,
1399
  GNU_PROPERTY_X86_ISA_1_FMA = 1 << 9,
1400
  GNU_PROPERTY_X86_ISA_1_AVX512F = 1 << 10,
1401
  GNU_PROPERTY_X86_ISA_1_AVX512CD = 1 << 11,
1402
  GNU_PROPERTY_X86_ISA_1_AVX512ER = 1 << 12,
1403
  GNU_PROPERTY_X86_ISA_1_AVX512PF = 1 << 13,
1404
  GNU_PROPERTY_X86_ISA_1_AVX512VL = 1 << 14,
1405
  GNU_PROPERTY_X86_ISA_1_AVX512DQ = 1 << 15,
1406
  GNU_PROPERTY_X86_ISA_1_AVX512BW = 1 << 16,
1407
  GNU_PROPERTY_X86_ISA_1_AVX512_4FMAPS = 1 << 17,
1408
  GNU_PROPERTY_X86_ISA_1_AVX512_4VNNIW = 1 << 18,
1409
  GNU_PROPERTY_X86_ISA_1_AVX512_BITALG = 1 << 19,
1410
  GNU_PROPERTY_X86_ISA_1_AVX512_IFMA = 1 << 20,
1411
  GNU_PROPERTY_X86_ISA_1_AVX512_VBMI = 1 << 21,
1412
  GNU_PROPERTY_X86_ISA_1_AVX512_VBMI2 = 1 << 22,
1413
  GNU_PROPERTY_X86_ISA_1_AVX512_VNNI = 1 << 23,
1414
1415
  GNU_PROPERTY_X86_FEATURE_2_X86 = 1 << 0,
1416
  GNU_PROPERTY_X86_FEATURE_2_X87 = 1 << 1,
1417
  GNU_PROPERTY_X86_FEATURE_2_MMX = 1 << 2,
1418
  GNU_PROPERTY_X86_FEATURE_2_XMM = 1 << 3,
1419
  GNU_PROPERTY_X86_FEATURE_2_YMM = 1 << 4,
1420
  GNU_PROPERTY_X86_FEATURE_2_ZMM = 1 << 5,
1421
  GNU_PROPERTY_X86_FEATURE_2_FXSR = 1 << 6,
1422
  GNU_PROPERTY_X86_FEATURE_2_XSAVE = 1 << 7,
1423
  GNU_PROPERTY_X86_FEATURE_2_XSAVEOPT = 1 << 8,
1424
  GNU_PROPERTY_X86_FEATURE_2_XSAVEC = 1 << 9,
1425
};
1426
1427
// AMDGPU-specific section indices.
1428
enum {
1429
  SHN_AMDGPU_LDS = 0xff00, // Variable in LDS; symbol encoded like SHN_COMMON
1430
};
1431
1432
// AMD specific notes. (Code Object V2)
1433
enum {
1434
  // Note types with values between 0 and 9 (inclusive) are reserved.
1435
  NT_AMD_AMDGPU_HSA_METADATA = 10,
1436
  NT_AMD_AMDGPU_ISA = 11,
1437
  NT_AMD_AMDGPU_PAL_METADATA = 12
1438
};
1439
1440
// AMDGPU specific notes. (Code Object V3)
1441
enum {
1442
  // Note types with values between 0 and 31 (inclusive) are reserved.
1443
  NT_AMDGPU_METADATA = 32
1444
};
1445
1446
enum {
1447
  GNU_ABI_TAG_LINUX = 0,
1448
  GNU_ABI_TAG_HURD = 1,
1449
  GNU_ABI_TAG_SOLARIS = 2,
1450
  GNU_ABI_TAG_FREEBSD = 3,
1451
  GNU_ABI_TAG_NETBSD = 4,
1452
  GNU_ABI_TAG_SYLLABLE = 5,
1453
  GNU_ABI_TAG_NACL = 6,
1454
};
1455
1456
constexpr const char *ELF_NOTE_GNU = "GNU";
1457
1458
// Android packed relocation group flags.
1459
enum {
1460
  RELOCATION_GROUPED_BY_INFO_FLAG = 1,
1461
  RELOCATION_GROUPED_BY_OFFSET_DELTA_FLAG = 2,
1462
  RELOCATION_GROUPED_BY_ADDEND_FLAG = 4,
1463
  RELOCATION_GROUP_HAS_ADDEND_FLAG = 8,
1464
};
1465
1466
// Compressed section header for ELF32.
1467
struct Elf32_Chdr {
1468
  Elf32_Word ch_type;
1469
  Elf32_Word ch_size;
1470
  Elf32_Word ch_addralign;
1471
};
1472
1473
// Compressed section header for ELF64.
1474
struct Elf64_Chdr {
1475
  Elf64_Word ch_type;
1476
  Elf64_Word ch_reserved;
1477
  Elf64_Xword ch_size;
1478
  Elf64_Xword ch_addralign;
1479
};
1480
1481
// Node header for ELF32.
1482
struct Elf32_Nhdr {
1483
  Elf32_Word n_namesz;
1484
  Elf32_Word n_descsz;
1485
  Elf32_Word n_type;
1486
};
1487
1488
// Node header for ELF64.
1489
struct Elf64_Nhdr {
1490
  Elf64_Word n_namesz;
1491
  Elf64_Word n_descsz;
1492
  Elf64_Word n_type;
1493
};
1494
1495
// Legal values for ch_type field of compressed section header.
1496
enum {
1497
  ELFCOMPRESS_ZLIB = 1,            // ZLIB/DEFLATE algorithm.
1498
  ELFCOMPRESS_LOOS = 0x60000000,   // Start of OS-specific.
1499
  ELFCOMPRESS_HIOS = 0x6fffffff,   // End of OS-specific.
1500
  ELFCOMPRESS_LOPROC = 0x70000000, // Start of processor-specific.
1501
  ELFCOMPRESS_HIPROC = 0x7fffffff  // End of processor-specific.
1502
};
1503
1504
} // end namespace ELF
1505
} // end namespace llvm
1506
1507
#endif // LLVM_BINARYFORMAT_ELF_H