Coverage Report

Created: 2019-02-23 12:57

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
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//== llvm/CodeGen/GlobalISel/LegalizerHelper.h ---------------- -*- C++ -*-==//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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/// \file A pass to convert the target-illegal operations created by IR -> MIR
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/// translation into ones the target expects to be able to select. This may
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/// occur in multiple phases, for example G_ADD <2 x i8> -> G_ADD <2 x i16> ->
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/// G_ADD <4 x i16>.
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///
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/// The LegalizerHelper class is where most of the work happens, and is
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/// designed to be callable from other passes that find themselves with an
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/// illegal instruction.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_GLOBALISEL_MACHINELEGALIZEHELPER_H
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#define LLVM_CODEGEN_GLOBALISEL_MACHINELEGALIZEHELPER_H
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#include "llvm/CodeGen/GlobalISel/CallLowering.h"
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#include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
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#include "llvm/CodeGen/LowLevelType.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/RuntimeLibcalls.h"
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namespace llvm {
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// Forward declarations.
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class LegalizerInfo;
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class Legalizer;
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class MachineRegisterInfo;
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class GISelChangeObserver;
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class LegalizerHelper {
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public:
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  enum LegalizeResult {
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    /// Instruction was already legal and no change was made to the
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    /// MachineFunction.
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    AlreadyLegal,
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    /// Instruction has been legalized and the MachineFunction changed.
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    Legalized,
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    /// Some kind of error has occurred and we could not legalize this
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    /// instruction.
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    UnableToLegalize,
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  };
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  LegalizerHelper(MachineFunction &MF, GISelChangeObserver &Observer,
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                  MachineIRBuilder &B);
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  LegalizerHelper(MachineFunction &MF, const LegalizerInfo &LI,
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                  GISelChangeObserver &Observer, MachineIRBuilder &B);
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  /// Replace \p MI by a sequence of legal instructions that can implement the
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  /// same operation. Note that this means \p MI may be deleted, so any iterator
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  /// steps should be performed before calling this function. \p Helper should
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  /// be initialized to the MachineFunction containing \p MI.
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  ///
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  /// Considered as an opaque blob, the legal code will use and define the same
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  /// registers as \p MI.
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  LegalizeResult legalizeInstrStep(MachineInstr &MI);
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  /// Legalize an instruction by emiting a runtime library call instead.
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  LegalizeResult libcall(MachineInstr &MI);
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  /// Legalize an instruction by reducing the width of the underlying scalar
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  /// type.
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  LegalizeResult narrowScalar(MachineInstr &MI, unsigned TypeIdx, LLT NarrowTy);
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  /// Legalize an instruction by performing the operation on a wider scalar type
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  /// (for example a 16-bit addition can be safely performed at 32-bits
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  /// precision, ignoring the unused bits).
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  LegalizeResult widenScalar(MachineInstr &MI, unsigned TypeIdx, LLT WideTy);
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  /// Legalize an instruction by splitting it into simpler parts, hopefully
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  /// understood by the target.
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  LegalizeResult lower(MachineInstr &MI, unsigned TypeIdx, LLT Ty);
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  /// Legalize a vector instruction by splitting into multiple components, each
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  /// acting on the same scalar type as the original but with fewer elements.
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  LegalizeResult fewerElementsVector(MachineInstr &MI, unsigned TypeIdx,
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                                     LLT NarrowTy);
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  /// Legalize a vector instruction by increasing the number of vector elements
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  /// involved and ignoring the added elements later.
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  LegalizeResult moreElementsVector(MachineInstr &MI, unsigned TypeIdx,
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                                    LLT MoreTy);
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  /// Expose MIRBuilder so clients can set their own RecordInsertInstruction
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  /// functions
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  MachineIRBuilder &MIRBuilder;
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  /// Expose LegalizerInfo so the clients can re-use.
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  const LegalizerInfo &getLegalizerInfo() const { return LI; }
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private:
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  /// Legalize a single operand \p OpIdx of the machine instruction \p MI as a
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  /// Use by extending the operand's type to \p WideTy using the specified \p
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  /// ExtOpcode for the extension instruction, and replacing the vreg of the
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  /// operand in place.
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  void widenScalarSrc(MachineInstr &MI, LLT WideTy, unsigned OpIdx,
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                      unsigned ExtOpcode);
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  /// Legalize a single operand \p OpIdx of the machine instruction \p MI as a
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  /// Use by truncating the operand's type to \p NarrowTy using G_TRUNC, and
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  /// replacing the vreg of the operand in place.
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  void narrowScalarSrc(MachineInstr &MI, LLT NarrowTy, unsigned OpIdx);
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  /// Legalize a single operand \p OpIdx of the machine instruction \p MI as a
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  /// Def by extending the operand's type to \p WideTy and truncating it back
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  /// with the \p TruncOpcode, and replacing the vreg of the operand in place.
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  void widenScalarDst(MachineInstr &MI, LLT WideTy, unsigned OpIdx = 0,
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                      unsigned TruncOpcode = TargetOpcode::G_TRUNC);
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  // Legalize a single operand \p OpIdx of the machine instruction \p MI as a
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  // Def by truncating the operand's type to \p NarrowTy, replacing in place and
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  // extending back with \p ExtOpcode.
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  void narrowScalarDst(MachineInstr &MI, LLT NarrowTy, unsigned OpIdx,
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                       unsigned ExtOpcode);
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  /// Legalize a single operand \p OpIdx of the machine instruction \p MI as a
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  /// Def by performing it with additional vector elements and extracting the
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  /// result elements, and replacing the vreg of the operand in place.
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  void moreElementsVectorDst(MachineInstr &MI, LLT MoreTy, unsigned OpIdx);
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  /// Legalize a single operand \p OpIdx of the machine instruction \p MI as a
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  /// Use by producing a vector with undefined high elements, extracting the
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  /// original vector type, and replacing the vreg of the operand in place.
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  void moreElementsVectorSrc(MachineInstr &MI, LLT MoreTy, unsigned OpIdx);
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  LegalizeResult
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  widenScalarMergeValues(MachineInstr &MI, unsigned TypeIdx, LLT WideTy);
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  LegalizeResult
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  widenScalarUnmergeValues(MachineInstr &MI, unsigned TypeIdx, LLT WideTy);
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  LegalizeResult
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  widenScalarExtract(MachineInstr &MI, unsigned TypeIdx, LLT WideTy);
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  LegalizeResult
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  widenScalarInsert(MachineInstr &MI, unsigned TypeIdx, LLT WideTy);
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  /// Helper function to split a wide generic register into bitwise blocks with
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  /// the given Type (which implies the number of blocks needed). The generic
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  /// registers created are appended to Ops, starting at bit 0 of Reg.
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  void extractParts(unsigned Reg, LLT Ty, int NumParts,
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                    SmallVectorImpl<unsigned> &VRegs);
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  /// Version which handles irregular splits.
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  bool extractParts(unsigned Reg, LLT RegTy, LLT MainTy,
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                    LLT &LeftoverTy,
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                    SmallVectorImpl<unsigned> &VRegs,
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                    SmallVectorImpl<unsigned> &LeftoverVRegs);
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  /// Helper function to build a wide generic register \p DstReg of type \p
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  /// RegTy from smaller parts. This will produce a G_MERGE_VALUES,
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  /// G_BUILD_VECTOR, G_CONCAT_VECTORS, or sequence of G_INSERT as appropriate
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  /// for the types.
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  ///
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  /// \p PartRegs must be registers of type \p PartTy.
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  ///
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  /// If \p ResultTy does not evenly break into \p PartTy sized pieces, the
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  /// remainder must be specified with \p LeftoverRegs of type \p LeftoverTy.
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  void insertParts(unsigned DstReg, LLT ResultTy,
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                   LLT PartTy, ArrayRef<unsigned> PartRegs,
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                   LLT LeftoverTy = LLT(), ArrayRef<unsigned> LeftoverRegs = {});
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  LegalizeResult fewerElementsVectorImplicitDef(MachineInstr &MI,
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                                                unsigned TypeIdx, LLT NarrowTy);
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  /// Legalize a simple vector instruction where all operands are the same type
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  /// by splitting into multiple components.
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  LegalizeResult fewerElementsVectorBasic(MachineInstr &MI, unsigned TypeIdx,
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                                          LLT NarrowTy);
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  /// Legalize a instruction with a vector type where each operand may have a
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  /// different element type. All type indexes must have the same number of
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  /// elements.
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  LegalizeResult fewerElementsVectorMultiEltType(MachineInstr &MI,
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                                                 unsigned TypeIdx, LLT NarrowTy);
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  LegalizeResult fewerElementsVectorCasts(MachineInstr &MI, unsigned TypeIdx,
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                                          LLT NarrowTy);
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  LegalizeResult
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  fewerElementsVectorCmp(MachineInstr &MI, unsigned TypeIdx, LLT NarrowTy);
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  LegalizeResult
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  fewerElementsVectorSelect(MachineInstr &MI, unsigned TypeIdx, LLT NarrowTy);
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  LegalizeResult
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  reduceLoadStoreWidth(MachineInstr &MI, unsigned TypeIdx, LLT NarrowTy);
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  LegalizeResult narrowScalarShiftByConstant(MachineInstr &MI, const APInt &Amt,
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                                             LLT HalfTy, LLT ShiftAmtTy);
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  LegalizeResult narrowScalarShift(MachineInstr &MI, unsigned TypeIdx, LLT Ty);
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  LegalizeResult narrowScalarMul(MachineInstr &MI, unsigned TypeIdx, LLT Ty);
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  LegalizeResult narrowScalarExtract(MachineInstr &MI, unsigned TypeIdx, LLT Ty);
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  LegalizeResult narrowScalarInsert(MachineInstr &MI, unsigned TypeIdx, LLT Ty);
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  LegalizeResult narrowScalarSelect(MachineInstr &MI, unsigned TypeIdx, LLT Ty);
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  LegalizeResult lowerBitCount(MachineInstr &MI, unsigned TypeIdx, LLT Ty);
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  MachineRegisterInfo &MRI;
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  const LegalizerInfo &LI;
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  /// To keep track of changes made by the LegalizerHelper.
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  GISelChangeObserver &Observer;
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};
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/// Helper function that creates the given libcall.
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LegalizerHelper::LegalizeResult
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createLibcall(MachineIRBuilder &MIRBuilder, RTLIB::Libcall Libcall,
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              const CallLowering::ArgInfo &Result,
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              ArrayRef<CallLowering::ArgInfo> Args);
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} // End namespace llvm.
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#endif