/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/llvm/include/llvm/CodeGen/ISDOpcodes.h

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1 | //===-- llvm/CodeGen/ISDOpcodes.h - CodeGen opcodes -------------*- C++ -*-===// | |

2 | // | |

3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. | |

4 | // See https://llvm.org/LICENSE.txt for license information. | |

5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | |

6 | // | |

7 | //===----------------------------------------------------------------------===// | |

8 | // | |

9 | // This file declares codegen opcodes and related utilities. | |

10 | // | |

11 | //===----------------------------------------------------------------------===// | |

12 | ||

13 | #ifndef LLVM_CODEGEN_ISDOPCODES_H | |

14 | #define LLVM_CODEGEN_ISDOPCODES_H | |

15 | ||

16 | namespace llvm { | |

17 | ||

18 | /// ISD namespace - This namespace contains an enum which represents all of the | |

19 | /// SelectionDAG node types and value types. | |

20 | /// | |

21 | namespace ISD { | |

22 | ||

23 | //===--------------------------------------------------------------------===// | |

24 | /// ISD::NodeType enum - This enum defines the target-independent operators | |

25 | /// for a SelectionDAG. | |

26 | /// | |

27 | /// Targets may also define target-dependent operator codes for SDNodes. For | |

28 | /// example, on x86, these are the enum values in the X86ISD namespace. | |

29 | /// Targets should aim to use target-independent operators to model their | |

30 | /// instruction sets as much as possible, and only use target-dependent | |

31 | /// operators when they have special requirements. | |

32 | /// | |

33 | /// Finally, during and after selection proper, SNodes may use special | |

34 | /// operator codes that correspond directly with MachineInstr opcodes. These | |

35 | /// are used to represent selected instructions. See the isMachineOpcode() | |

36 | /// and getMachineOpcode() member functions of SDNode. | |

37 | /// | |

38 | enum NodeType { | |

39 | /// DELETED_NODE - This is an illegal value that is used to catch | |

40 | /// errors. This opcode is not a legal opcode for any node. | |

41 | DELETED_NODE, | |

42 | ||

43 | /// EntryToken - This is the marker used to indicate the start of a region. | |

44 | EntryToken, | |

45 | ||

46 | /// TokenFactor - This node takes multiple tokens as input and produces a | |

47 | /// single token result. This is used to represent the fact that the operand | |

48 | /// operators are independent of each other. | |

49 | TokenFactor, | |

50 | ||

51 | /// AssertSext, AssertZext - These nodes record if a register contains a | |

52 | /// value that has already been zero or sign extended from a narrower type. | |

53 | /// These nodes take two operands. The first is the node that has already | |

54 | /// been extended, and the second is a value type node indicating the width | |

55 | /// of the extension | |

56 | AssertSext, AssertZext, | |

57 | ||

58 | /// Various leaf nodes. | |

59 | BasicBlock, VALUETYPE, CONDCODE, Register, RegisterMask, | |

60 | Constant, ConstantFP, | |

61 | GlobalAddress, GlobalTLSAddress, FrameIndex, | |

62 | JumpTable, ConstantPool, ExternalSymbol, BlockAddress, | |

63 | ||

64 | /// The address of the GOT | |

65 | GLOBAL_OFFSET_TABLE, | |

66 | ||

67 | /// FRAMEADDR, RETURNADDR - These nodes represent llvm.frameaddress and | |

68 | /// llvm.returnaddress on the DAG. These nodes take one operand, the index | |

69 | /// of the frame or return address to return. An index of zero corresponds | |

70 | /// to the current function's frame or return address, an index of one to | |

71 | /// the parent's frame or return address, and so on. | |

72 | FRAMEADDR, RETURNADDR, ADDROFRETURNADDR, SPONENTRY, | |

73 | ||

74 | /// LOCAL_RECOVER - Represents the llvm.localrecover intrinsic. | |

75 | /// Materializes the offset from the local object pointer of another | |

76 | /// function to a particular local object passed to llvm.localescape. The | |

77 | /// operand is the MCSymbol label used to represent this offset, since | |

78 | /// typically the offset is not known until after code generation of the | |

79 | /// parent. | |

80 | LOCAL_RECOVER, | |

81 | ||

82 | /// READ_REGISTER, WRITE_REGISTER - This node represents llvm.register on | |

83 | /// the DAG, which implements the named register global variables extension. | |

84 | READ_REGISTER, | |

85 | WRITE_REGISTER, | |

86 | ||

87 | /// FRAME_TO_ARGS_OFFSET - This node represents offset from frame pointer to | |

88 | /// first (possible) on-stack argument. This is needed for correct stack | |

89 | /// adjustment during unwind. | |

90 | FRAME_TO_ARGS_OFFSET, | |

91 | ||

92 | /// EH_DWARF_CFA - This node represents the pointer to the DWARF Canonical | |

93 | /// Frame Address (CFA), generally the value of the stack pointer at the | |

94 | /// call site in the previous frame. | |

95 | EH_DWARF_CFA, | |

96 | ||

97 | /// OUTCHAIN = EH_RETURN(INCHAIN, OFFSET, HANDLER) - This node represents | |

98 | /// 'eh_return' gcc dwarf builtin, which is used to return from | |

99 | /// exception. The general meaning is: adjust stack by OFFSET and pass | |

100 | /// execution to HANDLER. Many platform-related details also :) | |

101 | EH_RETURN, | |

102 | ||

103 | /// RESULT, OUTCHAIN = EH_SJLJ_SETJMP(INCHAIN, buffer) | |

104 | /// This corresponds to the eh.sjlj.setjmp intrinsic. | |

105 | /// It takes an input chain and a pointer to the jump buffer as inputs | |

106 | /// and returns an outchain. | |

107 | EH_SJLJ_SETJMP, | |

108 | ||

109 | /// OUTCHAIN = EH_SJLJ_LONGJMP(INCHAIN, buffer) | |

110 | /// This corresponds to the eh.sjlj.longjmp intrinsic. | |

111 | /// It takes an input chain and a pointer to the jump buffer as inputs | |

112 | /// and returns an outchain. | |

113 | EH_SJLJ_LONGJMP, | |

114 | ||

115 | /// OUTCHAIN = EH_SJLJ_SETUP_DISPATCH(INCHAIN) | |

116 | /// The target initializes the dispatch table here. | |

117 | EH_SJLJ_SETUP_DISPATCH, | |

118 | ||

119 | /// TargetConstant* - Like Constant*, but the DAG does not do any folding, | |

120 | /// simplification, or lowering of the constant. They are used for constants | |

121 | /// which are known to fit in the immediate fields of their users, or for | |

122 | /// carrying magic numbers which are not values which need to be | |

123 | /// materialized in registers. | |

124 | TargetConstant, | |

125 | TargetConstantFP, | |

126 | ||

127 | /// TargetGlobalAddress - Like GlobalAddress, but the DAG does no folding or | |

128 | /// anything else with this node, and this is valid in the target-specific | |

129 | /// dag, turning into a GlobalAddress operand. | |

130 | TargetGlobalAddress, | |

131 | TargetGlobalTLSAddress, | |

132 | TargetFrameIndex, | |

133 | TargetJumpTable, | |

134 | TargetConstantPool, | |

135 | TargetExternalSymbol, | |

136 | TargetBlockAddress, | |

137 | ||

138 | MCSymbol, | |

139 | ||

140 | /// TargetIndex - Like a constant pool entry, but with completely | |

141 | /// target-dependent semantics. Holds target flags, a 32-bit index, and a | |

142 | /// 64-bit index. Targets can use this however they like. | |

143 | TargetIndex, | |

144 | ||

145 | /// RESULT = INTRINSIC_WO_CHAIN(INTRINSICID, arg1, arg2, ...) | |

146 | /// This node represents a target intrinsic function with no side effects. | |

147 | /// The first operand is the ID number of the intrinsic from the | |

148 | /// llvm::Intrinsic namespace. The operands to the intrinsic follow. The | |

149 | /// node returns the result of the intrinsic. | |

150 | INTRINSIC_WO_CHAIN, | |

151 | ||

152 | /// RESULT,OUTCHAIN = INTRINSIC_W_CHAIN(INCHAIN, INTRINSICID, arg1, ...) | |

153 | /// This node represents a target intrinsic function with side effects that | |

154 | /// returns a result. The first operand is a chain pointer. The second is | |

155 | /// the ID number of the intrinsic from the llvm::Intrinsic namespace. The | |

156 | /// operands to the intrinsic follow. The node has two results, the result | |

157 | /// of the intrinsic and an output chain. | |

158 | INTRINSIC_W_CHAIN, | |

159 | ||

160 | /// OUTCHAIN = INTRINSIC_VOID(INCHAIN, INTRINSICID, arg1, arg2, ...) | |

161 | /// This node represents a target intrinsic function with side effects that | |

162 | /// does not return a result. The first operand is a chain pointer. The | |

163 | /// second is the ID number of the intrinsic from the llvm::Intrinsic | |

164 | /// namespace. The operands to the intrinsic follow. | |

165 | INTRINSIC_VOID, | |

166 | ||

167 | /// CopyToReg - This node has three operands: a chain, a register number to | |

168 | /// set to this value, and a value. | |

169 | CopyToReg, | |

170 | ||

171 | /// CopyFromReg - This node indicates that the input value is a virtual or | |

172 | /// physical register that is defined outside of the scope of this | |

173 | /// SelectionDAG. The register is available from the RegisterSDNode object. | |

174 | CopyFromReg, | |

175 | ||

176 | /// UNDEF - An undefined node. | |

177 | UNDEF, | |

178 | ||

179 | /// EXTRACT_ELEMENT - This is used to get the lower or upper (determined by | |

180 | /// a Constant, which is required to be operand #1) half of the integer or | |

181 | /// float value specified as operand #0. This is only for use before | |

182 | /// legalization, for values that will be broken into multiple registers. | |

183 | EXTRACT_ELEMENT, | |

184 | ||

185 | /// BUILD_PAIR - This is the opposite of EXTRACT_ELEMENT in some ways. | |

186 | /// Given two values of the same integer value type, this produces a value | |

187 | /// twice as big. Like EXTRACT_ELEMENT, this can only be used before | |

188 | /// legalization. The lower part of the composite value should be in | |

189 | /// element 0 and the upper part should be in element 1. | |

190 | BUILD_PAIR, | |

191 | ||

192 | /// MERGE_VALUES - This node takes multiple discrete operands and returns | |

193 | /// them all as its individual results. This nodes has exactly the same | |

194 | /// number of inputs and outputs. This node is useful for some pieces of the | |

195 | /// code generator that want to think about a single node with multiple | |

196 | /// results, not multiple nodes. | |

197 | MERGE_VALUES, | |

198 | ||

199 | /// Simple integer binary arithmetic operators. | |

200 | ADD, SUB, MUL, SDIV, UDIV, SREM, UREM, | |

201 | ||

202 | /// SMUL_LOHI/UMUL_LOHI - Multiply two integers of type iN, producing | |

203 | /// a signed/unsigned value of type i[2*N], and return the full value as | |

204 | /// two results, each of type iN. | |

205 | SMUL_LOHI, UMUL_LOHI, | |

206 | ||

207 | /// SDIVREM/UDIVREM - Divide two integers and produce both a quotient and | |

208 | /// remainder result. | |

209 | SDIVREM, UDIVREM, | |

210 | ||

211 | /// CARRY_FALSE - This node is used when folding other nodes, | |

212 | /// like ADDC/SUBC, which indicate the carry result is always false. | |

213 | CARRY_FALSE, | |

214 | ||

215 | /// Carry-setting nodes for multiple precision addition and subtraction. | |

216 | /// These nodes take two operands of the same value type, and produce two | |

217 | /// results. The first result is the normal add or sub result, the second | |

218 | /// result is the carry flag result. | |

219 | /// FIXME: These nodes are deprecated in favor of ADDCARRY and SUBCARRY. | |

220 | /// They are kept around for now to provide a smooth transition path | |

221 | /// toward the use of ADDCARRY/SUBCARRY and will eventually be removed. | |

222 | ADDC, SUBC, | |

223 | ||

224 | /// Carry-using nodes for multiple precision addition and subtraction. These | |

225 | /// nodes take three operands: The first two are the normal lhs and rhs to | |

226 | /// the add or sub, and the third is the input carry flag. These nodes | |

227 | /// produce two results; the normal result of the add or sub, and the output | |

228 | /// carry flag. These nodes both read and write a carry flag to allow them | |

229 | /// to them to be chained together for add and sub of arbitrarily large | |

230 | /// values. | |

231 | ADDE, SUBE, | |

232 | ||

233 | /// Carry-using nodes for multiple precision addition and subtraction. | |

234 | /// These nodes take three operands: The first two are the normal lhs and | |

235 | /// rhs to the add or sub, and the third is a boolean indicating if there | |

236 | /// is an incoming carry. These nodes produce two results: the normal | |

237 | /// result of the add or sub, and the output carry so they can be chained | |

238 | /// together. The use of this opcode is preferable to adde/sube if the | |

239 | /// target supports it, as the carry is a regular value rather than a | |

240 | /// glue, which allows further optimisation. | |

241 | ADDCARRY, SUBCARRY, | |

242 | ||

243 | /// RESULT, BOOL = [SU]ADDO(LHS, RHS) - Overflow-aware nodes for addition. | |

244 | /// These nodes take two operands: the normal LHS and RHS to the add. They | |

245 | /// produce two results: the normal result of the add, and a boolean that | |

246 | /// indicates if an overflow occurred (*not* a flag, because it may be store | |

247 | /// to memory, etc.). If the type of the boolean is not i1 then the high | |

248 | /// bits conform to getBooleanContents. | |

249 | /// These nodes are generated from llvm.[su]add.with.overflow intrinsics. | |

250 | SADDO, UADDO, | |

251 | ||

252 | /// Same for subtraction. | |

253 | SSUBO, USUBO, | |

254 | ||

255 | /// Same for multiplication. | |

256 | SMULO, UMULO, | |

257 | ||

258 | /// RESULT = [US]ADDSAT(LHS, RHS) - Perform saturation addition on 2 | |

259 | /// integers with the same bit width (W). If the true value of LHS + RHS | |

260 | /// exceeds the largest value that can be represented by W bits, the | |

261 | /// resulting value is this maximum value. Otherwise, if this value is less | |

262 | /// than the smallest value that can be represented by W bits, the | |

263 | /// resulting value is this minimum value. | |

264 | SADDSAT, UADDSAT, | |

265 | ||

266 | /// RESULT = [US]SUBSAT(LHS, RHS) - Perform saturation subtraction on 2 | |

267 | /// integers with the same bit width (W). If the true value of LHS - RHS | |

268 | /// exceeds the largest value that can be represented by W bits, the | |

269 | /// resulting value is this maximum value. Otherwise, if this value is less | |

270 | /// than the smallest value that can be represented by W bits, the | |

271 | /// resulting value is this minimum value. | |

272 | SSUBSAT, USUBSAT, | |

273 | ||

274 | /// RESULT = [US]MULFIX(LHS, RHS, SCALE) - Perform fixed point multiplication on | |

275 | /// 2 integers with the same width and scale. SCALE represents the scale of | |

276 | /// both operands as fixed point numbers. This SCALE parameter must be a | |

277 | /// constant integer. A scale of zero is effectively performing | |

278 | /// multiplication on 2 integers. | |

279 | SMULFIX, UMULFIX, | |

280 | ||

281 | /// Simple binary floating point operators. | |

282 | FADD, FSUB, FMUL, FDIV, FREM, | |

283 | ||

284 | /// Constrained versions of the binary floating point operators. | |

285 | /// These will be lowered to the simple operators before final selection. | |

286 | /// They are used to limit optimizations while the DAG is being | |

287 | /// optimized. | |

288 | STRICT_FADD, STRICT_FSUB, STRICT_FMUL, STRICT_FDIV, STRICT_FREM, | |

289 | STRICT_FMA, | |

290 | ||

291 | /// Constrained versions of libm-equivalent floating point intrinsics. | |

292 | /// These will be lowered to the equivalent non-constrained pseudo-op | |

293 | /// (or expanded to the equivalent library call) before final selection. | |

294 | /// They are used to limit optimizations while the DAG is being optimized. | |

295 | STRICT_FSQRT, STRICT_FPOW, STRICT_FPOWI, STRICT_FSIN, STRICT_FCOS, | |

296 | STRICT_FEXP, STRICT_FEXP2, STRICT_FLOG, STRICT_FLOG10, STRICT_FLOG2, | |

297 | STRICT_FRINT, STRICT_FNEARBYINT, STRICT_FMAXNUM, STRICT_FMINNUM, | |

298 | STRICT_FCEIL, STRICT_FFLOOR, STRICT_FROUND, STRICT_FTRUNC, | |

299 | ||

300 | /// FMA - Perform a * b + c with no intermediate rounding step. | |

301 | FMA, | |

302 | ||

303 | /// FMAD - Perform a * b + c, while getting the same result as the | |

304 | /// separately rounded operations. | |

305 | FMAD, | |

306 | ||

307 | /// FCOPYSIGN(X, Y) - Return the value of X with the sign of Y. NOTE: This | |

308 | /// DAG node does not require that X and Y have the same type, just that | |

309 | /// they are both floating point. X and the result must have the same type. | |

310 | /// FCOPYSIGN(f32, f64) is allowed. | |

311 | FCOPYSIGN, | |

312 | ||

313 | /// INT = FGETSIGN(FP) - Return the sign bit of the specified floating point | |

314 | /// value as an integer 0/1 value. | |

315 | FGETSIGN, | |

316 | ||

317 | /// Returns platform specific canonical encoding of a floating point number. | |

318 | FCANONICALIZE, | |

319 | ||

320 | /// BUILD_VECTOR(ELT0, ELT1, ELT2, ELT3,...) - Return a vector with the | |

321 | /// specified, possibly variable, elements. The number of elements is | |

322 | /// required to be a power of two. The types of the operands must all be | |

323 | /// the same and must match the vector element type, except that integer | |

324 | /// types are allowed to be larger than the element type, in which case | |

325 | /// the operands are implicitly truncated. | |

326 | BUILD_VECTOR, | |

327 | ||

328 | /// INSERT_VECTOR_ELT(VECTOR, VAL, IDX) - Returns VECTOR with the element | |

329 | /// at IDX replaced with VAL. If the type of VAL is larger than the vector | |

330 | /// element type then VAL is truncated before replacement. | |

331 | INSERT_VECTOR_ELT, | |

332 | ||

333 | /// EXTRACT_VECTOR_ELT(VECTOR, IDX) - Returns a single element from VECTOR | |

334 | /// identified by the (potentially variable) element number IDX. If the | |

335 | /// return type is an integer type larger than the element type of the | |

336 | /// vector, the result is extended to the width of the return type. In | |

337 | /// that case, the high bits are undefined. | |

338 | EXTRACT_VECTOR_ELT, | |

339 | ||

340 | /// CONCAT_VECTORS(VECTOR0, VECTOR1, ...) - Given a number of values of | |

341 | /// vector type with the same length and element type, this produces a | |

342 | /// concatenated vector result value, with length equal to the sum of the | |

343 | /// lengths of the input vectors. | |

344 | CONCAT_VECTORS, | |

345 | ||

346 | /// INSERT_SUBVECTOR(VECTOR1, VECTOR2, IDX) - Returns a vector | |

347 | /// with VECTOR2 inserted into VECTOR1 at the (potentially | |

348 | /// variable) element number IDX, which must be a multiple of the | |

349 | /// VECTOR2 vector length. The elements of VECTOR1 starting at | |

350 | /// IDX are overwritten with VECTOR2. Elements IDX through | |

351 | /// vector_length(VECTOR2) must be valid VECTOR1 indices. | |

352 | INSERT_SUBVECTOR, | |

353 | ||

354 | /// EXTRACT_SUBVECTOR(VECTOR, IDX) - Returns a subvector from VECTOR (an | |

355 | /// vector value) starting with the element number IDX, which must be a | |

356 | /// constant multiple of the result vector length. | |

357 | EXTRACT_SUBVECTOR, | |

358 | ||

359 | /// VECTOR_SHUFFLE(VEC1, VEC2) - Returns a vector, of the same type as | |

360 | /// VEC1/VEC2. A VECTOR_SHUFFLE node also contains an array of constant int | |

361 | /// values that indicate which value (or undef) each result element will | |

362 | /// get. These constant ints are accessible through the | |

363 | /// ShuffleVectorSDNode class. This is quite similar to the Altivec | |

364 | /// 'vperm' instruction, except that the indices must be constants and are | |

365 | /// in terms of the element size of VEC1/VEC2, not in terms of bytes. | |

366 | VECTOR_SHUFFLE, | |

367 | ||

368 | /// SCALAR_TO_VECTOR(VAL) - This represents the operation of loading a | |

369 | /// scalar value into element 0 of the resultant vector type. The top | |

370 | /// elements 1 to N-1 of the N-element vector are undefined. The type | |

371 | /// of the operand must match the vector element type, except when they | |

372 | /// are integer types. In this case the operand is allowed to be wider | |

373 | /// than the vector element type, and is implicitly truncated to it. | |

374 | SCALAR_TO_VECTOR, | |

375 | ||

376 | /// MULHU/MULHS - Multiply high - Multiply two integers of type iN, | |

377 | /// producing an unsigned/signed value of type i[2*N], then return the top | |

378 | /// part. | |

379 | MULHU, MULHS, | |

380 | ||

381 | /// [US]{MIN/MAX} - Binary minimum or maximum or signed or unsigned | |

382 | /// integers. | |

383 | SMIN, SMAX, UMIN, UMAX, | |

384 | ||

385 | /// Bitwise operators - logical and, logical or, logical xor. | |

386 | AND, OR, XOR, | |

387 | ||

388 | /// ABS - Determine the unsigned absolute value of a signed integer value of | |

389 | /// the same bitwidth. | |

390 | /// Note: A value of INT_MIN will return INT_MIN, no saturation or overflow | |

391 | /// is performed. | |

392 | ABS, | |

393 | ||

394 | /// Shift and rotation operations. After legalization, the type of the | |

395 | /// shift amount is known to be TLI.getShiftAmountTy(). Before legalization | |

396 | /// the shift amount can be any type, but care must be taken to ensure it is | |

397 | /// large enough. TLI.getShiftAmountTy() is i8 on some targets, but before | |

398 | /// legalization, types like i1024 can occur and i8 doesn't have enough bits | |

399 | /// to represent the shift amount. | |

400 | /// When the 1st operand is a vector, the shift amount must be in the same | |

401 | /// type. (TLI.getShiftAmountTy() will return the same type when the input | |

402 | /// type is a vector.) | |

403 | /// For rotates and funnel shifts, the shift amount is treated as an unsigned | |

404 | /// amount modulo the element size of the first operand. | |

405 | /// | |

406 | /// Funnel 'double' shifts take 3 operands, 2 inputs and the shift amount. | |

407 | /// fshl(X,Y,Z): (X << (Z % BW)) | (Y >> (BW - (Z % BW))) | |

408 | /// fshr(X,Y,Z): (X << (BW - (Z % BW))) | (Y >> (Z % BW)) | |

409 | SHL, SRA, SRL, ROTL, ROTR, FSHL, FSHR, | |

410 | ||

411 | /// Byte Swap and Counting operators. | |

412 | BSWAP, CTTZ, CTLZ, CTPOP, BITREVERSE, | |

413 | ||

414 | /// Bit counting operators with an undefined result for zero inputs. | |

415 | CTTZ_ZERO_UNDEF, CTLZ_ZERO_UNDEF, | |

416 | ||

417 | /// Select(COND, TRUEVAL, FALSEVAL). If the type of the boolean COND is not | |

418 | /// i1 then the high bits must conform to getBooleanContents. | |

419 | SELECT, | |

420 | ||

421 | /// Select with a vector condition (op #0) and two vector operands (ops #1 | |

422 | /// and #2), returning a vector result. All vectors have the same length. | |

423 | /// Much like the scalar select and setcc, each bit in the condition selects | |

424 | /// whether the corresponding result element is taken from op #1 or op #2. | |

425 | /// At first, the VSELECT condition is of vXi1 type. Later, targets may | |

426 | /// change the condition type in order to match the VSELECT node using a | |

427 | /// pattern. The condition follows the BooleanContent format of the target. | |

428 | VSELECT, | |

429 | ||

430 | /// Select with condition operator - This selects between a true value and | |

431 | /// a false value (ops #2 and #3) based on the boolean result of comparing | |

432 | /// the lhs and rhs (ops #0 and #1) of a conditional expression with the | |

433 | /// condition code in op #4, a CondCodeSDNode. | |

434 | SELECT_CC, | |

435 | ||

436 | /// SetCC operator - This evaluates to a true value iff the condition is | |

437 | /// true. If the result value type is not i1 then the high bits conform | |

438 | /// to getBooleanContents. The operands to this are the left and right | |

439 | /// operands to compare (ops #0, and #1) and the condition code to compare | |

440 | /// them with (op #2) as a CondCodeSDNode. If the operands are vector types | |

441 | /// then the result type must also be a vector type. | |

442 | SETCC, | |

443 | ||

444 | /// Like SetCC, ops #0 and #1 are the LHS and RHS operands to compare, but | |

445 | /// op #2 is a boolean indicating if there is an incoming carry. This | |

446 | /// operator checks the result of "LHS - RHS - Carry", and can be used to | |

447 | /// compare two wide integers: | |

448 | /// (setcccarry lhshi rhshi (subcarry lhslo rhslo) cc). | |

449 | /// Only valid for integers. | |

450 | SETCCCARRY, | |

451 | ||

452 | /// SHL_PARTS/SRA_PARTS/SRL_PARTS - These operators are used for expanded | |

453 | /// integer shift operations. The operation ordering is: | |

454 | /// [Lo,Hi] = op [LoLHS,HiLHS], Amt | |

455 | SHL_PARTS, SRA_PARTS, SRL_PARTS, | |

456 | ||

457 | /// Conversion operators. These are all single input single output | |

458 | /// operations. For all of these, the result type must be strictly | |

459 | /// wider or narrower (depending on the operation) than the source | |

460 | /// type. | |

461 | ||

462 | /// SIGN_EXTEND - Used for integer types, replicating the sign bit | |

463 | /// into new bits. | |

464 | SIGN_EXTEND, | |

465 | ||

466 | /// ZERO_EXTEND - Used for integer types, zeroing the new bits. | |

467 | ZERO_EXTEND, | |

468 | ||

469 | /// ANY_EXTEND - Used for integer types. The high bits are undefined. | |

470 | ANY_EXTEND, | |

471 | ||

472 | /// TRUNCATE - Completely drop the high bits. | |

473 | TRUNCATE, | |

474 | ||

475 | /// [SU]INT_TO_FP - These operators convert integers (whose interpreted sign | |

476 | /// depends on the first letter) to floating point. | |

477 | SINT_TO_FP, | |

478 | UINT_TO_FP, | |

479 | ||

480 | /// SIGN_EXTEND_INREG - This operator atomically performs a SHL/SRA pair to | |

481 | /// sign extend a small value in a large integer register (e.g. sign | |

482 | /// extending the low 8 bits of a 32-bit register to fill the top 24 bits | |

483 | /// with the 7th bit). The size of the smaller type is indicated by the 1th | |

484 | /// operand, a ValueType node. | |

485 | SIGN_EXTEND_INREG, | |

486 | ||

487 | /// ANY_EXTEND_VECTOR_INREG(Vector) - This operator represents an | |

488 | /// in-register any-extension of the low lanes of an integer vector. The | |

489 | /// result type must have fewer elements than the operand type, and those | |

490 | /// elements must be larger integer types such that the total size of the | |

491 | /// operand type is less than or equal to the size of the result type. Each | |

492 | /// of the low operand elements is any-extended into the corresponding, | |

493 | /// wider result elements with the high bits becoming undef. | |

494 | /// NOTE: The type legalizer prefers to make the operand and result size | |

495 | /// the same to allow expansion to shuffle vector during op legalization. | |

496 | ANY_EXTEND_VECTOR_INREG, | |

497 | ||

498 | /// SIGN_EXTEND_VECTOR_INREG(Vector) - This operator represents an | |

499 | /// in-register sign-extension of the low lanes of an integer vector. The | |

500 | /// result type must have fewer elements than the operand type, and those | |

501 | /// elements must be larger integer types such that the total size of the | |

502 | /// operand type is less than or equal to the size of the result type. Each | |

503 | /// of the low operand elements is sign-extended into the corresponding, | |

504 | /// wider result elements. | |

505 | /// NOTE: The type legalizer prefers to make the operand and result size | |

506 | /// the same to allow expansion to shuffle vector during op legalization. | |

507 | SIGN_EXTEND_VECTOR_INREG, | |

508 | ||

509 | /// ZERO_EXTEND_VECTOR_INREG(Vector) - This operator represents an | |

510 | /// in-register zero-extension of the low lanes of an integer vector. The | |

511 | /// result type must have fewer elements than the operand type, and those | |

512 | /// elements must be larger integer types such that the total size of the | |

513 | /// operand type is less than or equal to the size of the result type. Each | |

514 | /// of the low operand elements is zero-extended into the corresponding, | |

515 | /// wider result elements. | |

516 | /// NOTE: The type legalizer prefers to make the operand and result size | |

517 | /// the same to allow expansion to shuffle vector during op legalization. | |

518 | ZERO_EXTEND_VECTOR_INREG, | |

519 | ||

520 | /// FP_TO_[US]INT - Convert a floating point value to a signed or unsigned | |

521 | /// integer. These have the same semantics as fptosi and fptoui in IR. If | |

522 | /// the FP value cannot fit in the integer type, the results are undefined. | |

523 | FP_TO_SINT, | |

524 | FP_TO_UINT, | |

525 | ||

526 | /// X = FP_ROUND(Y, TRUNC) - Rounding 'Y' from a larger floating point type | |

527 | /// down to the precision of the destination VT. TRUNC is a flag, which is | |

528 | /// always an integer that is zero or one. If TRUNC is 0, this is a | |

529 | /// normal rounding, if it is 1, this FP_ROUND is known to not change the | |

530 | /// value of Y. | |

531 | /// | |

532 | /// The TRUNC = 1 case is used in cases where we know that the value will | |

533 | /// not be modified by the node, because Y is not using any of the extra | |

534 | /// precision of source type. This allows certain transformations like | |

535 | /// FP_EXTEND(FP_ROUND(X,1)) -> X which are not safe for | |

536 | /// FP_EXTEND(FP_ROUND(X,0)) because the extra bits aren't removed. | |

537 | FP_ROUND, | |

538 | ||

539 | /// FLT_ROUNDS_ - Returns current rounding mode: | |

540 | /// -1 Undefined | |

541 | /// 0 Round to 0 | |

542 | /// 1 Round to nearest | |

543 | /// 2 Round to +inf | |

544 | /// 3 Round to -inf | |

545 | FLT_ROUNDS_, | |

546 | ||

547 | /// X = FP_ROUND_INREG(Y, VT) - This operator takes an FP register, and | |

548 | /// rounds it to a floating point value. It then promotes it and returns it | |

549 | /// in a register of the same size. This operation effectively just | |

550 | /// discards excess precision. The type to round down to is specified by | |

551 | /// the VT operand, a VTSDNode. | |

552 | FP_ROUND_INREG, | |

553 | ||

554 | /// X = FP_EXTEND(Y) - Extend a smaller FP type into a larger FP type. | |

555 | FP_EXTEND, | |

556 | ||

557 | /// BITCAST - This operator converts between integer, vector and FP | |

558 | /// values, as if the value was stored to memory with one type and loaded | |

559 | /// from the same address with the other type (or equivalently for vector | |

560 | /// format conversions, etc). The source and result are required to have | |

561 | /// the same bit size (e.g. f32 <-> i32). This can also be used for | |

562 | /// int-to-int or fp-to-fp conversions, but that is a noop, deleted by | |

563 | /// getNode(). | |

564 | /// | |

565 | /// This operator is subtly different from the bitcast instruction from | |

566 | /// LLVM-IR since this node may change the bits in the register. For | |

567 | /// example, this occurs on big-endian NEON and big-endian MSA where the | |

568 | /// layout of the bits in the register depends on the vector type and this | |

569 | /// operator acts as a shuffle operation for some vector type combinations. | |

570 | BITCAST, | |

571 | ||

572 | /// ADDRSPACECAST - This operator converts between pointers of different | |

573 | /// address spaces. | |

574 | ADDRSPACECAST, | |

575 | ||

576 | /// FP16_TO_FP, FP_TO_FP16 - These operators are used to perform promotions | |

577 | /// and truncation for half-precision (16 bit) floating numbers. These nodes | |

578 | /// form a semi-softened interface for dealing with f16 (as an i16), which | |

579 | /// is often a storage-only type but has native conversions. | |

580 | FP16_TO_FP, FP_TO_FP16, | |

581 | ||

582 | /// Perform various unary floating-point operations inspired by libm. For | |

583 | /// FPOWI, the result is undefined if if the integer operand doesn't fit | |

584 | /// into 32 bits. | |

585 | FNEG, FABS, FSQRT, FCBRT, FSIN, FCOS, FPOWI, FPOW, | |

586 | FLOG, FLOG2, FLOG10, FEXP, FEXP2, | |

587 | FCEIL, FTRUNC, FRINT, FNEARBYINT, FROUND, FFLOOR, | |

588 | /// FMINNUM/FMAXNUM - Perform floating-point minimum or maximum on two | |

589 | /// values. | |

590 | // | |

591 | /// In the case where a single input is a NaN (either signaling or quiet), | |

592 | /// the non-NaN input is returned. | |

593 | /// | |

594 | /// The return value of (FMINNUM 0.0, -0.0) could be either 0.0 or -0.0. | |

595 | FMINNUM, FMAXNUM, | |

596 | ||

597 | /// FMINNUM_IEEE/FMAXNUM_IEEE - Perform floating-point minimum or maximum on | |

598 | /// two values, following the IEEE-754 2008 definition. This differs from | |

599 | /// FMINNUM/FMAXNUM in the handling of signaling NaNs. If one input is a | |

600 | /// signaling NaN, returns a quiet NaN. | |

601 | FMINNUM_IEEE, FMAXNUM_IEEE, | |

602 | ||

603 | /// FMINIMUM/FMAXIMUM - NaN-propagating minimum/maximum that also treat -0.0 | |

604 | /// as less than 0.0. While FMINNUM_IEEE/FMAXNUM_IEEE follow IEEE 754-2008 | |

605 | /// semantics, FMINIMUM/FMAXIMUM follow IEEE 754-2018 draft semantics. | |

606 | FMINIMUM, FMAXIMUM, | |

607 | ||

608 | /// FSINCOS - Compute both fsin and fcos as a single operation. | |

609 | FSINCOS, | |

610 | ||

611 | /// LOAD and STORE have token chains as their first operand, then the same | |

612 | /// operands as an LLVM load/store instruction, then an offset node that | |

613 | /// is added / subtracted from the base pointer to form the address (for | |

614 | /// indexed memory ops). | |

615 | LOAD, STORE, | |

616 | ||

617 | /// DYNAMIC_STACKALLOC - Allocate some number of bytes on the stack aligned | |

618 | /// to a specified boundary. This node always has two return values: a new | |

619 | /// stack pointer value and a chain. The first operand is the token chain, | |

620 | /// the second is the number of bytes to allocate, and the third is the | |

621 | /// alignment boundary. The size is guaranteed to be a multiple of the | |

622 | /// stack alignment, and the alignment is guaranteed to be bigger than the | |

623 | /// stack alignment (if required) or 0 to get standard stack alignment. | |

624 | DYNAMIC_STACKALLOC, | |

625 | ||

626 | /// Control flow instructions. These all have token chains. | |

627 | ||

628 | /// BR - Unconditional branch. The first operand is the chain | |

629 | /// operand, the second is the MBB to branch to. | |

630 | BR, | |

631 | ||

632 | /// BRIND - Indirect branch. The first operand is the chain, the second | |

633 | /// is the value to branch to, which must be of the same type as the | |

634 | /// target's pointer type. | |

635 | BRIND, | |

636 | ||

637 | /// BR_JT - Jumptable branch. The first operand is the chain, the second | |

638 | /// is the jumptable index, the last one is the jumptable entry index. | |

639 | BR_JT, | |

640 | ||

641 | /// BRCOND - Conditional branch. The first operand is the chain, the | |

642 | /// second is the condition, the third is the block to branch to if the | |

643 | /// condition is true. If the type of the condition is not i1, then the | |

644 | /// high bits must conform to getBooleanContents. | |

645 | BRCOND, | |

646 | ||

647 | /// BR_CC - Conditional branch. The behavior is like that of SELECT_CC, in | |

648 | /// that the condition is represented as condition code, and two nodes to | |

649 | /// compare, rather than as a combined SetCC node. The operands in order | |

650 | /// are chain, cc, lhs, rhs, block to branch to if condition is true. | |

651 | BR_CC, | |

652 | ||

653 | /// INLINEASM - Represents an inline asm block. This node always has two | |

654 | /// return values: a chain and a flag result. The inputs are as follows: | |

655 | /// Operand #0 : Input chain. | |

656 | /// Operand #1 : a ExternalSymbolSDNode with a pointer to the asm string. | |

657 | /// Operand #2 : a MDNodeSDNode with the !srcloc metadata. | |

658 | /// Operand #3 : HasSideEffect, IsAlignStack bits. | |

659 | /// After this, it is followed by a list of operands with this format: | |

660 | /// ConstantSDNode: Flags that encode whether it is a mem or not, the | |

661 | /// of operands that follow, etc. See InlineAsm.h. | |

662 | /// ... however many operands ... | |

663 | /// Operand #last: Optional, an incoming flag. | |

664 | /// | |

665 | /// The variable width operands are required to represent target addressing | |

666 | /// modes as a single "operand", even though they may have multiple | |

667 | /// SDOperands. | |

668 | INLINEASM, | |

669 | ||

670 | /// INLINEASM_BR - Terminator version of inline asm. Used by asm-goto. | |

671 | INLINEASM_BR, | |

672 | ||

673 | /// EH_LABEL - Represents a label in mid basic block used to track | |

674 | /// locations needed for debug and exception handling tables. These nodes | |

675 | /// take a chain as input and return a chain. | |

676 | EH_LABEL, | |

677 | ||

678 | /// ANNOTATION_LABEL - Represents a mid basic block label used by | |

679 | /// annotations. This should remain within the basic block and be ordered | |

680 | /// with respect to other call instructions, but loads and stores may float | |

681 | /// past it. | |

682 | ANNOTATION_LABEL, | |

683 | ||

684 | /// CATCHPAD - Represents a catchpad instruction. | |

685 | CATCHPAD, | |

686 | ||

687 | /// CATCHRET - Represents a return from a catch block funclet. Used for | |

688 | /// MSVC compatible exception handling. Takes a chain operand and a | |

689 | /// destination basic block operand. | |

690 | CATCHRET, | |

691 | ||

692 | /// CLEANUPRET - Represents a return from a cleanup block funclet. Used for | |

693 | /// MSVC compatible exception handling. Takes only a chain operand. | |

694 | CLEANUPRET, | |

695 | ||

696 | /// STACKSAVE - STACKSAVE has one operand, an input chain. It produces a | |

697 | /// value, the same type as the pointer type for the system, and an output | |

698 | /// chain. | |

699 | STACKSAVE, | |

700 | ||

701 | /// STACKRESTORE has two operands, an input chain and a pointer to restore | |

702 | /// to it returns an output chain. | |

703 | STACKRESTORE, | |

704 | ||

705 | /// CALLSEQ_START/CALLSEQ_END - These operators mark the beginning and end | |

706 | /// of a call sequence, and carry arbitrary information that target might | |

707 | /// want to know. The first operand is a chain, the rest are specified by | |

708 | /// the target and not touched by the DAG optimizers. | |

709 | /// Targets that may use stack to pass call arguments define additional | |

710 | /// operands: | |

711 | /// - size of the call frame part that must be set up within the | |

712 | /// CALLSEQ_START..CALLSEQ_END pair, | |

713 | /// - part of the call frame prepared prior to CALLSEQ_START. | |

714 | /// Both these parameters must be constants, their sum is the total call | |

715 | /// frame size. | |

716 | /// CALLSEQ_START..CALLSEQ_END pairs may not be nested. | |

717 | CALLSEQ_START, // Beginning of a call sequence | |

718 | CALLSEQ_END, // End of a call sequence | |

719 | ||

720 | /// VAARG - VAARG has four operands: an input chain, a pointer, a SRCVALUE, | |

721 | /// and the alignment. It returns a pair of values: the vaarg value and a | |

722 | /// new chain. | |

723 | VAARG, | |

724 | ||

725 | /// VACOPY - VACOPY has 5 operands: an input chain, a destination pointer, | |

726 | /// a source pointer, a SRCVALUE for the destination, and a SRCVALUE for the | |

727 | /// source. | |

728 | VACOPY, | |

729 | ||

730 | /// VAEND, VASTART - VAEND and VASTART have three operands: an input chain, | |

731 | /// pointer, and a SRCVALUE. | |

732 | VAEND, VASTART, | |

733 | ||

734 | /// SRCVALUE - This is a node type that holds a Value* that is used to | |

735 | /// make reference to a value in the LLVM IR. | |

736 | SRCVALUE, | |

737 | ||

738 | /// MDNODE_SDNODE - This is a node that holdes an MDNode*, which is used to | |

739 | /// reference metadata in the IR. | |

740 | MDNODE_SDNODE, | |

741 | ||

742 | /// PCMARKER - This corresponds to the pcmarker intrinsic. | |

743 | PCMARKER, | |

744 | ||

745 | /// READCYCLECOUNTER - This corresponds to the readcyclecounter intrinsic. | |

746 | /// It produces a chain and one i64 value. The only operand is a chain. | |

747 | /// If i64 is not legal, the result will be expanded into smaller values. | |

748 | /// Still, it returns an i64, so targets should set legality for i64. | |

749 | /// The result is the content of the architecture-specific cycle | |

750 | /// counter-like register (or other high accuracy low latency clock source). | |

751 | READCYCLECOUNTER, | |

752 | ||

753 | /// HANDLENODE node - Used as a handle for various purposes. | |

754 | HANDLENODE, | |

755 | ||

756 | /// INIT_TRAMPOLINE - This corresponds to the init_trampoline intrinsic. It | |

757 | /// takes as input a token chain, the pointer to the trampoline, the pointer | |

758 | /// to the nested function, the pointer to pass for the 'nest' parameter, a | |

759 | /// SRCVALUE for the trampoline and another for the nested function | |

760 | /// (allowing targets to access the original Function*). | |

761 | /// It produces a token chain as output. | |

762 | INIT_TRAMPOLINE, | |

763 | ||

764 | /// ADJUST_TRAMPOLINE - This corresponds to the adjust_trampoline intrinsic. | |

765 | /// It takes a pointer to the trampoline and produces a (possibly) new | |

766 | /// pointer to the same trampoline with platform-specific adjustments | |

767 | /// applied. The pointer it returns points to an executable block of code. | |

768 | ADJUST_TRAMPOLINE, | |

769 | ||

770 | /// TRAP - Trapping instruction | |

771 | TRAP, | |

772 | ||

773 | /// DEBUGTRAP - Trap intended to get the attention of a debugger. | |

774 | DEBUGTRAP, | |

775 | ||

776 | /// PREFETCH - This corresponds to a prefetch intrinsic. The first operand | |

777 | /// is the chain. The other operands are the address to prefetch, | |

778 | /// read / write specifier, locality specifier and instruction / data cache | |

779 | /// specifier. | |

780 | PREFETCH, | |

781 | ||

782 | /// OUTCHAIN = ATOMIC_FENCE(INCHAIN, ordering, scope) | |

783 | /// This corresponds to the fence instruction. It takes an input chain, and | |

784 | /// two integer constants: an AtomicOrdering and a SynchronizationScope. | |

785 | ATOMIC_FENCE, | |

786 | ||

787 | /// Val, OUTCHAIN = ATOMIC_LOAD(INCHAIN, ptr) | |

788 | /// This corresponds to "load atomic" instruction. | |

789 | ATOMIC_LOAD, | |

790 | ||

791 | /// OUTCHAIN = ATOMIC_STORE(INCHAIN, ptr, val) | |

792 | /// This corresponds to "store atomic" instruction. | |

793 | ATOMIC_STORE, | |

794 | ||

795 | /// Val, OUTCHAIN = ATOMIC_CMP_SWAP(INCHAIN, ptr, cmp, swap) | |

796 | /// For double-word atomic operations: | |

797 | /// ValLo, ValHi, OUTCHAIN = ATOMIC_CMP_SWAP(INCHAIN, ptr, cmpLo, cmpHi, | |

798 | /// swapLo, swapHi) | |

799 | /// This corresponds to the cmpxchg instruction. | |

800 | ATOMIC_CMP_SWAP, | |

801 | ||

802 | /// Val, Success, OUTCHAIN | |

803 | /// = ATOMIC_CMP_SWAP_WITH_SUCCESS(INCHAIN, ptr, cmp, swap) | |

804 | /// N.b. this is still a strong cmpxchg operation, so | |

805 | /// Success == "Val == cmp". | |

806 | ATOMIC_CMP_SWAP_WITH_SUCCESS, | |

807 | ||

808 | /// Val, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amt) | |

809 | /// Val, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amt) | |

810 | /// For double-word atomic operations: | |

811 | /// ValLo, ValHi, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amtLo, amtHi) | |

812 | /// ValLo, ValHi, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amtLo, amtHi) | |

813 | /// These correspond to the atomicrmw instruction. | |

814 | ATOMIC_SWAP, | |

815 | ATOMIC_LOAD_ADD, | |

816 | ATOMIC_LOAD_SUB, | |

817 | ATOMIC_LOAD_AND, | |

818 | ATOMIC_LOAD_CLR, | |

819 | ATOMIC_LOAD_OR, | |

820 | ATOMIC_LOAD_XOR, | |

821 | ATOMIC_LOAD_NAND, | |

822 | ATOMIC_LOAD_MIN, | |

823 | ATOMIC_LOAD_MAX, | |

824 | ATOMIC_LOAD_UMIN, | |

825 | ATOMIC_LOAD_UMAX, | |

826 | ATOMIC_LOAD_FADD, | |

827 | ATOMIC_LOAD_FSUB, | |

828 | ||

829 | // Masked load and store - consecutive vector load and store operations | |

830 | // with additional mask operand that prevents memory accesses to the | |

831 | // masked-off lanes. | |

832 | // | |

833 | // Val, OutChain = MLOAD(BasePtr, Mask, PassThru) | |

834 | // OutChain = MSTORE(Value, BasePtr, Mask) | |

835 | MLOAD, MSTORE, | |

836 | ||

837 | // Masked gather and scatter - load and store operations for a vector of | |

838 | // random addresses with additional mask operand that prevents memory | |

839 | // accesses to the masked-off lanes. | |

840 | // | |

841 | // Val, OutChain = GATHER(InChain, PassThru, Mask, BasePtr, Index, Scale) | |

842 | // OutChain = SCATTER(InChain, Value, Mask, BasePtr, Index, Scale) | |

843 | // | |

844 | // The Index operand can have more vector elements than the other operands | |

845 | // due to type legalization. The extra elements are ignored. | |

846 | MGATHER, MSCATTER, | |

847 | ||

848 | /// This corresponds to the llvm.lifetime.* intrinsics. The first operand | |

849 | /// is the chain and the second operand is the alloca pointer. | |

850 | LIFETIME_START, LIFETIME_END, | |

851 | ||

852 | /// GC_TRANSITION_START/GC_TRANSITION_END - These operators mark the | |

853 | /// beginning and end of GC transition sequence, and carry arbitrary | |

854 | /// information that target might need for lowering. The first operand is | |

855 | /// a chain, the rest are specified by the target and not touched by the DAG | |

856 | /// optimizers. GC_TRANSITION_START..GC_TRANSITION_END pairs may not be | |

857 | /// nested. | |

858 | GC_TRANSITION_START, | |

859 | GC_TRANSITION_END, | |

860 | ||

861 | /// GET_DYNAMIC_AREA_OFFSET - get offset from native SP to the address of | |

862 | /// the most recent dynamic alloca. For most targets that would be 0, but | |

863 | /// for some others (e.g. PowerPC, PowerPC64) that would be compile-time | |

864 | /// known nonzero constant. The only operand here is the chain. | |

865 | GET_DYNAMIC_AREA_OFFSET, | |

866 | ||

867 | /// Generic reduction nodes. These nodes represent horizontal vector | |

868 | /// reduction operations, producing a scalar result. | |

869 | /// The STRICT variants perform reductions in sequential order. The first | |

870 | /// operand is an initial scalar accumulator value, and the second operand | |

871 | /// is the vector to reduce. | |

872 | VECREDUCE_STRICT_FADD, VECREDUCE_STRICT_FMUL, | |

873 | /// These reductions are non-strict, and have a single vector operand. | |

874 | VECREDUCE_FADD, VECREDUCE_FMUL, | |

875 | VECREDUCE_ADD, VECREDUCE_MUL, | |

876 | VECREDUCE_AND, VECREDUCE_OR, VECREDUCE_XOR, | |

877 | VECREDUCE_SMAX, VECREDUCE_SMIN, VECREDUCE_UMAX, VECREDUCE_UMIN, | |

878 | /// FMIN/FMAX nodes can have flags, for NaN/NoNaN variants. | |

879 | VECREDUCE_FMAX, VECREDUCE_FMIN, | |

880 | ||

881 | /// BUILTIN_OP_END - This must be the last enum value in this list. | |

882 | /// The target-specific pre-isel opcode values start here. | |

883 | BUILTIN_OP_END | |

884 | }; | |

885 | ||

886 | /// FIRST_TARGET_MEMORY_OPCODE - Target-specific pre-isel operations | |

887 | /// which do not reference a specific memory location should be less than | |

888 | /// this value. Those that do must not be less than this value, and can | |

889 | /// be used with SelectionDAG::getMemIntrinsicNode. | |

890 | static const int FIRST_TARGET_MEMORY_OPCODE = BUILTIN_OP_END+400; | |

891 | ||

892 | //===--------------------------------------------------------------------===// | |

893 | /// MemIndexedMode enum - This enum defines the load / store indexed | |

894 | /// addressing modes. | |

895 | /// | |

896 | /// UNINDEXED "Normal" load / store. The effective address is already | |

897 | /// computed and is available in the base pointer. The offset | |

898 | /// operand is always undefined. In addition to producing a | |

899 | /// chain, an unindexed load produces one value (result of the | |

900 | /// load); an unindexed store does not produce a value. | |

901 | /// | |

902 | /// PRE_INC Similar to the unindexed mode where the effective address is | |

903 | /// PRE_DEC the value of the base pointer add / subtract the offset. | |

904 | /// It considers the computation as being folded into the load / | |

905 | /// store operation (i.e. the load / store does the address | |

906 | /// computation as well as performing the memory transaction). | |

907 | /// The base operand is always undefined. In addition to | |

908 | /// producing a chain, pre-indexed load produces two values | |

909 | /// (result of the load and the result of the address | |

910 | /// computation); a pre-indexed store produces one value (result | |

911 | /// of the address computation). | |

912 | /// | |

913 | /// POST_INC The effective address is the value of the base pointer. The | |

914 | /// POST_DEC value of the offset operand is then added to / subtracted | |

915 | /// from the base after memory transaction. In addition to | |

916 | /// producing a chain, post-indexed load produces two values | |

917 | /// (the result of the load and the result of the base +/- offset | |

918 | /// computation); a post-indexed store produces one value (the | |

919 | /// the result of the base +/- offset computation). | |

920 | enum MemIndexedMode { | |

921 | UNINDEXED = 0, | |

922 | PRE_INC, | |

923 | PRE_DEC, | |

924 | POST_INC, | |

925 | POST_DEC | |

926 | }; | |

927 | ||

928 | static const int LAST_INDEXED_MODE = POST_DEC + 1; | |

929 | ||

930 | //===--------------------------------------------------------------------===// | |

931 | /// LoadExtType enum - This enum defines the three variants of LOADEXT | |

932 | /// (load with extension). | |

933 | /// | |

934 | /// SEXTLOAD loads the integer operand and sign extends it to a larger | |

935 | /// integer result type. | |

936 | /// ZEXTLOAD loads the integer operand and zero extends it to a larger | |

937 | /// integer result type. | |

938 | /// EXTLOAD is used for two things: floating point extending loads and | |

939 | /// integer extending loads [the top bits are undefined]. | |

940 | enum LoadExtType { | |

941 | NON_EXTLOAD = 0, | |

942 | EXTLOAD, | |

943 | SEXTLOAD, | |

944 | ZEXTLOAD | |

945 | }; | |

946 | ||

947 | static const int LAST_LOADEXT_TYPE = ZEXTLOAD + 1; | |

948 | ||

949 | NodeType getExtForLoadExtType(bool IsFP, LoadExtType); | |

950 | ||

951 | //===--------------------------------------------------------------------===// | |

952 | /// ISD::CondCode enum - These are ordered carefully to make the bitfields | |

953 | /// below work out, when considering SETFALSE (something that never exists | |

954 | /// dynamically) as 0. "U" -> Unsigned (for integer operands) or Unordered | |

955 | /// (for floating point), "L" -> Less than, "G" -> Greater than, "E" -> Equal | |

956 | /// to. If the "N" column is 1, the result of the comparison is undefined if | |

957 | /// the input is a NAN. | |

958 | /// | |

959 | /// All of these (except for the 'always folded ops') should be handled for | |

960 | /// floating point. For integer, only the SETEQ,SETNE,SETLT,SETLE,SETGT, | |

961 | /// SETGE,SETULT,SETULE,SETUGT, and SETUGE opcodes are used. | |

962 | /// | |

963 | /// Note that these are laid out in a specific order to allow bit-twiddling | |

964 | /// to transform conditions. | |

965 | enum CondCode { | |

966 | // Opcode N U L G E Intuitive operation | |

967 | SETFALSE, // 0 0 0 0 Always false (always folded) | |

968 | SETOEQ, // 0 0 0 1 True if ordered and equal | |

969 | SETOGT, // 0 0 1 0 True if ordered and greater than | |

970 | SETOGE, // 0 0 1 1 True if ordered and greater than or equal | |

971 | SETOLT, // 0 1 0 0 True if ordered and less than | |

972 | SETOLE, // 0 1 0 1 True if ordered and less than or equal | |

973 | SETONE, // 0 1 1 0 True if ordered and operands are unequal | |

974 | SETO, // 0 1 1 1 True if ordered (no nans) | |

975 | SETUO, // 1 0 0 0 True if unordered: isnan(X) | isnan(Y) | |

976 | SETUEQ, // 1 0 0 1 True if unordered or equal | |

977 | SETUGT, // 1 0 1 0 True if unordered or greater than | |

978 | SETUGE, // 1 0 1 1 True if unordered, greater than, or equal | |

979 | SETULT, // 1 1 0 0 True if unordered or less than | |

980 | SETULE, // 1 1 0 1 True if unordered, less than, or equal | |

981 | SETUNE, // 1 1 1 0 True if unordered or not equal | |

982 | SETTRUE, // 1 1 1 1 Always true (always folded) | |

983 | // Don't care operations: undefined if the input is a nan. | |

984 | SETFALSE2, // 1 X 0 0 0 Always false (always folded) | |

985 | SETEQ, // 1 X 0 0 1 True if equal | |

986 | SETGT, // 1 X 0 1 0 True if greater than | |

987 | SETGE, // 1 X 0 1 1 True if greater than or equal | |

988 | SETLT, // 1 X 1 0 0 True if less than | |

989 | SETLE, // 1 X 1 0 1 True if less than or equal | |

990 | SETNE, // 1 X 1 1 0 True if not equal | |

991 | SETTRUE2, // 1 X 1 1 1 Always true (always folded) | |

992 | ||

993 | SETCC_INVALID // Marker value. | |

994 | }; | |

995 | ||

996 | /// Return true if this is a setcc instruction that performs a signed | |

997 | /// comparison when used with integer operands. | |

998 | 1.99M | inline bool isSignedIntSetCC(CondCode Code) { |

999 | 1.99M | return Code == SETGT || |

1000 | 1.99M | } |

1001 | ||

1002 | /// Return true if this is a setcc instruction that performs an unsigned | |

1003 | /// comparison when used with integer operands. | |

1004 | 35.6k | inline bool isUnsignedIntSetCC(CondCode Code) { |

1005 | 35.6k | return Code == SETUGT || |

1006 | 35.6k | } |

1007 | ||

1008 | /// Return true if the specified condition returns true if the two operands to | |

1009 | /// the condition are equal. Note that if one of the two operands is a NaN, | |

1010 | /// this value is meaningless. | |

1011 | 9.93k | inline bool isTrueWhenEqual(CondCode Cond) { |

1012 | 9.93k | return ((int)Cond & 1) != 0; |

1013 | 9.93k | } |

1014 | ||

1015 | /// This function returns 0 if the condition is always false if an operand is | |

1016 | /// a NaN, 1 if the condition is always true if the operand is a NaN, and 2 if | |

1017 | /// the condition is undefined if the operand is a NaN. | |

1018 | 2.96k | inline unsigned getUnorderedFlavor(CondCode Cond) { |

1019 | 2.96k | return ((int)Cond >> 3) & 3; |

1020 | 2.96k | } |

1021 | ||

1022 | /// Return the operation corresponding to !(X op Y), where 'op' is a valid | |

1023 | /// SetCC operation. | |

1024 | CondCode getSetCCInverse(CondCode Operation, bool isInteger); | |

1025 | ||

1026 | /// Return the operation corresponding to (Y op X) when given the operation | |

1027 | /// for (X op Y). | |

1028 | CondCode getSetCCSwappedOperands(CondCode Operation); | |

1029 | ||

1030 | /// Return the result of a logical OR between different comparisons of | |

1031 | /// identical values: ((X op1 Y) | (X op2 Y)). This function returns | |

1032 | /// SETCC_INVALID if it is not possible to represent the resultant comparison. | |

1033 | CondCode getSetCCOrOperation(CondCode Op1, CondCode Op2, bool isInteger); | |

1034 | ||

1035 | /// Return the result of a logical AND between different comparisons of | |

1036 | /// identical values: ((X op1 Y) & (X op2 Y)). This function returns | |

1037 | /// SETCC_INVALID if it is not possible to represent the resultant comparison. | |

1038 | CondCode getSetCCAndOperation(CondCode Op1, CondCode Op2, bool isInteger); | |

1039 | ||

1040 | } // end llvm::ISD namespace | |

1041 | ||

1042 | } // end llvm namespace | |

1043 | ||

1044 | #endif |