Coverage Report

Created: 2019-02-23 12:57

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/llvm/include/llvm/CodeGen/LiveIntervalUnion.h
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//===- LiveIntervalUnion.h - Live interval union data struct ---*- C++ -*--===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// LiveIntervalUnion is a union of live segments across multiple live virtual
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// registers. This may be used during coalescing to represent a congruence
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// class, or during register allocation to model liveness of a physical
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// register.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_LIVEINTERVALUNION_H
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#define LLVM_CODEGEN_LIVEINTERVALUNION_H
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#include "llvm/ADT/IntervalMap.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/CodeGen/LiveInterval.h"
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#include "llvm/CodeGen/SlotIndexes.h"
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#include <cassert>
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#include <limits>
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namespace llvm {
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class raw_ostream;
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class TargetRegisterInfo;
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#ifndef NDEBUG
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// forward declaration
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template <unsigned Element> class SparseBitVector;
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using LiveVirtRegBitSet = SparseBitVector<128>;
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#endif
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/// Union of live intervals that are strong candidates for coalescing into a
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/// single register (either physical or virtual depending on the context).  We
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/// expect the constituent live intervals to be disjoint, although we may
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/// eventually make exceptions to handle value-based interference.
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class LiveIntervalUnion {
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  // A set of live virtual register segments that supports fast insertion,
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  // intersection, and removal.
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  // Mapping SlotIndex intervals to virtual register numbers.
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  using LiveSegments = IntervalMap<SlotIndex, LiveInterval*>;
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public:
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  // SegmentIter can advance to the next segment ordered by starting position
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  // which may belong to a different live virtual register. We also must be able
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  // to reach the current segment's containing virtual register.
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  using SegmentIter = LiveSegments::iterator;
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  /// Const version of SegmentIter.
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  using ConstSegmentIter = LiveSegments::const_iterator;
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  // LiveIntervalUnions share an external allocator.
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  using Allocator = LiveSegments::Allocator;
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private:
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  unsigned Tag = 0;       // unique tag for current contents.
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  LiveSegments Segments;  // union of virtual reg segments
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public:
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5.11M
  explicit LiveIntervalUnion(Allocator &a) : Segments(a) {}
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  // Iterate over all segments in the union of live virtual registers ordered
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  // by their starting position.
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  SegmentIter begin() { return Segments.begin(); }
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  SegmentIter end() { return Segments.end(); }
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  SegmentIter find(SlotIndex x) { return Segments.find(x); }
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  ConstSegmentIter begin() const { return Segments.begin(); }
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  ConstSegmentIter end() const { return Segments.end(); }
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0
  ConstSegmentIter find(SlotIndex x) const { return Segments.find(x); }
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134M
  bool empty() const { return Segments.empty(); }
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  SlotIndex startIndex() const { return Segments.start(); }
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  // Provide public access to the underlying map to allow overlap iteration.
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  using Map = LiveSegments;
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  const Map &getMap() const { return Segments; }
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  /// getTag - Return an opaque tag representing the current state of the union.
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  unsigned getTag() const { return Tag; }
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  /// changedSince - Return true if the union change since getTag returned tag.
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  bool changedSince(unsigned tag) const { return tag != Tag; }
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  // Add a live virtual register to this union and merge its segments.
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  void unify(LiveInterval &VirtReg, const LiveRange &Range);
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  // Remove a live virtual register's segments from this union.
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  void extract(LiveInterval &VirtReg, const LiveRange &Range);
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  // Remove all inserted virtual registers.
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  void clear() { Segments.clear(); ++Tag; }
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  // Print union, using TRI to translate register names
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  void print(raw_ostream &OS, const TargetRegisterInfo *TRI) const;
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#ifndef NDEBUG
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  // Verify the live intervals in this union and add them to the visited set.
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  void verify(LiveVirtRegBitSet& VisitedVRegs);
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#endif
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  /// Query interferences between a single live virtual register and a live
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  /// interval union.
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  class Query {
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    const LiveIntervalUnion *LiveUnion = nullptr;
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    const LiveRange *LR = nullptr;
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    LiveRange::const_iterator LRI;  ///< current position in LR
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    ConstSegmentIter LiveUnionI;    ///< current position in LiveUnion
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    SmallVector<LiveInterval*,4> InterferingVRegs;
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    bool CheckedFirstInterference = false;
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    bool SeenAllInterferences = false;
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    unsigned Tag = 0;
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    unsigned UserTag = 0;
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    void reset(unsigned NewUserTag, const LiveRange &NewLR,
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               const LiveIntervalUnion &NewLiveUnion) {
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      LiveUnion = &NewLiveUnion;
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      LR = &NewLR;
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      InterferingVRegs.clear();
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      CheckedFirstInterference = false;
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      SeenAllInterferences = false;
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      Tag = NewLiveUnion.getTag();
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      UserTag = NewUserTag;
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    }
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  public:
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    Query() = default;
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    Query(const LiveRange &LR, const LiveIntervalUnion &LIU):
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      LiveUnion(&LIU), LR(&LR) {}
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    Query(const Query &) = delete;
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    Query &operator=(const Query &) = delete;
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    void init(unsigned NewUserTag, const LiveRange &NewLR,
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              const LiveIntervalUnion &NewLiveUnion) {
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      if (UserTag == NewUserTag && 
LR == &NewLR32.9M
&&
LiveUnion == &NewLiveUnion32.6M
&&
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!NewLiveUnion.changedSince(Tag)32.6M
) {
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        // Retain cached results, e.g. firstInterference.
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        return;
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      }
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      reset(NewUserTag, NewLR, NewLiveUnion);
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    }
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    // Does this live virtual register interfere with the union?
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    bool checkInterference() { return collectInterferingVRegs(1); }
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    // Count the virtual registers in this union that interfere with this
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    // query's live virtual register, up to maxInterferingRegs.
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    unsigned collectInterferingVRegs(
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        unsigned MaxInterferingRegs = std::numeric_limits<unsigned>::max());
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    // Was this virtual register visited during collectInterferingVRegs?
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    bool isSeenInterference(LiveInterval *VirtReg) const;
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    // Did collectInterferingVRegs collect all interferences?
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    bool seenAllInterferences() const { return SeenAllInterferences; }
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    // Vector generated by collectInterferingVRegs.
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    const SmallVectorImpl<LiveInterval*> &interferingVRegs() const {
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      return InterferingVRegs;
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    }
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  };
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  // Array of LiveIntervalUnions.
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  class Array {
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    unsigned Size = 0;
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    LiveIntervalUnion *LIUs = nullptr;
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  public:
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    Array() = default;
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    ~Array() { clear(); }
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    // Initialize the array to have Size entries.
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    // Reuse an existing allocation if the size matches.
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    void init(LiveIntervalUnion::Allocator&, unsigned Size);
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    unsigned size() const { return Size; }
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    void clear();
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    LiveIntervalUnion& operator[](unsigned idx) {
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      assert(idx <  Size && "idx out of bounds");
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      return LIUs[idx];
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    }
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    const LiveIntervalUnion& operator[](unsigned Idx) const {
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      assert(Idx < Size && "Idx out of bounds");
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      return LIUs[Idx];
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    }
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  };
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};
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} // end namespace llvm
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#endif // LLVM_CODEGEN_LIVEINTERVALUNION_H