Coverage Report

Created: 2019-07-24 05:18

/Users/buildslave/jenkins/workspace/clang-stage2-coverage-R/llvm/include/llvm/CodeGen/RegisterScavenging.h
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//===- RegisterScavenging.h - Machine register scavenging -------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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/// \file
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/// This file declares the machine register scavenger class. It can provide
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/// information such as unused register at any point in a machine basic block.
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/// It also provides a mechanism to make registers available by evicting them
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/// to spill slots.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_REGISTERSCAVENGING_H
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#define LLVM_CODEGEN_REGISTERSCAVENGING_H
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#include "llvm/ADT/BitVector.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/CodeGen/LiveRegUnits.h"
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#include "llvm/CodeGen/MachineBasicBlock.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/MC/LaneBitmask.h"
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namespace llvm {
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class MachineInstr;
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class TargetInstrInfo;
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class TargetRegisterClass;
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class TargetRegisterInfo;
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class RegScavenger {
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  const TargetRegisterInfo *TRI;
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  const TargetInstrInfo *TII;
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  MachineRegisterInfo* MRI;
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  MachineBasicBlock *MBB = nullptr;
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  MachineBasicBlock::iterator MBBI;
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  unsigned NumRegUnits = 0;
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  /// True if RegScavenger is currently tracking the liveness of registers.
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  bool Tracking = false;
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  /// Information on scavenged registers (held in a spill slot).
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  struct ScavengedInfo {
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    ScavengedInfo(int FI = -1) : FrameIndex(FI) {}
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    /// A spill slot used for scavenging a register post register allocation.
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    int FrameIndex;
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    /// If non-zero, the specific register is currently being
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    /// scavenged. That is, it is spilled to this scavenging stack slot.
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    unsigned Reg = 0;
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    /// The instruction that restores the scavenged register from stack.
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    const MachineInstr *Restore = nullptr;
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  };
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  /// A vector of information on scavenged registers.
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  SmallVector<ScavengedInfo, 2> Scavenged;
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  LiveRegUnits LiveUnits;
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  // These BitVectors are only used internally to forward(). They are members
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  // to avoid frequent reallocations.
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  BitVector KillRegUnits, DefRegUnits;
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  BitVector TmpRegUnits;
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public:
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  RegScavenger() = default;
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  /// Start tracking liveness from the begin of basic block \p MBB.
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  void enterBasicBlock(MachineBasicBlock &MBB);
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  /// Start tracking liveness from the end of basic block \p MBB.
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  /// Use backward() to move towards the beginning of the block. This is
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  /// preferred to enterBasicBlock() and forward() because it does not depend
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  /// on the presence of kill flags.
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  void enterBasicBlockEnd(MachineBasicBlock &MBB);
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  /// Move the internal MBB iterator and update register states.
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  void forward();
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  /// Move the internal MBB iterator and update register states until
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  /// it has processed the specific iterator.
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  void forward(MachineBasicBlock::iterator I) {
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    if (!Tracking && 
MBB->begin() != I985
)
forward()368
;
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    while (MBBI != I) 
forward()22.8k
;
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  }
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  /// Invert the behavior of forward() on the current instruction (undo the
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  /// changes to the available registers made by forward()).
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  void unprocess();
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  /// Unprocess instructions until you reach the provided iterator.
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  void unprocess(MachineBasicBlock::iterator I) {
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    while (MBBI != I) unprocess();
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  }
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  /// Update internal register state and move MBB iterator backwards.
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  /// Contrary to unprocess() this method gives precise results even in the
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  /// absence of kill flags.
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  void backward();
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  /// Call backward() as long as the internal iterator does not point to \p I.
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  void backward(MachineBasicBlock::iterator I) {
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    while (MBBI != I)
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      backward();
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  }
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  /// Move the internal MBB iterator but do not update register states.
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  void skipTo(MachineBasicBlock::iterator I) {
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    if (I == MachineBasicBlock::iterator(nullptr))
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      Tracking = false;
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    MBBI = I;
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  }
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  MachineBasicBlock::iterator getCurrentPosition() const { return MBBI; }
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  /// Return if a specific register is currently used.
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  bool isRegUsed(unsigned Reg, bool includeReserved = true) const;
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  /// Return all available registers in the register class in Mask.
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  BitVector getRegsAvailable(const TargetRegisterClass *RC);
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  /// Find an unused register of the specified register class.
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  /// Return 0 if none is found.
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  unsigned FindUnusedReg(const TargetRegisterClass *RC) const;
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  /// Add a scavenging frame index.
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  void addScavengingFrameIndex(int FI) {
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    Scavenged.push_back(ScavengedInfo(FI));
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  }
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  /// Query whether a frame index is a scavenging frame index.
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  bool isScavengingFrameIndex(int FI) const {
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    for (SmallVectorImpl<ScavengedInfo>::const_iterator I = Scavenged.begin(),
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         IE = Scavenged.end(); I != IE; 
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)
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      if (I->FrameIndex == FI)
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        return true;
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return false191k
;
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  }
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  /// Get an array of scavenging frame indices.
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  void getScavengingFrameIndices(SmallVectorImpl<int> &A) const {
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    for (SmallVectorImpl<ScavengedInfo>::const_iterator I = Scavenged.begin(),
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         IE = Scavenged.end(); I != IE; 
++I7.45k
)
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      if (I->FrameIndex >= 0)
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        A.push_back(I->FrameIndex);
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  }
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  /// Make a register of the specific register class
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  /// available and do the appropriate bookkeeping. SPAdj is the stack
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  /// adjustment due to call frame, it's passed along to eliminateFrameIndex().
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  /// Returns the scavenged register.
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  /// This is deprecated as it depends on the quality of the kill flags being
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  /// present; Use scavengeRegisterBackwards() instead!
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  ///
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  /// If \p AllowSpill is false, fail if a spill is required to make the
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  /// register available, and return NoRegister.
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  unsigned scavengeRegister(const TargetRegisterClass *RC,
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                            MachineBasicBlock::iterator I, int SPAdj,
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                            bool AllowSpill = true);
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  unsigned scavengeRegister(const TargetRegisterClass *RegClass, int SPAdj,
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                            bool AllowSpill = true) {
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    return scavengeRegister(RegClass, MBBI, SPAdj, AllowSpill);
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  }
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  /// Make a register of the specific register class available from the current
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  /// position backwards to the place before \p To. If \p RestoreAfter is true
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  /// this includes the instruction following the current position.
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  /// SPAdj is the stack adjustment due to call frame, it's passed along to
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  /// eliminateFrameIndex().
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  /// Returns the scavenged register.
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  ///
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  /// If \p AllowSpill is false, fail if a spill is required to make the
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  /// register available, and return NoRegister.
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  unsigned scavengeRegisterBackwards(const TargetRegisterClass &RC,
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                                     MachineBasicBlock::iterator To,
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                                     bool RestoreAfter, int SPAdj,
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                                     bool AllowSpill = true);
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  /// Tell the scavenger a register is used.
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  void setRegUsed(unsigned Reg, LaneBitmask LaneMask = LaneBitmask::getAll());
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private:
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  /// Returns true if a register is reserved. It is never "unused".
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  bool isReserved(unsigned Reg) const { return MRI->isReserved(Reg); }
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  /// setUsed / setUnused - Mark the state of one or a number of register units.
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  ///
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  void setUsed(const BitVector &RegUnits) {
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    LiveUnits.addUnits(RegUnits);
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  }
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  void setUnused(const BitVector &RegUnits) {
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    LiveUnits.removeUnits(RegUnits);
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  }
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  /// Processes the current instruction and fill the KillRegUnits and
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  /// DefRegUnits bit vectors.
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  void determineKillsAndDefs();
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  /// Add all Reg Units that Reg contains to BV.
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  void addRegUnits(BitVector &BV, unsigned Reg);
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  /// Remove all Reg Units that \p Reg contains from \p BV.
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  void removeRegUnits(BitVector &BV, unsigned Reg);
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  /// Return the candidate register that is unused for the longest after
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  /// StartMI. UseMI is set to the instruction where the search stopped.
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  ///
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  /// No more than InstrLimit instructions are inspected.
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  unsigned findSurvivorReg(MachineBasicBlock::iterator StartMI,
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                           BitVector &Candidates,
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                           unsigned InstrLimit,
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                           MachineBasicBlock::iterator &UseMI);
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  /// Initialize RegisterScavenger.
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  void init(MachineBasicBlock &MBB);
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  /// Mark live-in registers of basic block as used.
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  void setLiveInsUsed(const MachineBasicBlock &MBB);
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  /// Spill a register after position \p After and reload it before position
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  /// \p UseMI.
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  ScavengedInfo &spill(unsigned Reg, const TargetRegisterClass &RC, int SPAdj,
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                       MachineBasicBlock::iterator Before,
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                       MachineBasicBlock::iterator &UseMI);
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};
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/// Replaces all frame index virtual registers with physical registers. Uses the
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/// register scavenger to find an appropriate register to use.
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void scavengeFrameVirtualRegs(MachineFunction &MF, RegScavenger &RS);
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} // end namespace llvm
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#endif // LLVM_CODEGEN_REGISTERSCAVENGING_H